WO2023246261A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2023246261A1
WO2023246261A1 PCT/CN2023/089125 CN2023089125W WO2023246261A1 WO 2023246261 A1 WO2023246261 A1 WO 2023246261A1 CN 2023089125 W CN2023089125 W CN 2023089125W WO 2023246261 A1 WO2023246261 A1 WO 2023246261A1
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WO
WIPO (PCT)
Prior art keywords
layer
lead
conductive structure
area
metal layer
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PCT/CN2023/089125
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English (en)
French (fr)
Inventor
闫政龙
尚延阳
王铸
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Publication of WO2023246261A1 publication Critical patent/WO2023246261A1/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the present disclosure relates to the field of touch display technology, and in particular to a display panel and a display device.
  • AMOLED Active Matrix Organic Light Emitting Diode, active matrix organic light emitting diode
  • FMLOC Flexible Multi-Layer On Cell
  • OLED Organic Light Emitting Diode
  • Embodiments of the present disclosure provide a display panel and a display device to solve the problem in the related art that the organic insulating layer of the touch structure has weak adhesion and the Peeling phenomenon is prone to occur in the binding area.
  • a display panel provided by an embodiment of the present disclosure includes: a display area, a binding area located on one side of the display area, and a bending area located between the display area and the binding area;
  • the display panel includes:
  • a third metal layer located on the side of the second metal layer facing away from the base substrate;
  • a touch control structure is located on the side of the third metal layer facing away from the base substrate; the touch control structure includes a stacked organic insulating layer and a touch control electrode layer, and includes a device that is electrically connected to the touch control electrode layer.
  • the touch lead extends from the display area to the binding area; wherein the touch lead includes a first lead located in the bending area and a third lead located in the binding area. Two leads, the first lead is located on the second metal layer, the second lead is located on the third metal layer, the orthographic projection of the organic insulating layer on the base substrate is in contact with the binding area , the orthographic projections of the bending area on the base substrate do not overlap.
  • the above display panel provided by the embodiment of the present disclosure further includes: a first planarization layer located between the third metal layer and the touch structure, and a first planarization layer located between the second metal layer and the touch structure. a second planarization layer between the third metal layers;
  • the touch lead also includes a third lead located in the display area, and the third lead is electrically connected to the first lead through a via hole penetrating the first planarization layer and the second planarization layer. , the first lead is electrically connected to the second lead through a via hole penetrating the second planarization layer.
  • the above display panel provided by the embodiment of the present disclosure further includes a transition area between the display area and the bending area, and the third lead extends to the transition area by penetrating the The via holes of the first planarization layer and the second planarization layer are electrically connected to the first leads.
  • the above display panel provided by the embodiment of the present disclosure further includes: a third planarization layer located between the first metal layer and the second metal layer, and a high-voltage power supply line and a low-voltage power supply line. power cable;
  • the high-voltage power line includes a first conductive structure and a second conductive structure in the binding area.
  • the first conductive structure is located on the first metal layer, and the second conductive structure is located on the second metal layer. , the first conductive structure and the second conductive structure are electrically connected through a via hole penetrating the third planarization layer;
  • the low-voltage power line includes a third conductive structure and a fourth conductive structure in the binding area.
  • the third conductive structure is located on the first metal layer, and the third conductive structure is connected to the first conductive structure.
  • the structures are arranged at intervals, the fourth conductive structure is located on the second metal layer, and the fourth conductive structure is arranged at intervals from the second conductive structure, and the third conductive structure and the fourth conductive structure pass through The via holes of the third planarization layer are electrically connected.
  • the high-voltage power line further includes a fifth conductive structure in the binding area, and the fifth conductive structure is located on the third metal layer, so The fifth conductive structure is electrically connected to the second conductive structure through a via hole penetrating the second planarization layer;
  • the low-voltage power line further includes a sixth conductive structure in the binding area.
  • the sixth conductive structure is located on the third metal layer.
  • the sixth conductive structure is spaced apart from the fifth conductive structure.
  • the sixth conductive structure is electrically connected to the fourth conductive structure through a via hole penetrating the second planarization layer;
  • the second lead, the fifth conductive structure and the sixth conductive structure are insulated from each other.
  • the sixth conductive structure includes two sub-conductive structures arranged at intervals, and the second lead is located between the two sub-conductive structures.
  • the organic insulating layer includes a first organic insulating layer and a second organic insulating layer arranged in a stack
  • the touch electrode layer includes a layer located on the first organic insulating layer. a first touch electrode layer between the insulating layer and the second organic insulating layer and a second touch electrode layer located on the side of the second organic insulating layer facing away from the base substrate;
  • the third lead includes a first sub-lead and a second sub-lead that are electrically connected.
  • the first sub-lead is located on the first touch electrode layer, and the second sub-lead is located on the second touch electrode layer.
  • the first sub-lead is electrically connected to the first lead through a via hole penetrating the first planarization layer and the second planarization layer.
  • the above display panel provided by the embodiment of the present disclosure further includes a protective layer located on the side of the second touch electrode layer facing away from the base substrate, and the material of the protective layer is insulated from the organic layer.
  • the materials of the layers are the same, the orthographic projection of the protective layer on the base substrate covers the base substrate, and the protective layer is in direct contact with the second lead.
  • the display panel provided by the embodiment of the present disclosure, it also includes a display located at the second A protective layer on the side of the touch electrode layer facing away from the base substrate.
  • the material of the protective layer is the same as the material of the organic insulating layer.
  • the orthographic projection of the first planarization layer on the base substrate covers In the base substrate, the orthographic projection of the protective layer on the base substrate does not overlap with the orthographic projection of the binding area and the bending area on the base substrate.
  • an embodiment of the present disclosure also provides a display device, including any of the above display panels provided by the embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a display panel and a display device in which the first lead of the touch lead located in the bending area is routed using the second metal layer, and the second lead of the touch lead located in the binding area is routed using the third metal layer.
  • Three metal layer routing so that there is no touch structure in the binding area and the bending area, and there is no organic insulating layer that is not resistant to high temperatures. That is, large grooves can be made in the organic insulating layer in the binding area and the bending area. Large area removal will not affect the connection relationship of the touch leads. Therefore, when the bonding process is performed in the bonding area, the peeling off of the organic insulating layer caused by the high temperature environment can be avoided, thereby improving the yield of the display product.
  • Figure 1 is a schematic top structural view of a display panel provided by an embodiment of the present disclosure
  • Figure 2 is a schematic cross-sectional structural diagram of a sub-pixel in Figure 1;
  • Figure 3 is a schematic cross-sectional structural diagram along the MM’ direction in Figure 1;
  • Figure 4 is a schematic cross-sectional structural diagram along the FF’ direction in Figure 1 in the related art
  • Figure 5 is a schematic cross-sectional structural diagram along the FF' direction in Figure 1 according to an embodiment of the present disclosure
  • Figure 6 is a schematic cross-sectional structural diagram of another embodiment of the present disclosure along the FF' direction in Figure 1;
  • Figure 7 is a schematic top view of the structure of VDD and VSS in the binding area
  • Figure 8 is a schematic top view of the structure of VDD, VSS and the second lead in the bonding area;
  • Figure 9 is another top view structural diagram of VDD, VSS and the second lead in the bonding area.
  • Figure 1 is a schematic diagram of the planar structure after touch electrodes are installed on the OLED display panel.
  • the display panel includes: a display area AA, a binding area BB located on one side of the display area AA, and a binding area BB located on one side of the display area AA.
  • the bending area CC between AA and the binding area BB; the display area AA generally includes a plurality of light-emitting sub-pixels.
  • Figure 2 is a schematic cross-sectional view along a light-emitting sub-pixel in Figure 1.
  • the display panel includes a display substrate 1, an encapsulation layer 2 for encapsulating the display substrate 1, and a touch structure 3 located on the encapsulation layer 2.
  • the encapsulation layer 2 may include a first inorganic layer 21 , an organic layer 22 and a second inorganic layer 23 that are stacked on the display substrate 1 .
  • the touch structure 3 can be directly fabricated on the packaging layer 2. This technology is called FMLOC technology. FMLOC technology can be used to prepare lighter and thinner touch panels, and this technology can be applied to folded and rolled OLED display devices. .
  • the display substrate 1 includes a base substrate 11 , a driving circuit 12 and a light emitting device layer 13 stacked on the base substrate 11 .
  • the base substrate 11 may include a polyimide layer 111 and a buffer layer 112 that are stacked in sequence;
  • the driving circuit 12 may include an active layer 121 and a first gate insulating layer that are stacked in sequence on the base substrate 11 122.
  • the first metal layer 127 is generally provided with source electrodes, drain electrodes, data lines, etc.
  • the second metal layer 130 is generally provided as an intermediate electrode that overlaps the anode layer 134 and the drain electrode
  • the third metal layer 132 is based on a narrow frame product.
  • the project uses FIAA technology. This technology will add a third metal layer 132 and a third planarization layer 129.
  • the third metal layer 132 is mainly used for data signal wiring in the fan-out area (Fanout) to achieve the following Narrow bezel design for borders.
  • a touch structure 3 is formed on the packaging layer 2 of the display panel.
  • the touch structure 3 includes a stacked first organic insulation layer 31, a first touch electrode layer 32, and a second organic insulation layer. layer 33 and the second touch electrode layer 34 .
  • Figure 3 is a schematic cross-sectional view along the MM' direction in Figure 1, the first touch electrode layer 32 may include a plurality of bridge electrodes 321, and the second touch electrode layer 34 may It includes a plurality of touch electrodes 341, some of the touch electrodes 341 are directly electrically connected through the connection portion 342 located on the second touch electrode layer 34, and the other part of the touch electrodes 341 are electrically connected through the bridge electrode 321 located on the first touch electrode layer 32, Achieve obtaining Tx touch electrode and Rx touch electrode.
  • the touch structure 3 further includes a touch lead 35 electrically connected to the touch electrode 341 , and the touch lead 35 extends from the display area AA to the binding area BB.
  • Figure 4 is a schematic cross-sectional view of the touch lead 35 in the related art along the FF' direction in Figure 1.
  • the portion of the touch lead 35 located in the display area AA generally uses double-layer metal wiring (located on the first The double-layer wiring of the touch electrode layer 32 and the second touch electrode layer 34, the two layers of wiring are electrically connected to reduce resistance), the part of the touch lead 35 located in the bending area CC is generally jumpered to the second In the metal layer 130, the portion of the touch lead 35 located in the bonding area BB is jumpered to the first touch electrode layer 32 and the second touch electrode layer 34, that is, the portion of the touch lead 35 located in the bonding area BB is again Double-layer wiring is used (double-layer wiring located on the first touch electrode layer 32 and the second touch electrode layer 34, and the two layers of wiring are electrically connected to reduce resistance).
  • Organic insulating layers (31, 33 and 4) are provided below the first touch electrode layer 32, between the first touch electrode layer 32 and the second touch electrode layer 34, and above the second touch electrode layer 34.
  • the preparation process of the touch structure 3 is performed after the packaging process.
  • the material of the packaging layer 2 is not resistant to high temperatures, so the preparation process of the touch structure 3 It can only be carried out in a low-temperature environment. For example, only an 85°C low-temperature process can be used.
  • the current organic insulating layer material that can adapt to low-temperature processes is negative optical glue. Therefore, the material of the organic insulating layers (31, 33 and 4) is low-temperature negative optical glue.
  • the temperature of the bonding area BB is relatively high during the bonding process, and the low-temperature negative optical adhesive
  • the adhesion force is weak, so the organic insulating layers (31, 33 and 4) in the binding area BB that are not resistant to high temperatures will peel during the high temperature and pressing process, greatly reducing the yield of the display product. .
  • FIG. 1 Figures 1 to 3, Figure 5 and Figure 6.
  • Figures 5 and 6 are diagrams along the touch lead 35 provided by the embodiment of the present disclosure. Schematic cross-sectional view in the FF' direction in 1.
  • the display panel includes: a display area AA, a binding area BB located on one side of the display area AA, and a bending area CC located between the display area AA and the binding area BB;
  • the display panel includes:
  • the first metal layer 127 is located on the base substrate 11;
  • the second metal layer 130 is located on the side of the first metal layer 127 facing away from the base substrate 11;
  • the third metal layer 132 is located on the side of the second metal layer 130 facing away from the base substrate 11;
  • the touch structure 3 is located on the side of the third metal layer 132 facing away from the base substrate 11; the touch structure 3 includes stacked organic insulating layers (31 and 33) and touch electrode layers (32 and 34), and includes The touch electrode layers (32 and 34) are electrically connected to the touch lead 35, which extends from the display area AA to the binding area BB; the touch lead 35 includes a first lead 351 located in the bending area CC and The second lead 352 located in the bonding area BB, the first lead 351 located in the second metal layer 130, the second lead 352 located in the third metal layer 132, the orthographic projection of the organic insulating layers (31 and 33) on the base substrate 11 The orthographic projections of the binding area BB and the bending area CC on the base substrate 11 do not overlap.
  • the first lead 351 of the touch lead 35 located in the bending area CC is routed using the second metal layer 130, and the second lead of the touch lead 35 located in the binding area BB 352 uses the third metal layer 132 for wiring.
  • the binding area can be The organic insulating layer (31 and 33) of the fixed area BB and the bending area CC is removed with large grooves and a large area without affecting the connection relationship of the touch leads 35.
  • the bonding area BB undergoes the bonding process, peeling off of the organic insulating layers (31 and 33) caused by the high temperature environment can be avoided, thereby improving the yield of the display product.
  • the second lead 352 of the touch lead 35 located in the bonding area BB is routed using the third metal layer 132, thus directly realizing the bonding area BB and the bending area CC based on the narrow frame solution. A large area of the organic insulating layer (31 and 33) is removed, and there is no need to add a separate metal film layer to make the second lead 352 located in the bonding area BB.
  • the first metal layer 127 can be the SD1 layer
  • the second metal layer 130 can be the SD2 layer
  • the third metal layer 132 can be the SD3 layer; specifically, SD1
  • the layer is generally set with source, drain, data lines, etc.
  • the SD2 layer is generally set as the middle electrode that overlaps the anode layer and the drain.
  • the SD3 layer is the FIAA technology used in projects based on narrow bezel products. This technology will add a layer SD3 layer and the third planarization layer (described later).
  • the SD3 layer is mainly used for data signal wiring in the fan-out area (bonding area, bending area and transition area), that is, the data line of the SD1 layer is jumpered to the SD3 layer, this can reduce the area occupied by SD1 layer signal lines in the fan-out area, thereby achieving a narrow bezel design for the lower border.
  • the above display panel provided by the embodiment of the present disclosure also includes: a third metal layer 132 located between the third metal layer 132 and the touch structure 3 . a planarization layer 133, and a second planarization layer 131 located between the second metal layer 130 and the third metal layer 132;
  • the touch lead 35 also includes a third lead 353 located in the display area AA.
  • the third lead 353 is electrically connected to the first lead 351 through a via hole penetrating the first planarization layer 133 and the second planarization layer 131 .
  • the first lead 351 The second lead 352 is electrically connected through a via hole penetrating the second planarization layer 131 .
  • the above-mentioned display panel provided by the embodiment of the present disclosure also includes a transition area DD located between the display area AA and the bending area CC,
  • the third lead 353 extends to the transition region DD and is electrically connected to the first lead 351 through a via hole penetrating the first planarization layer 133 and the second planarization layer 131 .
  • Figures 7 and 8 are schematic top views of the binding area BB in Figure 1.
  • the display panel also includes: a third planarization layer located between the first metal layer 127 and the second metal layer 130. Layer 129, as well as the high-voltage power supply line VDD and the low-voltage power supply line VSS;
  • the high-voltage power line VDD includes a first conductive structure 51 and a second conductive structure 52 in the bonding area BB.
  • the first conductive structure 51 is located on the first metal layer 127 in FIG. 2
  • the second conductive structure 52 is located on the first metal layer 127 in FIG. 2 .
  • the two metal layers 130, the first conductive structure 51 and the second conductive structure 52 are electrically connected through via holes penetrating the third planarization layer 129; it should be noted that the binding area BB is provided with the first conductive structure 51 and the second conductive structure electrically connected.
  • the two conductive structures 52 are used to reduce the VDD resistance of the high-voltage power line.
  • the patterns of the first conductive structure 51 and the second conductive structure 52 are the same, and the first conductive structure 51 is covered by the pattern of the second conductive structure 52;
  • the low-voltage power line VSS includes a third conductive structure 53 and a fourth conductive structure 54 in the bonding area BB.
  • the third conductive structure 53 is located on the first metal layer 127 in FIG. 2 , and the third conductive structure 53 and the first conductive structure 51 are spaced apart, the fourth conductive structure 54 is located on the second metal layer 130 in FIG. 2, and the fourth conductive structure 54 is spaced apart from the second conductive structure 52.
  • the via holes of the planarization layer 129 are electrically connected; it should be noted that the third conductive structure 53 and the fourth conductive structure 54 that are electrically connected in the binding area BB are to reduce the VSS resistance of the low-voltage power line.
  • the conductive structure 53 and the fourth conductive structure 54 have the same pattern, and the third conductive structure 53 is covered by the pattern of the fourth conductive structure 54 .
  • the high-voltage power line VDD and the low-voltage power line VSS in the bonding area BB can only be provided with reduced resistance in the first metal layer 127 and the second metal layer 130
  • the conductive structure, and the second lead 352 of the touch lead 35 located in the bonding area BB is disposed on the third metal layer 132, and the third planarization layer 129 is disposed between the third metal layer 132 and the second metal layer 130. Therefore, The second lead 352 does not affect the design of the conductive structures of the high voltage power line VDD and the low voltage power line VSS.
  • the high-voltage power line VDD also includes a fifth conductive structure 55 in the binding area BB, and the fifth conductive structure 55 is located in FIG. 2
  • the third metal layer 132 and the fifth conductive structure 55 pass through the second planarization layer 131
  • the via holes are electrically connected to the second conductive structure 52; it should be noted that the bonding area BB is provided with the first conductive structure 51, the second conductive structure 52 and the fifth conductive structure 55 that are electrically connected in order to further reduce the high voltage.
  • the function of the power line VDD resistance, the patterns of the first conductive structure 51, the second conductive structure 52 and the fifth conductive structure 55 are the same, the first conductive structure 51 and the second conductive structure 52 are covered by the pattern of the fifth conductive structure 55;
  • the low-voltage power line VSS also includes a sixth conductive structure 56 in the binding area BB.
  • the sixth conductive structure 56 is located in the third metal layer 132 in FIG. 2.
  • the sixth conductive structure 56 is spaced apart from the fifth conductive structure 55.
  • the conductive structure 56 is electrically connected to the fourth conductive structure 54 through a via hole penetrating the second planarization layer 131; it should be noted that the binding area BB is provided with the third conductive structure 53, the fourth conductive structure 54 and the sixth conductive structure that are electrically connected.
  • the conductive structure 56 is to further reduce the VSS resistance of the low-voltage power line.
  • the third conductive structure 53 and the fourth conductive structure 54 have the same pattern.
  • the sixth conductive structure 56 covers part of the third conductive structure 53 and the fourth conductive structure. 54.
  • Figure 9 only shows the fifth conductive structure 55 and the sixth conductive structure 56 located on the third metal layer 132.
  • the first conductive structure 51, the second conductive structure 52, the third conductive structure 53 and the second conductive structure 52 are different from The pattern in Figure 7 is the same;
  • the second lead 352 is insulated from the fifth conductive structure 55 and the sixth conductive structure 56 so that the fifth conductive structure 55 , the sixth conductive structure 56 and the second lead 352 do not affect each other.
  • the sixth conductive structure 56 includes two sub-conductive structures (561 and 562) arranged at intervals, and the second lead 352 can be located on the two sub-conductive structures (561 and 562).
  • the orthographic projections between the conductive structures (561 and 562), that is, the second lead 352 and the two sub-conductive structures (561 and 562) on the base substrate 11 do not overlap with each other.
  • both sub-conductive structures are electrically connected to the fourth conductive structure 54.
  • the BB also includes a fifth conductive structure 55 located on the third metal layer 132.
  • the low-voltage power supply line VSS also includes a sixth conductive structure 56 located on the third metal layer 132 in the bonding area. This can further reduce the high-voltage power supply. Based on the resistance of the line VDD and the low-voltage power line VSS, the high-voltage power line VDD, the low-voltage power line VSS and the second lead 352 do not affect each other.
  • the organic insulating layers (31 and 33) include a stacked first organic insulating layer 31 and a second organic insulating layer 33, and the touch electrode layers (32 and 34) include layers located on the first organic insulating layer.
  • the third lead 353 includes an electrically connected first sub-lead 01 and a second sub-lead 02.
  • the first sub-lead 01 is located on the first touch electrode layer 32
  • the second sub-lead 02 is located on the second touch electrode layer 34.
  • the first sub-lead 01 is located on the second touch electrode layer 34.
  • the sub-lead 01 is electrically connected to the first lead 351 through a via hole penetrating the first planarization layer 133 and the second planarization layer 131 . In this way, the third lead 353 adopts double-layer metal wiring, which can reduce the resistance of the touch lead 35 .
  • the above-mentioned display panel provided by the embodiment of the present disclosure also includes a protective layer 4 located on the side of the second touch electrode layer 34 facing away from the base substrate 11 .
  • the protective layer The material of 4 is the same as the material of the organic insulating layer (31 and 33).
  • the orthographic projection of the protective layer 4 on the base substrate 11 covers the base substrate 11, and the protective layer 4 is in direct contact with the second lead 352.
  • the protective layer 4 can play a role in protecting the touch electrode located in the display area AA and the second lead 352 in the binding area BB, and can completely remove the first planarization layer 133 in the binding area BB and the bending area CC. , improve bending performance.
  • the above-mentioned display panel provided by the embodiment of the present disclosure also includes a protective layer 4 located on the side of the second touch electrode layer 34 facing away from the base substrate 11 .
  • the protective layer 4 is made of the same material as the organic insulating layer (31 and 33), the orthographic projection of the first planarization layer 133 on the base substrate 11 covers the base substrate 11, and the orthographic projection of the protective layer on the base substrate 11 is bound to The orthographic projections of the fixed area BB and the bending area CC on the base substrate do not overlap with each other. Since the material of the first planarization layer 133 can generally withstand high temperatures and is relatively stable, the relatively stable first planarization layer 133 can be directly used as the protective layer of the bonding area BB to further improve the yield of the display product.
  • Figures 5 and 6 of the embodiment of the present disclosure are only for illustrating that the first lead 351 of the touch lead 35 located in the bending area CC is routed using the second metal layer 130, and the first lead 351 located in the binding area BB is routed using the second metal layer 130.
  • the second lead 352 is routed using the third metal layer 132.
  • There is no touch structure in the binding area BB and the bending area CC so there is no organic insulating layer that is not resistant to high temperatures. That is, the binding area BB and the bending area can be
  • the organic insulating layer of CC has large grooves and can be removed over a large area to avoid peeling off of the organic insulating layer during bonding.
  • Figures 5 and 6 may also include other required film layers in the binding area BB and the bending area CC.
  • an embodiment of the present disclosure also provides a display device, including the above display panel provided by an embodiment of the present disclosure.
  • the display device can be: a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function.
  • a display device for the implementation of the display device, reference can be made to the above embodiment of the display panel, and repeated details will not be described again.
  • Embodiments of the present disclosure provide a display panel and a display device in which the first lead of the touch lead located in the bending area is routed using the second metal layer, and the second lead of the touch lead located in the binding area is routed using the third metal layer.
  • Three metal layer routing so that there is no touch structure in the binding area and the bending area, and there is no organic insulating layer that is not resistant to high temperatures. That is, large grooves can be made in the organic insulating layer in the binding area and the bending area. Large area removal will not affect the connection relationship of the touch leads. Therefore, when the bonding process is performed in the bonding area, the peeling off of the organic insulating layer caused by the high temperature environment can be avoided, thereby improving the yield of the display product.
  • the second lead of the touch lead located in the binding area is routed using the third metal layer, so that a large area of the organic insulating layer in the binding area and the bending area can be realized directly based on the narrow frame solution. Eliminate the need to add a separate metal film layer to make the second lead located in the binding area.

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Abstract

本公开实施例公开了一种显示面板及显示装置，通过将触控引线的位于弯折区的第一引线采用第二金属层走线，触控引线的位于绑定区的第二引线采用第三金属层走线，这样，绑定区和弯折区中均没有触控结构，也就没有不耐高温的有机绝缘层，即可以将绑定区和弯折区的有机绝缘层开大槽大面积去除，不会影响触控引线的连接关系。因此当绑定区进行绑定工艺时，就可以避免由于高温环境造成的有机绝缘层剥落的现象，从而可以提高显示产品的良率。

Description

显示面板及显示装置
相关申请的交叉引用
本公开要求在2022年06月23日提交中国专利局、申请号为202210723269.7、申请名称为“一种显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及触控显示技术领域，特别涉及一种显示面板及显示装置。
背景技术
随着电子产品的不断发展，AMOLED(Active Matrix Organic Light Emitting Diode，有源矩阵有机发光二极管)显示装置由于可以实现全面屏、窄边框、高分辨率、卷曲穿戴、折叠等，得到广泛应用。其中，直接在OLED(Organic Light Emitting Diode，有机发光二极管)显示面板的封装层上制作触控结构(Flexible Multi-Layer On Cell，FMLOC)的技术，能够制备更轻更薄的显示装置，且该技术可以应用于折叠及卷曲的OLED显示装置中。
发明内容
本公开实施例提供了一种显示面板及显示装置，用以解决相关技术中触控结构的有机绝缘层粘附力较弱，在绑定区容易发生Peeling现象的问题。
本公开实施例提供的一种显示面板，包括：显示区，位于所述显示区一侧的绑定区，以及位于所述显示区与所述绑定区之间的弯折区；
所述显示面板包括：
衬底基板；
第一金属层，位于所述衬底基板上；
第二金属层，位于所述第一金属层背离所述衬底基板的一侧；
第三金属层，位于所述第二金属层背离所述衬底基板的一侧；
触控结构，位于所述第三金属层背离所述衬底基板的一侧；所述触控结构包括层叠设置的有机绝缘层和触控电极层，以及包括与所述触控电极层电连接的触控引线，所述触控引线自所述显示区延伸至所述绑定区；其中，所述触控引线包括位于所述弯折区的第一引线以及位于所述绑定区的第二引线，所述第一引线位于所述第二金属层，所述第二引线位于所述第三金属层，所述有机绝缘层在所述衬底基板上的正投影与所述绑定区、所述弯折区在所述衬底基板上的正投影均不交叠。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第三金属层和所述触控结构之间的第一平坦化层，以及位于所述第二金属层和所述第三金属层之间的第二平坦化层；
所述触控引线还包括位于所述显示区的第三引线，所述第三引线通过贯穿所述第一平坦化层和所述第二平坦化层的过孔与所述第一引线电连接，所述第一引线通过贯穿所述第二平坦化层的过孔与所述第二引线电连接。
可选地，在本公开实施例提供的上述显示面板中，还包括位于所述显示区和所述弯折区之间的过渡区，所述第三引线延伸至所述过渡区通过贯穿所述第一平坦化层和所述第二平坦化层的过孔与所述第一引线电连接。
可选地，在本公开实施例提供的上述显示面板中，还包括：位于所述第一金属层和所述第二金属层之间的第三平坦化层，以及高电压电源线和低电压电源线；
所述高电压电源线在所述绑定区包括第一导电结构和第二导电结构，所述第一导电结构位于所述第一金属层，所述第二导电结构位于所述第二金属层，所述第一导电结构和所述第二导电结构通过贯穿所述第三平坦化层的过孔电连接；
所述低电压电源线在所述绑定区包括第三导电结构和第四导电结构，所述第三导电结构位于所述第一金属层，且所述第三导电结构与所述第一导电 结构间隔设置，所述第四导电结构位于所述第二金属层，且所述第四导电结构与所述第二导电结构间隔设置，所述第三导电结构和所述第四导电结构通过贯穿所述第三平坦化层的过孔电连接。
可选地，在本公开实施例提供的上述显示面板中，所述高电压电源线在所述绑定区还包括第五导电结构，所述第五导电结构位于所述第三金属层，所述第五导电结构通过贯穿所述第二平坦化层的过孔与所述第二导电结构电连接；
所述低电压电源线在所述绑定区还包括第六导电结构，所述第六导电结构位于所述第三金属层，所述第六导电结构与所述第五导电结构间隔设置，所述第六导电结构通过贯穿所述第二平坦化层的过孔与所述第四导电结构电连接；
所述第二引线与所述第五导电结构和所述第六导电结构相互绝缘。
可选地，在本公开实施例提供的上述显示面板中，所述第六导电结构包括间隔设置的两个子导电结构，所述第二引线位于两个所述子导电结构之间。
可选地，在本公开实施例提供的上述显示面板中，所述有机绝缘层包括层叠设置的第一有机绝缘层和第二有机绝缘层，所述触控电极层包括位于所述第一有机绝缘层和所述第二有机绝缘层之间的第一触控电极层以及位于所述第二有机绝缘层背离所述衬底基板一侧的第二触控电极层；
所述第三引线包括电连接的第一子引线和第二子引线，所述第一子引线位于所述第一触控电极层，所述第二子引线位于所述第二触控电极层，所述第一子引线通过贯穿所述第一平坦化层和所述第二平坦化层的过孔与所述第一引线电连接。
可选地，在本公开实施例提供的上述显示面板中，还包括位于所述第二触控电极层背离所述衬底基板一侧的保护层，所述保护层的材料与所述有机绝缘层的材料相同，所述保护层在所述衬底基板上的正投影覆盖所述衬底基板，且所述保护层与所述第二引线直接接触。
可选地，在本公开实施例提供的上述显示面板中，还包括位于所述第二 触控电极层背离所述衬底基板一侧的保护层，所述保护层的材料与所述有机绝缘层的材料相同，所述第一平坦化层在所述衬底基板上的正投影覆盖所述衬底基板，所述保护层在所述衬底基板上的正投影与所述绑定区和所述弯折区在所述衬底基板上的正投影互不交叠。
相应地，本公开实施例还提供了一种显示装置，包括本公开实施例提供的上述任一项所述的显示面板。
本公开实施例的有益效果如下：
本公开实施例提供的一种显示面板及显示装置，通过将触控引线的位于弯折区的第一引线采用第二金属层走线，触控引线的位于绑定区的第二引线采用第三金属层走线，这样，绑定区和弯折区中均没有触控结构，也就没有不耐高温的有机绝缘层，即可以将绑定区和弯折区的有机绝缘层开大槽大面积去除，不会影响触控引线的连接关系。因此当绑定区进行绑定工艺时，就可以避免由于高温环境造成的有机绝缘层剥落的现象，从而可以提高显示产品的良率。
附图说明
图1为本公开实施例提供的一种显示面板的俯视结构示意图；
图2为图1中一个子像素的截面结构示意图；
图3为图1中沿MM’方向的截面结构示意图；
图4为相关技术中沿图1中沿FF’方向的截面结构示意图；
图5为本公开实施例沿图1中沿FF’方向的一种截面结构示意图；
图6为本公开实施例沿图1中沿FF’方向的又一种截面结构示意图；
图7为VDD和VSS在绑定区的俯视结构示意图；
图8为VDD、VSS和第二引线在绑定区的一种俯视结构示意图；
图9为VDD、VSS和第二引线在绑定区的又一种俯视结构示意图。
具体实施方式
为了使本公开的目的，技术方案和优点更加清楚，下面结合附图，对本公开实施例提供的显示面板及显示装置的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本公开，并不用于限定本公开。并且在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。
附图中各层薄膜厚度、大小和形状不反映显示面板的真实比例，目的只是示意说明本公开内容。
如图1和图2所示，图1为OLED显示面板上设置触摸电极后的平面结构示意图，该显示面板包括：显示区AA，位于显示区AA一侧的绑定区BB，以及位于显示区AA与绑定区BB之间的弯折区CC；显示区AA一般包括多个发光子像素。如图2所示，图2为图1中沿一个发光子像素的截面示意图，该显示面板包括显示基板1、用于封装显示基板1的封装层2、位于封装层2上的触控结构3以及位于触控结构3上的保护层4(有机绝缘层)。其中，封装层2可以包括层叠设置在显示基板1上的第一无机层21、有机层22和第二无机层23。触控结构3可以直接制作在封装层2上，这种技术称为FMLOC的技术，利用FMLOC技术能够制备更轻更薄的触控面板，且该技术可以应用于折叠及卷曲的OLED显示装置中。
如图2所示，显示基板1包括衬底基板11，以及位于衬底基板11上层叠设置的驱动电路12和发光器件层13。可选地，衬底基板11可包括依次层叠设置的聚酰亚胺层111和缓冲层112；驱动电路12可包括依次层叠设置在衬底基板11上的有源层121、第一栅绝缘层122、第一栅极金属层123、第二栅绝缘层124、第二栅极金属层125、层间介质层126、第一金属层127(第一Source Drain金属层，简称SD1)、钝化层128、第一平坦化层133、第二金属层130(第二Source Drain金属层，简称SD2)、第二平坦化层131、第三金属层132(第三Source Drain金属层，简称SD3)以及第三平坦化层129；发光器件层13可包括依次层叠设置在驱动电路12上的阳极层134、像素界定层 135、发光功能层136以及阴极层137。其中，阳极层134可通过第二金属层130与第一金属层127电连接。
具体地，第一金属层127一般设置源极、漏极、数据线等，第二金属层130一般设置作为搭接阳极层134和漏极的中间电极，第三金属层132是基于窄边框产品的项目使用的FIAA技术，这种技术会增加一层第三金属层132和第三平坦化层129，其第三金属层132主要用于扇出区域(Fanout)的数据信号拉线，以实现下边框的窄边框设计。
如图1和图2所示，在显示面板的封装层2上形成触控结构3，触控结构3包括层叠设置的第一有机绝缘层31、第一触控电极层32、第二有机绝缘层33和第二触控电极层34。可选地，如图1和图3所示，图3为图1中沿MM’方向的截面示意图，第一触控电极层32可包括多个桥接电极321，第二触控电极层34可包括多个触摸电极341，其中一部分触摸电极341通过位于第二触控电极层34的连接部342直接电连接，另一部分触摸电极341通过位于第一触控电极层32的桥接电极321电连接，实现获得Tx触摸电极和Rx触摸电极。
如图1所示，触控结构3还包括与触摸电极341电连接的触控引线35，触控引线35自显示区AA延伸至绑定区BB。如图4所示，图4为相关技术中触控引线35沿图1中FF’方向的截面示意图，该触控引线35的位于显示区AA的部分一般采用双层金属走线(位于第一触控电极层32和第二触控电极层34的双层走线，这两层走线电连接，以降低电阻)，触控引线35的位于弯折区CC的部分一般跳线至第二金属层130，触控引线35的位于绑定区BB的部分又跳线至第一触控电极层32和第二触控电极层34，即触控引线35的位于绑定区BB的部分又采用双层走线(位于第一触控电极层32和第二触控电极层34的双层走线，这两层走线电连接，以降低电阻)。第一触控电极层32下方、第一触控电极层32和第二触控电极层34之间以及第二触控电极层34上方均设置有机绝缘层(31、33和4)，由于触控结构3的制备工艺是在封装工艺之后进行的，封装层2的材料不耐高温，因此触控结构3的制备工艺 只能在低温环境下进行，例如，只能采用85℃低温工艺，而目前可以适应低温工艺的有机绝缘层材料是负性光学胶。因此有机绝缘层(31、33和4)的材料是低温负性光学胶。然而，在制备外触控结构3后，进行绑定工艺时，需要采用高温工艺，例如可达170℃的高温，因此在绑定过程中绑定区BB的温度较高，低温负性光学胶的粘附力较弱，这样处于绑定区BB中不耐高温的有机绝缘层(31、33和4)会在高温作用以及压制过程中剥落(peeling)现象，大大降低了显示产品的良率。
为了解决上述技术问题，本公开实施例提供了一种显示面板，如图1-图3、图5和图6所示，图5和图6为本公开实施例提供的触控引线35沿图1中FF’方向的截面示意图，该显示面板包括：显示区AA，位于显示区AA一侧的绑定区BB，以及位于显示区AA与绑定区BB之间的弯折区CC；
该显示面板包括：
衬底基板11；
第一金属层127，位于衬底基板11上；
第二金属层130，位于第一金属层127背离衬底基板11的一侧；
第三金属层132，位于第二金属层130背离衬底基板11的一侧；
触控结构3，位于第三金属层132背离衬底基板11的一侧；触控结构3包括层叠设置的有机绝缘层(31和33)和触控电极层(32和34)，以及包括与触控电极层(32和34)电连接的触控引线35，触控引线35自显示区AA延伸至绑定区BB；其中，触控引线35包括位于弯折区CC的第一引线351以及位于绑定区BB的第二引线352，第一引线351位于第二金属层130，第二引线352位于第三金属层132，有机绝缘层(31和33)在衬底基板11上的正投影与绑定区BB、弯折区CC在衬底基板11上的正投影均不交叠。
本公开实施例提供的上述显示面板，通过将触控引线35的位于弯折区CC的第一引线351采用第二金属层130走线，触控引线35的位于绑定区BB的第二引线352采用第三金属层132走线，这样，绑定区BB和弯折区CC中均没有触控结构3，也就没有不耐高温的有机绝缘层(31和33)，即可以将绑 定区BB和弯折区CC的有机绝缘层(31和33)开大槽大面积去除，不会影响触控引线35的连接关系。因此当绑定区BB进行绑定工艺时，就可以避免由于高温环境造成的有机绝缘层(31和33)剥落的现象，从而可以提高显示产品的良率。另外，本公开实施例将触控引线35的位于绑定区BB的第二引线352采用第三金属层132走线，这样直接在窄边框方案的基础上实现绑定区BB和弯折区CC的有机绝缘层(31和33)大面积去除，不用单独增加金属膜层制作位于绑定区BB的第二引线352。
可选地，如图2、图5和图6所示，第一金属层127可以为SD1层，第二金属层130可以为SD2层，第三金属层132可以为SD3层；具体地，SD1层一般设置源极、漏极、数据线等，SD2层一般设置作为搭接阳极层和漏极的中间电极，SD3层是基于窄边框产品的项目使用的FIAA技术，这种技术会增加一层SD3层和第三平坦化层(后续介绍)，SD3层主要用于扇出区域(绑定区、弯折区和过渡区)的数据信号拉线，即将SD1层的数据线通过过孔跳线至SD3层，这样可以减少SD1层信号线在扇出区域的占用面积，从而实现下边框的窄边框设计。
在具体实施时，在本公开实施例提供的上述显示面板中，如图1、图2、图5和图6所示，还包括：位于第三金属层132和触控结构3之间的第一平坦化层133，以及位于第二金属层130和第三金属层132之间的第二平坦化层131；
触控引线35还包括位于显示区AA的第三引线353，第三引线353通过贯穿第一平坦化层133和第二平坦化层131的过孔与第一引线351电连接，第一引线351通过贯穿第二平坦化层131的过孔与第二引线352电连接。
在具体实施时，在本公开实施例提供的上述显示面板中，如图1、图2、图5和图6所示，还包括位于显示区AA和弯折区CC之间的过渡区DD，第三引线353延伸至过渡区DD通过贯穿第一平坦化层133和第二平坦化层131的过孔与第一引线351电连接。
在具体实施时，在本公开实施例提供的上述显示面板中，如图1、图2、 图7和图8所示，图7和图8为图1中绑定区BB的俯视示意图，该显示面板还包括：位于第一金属层127和第二金属层130之间的第三平坦化层129，以及高电压电源线VDD和低电压电源线VSS；
高电压电源线VDD在绑定区BB包括第一导电结构51和第二导电结构52，第一导电结构51位于图2中的第一金属层127，第二导电结构52位于图2中的第二金属层130，第一导电结构51和第二导电结构52通过贯穿第三平坦化层129的过孔电连接；需要说明的是，绑定区BB设置电连接的第一导电结构51和第二导电结构52是为了起到降低高电压电源线VDD电阻的作用，第一导电结构51和第二导电结构52的图案相同，第一导电结构51被第二导电结构52的图案覆盖；
低电压电源线VSS在绑定区BB包括第三导电结构53和第四导电结构54，第三导电结构53位于图2中的第一金属层127，且第三导电结构53与第一导电结构51间隔设置，第四导电结构54位于图2中的第二金属层130，且第四导电结构54与第二导电结构52间隔设置，第三导电结构53和第四导电结构54通过贯穿第三平坦化层129的过孔电连接；需要说明的是，绑定区BB设置电连接的第三导电结构53和第四导电结构54是为了起到降低低电压电源线VSS电阻的作用，第三导电结构53和第四导电结构54的图案相同，第三导电结构53被第四导电结构54的图案覆盖。
具体地，如图7和图8所示，本公开实施例的高电压电源线VDD和低电压电源线VSS在绑定区BB可以仅在第一金属层127和第二金属层130设置降低电阻的导电结构，而触控引线35位于绑定区BB的第二引线352设置在第三金属层132上，第三金属层132和第二金属层130之间设置第三平坦化层129，因此第二引线352不会影响高电压电源线VDD和低电压电源线VSS的导电结构的设计。
在具体实施时，在本公开实施例提供的上述显示面板中，如图9所示，高电压电源线VDD在绑定区BB还包括第五导电结构55，第五导电结构55位于图2中的第三金属层132，第五导电结构55通过贯穿第二平坦化层131 的过孔与第二导电结构52电连接；需要说明的是，绑定区BB设置电连接的第一导电结构51、第二导电结构52和第五导电结构55是为了起到进一步降低高电压电源线VDD电阻的作用，第一导电结构51、第二导电结构52和第五导电结构55的图案相同，第一导电结构51和第二导电结构52被第五导电结构55的图案覆盖；
低电压电源线VSS在绑定区BB还包括第六导电结构56，第六导电结构56位于图2中的第三金属层132，第六导电结构56与第五导电结构55间隔设置，第六导电结构56通过贯穿第二平坦化层131的过孔与第四导电结构54电连接；需要说明的是，绑定区BB设置电连接的第三导电结构53、第四导电结构54和第六导电结构56是为了起到进一步降低低电压电源线VSS电阻的作用，第三导电结构53和第四导电结构54的图案相同，第六导电结构56覆盖部分第三导电结构53和第四导电结构54，图9仅示出位于第三金属层132的第五导电结构55和第六导电结构56，第一导电结构51、第二导电结构52、第三导电结构53和第二导电结构52与图7的图案相同；
第二引线352与第五导电结构55和第六导电结构56相互绝缘，这样第五导电结构55、第六导电结构56和第二引线352可以互不影响。
在具体实施时，在本公开实施例提供的上述显示面板中，如图9所示，第六导电结构56包括间隔设置的两个子导电结构(561和562)，第二引线352可以位于两个子导电结构之间(561和562)，即第二引线352与两个子导电结构(561和562)在衬底基板11上的正投影互不交叠。具体地，两个子导电结构均与第四导电结构54电连接，通过将触控引线35位于绑定区BB的第二引线352设置在第三金属层132，高电压电源线VDD在绑定区BB还包括位于第三金属层132的第五导电结构55，低电压电源线VSS在绑定区BB还包括位于第三金属层132的第六导电结构56，这样可以在实现进一步降低高电压电源线VDD和低电压电源线VSS的电阻的基础上，高电压电源线VDD、低电压电源线VSS和第二引线352互不影响。
在具体实施时，在本公开实施例提供的上述显示面板中，如图1、图2、 图5和图6所示，有机绝缘层(31和33)包括层叠设置的第一有机绝缘层31和第二有机绝缘层33，触控电极层(32和34)包括位于第一有机绝缘层31和第二有机绝缘层33之间的第一触控电极层32以及位于第二有机绝缘层33背离衬底基板11一侧的第二触控电极层34；
第三引线353包括电连接的第一子引线01和第二子引线02，第一子引线01位于第一触控电极层32，第二子引线02位于第二触控电极层34，第一子引线01通过贯穿第一平坦化层133和第二平坦化层131的过孔与第一引线351电连接。这样第三引线353采用双层金属走线，可以降低触控引线35的电阻。
在具体实施时，在本公开实施例提供的上述显示面板中，如图2和图6所示，还包括位于第二触控电极层34背离衬底基板11一侧的保护层4，保护层4的材料与有机绝缘层(31和33)的材料相同，保护层4在衬底基板11上的正投影覆盖衬底基板11，且保护层4与第二引线352直接接触。这样保护层4可以起到保护位于显示区AA的触摸电极以及保护绑定区BB的第二引线352的作用，并且可以将绑定区BB和弯折区CC的第一平坦化层133完全去除，提高弯折性能。
在具体实施时，在本公开实施例提供的上述显示面板中，如图2和图5所示，还包括位于第二触控电极层34背离衬底基板11一侧的保护层4，保护层4的材料与有机绝缘层(31和33)的材料相同，第一平坦化层133在衬底基板11上的正投影覆盖衬底基板11，保护层在衬底基板11上的正投影与绑定区BB和弯折区CC在衬底基板上的正投影互不交叠。由于第一平坦化层133的材料一般可以承受高温，较稳定，因此可以直接采用较稳定的第一平坦化层133作为绑定区BB的保护层，进一步提高显示产品的良率。
需要说明的是，本公开实施例的图5和图6仅是为了说明触控引线35的位于弯折区CC的第一引线351采用第二金属层130走线，位于绑定区BB的第二引线352采用第三金属层132走线，绑定区BB和弯折区CC中均没有触控结构，也就没有不耐高温的有机绝缘层，即可以将绑定区BB和弯折区CC的有机绝缘层开大槽大面积去除，避免绑定时有机绝缘层剥落的现象。当然， 图5和图6在绑定区BB和弯折区CC还可以包括其它需要的膜层。
基于同一发明构思，本公开实施例还提供了一种显示装置，包括本公开实施例提供的上述显示面板。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述显示面板的实施例，重复之处不再赘述。
本公开实施例提供的一种显示面板及显示装置，通过将触控引线的位于弯折区的第一引线采用第二金属层走线，触控引线的位于绑定区的第二引线采用第三金属层走线，这样，绑定区和弯折区中均没有触控结构，也就没有不耐高温的有机绝缘层，即可以将绑定区和弯折区的有机绝缘层开大槽大面积去除，不会影响触控引线的连接关系。因此当绑定区进行绑定工艺时，就可以避免由于高温环境造成的有机绝缘层剥落的现象，从而可以提高显示产品的良率。另外，本公开实施例将触控引线的位于绑定区的第二引线采用第三金属层走线，这样直接在窄边框方案的基础上实现绑定区和弯折区的有机绝缘层大面积去除，不用单独增加金属膜层制作位于绑定区的第二引线。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (10)

  1. 一种显示面板，其中，包括：显示区，位于所述显示区一侧的绑定区，以及位于所述显示区与所述绑定区之间的弯折区；
    所述显示面板包括：
    衬底基板；
    第一金属层，位于所述衬底基板上；
    第二金属层，位于所述第一金属层背离所述衬底基板的一侧；
    第三金属层，位于所述第二金属层背离所述衬底基板的一侧；
    触控结构，位于所述第三金属层背离所述衬底基板的一侧；所述触控结构包括层叠设置的有机绝缘层和触控电极层，以及包括与所述触控电极层电连接的触控引线，所述触控引线自所述显示区延伸至所述绑定区；其中，所述触控引线包括位于所述弯折区的第一引线以及位于所述绑定区的第二引线，所述第一引线位于所述第二金属层，所述第二引线位于所述第三金属层，所述有机绝缘层在所述衬底基板上的正投影与所述绑定区、所述弯折区在所述衬底基板上的正投影均不交叠。
  2. 根据权利要求1所述的显示面板，其中，还包括：位于所述第三金属层和所述触控结构之间的第一平坦化层，以及位于所述第二金属层和所述第三金属层之间的第二平坦化层；
    所述触控引线还包括位于所述显示区的第三引线，所述第三引线通过贯穿所述第一平坦化层和所述第二平坦化层的过孔与所述第一引线电连接，所述第一引线通过贯穿所述第二平坦化层的过孔与所述第二引线电连接。
  3. 根据权利要求2所述的显示面板，其中，还包括位于所述显示区和所述弯折区之间的过渡区，所述第三引线延伸至所述过渡区通过贯穿所述第一平坦化层和所述第二平坦化层的过孔与所述第一引线电连接。
  4. 根据权利要求3所述的显示面板，其中，还包括：位于所述第一金属层和所述第二金属层之间的第三平坦化层，以及高电压电源线和低电压电源 线；
    所述高电压电源线在所述绑定区包括第一导电结构和第二导电结构，所述第一导电结构位于所述第一金属层，所述第二导电结构位于所述第二金属层，所述第一导电结构和所述第二导电结构通过贯穿所述第三平坦化层的过孔电连接；
    所述低电压电源线在所述绑定区包括第三导电结构和第四导电结构，所述第三导电结构位于所述第一金属层，且所述第三导电结构与所述第一导电结构间隔设置，所述第四导电结构位于所述第二金属层，且所述第四导电结构与所述第二导电结构间隔设置，所述第三导电结构和所述第四导电结构通过贯穿所述第三平坦化层的过孔电连接。
  5. 根据权利要求4所述的显示面板，其中，所述高电压电源线在所述绑定区还包括第五导电结构，所述第五导电结构位于所述第三金属层，所述第五导电结构通过贯穿所述第二平坦化层的过孔与所述第二导电结构电连接；
    所述低电压电源线在所述绑定区还包括第六导电结构，所述第六导电结构位于所述第三金属层，所述第六导电结构与所述第五导电结构间隔设置，所述第六导电结构通过贯穿所述第二平坦化层的过孔与所述第四导电结构电连接；
    所述第二引线与所述第五导电结构和所述第六导电结构相互绝缘。
  6. 根据权利要求5所述的显示面板，其中，所述第六导电结构包括间隔设置的两个子导电结构，所述第二引线位于两个所述子导电结构之间。
  7. 根据权利要求2-6任一项所述的显示面板，其中，所述有机绝缘层包括层叠设置的第一有机绝缘层和第二有机绝缘层，所述触控电极层包括位于所述第一有机绝缘层和所述第二有机绝缘层之间的第一触控电极层以及位于所述第二有机绝缘层背离所述衬底基板一侧的第二触控电极层；
    所述第三引线包括电连接的第一子引线和第二子引线，所述第一子引线位于所述第一触控电极层，所述第二子引线位于所述第二触控电极层，所述第一子引线通过贯穿所述第一平坦化层和所述第二平坦化层的过孔与所述第 一引线电连接。
  8. 根据权利要求7所述的显示面板，其中，还包括位于所述第二触控电极层背离所述衬底基板一侧的保护层，所述保护层的材料与所述有机绝缘层的材料相同，所述保护层在所述衬底基板上的正投影覆盖所述衬底基板，且所述保护层与所述第二引线直接接触。
  9. 根据权利要求7所述的显示面板，其中，还包括位于所述第二触控电极层背离所述衬底基板一侧的保护层，所述保护层的材料与所述有机绝缘层的材料相同，所述第一平坦化层在所述衬底基板上的正投影覆盖所述衬底基板，所述保护层在所述衬底基板上的正投影与所述绑定区和所述弯折区在所述衬底基板上的正投影互不交叠。
  10. 一种显示装置，其中，包括根据权利要求1-9任一项所述的显示面板。
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