WO2023202676A1 - 功率模块和电机控制器 - Google Patents

功率模块和电机控制器 Download PDF

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Publication number
WO2023202676A1
WO2023202676A1 PCT/CN2023/089567 CN2023089567W WO2023202676A1 WO 2023202676 A1 WO2023202676 A1 WO 2023202676A1 CN 2023089567 W CN2023089567 W CN 2023089567W WO 2023202676 A1 WO2023202676 A1 WO 2023202676A1
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WO
WIPO (PCT)
Prior art keywords
conductive
conductive sheet
input terminal
patch
sheet
Prior art date
Application number
PCT/CN2023/089567
Other languages
English (en)
French (fr)
Inventor
曹玉昭
吴小鹏
张太之
李剑垒
何友东
Original Assignee
苏州汇川联合动力系统股份有限公司
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Publication of WO2023202676A1 publication Critical patent/WO2023202676A1/zh

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
    • H02P6/08—Arrangements for controlling the speed or torque of a single motor
    • H02P6/085—Arrangements for controlling the speed or torque of a single motor in a bridge configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present application relates to the technical field of power electronic devices, and in particular to a power module and a motor controller.
  • the main purpose of this application is to provide a power module, aiming to solve the problem of low reliability of power devices in the power module.
  • a power module which includes:
  • At least one second DC input terminal the second DC input terminal having an opposite polarity to the first DC input terminal
  • An insulating substrate having a conductive layer on the first surface of the insulating substrate, the conductive layer being connected to the input electrode or the output electrode of the power device;
  • a conductive patch is connected to the corresponding input electrode or output electrode of the power device along the first preset direction;
  • the first DC input terminals with the same polarity are connected at the input side relative to the power device.
  • the number of the first DC input terminals is greater than that of the second DC input terminals, and a plurality of the first DC input terminals are distributed on both sides of the second DC input terminal.
  • the first DC input terminal includes a first sub-DC input terminal and a second sub-DC input terminal
  • the conductive layer includes a first conductive sheet, a second conductive sheet, a third conductive sheet and a third conductive sheet.
  • the first conductive sheet is connected to the first sub-DC input terminal
  • the second conductive sheet is connected to the second sub-DC input terminal
  • the third conductive sheet is connected to the second DC input terminal.
  • the conductive patch includes a first conductive patch and a second conductive patch, the first conductive patch is connected to the fourth conductive patch, and the second conductive patch is connected to the third conductive patch connect.
  • the first conductive sheet is connected to the second conductive sheet, and the second DC input terminal is disposed across the connecting portion of the first conductive sheet and the second conductive sheet.
  • the first conductive sheet and the second conductive sheet are connected through a connecting member, and the connecting member is disposed across the third conductive sheet.
  • the first conductive sheet and the second conductive sheet have tabs arranged oppositely, and the connecting member is connected to the tabs.
  • the first conductive sheet and the second conductive sheet are connected through a connector; the conductive layer further includes a tenth conductive sheet, and the connector is also connected to the tenth conductive sheet.
  • the first conductive sheet and the second conductive sheet are connected through a connector; the conductive layer further includes a tenth conductive sheet, and a pad is provided on the bottom surface of the tenth conductive sheet.
  • the connecting piece is connected to the tenth conductive piece.
  • the first DC input terminal includes a first sub-DC input terminal and a second sub-DC input terminal
  • the conductive layer includes a first conductive sheet, a second conductive sheet, a third conductive sheet, and a third conductive sheet. the fourth conductive piece and the seventh conductive piece;
  • the first conductive sheet is connected to the first sub-DC input terminal
  • the second conductive sheet is connected to the second sub-DC input terminal
  • the first conductive sheet is connected to the second conductive sheet
  • the third conductive patch is connected to the second DC input terminal
  • the conductive patch includes a first conductive patch and a second conductive patch
  • the first conductive patch is connected to the fourth conductive patch
  • the second conductive patch is connected to the seventh conductive sheet
  • the third conductive sheet and the seventh conductive sheet are connected through a connecting member, and the connecting member spans the first conductive sheet and the The connecting part of the second conductive piece.
  • the first DC input terminal includes a first sub-DC input terminal and a second sub-DC input terminal
  • the conductive layer includes a first conductive sheet, a second conductive sheet, a third conductive sheet, and a third conductive sheet.
  • the first conductive sheet is connected to the first sub-DC input terminal
  • the second conductive sheet is connected to the second sub-DC input terminal
  • the third conductive sheet is connected to the second DC input terminal.
  • some of the power devices are connected to the fifth conductive sheet
  • some of the power devices are connected to the sixth conductive sheet
  • the rest of the power devices are connected to the eighth conductive sheet
  • the conductive patch includes A first conductive patch and a second conductive patch.
  • the first conductive patch is connected to the third conductive patch.
  • the second conductive patch is connected to the fourth conductive patch.
  • the first conductive patch is connected to the fourth conductive patch.
  • the second conductive sheet is connected to the eighth conductive sheet.
  • the first conductive sheet, the second conductive sheet and the eighth conductive sheet are connected to each other, and the second DC input end spans the first conductive sheet, the second conductive sheet The portion connected to the eighth conductive sheet is provided.
  • the first conductive sheet and the second conductive sheet are respectively connected to the eighth conductive sheet.
  • the first conductive sheet and the second conductive sheet are connected to the eighth conductive sheet through a metal plate or a connector.
  • the first DC input terminal includes a first sub-DC input terminal and a second sub-DC input terminal
  • the conductive layer includes a first conductive sheet, a second conductive sheet, a third conductive sheet, and a third conductive sheet.
  • the first conductive sheet is connected to the first sub-DC input terminal
  • the second conductive sheet is connected to the second sub-DC input terminal
  • the third conductive sheet is connected to the second DC input terminal.
  • some of the power devices are connected to the fifth conductive sheet
  • some of the power devices are connected to the sixth conductive sheet
  • the rest of the power devices are connected to the eighth conductive sheet
  • the conductive patch includes A first conductive patch and a second conductive patch.
  • the first conductive patch is connected to the ninth conductive patch and the eleventh conductive patch.
  • the second conductive patch is connected to the fourth conductive patch.
  • the third conductive sheet is connected to the ninth conductive sheet and the eleventh conductive sheet respectively, and the first conductive sheet and the second conductive sheet are connected to the eighth conductive sheet.
  • the third conductive sheet, the ninth conductive sheet, and the eleventh conductive sheet are connected through connectors, wherein the connection between the third conductive sheet and the ninth conductive sheet
  • the connecting member spans the portion connecting the first conductive sheet and the eighth conductive sheet
  • the connecting member connecting the third conductive sheet and the eleventh conductive sheet spans the second conductive sheet and the eighth conductive sheet.
  • the first DC input terminal includes a first sub-DC input terminal and a second sub-DC input terminal
  • the conductive layer includes a third conductive sheet, a fourth conductive sheet, a fifth conductive sheet, and a third conductive sheet.
  • the first sub-DC input terminal and the second sub-DC input terminal are respectively connected to the eighth conductive sheet
  • the third conductive sheet is connected to the second DC input terminal
  • some of the power devices are connected to the eighth conductive sheet.
  • the fifth conductive sheet is connected, some of the power devices are connected to the sixth conductive sheet, and the remaining power devices are connected to the eighth conductive sheet
  • the conductive patch includes a first conductive patch and a second conductive patch. patch, the first conductive patch is connected to the third conductive patch, and the second conductive patch is connected to the fourth conductive patch.
  • the eighth conductive sheet is provided with a boss, and the first sub-DC input terminal and the second sub-DC input terminal are respectively connected to the corresponding bosses.
  • the first conductive patch is connected to the third conductive patch across the boss.
  • the connecting member is a binding wire or a metal strip.
  • This application also proposes a motor controller, which includes the above-mentioned power module.
  • the technical solution of this application uses multiple first DC input terminals with the same polarity, at least one second DC input terminal, multiple power devices, insulating substrates, conductive patches and AC output terminals, and by The first DC input end is connected at the input side relative to the power device, so that the input electrodes or output electrodes of multiple power devices can have the same potential, and uneven current flow will not occur due to different potentials, thus reducing the It reduces the probability of overheating failure of power devices and effectively enhances the reliability of power devices, thus solving the problem of low reliability of power devices in power module packaging.
  • Figure 1 is a schematic structural diagram of an embodiment of the power module of the present application.
  • FIG. 2 is a schematic structural diagram of another embodiment of the power module of the present application.
  • FIG. 3 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 4 is a schematic structural diagram of another embodiment of the power module of the present application.
  • FIG. 5 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 6 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 7 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 8 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 9 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 10 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 11 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 12 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 13 is a schematic structural diagram of another embodiment of the power module of the present application.
  • Figure 14 is a schematic structural diagram of another embodiment of the power module of the present application.
  • This application proposes a power module that can be used in motor controllers.
  • the power module usually includes: an insulating substrate, multiple power devices, conductive sheets, DC input terminals and AC output terminals.
  • the insulating substrate has a first surface and a second surface arranged oppositely, and the first surface of the insulating substrate has a first conductive layer; a plurality of power devices are arranged on the first surface of the insulating substrate along a preset direction, and a part of the power
  • the input electrode of the device is connected to the first conductive layer, and the output electrodes of the remaining power devices are connected to the first conductive layer;
  • the conductive sheet is connected to the input electrode or output electrode of the corresponding power device along the same preset direction;
  • the DC input terminal It is connected with the first conductive layer to input DC power to the power device; the AC output end is connected to the first conductive layer and outputs AC power through the power device.
  • the multiple DC input terminals (DC+ terminal, DC- terminal) of the power module need to be externally connected to the capacitor device. Due to the different number and position of the capacitive cores of the capacitor device, As a result, multiple DC+ terminals or multiple DC- terminals in the power module are at different potentials, resulting in uneven current flow in the internal parallel power devices connected to them, which in turn increases the probability of overheating and failure of power devices with large currents flowing through them. Large, affecting the reliability of power devices.
  • the power module includes:
  • the insulating substrate 30 has a conductive layer on the first surface of the insulating substrate 30, and the conductive layer is connected to the input of the power device IC. Electrode or output electrode connection;
  • Conductive patch 40 which is connected to the corresponding input electrode or output electrode of the power device IC along a first preset direction;
  • the AC output terminal 50 is connected to the conductive layer
  • each first DC input terminal 10 with the same polarity is connected at the input side relative to the power device IC.
  • each of the first DC input terminals 10 , each of the second DC input terminals 20 and the AC output terminal 50 can be realized by using conductive metal sheets such as copper sheets that are integrally stamped and have a leadframe function.
  • One end of each first DC input terminal 10 and each second DC input terminal 20 can be connected to the insulating substrate 30, and the other end can pass through the packaging structure of the power module and be connected to the DC voltage bus in the motor controller for connection.
  • the second DC input terminal 20 When the first DC input terminal 10 is of positive polarity, the second DC input terminal 20 is of negative polarity; when the first DC input terminal 10 is of negative polarity. , the second DC input terminal 20 is of positive polarity.
  • One end of the AC output terminal 50 can be connected to the insulating substrate 30 to receive the AC power output from the inverter circuit on the insulating substrate 30 and output it to the AC voltage bus.
  • the power device IC can be a patch type or a bare die wafer.
  • the power device IC can be electrically connected to the conductive sheet through welding or bonding methods such as solder F, conductive glue, ultrasound, sintering, etc.
  • Each power device IC can be one or more combinations of gallium nitride GaN power switch tubes, Si-based power switch tubes or SiC-based power switch tubes, MOS tubes, HEMT tubes, etc.
  • the number of power device ICs may be two or more, such as three, four, six, eight, etc. Multiple power device ICs are arranged in parallel to form a half-bridge switch. It can be understood that each power device IC has an input electrode and an output electrode.
  • the input electrode and output electrode of the power device IC are also different.
  • the input electrode is the drain.
  • the output electrode is the source; when implemented using IGBT, the input electrode is the collector and the output electrode is the emitter.
  • the insulating substrate 30 may be a direct copper-plated ceramic substrate DBC substrate, a direct copper-plated ceramic substrate DPC substrate, or an AMB substrate.
  • the insulating substrate 30 has two opposite surfaces.
  • the surface provided with the conductive layer may be a first surface, and the other surface may be a second surface.
  • the second surface may be provided with a twelfth conductive sheet.
  • the conductive layer can be used as a mounting carrier for the power device IC, so that the input electrode or output electrode of the corresponding power device IC can be welded thereon; the second surface can have a copper foil.
  • the conductive patch 40 can be implemented using binding wires, metal strips or copper strips, also known as copper clips.
  • the first preset direction may be the extension direction of each group of upper bridge switches or each group of lower bridge switches in the multiple power devices.
  • the conductive patch 40 may be connected to the corresponding power device through welding, solder or silver sintering.
  • the input electrode or output motor of the IC is connected, and can also be connected to the conductive layer through ultrasonic bonding, solder or silver sintering, so that in cooperation with the conductive layer, multiple power device ICs on the insulating substrate 30 can form a preset inverter Circuit topology; wherein, the preset inverter circuit topology may be a half-bridge circuit topology or a full-bridge circuit topology.
  • each first DC input terminal 10 the input sides of each first DC input terminal 10 are connected to each other, so that when the potential of each first DC input terminal 10 is constant, the first DC input terminal 10 with a higher potential can generate a balanced current. It flows to each first DC input terminal 10 with a lower potential to raise the potential of each first DC input terminal 10 with a lower potential, thereby achieving the purpose of having the same potential of each first DC input terminal 10 .
  • the solution of this application can be realized by directly connecting each first DC input terminal 10 through flying wires, connector L1, metal strip or copper clip; Or a copper Clip can be used to connect each first DC input terminal 10 to the conductive sheet where the conductive layer welding point is located to realize the solution of the present application; alternatively, some of the first DC input terminals 10 can be directly connected, and the remaining parts of the third The welding position of the DC input terminal 10 is connected to the conductive sheets to realize the solution of the present application, which is not limited here.
  • Such an arrangement allows the input electrodes or output electrodes of multiple power device ICs to have the same potential, without causing uneven current flow due to different potentials. This reduces the probability of overheating failure of the power device IC and effectively enhances the reliability of the power device IC. characteristics, thus solving the problem of low reliability of power device ICs in power module packaging.
  • the number of the first DC input terminals 10 is greater than that of the second DC input terminals 20 , and a plurality of the first DC input terminals 10 are distributed in Both sides of the second DC input terminal 20 .
  • the number of the first DC input terminals 10 is at least two, and the number of the second DC input terminals 20 is at least one.
  • the specific number of the first DC input terminal 10 and the second DC input terminal 20 can be determined according to the number of preset inverter circuit topologies composed of multiple power device ICs. For example, when the number of preset inverter circuit topologies composed of multiple power device ICs is When there are two channels, the number of the first DC input terminals 10 may be two, and the number of the second DC input terminals 20 may be one; when the number of the preset inverter circuit topology is three channels, the number of the first DC input terminals 20 may be one.
  • the number of terminals 10 may be three, and the number of second DC input terminals 20 may be one or two, which is not limited here.
  • the number of the first DC input terminals 10 is two, and the polarity is positive polarity; the number of the second DC input terminal 20 is one, and the polarity is negative polarity, as an example.
  • the solution of the present application arranges a smaller number of second DC input terminals 20 closer to the middle, so that the power device ICs connected to each second DC input terminal 20 can be centrally located close to the middle area of the insulating substrate 30 for use with
  • the power device ICs connected to each first DC input terminal 10 can be disposed close to both sides of the insulating substrate 30 , which is beneficial to reducing the wiring design difficulty between the power device ICs.
  • the first DC input terminal 10 includes a first sub-DC input terminal 11 and a second sub-DC input terminal 12
  • the conductive layer includes a first conductive sheet. A1, the second conductive sheet A2, the third conductive sheet A3 and the fourth conductive sheet A4;
  • the first conductive sheet A1 is connected to the first sub-DC input terminal 11
  • the second conductive sheet A2 is connected to the second sub-DC input terminal 12
  • the third conductive sheet A3 is connected to the The second DC input terminal 20
  • the conductive patch 40 includes a first conductor Electrical patch 41 and second conductive patch 42
  • the first conductive patch 41 is connected to the fourth conductive patch A4
  • the second conductive patch 42 is connected to the third conductive patch A3.
  • the first conductive sheet A1, the second conductive sheet 42, the third conductive sheet A3, and the fourth conductive sheet A4 can also be implemented using conductive metal sheets such as copper sheets; wherein, the first conductive sheet A1 and the second conductive sheet 42
  • the design parameters can be the same, and the design parameters include but are not limited to: shape, thickness, material, and resistance.
  • the upper surfaces of the first conductive sheet A1, the second conductive sheet A2 and the third conductive sheet A3 can be used for welding the first sub-DC input terminal 11, the second sub-DC input terminal 12 and the second DC input terminal 20 respectively.
  • the areas of the first conductive sheet A1, the second conductive sheet A2 and the third conductive sheet A3 can be configured to be larger than the area of welding with the corresponding DC input terminal, which is equivalent to correspondingly enlarging the first sub-DC input terminal 11, the second sub-DC input terminal 11 and the second conductive sheet A3.
  • the contact area between the sub-DC input terminal 12 and the second DC input terminal 20 and the insulating substrate 30 can play a role in dissipating heat from the DC voltage bus, and can also be used between the first DC input terminal 10, the second DC input terminal 20 and the insulation substrate 30.
  • the second DC input terminal 20 vibrates, it absorbs the vibration force, which can effectively reduce the probability of DC input failure due to vibration.
  • multiple power device ICs form a two-way preset inverter circuit topology, so there can be two sets of upper bridge switch groups and two sets of lower bridge switch groups; the first conductive patch 41 and the second conductive patch 42 It can be extended along the first preset direction.
  • the first conductive patch 41 may include a first sub-conductive patch 41A and a second sub-conductive patch 41B, and the second conductive patch 42 may include a third sub-conductive patch 42A and a fourth sub-conductive patch 42B, wherein:
  • the first sub-conductive patch 41A and the second sub-conductive patch 41B can be used to respectively realize the connection between the output electrodes of each power device IC in the two upper bridge switch groups and the fourth conductive patch 40.
  • the fourth conductive patch 40 It can also be connected to the input electrodes of each power device IC in the two sets of low-bridge switch groups through corresponding conductive sheets.
  • the third sub-conductive patch 42A and the fourth sub-conductive patch 42B are used to implement the two sets of low-bridge switch groups respectively.
  • the output electrodes of each power device IC are connected to the third conductive sheet A3 to realize the construction of two sets of preset inverter circuit topologies.
  • the first conductive sheet A1 is connected to the second conductive sheet A2, and the second DC input terminal 20 spans the first conductive sheet A1 and the second conductive sheet A2 connection part is connected with the third conductive sheet A3.
  • the second DC input terminal 20 may be in a gull-wing shape, and may be divided into a first conductive part extending toward the insulating substrate 30 and a second conductive part extending away from the insulating substrate 30; wherein: the first conductive part extends toward the insulating substrate 30
  • the second conductive part may be connected to the third conductive sheet A3 and arranged at a preset angle with the third conductive sheet A3; the second conductive part may be disposed parallel to the first surface of the insulating substrate 30, so that its lower surface is connected to the first surface of the insulating substrate 30.
  • a wire passage is formed between one surface, so that the connecting portion of the first conductive sheet A1 and the second conductive patch 42 can be arranged using the wire passage, which is beneficial to improving the wiring utilization rate of the insulating panel.
  • the first conductive sheet A1 and the second conductive sheet A2 have tabs arranged oppositely, and the connector L1 is connected to the tabs.
  • first conductive sheet A1 and the second conductive patch 42 may have tabs extending toward each other, and the tabs may be integrally formed with the first conductive sheet A1 or the second conductive patch 42.
  • the two ends of the connecting piece L1 can be connected to the two lugs respectively, so as to further reduce the span width of the connecting piece L1, which is beneficial to reducing the probability of the connecting piece L1 falling off the line midway.
  • the first conductive sheet A1 and the second conductive sheet A2 are connected through a connector L1; the conductive layer also includes a tenth conductive sheet A10.
  • the connector L1 is also connected to the tenth conductive sheet A10.
  • the technical solution of this application is to provide a tenth conductive sheet A10 so that the tenth conductive sheet A10 provides a halfway landing point for the connector L1, so as to divide the connector L1 with an excessive span into those with a smaller span. Two sections, thereby reducing the problem of short circuit caused by falling midway, which is beneficial to improving the safety of the motor controller.
  • FIG. 1 and FIG. 1 In the embodiment shown in FIG. 1 and FIG.
  • the third conductive sheet A3 has an opening, and the tenth conductive sheet A10 is disposed at the opening and is disposed in non-contact with the third conductive sheet A3. It can be understood that the tenth conductive sheet A10 can be part of the initial area of the third conductive sheet A3, and the third conductive sheet A3 can form the tenth conductive sheet A10 by etching corresponding gaps, which is beneficial to reducing processing difficulty.
  • the first conductive sheet A1 and the second conductive sheet A2 are connected through a connector L1;
  • the conductive layer also includes a tenth conductive sheet A10, and the tenth conductive sheet A10 is A backing plate is provided on the bottom surface of the sheet A10, and the connector L1 is connected to the tenth conductive sheet A10.
  • the tenth conductive sheet A10 can also be a DBC copper foil. That is, after the third conductive sheet A3 is opened in advance, a backing plate is provided at the opening using the DBC process, and then the copper foil is placed on the backing plate to form a
  • the tenth conductive sheet A10 please refer to Figure 2 for details. Since the height of the DBC copper foil is higher than that of the third conductive sheet A3, the probability of a short circuit caused by the connecting piece L1 falling midway can be further reduced.
  • the first DC input terminal 10 includes a first sub-DC input terminal 11 and a second sub-DC input terminal 12, and the conductive layer includes a first conductive sheet A1, a third the second conductive sheet A2, the third conductive sheet A3, the fourth conductive sheet A4 and the seventh conductive sheet A7;
  • the first conductive sheet A1 is connected to the first sub-DC input terminal 11, the second conductive sheet A2 is connected to the second sub-DC input terminal 12, the first conductive sheet A1 is connected to the The second conductive sheet A2 is connected, and the third conductive sheet A3 is connected to the second DC input terminal 20;
  • the conductive patch 40 includes a first conductive patch 41 and a second conductive patch 42, and the first conductive patch A3 is connected to the second DC input terminal 20.
  • the conductive patch 41 is connected to the fourth conductive sheet A4, the second conductive patch 42 is connected to the seventh conductive sheet A7, and the third conductive sheet A3 and the seventh conductive sheet A7 are connected through a connector.
  • L1 is connected, and the connecting member L1 spans the connecting portion of the first conductive sheet A1 and the second conductive sheet A2.
  • the first conductive patch A1, the second conductive patch 42, the third conductive patch A3, the first conductive patch 41 and the second conductive patch The implementation and arrangement of 42 can be referred to the above embodiment, and will not be described in detail here;
  • the fourth conductive sheet A4 is only welded and connected with the second sub-DC input terminal 12, and the seventh conductive sheet A7 can be connected with two sets of lower bridge switches.
  • the output electrodes of each power device IC are connected.
  • connection part between the first conductive sheet A1 and the second conductive patch 42 can be regarded as being located between the third conductive sheet A3 and the seventh conductive sheet A7, and can be obtained by etching the conductive layer of the insulating substrate 30, and the third conductive sheet A1 can be obtained by etching the conductive layer of the insulating substrate 30.
  • the third conductive sheet A3 and the seventh conductive sheet A7 may be connected through a connecting member L1 such as a binding wire, a metal strip, or a copper strip.
  • the first DC input terminal 10 includes a first sub-DC input terminal 11 and a second sub-DC input terminal 12, and the conductive layer includes a first conductive sheet.
  • A1 the second conductive sheet A2, the third conductive sheet A3, the fourth conductive sheet A4, the fifth conductive sheet A5, the sixth conductive sheet A6 and the eighth conductive sheet A8;
  • the first conductive sheet A1 is connected to the first sub-DC input terminal 11
  • the second conductive sheet A2 is connected to the second sub-DC input terminal 12
  • the third conductive sheet A3 is connected to the The second DC input terminal 20 is connected
  • some of the power device ICs are connected to the fifth conductive sheet A5
  • some of the power device ICs are connected to the sixth conductive sheet A6, and the remaining power device ICs are connected to the third conductive sheet A6.
  • Eight conductive patches A8 are connected; the conductive patch 40 includes a first conductive patch 41 and a second conductive patch 42, the first conductive patch 41 is connected to the third conductive patch A3, and the second conductive patch A3
  • the patch 42 is connected to the fourth conductive sheet A4, and the first conductive sheet A1 and the second conductive sheet A2 are connected to the eighth conductive sheet A8.
  • the implementation and arrangement of the first conductive patch A1, the second conductive patch 42, the third conductive patch A3, the fourth conductive patch A4, the first conductive patch 41 and the second conductive patch 42 can be Referring to the above embodiments, no further details are given here; some of the power device ICs may be power device ICs forming two sets of lower bridge switch groups, and the remaining power device ICs may be power device ICs used to form two sets of upper bridge switch groups. .
  • the fifth conductive sheet A5 can be used to realize the connection between the fourth conductive sheet A4 and the input electrodes of each power device IC in one group of lower bridge switches, and the sixth conductive sheet A6 can be used to realize the connection between the fourth conductive sheet A4 and another group of lower bridge switches.
  • the eighth conductive sheet A8 includes two sub-conductive sheets 81A and 82A, which are used to respectively realize the first conductive sheet A1 or the second conductive sheet A1 of each power device IC input electrode in the two upper bridge switch groups.
  • the conductive sheets A2 are connected to form two sets of preset inverter circuit topologies.
  • the first conductive sheet A1, the second conductive sheet A2 and the eighth conductive sheet A8 are connected to each other, and the second DC input terminal 20 spans the A portion where a conductive sheet A1, the second conductive sheet A2 and the eighth conductive sheet A8 are connected to each other.
  • the two sets of lower bridge switch groups can be distributed on opposite sides of the two groups of upper bridge switch groups; the third DC input terminal 50 can be arched to form a line passage between its lower surface and the first surface of the insulating substrate 30 , so that the eighth conductive sheet A8 can pass through the wire passage and be connected to the connecting portion of the first conductive sheet A1 and the second conductive sheet A2, thereby realizing two sets of upper bridge switch groups to be respectively connected to the first DC input terminal 10 and The connection of the second DC input terminal 20.
  • the third conductive sheet A3 is divided into two sub-conductive sheets A31 and A32, which are arranged on opposite sides of the second DC input terminal 20.
  • One of the sub-conductive sheets A31 is used to realize the connection between the first conductive patch 41 and To connect the third DC input terminal 50 , another sub-conductive piece A32 is used to realize the connection between the second conductive patch 42 and the third DC input terminal 50 .
  • the first conductive sheet A1 and the second conductive sheet A2 are respectively connected to the eighth conductive sheet A8.
  • first conductive sheet A1 and the second conductive sheet A2 may be disposed in non-contact with the eighth conductive sheet A8 or may be integrally formed.
  • the first conductive sheet A1 and the second conductive sheet A2 are connected to the eighth conductive sheet A8 through a metal plate or connector L1.
  • the first conductive sheet A1 and the second conductive sheet A2 can be respectively connected to the eighth conductive sheet A8 through binding wires, metal strips, copper strips or other connecting members L1.
  • the third conductive sheet A3 can have A tab extending toward the first conductive sheet A1 and the second conductive sheet A2.
  • the first conductive sheet A1 and the second conductive sheet A2 can also be connected to the eighth conductive sheet A8 through a metal plate respectively.
  • the metal plate can be arranged at a preset angle with the eighth conductive sheet A8.
  • the third conductive sheet A3 Both ends of can extend toward the first sub-DC input terminal 11 and the second sub-DC input terminal 12 respectively.
  • the first sub-DC input terminal 11 and the second sub-DC input terminal 12 can be regarded as floating on the third conductive sheet A3.
  • the first DC input terminal 10 includes a first sub-DC input terminal 11 and a second sub-DC input terminal 12, and the conductive layer includes a first conductive sheet A1, a the second conductive sheet A2, the third conductive sheet A3, the fourth conductive sheet A4, the fifth conductive sheet A5, the sixth conductive sheet A6, the eighth conductive sheet A8, the ninth conductive sheet A9 and the eleventh conductive sheet A11;
  • the first conductive sheet A1 is connected to the first sub-DC input terminal 11
  • the second conductive sheet A2 is connected to the second sub-DC input terminal 12
  • the third conductive sheet A3 is connected to the The second DC input terminal 20 is connected
  • some of the power device ICs are connected to the fifth conductive sheet A5
  • some of the power device ICs are connected to the sixth conductive sheet A6, and the remaining power device ICs are connected to the third conductive sheet A6.
  • Eight conductive patches A8 are connected; the conductive patch 40 includes a first conductive patch 41 and a second conductive patch 42.
  • the first conductive patch 41 is connected to the ninth conductive patch A9, and the second conductive patch A9
  • the patch 42 is connected to the fourth conductive sheet A4, the third conductive sheet A3 is connected to the ninth conductive sheet A9 and the eleventh conductive sheet A11 respectively, the first conductive sheet A1, the The second conductive sheet A2 is connected to the eighth conductive sheet A8.
  • the implementation and arrangement of the conductive patches 42 may refer to the above embodiments, and will not be described in detail here.
  • the ninth conductive sheet A9 may have the same design parameters as the tenth conductive sheet A10.
  • the ninth conductive sheet A9 may be disposed between the first conductive sheet A1 and the fifth conductive sheet A5.
  • the eleventh conductive sheet A11 may be disposed between the second conductive sheet A10 and the fifth conductive sheet A10.
  • the ninth conductive sheet A9 is connected to the first sub-conductive patch 41A and the third conductive sheet A3 in the first conductive patch 41 respectively, thereby realizing the connection between the output electrode of each power device IC in a set of lower bridge switch groups and the third conductive patch A3.
  • the connection of the two DC input terminals 20; the eleventh conductive patch 40 is respectively connected to the second sub-conductive patch 41B and the third conductive patch A3 in the first conductive patch 41, thereby realizing another set of lower bridge switch groups.
  • the output electrodes of each power device IC are connected to the second DC input terminal 20 to construct two sets of preset inverter circuit topologies.
  • the third conductive sheet A3 is connected to the ninth conductive sheet A9 and the eleventh conductive sheet A11 through a connector L1, wherein the third conductive sheet A3 and The connector L1 connected to the ninth conductive sheet A9 spans the portion connecting the first conductive sheet A1 to the eighth conductive sheet A8, and the connecting member L1 connecting the third conductive sheet A3 to the eleventh conductive sheet A11
  • the connection member L1 spans the portion where the second conductive sheet A2 and the eighth conductive sheet A8 are connected.
  • the first conductive sheet A1 and the second conductive sheet A2 can be connected to the eighth conductive sheet A8 through corresponding conductive sheets respectively; or, the first conductive sheet A1 and the second conductive sheet A2 can also be integrally formed with the eighth conductive sheet A8 , and the connection part between the first conductive sheet A1 and the eighth conductive sheet A8 is located between the ninth conductive sheet A9 and the third conductive sheet A3, and the connection part between the second conductive sheet A2 and the eighth conductive sheet A8 is located at the eleventh between the conductive sheet A11 and the third conductive sheet A3.
  • the ninth conductive sheet A9 and the eleventh conductive sheet A11 can respectively span the corresponding connection parts through the binding wire, metal strip, copper strip or other connecting member L1, so as to realize the connection to the third conductive sheet A3. Opposite sides. Such an arrangement can effectively span the span of the connecting piece L1, which is helpful to further reduce the probability of a short circuit caused by the falling of the connecting piece L1.
  • the first DC input terminal 10 includes a first sub-DC input terminal 11 and a second sub-DC input terminal 12, and the conductive layer includes a third conductive sheet A3, a third conductive sheet A3, and a third conductive sheet A3.
  • the first sub-DC input terminal 11 and the second sub-DC input terminal 12 are respectively connected to the eighth conductive sheet A8, the third conductive sheet A3 is connected to the second DC input terminal 20, and part of the The power device IC is connected to the fifth conductive sheet A5, part of the power device IC is connected to the sixth conductive sheet A6, and the remaining power device IC is connected to the eighth conductive sheet A8; the conductive sticker
  • the sheet 40 includes a first conductive patch 41 and a second conductive patch 42.
  • the first conductive patch 41 is connected to the third conductive patch A3, and the second conductive patch 42 is connected to the fourth conductive patch A3. A4 connection.
  • the implementation and arrangement of the third conductive sheet A3, the fourth conductive sheet A4, the fifth conductive sheet A5, the sixth conductive sheet A6 and the eighth conductive sheet A8 may refer to the above embodiments and will not be described in detail here.
  • the first conductive sheet A1 and the second conductive sheet A2 are cancelled, the first sub-DC input terminal 11 and the second sub-DC input terminal 12 can be directly connected to the eighth conductive sheet A8, and because the eighth conductive sheet A8
  • the area of the sheet A8 is much larger than that of the first conductive sheet A1 and the second conductive sheet A2.
  • This arrangement is conducive to further improving the heat dissipation effect and vibration force absorption effect of the DC bus.
  • Both ends of the third conductive patch A3 can extend toward the first sub-DC input terminal 11 and the second sub-DC input terminal 12 respectively, so as to be connected to the first sub-conductive patch 41A and the second sub-conductive patch 41B respectively.
  • the eighth conductive sheet A8 is provided with a boss, and the first sub-DC input terminal 11 and the second sub-DC input terminal 12 are respectively connected to the corresponding bosses. .
  • a side of the eighth conductive sheet A8 close to the second DC input terminal 20 may be provided with bosses extending toward the first sub-DC input terminal 11 and the second sub-DC input terminal 12 respectively, for providing the third A sub-DC input terminal 11 and a second sub-DC input terminal 12 are welded thereon correspondingly.
  • the first sub-DC input terminal 11 and the second sub-DC input terminal 12 can be separated from the second DC input terminal 20 by a relatively long distance, which can effectively avoid the first sub-DC input terminal 11 and the second sub-DC input terminal. 12 and the second DC input terminal 20 are short-circuited.
  • the two bosses and the third conductive sheet A3 are not in the same straight line in the width direction of the ceramic substrate, the two ends of the third conductive sheet A3 can pass through the first sub-DC input terminal 11 and the second sub-DC input terminal 11 respectively.
  • the cable passing channel formed by the DC input terminal 12 forms a C-shaped structure, so as to surround the two bosses respectively.
  • the first conductive patch 41 is connected to the third conductive patch A3 across the boss.
  • the side of the third conductive sheet A3 close to the eighth conductive sheet A8 may have extending portions respectively extending toward the width direction of the ceramic substrate for the first sub-conductive patch 41A and the second sub-conductive patch to be patched. Can be welded accordingly.
  • the bosses can have a C-shaped structure, and each boss can surround an extension of the third conductive patch A3, that is, the first sub-conductive patch 41A and the second sub-conductive patch 41B respectively span a The boss is connected to an extended portion of the third conductive sheet A3.
  • the embodiment shown in FIG. 12 can also be regarded as the first conductive sheet A1 and the second conductive sheet A2 being integrally formed with corresponding bosses respectively.
  • this application also proposes an embodiment, specifically referring to Figure 14, in which the third sub-conductive patch 42A and the fourth sub-conductive patch 42B are implemented by using an integrally formed C-shaped conductive patch, that is, the third sub-conductive patch A connecting conductive piece is provided between 42A and the fourth sub-conductive patch 42B for connecting the two and can be arranged at a preset distance from the fourth conductive piece A4.
  • the second DC input terminal 20 can also be provided integrally with the first conductive patch 41 . This will help reduce material input and process flow, and will also help reduce the cost of power device ICs. Of course, the remaining settings may refer to the embodiment shown in FIG. 1 and will not be described again here.
  • the motor controller includes a power module.
  • the specific structure of the power module refers to the above-mentioned embodiments. Since this motor controller adopts all the technical solutions of all the above-mentioned embodiments, it at least has the above-mentioned implementation. Examples of technical solutions All the beneficial effects brought about will not be repeated here.
  • the motor controller may also include AC-DC modules and capacitive devices.
  • the AC-DC module can communicate with the first sub-DC input terminal 11 and the second sub-DC input of the power module through the dual positive voltage bus.
  • Terminal 12 is connected, and is connected to the second DC input terminal 20 of the power module through the negative voltage bus; when the polarity of the first sub-DC input terminal 11 and the second sub-DC input terminal 12 is negative, the AC-DC module can pass
  • the double negative voltage bus is connected to the first sub-DC input terminal 11 and the second sub-DC input terminal 12 of the power module, and is connected to the second DC input terminal 20 of the power module through the positive voltage bus; the capacitor device can be connected to the positive and negative between voltage buses.

Abstract

本申请公开一种功率模块和电机控制器，其中，功率模块包括：多个极性相同的第一直流输入端；至少一个第二直流输入端，第二直流输入端与第一直流输入端的极性相反；多个功率器件；绝缘基板，在绝缘基板的第一表面具有导电层，导电层与功率器件的输入电极或者输出电极连接；导电贴片，导电贴片沿第一方向与对应的功率器件的输入电极或者输出电极连接；交流输出端，与导电层连接；其中：各极性相同的第一直流输入端在相对于功率器件的输入侧相连接。

Description

功率模块和电机控制器
相关申请
本申请要求于2022年4月21号申请的、申请号为202210423320.2的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及功率电子器件技术领域，特别涉及一种功率模块和电机控制器。
背景技术
在功率模块中，存在使用多个DC+端或者多个DC-端的封装结构。但在电机控制器中，由于多个DC+端或者多个DC-端需要与电容器件连接，使得封装结构内部与多个DC+端或者多个DC-端相连的内部并联功率器件具有不均流的现象，从而导致功率器件的可靠性较低。
发明内容
本申请的主要目的是提供一种功率模块，旨在解决功率模块中功率器件可靠性较低的问题。
为实现上述目的，本申请提出的功率模块，所述功率模块包括：
多个极性相同的第一直流输入端；
至少一个第二直流输入端，所述第二直流输入端与所述第一直流输入端的极性相反；
多个功率器件；
绝缘基板，在所述绝缘基板的第一表面具有导电层，所述导电层与所述功率器件的输入电极或者输出电极连接；
导电贴片，所述导电贴片沿第一预设方向与对应的所述功率器件的输入电极或者输出电极连接；
交流输出端，与所述导电层连接；
其中：各所述极性相同的第一直流输入端在相对于所述功率器件的输入侧相连接。
在一实施例中，所述第一直流输入端的数量大于所述第二直流输入端，且多个所述第一直流输入端分布于所述第二直流输入端的两侧。
在一实施例中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片和第四导电片；
其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第三导电片与所述第二直流输入端连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第四导电片连接，所述第二导电贴片与所述第三导电片连接。
在一实施例中，所述第一导电片与所述第二导电片连接，所述第二直流输入端跨越所述第一导电片与所述第二导电片连接部分设置。
在一实施例中，所述第一导电片与所述第二导电片通过连接件连接，所述连接件跨越所述第三导电片设置。
在一实施例中，所述第一导电片和所述第二导电片具有相对设置的凸片，所述连接件与所述凸片连接。
在一实施例中，所述第一导电片与所述第二导电片通过连接件连接；所述导电层还包括第十导电片，所述连接件还与所述第十导电片连接。
在一实施例中，所述第一导电片与所述第二导电片通过连接件连接；所述导电层还包括第十导电片，所述第十导电片底面垫设有垫板，所述连接件与所述第十导电片连接。
在一实施例中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片、第四导电片和第七导电片；
其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第一导电片与所述第二导电片连接，所述第三导电片与所述第二直流输入端连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第四导电片连接，所述第二导电贴片与所述第七导电片连接，所述第三导电片与所述第七导电片通过连接件连接，且所述连接件跨越所述第一导电片与所述第二导电片的连接部分。
在一实施例中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片、第四导电片、第五导电片、第六导电片和第八导电片；
其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第三导电片与所述第二直流输入端连接，部分所述功率器件与所述第五导电片连接，部分所述功率器件与所述第六导电片连接，其余所述功率器件与所述第八导电片连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第三导电片连接，所述第二导电贴片与所述第四导电片连接，所述第一导电片、所述第二导电片与所述第八导电片连接。
在一实施例中，所述第一导电片、所述第二导电片和所述第八导电片相互连接，所述第二直流输入端跨越所述第一导电片、所述第二导电片和所述第八导电片相互连接的部位设置。
在一实施例中，所述第一导电片、所述第二导电片分别与所述第八导电片连接。
在一实施例中，所述第一导电片、所述第二导电片通过金属板或者连接件与所述第八导电片连接。
在一实施例中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片、第四导电片、第五导电片、第六导电片、第八导电片、第九导电片和第十一导电片；
其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第三导电片与所述第二直流输入端连接，部分所述功率器件与所述第五导电片连接，部分所述功率器件与所述第六导电片连接，其余所述功率器件与所述第八导电片连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第九导电片和所述第十一导电贴片连接，所述第二导电贴片与所述第四导电片连接，所述第三导电片与所述第九导电片、所述第十一导电片分别连接，所述第一导电片、所述第二导电片与所述第八导电片连接。
在一实施例中，所述第三导电片与所述第九导电片、所述第十一导电片通过连接件连接，其中，所述第三导电片与所述第九导电片连接的连接件跨越所述第一导电片与所述第八导电片连接的部分，所述第三导电片与所述第十一导电片连接的连接件跨越所述第二导电片与所述第八导电片连接的部分。
在一实施例中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第三导电片、第四导电片、第五导电片、第六导电片和第八导电片；
其中：第一子直流输入端和所述第二子直流输入端分别与所述第八导电片连接，所述第三导电片与所述第二直流输入端连接，部分所述功率器件与所述第五导电片连接，部分所述功率器件与所述第六导电片连接，其余所述功率器件与所述第八导电片连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第三导电片连接，所述第二导电贴片与所述第四导电片连接。
在一实施例中，所述第八导电片设有凸台，所述第一子直流输入端和所述第二子直流输入端分别与对应的所述凸台连接。
在一实施例中，所述第一导电贴片跨越所述凸台与所述第三导电片连接。
在一实施例中，所述连接件为绑定线或者金属带。
本申请还提出一种电机控制器，所述电机控制器包括如上述的功率模块。
本申请技术方案通过采用多个极性相同的第一直流输入端、至少一个第二直流输入端、多个功率器件、绝缘基板、导电贴片以及交流输出端，并通过将各极性相同的第一直流输入端在相对于所述功率器件的输入侧相连接，使得多个功率器件的输入电极或者输出电极可具有相同电位，不会因为电位不同而产生不均流现象，因而降低了功率器件过热失效的概率，有效增强了功率器件可靠性，从而解决了功率模块封装中功率器件可靠性较低的问题。
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图1为本申请功率模块一实施例的结构示意图；
图2为本申请功率模块另一实施例的结构示意图；
图3为本申请功率模块又一实施例的结构示意图；
图4为本申请功率模块再一实施例的结构示意图；
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图6为本申请功率模块再一实施例的结构示意图；
图7为本申请功率模块再一实施例的结构示意图；
图8为本申请功率模块再一实施例的结构示意图；
图9为本申请功率模块再一实施例的结构示意图；
图10为本申请功率模块再一实施例的结构示意图；
图11为本申请功率模块再一实施例的结构示意图；
图12为本申请功率模块再一实施例的结构示意图；
图13为本申请功率模块再一实施例的结构示意图；
图14为本申请功率模块再一实施例的结构示意图。
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本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
另外，在本申请中如涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
本申请提出一种功率模块，可应用于电机控制器中。
在目前电机控制器中，功率模块通常包括：绝缘基板、多个功率器件、导电片、直流输入端和交流输出端。其中，绝缘基板具有相对设置的第一表面和第二表面，绝缘基板的第一表面具有第一导电层；多个功率器件沿一预设方向布置于绝缘基板的第一表面，且一部分的功率器件的输入电极与第一导电层连接，其余部分的功率器件的输出电极与第一导电层连接；导电片沿同样的预设方向与对应的功率器件的输入电极或者输出电极连接；直流输入端与第一导电层连接，为功率器件输入直流电；交流输出端与第一导电层连接，经功率器件输出交流电。如此设置，虽然提高了功率器件的均流特性，但使得功率模块的多个直流输入端(DC+端、DC-端)外部需要与电容器件连接，而由于电容器件的容芯数量和位置不同，导致功率模块内的多个DC+端或者多个DC-端处于不同电位，从而导致与之相连的内部并联功率器件产生不均流现象，进而使得流经电流较大的功率器件过热失效的概率增大，影响功率器件的可靠性。
为了解决上述问题，参照图1至图14，在本申请一实施例中，所述功率模块包括：
多个极性相同的第一直流输入端10；
至少一个第二直流输入端20，所述第二直流输入端20与所述第一直流输入端10的极性相反；
多个功率器件IC；
绝缘基板30，在所述绝缘基板30的第一表面具有导电层，所述导电层与所述功率器件IC的输入 电极或者输出电极连接；
导电贴片40，所述导电贴片40沿第预设一方向与对应的所述功率器件IC的输入电极或者输出电极连接；
交流输出端50，与所述导电层连接；
其中：各所述极性相同的第一直流输入端10在相对于所述功率器件IC的输入侧相连接。
本实施例中，各第一直流输入端10、各第二直流输入端20均和交流输出端50可采用一体冲压成型，且具有Leadframe功能的铜片等导电金属片来实现。各第一直流输入端10和各第二直流输入端20均的一端可连接于绝缘基板30上，另一端可穿出功率模块的封装结构与电机控制器中的直流电压母线连接，以接入直流电压母线输出的相应极性的直流电并输出。可以理解的是，直流输入端的极性包括正极和负极，当第一直流输入端10为正极性时，第二直流输入端20则为负极性；当第一直流输入端10为负极性时，第二直流输入端20则为正极性。交流输出端50一端可连接于绝缘基板30，以接入绝缘基板30上逆变电路输出的交流电并输出至交流电压母线。
功率器件IC可以是贴片式，还可以是裸die晶圆，功率器件IC可以通过焊料F、导电胶、超声、烧结等焊接或者粘接的方式与导电片实现电连接。各个功率器件IC可以是氮化镓GaN功率开关管、Si基功率开关管或SiC基功率开关管、MOS管、HEMT管等中的一种或者多种组合。功率器件IC的数量可以是两个或者两个以上，例如三个，四个，六个，八个等，多个功率器件IC之间并联设置，形成一个半桥开关。可以理解的是，每一功率器件IC具有输入电极和输出电极，根据自身的类型不同，功率器件IC的输入电极和输出电极也不同，例如在采用MOS管来实现时，输入电极即为漏极，输出电极即为源极；在采用IGBT来实现时，输入电极即为集电极，输出电极即为发射极。
绝缘基板30可为直接敷铜陶瓷基板DBC基板或者直接镀铜陶瓷基板DPC基板或者AMB基板。绝缘基板30具有相对的两个表面，其中设有导电层的表面可为第一表面，另一表面可为第二表面，第二表面上可设有第十二导电片。导电层可作为功率器件IC的安装载体，以供相应功率器件IC的输入电极或者输出电极可焊接其上；第二表面可具有铜箔。导电贴片40可采用绑定线、金属带或铜条带又称铜Clip来实现。本实施例中，第一预设方向可为多个功率器中各组上桥开关或者各组下桥开关的延伸方向，导电贴片40可通过焊接、焊料或银烧结等方式与相应功率器件IC的输入电极或者输出电机连接，且还可通过超声键合、焊料或银烧结的方式与导电层连接，从而与导电层配合使绝缘基板30上的多个功率器件IC可形成预设逆变电路拓扑；其中，预设逆变电路拓扑可为半桥电路拓扑或者全桥电路拓扑。
本申请通过将各第一直流输入端10的输入侧互相连接，以使在各第一直流输入端10的电位一直时，电位较高的第一直流输入端10各可产生均衡电流流向电位较低的各第一直流输入端10，以抬高各电位较低的各第一直流输入端10的电位，从而达到各第一直流输入端10电位相同的目的。需要说明的是，可通过飞线、连接件L1、金属带或铜Clip将各第一直流输入端10直接连接来实现本申请方案；或者，还可通过飞线、连接件L1、金属带或铜Clip将各第一直流输入端10与导电层焊接处所在的导电片互相连接来实现本申请方案；或者，还可将部分第一直流输入端10直接连接，以及将其余部分第一直流输入端10的焊接处所在导电片互相连接来实现本申请方案，在此不做限定。
如此设置，使得多个功率器件IC的输入电极或者输出电极可具有相同电位，不会因为电位不同而产生不均流现象，因而降低了功率器件IC过热失效的概率，有效增强了功率器件IC可靠性，从而解决了功率模块封装中功率器件IC可靠性较低的问题。
参照图1至图14，在本申请一实施例中，所述第一直流输入端10的数量大于所述第二直流输入端20，且多个所述第一直流输入端10分布于所述第二直流输入端20的两侧。
本实施例中，第一直流输入端10的数量至少为两个，第二直流输入端20的数量至少为一个。第一直流输入端10和第二直流输入端20的具体数量可根据多个功率器件IC所组成的预设逆变电路拓扑数量来确定，例如，当组成的预设逆变电路拓扑数量为两路时，第一直流输入端10的数量可为两个，第二直流输入端20的数量可为一个；当组成的预设逆变电路拓扑数量为三路时，第一直流输入端10的数量可为三个，第二直流输入端20的数量可为一个或者两个，在此不做限定。本说明书以第一直流输入端10的数量为两个，极性为正极性；第二直流输入端20的数量为一个，极性为负极性，为例进行说明。本申请方案通过将数量较少的第二直流输入端20设于靠中间位置，使得各第二直流输入端20所连接的功率器件IC可靠近绝缘基板30的中间区域集中设置，而用于与各第一直流输入端10所连接的功率器件IC可靠近绝缘基板30的两侧区域设置，有利于降低各功率器件IC之间的走线设计难度。
参照图1至图14，在本申请一实施例中，所述第一直流输入端10包括第一子直流输入端11和第二子直流输入端12，所述导电层包括第一导电片A1、第二导电片A2、第三导电片A3和第四导电片A4；
其中：所述第一导电片A1与所述第一子直流输入端11连接，所述第二导电片A2与所述第二子直流输入端12连接，所述第三导电片A3与所述第二直流输入端20连接；所述导电贴片40包括第一导 电贴片41和第二导电贴片42，所述第一导电贴片41与所述第四导电片A4连接，所述第二导电贴片42与所述第三导电片A3连接。
第一导电片A1、第二导电贴片42、第三导电片A3、第四导电片A4同样可采用铜片等导电金属片来实现；其中，第一导电片A1和第二导电贴片42的设计参数可相同，设计参数包括但不限于：形状、厚度、材料、电阻。第一导电片A1、第二导电片A2和第三导电片A3三者的上表面可用于分别供第一子直流输入端11、第二子直流输入端12和第二直流输入端20焊接。此外，第一导电片A1、第二导电片A2和第三导电片A3的面积可配置为大于与对应直流输入端的焊接的面积，因而相当于对应扩大了第一子直流输入端11、第二子直流输入端12和第二直流输入端20与绝缘基板30的接触面积，可起到对直流电压母线散热的作用，且还可在第一直流输入端10、第二直流输入端20和第二直流输入端20出现振动时，起到吸收振动力的作用，可有效降低因振动导致直流输入失效的概率。
本实施例中，多个功率器件IC组成两路预设逆变电路拓扑，因此可具有两组上桥开关组和两组下桥开关组；第一导电贴片41和第二导电贴片42可沿第一预设方向延伸设置。第一导电贴片41可包括第一子导电贴片41A和第二子导电贴片41B，第二导电贴片42可包括第三子导电贴片42A和第四子导电贴片42B，其中：第一子导电贴片41A和第二子导电贴片41B可用于分别实现两组上桥开关组中各功率器件IC输出电极与第四导电贴片40的连接，此时第四导电贴片40还可经相应的导电片与两组下桥开关组中各功率器件IC的输入电极连接，第三子导电贴片42A和第四子导电贴片42B用于分别实现两组下桥开关组中各功率器件IC输出电极与第三导电片A3的连接，从而实现构建组成两组预设逆变电路拓扑。
进一步地，参照图5和图13，所述第一导电片A1与所述第二导电片A2连接，所述第二直流输入端20跨越所述第一导电片A1与所述第二导电片A2连接部分，并与所述第三导电片A3连接。
本实施例中，第二直流输入端20可呈鸥翼型，且可分为朝向绝缘基板30延伸的第一导电部分和背向绝缘基板30延伸设置的第二导电部分；其中：第一导电部分可与第三导电片A3连接，且与第三导电片A3成预设夹角设置；第二导电部分可与绝缘基板30的第一表面平行设置，以在自身下表面与绝缘基板30第一表面之间形成有过线通道，以使第一导电片A1和第二导电贴片42的连接部分可利用过线通道设置，有利于提高绝缘面板的布线利用率。
进一步地，参照图4，所述第一导电片A1和所述第二导电片A2具有相对设置的凸片，所述连接件L1与所述凸片连接。
本实施例中，第一导电片A1和第二导电贴片42可具有朝向彼此延伸设置的凸片，凸片可与所在的第一导电片A1或者第二导电贴片42可一体成型设置，此时连接件L1的两端可分别连接于两凸片，以进一步降低连接件L1的跨越幅度，有利于连接件L1降低中途落线的概率。
参照图1和图14，在本申请一实施例中，所述第一导电片A1与所述第二导电片A2通过连接件L1连接；所述导电层还包括第十导电片A10，所述连接件L1还与所述第十导电片A10连接。
当第一导电片A1和第二导电贴片42采用连接件L1连接时，由于跨越幅度过大，存在中途掉落导致各第一直流输入端10与第二直流输入端20短接的风险。针对此问题，本申请技术方案通过设有第十导电片A10，以使第十导电片A10为连接件L1提供中途落点，以将跨越幅度过大的连接件L1分为跨越幅度较小的两段，从而达到降低中途掉落导致短接的问题，有利于提高电机控制器的安全性。在图1和图14所示实施例中，第三导电片A3具有开口，第十导电片A10设于开口处，且与第三导电片A3非接触设置。可以理解的是，第十导电片A10可为第三导电片A3的部分初始区域，第三导电片A3可通过蚀刻出相应的间隙来形成第十导电片A10，有利于降低加工难度。
参照图2，在本申请一实施例中，所述第一导电片A1与所述第二导电片A2通过连接件L1连接；所述导电层还包括第十导电片A10，所述第十导电片A10底面垫设有垫板，所述连接件L1与所述第十导电片A10连接。
本实施例中，第十导电片A10还可为DBC铜箔，即在第三导电片A3预先开口后，采用DBC工艺在开口处设置垫板，再将铜箔设于垫板上，以形成第十导电片A10，具体可参照图2。由于DBC铜箔的高度相较于第三导电片A3而言较高，可进一步降低连接件L1中途掉落而导致短接的概率。
参照图6，在本申请一实施例中，所述第一直流输入端10包括第一子直流输入端11和第二子直流输入端12，所述导电层包括第一导电片A1、第二导电片A2、第三导电片A3、第四导电片A4和第七导电片A7；
其中：所述第一导电片A1与所述第一子直流输入端11连接，所述第二导电片A2与所述第二子直流输入端12连接，所述第一导电片A1与所述第二导电片A2连接，所述第三导电片A3与所述第二直流输入端20连接；所述导电贴片40包括第一导电贴片41和第二导电贴片42，所述第一导电贴片41与所述第四导电片A4连接，所述第二导电贴片42与所述第七导电片A7连接，所述第三导电片A3与所述第七导电片A7通过连接件L1连接，且所述连接件L1跨越所述第一导电片A1与所述第二导电片A2的连接部分。
本实施例中，第一导电片A1、第二导电贴片42、第三导电片A3、第一导电贴片41和第二导电贴片 42的实现方式和设置方式可参照上述实施例，在此不做赘述；第四导电片A4则只与第二子直流输入端12焊接连接，第七导电片A7可与两组下桥开关组中各功率器件IC的输出电极连接。此时第一导电片A1和第二导电贴片42的连接部分可视为位于第三导电片A3和第七导电片A7之间，且可通过对绝缘基板30的导电层蚀刻得到，而第三导电片A3和第七导电片A7可通过绑定线、金属带或铜条带等连接件L1连接。如此设置，由于第三导电片A3和第七导电片A7之间的距离相较于第一导电片A1和第二导电贴片42之间的距离较近，因此可有效降低连接件L1的跨越幅度，有利于进一步降低连接件L1掉落而导致短接的概率。
参照图7和图13，在本申请一实施例中，所述第一直流输入端10包括第一子直流输入端11和第二子直流输入端12，所述导电层包括第一导电片A1、第二导电片A2、第三导电片A3、第四导电片A4、第五导电片A5、第六导电片A6和第八导电片A8；
其中：所述第一导电片A1与所述第一子直流输入端11连接，所述第二导电片A2与所述第二子直流输入端12连接，所述第三导电片A3与所述第二直流输入端20连接，部分所述功率器件IC与所述第五导电片A5连接，部分所述功率器件IC与所述第六导电片A6连接，其余所述功率器件IC与所述第八导电片A8连接；所述导电贴片40包括第一导电贴片41和第二导电贴片42，所述第一导电贴片41与所述第三导电片A3连接，所述第二导电贴片42与所述第四导电片A4连接，所述第一导电片A1、所述第二导电片A2与所述第八导电片A8连接。
本实施例中，第一导电片A1、第二导电贴片42、第三导电片A3、第四导电片A4、第一导电贴片41和第二导电贴片42的实现方式和设置方式可参照上述实施例，在此不做赘述；部分功率器件IC可为形成两组下桥开关组的各功率器件IC，其余功率器件IC可为用于形成两组上桥开关组的各功率器件IC。第五导电片A5可用于实现第四导电片A4和其中一组下桥开关中各功率器件IC输入电极的连接，第六导电片A6可用于实现第四导电片A4和另一组下桥开关中各功率器件IC输入电极的连接；第八导电片A8包括两个子导电片81A、82A，用于分别实现两组上桥开关组中各功率器件IC输入电极分别第一导电片A1或者第二导电片A2的连接，从而构建组成两组预设逆变电路拓扑。
参照图7，在本申请一实施例中，所述第一导电片A1、所述第二导电片A2和所述第八导电片A8相互连接，所述第二直流输入端20跨越所述第一导电片A1、所述第二导电片A2和所述第八导电片A8相互连接的部位。
两组下桥开关组可分布于两组上桥开关组的相对两侧；第三直流输入端50可呈拱型，以在其下表面和绝缘基板30第一表面之间形成有一过线通道，以使第八导电片A8可穿过该过线通道与第一导电片A1和第二导电片A2的连接部分连接，从而实现两组上桥开关组分别与第一直流输入端10和第二直流输入端20的连接。本实施例中，第三导电片A3分为两个子导电片A31、A32，并分设于第二直流输入端20的相对两侧，其中一个子导电片A31用于实现第一导电贴片41与第三直流输入端50的连接，另一个子导电片A32用于实现第二导电贴片42与第三直流输入端50的连接。
参照图1至图14，在本申请一实施例中，所述第一导电片A1、所述第二导电片A2分别与所述第八导电片A8连接。
本实施例中，第一导电片A1、第二导电片A2可分别与第八导电片A8非接触设置或者一体成型设置。
在一实施例中，参照图8和图10，所述第一导电片A1、所述第二导电片A2通过金属板或者连接件L1与所述第八导电片A8连接。
本实施例中，第一导电片A1、第二导电片A2可通过绑定线、金属带或铜条带等连接件L1分别与第八导电片A8连接，此时第三导电片A3可具有朝向第一导电片A1和第二导电片A2延伸设置的凸片。或者，第一导电片A1和第二导电片A2还可分别通过一金属板与第八导电片A8连接，金属板可与第八导电片A8呈预设角度设置，此时第三导电片A3的两端可分别朝向第一子直流输入端11和第二子直流输入端12方向延伸。换而言之，第一子直流输入端11和第二子直流输入端12可视为悬浮于第三导电片A3上。
参照图9，在本申请一实施例中，所述第一直流输入端10包括第一子直流输入端11和第二子直流输入端12，所述导电层包括第一导电片A1、第二导电片A2、第三导电片A3、第四导电片A4、第五导电片A5、第六导电片A6、第八导电片A8、第九导电片A9和第十一导电片A11；
其中：所述第一导电片A1与所述第一子直流输入端11连接，所述第二导电片A2与所述第二子直流输入端12连接，所述第三导电片A3与所述第二直流输入端20连接，部分所述功率器件IC与所述第五导电片A5连接，部分所述功率器件IC与所述第六导电片A6连接，其余所述功率器件IC与所述第八导电片A8连接；所述导电贴片40包括第一导电贴片41和第二导电贴片42，所述第一导电贴片41与所述第九导电片A9连接，所述第二导电贴片42与所述第四导电片A4连接，所述第三导电片A3与所述第九导电片A9、所述第十一导电片A11分别连接，所述第一导电片A1、所述第二导电片A2与所述第八导电片A8连接。
本实施例中，第一子直流输入端11、第二子直流输入端12、第一导电片A1、第二导电片A2、第三导电片A3、第四导电片A4、第五导电片A5、第六导电片A6、第八导电片A8、第一导电贴片41和第二 导电贴片42的实现方式和设置方式可参照上述实施例，在此不做赘述。第九导电片A9可与第十导电片A10的设计参数相同，第九导电片A9可设于第一导电片A1和第五导电片A5之间，第十一导电片A11可设于第二导电片A2和第六导电片A6之间。其中，第九导电片A9分别与第一导电贴片41中的第一子导电贴片41A和第三导电片A3连接，从而实现一组下桥开关组中各功率器件IC的输出电极与第二直流输入端20的连接；第十一导电贴片40分别与第一导电贴片41中的第二子导电贴片41B和第三导电片A3连接，从而实现另一组下桥开关组中各功率器件IC的输出电极与第二直流输入端20的连接，从而构建组成两组预设逆变电路拓扑。
在一实施例中，参照图9，所述第三导电片A3与所述第九导电片A9、所述第十一导电片A11通过连接件L1连接，其中，所述第三导电片A3与所述第九导电片A9连接的连接件L1跨越所述第一导电片A1与所述第八导电片A8连接的部分，所述第三导电片A3与所述第十一导电片A11连接的连接件L1跨越所述第二导电片A2与所述第八导电片A8连接的部分。
第一导电片A1和第二导电片A2可分别经相应的导电片与第八导电片A8连接；或者，第一导电片A1和第二导电片A2还可与第八导电片A8一体成型设置，且第一导电片A1和第八导电片而且A8的连接部分位于第九导电片A9和第三导电片A3之间，第二导电片A2和第八导电片A8的连接部分位于第十一导电片A11和第三导电片A3之间。本实施例中，第九导电片A9和第十一导电片A11可分别经绑定线、金属带或铜条带等连接件L1跨越相应的连接部分，以实现连接于第三导电片A3的相对两侧。如此设置，可有效连接件L1的跨越幅度，有利于进一步降低连接件L1掉落而导致短接的概率。
参照图11，在本申请一实施例中，所述第一直流输入端10包括第一子直流输入端11和第二子直流输入端12，所述导电层包括第三导电片A3、第四导电片A4、第五导电片A5、第六导电片A6和第八导电片A8；
其中：第一子直流输入端11和所述第二子直流输入端12分别与所述第八导电片A8连接，所述第三导电片A3与所述第二直流输入端20连接，部分所述功率器件IC与所述第五导电片A5连接，部分所述功率器件IC与所述第六导电片A6连接，其余所述功率器件IC与所述第八导电片A8连接；所述导电贴片40包括第一导电贴片41和第二导电贴片42，所述第一导电贴片41与所述第三导电片A3连接，所述第二导电贴片42与所述第四导电片A4连接。
第三导电片A3、第四导电片A4、第五导电片A5、第六导电片A6和第八导电片A8的实现方式和设置方式可参照上述实施例，在此不做赘述。本实施例中，由于取消了第一导电片A1和第二导电片A2，第一子直流输入端11和第二子直流输入端12可直接与第八导电片A8连接，且由于第八导电片A8的面积远大于第一导电片A1和第二导电片A2，如此设置有利于进一步提高对直流母线的散热作用以及振动力吸收作用。第三导电片A3的两端可分别朝向第一子直流输入端11和第二子直流输入端12延伸设置，以分别与第一子导电贴片41A和第二子导电贴片41B连接。
在一实施例中，参照图11，所述第八导电片A8设有凸台，所述第一子直流输入端11和所述第二子直流输入端12分别与对应的所述凸台连接。
本实施例中，在第八导电片A8靠近第二直流输入端20的一侧可设有分别朝向第一子直流输入端11和第二子直流输入端12延伸设置的凸台，以供第一子直流输入端11和第二子直流输入端12对应焊接其上。如此设置，使得第一子直流输入端11和第二子直流输入端12可分别距离第二直流输入端20一较远距离，可有效避免第一子直流输入端11和第二子直流输入端12与第二直流输入端20短接的情况。此时，还由于两凸台与第三导电片A3在陶瓷基板的宽度方向上并非处于同一直线，因而第三导电片A3的两端可分别穿过第一子直流输入端11和第二子直流输入端12形成的过线通道形成C形结构，以分别将两凸台围设其中。
进一步地，参照图12，所述第一导电贴片41跨越所述凸台与所述第三导电片A3连接。
本实施例中，第三导电片A3靠近第八导电片A8的一侧可具有分别朝向陶瓷基板的宽度方向延伸的延伸部，以供第一子导电贴片41A和第二子导电片贴片可对应焊接其上。此时，凸台可呈C形结构，每一凸台可将第三导电片A3的一个延伸部围设其中，也即第一子导电贴片41A和第二子导电贴片41B分别跨越一个凸台与第三导电片A3的一个延伸部连接。当然。图12所示实施例也可视为，第一导电片A1和第二导电片A2分别与对应的凸台一体成型设置。
此外，本申请还提出一实施例，具体可参照图14，将第三子导电贴片42A和第四子导电贴片42B采用一体成型的C形导电片来实现，即第三子导电贴片42A和第四子导电贴片42B之间设有用于连接二者，且可间隔第四导电片A4预设距离设置的连接导电片。此外，第二直流输入端20还可与第一导电贴片41一体设置。如此，有利于减少物料的投入和工艺流程，还有利于降低功率器件IC的成本。当然，其余设置可参照图1所示实施例，在此不做赘述。
本申请还提出一种电机控制器，该电机控制器包括功率模块，该功率模块的具体结构参照上述实施例，由于本电机控制器采用了上述所有实施例的全部技术方案，因此至少具有上述实施例的技术方案所 带来的所有有益效果，在此不再一一赘述。
其中，电机控制器还可包括AC-DC模块和电容器件。当第一子直流输入端11和第二子直流输入端12的极性为正极时，AC-DC模块可通过双正电压母线与功率模块的第一子直流输入端11和第二子直流输入端12连接，以及通过负电压母线与功率模块的第二直流输入端20连接；当第一子直流输入端11和第二子直流输入端12的极性为负极时，AC-DC模块可通过双负电压母线与功率模块的第一子直流输入端11和第二子直流输入端12连接，以及通过正电压母线与功率模块的第二直流输入端20连接；电容器件可连接于正、负电压母线之间。
以上所述仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是在本申请的申请构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (20)

  1. 一种功率模块，其中，所述功率模块包括：
    多个极性相同的第一直流输入端；
    至少一个第二直流输入端，所述第二直流输入端与所述第一直流输入端的极性相反；
    多个功率器件；
    绝缘基板，在所述绝缘基板的第一表面具有导电层，所述导电层与所述功率器件的输入电极或者输出电极连接；
    导电贴片，所述导电贴片沿第一预设方向与对应的所述功率器件的输入电极或者输出电极连接；
    交流输出端，与所述导电层连接；
    其中：各所述极性相同的第一直流输入端在相对于所述功率器件的输入侧相连接。
  2. 如权利要求1所述的功率模块，其中，所述第一直流输入端的数量大于所述第二直流输入端，且多个所述第一直流输入端分布于所述第二直流输入端的两侧。
  3. 如权利要求2所述的功率模块，其中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片和第四导电片；
    其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第三导电片与所述第二直流输入端连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第四导电片连接，所述第二导电贴片与所述第三导电片连接。
  4. 如权利要求3所述的功率模块，其中，所述第一导电片与所述第二导电片连接，所述第二直流输入端跨越所述第一导电片与所述第二导电片连接部分设置。
  5. 如权利要求3所述的功率模块，其中，所述第一导电片与所述第二导电片通过连接件连接，所述连接件跨越所述第三导电片设置。
  6. 如权利要求5所述的功率模块，其中，所述第一导电片和所述第二导电片具有相对设置的凸片，所述连接件与所述凸片连接。
  7. 如权利要求3所述的功率模块，其中，所述第一导电片与所述第二导电片通过连接件连接；所述导电层还包括第十导电片，所述连接件还与所述第十导电片连接。
  8. 如权利要求3所述的功率模块，其中，所述第一导电片与所述第二导电片通过连接件连接；所述导电层还包括第十导电片，所述第十导电片底面垫设有垫板，所述连接件与所述第十导电片连接。
  9. 如权利要求2所述的功率模块，其中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片、第四导电片和第七导电片；
    其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第一导电片与所述第二导电片连接，所述第三导电片与所述第二直流输入端连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第四导电片连接，所述第二导电贴片与所述第七导电片连接，所述第三导电片与所述第七导电片通过连接件连接，且所述连接件跨越所述第一导电片与所述第二导电片的连接部分。
  10. 如权利要求2所述的功率模块，其中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片、第四导电片、第五导电片、第六导电片和第八导电片；
    其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第三导电片与所述第二直流输入端连接，部分所述功率器件与所述第五导电片连接，部分所述功率器件与所述第六导电片连接，其余所述功率器件与所述第八导电片连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第三导电片连接，所述第二导电贴片与所述第四导电片连接，所述第一导电片、所述第二导电片与所述第八导电片连接。
  11. 如权利要求10所述的功率模块，其中，所述第一导电片、所述第二导电片和所述第八导电片相互连接，所述第二直流输入端跨越所述第一导电片、所述第二导电片和所述第八导电片相互连接的部位设置。
  12. 如权利要求10所述的功率模块，其中，所述第一导电片、所述第二导电片分别与所述第八导电片连接。
  13. 如权利要求12所述的功率模块，其中，所述第一导电片、所述第二导电片通过金属板或者连接件与所述第八导电片连接。
  14. 如权利要求2所述的功率模块，其中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第一导电片、第二导电片、第三导电片、第四导电片、第五导电片、第六导电片、第八导电片、第九导电片和第十一导电片；
    其中：所述第一导电片与所述第一子直流输入端连接，所述第二导电片与所述第二子直流输入端连接，所述第三导电片与所述第二直流输入端连接，部分所述功率器件与所述第五导电片连接，部分所述功率器件与所述第六导电片连接，其余所述功率器件与所述第八导电片连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第九导电片和所述第十一导电贴片连接，所述第二导电贴片与所述第四导电片连接，所述第三导电片与所述第九导电片、所述第十一导电片分别连接，所述第一导电片、所述第二导电片与所述第八导电片连接。
  15. 如权利要求14所述的功率模块，其中，所述第三导电片与所述第九导电片、所述第十一导电片通过连接件连接，其中，所述第三导电片与所述第九导电片连接的连接件跨越所述第一导电片与所述第八导电片连接的部分，所述第三导电片与所述第十一导电片连接的连接件跨越所述第二导电片与所述第八导电片连接的部分。
  16. 如权利要求2所述的功率模块，其中，所述第一直流输入端包括第一子直流输入端和第二子直流输入端，所述导电层包括第三导电片、第四导电片、第五导电片、第六导电片和第八导电片；
    其中：第一子直流输入端和所述第二子直流输入端分别与所述第八导电片连接，所述第三导电片与所述第二直流输入端连接，部分所述功率器件与所述第五导电片连接，部分所述功率器件与所述第六导电片连接，其余所述功率器件与所述第八导电片连接；所述导电贴片包括第一导电贴片和第二导电贴片，所述第一导电贴片与所述第三导电片连接，所述第二导电贴片与所述第四导电片连接。
  17. 如权利要求16所述的功率模块，其中，所述第八导电片设有凸台，所述第一子直流输入端和所述第二子直流输入端分别与对应的所述凸台连接。
  18. 如权利要求17所述的功率模块，其中，所述第一导电贴片跨越所述凸台与所述第三导电片连接。
  19. 如权利要求5-9、13、15任意一项所述的功率模块，其中，所述连接件为绑定线或者金属带。
  20. 一种电机控制器，其中，所述电机控制器包括如权利要求1-19任意一项所述的功率模块。
PCT/CN2023/089567 2022-04-21 2023-04-20 功率模块和电机控制器 WO2023202676A1 (zh)

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