WO2023202002A1 - 半导体器件的加工控制方法及高能粒子束光刻设备 - Google Patents

半导体器件的加工控制方法及高能粒子束光刻设备 Download PDF

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Publication number
WO2023202002A1
WO2023202002A1 PCT/CN2022/124589 CN2022124589W WO2023202002A1 WO 2023202002 A1 WO2023202002 A1 WO 2023202002A1 CN 2022124589 W CN2022124589 W CN 2022124589W WO 2023202002 A1 WO2023202002 A1 WO 2023202002A1
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Prior art keywords
particle beam
energy particle
grayscale
integrated circuit
pixel
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PCT/CN2022/124589
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English (en)
French (fr)
Inventor
张启华
简维廷
蒋军浩
洪流
袁元
张勇为
张洁
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东华大学
洪启集成电路(珠海)有限公司
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Application filed by 东华大学, 洪启集成电路(珠海)有限公司 filed Critical 东华大学
Priority to CN202280017326.8A priority Critical patent/CN117157731A/zh
Priority to PCT/CN2022/124589 priority patent/WO2023202002A1/zh
Publication of WO2023202002A1 publication Critical patent/WO2023202002A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers

Definitions

  • Embodiments of the present application relate to the field of semiconductor processing technology, and in particular, to a processing control method for semiconductor devices and high-energy particle beam lithography equipment.
  • the high-energy particle beam in this application can be an ion beam, an electron beam, a laser beam, an X-ray, etc., among which the high-energy focused ion beam was used in the experiment.
  • High-energy particle beams have smaller wavelengths than ordinary optical systems, which can improve the resolution of layout transfer and are suitable for making smaller-sized devices. For example, due to wavelength limitations, DUV lithography machines are only suitable for producing devices with feature sizes greater than 7nm; for the production of devices below 7nm, EUV must be introduced. High-energy particle beams have smaller wavelengths than EUV.
  • Embodiments of the present application provide a processing control method for semiconductor devices and high-energy particle beam lithography equipment, which can complete the processing of semiconductor devices without making an integrated circuit mask and improve processing efficiency.
  • the technical solution is as follows:
  • embodiments of the present application provide a processing control method for semiconductor devices, including:
  • the integrated circuit layout includes several layers of integrated circuit sub-layouts, each layer of integrated circuit sub-layout corresponding to the pattern of one or more material layers of the target semiconductor device;
  • Each layer of the material is sequentially produced on the target substrate, and the high-energy particle beam lithography equipment is controlled to emit and act on the high-energy particle beam according to the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale negative film. Carve the pattern corresponding to the integrated circuit sub-layout into the corresponding material layer on the target substrate to obtain the target semiconductor device.
  • embodiments of the present application provide a high-energy particle beam lithography equipment, including: a processor, a memory, and a computer program stored in the memory and executable on the processor.
  • the processor executes
  • the computer program implements the steps of the method for controlling the processing of a semiconductor device as described in the first aspect.
  • the integrated circuit layout corresponding to the target semiconductor device is obtained; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to one or more layers of the target semiconductor device. Patterns of layers of material layers; convert several layers of integrated circuit sub-layouts into grayscale pictures in a preset format; perform color phase inversion of the grayscale pictures to obtain grayscale negatives corresponding to the grayscale pictures; according to The corresponding relationship between the preset high-energy particle beam processing parameters and the grayscale value is obtained, and the high-energy particle beam processing parameters corresponding to each pixel in the grayscale negative film are obtained; and corresponding layers of each layer are sequentially produced on the target substrate.
  • the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale negative film control the high-energy particle beam lithography equipment to emit high-energy particle beams and act on the corresponding material layer on the target substrate to engrave the Apply the pattern corresponding to the integrated circuit sub-layout to the corresponding material layer on the target substrate to obtain the target semiconductor device, so that there is no need to make multiple masks, and the grayscale negative film corresponding to the integrated circuit sub-layout can be directly used.
  • the high-energy particle beam processing parameters are automatically adjusted to complete the pattern engraving, and the semiconductor device is obtained. This method can not only save costs significantly, but also flexibly modify the integrated circuit layout, improve processing efficiency, and the grayscale
  • the processing of negative conversion of high-degree images can further improve the processing effect of the target semiconductor device.
  • Figure 1 is a schematic flowchart of a processing control method for a semiconductor device provided by an embodiment of the present application
  • FIG. 2 is a schematic flowchart of S105 in the processing control method of a semiconductor device provided by an embodiment of the present application;
  • Figure 3 is a schematic flowchart of a processing control method for a semiconductor device provided by another embodiment of the present application.
  • Figure 4 is a schematic flowchart of S208 in the processing control method of a semiconductor device provided by another embodiment of the present application.
  • Figure 5 is a schematic flowchart of a processing control method for a semiconductor device provided by other embodiments of the present application.
  • FIG. 6 is a schematic flowchart of S306 in the processing control method of semiconductor devices provided by other embodiments of the present application.
  • FIG. 7 is a schematic flowchart of S308 in the processing control method of semiconductor devices provided by other embodiments of the present application.
  • Figure 8 is a schematic structural diagram of a high-energy particle beam lithography equipment provided by an embodiment of the present application.
  • first, second, third, etc. may be used in this application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other.
  • first information may also be called second information, and similarly, the second information may also be called first information.
  • the words "if"/"if” as used herein may be interpreted as "when” or "when” or "in response to determining.”
  • Figure 1 is a schematic flow chart of a processing control method for a semiconductor device provided by one embodiment of the present application.
  • the method includes the following steps:
  • S101 Obtain the integrated circuit layout corresponding to the target semiconductor device; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to the pattern of one or more material layers of the target semiconductor device. .
  • the execution subject of the semiconductor device processing control method may be a high-energy particle beam lithography equipment, or may be a component of the high-energy particle beam lithography equipment, such as its internal processor or Microprocessor, etc.; in another optional embodiment, the execution subject of the processing control method of the semiconductor device can be an external device that establishes a data connection with the high-energy particle beam lithography equipment, or it can be a component in the external device part.
  • the execution subject of the semiconductor device processing control method is high-energy particle beam lithography equipment.
  • high-energy particle beam lithography equipment obtains the integrated circuit layout corresponding to the target semiconductor device.
  • the target semiconductor device may be any type of semiconductor device, and its specific type is not limited here.
  • the integrated circuit layout refers to mapping the circuit design circuit diagram or circuit description language to the physical description level.
  • the integrated circuit layout includes the device type, device size, relative position between the devices and the connection relationship between the various devices, etc. Relevant physical information.
  • the integrated circuit layout includes several layers of integrated circuit sub-layouts, each of which corresponds to a pattern of a material layer of the target semiconductor device.
  • the material layer includes but is not limited to an active layer, an insulating layer, a polysilicon gate layer, a metal layer, etc.
  • S102 Convert several layers of integrated circuit sub-layouts into grayscale images in a preset format.
  • High-energy particle beam lithography equipment converts several layers of integrated circuit sub-layouts into grayscale images in a preset format.
  • the preset format is a TIF format.
  • the preset format may be other image formats that can be identifiably processed by high-energy particle beams.
  • the gray value of the pixel in the grayscale picture ranges from 0 to 255.
  • a gray value of 0 indicates that the brightness of the pixel is low and the human body subjectively perceives it as black.
  • a gray value of 255 indicates that the brightness of the pixel is high.
  • the human body The subjective visual perception is that it is white.
  • S103 Perform color phase inversion on the grayscale image, and obtain a grayscale negative corresponding to the grayscale image.
  • a negative film is an image obtained after exposure and development processing.
  • the light and dark of a grayscale negative film are opposite to the original grayscale image. Converting a grayscale image into a grayscale negative film can highlight the white details or gray details in the dark areas of the image, thereby making subsequent When processing semiconductor devices based on grayscale negative films, the processing effect of semiconductor devices can be improved.
  • the corresponding relationship between the preset high-energy particle beam processing parameters and the grayscale value can be preset and stored in the high-energy particle beam lithography equipment. In another optional embodiment, the corresponding relationship between the preset high-energy particle beam processing parameters and the gray value can be preset and stored in the cloud or a host computer, and then downloaded to the high-energy particle beam when used. in particle beam lithography equipment.
  • the corresponding relationship between the corresponding high-energy particle beam processing parameters and the gray value is also different.
  • the corresponding relationship between the corresponding high-energy particle beam processing parameters and the gray value can be found based on the identification of the semiconductor device, or the corresponding relationship between the corresponding high-energy particle beam processing parameters and the gray value can be found based on the material identification of the material layer. Find the correspondence between the corresponding high-energy particle beam processing parameters and grayscale values.
  • a third-party semiconductor device design manufacturer can upload the designed semiconductor device identification or material identification to the cloud, and configure the corresponding relationship between the corresponding high-energy particle beam processing parameters and grayscale values. , thus enabling high-energy particle beam lithography equipment to control high-energy particle beam lithography equipment to complete the processing of more types of semiconductor devices and meet the needs of more third-party customers.
  • the high-energy particle beam processing parameters include high-energy particle beam acceleration voltage and/or high-energy particle beam action time.
  • the high-energy particle beam lithography equipment is based on the preset high-energy particle beam.
  • the corresponding relationship between particle beam processing parameters and grayscale values is to obtain the high-energy particle beam processing parameters corresponding to each pixel in the grayscale negative film, as follows:
  • the high-energy particle beam lithography equipment obtains the high-energy particle beam acceleration voltage corresponding to each pixel in the gray-scale negative film based on the grayscale value of the pixel in the gray-scale negative film.
  • the grayscale of the pixel in the gray-scale negative film The smaller the value, the lower the high-energy particle beam acceleration voltage of the high-energy particle beam lithography equipment.
  • the gray value of the pixel point in the grayscale negative film is larger, the high-energy particle beam acceleration voltage of the high-energy particle beam lithography equipment is made.
  • the higher the accelerating voltage of the high-energy particle beam the higher the kinetic energy of the emitted high-energy particle beam. Therefore, more material can be carved away and deeper material ravines can be obtained in the same time.
  • the high-energy particle beam lithography equipment obtains the high-energy particle beam action time corresponding to each pixel in the gray-scale negative film based on the gray value of the pixel in the gray-scale negative film.
  • the pixel point in the gray-scale negative film The smaller the grayscale value is, the shorter the high-energy particle beam action time of the high-energy particle beam lithography equipment is.
  • the high-energy particle beam lithography equipment is made. The longer the high-energy particle beam is exposed to. The longer the high-energy particle beam acts, the more material can be carved away and deeper material ravines can be obtained when other control conditions remain unchanged.
  • the high-energy particle beam lithography equipment obtains the grayscale average value of all pixels in the grayscale negative film.
  • the grayscale average value is smaller, the high-energy particle beam acceleration voltage of the high-energy particle beam lithography equipment is increased.
  • the high-energy particle beam action time corresponding to each pixel point in the gray-scale negative film is obtained when the high-energy particle beam acceleration voltage remains unchanged.
  • the grayscale value of the pixel in the grayscale negative film is larger, the shorter the grayscale value of the pixel in the grayscale negative film is. The longer the high-energy particle beam action time of the high-energy particle beam lithography equipment is. Through the coordination of high-energy particle beam acceleration voltage and high-energy particle beam action time, the manufacturing process of semiconductor devices can be further accelerated and the manufacturing efficiency can be improved.
  • S105 Make each corresponding material layer on the target substrate in sequence, and control the high-energy particle beam lithography equipment to emit high-energy particle beams according to the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale negative film. And act on the corresponding material layer on the target substrate, carve the pattern corresponding to the integrated circuit sub-layout into the corresponding material layer on the target substrate, and obtain the target semiconductor device.
  • the material layer is a pre-processed material layer, and each corresponding layer of the material layer is sequentially placed on the target substrate by controlling mechanical equipment.
  • the material layer is a material layer deposited by controlling high-energy particle beam lithography equipment. Specifically, please refer to Figure 2. Each corresponding layer is sequentially produced on the target substrate.
  • the material layer includes steps S1051 to S1052, as follows:
  • S1051 Obtain the material gas corresponding to the material layer and the corresponding deposition area of the material layer on the target substrate.
  • the material gas may be one type of gas or multiple types of gases, which vary according to the differences of the material layers.
  • each material layer includes multiple materials. For example, a layer of oxide is first plated on the surface of single crystal silicon. Silicon, and then plating a layer of tantalum on the surface of silicon oxide, correspondingly requires a variety of material gases when preparing such a material layer.
  • S1052 Control the high-energy particle beam lithography equipment to inject the material gas in the deposition area, so that the material gas is decomposed and deposited in the deposition area to complete the production of the material layer.
  • the material gas is sprayed in the deposition area through the gas injection device in the high-energy particle beam lithography equipment, and the high-energy particle beam is simultaneously emitted to decompose the material gas, so that The decomposed material gas is deposited in the deposition area to complete the production of the material layer.
  • the above method can complete the laying of material layers and engraving of patterns by controlling a high-energy particle beam lithography equipment, and realize the processing of semiconductor devices. It can not only reduce costs, but also achieve a higher degree of automation.
  • the high-energy particle beam lithography equipment can also use the preset optimized thickness range and/or the preset optimized flatness range. , control the high-energy particle beam to polish the material layer so that the current thickness and/or current flatness of the material layer are within the preset optimized thickness range and the preset optimized flatness range respectively, This further improves the subsequent engraving effect and optimizes the processing of semiconductor devices.
  • the preset optimized thickness range is from 1 nm to 500 nm, and the preset optimized flatness range is from 0.5 nm to 5 nm.
  • the processing accuracy requirements for engraving are different.
  • the high-energy particle beam lithography equipment is controlled to emit high-energy particle beams and act on the target substrate accordingly. Before the material layer, the high-energy particle beam lithography equipment can control the electromagnetic lens to shrink the high-energy particle beam according to the preset engraving size threshold, so that the high-energy particle beam engraving pixel size is smaller than the engraving size threshold.
  • the integrated circuit layout corresponding to the target semiconductor device is obtained; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to one or more layers of the target semiconductor device. Patterns of layers of material layers; convert several layers of integrated circuit sub-layouts into grayscale pictures in a preset format; perform color phase inversion of the grayscale pictures to obtain grayscale negatives corresponding to the grayscale pictures; according to The corresponding relationship between the preset high-energy particle beam processing parameters and the grayscale value is obtained, and the high-energy particle beam processing parameters corresponding to each pixel in the grayscale negative film are obtained; and corresponding layers of each layer are sequentially produced on the target substrate.
  • the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale negative film control the high-energy particle beam lithography equipment to emit high-energy particle beams and act on the corresponding material layer on the target substrate to engrave the Apply the pattern corresponding to the integrated circuit sub-layout to the corresponding material layer on the target substrate to obtain the target semiconductor device, so that there is no need to make multiple masks, and the grayscale negative film corresponding to the integrated circuit sub-layout can be directly used.
  • the high-energy particle beam processing parameters are automatically adjusted to complete the pattern engraving, and the semiconductor device is obtained. This method can not only save costs significantly, but also flexibly modify the integrated circuit layout, improve processing efficiency, and the grayscale
  • the processing of negative conversion of high-degree images can further improve the processing effect of the target semiconductor device.
  • Figure 3 is a schematic flow chart of a processing control method for semiconductor devices provided by another embodiment of the present application, including steps S201 ⁇ S208, where steps S201 ⁇ S203 and S207 are respectively the same as step S101.
  • steps S201 ⁇ S203 and S207 are respectively the same as step S101.
  • steps S103 and S104 are the same, the details are as follows:
  • S201 Obtain the integrated circuit layout corresponding to the target semiconductor device; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to the pattern of one or more material layers of the target semiconductor device. .
  • S202 Convert several layers of integrated circuit sub-layouts into grayscale images in a preset format.
  • S203 Perform color phase inversion on the grayscale image, and obtain a grayscale negative corresponding to the grayscale image.
  • S204 Obtain the target pixel point in the grayscale negative film corresponding to the integrated circuit sub-layout of each layer and the coordinates of the target pixel point in the grayscale negative film; wherein the target pixel point has a grayscale value higher than Preset threshold pixels.
  • the grayscale negative corresponding to the integrated circuit sublayout there may be some target pixels whose grayscale values are higher than the preset threshold, indicating that the coordinates of the target pixels in the corresponding material layer need to be penetrated by high-energy particle beams.
  • the preset threshold is related to the preset corresponding relationship between the high-energy particle beam processing parameters and the gray value, and can be set according to the actual situation, and is not limited here.
  • target pixels with the same coordinates in the grayscale negatives corresponding to the integrated circuit sublayouts of the i to jth layers, then these target pixels are the pixels to be adjusted, and by adjusting the grayscale values of the pixels to be adjusted, This prevents engraving at the coordinates of the pixels to be adjusted when engraving the corresponding material layer.
  • the integrated circuit sub-layout has n layers in total, 1 ⁇ i ⁇ j ⁇ n.
  • S206 Reset the grayscale values of the pixels to be adjusted in the grayscale negative film corresponding to the integrated circuit sublayout of the i-th layer to the jth layer according to the preset adjustment strategy.
  • the grayscale value of the pixel to be adjusted in the grayscale negative film corresponding to the integrated circuit sublayout of the i-th layer to the jth layer is set to the lowest value, that is, 0, so that when engraving When describing the pattern corresponding to the integrated circuit sub-layout of the i-th layer to the j-th layer, the pattern composed of the pixels to be adjusted will not be engraved.
  • the high-energy particle beam lithography equipment first obtains the first gray value corresponding to the lowest high-energy particle beam processing parameter.
  • High-energy particle beam processing parameters include high-energy particle beam acceleration voltage and/or high-energy particle beam action time.
  • the corresponding gray value is A grayscale value.
  • the first gray-scale value will also be different and is not necessarily 0, and its specific value is not limited here.
  • the high-energy particle beam lithography equipment sets the grayscale values at the same pattern in the grayscale negatives corresponding to the i-th to j-th layers of the integrated circuit sub-layout as the first grayscale value, so that It is also possible that when engraving the pattern corresponding to the integrated circuit sub-layout of the i-th layer to the j-th layer, the pattern composed of the pixels to be adjusted will not be engraved.
  • S208 Make each corresponding material layer on the target substrate in sequence, and control the high-energy particle beam lithography equipment to emit high-energy particle beams according to the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale negative film. And act on the corresponding material layer on the target substrate, carve the pattern corresponding to the integrated circuit sub-layout into the corresponding material layer on the target substrate, and obtain the target semiconductor device.
  • step S208 and step S105 are the same. Each material layer is provided, and the pattern corresponding to the integrated circuit sub-layout is carved on the material layer to finally obtain the target semiconductor device.
  • Step S208 includes step S2081. ⁇ S2082, the specific differentiation process is as follows:
  • S2081 Sequentially make the i-th to j-th material layers on the target substrate, respectively, according to the high-energy particle beam processing parameters corresponding to each pixel in the grayscale negative film corresponding to the i-th to j-th layers of the integrated circuit sub-layout. , control the high-energy particle beam lithography equipment to emit high-energy particle beams to act on the i-th to j-th material layers, and engrave the i-th to j-th layers of the integrated circuit sub-layout except for the pixels to be adjusted. All patterns except patterns go to the corresponding ith to jth material layers.
  • the high-energy particles are controlled according to the high-energy particle beam processing parameters corresponding to each pixel in the grayscale negative corresponding to the integrated circuit sub-layout of the layer.
  • the beam lithography equipment emits a high-energy particle beam to act on the material layer, and engraves all patterns corresponding to the integrated circuit sub-layout of the layer, except the pattern composed of the pixels to be adjusted, into the material layer.
  • the high-energy particle beam lithography equipment After the high-energy particle beam lithography equipment has carved all the patterns corresponding to the j-th layer integrated circuit sub-layout except the pattern composed of the pixel points to be adjusted to the j-th layer of material, it will then use the coordinates of the pixel points to be adjusted according to the coordinates of the pixel points to be adjusted. , controlling the high-energy particle beam lithography equipment to emit a high-energy particle beam to act on the coordinates of the pixel point to be adjusted in the j-th material layer, and penetrate the i-th layer material at the coordinates of the pixel point to be adjusted. layer.
  • the high-energy particle beam processing parameters that penetrate each material layer can be obtained according to experiments and pre-stored in the high-energy particle beam lithography equipment.
  • the corresponding high-energy particle beam processing parameters can be found according to the identification of the material layer, thereby obtaining to the processing parameters of high-energy particle beams penetrating the i to jth layers.
  • the gray-scale negative film corresponding to the integrated circuit sub-layout of the i-th layer to the j-th layer is obtained.
  • the grayscale value of the pixels to be adjusted is reset through the adjustment strategy, so that the integrated circuit sub-layout corresponding to the i-th layer to the j-th layer is carved.
  • the high-energy particles are uniformly controlled according to the coordinates of the pixels to be adjusted.
  • the beam lithography equipment emits high-energy particle beams to act on the coordinates of the pixels to be adjusted in the jth material layer, and penetrates the i to jth material layers at the coordinates of the pixels to be adjusted to achieve merged engraving. Effectively improve the processing efficiency of semiconductor devices.
  • FIG. 5 is a schematic flowchart of a processing control method for semiconductor devices provided by other embodiments of the present application, including steps S301 to S308, where steps S301 to S304 and S307 are respectively the same as step S201.
  • steps S301 to S304 and S307 are respectively the same as step S201.
  • steps S301 to S304 and S307 are respectively the same as step S201.
  • steps S301 to S304 and S307 are respectively the same as step S201.
  • ⁇ S204 and S207 are the same, the details are as follows:
  • S301 Obtain the integrated circuit layout corresponding to the target semiconductor device; wherein the integrated circuit layout includes several layers of integrated circuit sub-layouts, and each layer of integrated circuit sub-layout corresponds to the pattern of one or more material layers of the target semiconductor device. .
  • S302 Convert several layers of integrated circuit sub-layouts into grayscale images in a preset format.
  • S303 Perform color phase inversion on the grayscale image, and obtain a grayscale negative corresponding to the grayscale image.
  • S304 Obtain the target pixel point in the grayscale negative film corresponding to the integrated circuit sub-layout of each layer and the coordinates of the target pixel point in the grayscale negative film; wherein the target pixel point has a grayscale value higher than Preset threshold pixels.
  • S306 Reset the grayscale values of the pixels to be adjusted in the grayscale negative film corresponding to the integrated circuit sublayout of the i-th layer to the jth layer according to the preset adjustment strategy.
  • the adjustment strategy preset in step S306 is different from the adjustment strategy preset in step S206. Specifically:
  • step S306 when setting the grayscale value of the pixel to be adjusted in the grayscale negative film corresponding to the integrated circuit sub-layout of the i-th to j-1th layers, it is the same as step S206. The difference is that in step S306, the first pixel is set separately.
  • Step S306 includes steps S3061 to S3064:
  • S3061 Set the grayscale value of the pixel to be adjusted in the grayscale negative corresponding to the integrated circuit sub-layout of the i-th to j-1th layers to the lowest value, or obtain the lowest high-energy particle beam processing parameter corresponding to the A grayscale value, the grayscale value of the pixel to be adjusted in the grayscale negative film corresponding to the integrated circuit sub-layout of the i-th layer to the j-1th layer is set as the first grayscale value.
  • S3062 Obtain the processing parameters of the target high-energy particle beam penetrating the i-th to j-th material layers.
  • the high-energy particle beam processing parameters that penetrate each material layer can be obtained based on experiments and pre-stored in the high-energy particle beam lithography equipment.
  • the corresponding high-energy particle beam processing parameters can be found according to the identification of the material layer, thereby obtaining the penetration High-energy particle beam processing parameters for layers i to j.
  • S3063 Obtain the second grayscale value according to the corresponding relationship between the target high-energy particle beam processing parameters and the preset high-energy particle beam processing parameters and grayscale values.
  • the high-energy particle beam lithography equipment obtains the second grayscale value according to the preset correspondence relationship between the high-energy particle beam processing parameters and the grayscale value and the target high-energy particle beam processing parameters.
  • the high-energy particle beam lithography equipment sets the grayscale value of the pixel to be adjusted in the grayscale negative corresponding to the integrated circuit sub-layout of the jth layer to the second grayscale value, which makes it possible to engrave the jth layer material layer, if the high-energy particle beam equipment determines that the gray value of a certain pixel is the second gray value, it will control the high-energy particle beam to act on the j-th pixel according to the target high-energy particle beam processing parameters corresponding to the second gray value.
  • the high-energy particle beam penetrates the i-th to j-th material layers at the coordinates of the pixel point.
  • S308 Make each corresponding material layer on the target substrate in sequence, and control the high-energy particle beam lithography equipment to emit high-energy particle beams according to the high-energy particle beam processing parameters corresponding to each pixel in the gray-scale negative film. And act on the corresponding material layer on the target substrate, carve the pattern corresponding to the integrated circuit sub-layout into the corresponding material layer on the target substrate, and obtain the target semiconductor device.
  • Step S308 includes steps S3081 ⁇ S3082, specifically as follows:
  • S3081 Make the i-th to j-1-th material layers in sequence on the target substrate, respectively, according to the high-energy values corresponding to each pixel in the grayscale negative film corresponding to the i-th to j-1-th layer of the integrated circuit sub-layout.
  • Particle beam processing parameters control the high-energy particle beam lithography equipment to emit high-energy particle beams to act on the i-th to j-1-th material layers, and engrave the i-th to j-1-th layers corresponding to the integrated circuit sub-layout. All patterns other than the pattern composed of pixels to be adjusted are moved to the corresponding i-th to j-1-th material layers.
  • the high-energy particle beam processing parameters corresponding to each pixel in the grayscale negative corresponding to the integrated circuit sub-layout of this layer are controlled.
  • the high-energy particle beam lithography equipment emits a high-energy particle beam to act on the material layer, and engraves all patterns corresponding to the integrated circuit sub-layout of the layer, except the pattern composed of the pixels to be adjusted, into the material layer.
  • S3082 Set the jth material layer on the target substrate, control the high-energy particle beam lithography equipment to emit high-energy particle beams to act on the jth material layer, and engrave the jth integrated circuit sub-layout The corresponding pattern reaches the j-th material layer and penetrates the j-th to i-th material layers at the coordinates of the pixel point to be adjusted.
  • the grayscale value of the pixel to be adjusted is set to the second grayscale value
  • the high-energy particle beam lithography equipment engraves the pixel to be adjusted in the jth layer material layer
  • a high-energy particle beam will be emitted to act on the coordinates of the pixel point to be adjusted according to the target high-energy particle beam processing parameters corresponding to the second gray value, so that the high-energy particle beam penetrates the j to i layer material layer.
  • the gray-scale negative film corresponding to the integrated circuit sub-layout of the i-th layer to the j-th layer is obtained.
  • target pixels with the same coordinates that is, the pixels to be adjusted, and then the grayscale values of the pixels to be adjusted in the i to j-1 layers and the grayscale of the pixels to be adjusted in the jth layer are respectively reset through the adjustment strategy.
  • the high-energy particle beam lithography equipment is controlled to emit a high-energy particle beam to act on the coordinates of the pixel point to be adjusted.
  • the coordinates of the pixels to be adjusted penetrate the material layers of the i to jth layers to realize the merged engraving of the pattern corresponding to the integrated circuit sub-layout of the jth layer and the pattern composed of the pixels to be adjusted in the i to j-1 layers, further improving the Improve the processing efficiency of semiconductor devices.
  • the high-energy particle beam lithography apparatus 8 may include: a processor 80 , a memory 81 , and a computer program 82 stored in the memory 81 and capable of running on the processor 80 , for example: a semiconductor device Processing control program; when the processor 80 executes the computer program 82, it implements the steps in the above method embodiments, such as steps S101 to S105 shown in Figure 1.
  • the processor 80 may include one or more processing cores.
  • the processor 80 uses various interfaces and lines to connect various parts of the high-energy particle beam lithography equipment 8 by running or executing instructions, programs, code sets or instruction sets stored in the memory 81 , and calling the memory 81 . data, perform various functions of the high-energy particle beam lithography equipment 8 and process data.
  • the processor 80 can use digital signal processing (Digital Signal Processing, DSP), field-programmable gate array (Field-Programmable Gate Array, It is implemented in at least one hardware form among FPGA) and Programmable Logic Array (PLA).
  • the processor 80 may integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processor (Graphics Processing Unit, GPU), a modem, etc.
  • CPU Central Processing Unit
  • GPU Graphics Processing Unit
  • modem etc.
  • the CPU mainly processes the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content that needs to be displayed on the touch screen; the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 80 and may be implemented by a separate chip.
  • the memory 81 may include random access memory (RAM) or read-only memory (Read-Only Memory).
  • the memory 81 includes non-transitory computer-readable storage medium.
  • Memory 81 may be used to store instructions, programs, codes, sets of codes, or sets of instructions.
  • the memory 81 may include a program storage area and a data storage area, where the program storage area may store instructions for implementing the operating system, instructions for at least one function (such as touch instructions, etc.), and instructions for implementing each of the above method embodiments. instructions, etc.; the storage data area can store data, etc. involved in each of the above method embodiments.
  • the memory 81 may optionally be at least one storage device located away from the aforementioned processor 80 .

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Abstract

本发明涉及一种半导体器件的加工控制方法及高能粒子束光刻设备，所述半导体器件的加工控制方法包括：获取目标半导体器件对应的集成电路版图；将若干层集成电路子版图分别转化为预设格式的灰度图片；对灰度图片进行色相反转，获取灰度图片对应的灰度负片；根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取灰度负片中各像素点对应的高能粒子束加工参数；在目标基材上依次制作相应的每一层所述材料层，并分别根据灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于目标基材上相应的材料层，得到目标半导体器件。相对于现有技术，本申请无需用到集成电路掩膜版，提升了雕刻效果和加工效率，降低了生产成本。

Description

半导体器件的加工控制方法及高能粒子束光刻设备 技术领域
本申请实施例涉及半导体加工技术领域，尤其涉及一种半导体器件的加工控制方法及高能粒子束光刻设备。
背景技术
在传统的半导体加工技术领域中，往往都是基于集成电路掩膜版与光刻技术的结合，实现将集成电路版图转移至硅基材上，进而完成半导体器件的制造。
但是，随着对半导体器件的尺寸要求越来越高，支撑光刻技术的光源系统(如EUV光刻机)的制造和集成电路掩膜版的制作变得越发艰难，使用集成电路掩膜版也会使半导体器件的制造成本巨大，并且，若对集成电路版图进行修改或微调，则需要再重新制作掩膜版，致使加工效率低下。
本申请中的高能粒子束可以是离子束、电子束、激光束、X射线等，其中实验用到的是高能聚焦离子束。高能粒子束拥有比普通光学系统更小的波长，可以提升版图转移的分辨率，适合于制作更小尺寸的器件。比如DUV光刻机因为波长的限制，只适用于制作特征尺寸大于7nm的器件；对于7nm以下的器件制作，必须要引入EUV。而高能粒子束拥有比EUV更小的波长。
发明内容
本申请实施例提供了一种半导体器件的加工控制方法及高能粒子束光刻设备，可以在不制作集成电路掩膜版完成半导体器件的加工处理，提高加工效率，所述技术方案如下:
第一方面，本申请实施例提供了一种半导体器件的加工控制方法，包括：
获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的图案；
将若干层所述集成电路子版图分别转化为预设格式的灰度图片；
对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片；
根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数；
在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层， 得到所述目标半导体器件。
第二方面，本申请实施例提供了一种高能粒子束光刻设备，包括：处理器、存储器以及存储在所述存储器中并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如第一方面所述的半导体器件的加工控制方法的步骤。
本申请实施例中，通过获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的图案；将若干层所述集成电路子版图分别转化为预设格式的灰度图片；对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片；根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数；在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件，使得不需要制作多张掩膜版，就可以直接根据集成电路子版图对应的灰度负片中各像素点的灰度值，自动调节高能粒子束加工参数完成图案雕刻，得到半导体器件，这种方式既能够大幅节约成本，还可以灵活地修改集成电路版图，提高加工效率，并且其中对灰度图片进行负片转化的处理还能够进一步提高目标半导体器件的加工效果。
为了更好地理解和实施，下面结合附图详细说明本申请的技术方案。
附图说明
图1为本申请一个实施例提供的半导体器件的加工控制方法的流程示意图；
图2为本申请一个实施例提供的半导体器件的加工控制方法中S105的流程示意图；
图3为本申请另一个实施例提供的半导体器件的加工控制方法的流程示意图；
图4为本申请另一个实施例提供的半导体器件的加工控制方法中S208的流程示意图；
图5为本申请其他实施例提供的半导体器件的加工控制方法的流程示意图；
图6为本申请其他实施例提供的半导体器件的加工控制方法中S306的流程示意图；
图7为本申请其他实施例提供的半导体器件的加工控制方法中S308的流程示意图；
图8为本申请一个实施例提供的高能粒子束光刻设备的结构示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书 中所详述的、本申请的一些方面相一致的装置和方法的例子。
在本申请使用的术语是仅仅出于描述特定实施例的目的，而非旨在限制本申请。在本申请和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式，除非上下文清楚地表示其他含义。还应当理解，本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。
应当理解，尽管在本申请可能采用术语第一、第二、第三等来描述各种信息，但这些信息不应限于这些术语。这些术语仅用来将同一类型的信息彼此区分开。例如，在不脱离本申请范围的情况下，第一信息也可以被称为第二信息，类似地，第二信息也可以被称为第一信息。取决于语境，如在此所使用的词语“如果”/“若”可以被解释成为“在……时”或“当……时”或“响应于确定”。
请参阅图1，为本申请一个实施例提供的半导体器件的加工控制方法的流程示意图，所述方法包括如下步骤：
S101：获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的图案。
在一个可选的实施例中，所述半导体器件的加工控制方法的执行主体可以为高能粒子束光刻设备，也可以为高能粒子束光刻设备中的组成部件，例如其内部的处理器或微处理器等；在另一个可选的实施例中，所述半导体器件的加工控制方法的执行主体可以为与高能粒子束光刻设备建立数据连接的外部设备，也可以为外部设备中的组成部件。
在本申请实施例中，所述半导体器件的加工控制方法的执行主体为高能粒子束光刻设备。
具体地，高能粒子束光刻设备获取目标半导体器件对应的集成电路版图。
其中，所述目标半导体器件可以为任意类型的半导体器件，对于其具体类型在此不进行限定。
所述集成电路版图是指将电路设计电路图或电路描述语言映射到物理描述层面，集成电路版图中包括集成电路的器件类型、器件尺寸、器件之间的相对位置以及各个器件之间的连接关系等相关物理信息。
所述集成电路版图中包括若干层集成电路子版图，每一层集成电路子版图分别对应目标半导体器件一层材料层的图案。
在本申请实施例中，所述材料层包括但不仅限于有源层、绝缘层、多晶硅栅极层和金属层等。
S102：将若干层所述集成电路子版图分别转化为预设格式的灰度图片。
高能粒子束光刻设备将若干层所述集成电路子版图分别转化为预设格式的灰度图片。在一个可选的实施例中，所述预设格式为TIF格式，在其他可选的实施例中，所述预设格式可以为高能粒子束可识别处理的其他图片格式。
所述灰度图片中像素点的灰度值为0至255，灰度值为0表示像素点亮度较低，人体主观视觉感受其为黑色，灰度值为255表示像素点亮度较高，人体主观视觉感受其为白色。
S103：对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片。
负片是经过曝光和显影加工后得到的影像，灰度负片的明暗与原灰度图片是相反的，将灰度图片转化为灰度负片能够突出图片暗区域的白色细节或者灰色细节，从而使得后续基于灰度负片进行半导体器件加工时，能够提高半导体器件的加工效果。
将图片进行色相反转，获取负片的方式有多种，在此不进行具体限定。
S104：根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数。
在一个可选的实施例中，所述预设的高能粒子束加工参数与灰度值之间的对应关系可以预先设置并存储在所述高能粒子束光刻设备中。在另一个可选的实施例中，所述预设的高能粒子束加工参数与灰度值之间的对应关系可以预先设置并存储在云端或上位机中，在使用时再下载至所述高能粒子束光刻设备中。
根据半导体器件类型的不同或者材料层的材料差异，相应的高能粒子束加工参数与灰度值之间的对应关系也不同。在所述高能粒子束光刻设备、云端或上位机中，可以根据半导体器件的标识，查找相应的高能粒子束加工参数与灰度值之间的对应关系，也可以根据材料层的材料标识，查找相应的高能粒子束加工参数与灰度值之间的对应关系。
在一个可选的实施例中，第三方半导体器件设计厂家可以将设计的半导体器件标识或材料标识上传至所述云端中，并配置相应的高能粒子束加工参数与灰度值之间的对应关系，从而能够使得高能粒子束光刻设备能够控制高能粒子束光刻设备完成更多类型的半导体器件的加工，满足更多的第三方客户需求。
在本申请实施例中，所述高能粒子束加工参数包括高能粒子束加速电压和/或高能粒子束作用时间，为更精准地对半导体器件进行加工，高能粒子束光刻设备根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数，具体如下：
高能粒子束光刻设备根据所述灰度负片中像素点的灰度值，获取所述灰度负片中各像素点对应的高能粒子束加速电压，当所述灰度负片中像素点的灰度值越小时，使所述高能粒子束光刻设备的高能粒子束加速电压越低，当所述灰度负片中像素点的灰度值越大时，使所述 高能粒子束光刻设备的高能粒子束加速电压越高。高能粒子束加速电压越高，发射出的高能粒子束的动能越高，因而在相同的时间内，能够雕刻掉更多的材料，得到更深的材料沟壑。
或者，高能粒子束光刻设备根据所述灰度负片中像素点的灰度值，获取所述灰度负片中各像素点对应的高能粒子束作用时间，当所述灰度负片中像素点的灰度值越小时，使所述高能粒子束光刻设备的高能粒子束作用时间越短，当所述灰度负片中像素点的灰度值越大时，使所述高能粒子束光刻设备的高能粒子束作用时间越长。高能粒子束作用时间越长，在其他控制条件不变的情况下，也能够雕刻掉更多的材料，得到更深的材料沟壑。
或者，高能粒子束光刻设备获取所述灰度负片中所有像素点的灰度均值，当所述灰度均值越小时，使所述高能粒子束光刻设备的所述高能粒子束加速电压越低，并根据所述灰度负片中像素点的灰度值，获取在所述高能粒子束加速电压不变的情况下所述灰度负片中各像素点对应的高能粒子束作用时间，当所述灰度负片中像素点的灰度值越小时，使所述高能粒子束光刻设备的高能粒子束作用时间越短，当所述灰度负片中像素点的灰度值越大时，使所述高能粒子束光刻设备的高能粒子束作用时间越长。通过高能粒子束加速电压与高能粒子束作用时间的配合，能够进一步加快半导体器件的制作过程，提高制作效率。
S105：在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件。
在一个可选的实施例中，所述材料层为预先加工好的材料层，通过控制机械设备在目标基材上依次放置相应的每一层所述材料层。
在另一个可选的实施例中，所述材料层为通过控制高能粒子束光刻设备沉积的材料层，具体地，请参阅图2，所述在目标基材上依次制作相应的每一层所述材料层包括步骤S1051～S1052，如下：
S1051：获取所述材料层对应的材料气体和所述材料层在所述目标基材上对应的沉积区域。
所述材料气体可以为一种气体或多种气体，根据材料层的差异性而不同。
在某些实施例中，为了使高能粒子束能够在材料层上雕刻出更好地图形效果，每一层材料层中包括多种材料，例如，在单晶硅的表面先镀上一层氧化硅，再在氧化硅的表面镀一层钽，那么相应的在制备这样的材料层时也需要多种材料气体。
S1052：控制所述高能粒子束光刻设备在所述沉积区域喷射所述材料气体，使所述材料气体分解后沉积在所述沉积区域，完成所述材料层的制作。
由于高能粒子束能分解金属蒸汽或气相绝缘材料等，因而通过所述高能粒子束光刻设备 中的气体喷射装置在所述沉积区域喷射所述材料气体，同时发射高能粒子束分解材料气体，使分解后的材料气体沉积在沉积区域，完成材料层的制作。
上述方式通过控制一台高能粒子束光刻设备，就能完成材料层的铺设和图形的雕刻，实现半导体器件的加工，不仅能够减低成本，而且自动化程度更高。
在一个可选的实施例中，每在目标基材上制作完一层所述材料层后，高能粒子束光刻设备还可以根据预设的优化厚度范围和/或预设的优化平整度范围，控制所述高能粒子束对所述材料层进行打磨，使所述材料层的当前厚度和/或当前平整度分别在所述预设的优化厚度范围和预设的优化平整度范围之内，从而进一步提高后续的雕刻效果，优化半导体器件的加工。
可选的，所述预设的优化厚度范围为1nm至500nm，所述预设的优化平整度范围为0.5nm～5nm。
在另一个可选的实施例中，由于不同器件的性质和用途的不同，因而对于雕刻的加工精度要求不同，在控制高能粒子束光刻设备发射高能粒子束并作用于目标基材上相应的材料层之前，高能粒子束光刻设备可以根据预设的雕刻尺寸阈值，控制电磁透镜进行所述高能粒子束微缩，使所述高能粒子束雕刻像素点尺寸小于所述雕刻尺寸阈值。
本申请实施例中，通过获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的图案；将若干层所述集成电路子版图分别转化为预设格式的灰度图片；对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片；根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数；在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件，使得不需要制作多张掩膜版，就可以直接根据集成电路子版图对应的灰度负片中各像素点的灰度值，自动调节高能粒子束加工参数完成图案雕刻，得到半导体器件，这种方式既能够大幅节约成本，还可以灵活地修改集成电路版图，提高加工效率，并且其中对灰度图片进行负片转化的处理还能够进一步提高目标半导体器件的加工效果。
为提高半导体器件的加工效率，请参阅图3，其为本申请另一个实施例提供的半导体器件的加工控制方法的流程示意图，包括步骤S201～S208，其中步骤S201～S203，S207分别与步骤S101～S103，S104相同，具体如下：
S201：获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的 图案。
S202：将若干层所述集成电路子版图分别转化为预设格式的灰度图片。
S203：对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片。
S204：获取每层所述集成电路子版图对应的灰度负片中的目标像素点以及所述目标像素点在所述灰度负片中的坐标；其中，所述目标像素点为灰度值高于预设阈值的像素点。
在集成电路子版图对应的灰度负片中可能存在某些目标像素点的灰度值高于预设阈值，从而表明对应的材料层中目标像素点的坐标处需要被高能粒子束穿透。
所述预设阈值与预设的高能粒子束加工参数与灰度值之间的对应关系相关，可以根据实际情况进行设定，在此不进行限定。
S205：当第i至j层所述集成电路子版图对应的灰度负片中均存在坐标相同的目标像素点时，得到第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点。
若第i至j层所述集成电路子版图对应的灰度负片中均存在坐标相同的目标像素点，那么这些目标像素点就是待调整像素点，通过调整待调整像素点的灰度值，从而使得在雕刻对应的材料层时，不在待调整像素点的坐标处进行雕刻。
其中，所述集成电路子版图共有n层，1≤i＜j≤n。
S206：根据预设的调整策略重新设置第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点的灰度值。
在一个可选的实施例中，将第i至j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为最低值，即0，从而使得在雕刻所述第i至j层所述集成电路子版图对应的图案时，不会雕刻到所述待调整像素点组成的图案。
在另一个可选的实施例中，高能粒子束光刻设备先获取最低的高能粒子束加工参数对应的第一灰度值。
高能粒子束加工参数包括高能粒子束加速电压和/或高能粒子束作用时间，在本申请实施例中，高能粒子束加速电压为0或高能粒子束作用时间为0时对应的灰度值为第一灰度值。
由于高能粒子束加工参数与灰度值之间对应关系的不同，第一灰度值也会不同，并不一定是0，对于其具体数值在此不进行限定。
之后，高能粒子束光刻设备将所述第i至j层所述集成电路子版图对应的灰度负片中，所述相同图案处的灰度值均设置为所述第一灰度值，从而也能够使得在雕刻所述第i至j层所述集成电路子版图对应的图案时，不会雕刻到所述待调整像素点组成的图案。
S207：根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中 各像素点对应的高能粒子束加工参数。
S208：在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件。
步骤S208与步骤S105的执行方式是相同的，都是每设置一层材料层，在该材料层上完成集成电路子版图对应的图案的雕刻，最终得到目标半导体器件。
但是，由于在本实施例中，在雕刻第i至j层材料层时，均没有雕刻待调整像素点组成的图案，因此本步骤与步骤S105存在区别，请参阅图4，步骤S208包括步骤S2081～S2082，具体区别过程如下：
S2081：在所述目标基材上依次制作第i至j层材料层，分别根据所述第i至j层所述集成电路子版图对应的灰度负片中各像素点对应的高能粒子束加工参数，控制所述高能粒子束光刻设备发射高能粒子束作用于第i至j层材料层上，雕刻所述第i至j层所述集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至相应的第i至j层材料层。
高能粒子束光刻设备每铺设一层材料层(第i至j层)后，根据该层集成电路子版图对应的灰度负片中各像素点对应的高能粒子束加工参数，控制所述高能粒子束光刻设备发射高能粒子束作用于该层材料层上，雕刻该层集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至该层材料层。
对于第i至j层材料层以外的层次的雕刻，与步骤S105中的雕刻无差异，不再赘述。
S2082：根据所述待调整像素点的坐标，控制所述高能粒子束光刻设备发射高能粒子束作用于第j层材料层中所述待调整像素点的坐标处，在所述待调整像素点的坐标处穿透第i至j层材料层。
高能粒子束光刻设备在雕刻完第j层集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至第j层材料层后，再根据所述待调整像素点的坐标，控制所述高能粒子束光刻设备发射高能粒子束作用于第j层材料层中所述待调整像素点的坐标处，在所述待调整像素点的坐标处穿透第i至j层材料层。
其中，所述穿透每层材料层的高能粒子束加工参数可以根据实验获取并预存储在高能粒子束光刻设备中，根据材料层的标识能够查找到对应的高能粒子束加工参数，从而获取到穿透第i至j层的高能粒子束加工参数。
本实施例中，通过获取每层集成电路子版图对应的灰度负片中的目标像素点以及目标像素点的坐标，从而获取到第i至j层所述集成电路子版图对应的灰度负片中均存在的坐标相同 的目标像素点，也即待调整像素点，再通过调整策略重新设置待调整像素点的灰度值，从而使得在雕刻所述第i至j层所述集成电路子版图对应的图案分别至第i至j层材料层时，不会雕刻到待调整像素点组成的图案，最后在雕刻完第j层材料层后，统一根据待调整像素点的坐标，控制所述高能粒子束光刻设备发射高能粒子束作用于第j层材料层中所述待调整像素点的坐标处，在所述待调整像素点的坐标处穿透第i至j层材料层，实现合并雕刻，有效地提高了半导体器件的加工效率。
为进一步提高半导体器件的加工效率，请参阅图5，其为本申请其他实施例提供的半导体器件的加工控制方法的流程示意图，包括步骤S301～S308，其中步骤S301～S304、S307分别与步骤S201～S204，S207相同，具体如下：
S301：获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的图案。
S302：将若干层所述集成电路子版图分别转化为预设格式的灰度图片。
S303：对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片。
S304：获取每层所述集成电路子版图对应的灰度负片中的目标像素点以及所述目标像素点在所述灰度负片中的坐标；其中，所述目标像素点为灰度值高于预设阈值的像素点。
S305：当第i至j层所述集成电路子版图对应的灰度负片中均存在坐标相同的目标像素点时，得到第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点。
S306：根据预设的调整策略重新设置第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点的灰度值。
步骤S306中预设的调整策略与步骤S206中预设的调整策略的存在不同，具体地：
步骤S306中在设置第i至j-1层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值时，与步骤S206相同，区别点在于步骤S306中单独设置第j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值，请参阅图6，步骤S306包括步骤S3061～S3064：
S3061：将第i至j-1层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为最低值，或者，获取最低的高能粒子束加工参数对应的第一灰度值，将所述第i至j-1层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为所述第一灰度值。
S3062：获取穿透所述第i至j层材料层的目标高能粒子束加工参数。
穿透每层材料层的高能粒子束加工参数可以根据实验获取，并预存储在高能粒子束光刻 设备中，根据材料层的标识能够查找到对应的高能粒子束加工参数，从而获取到穿透第i至j层的高能粒子束加工参数。
S3063：根据所述目标高能粒子束加工参数和所述预设的高能粒子束加工参数与灰度值之间的对应关系，获取第二灰度值。
高能粒子束光刻设备根据所述预设的高能粒子束加工参数与灰度值之间的对应关系和目标高能粒子束加工参数，获取到第二灰度值。
S3064：将第j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为所述第二灰度值。
高能粒子束光刻设备将第j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为所述第二灰度值，这就使得在雕刻第j层材料层时，高能粒子束设备若判断某一像素点的灰度值为第二灰度值，则根据第二灰度值对应的目标高能粒子束加工参数，控制高能粒子束作用于在第j层材料层中该像素点的坐标处，进而使得高能粒子束在所述该像素点的坐标处穿透第i至j层材料层。
通过单独设置第j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值，能够使得在雕刻第j层所述集成电路子版图对应的图案时，同时雕刻待调整像素点组成的图案至第i至j层材料层，减少了雕刻步骤，进一步提高加工效率。
S307：根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数。
S308：在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件。
在本申请实施例中，请参阅图7，步骤S308包括步骤S3081～S3082，具体如下：
S3081：在所述目标基材上依次制作第i至j-1层材料层，分别根据所述第i至j-1层所述集成电路子版图对应的灰度负片中各像素点对应的高能粒子束加工参数，控制所述高能粒子束光刻设备发射高能粒子束作用于第i至j-1层材料层上，雕刻所述第i至j-1层所述集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至相应的第i至j-1层材料层。
高能粒子束光刻设备每铺设一层材料层(第i至j-1层)后，根据该层集成电路子版图对应的灰度负片中各像素点对应的高能粒子束加工参数，控制所述高能粒子束光刻设备发射高能粒子束作用于该层材料层上，雕刻该层集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至该层材料层。
S3082：在所述目标基材上设置第j层材料层，控制所述高能粒子束光刻设备发射高能粒子束作用于第j层材料层上，雕刻所述第j层所述集成电路子版图对应的图案至第j层材料层，并在所述待调整像素点的坐标处穿透所述第j至i层材料层。
由于在第j层集成电路子版图对应的灰度负片中，待调整像素点的灰度值设置为了第二灰度值，因而高能粒子束光刻设备在雕刻第j层材料层中待调整像素点的坐标处时，会根据第二灰度值对应的目标高能粒子束加工参数，发射高能粒子束作用于待调整像素点的坐标处，从而使得在坐标处高能粒子束穿透所述j至i层材料层。
对于第i至j层材料层以外的层次的雕刻，与步骤S105(或S208)中的雕刻无差异，不再赘述。
本实施例中，通过获取每层集成电路子版图对应的灰度负片中的目标像素点以及目标像素点的坐标，从而获取到第i至j层所述集成电路子版图对应的灰度负片中均存在的坐标相同的目标像素点，也即待调整像素点，再通过调整策略分别重新设置第i至j-1层待调整像素点的灰度值和第j层待调整像素点的灰度值，从而使得在雕刻所述第i至j-1层所述集成电路子版图对应的图案分别至第i至j-1层材料层时，不会雕刻到待调整像素点组成的图案，最后在雕刻完第j层材料层时，根据待调整像素点的坐标和灰度值，控制所述高能粒子束光刻设备发射高能粒子束作用于所述待调整像素点的坐标处，在所述待调整像素点的坐标处穿透第i至j层材料层，实现第j层集成电路子版图对应的图案与第i至j-1层中待调整像素点组成的图案的合并雕刻，进一步提高了半导体器件的加工效率。
请参见图8，其为本申请一个实施例提供的高能粒子束光刻设备的结构示意图。如图8示，所述高能粒子束光刻设备8可以包括：处理器80、存储器81以及存储在所述存储器81并可以在所述处理器80上运行的计算机程序82，例如：半导体器件的加工控制程序；所述处理器80执行所述计算机程序82时实现上述各方法实施例中的步骤，例如图1所示的步骤S101至S105。
其中，所述处理器80可以包括一个或多个处理核心。处理器80利用各种接口和线路连接所述高能粒子束光刻设备8内的各个部分，通过运行或执行存储在存储器81内的指令、程序、代码集或指令集，以及调用存储器81内的数据，执行高能粒子束光刻设备8的各种功能和处理数据，可选的，处理器80可以采用数字信号处理(Digital Signal Processing,DSP)、现场可编程门阵列(Field-Programmable Gate Array，FPGA)、可编程逻辑阵列(Programble Logic Array，PLA)中的至少一个硬件形式来实现。处理器80可集成中央处理器(Central Processing Unit，CPU)、图像处理器(Graphics Processing Unit，GPU)和调制解调器等中的一种或几种的组合。其中，CPU主要处理操作系统、用户界面和应用程序等；GPU用于负责触摸显示屏 所需要显示的内容的渲染和绘制；调制解调器用于处理无线通信。可以理解的是，上述调制解调器也可以不集成到处理器80中，单独通过一块芯片进行实现。
其中，存储器81可以包括随机存储器(Random Access Memory，RAM)，也可以包括只读存储器(Read-Only Memory)。可选的，该存储器81包括非瞬时性计算机可读介质(non-transitory computer-readable storage medium)。存储器81可用于存储指令、程序、代码、代码集或指令集。存储器81可包括存储程序区和存储数据区，其中，存储程序区可存储用于实现操作系统的指令、用于至少一个功能的指令(比如触控指令等)、用于实现上述各个方法实施例的指令等；存储数据区可存储上面各个方法实施例中涉及到的数据等。存储器81可选的还可以是至少一个位于远离前述处理器80的存储装置。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述或记载的部分，可以参见其它实施例的相关描述。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本发明的范围。
本发明并不局限于上述实施方式，如果对本发明的各种改动或变形不脱离本发明的精神和范围，倘若这些改动和变形属于本发明的权利要求和等同技术范围之内，则本发明也意图包含这些改动和变形。

Claims (10)

  1. 一种半导体器件的加工控制方法，其特征在于，包括步骤：
    获取目标半导体器件对应的集成电路版图；其中，所述集成电路版图包括若干层集成电路子版图，每一层集成电路子版图分别对应所述目标半导体器件一层或多层材料层的图案；
    将若干层所述集成电路子版图分别转化为预设格式的灰度图片；
    对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片；
    根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数；
    在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件。
  2. 根据权利要求1所述的半导体器件的加工控制方法，其特征在于，
    所述高能粒子束加工参数包括高能粒子束加速电压和/或高能粒子束作用时间，
    根据预设的高能粒子束加工参数与灰度值之间的对应关系，获取所述灰度负片中各像素点对应的高能粒子束加工参数，包括步骤：
    根据所述灰度负片中像素点的灰度值，获取所述灰度负片中各像素点对应的高能粒子束加速电压，当所述灰度负片中像素点的灰度值越小时，使所述高能粒子束光刻设备的高能粒子束加速电压越低，当所述灰度负片中像素点的灰度值越大时，使所述高能粒子束光刻设备的高能粒子束加速电压越高；
    或，
    根据所述灰度负片中像素点的灰度值，获取所述灰度负片中各像素点对应的高能粒子束作用时间，当所述灰度负片中像素点的灰度值越小时，使所述高能粒子束光刻设备的高能粒子束作用时间越短，当所述灰度负片中像素点的灰度值越大时，使所述高能粒子束光刻设备的高能粒子束作用时间越长；
    或，
    获取所述灰度负片中所有像素点的灰度均值，当所述灰度均值越小时，使所述高能粒子束光刻设备的所述高能粒子束加速电压越低，并根据所述灰度负片中像素点的灰度值，获取在所述高能粒子束加速电压不变的情况下所述灰度负片中各像素点对应的高能粒子束作用时间，当所述灰度负片中像素点的灰度值越小时，使所述高能粒子束光刻设备的高能粒子束作 用时间越短，当所述灰度负片中像素点的灰度值越大时，使所述高能粒子束光刻设备的高能粒子束作用时间越长。
  3. 根据权利要求1所述的半导体器件的加工控制方法，其特征在于，所述对所述灰度图片进行色相反转，获取所述灰度图片对应的灰度负片之后，包括步骤：
    获取每层所述集成电路子版图对应的灰度负片中的目标像素点以及所述目标像素点在所述灰度负片中的坐标；其中，所述目标像素点为灰度值高于预设阈值的像素点；
    当第i至j层所述集成电路子版图对应的灰度负片中均存在坐标相同的目标像素点时，得到第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点；
    根据预设的调整策略重新设置第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点的灰度值。
  4. 根据权利要求3所述的半导体器件的加工控制方法，其特征在于，所述根据预设的调整策略重新设置第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点的灰度值，包括步骤：
    将第i至j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为最低值；
    或者，
    获取最低的高能粒子束加工参数对应的第一灰度值；
    将所述第i至j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为所述第一灰度值。
  5. 根据权利要求4所述的半导体器件的加工控制方法，其特征在于，所述在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件，包括步骤：
    在所述目标基材上依次制作第i至j层材料层，分别根据所述第i至j层所述集成电路子版图对应的灰度负片中各像素点对应的高能粒子束加工参数，控制所述高能粒子束光刻设备发射高能粒子束作用于第i至j层材料层上，雕刻所述第i至j层所述集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至相应的第i至j层材料层；
    根据所述待调整像素点的坐标，控制所述高能粒子束光刻设备发射高能粒子束作用于第j层材料层中所述待调整像素点的坐标处，在所述待调整像素点的坐标处穿透第i至j层材料层。
  6. 根据权利要求3所述的半导体器件的加工控制方法，其特征在于，所述根据预设的调整策略重新设置第i至j层所述集成电路子版图对应的灰度负片中的待调整像素点的灰度值，包括步骤：
    将第i至j-1层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为最低值，或者，获取最低的高能粒子束加工参数对应的第一灰度值，将所述第i至j-1层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为所述第一灰度值；
    获取穿透所述第i至j层材料层的目标高能粒子束加工参数；
    根据所述目标高能粒子束加工参数和所述预设的高能粒子束加工参数与灰度值之间的对应关系，获取第二灰度值；
    将第j层所述集成电路子版图对应的灰度负片中所述待调整像素点的灰度值设置为所述第二灰度值。
  7. 根据权利要求6所述的半导体器件的加工控制方法，其特征在于，所述在目标基材上依次制作相应的每一层所述材料层，并分别根据所述灰度负片中各像素点对应的高能粒子束加工参数，控制高能粒子束光刻设备发射高能粒子束并作用于所述目标基材上相应的材料层，雕刻所述集成电路子版图对应的图案至所述目标基材上相应的材料层，得到所述目标半导体器件，包括步骤：
    在所述目标基材上依次制作第i至j-1层材料层，分别根据所述第i至j-1层所述集成电路子版图对应的灰度负片中各像素点对应的高能粒子束加工参数，控制所述高能粒子束光刻设备发射高能粒子束作用于第i至j-1层材料层上，雕刻所述第i至j-1层所述集成电路子版图对应的除所述待调整像素点组成的图案以外的所有图案至相应的第i至j-1层材料层；
    在所述目标基材上设置第j层材料层，控制所述高能粒子束光刻设备发射高能粒子束作用于第j层材料层上，雕刻所述第j层所述集成电路子版图对应的图案至第j层材料层，并在所述待调整像素点的坐标处穿透所述第j至i层材料层。
  8. 根据权利要求1所述的半导体器件的加工控制方法，其特征在于，所述在目标基材上依次制作相应的每一层所述材料层，包括步骤：
    获取所述材料层对应的材料气体和所述材料层在所述目标基材上对应的沉积区域；
    控制所述高能粒子束光刻设备在所述沉积区域喷射所述材料气体，使所述材料气体分解后沉积在所述沉积区域，完成所述材料层的制作。
  9. 根据权利要求1所述的半导体器件的加工控制方法，其特征在于，所述在目标基材上依次制作相应的每一层所述材料层，包括步骤：
    根据预设的优化厚度范围和/或预设的优化平整度范围，控制所述高能粒子束对所述材料 层进行打磨，使所述材料层的当前厚度和/或当前平整度分别在所述预设的优化厚度范围和预设的优化平整度范围之内。
  10. 一种高能粒子束光刻设备，其特征在于，包括：处理器、存储器以及存储在所述存储器中并可在所述处理器上运行的计算机程序，其特征在于，所述处理器执行所述计算机程序时实现如权利要求1至9任一项所述方法的步骤。
PCT/CN2022/124589 2022-10-11 2022-10-11 半导体器件的加工控制方法及高能粒子束光刻设备 WO2023202002A1 (zh)

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