WO2023141967A1 - 氧化物半导体靶材、薄膜、薄膜晶体管及提高其稳定性的方法 - Google Patents

氧化物半导体靶材、薄膜、薄膜晶体管及提高其稳定性的方法 Download PDF

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WO2023141967A1
WO2023141967A1 PCT/CN2022/074682 CN2022074682W WO2023141967A1 WO 2023141967 A1 WO2023141967 A1 WO 2023141967A1 CN 2022074682 W CN2022074682 W CN 2022074682W WO 2023141967 A1 WO2023141967 A1 WO 2023141967A1
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oxide semiconductor
thin film
ions
film transistor
light
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French (fr)
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兰林锋
李潇
彭俊彪
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华南理工大学
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C23C14/086—Oxides of zinc, germanium, cadmium, indium, tin, thallium or bismuth
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • C23C14/3414—Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Definitions

  • the invention belongs to the field of semiconductor materials and devices, and in particular relates to an oxide semiconductor target material, a thin film, a thin film transistor using the oxide semiconductor thin film as a channel layer, and a method for improving the stability and mobility of the thin film transistor.
  • TFT Thin-Film Transistor
  • OLED organic electroluminescent displays
  • a TFT As a core component of a display device, a TFT will inevitably be irradiated by light in applications in the display field.
  • the channel of a thin film transistor is illuminated by backlight; while in an OLED display, the channel of a thin film transistor is affected by OLED self-luminescence. Whether it is a backlight source or OLED self-illumination, its luminescence is in the range of visible light, and the most photon energy is blue luminescence.
  • Oxide semiconductors are particularly sensitive to blue light, because blue light will ionize the oxygen vacancies of oxide semiconductors, and release electrons into the conduction band to participate in conduction, thereby making TFTs based on oxide semiconductors (referred to as oxide TFTs) )
  • oxide TFTs oxide semiconductors
  • VO will be easier to Ionized under light to form VO 2+ , at the same time a large number of photogenerated electrons are formed, and the threshold voltage drifts seriously. Therefore, not only to improve the stability of oxide TFTs under the influence of light, but also to solve the problem of threshold voltage stability of oxide TFTs under light plus negative gate bias stress (Negative bias illumination stress, namely NBIS).
  • Negative bias illumination stress namely NBIS
  • Patent document 1 discloses an oxide semiconductor thin film doped with rare earth oxide, doped with praseodymium oxide, terbium oxide, dysprosium oxide or ytterbium oxide. It should be noted that the rare earth elements in the oxides doped in this patent are trivalent, for example, praseodymium oxide is dipraseodymium trioxide, terbium oxide is also diterbium trioxide, dysprosium oxide is Ytterbium is ytterbium trioxide.
  • the principle of doping praseodymium oxide, terbium oxide, dysprosium oxide or ytterbium oxide is to use praseodymium, terbium, dysprosium, and ytterbium atoms to replace the original metal atoms, which leads to the weakening of the original MM interaction, resulting in the displacement of the top of the valence band , so that the band structure of the original oxide semiconductor material changes from a direct band gap to an indirect band gap.
  • the valence band electrons in the indirect band gap need to interact with phonons to transition to the conduction band, which contributes to the transport characteristics and increases the difficulty of increasing the generation of photogenerated electrons.
  • This material can reduce the threshold voltage shift of the device when the thin film transistor is irradiated by incident light, that is, improve the stability of light (without negative gate bias voltage).
  • this method of changing the energy band (valence band top) structure and increasing the difficulty of photogenerated electrons by doping rare earth elements can only improve the stability of light (without negative gate bias), and cannot fundamentally solve the problem of oxide TFTs.
  • the more important problem of poor stability under illumination plus negative grid bias stress (NBIS) is faced. Because under the negative gate bias, the energy band will bend, the valence band at the interface will be upturned, and the distance between the top of the valence band and the Fermi level will be shortened, resulting in the generation of positive divalent oxygen vacancies (V O 2+ ).
  • Non-Patent Document 1 ACS Appl. Mater. Interfaces 2019, 11, 5232-5239
  • Non-Patent Document 2 Physical Status Solidi A 2021, 218, 2000812 disclose a Pr-doped oxide semiconductor material, Pr As an intermediary, it can accelerate the recombination of electrons and positive divalent oxygen vacancies, reduce the lifetime of photogenerated electrons generated by ionization of oxygen vacancies, and improve the stability of light (without negative grid bias).
  • this method does not prevent the ionization of neutral oxygen vacancies, but newly introduces Pr electrons as electron traps, which will not only capture photogenerated electrons, but also capture or scatter normal carriers, resulting in a decrease in mobility; Because the ionization of oxygen vacancies is not prevented, but the recombination is accelerated, it will cause the rapid relaxation of the lattice. Under the light plus negative bias stress (NBIS), due to the ionization of a large number of oxygen vacancies, the overall relaxation (expansion) of the lattice is large. , it is too late to recover quickly, so this method can only improve the stability under illumination (without negative grid bias), but cannot completely improve the stability under illumination plus negative grid bias stress (NBIS).
  • NBIS light plus negative bias stress
  • Pr is positive trivalent (contains 2 f electrons) or positive tetravalent (contains 1 f electron)
  • it contains less than full (or less than half full) f electrons, and the structure of these less than full or less than half full f electrons is not Stable, it will be severely affected by the crystal field to form splitting, resulting in a large number of defect state energy levels, which seriously affect the mobility and subthreshold swing. Therefore, in oxide semiconductor materials, the introduction of Pr ions cannot simultaneously improve migration and NBIS stability.
  • Patent document 2 discloses an oxide semiconductor doped with a positive trivalent rare earth compound, which redshifts the absorption of the f-d transition by adjusting the electronegativity of the anion.
  • reducing the electronegativity of anions will reduce the binding energy of rare earth ions and anions, which will decompose and form impurities during high-temperature sintering, thus affecting the improvement of performance.
  • the present invention essentially solves the problem of NBIS stability of oxide TFT devices, realizes good device stability of oxide TFTs under illumination, especially under NBIS, and does not cause complicated preparation process or introduction of other impurities ( or defect levels) to cause degradation in other properties, especially in mobility.
  • An oxide semiconductor target comprising a matrix oxide semiconductor material and positive tetravalent lanthanide ions, wherein the matrix oxide semiconductor material contains at least one of the five elements In, Zn, Sn, Ga and Cd.
  • the stable valence state of lanthanide ions in lanthanide oxides is usually positive trivalent, such as lanthanum oxide, praseodymium oxide, neodymium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, etc. are usually based on trioxide (Ln 2 O 3 ) form, only cerium oxide can exist stably in the form of CeO2 .
  • the fd transition of positive trivalent lanthanide ions is broad-spectrum absorption, but because the fd transition energy gap of positive trivalent rare earth ions is relatively large, it usually only has strong broad-spectrum absorption for ultraviolet or purple light, and cannot absorb a large amount of blue light.
  • Positive trivalent praseodymium has weak band-like absorption in the blue light region of 450nm, which is the ff transition absorption of Pr 3+ , but since ff is a forbidden transition, the absorption is weak; in addition, the molar extinction of ff transition The absorption coefficient is small, and the ff transition absorption is a narrow-spectrum absorption, which cannot completely absorb the broad-spectrum intense light (blue light part) emitted by the LED. Therefore, the effect of doping trivalent lanthanide ions on photostability improvement is very limited.
  • Some lanthanide ions can have positive tetravalent or positive divalent ions under special conditions.
  • Lanthanide ions in different valence states have orbital hybrid charge transition absorption. Experiments have found that the photon energy required for the absorption of positive tetravalent lanthanide ions is lower.
  • the charge transition can absorb blue light or visible light, and the relaxation of cations and anions can be mostly offset during the orbital hybrid charge transition without causing a large overall relaxation.
  • the orbital hybridization charge transition of lanthanide ions absorbs photons more easily than oxygen vacancies (inhibits the absorption of photons by oxygen vacancies), and quickly returns to the ground state through forms such as non-radiative transitions. It avoids the problem of slow ionization process and slow recovery process of oxygen vacancy ionization that will cause severe lattice relaxation (expansion), and avoids continuous drift of threshold voltage.
  • the positive tetravalent lanthanide ions are Tb 4+ .
  • the ratio of the number of Tb 4+ ions to the number of Tb 3+ ions is greater than 0.1.
  • the ratio of the number of Tb 4+ ions to the number of Tb 3+ ions is greater than 1.
  • the above-mentioned oxide semiconductor target only contains Tb 4+ and does not contain Tb 3+ , that is, the matrix oxide semiconductor material is only doped with positive tetravalent terbium ions Tb 4+ .
  • the target needs to be sintered at high temperature. Even if there are positive tetravalent lanthanide ions in the raw material, due to its low redox potential, it is often easy to deoxidize and be reduced to positive trivalent during the high-temperature sintering process of the target. Therefore, it is difficult to effectively dope positive tetravalent lanthanide ions in matrix oxide semiconductor materials, and the lanthanide ions in the actual traditional target composition are basically positive trivalent.
  • the solution method can form positive tetravalent lanthanide ions under special circumstances, but the precursor and solvent will introduce a large amount of impurities, thereby reducing the mobility.
  • Oxide powders of lanthanide ions usually have a normal stable structure, and it is difficult to directly oxidize them into tetravalent oxide powders by ordinary methods. Since in the field of conventional oxide semiconductor targets, targets containing positive tetravalent lanthanide ions are not common, therefore, technically, there is no technical solution for oxide semiconductor targets containing positive tetravalent lanthanide ions. In other words, those skilled in the art would not think in this direction. The present application overcomes the technical prejudice and selects oxide semiconductor targets containing positive tetravalent lanthanide ions as the technical solution of the present invention.
  • the above-mentioned oxide semiconductor target material is prepared by the following method: first, the oxide powder of the lanthanide element is uniformly mixed with the matrix oxide semiconductor material powder, and then sintered in a strong oxidizing atmosphere, and after secondary grinding and mixing, pass Cold isostatic pressing or hot pressing, and then sintering in a strong oxidizing atmosphere to obtain oxide semiconductor targets.
  • terbium oxide powder is mixed with matrix oxide semiconductor material powder, and sintered multiple times.
  • the lanthanide ions in the prior art overcome the technical problem that the positive tetravalent lanthanide ions are easily deoxidized when the target is sintered by the ordinary method, so that the positive tetravalent lanthanide ions are reduced to positive trivalent and it is not easy to obtain the positive tetravalent lanthanide ions. It can improve the positive tetravalent lanthanide ions in the target ratio of lanthanide ions. It should be noted that the target material of the present invention is not limited to be prepared by this method.
  • the present invention breaks through the limitation that the target material made of conventional lanthanide elements is trivalent, and finds a new way to set the technical scheme that the oxide semiconductor target material contains positive tetravalent lanthanide ions, especially Tb 4+ .
  • a host oxide semiconductor material is used to form an oxide semiconductor target with positive tetravalent Tb 4+ for preparing a channel layer of a thin film transistor.
  • the thin film transistor Due to the low energy required for the orbital hybridization transition of positive tetravalent Tb 4+ , when the thin film transistor is illuminated, it can absorb blue light or even red and green light, and further down-convert it into a non-radiative form, avoiding backlight or self-
  • the blue light in the luminescence ionizes oxygen vacancies, which causes the conductance to increase and the threshold voltage to drift negatively, which improves the light stability of the device; and under the light plus negative gate pressure stress (NBIS), the negative drift of the threshold voltage of the device can also be solved. problem; and there will be no problem of complicating the preparation process, nor will it introduce impurities or crystal field splitting energy level defects, will not affect electron transport, and will realize a TFT device with good NBIS stability and high mobility.
  • NBIS light plus negative gate pressure stress
  • the present invention also provides an oxide semiconductor thin film, which is prepared by physical vapor deposition and has a thickness of 3-200nm.
  • the target used for physical vapor deposition is the above-mentioned oxide semiconductor target.
  • the invention also provides a method for improving the stability of the thin film transistor
  • the semiconductor target includes a matrix oxide semiconductor material and positive tetravalent lanthanide ions as functional ions
  • the functional ions can perform orbital hybridization, and the energy required for orbital hybridization transitions is not higher than that of blue light energy, and functional ions are transformed into non-radiative forms after orbital hybridization transitions;
  • the positive tetravalent lanthanide ions are Tb 4+ , and the ratio of the number of Tb 4+ ions to the number of Tb 3+ ions is greater than 0.1.
  • the oxide semiconductor thin film is deposited by physical vapor deposition.
  • the invention also provides a thin film transistor, which is provided with a gate, a channel layer, an insulating layer, etc., and the channel layer includes one or more oxide semiconductor layers, wherein at least one oxide semiconductor layer is configured as the above-mentioned oxide semiconductor layer.
  • Thin film semiconductors Thin film semiconductors.
  • the above-mentioned thin film transistor is used for a display driving backplane, and can also be used for a memory, a flash memory, and a dynamic random access memory.
  • the present invention has the following advantages and beneficial effects:
  • the invention utilizes an oxide semiconductor target containing positive tetravalent lanthanide ions, especially positive tetravalent terbium ions, to prepare a thin film material used as a channel layer of a thin film transistor, and to prepare a thin film transistor accordingly. Due to the low energy required for the orbital hybridization transition of tetravalent terbium ions, when the thin film transistor is illuminated, it can absorb blue light or even red and green light, and further down convert it into a non-radiative form, avoiding the backlight or self-luminescence.
  • Blue light ionizes oxygen vacancies to cause increased conductance and negative threshold voltage drift, which improves the light stability of the device; and under light plus negative gate voltage stress (NBIS), it can also solve the problem of negative threshold voltage drift of the device; and There will be no problem of complicating the preparation process, and no impurities or crystal field splitting energy level defects will be introduced, and electron transport will not be affected, and a TFT device with good NBIS stability and high mobility will be realized.
  • NBIS light plus negative gate voltage stress
  • the oxide semiconductor target material, thin film, and transistor of the present invention can maintain migration performance and improve NBIS stability.
  • Fig. 1 is the structural representation of a kind of thin film transistor of the present invention
  • Fig. 2 is a working principle diagram taking address selection tube TFT1 and drive tube TFT2 as an example in AMOLED display pixel drive;
  • Fig. 3 is a schematic diagram of the absorption energy level of the f-d transition of positive trivalent lanthanide ions in some experiments of the present invention.
  • Fig. 4 is a schematic diagram of the minimum energy required for positive trivalent and positive tetravalent lanthanide ion orbital hybridization charge transitions in some experiments of the present invention.
  • Fig. 5 is the reflectance spectrum of targets with different Tb 4+ doping amounts in Example 5 of the present invention.
  • Figure 6 is the Tb 4p peak of the X-ray photoelectron spectrum (XPS) of the thin film prepared by sputtering the target material with the ratio of In 2 O 3 doped with Tb 4+ /Tb 3+ in Example 6 of the present invention is 1/1 Spectrum.
  • XPS X-ray photoelectron spectrum
  • Fig. 7 is the transfer characteristic curve of the thin film transistor under NBIS in the case of pure In 2 O 3 not doped with Tb in Example 6 of the present invention.
  • Fig. 11 is the reflectance spectrum of targets with different Pr doping amounts in Example 10 of the present invention.
  • TFT 12 is a transfer characteristic curve of a thin film transistor (TFT) based on 3% Pr 4+ content in Example 11 of the present invention under NBIS (LED white light irradiation plus a gate bias of -20V).
  • TFT thin film transistor
  • TFT 13 is a transfer characteristic curve of a thin film transistor (TFT) based on 7% Pr 4+ content in Example 11 of the present invention under NBIS (LED white light irradiation plus a gate bias of -20V).
  • TFT thin film transistor
  • Fig. 14 is a comparison of fluorescence spectra of films based on 3% Pr 4+ content and the same Tb 4+ content in Example 11 of the present invention.
  • the cations and anions in the matrix oxide semiconductor materials can be completely stoichiometrically matched, or there can be non-chemical oxygen vacancies, oxygen gaps, cation vacancies, and cation gaps.
  • Meter match can be completely stoichiometrically matched, or there can be non-chemical oxygen vacancies, oxygen gaps, cation vacancies, and cation gaps.
  • ions is a form of expression of a chemical valence state, not limited to ionic compounds, elements of ionic compounds and covalent compounds can be called "ions”.
  • At least one of A, B and C has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, A and B A combination of A and C, a combination of B and C, and a combination of A, B and C.
  • a and/or B includes the following three combinations: A only, B only, and a combination of A and B.
  • Exemplary embodiments are described herein with reference to cross-sectional and/or plan views that are idealized exemplary drawings.
  • the thickness of layers and regions are exaggerated for clarity. Accordingly, variations in shape from the drawings as a result, for example, of manufacturing techniques and/or tolerances are contemplated.
  • example embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region illustrated as a rectangle will, typically, have curved features.
  • the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
  • Some embodiments of the present disclosure provide a display device, including a display panel, and a driving circuit disposed on the display panel, such as a pixel driving circuit, a gate driving circuit, and the like.
  • Thin-Film Transistor is an important component that constitutes the pixel drive circuit, gate drive circuit, etc.
  • the pixel drive circuit and gate drive can be controlled by controlling the on and off of the thin-film transistor.
  • the circuit drives the display panel to display.
  • thin film transistors are one type of transistors, and the materials, preparation methods and devices of the present invention are applicable to all types of transistors, not limited to thin film transistors; Other application fields, such as memory, flash memory, dynamic random access memory, etc.
  • the above-mentioned display device can be LCD (Liquid Crystal Display, liquid crystal display), OLED (Organic Light-Emitting Diode, organic light-emitting diode) and QLED (Quantum Dot Light-Emitting Diodes, quantum dot light-emitting diode), MicroLED ( One of Micro Light-Emitting Diodes, Micro Light-Emitting Diodes), MiniLED (Mini Light-Emitting Diodes, Mini Light-Emitting Diodes) display devices, etc.
  • LCD Liquid Crystal Display, liquid crystal display
  • OLED Organic Light-Emitting Diode, organic light-emitting diode
  • QLED Quantantum Dot Light-Emitting Diodes, quantum dot light-emitting diode
  • MicroLED One of Micro Light-Emitting Diodes, Micro Light-Emitting Diodes
  • MiniLED Mini Light-Emitting Diodes, Mini Light-Emitting Diodes
  • the display device may be a mobile phone, a tablet computer, a notebook, a personal digital assistant (personal digital assistant, PDA), a vehicle-mounted computer, a laptop computer, a digital camera, and the like.
  • PDA personal digital assistant
  • the form of the display device is not limited, and may be a rigid display, a flexible display, a stretchable display, a display of any shape, and the like.
  • TFT mainly includes amorphous silicon (such as hydrogenated amorphous silicon: a-Si: H) TFT, low temperature polysilicon (Low Temperature Poly-silicon, LTPS) TFT, oxide TFT and organic TFT, etc.
  • amorphous silicon such as hydrogenated amorphous silicon: a-Si: H
  • low temperature polysilicon Low Temperature Poly-silicon, LTPS
  • oxide TFT oxide TFT
  • organic TFT etc.
  • the oxide TFT is a TFT with an oxide semiconductor (such as In 2 O 3 , ZnO, InZnO, InGaZnO, etc.)
  • oxide semiconductor such as In 2 O 3 , ZnO, InZnO, InGaZnO, etc.
  • NBIS negative gate pressure stress
  • the TFT channel 131 in a liquid crystal display, the TFT channel 131 is illuminated by backlight, and in an OLED display, the TFT channel 131 is affected by OLED self-luminescence. Whether it is backlight or self-illumination, its luminescence is in the range of visible light, and the most photon energy is blue light.
  • Oxide semiconductors such as IZO (Indium Zinc Oxide, indium zinc oxide), IGZO (Indium Gallium Zinc Oxide, indium gallium zinc oxide), etc.
  • IZO Indium Zinc Oxide, indium zinc oxide
  • IGZO Indium Gallium Zinc Oxide, indium gallium zinc oxide
  • addressing transistor TFT1 active-matrix organic light emitting diode, active-matrix organic light-emitting diode
  • driving transistor TFT2 the TFTs are turned on when the gate voltage is positive, and turned off when the gate voltage is negative (when the carrier concentration of the oxide semiconductor is high, it will appear normally open. state, that is, a negative gate voltage is required to completely shut it off).
  • the address selection transistor TFT1 is turned on only once in each scanning period, and is turned off for the rest of the time, so the stability of the address selection transistor TFT1 under negative gate bias stress (Negative Bias Stress, NBS) is extremely important.
  • the source of the drive tube TFT2 is directly connected to the OLED. As long as the OLED emits light, a certain amount of current must flow through the source and drain electrodes of the drive tube TFT2. Therefore, the drive tube TFT2 is basically in the open state, and it is under positive gate voltage stress ( The stability under Positive Bias Stress (PBS) is more important, and the oxide TFT will exhibit threshold voltage (V th ) drift phenomenon under the gate voltage stress.
  • PBS Positive Bias Stress
  • the energy band at the interface is upturned, and the top of the valence band is closer to the Fermi level, resulting in a significant decrease in the formation energy (Formation Energy) of VO 2+ , and VO will be more easily exposed to light.
  • Formation Energy formation energy
  • the lower ionization forms VO 2+ , and a large number of photogenerated electrons are formed at the same time, and the threshold voltage drifts seriously. Therefore, it is particularly important to improve the threshold voltage stability of the oxide TFT under NBIS (Negative bias illumination stress, negative grid bias illumination stress).
  • the transistor (or thin film transistor) provided by some embodiments of the present invention is provided with a gate, a channel layer, an insulating layer, etc., and the channel layer is provided as the above-mentioned matrix oxide semiconductor material and positive tetravalent lanthanide ions. oxide semiconductor thin film.
  • the transistor includes: a gate, a channel layer, an insulating layer located between the gate and the channel layer, and a source and a drain electrically connected to both ends of the channel layer;
  • the connection means that there is a conductive channel between the two, and the two may be in direct contact, or may further include a buffer layer and the like.
  • the specific structure of the transistor can adopt different structure types, such as bottom-gate-top-contact, bottom-gate-bottom-contact, top-gate-top-contact, top-gate-bottom-contact, etc., as long as the channel layer is the above-mentioned matrix oxide semiconductor material And positive tetravalent lanthanide ion oxide semiconductor thin film, all belong to the technology of the present invention.
  • the channel layer may include one or more thin films, wherein at least one thin film is configured as the above-mentioned oxide semiconductor thin film comprising a matrix oxide semiconductor material and positive tetravalent lanthanide ions.
  • oxide semiconductor materials doped with different positive tetravalent lanthanide ions can be selected; or oxide semiconductor materials doped with the same positive tetravalent lanthanide ions but with different doping amounts can be selected; or An arbitrary combination of thin films of oxide semiconductor materials doped with positive tetravalent lanthanide ions and oxide semiconductor materials without positive tetravalent lanthanide ions is selected.
  • the application position and the applied doping ratio of the above oxide semiconductor material doped with positive tetravalent lanthanide ions in the channel layer are not specifically limited.
  • An oxide semiconductor target material which includes a matrix oxide semiconductor material and positive tetravalent lanthanide ions Tb 4+ .
  • the matrix oxide semiconductor material is an oxide material containing at least one of five elements including In, Zn, Sn, Ga and Cd.
  • the matrix oxide semiconductor material is an oxide material, containing at least one of the five elements In, Zn, Sn, Ga, and Cd, and may further contain Al, B, Sc, Y, Zr, Hf, Ta, W, Mg, etc. at least one of the elements.
  • the innovative point of this scheme is to form a target containing positive tetravalent lanthanide ions.
  • the modified substance is the positive tetravalent lanthanide ion Tb 4+ , which usually contains a certain proportion of Tb 3+ due to factors such as the preparation process. Except for Tb 4+ and Tb 3+ , other elemental substances are not target dopant substances and are treated as impurities. Ideally, the target material does not contain impurities. It should be noted that the oxide semiconductor target must contain a certain proportion of Tb 4+ , and ions in other valence states such as Tb 3+ or other impurities are not necessary.
  • the ratio of the amount of terbium ions to the amount of all cations is between 0.05% and 10%. It should be noted that the proportion relationship between the matrix oxide semiconductor material and the modified substance in the target can be flexibly selected by those skilled in the art according to actual needs, and is not the main research problem of the present invention.
  • the oxide semiconductor target In order to make the oxide semiconductor target meet the required performance, it is key to control and increase the content of Tb 4+ ions in the target. Specifically, in the oxide semiconductor target, the ratio of the number of Tb 4+ ions to the number of Tb 3+ ions is controlled to be greater than or equal to 0.1, preferably greater than or equal to 1, and more preferably greater than or equal to 2. Among the oxide semiconductor targets, the performance is the best when all the modified substances are Tb 4+ .
  • oxide semiconductor targets containing positive tetravalent lanthanide ions are difficult to obtain and hardly exist.
  • Lanthanide ions are represented by Ln. Due to the low redox potential of Ln 3+ —Ln 4+ , it is difficult to capture oxygen from oxide semiconductors such as In 2 O 3 , ZnO, and SnO 2 to be oxidized to positive tetravalent; in addition, positive tetravalent The lanthanide ions are easily deoxidized and reduced to positive trivalent during the high-temperature sintering process of the target. Therefore, it is difficult to effectively dope positive tetravalent lanthanide ions in host oxide semiconductor materials.
  • the solution method can form positive tetravalent lanthanide ions under special circumstances, but the precursor and solvent will introduce impurities, thereby reducing the mobility.
  • the oxide powder of lanthanide ions usually has a normal stable structure, and it is difficult to directly oxidize it into positive tetravalent oxide powder by ordinary methods; when the target is sintered at high temperature by ordinary methods, it is easy to deoxidize so that the positive tetravalent lanthanide ions are reduced to Positive trivalent. All the above factors limit the difficulty in obtaining oxide semiconductor targets containing positive tetravalent lanthanide ions in the prior art. Therefore, in the case that the raw materials are not easy to obtain, those skilled in the art do not consider the related technical idea of improving the stability of the NBIS of the thin film transistor through positive tetravalent lanthanide ions.
  • the present invention breaks through the restriction that the target material made of conventional lanthanide elements is trivalent, and overcomes technical prejudices and finds a technical solution for setting the oxide semiconductor target material to contain positive tetravalent lanthanide ions.
  • the method of the present invention utilizes the process to make the tetravalent lanthanide ions form a solid solution phase with the matrix oxide semiconductor material, and it is relatively easy to further oxidize the positive trivalent lanthanide ions into positive tetravalent lanthanide ions, thereby increasing the positive tetravalent lanthanide ions in the target material.
  • the ratio of lanthanide ions The ratio of lanthanide ions.
  • the target is prepared by the following method: firstly, terbium oxide powder and matrix oxide semiconductor material powder are uniformly mixed, then sintered in a strong oxidizing atmosphere, and then ground and mixed, and then formed by cold isostatic pressing or hot pressing. Then sinter in a strong oxidizing atmosphere.
  • the ratio of the number of Tb 4+ ions to the number of Tb 3+ ions can be controlled and increased.
  • terbium oxide powder and matrix oxide semiconductor material powder can be uniformly mixed, and then sintered in a strong oxidizing atmosphere, after grinding and mixing, cold isostatic pressing or hot pressing is performed, and then sintering in a strong oxidizing atmosphere . It is also possible to further oxidize the oxide powder of terbium into dioxide or oxidize into oxides or mixtures of positive tetravalent and positive trivalent lanthanide ions. After grinding, it is evenly mixed with the matrix oxide semiconductor material powder, and then the strong oxidizing Sintered in the atmosphere, after secondary grinding and mixing, it is formed by cold isostatic pressing or hot pressing, and then sintered in a strong oxidizing atmosphere. It should be noted that the oxide semiconductor target of the present invention is not limited to be prepared by the preparation method in this embodiment, and other preparation methods are also applicable to the preparation of the oxide semiconductor target of the present invention.
  • the stable valence state of lanthanide ions in lanthanide oxides is usually positive trivalent, such as lanthanum oxide, praseodymium oxide, neodymium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, etc. are usually based on trioxide (Ln 2 O 3 ) form exists.
  • the fd transition of positive trivalent lanthanide ions is broad-spectrum absorption, but because the fd transition energy gap of positive trivalent rare earth ions is relatively large, it usually only has strong broad-spectrum absorption for ultraviolet or purple light, and cannot absorb a large amount of blue light.
  • Positive trivalent praseodymium has weak band-like absorption in the blue light region of 450nm, which is the ff transition absorption of Pr 3+ , but since ff is a forbidden transition, the absorption is weak; in addition, the molar extinction of ff transition The absorption coefficient is small, and the ff transition absorption is a narrow-spectrum absorption, which cannot completely absorb the broad-spectrum intense light (blue light part) emitted by the LED. Therefore, the effect of doping trivalent lanthanide ions on photostability improvement is very limited.
  • the most stable valence state of lanthanide ions is positive trivalent, and some lanthanide ions can have positive tetravalent ions.
  • Lanthanide ions in different valence states have orbital hybrid charge transition absorption. Experiments have found that the absorption of positive tetravalent lanthanide ions requires Photon energy is lower.
  • the charge transition can absorb blue light or visible light, and the relaxation of cations and anions can be mostly offset during the orbital hybrid charge transition without causing a large overall relaxation.
  • the orbital hybridization charge transition of lanthanide ions absorbs photons more easily than oxygen vacancies (inhibits the absorption of photons by oxygen vacancies), and quickly returns to the ground state through forms such as non-radiative transitions. It avoids the problem of slow ionization process and slow recovery process of oxygen vacancy ionization that will cause severe lattice relaxation (expansion), and avoids continuous drift of threshold voltage.
  • the positive tetravalent lanthanide ion orbital hybrid charge transition is a transition allowed by the selection law, which is more than 10 6 stronger than the ff transition, and it is a broad-spectrum absorption, and the absorption spectrum is much wider than the ff transition , even wider than the fd transitions, so the orbital hybridization charge transitions of lanthanide ions are able to absorb strong broad-spectrum light.
  • Ce, Pr, and Tb can have positive tetravalent ions, among which Ce 4+ is the most stable, and Tb 4+ and Pr 4+ are unstable in solid state. Nd and Dy also have positive tetravalent ions under special circumstances, but they are extremely unstable.
  • Ce 4+ orbital hybridization charge transition requires higher energy, so the orbital hybridization transition of Ce 4+ usually can only absorb ultraviolet light, and it is difficult to absorb blue light, so in oxide semiconductors Incorporation of Ce 4+ in the solution has a limited effect on improving the photostability.
  • the energy required for the transition of Pr 4+ and Tb 4+ is lower than that of Ce 4+ , which can absorb blue light or even red and green light, and further down-convert it into low-energy light or non-radiative form, thereby avoiding The threshold voltage shift phenomenon caused by the oxygen vacancies absorbing blue light ionization and releasing electrons.
  • the absorption edge of the orbital hybrid charge transition of Ce 4+ is about 4.0eV, which is also located in the ultraviolet region.
  • the absorption edges of Tb 4+ and Pr 4+ are located in the blue region.
  • Nd 4+ and Dy 4+ can also absorb visible light, they are very unstable.
  • positive trivalent lanthanide ions In solids containing positive tetravalent lanthanide ions, positive trivalent lanthanide ions generally exist at the same time, and the above analysis shows that positive trivalent lanthanide ions have little effect on improving the stability of NBIS, and also affect electron transport. reduce mobility.
  • the positive trivalent lanthanide ions have a much larger radius, much larger than the radii of In 3+ , Zn 2+ , Ga 3+ and Sn 4+ in matrix oxide semiconductor materials ( are less than ), so the crystal lattice relaxation of doping positive trivalent lanthanide ions in the matrix oxide semiconductor material is much more serious than doping positive tetravalent lanthanide ions to the lattice damage, and the mobility is lower.
  • the ratio of the number of positive tetravalent lanthanide ions to the number of lanthanide ions in other valence states is greater than 0.1. More preferably, the ratio of the number of positive tetravalent lanthanide ions to the number of lanthanide ions in other valence states is greater than 1. More preferably, the ratio of the number of positive tetravalent lanthanide ions to the number of lanthanide ions in other valence states is greater than 2. Most preferably, all lanthanide ions are positive tetravalent.
  • the doping amount of lanthanide ions required for the oxide semiconductor target material of the present invention is less.
  • the ratio of the amount of lanthanide ions to the amount of all cations is between 0.05% and 10%. More preferably, the ratio of the amount of lanthanide ions to the amount of all cations is between 0.05% and 5%.
  • the present invention breaks through the restriction that the target material made of conventional lanthanide elements is trivalent, and finds a technical solution in which the oxide semiconductor target material contains positive tetravalent terbium ions.
  • the matrix oxide semiconductor material is used to form an oxide semiconductor target material with positive tetravalent lanthanide ions for preparing a channel layer of a thin film transistor.
  • the thin film transistor when the thin film transistor is illuminated, it can absorb blue light or even red and green light, and further down-convert it into non-radiative or low-energy light, avoiding backlight
  • the blue light in the source or self-luminescence ionizes oxygen vacancies, which causes the conductance to increase and the threshold voltage to drift negatively, which improves the light stability of the device; and under light plus negative gate pressure stress (NBIS), the device threshold can also be solved.
  • Negative voltage drift problem to achieve good stability of TFT under light, especially under NBIS; and there will be no problem of complicating the preparation process, nor will it introduce impurities or crystal field splitting energy level defects, and will not affect electron transport.
  • a TFT device with good NBIS stability and high mobility is realized.
  • An oxide semiconductor target material which includes a host oxide semiconductor material and tetravalent terbium ions Tb 4+ .
  • the thin film transistor prepared by doping only Tb 4+ oxide semiconductor target material in the matrix oxide semiconductor material has high electron mobility and stability of NBIS performance. Experiments have found that doping with Tb 4+ has the best performance compared to doping with other elements.
  • Tb 4+ contains 7 f electrons and is in a relatively stable half-full state, so Tb 4+ can effectively avoid the influence of the crystal field, that is, the influence of different matrix oxide semiconductor material environments and oxygen vacancy environments on the electronic structure of Tb 4+ Less impact. Therefore, doping Tb 4+ in the host oxide semiconductor material can improve the mobility and stability, and broaden the process window.
  • Tb 4+ The ionic radius is close to that of In 3+ in host oxide semiconductor materials Zn 2+ Ga 3+ and Sn 4+ of the radius. Therefore, the lattice relaxation of Tb 4+ doped in the host oxide semiconductor material is small, the damage to the lattice is small, and the mobility is high. After Tb 4+ absorbs blue light, it will be down-converted into a non-radiative form without the influence of other stray light, so Tb 4+ doping is more effective in improving the photostability of oxide semiconductors. Therefore, the performance of the oxide semiconductor target with positive tetravalent lanthanide ions being Tb 4+ is the best.
  • the physical vapor deposition mentioned above includes but not limited to sputtering (including DC sputtering, radio frequency sputtering or reactive sputtering), pulsed laser deposition, atomic layer deposition and the like.
  • the oxide semiconductor thin film can be prepared by two or more targets, at least one of which contains a Tb 4+ oxide semiconductor target, and then these targets are installed on different target positions by double Target or multi-target co-deposition method to obtain oxide semiconductor thin film.
  • the oxide semiconductor thin film prepared by the present invention can absorb blue light and is used as a channel layer of a thin film transistor to realize good device stability of the semiconductor thin film transistor under illumination, especially under NBIS, and maintain good mobility of the thin film transistor, Sub-threshold performance, and there will be no problem of complicating the preparation process, and no impurities will be introduced, which can ensure the performance of the device.
  • a kind of transistor, its structure is bottom gate top contact type, as shown in Figure 1, is provided with: substrate 10, gate 11 on substrate 10, insulating layer 12 on substrate 10 and gate 11, The channel layer 13 covering the upper surface of the insulating layer 12 and corresponding to the gate 11 , and the source electrode 14 a and the drain electrode 14 b spaced from each other and electrically connected to both ends of the channel layer 13 .
  • the channel layer 13 is the oxide semiconductor thin film including the matrix oxide semiconductor material and positive tetravalent lanthanide ions in the second embodiment.
  • the substrate 10 may be one of substrate materials such as glass, flexible polymer substrate, silicon wafer, metal foil, and quartz, and may further include a buffer layer or a water-oxygen barrier layer covering the substrate.
  • the material of the gate 11 can be a conductive material, such as metal, alloy, conductive metal oxide, doped silicon, conductive polymer, etc., or a superposition of two or more thin films composed of any combination of the above materials.
  • the insulating layer 12 may be an insulating material for semiconductor devices, such as silicon dioxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxide, ytterbium oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconium oxide, polymer A single-layer film composed of insulating materials, photoresist, etc., or a superposition of two or more layers of films composed of any combination of the above materials.
  • semiconductor devices such as silicon dioxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxide, ytterbium oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconium oxide, polymer A single-layer film composed of insulating materials, photoresist, etc., or a superposition of two or more layers of films composed of any combination of the above materials.
  • the material of the source electrode 14a and the drain electrode 14b can be a conductive material, such as a single-layer thin film of metal, alloy, conductive metal oxide, conductive polymer, etc., or a superposition of two or more thin films composed of any combination of the above materials. .
  • the transistor of the present invention may be a closed structure including only a substrate, a gate, an insulating layer, a channel layer, a source electrode and a drain electrode, and may further include an etching stopper layer, a passivation layer or a pixel definition layer, etc., and may also be combined with Other device integration, etc.
  • the transistor can be prepared by the following method:
  • the thickness is 100-1000nm
  • the insulating layer is obtained by patterning by blocking mask or photolithography .
  • the channel layer is prepared by pulsed laser deposition, and patterned by mask UV irradiation.
  • One or more conductive thin films are prepared by vacuum evaporation or sputtering, with a thickness of 100-1000 nm, and the source and drain are simultaneously obtained by patterning by mask or photolithography.
  • the transistor of the present invention uses a thin film containing positive tetravalent terbium ions as the channel layer. Since the energy required for the orbital hybridization transition of positive tetravalent terbium ions is low, when the thin film transistor is illuminated, it can absorb blue light or even red and green light.
  • the oxide semiconductor target material, thin film and transistor of the present invention can maintain high mobility and improve the stability of NBIS.
  • An oxide semiconductor target material includes a matrix oxide semiconductor material and positive tetravalent lanthanide ions.
  • the host oxide semiconductor material is indium oxide (In 2 O 3 )
  • the positive tetravalent lanthanide ion is Tb 4+ .
  • the ratio of the number of positive tetravalent lanthanide ions Tb 4+ to the number of all cations is 3%.
  • the target material is prepared by the following method: firstly, the terbium oxide powder is further oxidized, after being ground, it is evenly mixed with the matrix oxide semiconductor material powder, and then sintered in an ozone atmosphere, and then formed by cold isostatic pressing after secondary grinding and mixing. Then sinter at 1400°C in a pure oxygen atmosphere.
  • the total content of Tb in different valence states in the target is 3%.
  • the ratio of Tb 4+ /Tb 3+ in the target with 3% Tb content is controlled to 1/1 and 1/ 0, that is, the contents of Tb 4+ are 1.5% and 3%, respectively.
  • a transistor as shown in Fig. 1, its preparation process is as follows: firstly, a layer of Al-Nd alloy thin film with a thickness of 300nm is fabricated on a glass substrate by sputtering, and patterned by photolithography to obtain gate 11 . Next, the insulating layer 12 is prepared by anodic oxidation to form a layer of aluminum oxide gate oxide layer. The channel layer 13 is prepared by sputtering, the target used is the same as that in Example 5, and the thickness of the channel layer 13 is 10 nm.
  • the channel layer 13 adopt the sputtering method to manufacture a layer of indium tin oxide metal oxide (ITO, Indium Tin Oxides) thin film with a thickness of 500nm, pattern the method of blocking the mask, and obtain the source electrode 14a and the drain electrode 14b at the same time .
  • ITO indium tin oxide metal oxide
  • Figure 6 shows the Tb 4p peak spectrum of the X-ray photoelectron spectrum (XPS) of the thin film prepared by sputtering the target material with the ratio of In 2 O 3 mixed with Tb 4+ /Tb 3+ being 1/1, which can be calculated , the content ratio of Tb 4+ and Tb 3+ is 53.3%/46.7% (as shown in Table 1), which deviates from the composition of the target material, but basically the same.
  • XPS X-ray photoelectron spectrum
  • the film with thinner thickness (within 1000nm) and less Tb-doped content (within 10%) absorbs more in the visible light region than the corresponding target
  • the absorption of the material is much weaker, even weaker than the absorption fluctuation caused by the microcavity effect, which is a normal phenomenon.
  • TFTs thin film transistors
  • NBIS LED white light irradiation plus -20V gate bias voltage
  • Fig. 7 is the transfer characteristic curve of the thin film transistor under NBIS under the condition that pure In 2 O 3 is not doped with Tb
  • Tb 4+ /Tb 3+ 0/1
  • the mobility dropped to 19.5 cm 2 /Vs
  • the ⁇ V th under NBIS was -13.1V.
  • Tb 3+ cannot absorb visible light and cannot down-convert blue light
  • Tb 3+ contains 8 f electrons, which are more than half full, and are easily split by the crystal field to form a large number of defect energy levels, resulting in a decrease in mobility.
  • Tb 3+ cannot solve the problem of negative drift of NBIS, and the mobility is low.
  • Tb 4+ the NBIS lower threshold voltage drift of the device is significantly improved, especially with only Tb 4+ (excluding Tb 3+ ), there is almost no drift in the NBIS lower threshold voltage of the device. Decreasing the ratio of Tb 4+ /Tb 3+ reduces the mobility and NBIS stability.
  • the transistor using Tb 4+ doped In 2 O 3 as the channel layer can effectively improve the stability of NBIS while maintaining high mobility.
  • An oxide semiconductor target material includes a matrix oxide semiconductor material and positive tetravalent lanthanide ions.
  • the matrix oxide semiconductor material is InSnZnO
  • the positive tetravalent lanthanide ion is Tb 4+ .
  • the target is prepared by the following method: firstly, the terbium oxide powder is further oxidized, after being ground, it is uniformly mixed with the matrix oxide semiconductor material powder, and then sintered in a strong oxidizing atmosphere, after the second grinding and mixing, it is passed through cold isostatic pressing Shaped and then sintered in a strong oxidizing atmosphere.
  • the total content of Tb in different valence states in the target is 5%, and all Tb is controlled to be Tb 4+ by adjusting the above oxidation conditions and sintering atmosphere.
  • a transistor as shown in FIG. 10 , is provided with: a substrate 10, a gate 11 located on the substrate 10, a gate insulating layer 12 located on the substrate 10 and the gate 11, covering the upper surface of the gate insulating layer 12 and The channel layer 13 above the gate 11, the etch barrier layer 17 covering the channel layer, the source electrode 14 and the drain that are spaced from each other and electrically connected to the two ends of the channel layer 13 and the etch barrier layer 14 Pole 15.
  • the substrate 10 is glass (containing a water-oxygen barrier layer), and Mo/Al/Mo electrodes are prepared by sputtering on the substrate 10, with a total thickness of 400nm.
  • the gate 11 is formed by coating photoresist, exposure, development and other processes.
  • a SiN x /SiO 2 stacked film was prepared on the substrate 10 with the gate 11 as the gate insulating layer 12 by plasma enhanced chemical vapor deposition (PECVD), with a total thickness of 320 nm.
  • PECVD plasma enhanced chemical vapor deposition
  • the composition of the channel layer 13 is TbInSnZnO, prepared by sputtering, and the thickness is 40nm.
  • the specific preparation process of the channel layer 13 is as follows: the aforementioned target material of this embodiment is installed on the target position, a film is formed by sputtering, and patterned by photolithography.
  • a SiO 2 thin film with a thickness of 100 nm was prepared on the substrate 10 formed with the channel layer 13 by PECVD, and patterned by dry etching to form an etching stopper layer 17 .
  • Sputtering is used to prepare Mo/Al/Mo electrodes on the substrate 10 formed with an etching barrier layer 17, with a total thickness of 600nm, and steps such as coating photoresist, exposure, and development are used to form source electrodes 14 and drain electrodes 15 .
  • the device After the device is prepared, it is annealed at 350°C for 1 h in the atmosphere.
  • the transistor using the oxide semiconductor material doped with Tb 4+ as the channel layer can effectively improve the stability of NBIS while maintaining a high mobility.
  • the oxide semiconductor thin film of the present invention can be used as a channel layer material of a transistor.
  • the oxide semiconductor thin film and its thin film transistor are mainly used for active driving of organic light emitting display, liquid crystal display or electronic paper, and can also be used for integrated circuits.
  • An oxide semiconductor target material which includes a host oxide semiconductor material and tetravalent terbium ions Tb 4+ .
  • the target is prepared by the following method: firstly, the terbium oxide powder is further oxidized, after being ground, it is uniformly mixed with the matrix oxide semiconductor material powder, and then sintered in a strong oxidizing atmosphere, after the second grinding and mixing, it is passed through cold isostatic pressing Shaped and then sintered in a strong oxidizing atmosphere.
  • a thin film transistor was prepared by the same process as in Example 7.
  • the ⁇ V th (V) and mobility of the prepared thin film transistors were tested by using LED white light irradiation and a gate bias voltage of -25V, and the results are shown in Table 3.
  • Tb 4+ plays a major role in the NBIS stability of the device and can maintain a good mobility of the device.
  • the target material includes a matrix oxide semiconductor material and positive tetravalent lanthanide ions.
  • the matrix oxide semiconductor material is indium oxide (In 2 O 3 ), and the positive tetravalent lanthanide ion is positive tetravalent cerium (Ce 4+ ).
  • the target material is prepared by the following method: first, the oxide of Ce is ground and uniformly mixed with the matrix oxide semiconductor material powder, and then sintered in a strong oxidizing atmosphere, and then formed by cold isostatic pressing after secondary grinding and mixing, and then Sintered in a strong oxidizing atmosphere. The Ce content is 3%.
  • the ratio of Ce 4+ /Ce 3+ in the target is controlled to be 1/0 (ie no Ce 3+ ).
  • Dy dysprosium
  • Yb ytterbium
  • the measured valence states are positive three. valence, so both Dy 4+ /Dy 3+ and Dy 4+ /Dy 3+ are 0/1.
  • Example 6 The same process as in Example 6 was used to prepare a thin film transistor, and the prepared thin film transistor was irradiated with LED white light and a gate bias of -20V was used to test the corresponding ⁇ Vth (V) and mobility, and the results are shown in Table 4. It can be seen that the NBIS stability of the three doped TFTs is poor.
  • the target material includes a matrix oxide semiconductor material and positive tetravalent lanthanide ions.
  • the matrix oxide semiconductor material is indium oxide (In 2 O 3 ), and the positive tetravalent lanthanide ion is Pr 4+ .
  • the target material is prepared by the following method: first, the praseodymium oxide powder is blended and oxidized, after being ground, it is uniformly mixed with the matrix oxide semiconductor material powder, and then sintered in a strong oxidizing atmosphere, after the second grinding and mixing, it is passed through cold isostatic Compression molding, and then sintering in a strong oxidizing atmosphere. Two kinds of targets with different Pr doping amounts were prepared, the Pr contents were 3% and 7%, respectively. By adjusting the above oxidation conditions and sintering atmosphere, the ratios of Pr 4+ /Pr 3+ of the two targets with different Pr contents were controlled to be 1/1.
  • the target preparation method of the present invention can form tetravalent praseodymium on the target.
  • a kind of transistor as shown in Figure 1, its preparation process is the same as embodiment 6, and difference is that the channel layer 13 of this thin film transistor is that the used target material is the Pr-doped In2O3 target in embodiment 10 material.
  • FIG 12 and Figure 13 show the transfer characteristic curves of the above-mentioned thin film transistors (TFT) based on different Pr 4+ contents under NBIS (LED white light irradiation plus -20V gate bias), and their performances are listed in Table 5. It can be seen that when doped with 3% Pr, the mobility is 18.9cm 2 /Vs, and the threshold voltage shift ( ⁇ V th ) under NBIS is -4.1V, and its NBIS stability is improved compared with pure In 2 O 3 TFT ; However, compared with TFT doped with the same concentration of Tb 4+ In 2 O 3 , the mobility and NBIS stability of Pr 4+ In 2 O 3 TFT are poorer, and there is an obvious hump effect in the subthreshold region, That is, the current is turned on in advance and the off-state current (I off ) increases, which is mainly related to the oxygen vacancy or Pr 4+ containing an f electron, which is easily affected by the crystal field and forms a large number of defect
  • the mobility decreased rapidly to 9.2cm 2 /Vs, and the threshold voltage shift ( ⁇ V th ) of NBIS showed a positive shift of +0.5V in the first 100s and a negative shift of -1.2V in the last 3500s; And when the gate voltage (V GS ) is greater than 5V, the lower threshold voltage drift of NBIS is opposite to that when V GS is less than 5V.
  • the transistor using Pr 4+ doped In 2 O 3 as the channel layer has limited improvement on the NBIS stability of the device, and the mobility of the device is greatly reduced. Therefore, Pr doping cannot satisfy the object of the present invention.

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Abstract

一种氧化物半导体靶材、薄膜、薄膜晶体管及提高薄膜晶体管稳定性和迁移率的方法，氧化物半导体靶材包括基质氧化物半导体材料和正四价镧系离子。利用含有正四价镧系离子的氧化物半导体靶，制备作为薄膜晶体管沟道层的薄膜材料，并相应制备薄膜晶体管。在光照及负栅压时，正四价镧系离子轨道杂化跃迁吸收蓝光甚至红绿光，进一步下转换成低能光或无辐射的形式，避免了背光源或者自发光中的蓝光电离氧空位而造成电导增大、造成阈值电压负漂的问题，提高了NBIS稳定性。

Description

氧化物半导体靶材、薄膜、薄膜晶体管及提高其稳定性的方法 技术领域
本发明属于半导体材料与器件领域，特别涉及一种氧化物半导体靶材、薄膜及以该氧化物半导体薄膜作为沟道层的薄膜晶体管、提高薄膜晶体管稳定性和迁移率的方法。
背景技术
近年来，在平板显示尤其是在有机电致发光显示(OLED)领域，基于氧化物半导体的薄膜晶体管(TFT，Thin-Film Transistor)越来越受到重视。
作为显示器件核心部件的TFT，在显示领域的应用中，其不可避免地会受到光的照射。例如：在液晶显示中，薄膜晶体管的沟道会受到背光的照射；而在OLED显示中，薄膜晶体管的沟道会受到OLED自发光的影响。无论是背光源还是OLED自发光，其发光都在可见光范围内，光子能量最大的是蓝光发光。而氧化物半导体(如IZO、IGZO等)对蓝光特别敏感，因为蓝光会使氧化物半导体的氧空位电离，并释放电子进入导带参与导电，进而使基于氧化物半导体的TFT(简称氧化物TFT)的阈值电压负漂，引起显示画面的劣化。
氧化物半导体在蓝光照射下，其中性氧空位(V O)电离形成正二价氧空位(V O 2+)的过程中会造成晶格弛豫(例如，ZnO的V O会有12％的内向弛豫，而电离后的V O 2+会有23％的外向弛豫，电离前后的体积变化高达35％)，因此其电离过程和恢复过程都很慢，造成阈值电压持续漂移。尤其是在负栅偏压加光照下，界面处能带上翘，价带顶更靠近费米能级，造成V O 2+的生成能量(Formation Energy)大幅降低，此时V O会更容易在光照下电离形成V O 2+，同时形成大量的光生电子，阈值电压漂移现象严重。因此，不仅仅改善氧化物TFT在光照影响下的稳定性，更需要解决氧化物TFT在光照加负栅偏压应力(Negative bias illumination stress，即NBIS)下的阈值电压稳定性问题。
现有技术中，通过增加黑矩阵，对薄膜晶体管的沟道层进行遮光处理可以在一定程度下改善光稳定性。但是，该方式只是解决光照影响下的稳定性问题，无法解决光通过衍射进入氧化物半导体层的问题，对于长时间光照条件下的稳定性改善有限；而且，增加遮光工艺，也即增加了制备的复杂程度，造成制造成本的提高。因此，提高氧化物半导体本身的光照稳定性具有非常重大的现实意义。
专利文件1(CN201710229199.9)公开了一种掺稀土氧化物的氧化物半导体薄膜，掺杂氧化镨、氧化铽、氧化镝或氧化镱。需要说明的是，此专利中所掺杂的氧化物中的稀土元素为三价，例如其中的氧化镨为三氧化二镨、氧化铽也是三氧化二铽、氧化镝是三氧化二镝、氧化镱是三氧化二镱。根据专利文件1描述，掺杂氧化镨、氧化铽、氧化镝或氧化镱的原理是利用镨、铽、镝、镱原子替代了原金属原子而导致原来的M-M相互作用减弱，致使价带顶位移，使原氧化物半导体材料能带结构由直接带隙向间接带隙转变。在入射光照射时，间接带隙的价带电子需要与声子相互作用才能跃迁到导带，对输运特性产生贡献，增加了增加光生电子产生的难度。这种材料能使薄膜晶体管在入射光照射时，器件的阈值电压偏移减小，即提高光照(不加负栅偏压)稳定性。然而，这种通过掺杂稀土元素改变能带(价带顶)结构、增加光生电子产生难度的方法，仅能提高光照(不加负栅偏压)稳定性，不能从根本上解决氧化物TFT面临的更重要的光照加负栅偏压应力(NBIS)下的稳定性差的问题。因为在负栅偏压下，能带会发生弯曲，界面处的价带上翘，价带顶与费米能级之间的距离拉近，造成正二价的氧空位(V O 2+)生成能量大幅降低；这时，在光照下中性氧空位(V O)更容易电离，从而造成NBIS下阈值电压负漂。也就是说，对比文件1的方法对价带顶的改变作用远小于负栅偏压对价带顶的改变作用；因此，仅能提高光照(不加负栅偏压)稳定性，不能从根本上解决氧化物TFT面临的更重要的光照加负栅偏压应力(NBIS)下的稳定性差的问题。
非专利文献1(ACS Appl.Mater.Interfaces 2019,11,5232-5239)、和非专利文献2(Phys.Status Solidi A 2021,218,2000812)公开了一种掺Pr的氧化物半导体材料，Pr作为中介，能够加快电子与正二价氧空位的复合、降低氧空位电离产生的光生电子的寿命，提高光照(不加负栅偏压)稳定性。 但是这种方式并没有阻止中性氧空位的电离、而是新引入了Pr电子作为电子陷阱，它不但会捕获光生电子，同样也会捕获或散射正常的载流子，造成迁移率下降；同时因为没有阻止氧空位电离，只是加快复合，会造成晶格的迅速弛豫，在光照加负偏压应力(NBIS)下，由于有大量的氧空位电离，晶格的整体弛豫(膨胀)大，来不及迅速恢复，所以该方法也仅能提高光照(不加负栅偏压)稳定性，不能彻底改善光照加负栅偏压应力(NBIS)下的稳定性。此外，Pr无论是正三价(含有2个f电子)还是正四价(含有1个f电子)均含有未满(或未半满)的f电子，这些未满或未半满的f电子结构不稳定，会受到晶体场的严重影响而形成劈裂，造成大量缺陷态能级，严重影响迁移率和亚阈值摆幅。所以在氧化物半导体材料中，Pr离子的引入无法同时提高迁移和NBIS稳定性。
专利文件2(CN202011511468.9)公开了一种，正三价稀土化合物掺杂的氧化物半导体，通过调节阴离子的电负性使f-d跃迁的吸收红移。然而，降低阴离子的电负性会降低稀土离子和阴离子的结合能，使得在高温烧结中分解形成杂质，从而影响性能的提高。
因此，有必要提供一种能够从本质上解决在光照加负栅压应力(NBIS)下TFT器件的稳定性问题的方案，且该方案不引入新的杂质或缺陷能级造成迁移率下降或者造成工艺复杂度增加。
发明内容
本发明在于从本质上解决氧化物TFT器件NBIS稳定性问题，实现氧化物TFT在光照下特别是在NBIS下器件稳定性良好，且不存在因为新的方案引起制备工艺复杂化或者引入其它杂质(或缺陷能级)而引起另外性能特别是迁移率方面的劣化。
本发明的上述目的通过如下技术手段实现：
提供一种氧化物半导体靶材，包括基质氧化物半导体材料和正四价镧系离子，其中基质氧化物半导体材料含有In、Zn、Sn、Ga和Cd五种元素中的至少一种。
镧系氧化物中的镧系离子稳定的价态通常是正三价，如氧化镧、氧化镨、氧化钕、氧化钆、氧化铽、氧化镝等通常都是以三氧化二物(Ln 2O 3)的形式存在，只有氧化铈可以以CeO 2的形式稳定存在。正三价镧系离子的f-d跃迁是宽谱吸收，但是由于正三价的稀土离子的f-d跃迁能隙较大，通常只对紫外或紫光有强烈的宽谱吸收，无法对蓝光大量吸收，因此，无法解决在负偏压及可见光(LED背光)照射下(NBIS)的长时间阈值电压稳定性的问题。Ce 3+的f-d吸收边最低，位于紫光区域，其它三价离子的f-d吸收边均位于紫外光区域。Tb 3+的f-d跃迁需要的能量较高，不能通过吸收蓝光实现跃迁，因此，Tb 3+无法吸收LED发出的宽谱强烈的光(蓝光部分)。正三价的镨(Pr 3+)在450nm的蓝光区域有微弱的带状吸收，这是Pr 3+的f-f跃迁吸收，但是由于f-f属于禁阻跃迁，吸收较弱；另外，f-f跃迁的摩尔消光吸收系数较小，f-f跃迁吸收属于窄谱吸收，无法完全吸收LED发出的宽谱强烈的光(蓝光部分)。因此，掺杂三价镧系离子对光稳定性的改善作用很有限。
部分镧系离子可以在特殊条件下存在正四价或正二价，不同价态的镧系离子都有轨道杂化电荷跃迁吸收，实验发现，正四价镧系离子的吸收所需的光子能量更低。正四价镧系离子轨道杂化跃迁的过程中，电荷跃迁能吸收蓝光或可见光，且轨道杂化电荷跃迁时阳离子和阴离子的弛豫可以大部分抵消，不会造成大的整体弛豫，因此，镧系离子的轨道杂化电荷跃迁比氧空位更容易吸收光子(抑制氧空位吸收光子)，并迅速通过无辐射跃迁等形式回到基态。避免了氧空位电离会造成严重的晶格弛豫(膨胀)存在的电离过程和恢复过程缓慢的问题，避免阈值电压持续漂移。
优选的，上述的氧化物半导体靶材，正四价镧系离子为Tb 4+。
优选的，上述的氧化物半导体靶材，Tb 4+离子数量与Tb 3+离子数量的比值大于0.1。
优选的，上述的氧化物半导体靶材，Tb 4+离子数量与Tb 3+离子数量的比值大于1。
更优选的，上述的氧化物半导体靶材，Tb 4+离子数量与Tb 3+离子数量的大于2。
最优选的，上述的氧化物半导体靶材，只含有Tb 4+，不含Tb 3+，即基质氧化物半导体材料只掺有正四价铽离子Tb 4+。
在现有技术中，靶材需要经过高温烧结，即便在原料中存在正四价的镧系离子，由于其氧化还原电位较低，在靶材高温烧结过程中往往容易脱氧而被还原成正三价。因此，在基质氧化物半导 体材料中难以有效掺入正四价镧系离子，实际传统靶材成分中镧系离子基本为正三价。溶液法在特殊情况下可以形成正四价镧系离子，但前驱体和溶剂会引入大量杂质，从而降低迁移率。镧系离子的氧化物粉末通常有正常的稳定结构，难以通过普通的方法将其直接氧化成正四价氧化物粉末。由于常规的氧化物半导体靶材领域，含有正四价镧系离子的靶材不常见，因此，技术上不会设置含有正四价镧系离子氧化物半导体靶材的技术方案。或者说，本领域人员就不会往这个方向想。本申请克服技术偏见，选择含有正四价镧系离子氧化物半导体靶材作为本发明的技术方案。
进一步的，上述氧化物半导体靶材，通过如下方法制备：首先将镧系元素的氧化物粉末与基质氧化物半导体材料粉末均匀混合，然后在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压或热压成型，再在强氧化性氛围内烧结得到氧化物半导体靶材。该方法将铽的氧化物粉末与基质氧化物半导体材料粉末混合，多次烧结，利用镧系离子与基质氧化物半导体材料形成固溶相时，容易将正三价的镧系离子进一步氧化成正四价的镧系离子，克服了现有技术中靶材在普通方法烧结时，容易脱氧使得正四价镧系离子被还原成正三价而不易得到正四价镧系离子的技术问题，能够提高靶材中正四价镧系离子的比例。需要说明的是，但本发明的靶材不仅限于用该方法制备。
本发明突破常规镧系元素制成的靶材为三价的限制，另辟蹊径设置氧化物半导体靶材含有正四价镧系离子特别是Tb 4+的技术方案。利用基质氧化物半导体材料形成具有正四价Tb 4+的氧化物半导体靶材，以用于制备作为薄膜晶体管的沟道层。由于正四价Tb 4+的轨道杂化跃迁所需的能量较低的特点，当薄膜晶体管存在光照时，可以吸收蓝光甚至红绿光，进一步下转换成无辐射的形式，避免了背光源或者自发光中的蓝光电离氧空位而造成电导增大、造成阈值电压负漂的问题，提高了器件的光照稳定性；而在光照加负栅压应力(NBIS)下，同样能解决器件阈值电压负漂问题；且不会存在制备工艺复杂化的问题，也不会引入杂质或晶体场劈裂能级缺陷，不影响电子输运，实现NBIS稳定性良好且迁移率高的TFT器件。
本发明同时提供一种氧化物半导体薄膜，通过物理气相沉积的方法制备，厚度为3-200nm，物理气相沉积所用的靶材为上述的氧化物半导体靶材。
本发明还提供一种提高薄膜晶体管稳定性的方法，
制备一氧化物半导体靶材，所述半导体靶材包括基质氧化物半导体材料和作为功能离子的正四价镧系离子，功能离子能够进行轨道杂化，轨道杂化跃迁所需的能量不高于蓝光能量，且功能离子在轨道杂化跃迁后转化成无辐射的形式；
通过所述氧化物半导体靶材沉积用于作为薄膜晶体管沟道层的氧化物半导体薄膜；
当薄膜晶体管存在光照或者同时存在光照和负栅偏压时，功能离子吸收蓝光甚至红绿光实现轨道杂化跃迁，并转化成无辐射的形式；通过功能离子轨道杂化跃迁吸收光照阻止氧空位电离，避免出现严重的晶格弛豫，造成阈值电压漂移。
进一步的，上述的提高薄膜晶体管稳定性和迁移率的方法，正四价镧系离子为Tb 4+，Tb 4+离子数量与Tb 3+离子数量的比值大于0.1。
优选的，上述的提高薄膜晶体管稳定性的方法，以物理气相沉积方法沉积氧化物半导体薄膜。
发明还提供一种薄膜晶体管，设置有栅极、沟道层、绝缘层等，所述沟道层包含一层或多层氧化物半导体层，其中至少一层氧化物半导体层设置为上述的氧化物半导体薄膜。
上述薄膜晶体管用于显示的驱动背板，还可以用于内存、闪存、动态随机存取存储器。
与现有技术相比，本发明具有以下优点和有益效果：
本发明利用含有正四价镧系离子特别是正四价铽离子的氧化物半导体靶，制备作为薄膜晶体管沟道层的薄膜材料，并相应制备薄膜晶体管。由于正四价铽离子的轨道杂化跃迁所需的能量较低，当薄膜晶体管存在光照时，可以吸收蓝光甚至红绿光，进一步下转换成无辐射的形式，避免了背光源或者自发光中的蓝光电离氧空位而造成电导增大、造成阈值电压负漂的问题，提高了器件的光照稳定性；而在光照加负栅压应力(NBIS)下，同样能解决器件阈值电压负漂问题；且不会存在制备工艺复杂化的问题，也不会引入杂质或晶体场劈裂能级缺陷，不影响电子输运，实现NBIS稳定性 良好且迁移率高的TFT器件。
因此本发明的氧化物半导体靶材、薄膜、晶体管能保持迁移性能，提高NBIS稳定性。
附图说明
为了更清楚地说明本发明的技术方案，下面将对本发明一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本发明实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1是本发明一种薄膜晶体管的结构示意图；
图2是以在AMOLED显示像素驱动中，以选址管TFT1和驱动管TFT2为例的工作原理图；
图3是本发明一些实验中的正三价镧系离子的f-d跃迁的吸收能级示意图。
图4是本发明一些实验中的正三价和正四价镧系离子轨道杂化电荷跃迁所需要的最低能量示意图。
图5是本发明实施例5中不同Tb 4+掺杂量的靶材的反射光谱。
图6是本发明实施例6的利用In 2O 3掺入Tb 4+/Tb 3+的比值为1/1的靶材溅射所制备薄膜的X射线光电子能谱(XPS)的Tb 4p峰谱。
图7是本发明实施例6中，纯In 2O 3不掺入Tb情况下，薄膜晶体管的NBIS下的转移特性曲线。图8是本发明实施例6中，In 2O 3掺入3％Tb，且Tb 4+/Tb 3+＝1/0情况下的薄膜晶体管的NBIS下的转移特性曲线。
图9是本发明实施例6中，In 2O 3掺入3％Tb，且Tb 4+/Tb 3+＝1/1情况下的薄膜晶体管的NBIS下的转移特性曲线
图10是本发明实施例9中的一种薄膜晶体管的结构示意图。
图11是本发明实施例10中不同Pr掺杂量的靶材的反射光谱。
图12是本发明实施例11中基于3％Pr 4+含量的薄膜晶体管(TFT)在NBIS(LED白光照射加-20V的栅偏压)下的转移特性曲线。
图13是本发明实施例11中基于7％Pr 4+含量的薄膜晶体管(TFT)在NBIS(LED白光照射加-20V的栅偏压)下的转移特性曲线。
图14是本发明实施例11中基于3％Pr 4+含量和相同Tb 4+含量的薄膜的荧光光谱对比。
具体实施方式
下面将结合附图，对本发明一些实施例中的技术方案进行清楚、完整地描述。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(或者包含、含有，comprise，)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
本文中，基质氧化物半导体材料(如In 2O 3、ZnO、InGaZnO 4等)中的阳离子和阴离子可以是完全化学计量匹配，也可以存在氧空位、氧间隙、阳离子空位、阳离子间隙等非化学计量匹配情况。
本文中，“离子”是一种化学价态的表述形式，不仅限于离子化合物，离子化合物和共价化合物的元素均可称为“离子”。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”，包括以下三种组合：仅A，仅B，及A和B的组合。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
本公开的一些实施例提供一种显示装置，包括显示面板，以及设置于显示面板上的驱动电路，如像素驱动电路、栅极驱动电路等。
薄膜晶体管(Thin-Film Transistor，TFT)是构成像素驱动电路、栅极驱动电路等的重要元器件，在通电过程中，通过控制薄膜晶体管的开启和关闭，即可控制像素驱动电路和栅极驱动电路驱动显示面板进行显示。需要说明的是，薄膜晶体管是晶体管中的一种，本发明的材料、制备方法和器件适用于所有类型的晶体管，而不仅限于薄膜晶体管；其应用范围也不仅限于显示领域，还可以包括晶体管的其它应用领域，如内存、闪存、动态随机存取存储器等。
其中，以上所述的显示装置可以为LCD(Liquid Crystal Display，液晶显示器)、OLED(Organic Light-Emitting Diode，有机发光二极管)和QLED(Quantum Dot Light-Emitting Diodes，量子点发光二极管)、MicroLED(Micro Light-Emitting Diodes，微发光二极管)、MiniLED(Mini Light-Emitting Diodes，迷你发光二极管)显示装置等中的一种。
该显示装置具体可以为手机、平板电脑、笔记本、个人数字助理(personal digital assistant，PDA)、车载电脑、膝上型计算机，数码相机等。
该显示装置的形态不限，可以是刚性显示、柔性显示、可拉伸显示以及任意形状的显示等。
根据沟道层的材料不同，TFT主要包括非晶硅(如氢化非晶硅：a-Si：H)TFT、低温多晶硅(Low Temperature Poly-silicon，LTPS)TFT、氧化物TFT和有机TFT等。
其中，氧化物TFT是以氧化物半导体(如In 2O 3、ZnO、InZnO、InGaZnO等)作为沟道层的TFT，由于氧化物半导体的载流子迁移率相对较高、工艺温度低、关态电流低以及器件的均匀性好等优点得到更多的关注。与此同时，氧化物TFT也有一些难题有待解决，例如氧化物TFT在光照负栅压应力(NBIS)下的稳定性依然不足。尤其是对于作为显示面板部件的TFT而言，在显示领域的应用中，不可避免地会受到光的照射。例如，如附图1所示，在液晶显示中，TFT的沟道131会受到背光的照射，在OLED显示中，TFT的沟道131会受到OLED自发光的影响。无论是背光源还是自发光，其发光都在可见光范围内，光子能量最大的是蓝光发光。而氧化物半导体(如IZO(Indium Zinc Oxide，氧化铟锌)、IGZO(Indium Gallium Zinc Oxide，氧化铟镓锌)等)对蓝光特别敏感，因为蓝光会使氧化物半导体材料中的氧空位电离，并释放电子进入导带参与导电，进而使阈值电压负漂，引起显示画面的劣化。
这里，如附图2所示，以在AMOLED(Active-matrix organic light emitting diode，有源矩阵有机发光二极管)显示像素驱动中，至少包括两个TFT，分别称为选址管TFT1和驱动管TFT2为例，由于氧化物TFT大多只显示n沟道特征，所以其在正栅压时呈开启状态，负栅压时呈关闭状态(当氧化物半导体载流子浓度较大时，会出现常开的状态，即需要一个负栅压才能将其完全关断)。在每个扫描周期内选址管TFT1只打开一次，其余时间都处于关闭状态，因此选址管TFT1在负栅偏应力(Negative Bias Stress，NBS)下的稳定性就显得极为重要了。驱动管TFT2的源极是与OLED直接相连的，只要OLED发光，就要一定大小的电流流经驱动管TFT2的源漏电极，因此，驱动管TFT2基本处于开启状态，其在正栅压应力(Positive Bias Stress，PBS)下的稳定性则显得较为重要， 氧化物TFT在栅压应力下将表现出阈值电压(V th)漂移现象。
以下，将对引起光照下阈值电压漂移的情况进行详细介绍。在蓝光照射下，中性氧空位(V O)电离形成正二价氧空位(V O 2+)的过程中会造成晶格弛豫(例如，ZnO的V O会有12％的内向弛豫，而电离后的V O 2+会有23％的外向弛豫，电离前后的体积变化高达35％)，因此其电离过程和恢复过程都很慢，造成阈值电压持续漂移。尤其是在负栅偏压加光照下，界面处能带上翘，价带顶更靠近费米能级，造成V O 2+的生成能量(Formation Energy)大幅降低，V O会更容易在光照下电离形成V O 2+，同时形成大量的光生电子，阈值电压漂移现象严重。因此，改善氧化物TFT在NBIS(Negative bias illumination stress，负栅偏压光照应力)下的阈值电压稳定性显得尤为重要。
本发明的一些实施例提供的晶体管(或薄膜晶体管)，设置有栅极、沟道层、绝缘层等，所述沟道层设置为上述的包括基质氧化物半导体材料和正四价镧系离子的氧化物半导体薄膜。在一些实施例中，晶体管包括：栅极、沟道层、位于栅极和沟道层之间的绝缘层以及分别电性连接在沟道层两端的源极和漏极；所述的电性连接是指两者之间具有导电通道，两者可以直接接触，也可以进一步包括缓冲层等。需要说明的是，晶体管的具体结构可以采用不同结构类型，如底栅顶接触、底栅底接触、顶栅顶接触、顶栅底接触等，只要其沟道层是上述含有基质氧化物半导体材料和正四价镧系离子的氧化物半导体薄膜，都属于本发明的技术。
在一些实施例中，沟道层可以包含一层或多层薄膜，其中至少一层薄膜设置为上述的包括基质氧化物半导体材料和正四价镧系离子的氧化物半导体薄膜。这时，沟道层不同的位置的薄膜，可以选择不同正四价镧系离子掺杂的氧化物半导体材料；或者选择相同正四价镧系离子掺杂，不同掺杂量的氧化物半导体材料；或者选择有正四价镧系离子掺杂的氧化物半导体材料和无正四价镧系离子掺杂的氧化物半导体材料的薄膜的任意组合。在此，对以上掺杂有正四价镧系离子的氧化物半导体材料在沟道层中的应用位置以及应用的掺杂比例均不做具体限定。
下面，将通过具体实验例对本发明提供的技术方案进行详细地示例性地描述。
实施例1。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价镧系离子Tb 4+。其中，基质氧化物半导体材料为氧化物材料，含有In、Zn、Sn、Ga和Cd五种元素中的至少一种。
基质氧化物半导体材料为氧化物材料，含有In、Zn、Sn、Ga和Cd五种元素中的至少一种，可以进一步含有Al、B、Sc、Y、Zr、Hf、Ta、W、Mg等元素中的至少一种。
需要说明的是，本方案的创新点是形成含有正四价镧系离子的靶材。除了基质氧化物半导体材料外，改性物质是正四价镧系离子Tb 4+，由于制备工艺等因素，通常也会含有一定比例的Tb 3+。除了Tb 4+、Tb 3+外，其它的元素物质不是目标掺杂物质以杂质对待，理想状况下靶材不含杂质。需要说明的是，该氧化物半导体靶材，必须含有一定比例的Tb 4+，其它价态的离子如Tb 3+或者其它杂质不是必须的物质。
在氧化物半导体靶材中，铽离子数量与所有阳离子数量之比介于0.05％至10％之间。需要说明的是，靶材中基质氧化物半导体材料与改性物质之间的配比关系，本领域技术人员可以根据实际需要灵活选择，不是本发明的主要研究问题。
为了使该氧化物半导体靶材符合需要的性能，控制提高靶材中Tb 4+离子的含量是关键。具体的，氧化物半导体靶材中，Tb 4+离子数量与Tb 3+离子数量的比值控制在大于等于0.1，更佳的范围是大于等于1，再更佳的范围是大于等于2。氧化物半导体靶材中，改性物质全部是Tb 4+时，性能最佳。
现有技术中，含有正四价镧系离子的氧化物半导体靶材很难获得，几乎不存在。镧系离子以Ln表示，由于Ln 3+—Ln 4+的氧化还原电位较低，难以从In 2O 3、ZnO、SnO 2等氧化物半导体中夺氧而被氧化成正四价；此外，正四价镧系离子在靶材高温烧结过程中容易脱氧而被还原成正三价。因此，在基质氧化物半导体材料中难以有效掺入正四价镧系离子。溶液法在特殊情况下可以形成正四价镧系离子，但前驱体和溶剂会引入杂质，从而降低迁移率。镧系离子的氧化物粉末通常有正常的稳定结构，难以通过普通的方法将其直接氧化成正四价氧化物粉末；靶材在普通方法高温烧结时，容易 脱氧使得正四价镧系离子被还原成正三价。以上种种因素，都限制了现有技术中不易获得含有正四价镧系离子的氧化物半导体靶材。因而，在原材料不易得到的情况下，本领域技术人员也不考虑通过正四价镧系离子提高薄膜晶体管NBIS稳定性的相关技术构思。
本发明突破常规镧系元素制成的靶材为三价的限制，克服技术偏见另辟蹊径设置氧化物半导体靶材含有正四价镧系离子的技术方案。本发明的方法利用工艺，使四价镧系离子与基质氧化物半导体材料形成固溶相，相对容易将正三价的镧系离子进一步氧化成正四价的镧系离子，从而提高靶材中正四价镧系离子的比例。
该靶材通过如下的方法制备：首先将铽的氧化物粉末与基质氧化物半导体材料粉末均匀混合，再在强氧化性氛围内烧结，再经研磨混合后通过冷等静压或热压成型，再在强氧化性氛围内烧结。利用该靶材制备方法，可以控制提高Tb 4+离子数量与Tb 3+离子数量的比值。
具体，可将铽的氧化物粉末与基质氧化物半导体材料粉末均匀混合，然后在强氧化性氛围内烧结，经研磨混合后通过冷等静压或热压成型，再在强氧化性氛围内烧结。也可以先将铽的氧化物粉末进一步氧化成二氧化物或者氧化成正四价和正三价镧系离子的氧化物或混合物，经研磨后与基质氧化物半导体材料粉末均匀混合，再在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压或热压成型，再在强氧化性氛围内烧结。需要说明的是，本发明的氧化物半导体靶材不限于通过本实施例中的制备方法制备，其它的制备方法也适用于本发明的氧化物半导体靶材的制备。
镧系氧化物中的镧系离子稳定的价态通常是正三价，如氧化镧、氧化镨、氧化钕、氧化钆、氧化铽、氧化镝等通常都是以三氧化二物(Ln 2O 3)的形式存在。正三价镧系离子的f-d跃迁是宽谱吸收，但是由于正三价的稀土离子的f-d跃迁能隙较大，通常只对紫外或紫光有强烈的宽谱吸收，无法对蓝光大量吸收，因此，无法解决在负偏压及可见光(LED背光)照射下(NBIS)的长时间阈值电压稳定性的问题。附图3示出了正三价镧系离子的f-d跃迁的吸收边，可以看出，Ce 3+的f-d吸收边最低，位于紫光区域，其它三价离子的f-d吸收边均位于紫外光区域。Tb 3+的f-d跃迁需要的能量较高，不能通过吸收蓝光实现跃迁，因此，Tb 3+无法吸收LED发出的宽谱强烈的光(蓝光部分)。正三价的镨(Pr 3+)在450nm的蓝光区域有微弱的带状吸收，这是Pr 3+的f-f跃迁吸收，但是由于f-f属于禁阻跃迁，吸收较弱；另外，f-f跃迁的摩尔消光吸收系数较小，f-f跃迁吸收属于窄谱吸收，无法完全吸收LED发出的宽谱强烈的光(蓝光部分)。因此，掺杂三价镧系离子对光稳定性的改善作用很有限。
镧系离子多数稳定的价态是正三价，部分镧系离子可以存在正四价，不同价态的镧系离子都有轨道杂化电荷跃迁吸收，实验发现，正四价镧系离子的吸收所需的光子能量更低。正四价镧系离子轨道杂化跃迁的过程中，电荷跃迁能吸收蓝光或可见光，且轨道杂化电荷跃迁时阳离子和阴离子的弛豫可以大部分抵消，不会造成大的整体弛豫，因此，镧系离子的轨道杂化电荷跃迁比氧空位更容易吸收光子(抑制氧空位吸收光子)，并迅速通过无辐射跃迁等形式回到基态。避免了氧空位电离会造成严重的晶格弛豫(膨胀)存在的电离过程和恢复过程缓慢的问题，避免阈值电压持续漂移。
附图4示出了一些实验中的正三价和正四价镧系离子轨道杂化电荷跃迁所需要的最低能量(吸收边)，可以看出正三价镧系离子的吸收边均大于4.5eV，位于紫外光区域。相比于f-f跃迁和f-d跃迁，正四价镧系离子轨道杂化电荷跃迁是选律所允许的跃迁，比f-f跃迁强度大10 6以上，并且是宽谱吸收，吸收谱比f-f跃迁宽得多，甚至比f-d跃迁更宽，因此，镧系离子的轨道杂化电荷跃迁能够吸收很强的宽谱光。
在镧系元素中，Ce、Pr、Tb可以存在正四价的离子，其中，Ce 4+最稳定，Tb 4+和Pr 4+在固态时不稳定。Nd和Dy在特殊情况下也存在正四价的离子，但是极不稳定。相比于Pr 4+和Tb 4+，Ce 4+轨道杂化电荷跃迁所需能量较高，所以Ce 4+的轨道杂化跃迁通常只能吸收紫外光，难以吸收蓝光，所以在氧化物半导体中掺入Ce 4+对光稳定性的改善作用有限。而Pr 4+和Tb 4+的跃迁所需的能量相比于Ce 4+较低，可以吸收蓝光甚至红绿光，进一步下转换成低能光或无辐射的形式，从而避免了氧化物 半导体中的氧空位吸收蓝光电离释放电子而造成的阈值电压漂移现象。如附图4所示，Ce 4+的轨道杂化电荷跃迁的吸收边约为4.0eV，也位于紫外光区域。Tb 4+和Pr 4+的吸收边位于蓝光区域。而Nd 4+和Dy 4+虽然也能吸收可见光，但其很不稳定。
在含有正四价镧系离子的固体中，一般同时存在正三价的镧系离子，而上述分析可知，正三价的镧系离子对NBIS稳定性的改善几乎没有作用，并且还会影响电子输运，降低迁移率。此外，相比于正四价的镧系离子，正三价的镧系离子半径大得多，远大于基质氧化物半导体材料中的In 3+、Zn 2+、Ga 3+和Sn 4+的半径(均小于
Figure PCTCN2022074682-appb-000001
)，因此在基质氧化物半导体材料掺入正三价的镧系离子的晶格弛豫要比掺入正四价的镧系离子对晶格的破坏严重很多，迁移率较低。因此，在掺入的镧系离子(包括正四价和其它价态)数量一定的情况下，正四价镧系离子数量的与其它价态镧系离子数量的比值越大，对光稳定性的改善作用越明显。同理，在掺入的四价镧系离子数量一定的情况下，正四价镧系离子数量的与其它价态镧系离子数量的比值越大，材料中所含的镧系离子总数量(包括正四价和其它价态)就越少，对电子的散射就越小，迁移率就越高。
此外，由于浓度猝灭作用，正三价的镧系离子会影响正四价的镧系离子对光的吸收。因此，正四价镧系离子数量与其它价态镧系离子数量的比值大于0.1。更优选的，上述正四价镧系离子数量与其它价态镧系离子数量的比值大于1。更优选的，上述正四价镧系离子数量与其它价态镧系离子数量的比值大于2。最优选的，所有的镧系离子均为正四价。
由于正四价镧系离子数量与其它价态镧系离子数量的比值较高，本发明的氧化物半导体靶材所需的镧系离子的掺杂量较少。优选的，镧系离子数量与所有阳离子数量之比介于0.05％至10％之间。更优选的，镧系离子数量与所有阳离子数量之比介于0.05％至5％之间。
本发明突破常规镧系元素制成的靶材为三价的限制，另辟蹊径设置氧化物半导体靶材含有正四价铽离子的技术方案。利用基质氧化物半导体材料形成具有正四价镧系离子的氧化物半导体靶材，以用于制备作为薄膜晶体管的沟道层。由于正四价镧系离子的轨道杂化跃迁所需的能量较低的特点，当薄膜晶体管存在光照时，可以吸收蓝光甚至红绿光，进一步下转换成无辐射或低能光的形式，避免了背光源或者自发光中的蓝光电离氧空位而造成电导增大、造成阈值电压负漂的问题，提高了器件的光照稳定性；而在光照加负栅压应力(NBIS)下，同样能解决器件阈值电压负漂问题，实现TFT在光照下特别是在NBIS下稳定性良好；且不会存在制备工艺复杂化的问题，也不会引入杂质或晶体场劈裂能级缺陷，不影响电子输运，实现NBIS稳定性良好且迁移率高的TFT器件。
实施例2。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价铽离子Tb 4+。
在基质氧化物半导体材料仅掺入Tb 4+的氧化物半导体靶材，所制备的薄膜晶体管，具有高的电子迁移率和NBIS性能的稳定性。实验发现，相比于其它元素掺杂，掺杂Tb 4+的性能最佳。
Tb 4+含有7个f电子，处于较稳定的半满状态，所以Tb 4+能有效的避免晶体场的影响，即不同的基质氧化物半导体材料环境、氧空位环境对Tb 4+电子结构的影响少。因此，在基质氧化物半导体材料掺入Tb 4+能提高迁移率和稳定性，展宽工艺窗口。
此外，Tb 4+
Figure PCTCN2022074682-appb-000002
的离子半径接近于基质氧化物半导体材料中的In 3+
Figure PCTCN2022074682-appb-000003
Zn 2+
Figure PCTCN2022074682-appb-000004
Figure PCTCN2022074682-appb-000005
Ga 3+
Figure PCTCN2022074682-appb-000006
和Sn 4+
Figure PCTCN2022074682-appb-000007
的半径。因此，在基质氧化物半导体材料掺入Tb 4+的晶格弛豫小，对晶格的破坏小，迁移率较高。Tb 4+吸收蓝光后会下转换成无辐射的形式，不会有其它杂散光的影响，所以Tb 4+掺杂对氧化物半导体的光稳定性的改善更有效。因此，正四价镧系离子为Tb 4+的氧化物半导体靶材性能最佳。
实施例3。
一种氧化物半导体薄膜，通过物理气相沉积的方法制备，厚度为3-200nm，物理气相沉积所用的靶材为实施例1或2中的包括基质氧化物半导体材料和正四价镧系离子的氧化物半导体靶材。上述物理气相沉积包括但不仅限于溅射(包括直流溅射、射频溅射或反应溅射)、脉冲激光沉积、原子层沉积等。
需要说明的是，制备氧化物半导体薄膜可通过两个或多个靶材制备，其中至少一个靶材包含Tb 4+的氧化物半导体靶材，再将这些靶材安装在不同靶位上通过双靶或多靶共沉积的方法得到氧化物半导体薄膜。
本发明所制备的氧化物半导体薄膜，可以吸收蓝光，用于作为薄膜晶体管的沟道层，实现半导体薄膜晶体管在光照下特别是在NBIS下器件稳定性良好，且保持薄膜晶体管良好的迁移率、亚阈值性能，且不会存在制备工艺复杂化的问题，也不会引入杂质，能够确保器件的性能。
实施例4。
一种晶体管，其结构为底栅顶接触型，如附图1所示，设置有：基板10、位于基板10之上的栅极11、位于基板10和栅极11之上的绝缘层12、覆盖在绝缘层12上表面并与栅极11对应的沟道层13、以及相互间隔并与沟道层13的两端电性相连的源极14a和漏极14b。其中，沟道层13为实施例2中的包括基质氧化物半导体材料和正四价镧系离子的氧化物半导体薄膜。
基板10可以为玻璃、柔性聚合物衬底、硅片、金属箔片、石英等衬底材料中的一种，还可以进一步包括覆盖在衬底上面的缓冲层或水氧阻隔层等。
栅极11的材料可以是导电材料，如金属、合金、导电金属氧化物、掺杂硅、导电聚合物等，或是由以上材料的任意组合构成的两层以上的薄膜的叠加。
绝缘层12可以是用于半导体装置的绝缘材料，如二氧化硅、氮化硅、氮氧化硅、氧化铝、氧化铝合金、氧化镱、氧化钛、氧化铪、氧化钽、氧化锆、聚合物绝缘材料、光刻胶等构成的单层薄膜，或是由以上材料的任意组合构成的两层以上的薄膜的叠加。
源极14a以及漏极14b的材料可以是导电材料，如金属、合金、导电金属氧化物、导电聚合物等的单层薄膜，或是由以上材料的任意组合构成的两层以上的薄膜的叠加。
本发明的晶体管可以为仅包括基板、栅极、绝缘层、沟道层、源极和漏极的封闭结构，也可以进一步包括刻蚀阻挡层、钝化层或像素定义层等，还可以与其它器件集成等。
该晶体管可通过如下方法制备：
(1)通过溅射的方法制备厚度为100～500nm的一层或多层导电薄膜，通过遮挡掩膜或光刻的方法图形化，得到栅极。
(2)再通过旋涂、滴涂、打印、阳极氧化、热氧化、物理气相沉积、或化学气相沉积法制备，厚度为100～1000nm，通过遮挡掩膜或光刻的方法图形化得到绝缘层。
(3)沟道层通过脉冲激光沉积的方法制备，通过掩膜UV照射的方法进行图形化。
(4)采用真空蒸镀或溅射的方法制备一层或多层导电薄膜，厚度为100～1000nm，采用掩膜或光刻的方法图形化同时得到源极和漏极。
本发明的晶体管，采用含有正四价铽离子的薄膜作为沟道层，由于正四价铽离子的轨道杂化跃迁所需的能量较低，当薄膜晶体管存在光照时，可以吸收蓝光甚至红绿光，进一步下转换成无辐射的形式，避免了背光源或者自发光中的蓝光电离氧空位而造成电导增大、造成阈值电压负漂的问题，提高了器件的光照稳定性；而在光照加负栅压应力(NBIS)下，同样能解决器件阈值电压负漂问题，实现TFT在光照下特别是在NBIS下稳定性良好；且不会存在制备工艺复杂化的问题，也不会引入杂质或晶体场劈裂能级缺陷，不影响电子输运，实现NBIS稳定性良好且迁移率高的TFT器件。
因此本发明的氧化物半导体靶材、薄膜、晶体管能保持高迁移率，提高NBIS稳定性。
实施例5。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价镧系离子。其中，基质氧化物半导体材料为氧化铟(In 2O 3)，正四价镧系离子为Tb 4+。正四价镧系离子Tb 4+数量与所有阳离子数量之比为3％。
该靶材通过如下的方法制备：首先将氧化铽粉末进一步氧化，经研磨后与基质氧化物半导体材料粉末均匀混合，再在臭氧氛围内烧结，经二次研磨混合后通过冷等静压成型，再在纯氧氛围内 以1400℃的温度烧结。靶材中不同价态的Tb总含量为3％，通过调节上述氧化条件和烧结氛围，将3％Tb含量的靶材的Tb 4+/Tb 3+的比值分别控制为1/1和1/0，即其Tb 4+的含量分别为1.5％和3％。
附图5为不同Tb 4+掺杂量的靶材的反射光谱，可以看出，未掺Tb的靶材(纯In 2O 3)在波长约为400-1000nm区间强反射，说明在此波长区间的吸收很弱(因为靶材不透明，所以可近似认为反射率+吸收率＝1)；而In 2O 3掺入3％Tb(Tb 4+/Tb 3+＝1/0)的靶材在400-1000nm区间的反射很弱，说明在此波长区间的吸收很强；In 2O 3掺入3％Tb(Tb 4+/Tb 3+＝1/1)的靶材在400-1000nm区间的反射相比掺入3％Tb(Tb 4+/Tb 3+＝1/0)有所提高，说明靶材中Tb 4+对可见光区的吸收起主要作用。
实施例6。
一种晶体管，如图1所示，其制备过程如下：首先在玻璃基板上通过溅射的方法制造一层厚度为300nm的Al-Nd合金薄膜，通过光刻的方法进行图形化得到栅极11。接着用阳极氧化的方法制备绝缘层12，形成一层氧化铝栅极氧化层。沟道层13采用溅射的方法制备，所用的靶材与实施例5中的靶材相同，沟道层13的厚度为10nm。在沟道层13上面采用溅射的方法制造一层厚度为500nm的氧化铟锡金属氧化物(ITO，Indium Tin Oxides)薄膜，遮挡掩模的方法图形化，同时得到源极14a和漏极14b。
图6示出了利用In 2O 3掺入Tb 4+/Tb 3+的比值为1/1的靶材溅射所制备薄膜的X射线光电子能谱(XPS)的Tb 4p峰谱，可以算出，Tb 4+与Tb 3+的含量比为53.3％/46.7％(如表1所示)，与靶材的成分有所偏离，但基本一致。需要说明的是，由于In 2O 3薄膜在可见光是透明的，所以对于厚度较薄(1000nm以内)、Tb掺杂量较少(10％以内)的薄膜在可见光区的吸收要比相应的靶材的吸收弱很多，甚至弱于微腔效应造成的吸收波动量，这是正常的现象。
基于不同Tb 4+含量的薄膜晶体管(TFT)在NBIS(LED白光照射加-20V的栅偏压)下的转移特性曲线如图7、图8、图9所示。其中，图7是纯In 2O 3不掺入Tb情况下，薄膜晶体管的NBIS下的转移特性曲线；图8是In 2O 3掺入3％Tb，且Tb 4+/Tb 3+＝1/0(即只掺了Tb 4+)情况下的薄膜晶体管的NBIS下的转移特性曲线；图9是In 2O 3掺入3％Tb，且Tb 4+/Tb 3+＝1/1情况下的薄膜晶体管的NBIS下的转移特性曲线。作为对比，也采用传统的靶材制备方法制备了只有Tb 3+(即不含Tb 4+)掺杂的In 2O 3靶材(即3％Tb(Tb 4+/Tb 3+＝0/1))，基于不同Tb 4+含量的薄膜晶体管(TFT)在NBIS(LED白光照射加-20V的栅偏压)下的转移性能列于表一。
可以看出，纯In 2O 3TFT的迁移率虽然可达39.5cm 2/Vs，但其NBIS下的阈值电压的漂移量(ΔV th)却达-14.0V，器件的NBIS稳定性很差。当掺入3％Tb(Tb 4+/Tb 3+＝1/0)时，迁移率为38.1cm 2/Vs，其NBIS下阈值电压几乎不漂(ΔV th仅为-0.01V)。当掺入3％Tb(Tb 4+/Tb 3+＝1/1)时，迁移率下降至33.2cm 2/Vs，其NBIS下ΔV th为-0.06V。当掺入3％Tb(Tb 4+/Tb 3+＝0/1)时，迁移率下降至19.5cm 2/Vs，其NBIS下ΔV th为-13.1V。这说明，单纯In 2O 3TFT的NBIS下阈值电压的负向漂移严重。单纯添加Tb 3+离子，对器件NBIS下阈值电压的负向漂移几乎没有改善效果，而且迁移率也会大幅下降，不能满足要求，这是由于Tb 3+不能吸收可见光，无法将蓝光下转换；而且Tb 3+含有8个f电子，超过半满，容易受到晶体场作用劈裂形成大量缺陷能级，造成迁移率下降。因此，仅有Tb 3+不能解决NBIS负向漂移的问题，且迁移率低。含有Tb 4+的，器件的NBIS下阈值电压漂移的现象改善明显，特别是只含有Tb 4+(不含Tb 3+)的，器件的NBIS下阈值电压几乎不存在漂移。降低Tb 4+/Tb 3+的比例会降低迁移率和NBIS稳定性。
表一
Tb含量 迁移率(cm 2/Vs) NBIS下的ΔV th(V)
0％(纯In 2O 3) 39.5 -14.0
3％(Tb 4+/Tb 3+＝1/0) 38.1 -0.01
3％(Tb 4+/Tb 3+＝1/1) 33.2 -0.06
3％(Tb 4+/Tb 3+＝0/1) 19.5 -13.1
可见，采用Tb 4+掺杂的In 2O 3作为沟道层的晶体管，能够有效提高NBIS稳定性，同时保持较高的迁移率。
实施例7。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价镧系离子。其中，基质氧化物半导体材料为InSnZnO，正四价镧系离子为Tb 4+。该靶材通过如下的方法制备：首先将氧化铽粉末进一步氧化，经研磨后与基质氧化物半导体材料粉末均匀混合，再在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压成型，再在强氧化性氛围内烧结。靶材中不同价态的Tb总含量为5％，通过调节上述氧化条件和烧结氛围，将所有的Tb均控制为Tb 4+。
一种晶体管，如图10所示，设置有：基板10、位于基板10之上的栅极11、位于基板10和栅极11之上的栅绝缘层12、覆盖在栅绝缘层12上表面且在栅极11上方的沟道层13、覆盖在沟道层上方的刻蚀阻挡层17，相互间隔并与沟道层13和刻蚀阻挡层14的两端电性相连的源极14和漏极15。
基板10为玻璃(含有水氧阻隔层)，在基板10上通过溅射制备Mo/Al/Mo电极，总厚度为400nm，通过涂覆光刻胶、曝光、显影等工艺形成栅极11。
用等离子增强型化学气相沉积(PECVD)在形成有栅极11的基板10上制备SiN x/SiO 2叠层薄膜作为栅绝缘层12，总厚度为320nm。
沟道层13的成分为TbInSnZnO，采用溅射的方法制备，厚度为40nm。沟道层13的具体制备过程如下：将本实施例前述的靶材安装在靶位上，通过溅射成膜，通过光刻图形化。
采用PECVD的方法在形成有沟道层13的基板10上制备一层厚度为100nm的SiO 2薄膜，通过干法刻蚀图形化，形成刻蚀阻挡层17。
采用溅射的方法在形成有刻蚀阻挡层17的基板10上制备Mo/Al/Mo电极，总厚度为600nm，采用涂覆光刻胶、曝光、显影等步骤形成源极14和漏极15。
器件制备好后，经过350℃在大气下退火1h。
对按照上述工艺制备的不同原料比例的薄膜晶体管及对比例，采用LED白光照射加-25V的栅偏压测试对应的ΔV th(V)及迁移率，结果如表二所示。
表二TbInSnZnO中不同In/Sn/Zn比例的TFT器件性能(Tb 4+含量为5％)
In/Sn/Zn比例 迁移率(cm 2/Vs) NBIS下的ΔV th(V)
4/4/2 44.3 0.9
2/4/4 40.2 1.6
67/10/20 46.7 0.8
77/10/10 52.1 0.8
72/5/20 43.8 0.7
82/5/10 50.3 0.6
72/15/10 41.5 0.9
可见，采用含有Tb 4+掺杂的氧化物半导体材料作为沟道层的晶体管，能够有效提高NBIS稳定性，同时保持较高的迁移率。
本发明的氧化物半导体薄膜，可用于作为晶体管的沟道层材料。该氧化物半导体薄膜及其薄膜晶体管主要用于有机发光显示、液晶显示或电子纸的有源驱动，也可以用于集成电路。
实施例8。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价铽离子Tb 4+。其中，基质氧化物半导体材料为In、Sn、Zn三种氧化物的混合物，且In：Sn：Zn＝77/10/10。该靶材通过如下的方法制备：首先将氧化铽粉末进一步氧化，经研磨后与基质氧化物半导体材料粉末均匀混合，再在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压成型，再在强氧化性氛围内烧结。靶材中不同价态的Tb总含量为5％，通过调节上述氧化条件和烧结氛围，控制Tb 4+/Tb 3+的比例。采用与 实施例7相同的工艺制备薄膜晶体管。对所制备的薄膜晶体管采用LED白光照射加-25V的栅偏压测试对应的ΔV th(V)及迁移率，结果如表三所示。
表三不同Tb 4+/Tb 3+比例的TFT器件性能
Tb 4+/Tb 3+ 迁移率(cm2/Vs) NBIS下的ΔVth(V)
Tb 4+/Tb 3+＝1/0 52.1 -0.8
Tb 4+/Tb 3+＝10/1 48.5 -0.85
Tb 4+/Tb 3+＝5/1 46.2 -0.9
Tb 4+/Tb 3+＝2/1 40.3 -1.05
Tb 4+/Tb 3+＝1/2 36.7 -2.32
Tb 4+/Tb 3+＝1/10 24.9 -3.47
Tb 4+/Tb 3+＝1/20 18.9 -7.50
可见，Tb 4+，的引入对器件的NBIS稳定性发挥主要作用，且能够保持器件具有良好的迁移率。Tb 4+/Tb 3+的比例越高，器件的迁移率和NBIS稳定性越好。
实施例9。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价镧系离子。其中，基质氧化物半导体材料为氧化铟(In 2O 3)，正四价镧系离子为正四价铈(Ce 4+)。该靶材通过如下的方法制备：首先将Ce的氧化物研磨后与基质氧化物半导体材料粉末均匀混合，再在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压成型，再在强氧化性氛围内烧结。Ce含量为3％。通过调节氧化条件和烧结氛围，将靶材的Ce 4+/Ce 3+的比值控制为1/0(即不含Ce 3+)。为了对比，在相同靶材制备条件下制备了镝(Dy)和镱(Yb)掺杂的氧化铟，由于Dy和Yb在任何条件下都不可能形成正四价，测得的价态均为正三价，所以Dy 4+/Dy 3+和Dy 4+/Dy 3+均为0/1。
采用与实施例6相同的工艺制备薄膜晶体管，对所制备的薄膜晶体管采用LED白光照射加-20V的栅偏压测试对应的ΔV th(V)及迁移率，结果如表四所示。可以看出这三种掺杂的TFT的NBIS稳定性均较差。
表四
Ce、Dy、Yb含量 迁移率(cm 2/Vs) NBIS下的ΔV th(V)
0％(纯In 2O 3) 39.5 -14.0
3％(Ce 4+/Ce 3+＝1/0) 30.5 -12.8
3％(Dy 4+/Dy 3+＝0/1) 17.2 -13.4
3％(Yb 4+/Yb 3+＝0/1) 16.9 -13.3
实施例10。
一种氧化物半导体靶材，该靶材包括基质氧化物半导体材料和正四价镧系离子。其中，基质氧化物半导体材料为氧化铟(In 2O 3)，正四价镧系离子为Pr 4+。该靶材通过如下的方法制备：首先将氧化镨粉末共混氧化，经研磨后与基质氧化物半导体材料粉末均匀混合，再在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压成型，再在强氧化性氛围内烧结。制备了两种不同Pr掺杂量的靶材，Pr含量分别为3％和7％。通过调节上述氧化条件和烧结氛围，将两种不同Pr含量的靶材的Pr 4+/Pr 3+的比值均控制为1/1。
附图11为不同Pr掺杂量的靶材的反射光谱，可以看出，未掺Pr的靶材(纯In 2O 3)在波长约为400-1000nm区间强反射，说明在此波长区间的吸收很弱(因为靶材不透明，所以可近似认为反射率+吸收率＝1)；而In 2O 3掺入3％Pr(Pr 4+/Pr 3+＝1/1)的靶材在400-1000nm区间的反射相对弱，说明在此波长区间的吸收很强；In 2O 3掺入7％Pr(Pr 4+/Pr 3+＝1/1)的靶材在400-1000nm区间的反射有所提高，说明高Pr浓度会有浓度猝灭作用。这主要是因为Pr 4+或Pr 3+中的f电子造成的。而掺入Tb不会有这个问题。
可见，本发明的靶材制备方法能够在靶材上形成正四价的镨。
实施例11。
一种晶体管，如图1所示，其制备过程同实施例6，不同之处在于该薄膜晶体管的沟道层13为所用的靶材为实施例10中的Pr掺杂的In 2O 3靶材。
图12、图13示出了上述基于不同Pr 4+含量的薄膜晶体管(TFT)在NBIS(LED白光照射加-20V的栅偏压)下的转移特性曲线，其性能列于表五。可以看出，掺入3％的Pr时，迁移率为18.9cm 2/Vs，NBIS下阈值电压漂移量(ΔV th)为-4.1V，其NBIS稳定性比纯In 2O 3TFT有所提升；然而，与掺同样浓度的Tb 4+In 2O 3TFT相比，掺Pr 4+In 2O 3TFT的迁移率和NBIS稳定性均较差，而且在亚阈值区有明显的驼峰效应，即电流提前开启、关态电流(I off)增大现象，这主要与氧空位或Pr 4+含有一个f电子，容易受晶体场的影响而形成大量的缺陷能级，影响电子输运、降低迁移率。
当掺入7％的Pr时，迁移率迅速降低至9.2cm 2/Vs，NBIS下阈值电压漂移量(ΔV th)表现为前100s正向漂移+0.5V、后3500s负向漂移-1.2V；而当栅极电压(V GS)大于5V时，NBIS下阈值电压漂移规律与V GS小于5V时相反。这说明高浓度Pr掺杂时两种机制同时起着作用：一是浓度猝灭造成的光吸收减少，下转换效果减弱；二是由于Pr 4+存在f电子，在晶体场影响下劈裂造成大量的电子陷阱，其既作为电离氧空位电子的复合中介、减少光生电子寿命，也同时作为普通载流子的陷阱，浓度较高时捕获载流子，造成刚开始时阈值电压正漂。相比之下，掺Tb 4+的In 2O 3TFT无此现象。此外，Pr吸收蓝光后会下转换绿光，如图14所示，由于在负栅压下界面能带上翘，使得氧空位能级上移，所以绿光也对NBIS有部分影响。
表五
Pr含量 迁移率(cm 2/Vs) NBIS下的ΔV th(V)
0％(纯In 2O 3) 39.5 -14.0
3％(Pr 4+/Pr 3+＝1/1) 18.9 -4.1
7％(Pr 4+/Pr 3+＝1/1) 9.2 前100s漂+0.5V；后3500s漂-1.2V
可见，采用Pr 4+掺杂的In 2O 3作为沟道层的晶体管，对器件的NBIS稳定性改善有限，并且器件的迁移率大幅下降。因此，Pr掺杂不能满足本发明的目的。
最后应当说明的是，以上实施例仅用以说明本发明的技术方案而非对本发明保护范围的限制，尽管参照较佳实施例对本发明作了详细说明，本领域的普通技术人员应当理解，可以对本发明的技术方案进行修改或者等同替换，而不脱离本发明技术方案的实质和范围。

Claims (10)

  1. 一种氧化物半导体靶材，其特征在于：包括基质氧化物半导体材料和正四价镧系离子，其中基质氧化物半导体材料含有In、Zn、Sn、Ga和Cd五种元素中的至少一种。
  2. 根据权利要求1所述的氧化物半导体靶材，其特征在于：正四价镧系离子为正四价铽离子Tb 4+。
  3. 根据权利要求2所述的氧化物半导体靶材，其特征在于：Tb 4+离子数量与Tb 3+离子数量的比值大于0.1。
  4. 根据权利要求3所述的氧化物半导体靶材，其特征在于：Tb 4+离子数量与Tb 3+离子数量的比值大于1。
  5. 根据权利要求4所述的氧化物半导体靶材，其特征在于：只含有Tb 4+，不含Tb 3+。
  6. 根据权利要求1至5任意一项所述的氧化物半导体靶材，其特征在于：通过如下方法制备，首先将正四价镧系离子对应元素的氧化物粉末与基质氧化物半导体材料粉末均匀混合，然后在强氧化性氛围内烧结，经二次研磨混合后通过冷等静压或热压成型，再在强氧化性氛围内烧结得到氧化物半导体靶材。
  7. 一种氧化物半导体薄膜，其特征在于，通过物理气相沉积的方法制备，厚度为3-200nm，物理气相沉积所用的靶材如权利要求1至6中任意一项所述的氧化物半导体靶材。
  8. 一种提高薄膜晶体管稳定性和迁移率的方法，其特征在于，
    制备一氧化物半导体靶材，所述氧化物半导体靶材包括基质氧化物半导体材料和作为功能离子的正四价镧系离子，功能离子能够进行轨道杂化，轨道杂化跃迁所需的能量不高于蓝光能量，且功能离子在轨道杂化跃迁后转化成无辐射的形式；
    通过所述氧化物半导体靶材沉积用于作为薄膜晶体管沟道层的氧化物半导体薄膜；
    当薄膜晶体管存在光照或者同时存在光照和负栅偏压时，功能离子吸收蓝光甚至红绿光实现轨道杂化跃迁，并转化成无辐射的形式；通过功能离子轨道杂化跃迁吸收光照阻止氧空位电离，避免出现严重的晶格弛豫、造成阈值电压漂移。
  9. 根据权利要求8所述的提高薄膜晶体管稳定性和迁移率的方法，其特征在于，正四价镧系离子为Tb 4+，Tb 4+离子数量与Tb 3+离子数量的比值大于0.1。
  10. 一种薄膜晶体管，其特征在于，沟道层含有一层或者多层氧化物半导体层，至少一层氧化物半导体层为通过权利要求7-9任意一项所述的方法制备而成的氧化物半导体薄膜；
    所述薄膜晶体管作为显示的驱动背板或者用于内存、闪存、动态随机存取存储器。
PCT/CN2022/074682 2022-01-27 2022-01-28 氧化物半导体靶材、薄膜、薄膜晶体管及提高其稳定性的方法 WO2023141967A1 (zh)

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