WO2023084557A1 - Dispositif d'entrée de signal analogique - Google Patents

Dispositif d'entrée de signal analogique Download PDF

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Publication number
WO2023084557A1
WO2023084557A1 PCT/JP2021/041061 JP2021041061W WO2023084557A1 WO 2023084557 A1 WO2023084557 A1 WO 2023084557A1 JP 2021041061 W JP2021041061 W JP 2021041061W WO 2023084557 A1 WO2023084557 A1 WO 2023084557A1
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WO
WIPO (PCT)
Prior art keywords
analog signal
pulse transformer
switch element
reset
signal
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PCT/JP2021/041061
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English (en)
Japanese (ja)
Inventor
潤 西嶋
慶洋 明星
崇 桑原
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三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2021/041061 priority Critical patent/WO2023084557A1/fr
Priority to JP2022535071A priority patent/JP7237246B1/ja
Priority to KR1020247013827A priority patent/KR20240060850A/ko
Publication of WO2023084557A1 publication Critical patent/WO2023084557A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/689—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit
    • H03K17/691—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit using transformer coupling
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements

Definitions

  • the present disclosure relates to an analog signal input device.
  • Analog signal input devices are often used in industrial control and monitoring equipment. This analog signal input device receives, with high accuracy, an analog signal output from a device such as a temperature sensor into an AD converter. At this time, insulation is required in order to AD-convert the analog signal. Assuming that analog signal input devices are generally used in harsh installation environments, insulation is provided between the input section and the internal circuits to avoid failures caused by ground loops via the earth (earth), etc. measures have been taken.
  • Patent Document 1 discloses an analog signal input device that employs an insulation method.
  • the analog signal input device disclosed in Patent Document 1 has a waveform shaping circuit on the secondary side of the pulse transformer.
  • This waveform shaping circuit demagnetizes the magnetic core of the pulse transformer.
  • the waveform shaping circuit is always electrically connected when outputting the analog signal to the AD converter, the waveform of the analog signal output from the waveform shaping circuit is distorted. becomes more likely to occur.
  • the accuracy of sensing the analog signal by the AD converter may deteriorate.
  • the present disclosure has been made to solve the above problems, and aims to provide an analog signal input device capable of suppressing distortion of analog signals.
  • An analog signal input device includes a pulse transformer that isolates an analog signal input from the outside, a first switch element connected to the primary side of the pulse transformer, and the pulse transformer on the secondary side of the pulse transformer. and a reset circuit having a resistance element and a second switch element connected in series with each other, and a drive signal for on-off controlling the first switch element to the first switch element, a control circuit for outputting a reset signal for on/off controlling the second switch element to the second switch element, wherein the control circuit turns off the second switch element when turning off the first switch element; ON.
  • the analog signal input device can sense analog signals with high accuracy.
  • FIG. 1 is a circuit configuration diagram showing the configuration of an analog signal input device according to Embodiment 1;
  • FIG. 4 is a timing chart showing operation waveforms of each part in the analog signal input device according to the first embodiment;
  • FIG. 3A is a circuit configuration diagram showing the driving state of the first pulse transformer.
  • FIG. 3B is a timing chart showing operation waveforms of each part in the driving state of the first pulse transformer.
  • FIG. 4A is a circuit configuration diagram showing a reset state of the first pulse transformer.
  • FIG. 4B is a timing chart showing operation waveforms of respective parts in the reset state of the first pulse transformer.
  • 2 is a circuit configuration diagram showing the configuration of an analog signal input device according to a second embodiment;
  • FIG. 1 is a circuit configuration diagram showing a conventional analog signal input device;
  • FIG. 1 is a circuit configuration diagram showing a conventional reset circuit;
  • Embodiment 1 An analog signal input device 1 according to Embodiment 1 will be described with reference to FIGS. 1 to 4, 6 and 7.
  • FIG. 1 An analog signal input device 1 according to Embodiment 1 will be described with reference to FIGS. 1 to 4, 6 and 7.
  • the analog signal output from the sensor element is finally transmitted to the AD converter via the switch element and pulse transformer.
  • a sensor element is assumed to be, for example, a temperature sensor.
  • the analog signal output from the sensor element is a very low frequency signal (substantially a DC signal)
  • isolated transmission via the transformer cannot be performed if the analog signal is a low frequency signal, or It is necessary to make the pulse transformer extremely large. Therefore, in the technique disclosed in Patent Document 1, by shaping (modulating) an analog signal into a transient pulse waveform, isolated transmission of the analog signal is performed using a small pulse transformer.
  • FIG. 1 is a circuit configuration diagram showing the configuration of an analog signal input device 1 according to Embodiment 1.
  • FIG. This analog signal input device 1 has input terminals 1a and 1b.
  • One or more sensor elements 2 are connected to the input terminals 1a and 1b via cables or the like.
  • the analog signal input device 1 includes a first pulse transformer 3, a second pulse transformer 4, a first switch element 5, a reset circuit 6, an amplifier element 7, a multiplexer 8, buffer elements 9a and 9b, an AD converter 10, and a control circuit.
  • a circuit 11 is provided.
  • This analog signal input device 1 employs a transformer insulation method.
  • Such an analog signal input device 1 is a device that accurately captures the analog signal (sensor element signal) W1 output from the sensor element 2 into the AD converter 10 via insulation. Also, the analog signal input device 1 has the number of circuits corresponding to the number of input channels (the number of analog channels).
  • FIG. 1 shows an example of eight input channels (Ch1-Ch8).
  • the first pulse transformer 3 insulates the analog signal W1 input from the sensor element 2.
  • the first pulse transformer 3 constitutes a pulse transformer.
  • the second pulse transformer 4 controls the first switch element 5, which will be described later.
  • the first switch element 5 is connected to the primary side (insulation side) of the first pulse transformer 3 .
  • the first switch element 5 applies the analog signal W1 to the first pulse transformer 3.
  • a drive signal W2 can be input from the second pulse transformer 4 to the first switch element 5 .
  • the drive signal W2 is a signal for controlling the on/off (opening/closing) of the first switch element 5 .
  • the reset circuit 6 is connected in parallel with the first pulse transformer 3 on the secondary side (internal circuit side) of the first pulse transformer 3 .
  • This reset circuit 6 demagnetizes the magnetic core that constitutes the first pulse transformer 3 .
  • the reset circuit 6 resets the excitation current W6 (see FIG. 3) flowing through the first pulse transformer 3.
  • the reset circuit 6 also has a resistance element 61 and a second switch element 62 that are connected in series with each other. Specifically, the resistance element 61 and the second switch element 62 are connected in series with the signal line from the first pulse transformer 3 .
  • a reset signal W4 can be input to the second switch element 62 .
  • the reset signal W4 is a signal for controlling on/off (open/close) of the second switch element 62 .
  • the amplifier element 7 is connected after the reset circuit 6 .
  • the amplifier element 7 amplifies the analog signal W1 output from the first pulse transformer 3.
  • the multiplexer 8 selects any one of a plurality of input channels. This multiplexer 8 is controlled by a control circuit 11 which will be described later.
  • the AD converter 10 is connected after the multiplexer 8 .
  • This AD converter 10 converts the analog signal W1 output from the multiplexer 8 into a digital signal. Also, the AD converter 10 outputs the converted digital signal to the control circuit 11 . Note that in FIG. 1, the analog signal W1 output from the multiplexer 8 is shown as an AD conversion input signal W3.
  • the control circuit 11 has a processing section 111 , a timing control section 112 and a Ch selection section 113 .
  • the processing unit 111 processes the digital signal output from the AD converter 10 .
  • the processing unit 111 also outputs the processing result to the timing control unit 112 and the Ch selection unit 113 .
  • the timing control section 112 outputs the sample signal W8, the drive signal W2, and the reset signal W4 based on the digital signal processed by the processing section 111.
  • the sample signal W8 is a signal for the AD converter 10 to sample the AD converted input signal W3. This sample signal W8 is output to the AD converter 10 by the timing control section 112 .
  • the drive signal W2 is output to the first pulse transformer 3 by the timing control section 112 via the buffer element 9a, the multiplexer 8, and the second pulse transformer 4.
  • the reset signal W4 is output to the reset circuit 6 by the timing control section 112 via the buffer element 9b and the multiplexer 8.
  • the analog signal input device 1 has a second pulse transformer 4 .
  • the primary sides of the first pulse transformer 3 and the second pulse transformer 4 in the analog signal input device 1 are composed only of a first switch element 5 using a transistor.
  • FIG. 6 is a circuit configuration diagram showing a conventional analog signal input device 1B.
  • the conventional analog signal input device 1B shown in FIG. 6 employs a photocoupler insulation system.
  • a conventional analog signal input device 1B includes an amplifier element 7, a multiplexer 8, buffer elements 9a and 9b, an AD converter 10, a control circuit 11, a photocoupler 12, and an isolated power supply circuit 13.
  • An AD converter 10 and an isolated power supply circuit 13 are arranged on the primary side of the analog signal input device 1B.
  • the analog signal input device 1 is advantageous in terms of the number of parts and manufacturing cost compared to the analog signal input device 1B.
  • control circuit 11 controls the reset circuit 6 so that the reset circuit 6 functions only immediately after the first pulse transformer 3 is driven and at the timing when the magnetic core of the first pulse transformer 3 needs to be demagnetized. 2 switch element 62 is controlled.
  • FIG. 2 is a timing chart showing operation waveforms in each part of the analog signal input device 1 according to the first embodiment.
  • the vertical axis in FIG. 2 represents the analog signal W1 input to the input terminals 1a and 1b, the drive signal W2 output from the timing control unit 112, the AD conversion input signal W3 input to the AD converter 10, and the timing control.
  • a reset signal W4 output from the unit 112 is shown.
  • the horizontal axis of FIG. 2 indicates the passage of time.
  • the analog signal W1 is an output signal from the sensor element 2, and gradually changes with the passage of time.
  • the drive signal W2 turns on or off the first switch element 5 via the buffer element 9a, the multiplexer 8, and the second pulse transformer 4. That is, the period during which the drive signal W2 is at a high potential is the period during which the first pulse transformer 3 is driven. During that period, a voltage corresponding to the amplitude of the analog signal W1 is transmitted to the secondary side of the first pulse transformer 3.
  • FIG. The period during which the drive signal W2 is at a low potential is the period during which the first pulse transformer 3 is reset.
  • the waveform of the AD conversion input signal W3 is observed on the secondary side of the first pulse transformer 3.
  • the AD conversion input signal W3 has a value corresponding to the amplitude of the analog signal W1 while the drive signal W2 is at high potential.
  • the amplitude of the AD conversion input signal W3 is sampled by the AD converter 10 .
  • backswing occurs in the AD conversion input signal W3 at the time when the reset signal W4 becomes high potential. This backswing is caused by a reset current W7 (see FIG. 4) generated as a residual excitation current W6 (see FIG. 3) of the first pulse transformer 3.
  • FIG. A reset circuit 6 is provided to suppress excessive amplitude and long-term vibration of the backswing.
  • the reset signal W4 turns on or off the second switch element 62 of the reset circuit 6 via the buffer element 9b and the multiplexer 8. That is, the period during which the reset signal W4 is at a high potential is the period during which the magnetic core of the first pulse transformer 3 is demagnetized (reset).
  • the backswing quickly attenuates and contracts due to power consumption by the resistance element 61 of the reset circuit 6 during the period in which the magnetic core of the first pulse transformer 3 is demagnetized.
  • FIG. 3A is a circuit configuration diagram showing the driving state of the first pulse transformer 3.
  • FIG. 3B is a timing chart showing operation waveforms of respective parts in the driving state (driving period) of the first pulse transformer 3. As shown in FIG. The vertical axis of FIG. 3B indicates the analog signal W1, the drive signal W2, the AD conversion input signal W3, the sample signal W8, and the excitation current W6. The horizontal axis of FIG. 3B indicates the passage of time.
  • the analog signal W1 is input to the first pulse transformer 3 with a constant value.
  • the first switch element 5 is in the ON state to conduct the drive signal W2.
  • the second switch element 62 is in the OFF state to cut off the reset signal W4.
  • an AD conversion input signal W3 corresponding to the analog signal W1 is generated on the secondary side of the first pulse transformer 3.
  • the potential of this AD conversion input signal W3 is constant at Vin.
  • the sample period of the sample signal W8 is within the conduction period of the AD conversion input signal W3.
  • FIG. 4A is a circuit configuration diagram showing the reset state of the first pulse transformer 3.
  • FIG. 4B is a timing chart showing operation waveforms of respective parts in the reset state (reset period) of the first pulse transformer 3.
  • FIG. The vertical axis of FIG. 4B indicates the analog signal W1, the reset signal W4, the AD conversion input signal W3, and the reset current W7.
  • the horizontal axis of FIG. 4B indicates the passage of time.
  • the analog signal W1 is input to the first pulse transformer 3 with a constant value. Further, during the reset period of the first pulse transformer 3, the first switch element 5 is in the OFF state to cut off the drive signal W2. On the other hand, the second switch element 62 is in the ON state to conduct the reset signal W4.
  • the reset circuit 6 has a resistance element 61 and a second switch element 62, and the reset current W7 flows through the resistance element 61 only during the reset period. Therefore, the first pulse transformer 3 is not affected by power consumption by the resistance element 61 during the driving period of the first pulse transformer 3 .
  • the AD converter 10 samples the AD converted input signal W3, the AD converter 10 can suppress distortion in the waveform of the AD converted input signal W3. can be sensed with high accuracy.
  • the reset circuit 6 is arranged on the secondary side of the first pulse transformer 3, an insulating element is provided for the reset circuit 6 that controls the second switch element 62. No need.
  • FIG. 7 is a circuit configuration diagram showing a conventional reset circuit 6B.
  • a resistance element 61 and a rectifying element 64 such as a diode are connected in series to the signal line from the first switch element 5.
  • the reset circuit 6 does not have the rectifying element 64 that the conventional reset circuit 6B has. can also exhibit the reset function.
  • the analog signal input device 1 includes the first pulse transformer 3 that insulates the analog signal W1 input from the outside, and the first switch element connected to the primary side of the first pulse transformer 3. 5, a reset circuit 6 connected in parallel with the first pulse transformer 3 on the secondary side of the first pulse transformer 3 and having a resistance element 61 and a second switch element 62 connected in series with each other; A drive signal W2 for on/off controlling the first switching element 5 is output to the element 5, and a reset signal W4 for on/off controlling the second switching element 62 is output to the second switching element 62. and a control circuit 11 for outputting, the control circuit 11 turns on the second switch element 62 when turning off the first switch element 5 . Therefore, the analog signal input device 1 can suppress distortion of the analog signal W1 (AD conversion input signal W3). As a result, the analog signal input device 1 can sense the analog signal W1 with high precision.
  • FIG. 5 is a circuit configuration diagram showing the configuration of an analog signal input device 1B according to the second embodiment. It should be noted that configurations having functions similar to those of the configurations described in the above-described embodiments are denoted by the same reference numerals, and description thereof will be omitted.
  • An analog signal input device 1A according to the second embodiment includes a reset circuit 6A instead of the reset circuit 6 of the analog signal input device 1 according to the first embodiment.
  • the reset circuit 6A is arranged on the secondary side of the first pulse transformer 3. This reset circuit 6A demagnetizes the magnetic core that constitutes the first pulse transformer 3. As shown in FIG.
  • the reset circuit 6 also has a resistance element 61 , a second switch element 62 and an inverting buffer element 63 .
  • the resistance element 61 , the second switch element 62 and the inverting buffer element 63 are connected in series with the signal line from the first pulse transformer 3 .
  • the drive signal W2 output from the timing control section 112 of the control circuit 11 is input to the first switch element 5 via the buffer element 9a, the multiplexer 8, and the second pulse transformer 4.
  • the drive signal W2 is also input to the second switch element 62 via the buffer element 9a, the multiplexer 8, and the inverting buffer element 63.
  • the reset signal W4 for on/off controlling the second switch element 62 is generated by using the inverting buffer element 63 to invert the polarity of the drive signal W2. Therefore, the timing control section 112 does not need to include a circuit for generating the reset signal W4 and a circuit for adjusting the output timing of the reset signal W4. As a result, the circuit configuration of the control circuit 11 can be simplified in the analog signal input device 1A.
  • the reset circuit 6A has the inversion buffer element 63 that inverts the polarity of the drive signal W2 to generate the reset signal W4. Therefore, in the analog signal input device 1A, the circuit configuration of the control circuit 11 can be simplified.
  • the present disclosure can freely combine each embodiment, modify any component of each embodiment, or omit any component in each embodiment. .
  • the analog signal input device suppresses distortion of the analog signal by turning on the second switch element to which the reset signal is input when turning off the first switch element to which the drive signal is input. and is suitable for use in analog signal input devices and the like.
  • 1, 1A, 1B analog signal input device 1a, 1b input terminal, 2 sensor element, 3 first pulse transformer, 4 second pulse transformer, 5 first switch element, 6, 6A, 6B reset circuit, 61 resistance element, 62 second switch element, 63 inverting buffer element, 64 rectifying element, 7 amplifier element, 8 multiplexer, 9a, 9b buffer element, 10 AD converter, 11 control circuit, 111 processing unit, 112 timing control unit, 113 Ch selection unit , 12 Photocoupler, 13 Isolated power supply circuit, W1 Analog signal, W2 Drive signal, W3 AD conversion input signal, W4 Reset signal, W6 Excitation current, W7 Reset current, W8 Sample signal.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

La présente divulgation concerne un dispositif d'entrée de signal analogique (1) qui comprend : un premier transformateur d'impulsions (3) qui isole un signal analogique (W1) entré depuis l'extérieur ; un premier élément de commutation (5) qui est connecté à un côté primaire du premier transformateur d'impulsions (3) ; un circuit de réinitialisation (6) qui est connecté en parallèle au premier transformateur d'impulsions (3) sur un côté secondaire du premier transformateur d'impulsions (3), et comporte un élément de résistance (61) et un deuxième élément de commutation (62) connectés en série l'un à l'autre ; et un circuit de commande (11) qui délivre en sortie, au premier élément de commutation (5), un signal de commande (W2) pour commander la mise en marche/arrêt du premier élément de commutation (5), et délivre, vers le deuxième élément de commutation (62), un signal de réinitialisation (W4) pour commander la mise en marche/arrêt du deuxième élément de commutation (62), le circuit de commande (11) allumant le deuxième élément de commutation (62) lors de la mise hors tension du premier élément de commutation (5).
PCT/JP2021/041061 2021-11-09 2021-11-09 Dispositif d'entrée de signal analogique WO2023084557A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2021/041061 WO2023084557A1 (fr) 2021-11-09 2021-11-09 Dispositif d'entrée de signal analogique
JP2022535071A JP7237246B1 (ja) 2021-11-09 2021-11-09 アナログ信号入力装置
KR1020247013827A KR20240060850A (ko) 2021-11-09 2021-11-09 아날로그 신호 입력 장치

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Application Number Priority Date Filing Date Title
PCT/JP2021/041061 WO2023084557A1 (fr) 2021-11-09 2021-11-09 Dispositif d'entrée de signal analogique

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55124938U (fr) * 1979-02-22 1980-09-04
JP2002044946A (ja) * 2000-07-25 2002-02-08 Tdk Corp スイッチング電源装置
JP2011227615A (ja) * 2010-04-16 2011-11-10 Mitsubishi Electric Corp アナログ入力装置
JP2017163518A (ja) * 2016-03-11 2017-09-14 株式会社エム・システム技研 圧電トランスを用いたパルスアイソレータ

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5651307B2 (fr) * 1975-01-06 1981-12-04
JPS6050306B2 (ja) * 1978-10-20 1985-11-07 株式会社山武 アナログ入力装置の診断装置
JPS58147233A (ja) * 1982-02-26 1983-09-02 Yokogawa Hokushin Electric Corp アナログ入力装置
KR101027835B1 (ko) * 2006-05-26 2011-04-07 미쓰비시덴키 가부시키가이샤 아날로그 절연 멀티플렉서
JP5858797B2 (ja) 2012-01-16 2016-02-10 三菱電機株式会社 トランス絶縁アナログ入力装置
JP2014082710A (ja) * 2012-10-18 2014-05-08 Mitsubishi Electric Corp アナログ入力装置及びアナログ入力装置のオフセット電圧調整方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55124938U (fr) * 1979-02-22 1980-09-04
JP2002044946A (ja) * 2000-07-25 2002-02-08 Tdk Corp スイッチング電源装置
JP2011227615A (ja) * 2010-04-16 2011-11-10 Mitsubishi Electric Corp アナログ入力装置
JP2017163518A (ja) * 2016-03-11 2017-09-14 株式会社エム・システム技研 圧電トランスを用いたパルスアイソレータ

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JP7237246B1 (ja) 2023-03-10
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