WO2023082325A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2023082325A1
WO2023082325A1 PCT/CN2021/132454 CN2021132454W WO2023082325A1 WO 2023082325 A1 WO2023082325 A1 WO 2023082325A1 CN 2021132454 W CN2021132454 W CN 2021132454W WO 2023082325 A1 WO2023082325 A1 WO 2023082325A1
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WO
WIPO (PCT)
Prior art keywords
light
emitting chip
layer
array substrate
display panel
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PCT/CN2021/132454
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English (en)
French (fr)
Inventor
周楷
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惠州华星光电显示有限公司
Tcl华星光电技术有限公司
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Priority to US17/619,576 priority Critical patent/US20240047629A1/en
Publication of WO2023082325A1 publication Critical patent/WO2023082325A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0058Processes relating to semiconductor body packages relating to optical field-shaping elements

Definitions

  • the invention relates to the field of display devices, in particular to a display panel and a preparation method thereof.
  • Micro-LED Active-Matrix Organic Light-Emitting Diode, active matrix organic light-emitting diode
  • Micro-LED miniature light-emitting diode
  • Micro-LED technology is regarded as The ultimate display technology.
  • Micro-LED is essentially an integrated point light source. When it emits light, it has obvious point light source characteristics. The side light makes most of the light not be used effectively. A solution is needed to solve this problem.
  • the purpose of the present invention is to provide a display panel and its preparation method to solve the technical problems in the prior art that Micro-LED emits light from the side, so that most of the light is not effectively used, and the preparation cost of the side light-shielding layer is high and the process is complicated. .
  • the present invention provides a display panel, which includes an array substrate, a light-emitting chip, and a light-reflecting layer.
  • the light emitting chip is arranged on the array substrate.
  • the reflective layer is arranged on the array substrate and surrounds the sides of the light-emitting chip.
  • the display panel further includes a light-shielding layer, and the light-shielding layer is arranged between the light-emitting chip and the array substrate.
  • the light blocking layer covers a surface of the array substrate facing the light-emitting chip.
  • the light-emitting chip is arranged on the light-shielding layer and is electrically connected with the array substrate.
  • the material used for the reflective layer is an insulating material.
  • the thickness of the reflective layer is smaller than the thickness of the light emitting chip.
  • the level of the top surface of the reflective layer is lower than the level of the top surface of the light-emitting chip.
  • a thin film transistor is provided in the array substrate, and the light emitting chip is electrically connected to the thin film transistor.
  • the present invention also provides a method for preparing a display panel, which includes the following steps: forming a light-emitting chip on an array substrate; providing a mask plate, and the mask plate includes a shielding area and a hollow area.
  • a reflective layer surrounding the light-emitting chip is formed on the array substrate through the mask plate, the shielded area of the mask plate corresponds to the light-emitting chip, and the hollow area corresponds to the light-reflective layer.
  • the step of forming the light-emitting chip on the array substrate it also includes forming a light blocking layer on the array substrate.
  • the mask plate has a shielding area and a hollow area surrounding the shielding area, the shielding area corresponds to the light-emitting chip, and the hollow area corresponds to the reflective layer.
  • a display panel and its preparation method provided in the present invention prepare a reflective layer on the side of the light-emitting chip to prevent the side of the light-emitting chip from emitting light, so that the light emitted by the light-emitting chip is concentrated from the The top surface of the light-emitting chip emits light, thereby improving the front display brightness of the display panel.
  • the preparation process of the display panel is simple, and the materials are readily available, which reduces the production cost and does not affect the transfer yield of the light-emitting chip.
  • FIG. 1 is a schematic diagram of a layered structure of a display panel in an embodiment of the present invention
  • FIG. 2 is an enlarged schematic diagram of the layered structure of the display panel in the dotted box A in FIG. 1;
  • FIG. 3 is a schematic flow chart of a method for preparing a display panel in an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the layered structure of the display panel after step S10 in the embodiment of the present invention.
  • FIG. 5 is a schematic diagram of the layered structure of the display panel after step S20 in the embodiment of the present invention.
  • FIG. 6 is a schematic plan view of a mask plate in an embodiment of the present invention.
  • buffer layer 103 active layer 104;
  • Gate insulating layer 105 Gate layer 106;
  • Dielectric layer 107 Source and drain layer 108;
  • passivation layer 109 planarization layer 110;
  • pixel electrode layer 111 pixel electrode layer 111; light blocking layer 20;
  • the element When certain elements are described as being “on” another element, the element may be placed directly on the other element; there may also be an intermediate element on which the element is placed, And said intermediate part is placed on another part.
  • a part is described as being “mounted to” or “connected to” another part, both can be understood as being directly “mounted” or “connected” or a part is indirectly “mounted to” or “connected” through an intermediate part. to” another component.
  • An embodiment of the present invention provides a display device, which includes a display panel 1, the display panel 1 is used to provide a display screen for the display device, and the display device can be any electronic device with a display function product or part.
  • the display panel 1 includes an array substrate 10 , a light-shielding layer 20 , a light-emitting chip 30 and a light-reflecting layer 40 .
  • the array substrate 10 includes several thin film transistors and a base layer, and the array of thin film transistors is arranged on the base layer.
  • the thin film transistor includes a conductive structure and an insulating structure.
  • the conductive structure includes an active layer 104 , a gate layer 106 and a source-drain layer 108 .
  • the insulating structure includes a gate insulating layer 105 , a dielectric layer 107 , a passivation layer 109 , a planar layer 110 and the like.
  • the active layer 104 is disposed on the base layer, the gate insulating layer 105 is disposed on the active layer 104 , and the gate layer 106 is disposed on the gate insulating layer 105 .
  • the dielectric layer 107 is disposed on the base layer and covers the active layer 104 , the gate insulating layer 105 and the gate layer 106 .
  • the source-drain layer 108 is disposed on the dielectric layer 107 and electrically connected to the active layer 104 through the dielectric layer 107 .
  • the passivation layer 109 is disposed on the dielectric layer 107 and covers the source and drain layers 108 .
  • the flat layer 110 is disposed on the passivation layer 109 .
  • the base layer includes a substrate layer 101 , a light shielding layer 102 and a buffer layer 103 .
  • the light shielding layer 102 is disposed on the substrate layer 101 and corresponding to the active layer 104 .
  • the buffer layer 103 is disposed on the substrate layer 101 and covers the light shielding layer 102 , and the active layer 104 is disposed on a surface of the buffer layer 103 away from the light shielding layer 102 .
  • the light-shielding layer 102 is generally made of an opaque metal material, which is used to shield the active layer 104 from light and prevent light from affecting the work of the active layer 104 .
  • the buffer layer 103 and the insulating structure layer are generally made of inorganic materials such as silicon oxide and silicon nitride.
  • the buffer layer 103 and the insulating structure layer are used to insulate and protect the conductive wires in the thin film transistor, and prevent short circuits between wires.
  • the planar layer 110 is also used to planarize the surface of the thin film transistor.
  • the array substrate 10 also has a pixel electrode layer 111 disposed on the planar layer 110 and electrically connected to the source-drain layer 108 through the planar layer 110 and the passivation layer 109 .
  • the light blocking layer 20 is disposed on the flat layer 110 of the array substrate 10 and covers the exposed surface of the flat layer 110 .
  • the light-shielding layer 20 is made of light-shielding photoresist material.
  • the light blocking layer 20 can prevent the light emitted by the light emitting chip 30 from leaking from the side of the array substrate 10 .
  • a plurality of openings are provided in the light blocking layer 20 , and the openings correspond to the pixel electrode layer 111 , exposing a surface of the pixel electrode layer 111 away from the planar layer 110 .
  • the light emitting chip 30 is disposed in the opening and is electrically connected to the pixel electrode layer 111 in the opening.
  • the light emitting chip 30 is electrically connected to the thin film transistor in the array substrate 10 through the pixel electrode layer 111 , so as to obtain electric energy and realize self-luminescence.
  • the light-emitting chip 30 may be one of self-light-emitting chips 30 such as mini light-emitting diode (Mini-LED), micro-light-emitting diode (Micro-LED).
  • the light emitting chip 30 can emit any one of white light, red light, blue light and green light.
  • the light-emitting chips 30 in the display panel 1 all emit the same color, they can filter and transform the light color through color filters, thereby realizing color display.
  • the light-emitting chips 30 in the display panel 1 respectively emit light of different colors, it can directly realize color display.
  • the reflective layer 40 is disposed on a surface of the light-shielding layer 20 away from the array substrate 10 and surrounds a side surface of the light-emitting chip 30 .
  • the reflective layer 40 is made of reflective insulating material, such as polyester material or resin material doped with reflective material.
  • the reflective layer 40 is used to prevent light from emitting from the side of the light-emitting chip 30 , gather the light and emit it from the top surface of the light-emitting chip 30 , thereby reducing waste of light and improving the luminous efficiency of the light-emitting chip 30 .
  • the reflective layer 40 may, for example, directly contact and cover the surrounding sides of the light-emitting chip 30 , or keep a gap distance from the surrounding sides of the light-emitting chip 30 to achieve a certain shielding effect.
  • the reflective layer 40 can be further made of an insulating material with better heat dissipation properties.
  • a surface of the array substrate 10 facing the light-emitting chip 30 and the reflective layer 40 is the first surface S1, and a surface of the reflective layer 40 away from the array substrate 10 is the second surface S2.
  • the light-emitting chip A surface 30 away from the array substrate 10 is a third surface S3.
  • the thickness of the reflective layer 40 is less than the thickness of the light emitting chip 30 and greater than half of the thickness of the light emitting chip 30, and the first surface
  • the distance between S1 and the second surface S2 is smaller than the distance between the first surface S1 and the third surface S3, that is, the level of the top surface of the reflective layer 40 is lower than the top surface of the light emitting chip 30.
  • the horizontal plane where the surface is located so as to prevent the reflective layer 40 from covering the top surface of the light-emitting chip 30 from which light emerges.
  • the second surface S2 is located above 50% of the height of the light emitting chip 30 , preferably, it is located at 75% of the height of the light emitting chip 30 .
  • the embodiment of the present invention also provides a method for preparing the display panel 1 , which is used to prepare the above-mentioned display panel 1 .
  • the specific process of the preparation method is shown in Figure 3, which includes the following steps:
  • Step S10 Forming a light-shielding layer 20 on an array substrate 10 : preparing a number of thin film transistors and pixel electrode layers 111 on a base layer through a thin film transistor manufacturing process to form the array substrate 10 .
  • a light blocking layer 20 as shown in FIG. 4 is formed on the array substrate 10 by a photolithography process.
  • Step S20) Forming light-emitting chips 30 on the array substrate 10: arranging a number of light-emitting chips 30 together in sequence, and transferring the light-emitting chips 30 to the array substrate 10 by mass transfer, forming a The structure shown in 5.
  • Step S30) Preparing the mask plate 2 according to the position of the light-emitting chip 30: preparing a mask plate, forming a shielding area 201 and The hollow area 202 forms the mask 2 .
  • the shielding region 201 corresponds to the light-emitting chip 30
  • the remaining region of the mask 2 except the shielding region 201 is a hollow region 202 .
  • the shielding area 201 is a fully sealed structure, which cannot penetrate printing materials.
  • the hollow area 202 adopts a mesh structure with several through holes, which can penetrate printing materials.
  • the hollowed out area 202 can be made of wire mesh made of metal mesh, nylon mesh and other materials.
  • Step S40) Forming the reflective layer 40 on the light-shielding layer 20: aligning the mask 2 with the array substrate 10, aligning the shielding area 201 in the mask 2 with the light-emitting Chip 30 corresponds.
  • the insulating adhesive material doped with light-reflecting material is coated on the light-shielding layer 20 through the mask plate 2 . After the coating is completed, the coated insulating glue is cured by baking or ultraviolet light irradiation to form the reflective layer 40 and complete the preparation of the display panel 1 .
  • a light-reflecting layer is prepared on the side of the light-emitting chip, and the light scattering on the side of the light-emitting chip is blocked by the light-reflecting layer, so that the light emitted by the light-emitting chip is concentrated from the The top surface of the light-emitting chip emits light, thereby improving the luminous efficiency of the light-emitting chip, and further improving the front display brightness of the display panel.
  • the light-reflecting layer is prepared by screen printing process, the raw material is easy to obtain and the process is simple, the production cost is reduced, and the transfer of the light-emitting chip is also ensured. yield.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示面板(1)及其制备方法。显示面板(1)中包括阵列基板(10)、发光芯片(30)以及反光层(40);发光芯片(30)设于阵列基板(10)上;反光层(40)设于阵列基板(10)上,并围绕发光芯片(30)。反光层(40)将发光芯片(30)侧面发出的光线聚集,从发光芯片(30)的顶面射出,从而提高发光芯片(30)的发光效率及显示面板(1)的正面显示亮度。

Description

显示面板及其制备方法 技术领域
本发明涉及显示设备领域,特别是一种显示面板及其制备方法。
背景技术
随着显示技术的迭代发展,传统的LCD产业正面临着严峻的挑战,目前众多企业纷纷布局AMOLED(Active-Matrix Organic Light-Emitting Diode,主动矩阵有机发光二极体)、Micro-LED(微型发光二极管)等前沿显示技术的开发,其中Micro-LED技术凭借其高对比度,高亮度,长寿命,低成本等优势,被视为终极的显示技术。Micro-LED本质上是一种集成的点光源,其发光时有明显的点光源特征,侧面发光使得大部分光未被有效利用,需要一种方案来解决这种问题。
在阵列基板制程段制作侧面挡光层成本较高,并且会增加阵列基板制程段的工艺复杂度,影响阵列基板良率。此外灯珠转移作为整个Micro-LED显示技术中最重要的环节之一,阵列基板制程段的挡光膜层会在很大程度上影响转移良率。
技术问题
本发明的目的是提供一种显示面板及其制备方法,以解决现有技术中Micro-LED侧面发光使得大部分光未被有效利用以及侧面挡光层的制备成本较高、工艺复杂等技术问题。
技术解决方案
为实现上述目的,本发明提供一种显示面板,所述显示面板中包括阵列基板、发光芯片以及反光层。所述发光芯片设于所述阵列基板上。所述反光层设于所述阵列基板上,并围绕所述发光芯片的侧面。
进一步地,所述显示面板还包括挡光层,所述挡光层设于所述发光芯片与所述阵列基板之间。
进一步地,所述挡光层覆盖所述阵列基板朝向所述发光芯片的一表面。所述发光芯片设于所述挡光层上,并与所述阵列基板电连接。
进一步地,所述反光层所采用的材料为绝缘材料。
进一步地,所述反光层的厚度小于所述发光芯片的厚度。
进一步地,所述反光层顶面所在的水平面低于所述发光芯片顶面所在的水平面。
进一步地,所述阵列基板中设有薄膜晶体管,所述发光芯片与所述薄膜晶体管电连接。
本发明中还提供一种显示面板的制备方法,所述制备方法中包括以下步骤:在一阵列基板上形成发光芯片;提供一掩膜板,所述掩模板包括遮挡区域和镂空区域。通过所述掩膜板在所述阵列基板上形成围绕所述发光芯片的反光层,所述掩模板的遮挡区域对应所述发光芯片,所述镂空区域对应所述反光层。
进一步地,在所述阵列基板上形成所述发光芯片步骤前还包括在所述阵列基板上形成挡光层。
进一步地,所述掩膜板具有遮挡区域和围绕所述遮挡区域的镂空区域,所述遮挡区域与所述发光芯片相对应,所述镂空区域与所述反光层相对应。
有益效果
本发明的优点是:本发明中所提供的一种显示面板及其制备方法,在发光芯片的侧面制备反光层,防止发光芯片的侧面发光,使所述发光芯片所发出的光线集中从所述发光芯片的顶面射出,从而提高所述显示面板的正面显示亮度。并且,所述显示面板的制备工艺简单、材料易得,降低了生产成本,还不会影响发光芯片的转移良率。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明实施例中显示面板的层状结构示意图;
图2为图1虚线框A中显示面板的层状结构放大示意图;
图3为本发明实施例中显示面板制备方法的流程示意图;
图4为本发明实施例中步骤S10后显示面板的层状结构示意图;
图5为本发明实施例中步骤S20后显示面板的层状结构示意图;
图6为本发明实施例中掩膜板的平面示意图。
图中部件表示如下:
显示面板1;阵列基板10;
衬底层101;遮光层102;
缓冲层103;有源层104;
栅极绝缘层105;栅极层106;
介电层107;源漏极层108;
钝化层109;平坦层110;
像素电极层111;挡光层20;
发光芯片30;反光层40;
掩膜板2;遮挡区域201;
镂空区域202;第一表面S1;
第二表面S2;第三表面S3。
本发明的实施方式
以下参考说明书附图介绍本发明的优选实施例,证明本发明可以实施,所述发明实施例可以向本领域中的技术人员完整介绍本发明,使其技术内容更加清楚和便于理解。本发明可以通过许多不同形式的发明实施例来得以体现,本发明的保护范围并非仅限于文中提到的实施例。
在附图中,结构相同的部件以相同数字标号表示,各处结构或功能相似的组件以相似数字标号表示。附图所示的每一部件的尺寸和厚度是任意示出的,本发明并没有限定每个组件的尺寸和厚度。为了使图示更清晰,附图中有些地方适当夸大了部件的厚度。
此外,以下各发明实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定发明实施例。本发明中所提到的方向用语,例如,“上”、“下”、“前”、“后”、“左”、“右”、“内”、“外”、“侧面”等,仅是参考附加图式的方向,因此,使用的方向用语是为了更好、更清楚地说明及理解本发明,而不是指示或暗指所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”、“第三”等仅用于描述目的,而不能理解为指示或暗示相对重要性。
当某些部件被描述为“在”另一部件“上”时,所述部件可以直接置于所述另一部件上;也可以存在一中间部件,所述部件置于所述中间部件上,且所述中间部件置于另一部件上。当一个部件被描述为“安装至”或“连接至”另一部件时,二者可以理解为直接“安装”或“连接”,或者一个部件通过一中间部件间接“安装至”、或“连接至”另一个部件。
本发明实施例中提供了一种显示装置,所述显示装置中包括一显示面板1,所述显示面板1用以为所述显示装置提供显示画面,所述显示装置可以为任何具有显示功能的电子产品或部件。如图1-图2所示,所述显示面板1中包括阵列基板10、挡光层20、发光芯片30以及反光层40。
所述阵列基板10包括若干薄膜晶体管和一基层,所述薄膜晶体管阵列排布在所述基层上。所述薄膜晶体管中包括导电结构和绝缘结构。所述导电结构中包括有源层104、栅极层106和源漏极层108。所述绝缘结构包括栅极绝缘层105、介电层107、钝化层109、平坦层110等。
所述有源层104设于所述基层上,所述栅极绝缘层105设于所述有源层104上,所述栅极层106设于所述栅极绝缘层105上。所述介电层107设于所述基层上并覆盖所述有源层104、所述栅极绝缘层105和所述栅极层106。所述源漏极层108设于所述介电层107上,并穿过所述介电层107与所述有源层104电连接。所述钝化层109设于介电层107上,并覆盖所述源漏极层108。所述平坦层110设于所述钝化层109上。
所述基层包括衬底层101、遮光层102和缓冲层103。所述遮光层102设于所述衬底层101上,并与所述有源层104对应设置。所述缓冲层103设于所述衬底层101上,并覆盖所述遮光层102,所述有源层104设于所述缓冲层103远离所述遮光层102的一表面上。
所述遮光层102一般采用不透光的金属材料制成,其用于为所述有源层104遮光,防止光线影响有源层104的工作。所述缓冲层103和绝缘结构层一般采用硅氧化物、硅氮化物等无机材料制备而成。所述缓冲层103和所述绝缘结构层用于绝缘保护所述薄膜晶体管中的导电走线,防止走线之间发生短路。其中,所述平坦层110还用于将所述薄膜晶体管的表面平坦化。
所述阵列基板10中还具有像素电极层111,设于所述平坦层110上,并穿过所述平坦层110和钝化层109与所述源漏极层108电连接。
所述挡光层20设于所述阵列基板10的平坦层110上,并覆盖所述平坦层110的裸露面。所述挡光层20由具有遮光性的光阻材料制备而成。所述挡光层20可以防止发光芯片30所发出的光线从阵列基板10侧漏出。所述挡光层20中设有若干开口,所述开口对应于所述像素电极层111,使所述像素电极层111远离所述平坦层110的一表面裸露。
所述发光芯片30设于所述开口中,并与所述开口中的像素电极层111电连接。所述发光芯片30通过所述像素电极层111与所述阵列基板10中的薄膜晶体管电连接,从而获取电能,实现自发光。所述发光芯片30可以为迷你发光二极管(Mini-LED)、微型发光二极管(Micro-LED)等自发光芯片30中的一种。所述发光芯片30可以发出白色光线、红色光线、蓝色光线、绿色光线中的任意一种。当所述显示面板1中的发光芯片30全部发出同一色彩时,其可通过彩色滤光片实现光线颜色的过滤转换,从而实现彩色显示。当所述显示面板1中的发光芯片30分别发出不同颜色的光线时,其可直接实现彩色显示。
所述反光层40设于所述挡光层20远离所述阵列基板10的一表面上,并围绕所述发光芯片30的侧面。所述反光层40采用具有反光性的绝缘材料制备而成,例如掺杂了反光材料的聚酯材料、树脂材料等。所述反光层40用于防止光线从所述发光芯片30的侧面发出,将光线聚集,从所述发光芯片30的顶面射出,从而减少光线的浪费并提高所述发光芯片30的发光效率。在一些实施例中,所述反光层40可以是例如直接接触并包覆所述发光芯片30的四周侧面,或者是与所述发光芯片30的四周侧面保持一个能够达到一定遮挡效果的间隙距离。在一些实施例中,所述反光层40可进一步采用具有较佳散热性质的绝缘材料制备而成。
所述阵列基板10朝向所述发光芯片30和所述反光层40的一表面为第一表面S1,所述反光层40远离所述阵列基板10的一表面为第二表面S2,所述发光芯片30远离所述阵列基板10的一表面为第三表面S3。为防止所述反光层40影响所述显示面板1的正面发光,所述反光层40的厚度小于所述发光芯片30的厚度并大于所述发光芯片30的厚度的一半,并且所述第一表面S1与所述第二表面S2之间的距离小于所述第一表面S1与所述第三表面S3之间的距离,即所述反光层40顶面所在的水平面低于所述发光芯片30顶面所在的水平面,从而防止反光层40遮盖所述发光芯片30出光的顶面。具体的,所述第二表面S2位于所述发光芯片30高度的50%处以上,优选的,其位于所述发光芯片30高度的75%处。
本发明实施例中还提供一种显示面板1的制备方法,用以制备如上所述的显示面板1。所述制备方法的具体流程如图3所示,其包括以下步骤:
步骤S10)在一阵列基板10上形成挡光层20:通过薄膜晶体管制程在一基层上制备若干薄膜晶体管以及像素电极层111,形成所述阵列基板10。在所述阵列基板10上通过光刻工艺形成如图4所示的挡光层20。
步骤S20)在所述阵列基板10上形成发光芯片30:将若干发光芯片30按顺序集合阵列在一起,并通过巨量转移将所述发光芯片30转移至所述阵列基板10上,形成如图5所示的结构。
步骤S30)根据所述发光芯片30的位置制备掩膜板2:准备一掩膜板材,根据所述发光芯片30在所述阵列基板10上的位置在所述掩膜板材上形成遮挡区域201以及镂空区域202,形成所述掩膜板2。其中,如图6所示,所述遮挡区域201与所述发光芯片30相对应,所述掩膜板2除去所述遮挡区域201外的剩余区域为镂空区域202。所述遮挡区域201中为全密封结构,无法渗透印刷材料。所述镂空区域202采用网状结构,具有若干通孔,可渗透印刷材料。具体的,所述镂空区域202可采用金属网、尼龙网等材质的丝网制备而成。
步骤S40)在所述挡光层20上形成反光层40:将所述掩膜板2与所述阵列基板10进行对位操作,将所述掩膜板2中的遮挡区域201与所述发光芯片30对应。透过所述掩膜板2将掺杂了反光材料的绝缘胶材涂布在所述挡光层20上。涂布完成后,将所涂布的绝缘胶材通过烘烤或紫外光照射固化,形成所述反光层40,完成所述显示面板1的制备。
本发明实施例中所提供的一种显示面板及其制备方法,在发光芯片的侧面制备反光层,通过反光层遮挡所述发光芯片的侧面光线散射,使所述发光芯片所发出的光线集中从所述发光芯片的顶面射出,从而提高发光芯片的发光效率,进而提高所述显示面板的正面显示亮度。并且,本发明实施例中所提供的制备方法中,在转移了发光芯片后再通过丝网印刷工艺制备反光层,原材料易得且工艺简单,降低了生产成本,并且还保证了发光芯片的转移良率。
虽然在本文中参照了特定的实施方式来描述本发明,但是应该理解的是,这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是,可以对示例性的实施例进行许多修改,并且可以设计出其他的布置,只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是,可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是,结合单独实施例所描述的特征可以使用在其他所述实施例中。

Claims (10)

  1. 一种显示面板,其包括:
    阵列基板;
    多个发光芯片,阵列设于所述阵列基板上;
    反光层,设于所述阵列基板上,并围绕在所述发光芯片的侧面。
  2. 如权利要求1所述的显示面板,其还包括:
    挡光层,设于所述发光芯片与所述阵列基板之间。
  3. 如权利要求2所述的显示面板,其中,
    所述挡光层覆盖所述阵列基板朝向所述发光芯片的一表面;
    所述发光芯片设于所述挡光层上,并与所述阵列基板电连接。
  4. 如权利要求1所述的显示面板,其中,所述反光层所采用的材料为绝缘材料。
  5. 如权利要求1所述的显示面板,其中,所述反光层的厚度小于所述发光芯片的厚度。
  6. 如权利要求1所述的显示面板,其中,所述反光层顶面所在的水平面低于所述发光芯片顶面所在的水平面。
  7. 如权利要求1所述的显示面板,其中,所述阵列基板中设有薄膜晶体管,所述发光芯片与所述薄膜晶体管电连接。
  8. 一种显示面板的制备方法,其包括以下步骤:
    在一阵列基板上形成发光芯片;
    提供一掩膜板,所述掩模板包括遮挡区域和镂空区域;
    通过所述掩膜板在所述阵列基板上形成围绕所述发光芯片的反光层,所述掩模板的遮挡区域对应所述发光芯片,所述镂空区域对应所述反光层。
  9. 如权利要求8所述的显示面板的制备方法,其中,在所述阵列基板上形成所述发光芯片步骤前还包括以下步骤:
    在所述阵列基板上形成挡光层。
  10. 如权利要求8所述的显示面板的制备方法,其中,所述掩膜板具有遮挡区域和围绕所述遮挡区域的镂空区域,所述遮挡区域与所述发光芯片相对应,所述镂空区域与所述反光层相对应。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009110873A (ja) * 2007-10-31 2009-05-21 Toppan Printing Co Ltd 表示装置
CN103474445A (zh) * 2013-08-14 2013-12-25 中国科学院长春光学精密机械与物理研究所 微型led集成阵列器件及制备方法
CN108183156A (zh) * 2017-12-26 2018-06-19 深圳市华星光电技术有限公司 微型发光二极管显示面板及其制作方法
CN111863797A (zh) * 2020-07-29 2020-10-30 京东方科技集团股份有限公司 一种显示基板、其制作方法及显示装置
CN112166505A (zh) * 2018-03-22 2021-01-01 原子能与替代能源委员会 Led发射显示装置及其制造方法
CN112951888A (zh) * 2021-01-28 2021-06-11 上海天马微电子有限公司 显示面板及显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203910851U (zh) * 2014-05-23 2014-10-29 晶科电子(广州)有限公司 一种白光led芯片
CN104681693A (zh) * 2015-02-16 2015-06-03 刘镇 Led发光装置
CN107359175B (zh) * 2017-07-25 2020-02-11 上海天马微电子有限公司 微发光二极管显示面板和显示装置
CN111028705A (zh) * 2019-12-13 2020-04-17 深圳市华星光电半导体显示技术有限公司 一种显示面板及显示装置
CN111128843A (zh) * 2019-12-27 2020-05-08 深圳市华星光电半导体显示技术有限公司 Micro LED的转移方法
CN111477653B (zh) * 2020-04-22 2023-08-15 京东方科技集团股份有限公司 显示面板、显示装置及显示面板的制造方法
CN214313248U (zh) * 2021-02-07 2021-09-28 深圳大道半导体有限公司 高光效led

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009110873A (ja) * 2007-10-31 2009-05-21 Toppan Printing Co Ltd 表示装置
CN103474445A (zh) * 2013-08-14 2013-12-25 中国科学院长春光学精密机械与物理研究所 微型led集成阵列器件及制备方法
CN108183156A (zh) * 2017-12-26 2018-06-19 深圳市华星光电技术有限公司 微型发光二极管显示面板及其制作方法
CN112166505A (zh) * 2018-03-22 2021-01-01 原子能与替代能源委员会 Led发射显示装置及其制造方法
CN111863797A (zh) * 2020-07-29 2020-10-30 京东方科技集团股份有限公司 一种显示基板、其制作方法及显示装置
CN112951888A (zh) * 2021-01-28 2021-06-11 上海天马微电子有限公司 显示面板及显示装置

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