WO2023074174A1 - 炭化珪素基板および炭化珪素基板の製造方法 - Google Patents

炭化珪素基板および炭化珪素基板の製造方法 Download PDF

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WO2023074174A1
WO2023074174A1 PCT/JP2022/034583 JP2022034583W WO2023074174A1 WO 2023074174 A1 WO2023074174 A1 WO 2023074174A1 JP 2022034583 W JP2022034583 W JP 2022034583W WO 2023074174 A1 WO2023074174 A1 WO 2023074174A1
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Prior art keywords
silicon carbide
main surface
less
carbide substrate
voids
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English (en)
French (fr)
Japanese (ja)
Inventor
貴洋 椎原
直樹 梶
俊策 上田
宏樹 高岡
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Sumitomo Electric Industries Ltd
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Sumitomo Electric Industries Ltd
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Priority to JP2023556187A priority Critical patent/JPWO2023074174A1/ja
Priority to US18/703,652 priority patent/US20250006796A1/en
Publication of WO2023074174A1 publication Critical patent/WO2023074174A1/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2904—Silicon carbide
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408—Silicon carbide

Definitions

  • the present disclosure relates to a silicon carbide substrate and a method for manufacturing a silicon carbide substrate.
  • This application claims priority from Japanese Patent Application No. 2021-178510 filed on November 1, 2021. All the contents described in the Japanese patent application are incorporated herein by reference.
  • Patent Document 1 Japanese National Publication of International Patent Application No. 2010-514648 (Patent Document 1) describes a method for manufacturing a silicon carbide crystal containing no micropipe defects.
  • a silicon carbide substrate according to the present disclosure includes a first main surface and a second main surface opposite to the first main surface. Voids exist in the silicon carbide substrate.
  • the surface density of voids on the first main surface is 0.7/cm 2 or less.
  • the width of the void is 10 ⁇ m or more and 80 ⁇ m or less when viewed in a direction perpendicular to the first main surface. In a cross section perpendicular to the first principal surface, the width of the void decreases from the first principal surface to the second principal surface when viewed in a direction parallel to the first principal surface.
  • the depth of the void When viewed in a direction parallel to the first main surface, the depth of the void is equal to or greater than the width of the void in the first main surface and less than the thickness of the silicon carbide substrate.
  • the first main surface is a silicon surface or a surface inclined in the off direction with respect to the silicon surface.
  • a method for manufacturing a silicon carbide substrate according to the present disclosure includes the following steps.
  • a silicon carbide raw material and a seed substrate are prepared.
  • a silicon carbide crystal is grown on the seed substrate by sublimating a silicon carbide raw material.
  • the silicon carbide crystal is cooled.
  • the cooling rate of the silicon carbide crystal in the temperature range of 1400° C. or more and 1600° C. or less is 23° C./min or more and 36° C./min or less.
  • FIG. 1 is a schematic plan view showing the configuration of a silicon carbide substrate according to this embodiment.
  • FIG. 2 is a schematic cross-sectional view taken along line II-II of FIG. 3 is an enlarged plan view of area III of FIG. 1.
  • FIG. 4 is a schematic cross-sectional view taken along line IV-IV of FIG.
  • FIG. 5 is an enlarged plan view of region V in FIG.
  • FIG. 6 is an enlarged plan view of area VI in FIG.
  • FIG. 7 is a schematic cross-sectional view taken along line VII--VII of FIG.
  • FIG. 8 is a schematic partial cross-sectional view showing the configuration of the silicon carbide crystal manufacturing apparatus according to the present embodiment.
  • FIG. 9 is a flow diagram schematically showing a method for manufacturing a silicon carbide substrate according to this embodiment.
  • FIG. 10 is a schematic diagram showing the relationship between temperature and time.
  • FIG. 11 is a flowchart schematically showing the cooling step of the method for manufacturing a silicon carbide substrate according to this embodiment.
  • FIG. 12 is a schematic cross-sectional view showing the configuration of the silicon carbide crystal after the cooling step.
  • FIG. 13 is an enlarged schematic diagram showing the configuration of region XIII in FIG.
  • FIG. 14 is a diagram showing the relationship between the surface density of voids and the cooling rate of silicon carbide crystals.
  • FIG. 15 is a diagram showing the relationship between the device yield and the area density of voids.
  • An object of the present disclosure is to provide a silicon carbide substrate and a method for manufacturing a silicon carbide substrate that can reduce the areal density of voids while suppressing the occurrence of cracks.
  • Advantageous Effects of Invention According to the present disclosure, it is possible to provide a silicon carbide substrate and a method for manufacturing a silicon carbide substrate that can reduce the areal density of voids while suppressing the occurrence of cracks.
  • a silicon carbide substrate 100 according to the present disclosure includes a first main surface 1 and a second main surface 2 opposite to the first main surface 1 .
  • Voids 10 are present in silicon carbide substrate 100 .
  • the surface density of voids 10 on first main surface 1 is 0.7/cm 2 or less.
  • void 10 has a width of 10 ⁇ m or more and 80 ⁇ m or less.
  • the width of the void 10 decreases from the first major surface 1 toward the second major surface 2 .
  • the first main surface 1 is a silicon surface or a surface inclined in the off direction with respect to the silicon surface.
  • the surface density of voids 10 in first main surface 1 may be 0.2/cm 2 or more.
  • micropipe defect 20 may be present in silicon carbide substrate 100 .
  • the areal density of the micropipe defects 20 on the first major surface 1 may be 0.3/cm 2 or less.
  • first main surface 1 may have a diameter of 150 mm or more.
  • the off angle of the surface inclined in the off direction with respect to the silicon surface may be 8° or less.
  • the method for manufacturing silicon carbide substrate 100 includes the following steps. Silicon carbide source material 53 and seed substrate 50 are prepared. Silicon carbide crystal 110 is grown on seed substrate 50 by sublimating silicon carbide source material 53 . After the step of growing silicon carbide crystal 110, silicon carbide crystal 110 is cooled. In the step of cooling silicon carbide crystal 110, the cooling rate of silicon carbide crystal 110 in the temperature range of 1400° C. or more and 1600° C. or less is 23° C./min or more and 36° C./min or less.
  • the temperature of silicon carbide crystal 110 may be 2100° C. or higher and 2300° C. or lower.
  • the temperature of silicon carbide crystal 110 is in a temperature range of 1000° C. or more and less than 1400° C. may be less than 23° C./min.
  • FIG. 1 is a schematic plan view showing the configuration of a silicon carbide substrate 100 according to this embodiment.
  • silicon carbide substrate 100 has first main surface 1 and outer peripheral side surface 9 .
  • First main surface 1 extends along each of first direction 101 and second direction 102 .
  • the first direction 101 is, but not limited to, the ⁇ 11-20> direction, for example.
  • the second direction 102 is, but not limited to, the ⁇ 1-100> direction, for example.
  • the off direction is the first direction 101, for example.
  • Silicon carbide substrate 100 is made of, for example, hexagonal silicon carbide. A polytype of hexagonal silicon carbide is, for example, 4H. Silicon carbide substrate 100 contains n-type impurities such as nitrogen.
  • the first main surface 1 is a silicon surface or a surface inclined in the off direction with respect to the silicon surface.
  • the first main surface 1 is the (0001) plane or a plane inclined in the off direction with respect to the (0001) plane.
  • the second main surface 2 (see FIG. 2) is a carbon surface or a surface inclined in the off direction with respect to the carbon surface.
  • the second main surface 2 is the (000-1) plane or a plane inclined in the off direction with respect to the (000-1) plane.
  • the outer peripheral side surface 9 has an orientation flat portion 7 and an arcuate portion 8 .
  • the arcuate portion 8 continues to the orientation flat portion 7 .
  • the orientation flat portion 7 extends along the first direction 101 when viewed from the direction perpendicular to the first main surface 1 .
  • a diameter W1 of the first main surface 1 is, for example, 150 mm.
  • the diameter W1 may be 150 mm or more, or may be 200 mm or more.
  • the diameter W1 is not particularly limited, but may be, for example, 300 mm or less.
  • the diameter W1 is the longest linear distance between two different points on the outer peripheral side surface 9 when viewed in a direction perpendicular to the first main surface 1 .
  • FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG.
  • the cross section shown in FIG. 2 is perpendicular to the first main surface 1 and parallel to the first direction 101 .
  • silicon carbide substrate 100 according to the present embodiment has second main surface 2 .
  • the second major surface 2 is opposite the first major surface 1 .
  • Thickness E1 of silicon carbide substrate 100 is, for example, not less than 300 ⁇ m and not more than 700 ⁇ m.
  • a third direction 103 is a direction perpendicular to each of the first direction 101 and the second direction 102 .
  • the thickness direction of silicon carbide substrate 100 is the same as third direction 103 .
  • the off angle ⁇ of the surface inclined in the off direction with respect to the silicon surface may be 8° or less.
  • the off angle ⁇ is not particularly limited, it may be, for example, 6° or less, or 4° or less.
  • the off angle ⁇ is not particularly limited, it may be, for example, 1° or more, or 2° or more.
  • the off-direction of the surface inclined in the off-direction with respect to the silicon surface is not particularly limited, but is, for example, the ⁇ 11-20> direction.
  • FIG. 3 is an enlarged plan view of region III in FIG.
  • One or more voids 10 are present in silicon carbide substrate 100 according to the present embodiment.
  • the shape of the opening 11 of the void 10 when viewed in the direction perpendicular to the first main surface 1 is not particularly limited, but is, for example, hexagonal.
  • the shape of the opening 11 of the void 10 may be a shape other than a hexagon.
  • Voids 10 do not involve threading screw dislocations. From another point of view, voids 10 are not connected to threading screw dislocations.
  • the width of the void 10 (first width A1) is 10 ⁇ m or more and 80 ⁇ m or less.
  • the width of the void 10 is the maximum width between any two points in the opening 11 of the void 10 .
  • the width of void 10 may be, for example, the width along the off direction.
  • the value of the first width A1 is not particularly limited, but may be, for example, 20 ⁇ m or more, or may be 30 ⁇ m or more.
  • the value of the first width A1 is not particularly limited, but may be, for example, 70 ⁇ m or less, or 60 ⁇ m or less.
  • the surface density of voids 10 in first main surface 1 is 0.7/cm 2 or less.
  • the surface density of the voids 10 is not particularly limited, but may be, for example, 0.6/cm 2 or less, or 0.5/cm 2 or less.
  • the surface density of voids 10 is, for example, 0.2/cm 2 or more.
  • the surface density of the voids 10 is not particularly limited, but may be, for example, 0.25/cm 2 or more, or may be 0.3/cm 2 or more.
  • FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG.
  • the cross-section shown in FIG. 4 is perpendicular to the first major surface 1 and parallel to the first direction 101 .
  • the width of the void 10 (first width A1) decreases from the first main surface 1 toward the second main surface 2.
  • the void 10 has an opening 11 , a first side surface 12 and a bottom 13 .
  • the opening 11 is located on the first main surface 1 .
  • the bottom 13 is located between the first principal surface 1 and the second principal surface 2 .
  • the first side portion 12 is located between the opening portion 11 and the bottom portion 13 .
  • the first side surface portion 12 may be linear.
  • the void 10 when viewed in a direction parallel to the first main surface 1, the void 10 has a triangular shape, for example.
  • the base of the triangle is positioned at opening 11 .
  • the apex of the triangle corresponds to the bottom 13 of void 10 .
  • the direction perpendicular to the base of the triangle is the thickness direction of silicon carbide substrate 100 .
  • a triangle is, for example, an isosceles triangle.
  • the width of the opening 11 corresponds to the first width A1.
  • the first side surface portion 12 is inclined with respect to the third direction 103 (see FIG. 2).
  • the void 10 may be a hexagonal pyramid.
  • the depth of the void 10 (first depth B1) is equal to the width of the void 10 in the first main surface 1 (first depth B1). width A1) or more.
  • the first depth B1 may be the same as the first width A1 or may be greater than the first width A1.
  • the depth of the void 10 is not particularly limited, but may be, for example, three times or less the width of the void 10, or may be two times or less.
  • the depth of void 10 is less than the thickness of silicon carbide substrate 100 . In other words, void 10 does not penetrate silicon carbide substrate 100 . Voids 10 are exposed only on first principal surface 1 and not exposed on second principal surface 2 . Alternatively, the voids 10 may be exposed only on the second principal surface 2 and not exposed on the first principal surface 1 . In this case, the opening 11 of the void 10 is located on the second main surface 2 .
  • FIG. 5 is an enlarged plan view of region V in FIG.
  • the shape of the opening 11 of the void 10 may be circular, for example.
  • Three-dimensionally, void 10 may be conical.
  • the cross-sectional shape of the void 10 shown in FIG. 5 is similar to the shape shown in FIG.
  • the shape of the opening 11 of the void 10 is not particularly limited, but may be, for example, an ellipse or a polygonal shape other than a hexagon.
  • FIG. 6 is an enlarged plan view of area VI in FIG.
  • One or more micropipe defects 20 may exist in silicon carbide substrate 100 according to the present embodiment. As shown in FIG. 6, when viewed in a direction perpendicular to the first main surface 1, the shape of the micropipe defect 20 is, for example, hexagonal. Micropipe defects 20 involve threading screw dislocations.
  • the width (second width A2) of the micropipe defect 20 when viewed in the direction perpendicular to the first main surface 1 is, for example, 1 ⁇ m or more and 8 ⁇ m or less.
  • the width of the micropipe defect 20 is the maximum width between any two points in the first opening 21 of the micropipe defect 20 .
  • the width of micropipe defect 20 may be, for example, the width along the off direction.
  • the width (first width A1) of the void 10 may be five times or more the width (second width A2) of the micropipe defect 20, or may be ten times or more the second width A2.
  • surface density of micropipe defects 20 in first main surface 1 is, for example, 0.3/cm 2 or less.
  • the areal density of micropipe defects 20 is not particularly limited, but may be, for example, 0.25/cm 2 or less, or may be, for example, 0.2/cm 2 or less.
  • the areal density of micropipe defects 20 is not particularly limited, but may be, for example, 0.01/cm 2 or more, or may be, for example, 0.05/cm 2 or more.
  • FIG. 7 is a schematic cross-sectional view taken along line VII-VII in FIG. The cross-section shown in FIG. 7 is perpendicular to the first major surface 1 and parallel to the first direction 101 . As shown in FIG. 7, micropipe defect 20 penetrates silicon carbide substrate 100 . A micropipe defect 20 opens into each of the first major surface 1 and the second major surface 2 .
  • the micropipe defect 20 has a first opening 21 , a second side surface 22 and a second opening 23 .
  • the first opening 21 is located on the first main surface 1 .
  • the second opening 23 is located on the second main surface 2 .
  • the second side surface portion 22 is located between the first opening portion 21 and the second opening portion 23 . When viewed in a direction parallel to the first major surface 1 , the second side surface portion 22 extends in a direction substantially perpendicular to the first major surface 1 .
  • the length (second length B2) of micropipe defect 20 in the direction perpendicular to first main surface 1 is substantially the same as thickness E1 of silicon carbide substrate 100 .
  • the second length B2 is greater than the second width A2.
  • the second length B2 may be 25 times or more the second width A2, or may be 50 times or more the second width A2.
  • FIG. 8 is a schematic partial cross-sectional view showing the configuration of the silicon carbide crystal manufacturing apparatus according to the present embodiment.
  • silicon carbide crystal manufacturing apparatus 200 mainly includes crucible 30 , first resistance heater 41 , second resistance heater 42 , and third resistance heater 43 .
  • the crucible 30 has a raw material storage portion 32 and a lid portion 31 .
  • the lid portion 31 is arranged on the raw material storage portion 32 .
  • the first resistance heater 41 is arranged above the lid portion 31 .
  • the second resistance heater 42 is arranged so as to surround the outer circumference of the raw material storage section 32 .
  • the third resistance heater 43 is arranged below the bottom surface of the raw material container 32 .
  • the crucible 30 is heated by applying power to the first resistance heater 41 , the second resistance heater 42 , and the third resistance heater 43 .
  • silicon carbide source material 53 is arranged in source material accommodating portion 32 .
  • Silicon carbide raw material 53 is, for example, powder of polycrystalline silicon carbide.
  • Seed substrate 50 is fixed to lid portion 31 using an adhesive (not shown), for example.
  • Seed substrate 50 has a growth surface 51 and a mounting surface 52 .
  • Mounting surface 52 is opposite growth surface 51 .
  • Growth surface 51 faces silicon carbide source material 53 .
  • the mounting surface 52 faces the lid portion 31 .
  • Growth surface 51 of seed substrate 50 is arranged to face the surface of silicon carbide source material 53 .
  • Seed substrate 50 is, for example, a hexagonal silicon carbide substrate with a polytype of 4H.
  • the diameter of growth surface 51 is, for example, 150 mm.
  • the diameter of the growth surface 51 may be 150 mm or more.
  • Growth plane 51 is, for example, the ⁇ 0001 ⁇ plane or a plane inclined at an off angle of about 8° or less with respect to the ⁇ 0001 ⁇ plane. As described above, seed substrate 50 and silicon carbide source material 53 are prepared.
  • FIG. 9 is a flowchart schematically showing a method for manufacturing silicon carbide substrate 100 according to this embodiment.
  • the method for manufacturing silicon carbide substrate 100 according to the present embodiment mainly includes a temperature raising step (S10), a growing step (S20), and a cooling step (S30). .
  • FIG. 10 is a schematic diagram showing the relationship between temperature and time.
  • the vertical axis indicates temperature and the horizontal axis indicates time.
  • the temperature of the growth surface 51 of the seed substrate 50 inside the crucible 30 increases from the first temperature C1 to the second temperature C1 from the first time T1 to the second time T2. It rises to temperature C2.
  • the first temperature C1 is 1100° C., for example.
  • the second temperature C2 is 2200° C., for example.
  • the pressure of the atmospheric gas in crucible 30 is maintained at, for example, about 80 kPa.
  • Atmospheric gas includes inert gas such as argon gas, helium gas, or nitrogen gas.
  • the growth step (S20) is performed.
  • the pressure in crucible 30 is reduced.
  • the pressure of the atmospheric gas in crucible 30 is reduced to, for example, 1.0 kPa.
  • silicon carbide source material 53 starts to sublimate, and the sublimated silicon carbide gas is recrystallized on growth surface 51 of seed substrate 50 .
  • silicon carbide crystal 110 begins to grow as a single crystal. While silicon carbide crystal 110 is growing, the pressure in crucible 30 is maintained, for example, at approximately 0.1 kPa or more and 3 kPa or less.
  • silicon carbide crystal 110 continues to grow on growth surface 51 of seed substrate 50 from second time T2 to third time T3. From second time point T2 to third time point T3, the temperature of silicon carbide crystal 110 is substantially maintained at second temperature C2.
  • the temperature of silicon carbide crystal 110 is the temperature of the portion of silicon carbide crystal 110 in contact with growth surface 51 of seed substrate 50 .
  • silicon carbide crystal 110 is grown on seed substrate 50 by sublimating silicon carbide source material 53 .
  • the temperature of silicon carbide crystal 110 is, for example, 2100° C. or more and 2300° C. or less. Although the temperature of silicon carbide crystal 110 is not particularly limited, it may be, for example, 2125° C. or higher or 2150° C. or higher. Although the temperature of silicon carbide crystal 110 is not particularly limited, it may be, for example, 2250° C. or lower or 2275° C. or lower.
  • FIG. 11 is a flowchart schematically showing the cooling step of the method for manufacturing silicon carbide substrate 100 according to the present embodiment.
  • the cooling step (S30) mainly includes a first cooling step (S31), a second cooling step (S32), and a third cooling step (S33).
  • the first cooling step (S31) is performed. As shown in FIG. 10, in the first cooling step (S31), silicon carbide crystal 110 is cooled from second temperature C2 to third temperature C3 from third time point T3 to fourth time point T4.
  • the third temperature C3 is 1600° C., for example.
  • the second cooling step (S32) is performed. As shown in FIG. 10, in the second cooling step (S32), silicon carbide crystal 110 is cooled from third temperature C3 to fourth temperature C4 from fourth time point T4 to fifth time point T5.
  • the fourth temperature C4 is 1400° C., for example.
  • the cooling rate of silicon carbide crystal 110 in the temperature range of 1400° C. or more and 1600° C. or less is 23° C./min or more and 36° C./min or less.
  • the cooling rate of silicon carbide crystal 110 in the second cooling step (S32) is 23° C./min or more and 36° C./min or less.
  • the cooling rate of silicon carbide crystal 110 in the second cooling step (S32) is a value obtained by dividing the temperature obtained by subtracting the fourth temperature C4 from the third temperature C3 by the time from the fourth time point T4 to the fifth time point T5. .
  • a cooling rate of silicon carbide crystal 110 in the second cooling step (S32) is not particularly limited, but may be, for example, 25° C./min or more, or may be 27° C./min or more.
  • the cooling rate of silicon carbide crystal 110 in second cooling step (S32) is not particularly limited, but may be, for example, 34° C./min or less, or may be 32° C./min or less.
  • the third cooling step (S33) is performed. As shown in FIG. 10, in the third cooling step (S33), silicon carbide crystal 110 is cooled from fourth temperature C4 to fifth temperature C5 from fifth time point T5 to sixth time point T6.
  • the fifth temperature C5 is 1000° C., for example.
  • the cooling rate of silicon carbide crystal 110 in the temperature range of 1000° C. or more and less than 1400° C. may be less than 23° C./min.
  • the cooling rate of silicon carbide crystal 110 in the third cooling step (S33) is less than 23° C./min.
  • the cooling rate of silicon carbide crystal 110 in the third cooling step (S33) is a value obtained by dividing the temperature obtained by subtracting fifth temperature C5 from fourth temperature C4 by the time from fifth time T5 to sixth time T6. .
  • the cooling rate of silicon carbide crystal 110 in the third cooling step (S33) is not particularly limited, but may be, for example, 1°C/min or more, or may be 5°C/min or more.
  • a cooling rate of silicon carbide crystal 110 in the third cooling step (S33) is not particularly limited, but may be, for example, 20° C./min or less, 15° C./min or less, or 10° C./min. minutes or less.
  • FIG. 12 is a schematic cross-sectional view showing the structure of silicon carbide crystal 110 after the cooling step. As shown in FIG. 12 , silicon carbide crystal 110 is formed below seed substrate 50 . The direction from seed substrate 50 toward silicon carbide source material 53 is the growth direction of silicon carbide crystal 110 .
  • FIG. 13 is an enlarged schematic diagram showing the configuration of region XIII in FIG.
  • void 10 is formed inside silicon carbide crystal 110 .
  • void 10 In a cross section parallel to the growth direction of silicon carbide crystal 110, void 10 has a triangular shape, for example.
  • the width of void 10 in the direction perpendicular to the growth direction of silicon carbide crystal 110 widens in the growth direction of silicon carbide crystal 110 . From another point of view, the width of void 10 in the direction perpendicular to the growth direction of silicon carbide crystal 110 increases from seed substrate 50 toward silicon carbide source material 53 .
  • silicon carbide crystal 110 is sliced. Specifically, silicon carbide crystal 110 is sliced along a plane perpendicular to the central axis of silicon carbide crystal 110 using, for example, a saw wire. Thereby, a plurality of silicon carbide substrates 100 are obtained (see FIG. 1).
  • Micropipe defects 20 involve threading screw dislocations. Therefore, by etching the vicinity of micropipe defect 20 with chlorine or the like, a pit having a unique shape is formed on the surface of silicon carbide substrate 100 . By calculating the number of pits per unit area, the areal density of micropipe defects 20 is calculated.
  • the inventor observed the surface of silicon carbide substrate 100 with an optical microscope after polishing silicon carbide substrate 100 .
  • a defect the defect is called a void 10
  • FIG. Further investigation revealed that the width of void 10 decreased from the front surface (first main surface 1) of silicon carbide substrate 100 toward the back surface (second main surface 2).
  • the depth of void 10 was equal to or greater than the width of void 10 on the surface (first main surface 1 ) and less than the thickness of silicon carbide substrate 100 .
  • the void 10 was not accompanied by threading screw dislocations. Therefore, it is considered that the voids 10 could not be detected by the etching method because the voids 10 were not expanded by etching with chlorine or the like.
  • the inventor has determined the position of the micropipe defect 20 on the surface of the silicon carbide substrate 100, the position of the void 10 on the surface, and the position (address) of the silicon carbide semiconductor device manufactured using the silicon carbide substrate 100. Upon detailed investigation of the relationship, it was confirmed that the address of the silicon carbide semiconductor device in which the failure occurred coincided with the position of silicon carbide substrate 100 where micropipe defect 20 or void 10 existed. That is, it was found that the void 10 newly discovered by the inventor is one of the causes of failure of the silicon carbide semiconductor device.
  • the inventor obtained the following knowledge and found a method for manufacturing the silicon carbide substrate 100 according to the present embodiment. Specifically, it was found that there is a strong correlation between the cooling rate in the cooling step of silicon carbide crystal 110 and the generation rate of voids 10 . In the step of cooling silicon carbide crystal 110 , it is considered that voids 10 are generated in silicon carbide crystal 110 by supersaturation of vacancies present in silicon carbide crystal 110 and precipitation of crystal defects.
  • the inventor came up with the idea of suppressing the generation of voids 10 by suppressing supersaturation of vacancies by increasing the cooling rate of silicon carbide crystal 110 .
  • the cooling rate of silicon carbide crystal 110 in the temperature range of 1400° C. or higher and 1600° C. or lower. is 23° C./min or more and 36° C./min or less.
  • the temperature of seed substrate 50 is 2100° C. in the step of growing silicon carbide crystal 110 on seed substrate 50 by sublimating silicon carbide source material 53 . It may be above 2300° C. or below.
  • the concentration of vacancies formed in silicon carbide crystal 110 increases as the temperature increases. It is considered that when the concentration of vacancies is high, the surface density of voids 10 caused by the vacancies increases. Therefore, by setting the temperature of seed substrate 50 to 2300° C. or less, it is possible to suppress an increase in surface density of voids 10 generated in silicon carbide crystal 110 formed on seed substrate 50 . Further, by setting the temperature of seed substrate 50 to 2100° C. or higher, deterioration of the quality of silicon carbide crystal 110 grown on seed substrate 50 can be suppressed.
  • silicon carbide crystal 110 in the step of cooling silicon carbide crystal 110, silicon carbide crystal 110 is cooled in a temperature range of 1000° C. or more and less than 1400° C.
  • the rate may be less than 23°C/min.
  • the surface density of voids 10 is 0.7/cm 2 or less. Therefore, the yield of silicon carbide semiconductor devices manufactured using silicon carbide substrate 100 according to the present embodiment can be improved.
  • Example 1 (Sample preparation) In Example 1, the group (first group) in which the growth temperature (second temperature C2) in the growth step (S20) is 2150° C. and the group (second group) in which the growth temperature (second temperature C2) is 2300° C. Silicon carbide crystal 110 was manufactured under the conditions of . Each group of silicon carbide crystals 110 was manufactured using the temperature profile shown in FIG. The first temperature C1 was set to 1100°C. The third temperature C3 was set to 1600°C. The fourth temperature C4 was set to 1400°C. The fifth temperature C5 was set to 1000°C.
  • the cooling rate in the second cooling step (S32) was changed between 2°C/minute and 33°C/minute.
  • the cooling rate in the second cooling step (S32) was varied between 3°C/min and 48°C/min.
  • silicon carbide substrates 100 were obtained from silicon carbide crystals 110 cooled at different cooling rates.
  • the surface density of voids 10 was measured in all silicon carbide substrates 100 .
  • the number of voids 10 was measured in first main surface 1 of silicon carbide substrate 100 .
  • Identification of voids 10 was performed using an optical microscope.
  • a bottomed hole having a width of 10 ⁇ m or more and 80 ⁇ m or less when viewed in a direction perpendicular to the first main surface 1 and whose width decreases from the first main surface 1 toward the second main surface 2 was specified as the void 10. .
  • a value obtained by dividing the number of voids 10 in the first main surface 1 by the area of the first main surface 1 was taken as the area density of the voids 10 .
  • FIG. 14 is a diagram showing the relationship between the areal density of voids 10 and the cooling rate of silicon carbide crystal 110 .
  • the areal density of voids 10 in silicon carbide substrate 100 manufactured at a low growth temperature (2150° C.) is higher than that at a high growth temperature ( 2300° C.) was confirmed to be lower than the areal density of voids 10 in silicon carbide substrate 100 manufactured at 2300° C.).
  • the surface density of voids 10 in silicon carbide substrate 100 manufactured at a high cooling rate is higher than the surface density of voids 10 in silicon carbide substrate 100 manufactured at a low cooling rate. It was confirmed to be lower than the density. From the above results, it was confirmed that the areal density of the voids 10 can be reduced by increasing the cooling rate in the second cooling step. Specifically, when the growth temperature is 2300° C., the surface density of voids 10 in silicon carbide substrate 100 is 0.7/cm 2 or less by setting the cooling rate in the second cooling step to 23° C./min or more. I was able to
  • cracks were confirmed in silicon carbide crystal 110 manufactured at a cooling rate of 40° C./min or higher in the second cooling step.
  • a crack is an elongated crack with a length of 100 ⁇ m or more.
  • Example 2 (Sample preparation) In Example 2, the silicon carbide substrate 100 of the group (third group) in which the surface density of the micropipe defects 20 is 0/cm 2 and the group in which the surface density of the micropipe defects 20 is 0.3/cm 2 (fourth group) of silicon carbide substrates 100 and a group (fifth group) of silicon carbide substrates 100 having an areal density of micropipe defects 20 of 0.8/cm 2 ;
  • silicon carbide substrates 100 of the third group the areal density of voids 10 was varied between 0.2/cm 2 and 2.0/cm 2 .
  • the areal density of voids 10 was varied between 0.3/cm 2 and 1.8/cm 2 .
  • silicon carbide substrates 100 of the fifth group the areal density of voids 10 was varied between 0.2/cm 2 and 1.6/cm 2 .
  • Silicon carbide epitaxial layers were formed on the silicon carbide substrates 100 of each group to fabricate devices.
  • the device was a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • FIG. 15 is a diagram showing the relationship between the device yield and the areal density of the voids 10. As shown in FIG. As shown in FIG. 15 , comparing silicon carbide substrates 100 having the same areal density of micropipe defects 20 , the yield of devices manufactured using silicon carbide substrates 100 having a low areal density of voids 10 is lower than that of voids 10 . It was confirmed that the yield was higher than that of devices manufactured using silicon carbide substrate 100 having a high surface density.
  • the yield of devices manufactured using silicon carbide substrates 100 having a low areal density of micropipe defects 20 is lower than that of silicon carbide having a high areal density of micropipe defects 20. It was confirmed that the yield of devices manufactured using the substrate 100 was higher.
  • the areal density of micropipe defects 20 should be 0.3/cm 2 or less, and the areal density of voids 10 should be 0.7/cm 2 or less. was confirmed to be desirable.

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