WO2023016048A1 - 一种功率模块、电源电路及芯片 - Google Patents

一种功率模块、电源电路及芯片 Download PDF

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Publication number
WO2023016048A1
WO2023016048A1 PCT/CN2022/095007 CN2022095007W WO2023016048A1 WO 2023016048 A1 WO2023016048 A1 WO 2023016048A1 CN 2022095007 W CN2022095007 W CN 2022095007W WO 2023016048 A1 WO2023016048 A1 WO 2023016048A1
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Prior art keywords
metal
clad substrate
chip
power module
alloy
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PCT/CN2022/095007
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English (en)
French (fr)
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郎丰群
王玉涛
陈惠斌
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华为技术有限公司
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Priority to EP22855034.9A priority Critical patent/EP4350763A1/en
Publication of WO2023016048A1 publication Critical patent/WO2023016048A1/zh

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Definitions

  • the present application relates to the technical field of semiconductor packaging, in particular to a power module, a power circuit and a chip.
  • the present application provides a power module, a power supply circuit and a chip, which are used to provide a power module with high heat dissipation performance, power density and reliability.
  • a power module provided by the present application includes a first metal-clad substrate and a second metal-clad substrate oppositely arranged, a chip and a chip located between the first metal-clad substrate and the second metal-clad substrate Interconnection columns; wherein, a sintering material is also provided between the chip and the first metal-clad substrate, and the chip and the first metal-clad substrate are electrically connected by pressure sintering using the sintering material.
  • the sintering material can include silver paste, copper paste or At least one of the silver film; the interconnection column is located between the chip and the second metal-clad substrate, and the chip is electrically connected to the second metal-clad substrate through the interconnection column.
  • the heat generated inside the power module can be discharged from the direction of the first metal-clad substrate and the direction of the second metal-clad substrate, thereby improving the heat dissipation performance of the power module.
  • the stress of the sintered material is low, and the chip is electrically connected to the first metal-clad substrate through pressure sintering, which can improve the bonding reliability.
  • the sintered material in this application has the advantages of low sintering temperature, high melting point and high thermal conductivity, so it can not only further improve the heat dissipation performance of the power module, but also improve the working environment temperature and service life of the power module, thereby Increase the power density of the power module.
  • the first metal-clad substrate and the second metal-clad substrate may be copper-clad ceramic substrates (Direct Bond Copper, DBC), active metal brazed copper substrates (Active metal brazed copper, AMB, such as Al 2 O 3 - AMB, Si 3 N 4 -AMB, or AlN-AMB) or an insulated metal substrate (Insulated metal substrate, IMS), etc., are not limited herein.
  • DBC Direct Bond Copper
  • AMB active metal brazed copper substrates
  • AMB such as Al 2 O 3 - AMB, Si 3 N 4 -AMB, or AlN-AMB
  • IMS Insulated metal substrate
  • the first metal-clad substrate and the second metal-clad substrate may be formed of AlN-DBC, Si 3 N 4 -AMB or AlN-AMB with high thermal conductivity, which is not limited herein.
  • the sintered material may be formed of silver paste, copper paste or silver film.
  • the silver paste may include at least one of Micrometer silver particle paste (Micrometer silver particle paste) and Nanometer silver paste (Nanometer silver particle paste).
  • the micron silver paste refers to the silver paste made by using micron silver particles and organic solvents, which is low in cost and safe. Generally, it is sintered under pressure, the sintered material has high density, the interface of the joined body is firmly bonded, and the bonding reliability is high.
  • Nano-silver paste is a silver paste made of nano-silver particles and organic solvents. The cost is high, and there are operational safety risks of nanoparticles.
  • the sintered material of the present application can be formed by using Micrometer silver particle paste.
  • the modulus of elasticity, coefficient of thermal expansion (CTE), etc. of the sintered material can be adjusted by adding materials to the sintered material.
  • the sintered material includes a host material and a filler (Filler) filled in the host material; wherein the host material includes at least one of silver paste, copper paste or silver film, and the filler has good bonding properties with the host material
  • the thermal expansion coefficient of the filler is smaller than that of the host material, thereby improving the bonding reliability of sintering.
  • the filler can include nickel (Ni), Ni alloy, copper (Cu), nickel-plated copper, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar (Kovar, iron-nickel-cobalt alloy 4J29) and SiC powder, etc., are not limited here.
  • the metal layer covered on the surface of the first metal-clad substrate and the second metal-clad substrate is generally copper, and when the sintering material is silver paste or silver film, in order to improve For the bonding performance of the substrate, the first metal-clad substrate can be plated with silver at the sintered part, that is, the area corresponding to the sintered material of the first metal-clad substrate is covered with a silver-plated layer.
  • the thickness of the silver plating layer can be controlled between 0.1 ⁇ m ⁇ 30 ⁇ m.
  • silver plating may not be required.
  • the sintered material is copper paste
  • the first metal-clad substrate does not need to be plated with silver at the sintered part.
  • the pressure sintering may include the following steps: step (1), when the sintering material is copper paste or silver paste, the copper paste or silver paste may be printed on the first coating by using a stencil printing process or a screen printing process on the corresponding sintering area of the metal layer substrate. Then, the copper paste or the silver paste printed on the first metal-clad substrate may be pre-dried at a temperature of 100° C. to 180° C. for 5 minutes to 40 minutes under N2 atmosphere. Then fix the chip on the dried copper paste or silver paste by vacuum adsorption, and apply a pressure of 0.1 MPa to 10 MPa on the chip mounted on the first metal-clad substrate in an environment with a temperature of 100 ° C to 180 ° C At least 10ms.
  • step (1) when the sintering material is copper paste or silver paste, the copper paste or silver paste may be printed on the first coating by using a stencil printing process or a screen printing process on the corresponding sintering area of the metal layer substrate. Then, the copper paste
  • the chip When the sintering material is a silver film, the chip can be adsorbed by a metal suction nozzle, and the temperature of the metal suction nozzle is 80°C to 200°C. Then press the chip on a large piece of silver film, apply a pressure of 0.1MPa to 5MPa, and pressurize for 1ms to 10000ms. In this way, the silver film under the chip is compressed and semi-sintered, adhering to the chip. Then, by vacuum adsorption, fix the chip with the silver film on the first metal-clad substrate, and apply 0.1 MPa ⁇ 10MPa pressure at least 10ms. In step (2), the pressure head can be used to carry out pressure sintering on the chip mounted on the first metal-clad substrate.
  • the parallelism of the pressure head can be set to ⁇ 5 ⁇ m, which can reduce the product warpage after sintering.
  • the sintering conditions for the pressure sintering may be as follows: the sintering temperature is controlled at 200°C-300°C, the applied pressure is controlled at 5MPa-30MPa, and the sintering time is controlled at 1min-10min.
  • a removable stress relief film can also be placed between the chip and the pressure head.
  • the stress relaxation film can prevent the pressure head from directly contacting the chip and reduce the damage caused by the stress concentration of the pressure head to the chip.
  • the stress relief film can be removed.
  • an organic film such as a Teflon film may be used as the stress relief film, which is not limited herein.
  • the sintered first metal-clad substrate and chip can be cooled under pressure.
  • the cooling conditions may be: the applied pressure is controlled at 5 MPa-20 MPa, and the cooling time is controlled at 1 min-10 min.
  • the first metal-clad substrate mounted with the chip may also be cleaned to remove residual organic matter.
  • Plasma treatment Pulsma treatment
  • organic solvent cleaning process is used to remove residual organic matter on the first metal-clad substrate, etc., to increase the interface bonding of subsequent molding compounds, prevent delamination of molding compounds, and further improve the reliability of power modules.
  • the chip faces the side of the first metal-clad substrate and the chip is away from the first cladding layer.
  • the surface electrodes include welding or sintering metal layers; the surface electrodes on the side of the chip facing the first metal-clad substrate also include welding or sintering metal layer away from the stress-buffering metal layer on the side of the first metal-clad substrate; and/or, the surface electrode on the side of the chip away from the first metal-clad substrate also includes a The metal layer faces the stress buffer metal layer on the side of the first metal-clad substrate.
  • the material of the stress-buffering metal layer may be a soft metal with a hardness less than HV60, such as aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold or gold alloy, and the like. Utilize the flexibility characteristics of soft metal to release the stress of the joint.
  • the stress-buffering metal layer when the material of the stress-buffering metal layer is a non-weldable metal, such as aluminum, aluminum alloy or magnesium alloy, the stress-buffering metal layer can be disposed under the welding or sintering metal layer.
  • the soldering or sintering metal layer may include: Ti/Ni/Ag, Ti/Ni/Au, Ti/NiV/Ag, Ti/NiV/Au, Ni(P)/Pd/Au, Ni(P)/ Pd/Ag, Ni(P)/Au or Ni(P)/Ag, etc.
  • the first solder can be used to connect the interconnection column on the side of the chip away from the first metal-clad substrate by welding; the second solder can be used to connect the interconnection column to the second metal-clad substrate on the side away from the chip by welding .
  • the thickness of the solder has an important influence on the reliability of the solder joint.
  • at least one first support column is arranged between the interconnection column and the chip.
  • the at least one first support column A supporting pillar can be formed on the side of the interconnecting pillar facing the chip, that is, on the interconnecting pillar; the at least one first supporting pillar can also be formed on the side of the chip facing the interconnecting pillar, that is, on the chip.
  • At least one second support column is provided between the interconnection column and the second metal-clad substrate, and the at least one second support column can be formed on the side of the interconnection column facing the second metal-clad substrate, that is, formed on the interconnection column On the column; the at least one second support column may also be formed on the side of the second metal-clad substrate facing the interconnection column, that is, formed on the second metal-clad substrate.
  • the power module of the present application in addition to chips and interconnection columns, it may also include electronic components located on the side of the first metal-clad substrate facing the second metal-clad substrate, and the electronic components are connected to the first metal-clad substrate through the third solder. layer substrate connection.
  • the first solder, the second solder and the third solder may be formed by using solder paste or solder sheet, which is not limited here.
  • all the solders in this application can be made of the same material, for example, the first solder, the second solder and the third solder are formed with the same solder, so that the welding of the chip and the interconnection column, and the welding of the interconnection column and the second metal-clad substrate And the soldering of the electronic components and the first metal-clad substrate can be completed by one-time reflow soldering, so that the process steps can be simplified and the cost can be saved.
  • solders may also be used for the first solder, the second solder and the third solder, which is not limited here.
  • the first solder and the third solder can use high-temperature solder, such as high-lead solder, Au-based solder, etc.
  • the second solder can use medium-temperature solder, such as SAC305, Sn-Sb solder, etc.
  • the electronic components in this application include any electronic components welded on the first metal-clad substrate by soldering, such as signal terminals, power terminals, thermistors, and the like.
  • At least one third support column is further arranged between the electronic component and the first metal-clad substrate, and the at least one third support column may be formed on The electronic component faces the side of the first metal-clad substrate, or may be formed on the side of the first metal-clad substrate facing the electronic component, which is not limited herein.
  • the material of the support column is a conductive material.
  • the supporting column may be at least one of Al, Al alloy, Au, Au alloy, Cu, Cu alloy, Ni, Ni alloy, copper clad with aluminum, Cu-Sn high melting point alloy, or high temperature solder form.
  • the present application also includes filling between the first metal-clad substrate and the second metal-clad substrate and plastic sealing the first metal-clad substrate and the second metal-clad substrate Molding compound.
  • the molding compound uses a low-modulus molding compound.
  • the molding compound can be formed by a material with an elastic modulus between 0.5GPa and 20GPa , such as epoxy molding compound, etc., which are not limited here.
  • the power module of the present application may further include a first heat sink located on the side of the first metal-clad substrate away from the second metal-clad substrate and a first heat sink located on the side of the second metal-clad substrate away from the first metal-clad substrate. Two heat sinks, so as to cool the module from both sides, and improve the power density and module reliability of the power module.
  • the first heat sink may be connected to the first metal-clad substrate by welding or sintering; and/or, the second heat sink may be connected to the second metal-clad substrate by welding or sintering connect.
  • first support member between the first heat sink and the first metal-clad substrate, and the first support member may be formed by a plurality of fourth support columns, metal wires or metal meshes; and/or, the second heat sink and There is a second supporting part between the second metal-clad substrate, and the second supporting part can be composed of a plurality of fifth supporting columns or wires, so that the first supporting part and the second supporting part can be used to control the thickness of the solder and ensure the reliability of welding .
  • the metal wire can be bonded and fixed on the bonding surface of the heat sink, or the heat dissipation surface of the power module, so as to prevent the metal wire from flowing with the liquid metal during reflow.
  • the embodiment of the present application also provides a power supply circuit, including a circuit board and the power module described in the first aspect or various implementation manners of the first aspect, the power module is electrically connected to the circuit board, and the circuit board is The power module provides the signal.
  • the embodiment of the present application also provides a chip.
  • the surface electrode of the chip includes a stress buffer metal layer and a soldering or sintered metal layer stacked in layers. Metal, using the softness of soft metal to release the stress of the joint.
  • the soft metal may include at least one of aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold and gold alloy, etc., which is not limited herein.
  • the stress-buffering metal layer when the material of the stress-buffering metal layer is a non-weldable metal, such as aluminum, aluminum alloy or magnesium alloy, the stress-buffering metal layer can be disposed under the welding or sintering metal layer.
  • the soldering or sintering metal layer may include: Ti/Ni/Ag, Ti/Ni/Au, Ti/NiV/Ag, Ti/NiV/Au, Ni(P)/Pd/Au, Ni(P)/ Pd/Ag, Ni(P)/Au or Ni(P)/Ag are not limited here.
  • FIG. 1 is a schematic structural diagram of a power module provided by an embodiment of the present application.
  • FIG. 2 is a schematic flowchart of a method for preparing a power module provided in an embodiment of the present application
  • Figure 3 is a schematic cross-sectional view of a sintered material filled with fillers provided in an embodiment of the present application
  • FIG. 4 is a schematic flowchart of another method for preparing a power module provided in the embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a preparation process of a power module provided by an embodiment of the present application.
  • FIG. 6 is a schematic flowchart of another method for preparing a power module provided in the embodiment of the present application.
  • Fig. 7 is a schematic structural diagram of the preparation process of another power module provided by the embodiment of the present application.
  • Fig. 8 is a schematic structural diagram of another power module provided by the embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a chip provided in an embodiment of the present application.
  • Fig. 10 is an ultrasonic scanning photogram of a sintered layer in an embodiment of the present application.
  • Fig. 11 is a schematic structural view of a support column arranged between two joined bodies welded by solder in the embodiment of the present application;
  • FIG. 12 is a schematic structural diagram of an interconnection column provided in an embodiment of the present application.
  • Fig. 13 is a schematic structural diagram of another power module provided by the embodiment of the present application.
  • Fig. 14 is a schematic structural diagram of the preparation process of another power module provided by the embodiment of the present application.
  • Fig. 15 is a schematic structural diagram of another power module provided by the embodiment of the present application.
  • Fig. 16 is a schematic structural diagram of another power module provided by the embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection. Connected, or integrally connected; it may be mechanically connected or electrically connected; it may be directly connected or indirectly connected through an intermediary, and it may be the internal communication of two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in this application in specific situations.
  • the power module is widely used in power supply circuits.
  • the power module is a semiconductor device that converts the voltage, current, cycle number, etc. of the power supply, and is the core device for the power conversion of the power supply circuit.
  • the power supply circuit can be used as the core device of the DC-to-AC conversion of the motor control unit (MCU) of the electric vehicle, as the battery of the electric vehicle outputs DC power, or converts DC power into AC power required for vehicle operation.
  • MCU motor control unit
  • the present application provides a power module with high heat dissipation performance, power density and reliability.
  • the power module provided by the present application will be described in detail below with reference to the drawings and specific implementation methods.
  • FIG. 1 is a schematic structural diagram of a power module provided by an embodiment of the present application.
  • the power module 1 includes: a first metal-clad substrate 10 and a second metal-clad substrate 20 oppositely arranged, a chip 11 and an interconnection column 12 located between the first metal-clad substrate 10 and the second metal-clad substrate 20
  • a sintering material 13 is also arranged between the chip 11 and the first metal-clad substrate 10, and the chip 11 and the first metal-clad substrate 10 are electrically connected by pressure sintering using the sintering material 13, and the sintering material 13 may include silver At least one of paste, copper paste or silver film;
  • the interconnection column 12 is located between the chip 11 and the second metal-clad substrate 20 , and the chip 11 is electrically connected to the second metal-clad substrate 20 through the interconnection column 12 .
  • the heat generated inside the power module can be discharged from the direction of the first metal-clad substrate 10 and the direction of the second metal-clad substrate 20, thereby improving the heat dissipation performance of the power module.
  • the stress of the sintered material is low, and the chip 11 is electrically connected to the first metal-clad substrate 10 through pressure sintering, which can improve the bonding reliability.
  • the sintering material 13 in this application has the advantages of low sintering temperature, high melting point and high thermal conductivity, so it can not only further improve the heat dissipation performance of the power module, but also improve the working environment temperature and service life of the power module, Therefore, the power density of the power module is improved.
  • FIG. 2 is a schematic flowchart of a method for manufacturing a power module provided in an embodiment of the present application.
  • the preparation method may include the following steps:
  • the first metal-clad substrate and the second metal-clad substrate may be copper-clad ceramic substrates (Direct Bond Copper, DBC), active metal brazed copper substrates (Active metal brazed copper, AMB, such as Al 2 O 3 - AMB, Si 3 N 4 -AMB, or AlN-AMB) or an insulated metal substrate (Insulated metal substrate, IMS), etc., are not limited herein.
  • DBC Direct Bond Copper
  • AMB active metal brazed copper substrates
  • AMB such as Al 2 O 3 - AMB, Si 3 N 4 -AMB, or AlN-AMB
  • IMS Insulated metal substrate
  • the first metal-clad substrate and the second metal-clad substrate may be formed of AlN-DBC, Si 3 N 4 -AMB or AlN-AMB with high thermal conductivity, which is not limited herein.
  • the sintered material may be formed of silver paste, copper paste or silver film.
  • the silver paste may include at least one of Micrometer silver particle paste (Micrometer silver particle paste) and Nanometer silver paste (Nanometer silver particle paste).
  • the micron silver paste refers to the silver paste made by using micron silver particles and organic solvents, which is low in cost and safe. Generally, it is sintered under pressure, the sintered material has high density, the interface of the joined body is firmly bonded, and the bonding reliability is high.
  • Nano-silver paste is a silver paste made of nano-silver particles and organic solvents. The cost is high, and there are operational safety risks of nanoparticles.
  • the sintered material of the present application can be formed by using Micrometer silver particle paste.
  • the modulus of elasticity, coefficient of thermal expansion (CTE), etc. of the sintered material can be adjusted by adding materials to the sintered material.
  • the sintered material includes a host material and a filler (Filler) filled in the host material; wherein the host material includes at least one of silver paste, copper paste or silver film, and the filler has good bonding properties with the host material
  • the thermal expansion coefficient of the filler is smaller than that of the host material, thereby improving the bonding reliability of sintering.
  • the filler can include nickel (Ni), Ni alloy, copper (Cu), nickel-plated copper, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar (Kovar, iron-nickel-cobalt alloy 4J29) and SiC powder, etc., are not limited here.
  • the application does not limit the shape of the filler.
  • the length L1 of the filler 131 can be controlled between 20 ⁇ m and 100 ⁇ m, and the dimension W1 of the filler 131 in the vertical length direction can be controlled between 20 nm and 30 ⁇ m.
  • the cross-section along the length direction can be circular, oval, polygonal, etc.
  • the metal layer covered on the surface of the first metal-clad substrate and the second metal-clad substrate is generally copper, and when the sintering material is silver paste or silver film, in order to improve For the bonding performance of the substrate, the first metal-clad substrate can be plated with silver at the sintered part, that is, the area corresponding to the sintered material of the first metal-clad substrate is covered with a silver-plated layer.
  • the thickness of the silver plating layer can be controlled between 0.1 ⁇ m ⁇ 30 ⁇ m.
  • silver plating may not be required.
  • the sintered material is copper paste
  • the first metal-clad substrate does not need to be plated with silver at the sintered part.
  • the chip can be mounted on the first metal-clad substrate through the following steps:
  • Step S1021a printing the sintering material on the first metal-clad substrate.
  • the sintered material 13 (copper paste or silver paste) can be printed on the first metal-clad substrate 10 using a stencil printing process or a screen printing process. on the corresponding sintering zone.
  • the stencil printing process has lower cost and is simpler to manufacture. Therefore, optionally, the present application adopts a stencil printing process to print copper paste or silver paste on the corresponding sintering area of the first metal-clad substrate.
  • the thickness of the printed copper paste or silver paste can be controlled between 30 ⁇ m and 160 ⁇ m, which can be specifically designed according to actual products, and is not limited here.
  • the area of the printed copper paste or silver paste can be set to be larger than the area of the corresponding sintering area on the chip, so as to absorb the alignment error between the chip and the sintering material.
  • the boundary of the copper paste or the silver paste may extend 20 ⁇ m to 300 ⁇ m outward from the target boundary (ideally, the boundary of the sintering area of the chip).
  • Step S1022a pre-drying the printed sintered material.
  • the purpose of pre-drying the printed copper paste or silver paste is to prevent the sintered material from collapsing during pressure sintering.
  • the sintering material 13 (copper paste or silver paste) printed on the first metal-clad substrate 10 can be printed at a temperature of 100° C. to 180° C. under N2 atmosphere. Perform pre-drying treatment for 5 minutes to 40 minutes.
  • Step S1023a mounting the chip on the sintered material of the first metal-clad substrate and pressing.
  • the chip 11 can be sucked up by vacuum adsorption first, and then the sintered material 13 (copper paste or silver paste) can be aligned through the image recognition system, and then the Chip 11 is fixed on dried sintering material 13 (copper paste or silver paste) and pressed.
  • the chip mounting conditions may be: the temperature is controlled at 100° C. to 180° C., the pressure is controlled at 0.1 MPa to 10 MPa, and the time is controlled at 10 ms to 999 ms. That is, a pressure of 0.1 MPa to 10 MPa is applied to the chip 11 mounted on the first metal-clad substrate 10 for at least 10 ms in an environment with a temperature of 100° C. to 180° C.
  • the chip can be mounted on the first metal-clad substrate through the following steps:
  • Step S1021b adhering a sintering material on the side of the chip facing the first metal-clad substrate.
  • the chip 11 can be adsorbed by a metal suction nozzle, and the temperature of the metal suction nozzle is 80°C-200°C. Then press the chip 11 on a large piece of silver film, apply a pressure of 0.1MPa-5MPa, and pressurize for 1ms-10000ms. In this way, the sintering material 13 (silver film) under the chip is compressed and semi-sintered, adhering to the chip 11 .
  • Step S1022b attaching the chip adhered with the sintering material on the first metal-clad substrate and pressing.
  • the chip 11 can be sucked up by vacuum adsorption first, and then the first metal-clad substrate 10 can be aligned through the image recognition system, and then the adhered A chip 11 of sintered material 13 (silver film) is fixed on the first metal-clad substrate 10 and pressed.
  • the chip mounting conditions may be: the temperature is controlled at 100° C. to 180° C., the pressure is controlled at 0.1 MPa to 10 MPa, and the time is controlled at 10 ms to 999 ms. That is, a pressure of 0.1 MPa to 10 MPa is applied to the chip mounted on the first metal-clad substrate for at least 10 ms in an environment with a temperature of 100° C. to 180° C.
  • Step S103 is executed after the chip mounting is completed.
  • Step S103 performing pressure sintering on the chip mounted on the first metal-clad substrate.
  • Press sintering refers to applying pressure to the bonded body at high temperature, thereby increasing the density of the sintered body, promoting the atomic diffusion between the sintered material particles and the interface between the sintered material and the bonded body, and enhancing the bonding strength and joint reliability. sex.
  • the present application does not limit the pressure sintering process adopted, and may be any known method.
  • the head area is 50mm*50mm as an example, the parallelism of the pressure head can be set to ⁇ 5 ⁇ m to reduce the warping of the product after sintering.
  • the sintering conditions for the pressure sintering are as follows: the sintering temperature is controlled at 200°C-300°C, the applied pressure is controlled at 5MPa-30MPa, and the sintering time is controlled at 1min-10min.
  • the pressure sintering process can be carried out in an air environment.
  • the chip mounted on the first metal-clad substrate is subjected to pressure sintering in a protective atmosphere or a vacuum environment.
  • the protective atmosphere can be a reducing atmosphere or an inert atmosphere.
  • the protective atmosphere may be N2, a mixed gas of N2 and H2, Ar or He, etc., which is not limited herein.
  • the thickness of the stress relief film may be set to 50 ⁇ m ⁇ 90 ⁇ m, which is not limited herein.
  • an organic film such as a Teflon film may be used as the stress relief film, which is not limited herein.
  • the sintered first metal-clad substrate 10 and the chip 11 are pressed under pressure. cool down.
  • the cooling process is also carried out in a protective atmosphere or a vacuum environment.
  • the cooling conditions may be: the applied pressure is controlled at 5 MPa-20 MPa, and the cooling time is controlled at 1 min-10 min.
  • water cooling or forced nitrogen cooling may be used, which is not limited herein.
  • the first metal-clad substrate mounted with the chip may also be cleaned to remove residual organic matter.
  • Plasma treatment Pulsma treatment
  • organic solvent cleaning process is used to remove residual organic matter on the first metal-clad substrate, etc., to increase the interface bonding of subsequent molding compounds, prevent delamination of molding compounds, and further improve the reliability of power modules.
  • plasma treatment refers to the bombardment effect of plasma particles on the surface of objects and the reaction of plasma ions and organic substances in plasma to achieve cleaning treatment on the surface of objects.
  • Step S104 connecting the side of the chip away from the first metal-clad substrate to the second metal-clad substrate by using interconnection columns.
  • the interconnection column may be formed of metal, alloy or composite material, and is used to connect the side of the chip away from the first metal-clad substrate to the second metal-clad substrate.
  • the material of the interconnection column can be Cu, Ni, Mo, W, tungsten alloy, Cu-Mo alloy, AlSiC and nickel alloy, etc., or it can also be Mo plated with Ni, Ni(P) or Cu, W plated with Ni , Ni(P) or Cu, Cu-Mo alloys are plated with Ni, Ni(P) or Cu, AlSiC composites are plated with Ni, Ni(P) or Cu after surface sensitization treatment. Of course, it is also possible to continue plating Ag or Au on the surface of Ni, Ni(P) or Cu.
  • Ni(P) refers to the Ni plating layer containing phosphorus (P) produced by an electroless plating process. During electroless plating, P and Ni are simultaneously precipitated from the solution and deposited on the substrate, and P is an inevitable accompanying substance.
  • the chip 11 may be an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) and a fast recovery diode (Fast Recovery Diode, FRD). Both the IGBT chip 11 and the FRD chip 11 are electrically connected to the first metal-clad substrate 10 through the sintering material 13 .
  • IGBT Insulated Gate Bipolar Transistor
  • FRD Fast recovery Diode
  • the gate of the IGBT chip 11 may be electrically connected to the first metal-clad substrate 10 through the Al wire 104 .
  • both the side of the chip facing the first metal-clad substrate and the side of the chip away from the first metal-clad substrate have surface electrodes, and the surface electrodes include welding or sintering metal layers for welding or welding with other electrical devices. sintering.
  • the soldering or sintering metal layer may include: Ti/Ni/Ag, Ti/Ni/Au, Ti/NiV/Ag, Ti/NiV/Au, Ni(P)/Pd/Au, Ni(P)/ Pd/Ag, Ni(P)/Au or Ni(P)/Ag, etc.
  • NiV refers to an alloy of Ni and V.
  • the NiV target material is used in the fabrication of the electrode on the surface of the chip, and the coating is produced by the sputtering process.
  • a stress buffer metal layer can be added to the surface electrode, and the material of the stress buffer metal layer can be a soft material with a hardness less than HV60.
  • Metals such as aluminum, aluminum alloys, copper, magnesium alloys, zinc, zinc alloys, silver, silver alloys, gold or gold alloys, etc. Utilize the flexibility characteristics of soft metal to release the stress of the joint.
  • the stress-buffering metal layer when the material of the stress-buffering metal layer is a non-weldable metal, such as aluminum, aluminum alloy or magnesium alloy, the stress-buffering metal layer can be disposed under the welding or sintering metal layer.
  • the stress buffering metal layer may be provided only in the surface electrode of the chip facing the first metal-clad substrate, or the stress buffering metal layer may be provided only in the surface electrode of the chip facing the interconnection column, or in the Stress buffer metal layers are provided in the surface electrodes on both sides of the chip, which is not limited here.
  • a stress-buffering metal layer 1111 is disposed in the surface electrode 111 on one side of the metal-clad substrate, and the stress-buffering metal layer 1111 is located on the side of the welding or sintered metal layer 1112 away from the first metal-clad substrate, that is, the stress-buffering metal layer 1111 is located on the welding side. Or between the sintered metal layer 1112 and the semiconductor body 110 .
  • the surface electrode 111 of the chip 11 facing the side of the interconnection column is provided with a stress buffer metal layer 1111, and the stress buffer metal layer 1111 is located on the side of the welding or sintered metal layer 1112 away from the interconnection column, that is, the stress buffer metal layer 1111 is located on the side of the welding column. Or between the sintered metal layer 1112 and the semiconductor body 110 .
  • FIG. 9 illustrates an example in which stress-buffering metal layers 1111 are disposed in the surface electrodes 111 on both sides of the chip 11 .
  • a layer of Al film or Al alloy layer can be formed by physical vapor deposition (Physical Vapor Deposition, PVD) method or other methods. Because a protective oxide film is easily formed on the surface of Al, there is no solderability.
  • PVD Physical Vapor Deposition
  • a weldable metal and a wettable metal on the surface can be electrolessly plated on the stress buffer metal layer to form a weld or sinter metal layer.
  • a method such as plasma PVD may be performed on the surface to form a soldered or sintered metal layer.
  • a layer of Al film can be formed by PVD method or other methods first, then, through zincate (Zyere) treatment, replace the aluminum oxide film with Zn, and then Electroless Ni(P) replaces Zn, and electroless gold (Au) or silver (Ag) can also be plated on the Ni(P) layer.
  • the surface electrode includes a stress buffer metal layer Al and a welded or sintered metal layer Ni(P)/Au or Ni(P)/Ag.
  • the phosphorus content in Ni(P) is generally 5wt.% ⁇ 12wt.%.
  • Ti/Ni/Ag can also be formed by PVD after forming a layer of Al film, that is, the surface electrode includes a stress-buffering metal layer Al and a welding or sintering metal layer Ti/Ni/Ag.
  • the surface electrode it is also possible not to form a stress buffer metal layer, but to directly form a welding or sintered metal layer by PVD method, such as Ti/Ni/Ag, Ti/Ni/Au, Ti/NiV/Ag, Ti /NiV/Au, Ni(P)/Pd/Au, Ni(P)/Pd/Ag, etc.
  • PVD method such as Ti/Ni/Ag, Ti/Ni/Au, Ti/NiV/Ag, Ti /NiV/Au, Ni(P)/Pd/Au, Ni(P)/Pd/Ag, etc.
  • the thickness of the surface electrode of the chip is not limited, and it is set according to the actual product.
  • the thickness of the surface electrode can be controlled between 2 ⁇ m ⁇ 10 ⁇ m.
  • a chip with a stress-buffering metal layer is sintered on a metal-clad ceramic substrate with a micron silver paste filled with fillers, and after 1000 times of warm shock (-40°C to 125°C) in a harsh state without plastic encapsulation
  • the ultrasonic (SAT) scanning photo of the sintered layer is shown in Figure 10, and it can be seen from Figure 10 that the sintered layer does not peel off. It can be seen from this that combining the chip with the stress-buffering metal layer with the silver paste sintering that reduces the elastic modulus and thermal expansion coefficient can achieve high-reliability bonding.
  • the chip can be connected to the interconnection column 12 through the first solder 14, and the interconnection column 12 can be connected to the interconnection column 12 through the second solder 15 is connected to the second metal-clad substrate 20 .
  • the first solder can be used to connect the interconnection column on the side of the chip away from the first metal-clad substrate by welding; the second solder can be used to connect the interconnection column to the second metal-clad substrate on the side away from the chip by welding .
  • the first solder and the second solder can be formed by using solder paste or solder sheet.
  • the first solder can be high-temperature solder, such as high-lead solder, Au-based solder, etc.
  • the second solder can be medium-temperature solder, such as SAC305, Sn-Sb solder, etc.
  • the thickness of the solder has an important impact on the reliability of the solder joint.
  • the two joints 01 and 02 (through the solder Two objects to be welded, such as a chip and an interconnection column, an interconnection column and a second metal-clad substrate) are provided with a support column 03, so that the support column 03 is used to control the flow of the solder 04 between the two bonded bodies 01 and 02 Thickness and thickness uniformity.
  • the support column 03 may be formed on any one of the two joined bodies 01 and 02 .
  • the at least one first support column 16 may also be formed on the side of the chip 11 facing the interconnection column 12 , that is, formed on the chip 11 .
  • At least one second support column 17 is provided between the interconnection column 12 and the second metal-clad substrate 20, and the at least one second support column 17 can be formed on the interconnection column.
  • the column 12 faces the side of the second metal-clad substrate 20, that is, it is formed on the interconnection column 12; the at least one second support column 17 can also be formed on the side of the second metal-clad substrate 20 facing the interconnection column 12, that is, it is formed on the interconnection column 12. on the second metal-clad substrate 20 .
  • the present application does not limit the number of the first supporting pillars and the second supporting pillars, which is determined according to the area of the welding area, the larger the area of the welding area, the more the number of supporting pillars.
  • the size of the support column can be set to a micron size, which is mainly used to support the objects to be joined on both sides of the support column, so as to control the thickness of the solder and ensure the uniformity of the thickness of the solder.
  • the material of the first support column and the second support column is a conductive material.
  • the first support column and the second support column can use Al, Al alloy, Au, Au alloy, Cu, Cu alloy, Ni, Ni alloy, copper coated with aluminum, Cu-Sn refractory alloy, or high temperature Solder is just at least one form.
  • the height of the supporting pillars is determined according to the target thickness of the solder.
  • the thickness of the supporting pillars can be controlled between 0.02 mm and 10 mm.
  • ultrasonic technology can be used to implant micron-sized supporting pillars on the bonded body, and the small-sized supporting pillars have no influence on the soldering process and reliability of the solder.
  • the implanted support column can be spherical or cylindrical at the beginning, and then the implanted support column is flattened to realize the adjustable and controllable height of the implanted support column. In this way, the thickness and warpage of the solder can be controlled during the soldering process.
  • ultrasonic technology is used to implant micron-sized metal balls on the side of the interconnection pillar 12 facing the chip.
  • the ball is leveled to form the first support column 16, and then the side of the interconnection column 12 planted with the first support column 16 is placed in the jig downward, so that the planted first support column 16 enters the jig in the hollow.
  • the same method is used to implant metal balls on the side of the interconnection column 12 facing the second metal-clad substrate, and planarize the implanted metal balls to form the second support column 17, so that the interconnection column Support columns are arranged at symmetrical positions on both sides of 12, which is convenient for recognition and grasping during automatic placement.
  • the flattening treatment of the metal ball can make the height of the implanted metal ball consistent by pressing and flattening the metal ball, and make the height meet the designed solder thickness requirement, so that the thickness of the solder can be controlled to be uniform.
  • electronic components 101 located on the side of the first metal-clad substrate 10 facing the second metal-clad substrate 20 may also be included.
  • the component 101 is connected to the first metal-clad substrate 10 through the third solder 102 .
  • the third solder may be a high-temperature solder, such as high-lead solder, Au-based solder, and the like.
  • the electronic components in this application include any electronic components soldered on the first metal-clad substrate 10 by soldering, such as signal terminals in FIG. 13 , power terminals in FIG. 13 , Thermistor etc.
  • At least one third support column 103 may be formed on the side of the electronic component 101 facing the first metal-clad substrate 10 , or may be formed on the side of the first metal-clad substrate 10 facing the electronic component 101 , which is not limited herein.
  • the implementation of the third support column may refer to the implementation of the above-mentioned first support column and the second support column, which will not be repeated here.
  • the first solder, the second solder and the third solder may be formed by using solder paste or solder sheet, which is not limited here.
  • all the solders in this application can be made of the same material, for example, the first solder, the second solder and the third solder are formed with the same solder, so that the welding of the chip and the interconnection column, and the welding of the interconnection column and the second metal-clad substrate And the soldering of the electronic components and the first metal-clad substrate can be completed by one-time reflow soldering, so that the process steps can be simplified and the cost can be saved.
  • solders may also be used for the first solder, the second solder and the third solder, which is not limited here.
  • the first solder and the third solder can be high-temperature solders, such as high-lead solder, Au-based solder, etc.
  • the second solder can be medium-temperature solder, such as SAC305, Sn-Sb solder, etc.
  • the gate of the IGBT chip 11 and the first metal-clad substrate 10 pass through Al wires 104 are bonded.
  • a first support column 16 and a second support column 17 are formed on both sides of the interconnection column 12 .
  • the third support pillars 103 are implanted on the surface of the first metal-clad substrate 10 by ultrasonic technology.
  • the first solder 14 is formed between the chip 11 and the interconnection column 12
  • the second solder 15 is formed between the interconnection column 12 and the second metal-clad substrate 20
  • the electronic components 101 power terminals and signal terminals
  • a third solder 102 is formed between the first metal-clad substrates 10, wherein the solder can be a solder sheet or a solder paste, the solder sheet can be formed by mounting, and the solder paste can be formed by a printing process, wherein the solder sheet or solder paste can be High-temperature solder, such as high-lead solder, Au-based solder, etc.
  • the chip 11 and the interconnection column 12 , the interconnection column 12 and the second metal-clad substrate 20 , and the electronic components 101 (power terminals and signal terminals) and the first metal-clad substrate 10 are welded together.
  • the various parts of the power module are joined together. Since the supporting pillars are implanted in the solder of each bonded body, the thickness and warpage of the solder can be controlled.
  • Plastic sealing is required after the internal interconnection of the power module is completed.
  • FIG. The metal-clad substrate 10 and the second metal-clad substrate 20 .
  • the molding compound uses a low-modulus molding compound.
  • the molding compound can be formed by a material with an elastic modulus between 0.5GPa and 20GPa , such as epoxy molding compound, etc., which are not limited here.
  • the upper and lower surfaces of the power module can be ground to make the two sides of the power module parallel.
  • grinding can also be omitted as required.
  • the bare terminals (such as signal terminals and power terminals) may be tin-plated to prevent oxidation of the terminals and increase the solderability of the terminals.
  • the power module of the present application may also include a first heat sink 50 located on the side of the first metal-clad substrate 10 away from the second metal-clad substrate 20 and a heat sink 50 located on the side away from the second metal-clad substrate 20 .
  • the second radiator 60 on one side of the first metal-clad substrate 10 can cool the module from both sides, thereby improving the power density and reliability of the power module.
  • the first radiator and the second radiator may be water-cooled radiators, which are not limited herein.
  • the first metal-clad substrate and the first radiator may be bonded through thermally conductive silicone grease
  • the second metal-clad substrate and the second heat sink may be bonded through thermally conductive silicone grease
  • the first heat sink may be connected to the first metal-clad substrate by welding or sintering; and/or, the second heat sink may be connected to the second metal-clad substrate by welding or sintering connect.
  • the first heat sink may be connected to the first metal-clad substrate by welding; the second heat sink may be connected to the second metal-clad substrate by welding.
  • first support member between the first heat sink 50 and the first metal-clad substrate 10
  • first support member may be formed by a plurality of fourth support columns 51 or metal wires
  • second support member between the second heat sink 60 and the second metal-clad substrate 20
  • the second support member may be formed by a plurality of fifth support columns 61 or metal wires, thereby utilizing the first support member and the second support
  • the component controls the thickness of the solder to ensure the reliability of the soldering.
  • the metal wire can be bonded and fixed on the bonding surface of the heat sink, or the heat dissipation surface of the power module, so as to prevent the metal wire from flowing with the liquid metal during reflow.
  • the fourth support columns may be formed on the first heat sink or on the first metal-clad substrate, which is not limited herein.
  • the implementation of the fourth support column may refer to the implementation of the above-mentioned first support column and the second support column, which will not be repeated here.
  • the fifth support columns may be formed on the second heat sink or on the second metal-clad substrate, which is not limited herein.
  • the implementation of the fifth support column can refer to the implementation of the above-mentioned first support column and the second support column, which will not be repeated here.
  • the embodiment of the present application also provides a power supply circuit, including a circuit board and any one of the above-mentioned power modules provided in the embodiments of the present application, the power module is electrically connected to the circuit board, and the circuit board provides signals for the power module. Since the problem-solving principle of the power supply circuit is similar to that of the aforementioned power module, the implementation of the power supply circuit can refer to the implementation of the aforementioned power module, and repeated descriptions will not be repeated here.
  • the embodiment of the present application also provides a chip.
  • the surface electrode 111 of the chip 11 includes a stacked stress buffer metal layer 1111 and a soldered or sintered metal layer 1112, wherein the stress buffer metal layer 1111
  • the material can be soft metal with a hardness less than HV60, and the stress of the joint can be released by using the softness of the soft metal.
  • the soft metal may include at least one of aluminum, aluminum alloy, copper, magnesium alloy, zinc, zinc alloy, silver, silver alloy, gold and gold alloy, etc., which is not limited herein.
  • the stress-buffering metal layer when the material of the stress-buffering metal layer is a non-weldable metal, such as aluminum, aluminum alloy or magnesium alloy, the stress-buffering metal layer can be disposed under the welding or sintering metal layer.
  • the soldering or sintering metal layer may include: Ti/Ni/Ag, Ti/Ni/Au, Ti/NiV/Ag, Ti/NiV/Au, Ni(P)/Pd/Au, Ni(P)/ Pd/Ag is not limited here.

Abstract

本申请公开了一种功率模块、电源电路及芯片，该功率模块包括相对设置的第一覆金属层基板和第二覆金属层基板、位于第一覆金属层基板和第二覆金属层基板之间的芯片和互联柱；芯片和第一覆金属层基板采用烧结材料通过有压烧结实现电连接，可以提高接合可靠性，芯片通过互联柱与第二覆金属层基板电连接。由于芯片两侧均设置有基板，从而功率模块内部产生的热量可以从两基板方向排出，提升功率模块的散热性能。另外，由银膏、铜膏或银膜形成的烧结材料具有烧结温度低、熔点高和热导电率高的优点，因此可以进一步提高功率模块的散热性能，从而提高功率模块的功率密度。

Description

一种功率模块、电源电路及芯片
相关申请的交叉引用
本申请要求在2021年08月09日提交中国专利局、申请号为202110908858.8、申请名称为“一种功率模块、电源电路及芯片”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及半导体封装技术领域，尤其涉及一种功率模块、电源电路及芯片。
背景技术
随着电力电子技术的发展，功率模块已经吸引了越来越多的关注。与此同时，出于节能和低成本的需求也迫切的要求功率模块更加轻型化和小型化。但是，这种需求给功率模块的发展带来了巨大的挑战，因为轻型化和小型化会导致模块电流密度的增加，这会导致模块内部会产生较高的热量，从而引起结温的升高。如果产生的热量不能及时排出，较高的结温会影响功率模块整体的热机械性能和可靠性。
发明内容
本申请提供一种功率模块、电源电路及芯片，用于上提供一种具有较高的散热性能、功率密度和可靠性的功率模块。
第一方面，本申请提供的一种功率模块，包括相对设置的第一覆金属层基板和第二覆金属层基板，位于第一覆金属层基板和第二覆金属层基板之间的芯片和互联柱；其中，芯片与第一覆金属层基板之间还设置有烧结材料，芯片和第一覆金属层基板采用烧结材料通过有压烧结实现电连接，烧结材料可以包括银膏、铜膏或银膜中的至少一种；互联柱位于芯片与第二覆金属层基板之间，该芯片通过互联柱与第二覆金属层基板电连接。由于芯片两侧均设置有基板，从而功率模块内部产生的热量可以从第一覆金属层基板方向和第二覆金属层基板方向排出，提升功率模块的散热性能。并且，烧结材料应力低，通过有压烧结方式使芯片与第一覆金属层基板电连接，可以提高接合可靠性。另外，本申请中的烧结材料具有烧结温度低、熔点高和热导电率高的优点，因此，不仅可以进一步提高功率模块的散热性能，而且可以提高该功率模块的工作环境温度及使用寿命，从而提高功率模块的功率密度。
在具体实施时，第一覆金属层基板和第二覆金属层基板可以为覆铜陶瓷基板(Direct Bond Copper，DBC)、活性金属焊接基板(Active metal brazed copper，AMB，例如Al 2O 3-AMB、Si 3N 4-AMB或AlN-AMB)或绝缘金属基板(Insulated metal substrate，IMS)等，在此不作限定。
示例性的，为了进一步提高功率密度，第一覆金属层基板和第二覆金属层基板可以采用高导热性的AlN-DBC、Si 3N 4-AMB或AlN-AMB形成，在此不作限定。
示例性的，烧结材料可以由银膏、铜膏或银膜形成。
在具体实施时，银膏可以包括微米银膏(Micrometer silver particle paste)和纳米银膏(Nanometer silver particle paste)中至少一种。其中，微米银膏是指使用微米银粒子和有机溶剂制作的银膏，成本低，安全。一般在加压下烧结，烧结材料致密性高，被接合体界面接合牢固，接合可靠性高。纳米银膏是纳米银粒子和有机溶剂制作的银膏，成本高，有纳米粒子的作业安全风险。
可选的，为了提高烧结接合的可靠性以及降低成本，本申请的烧结材料可以采用微米银膏(Micrometer silver particle paste)形成。
为了进一步提高烧结接合的可靠性，可以通过在烧结材料中增加材料来调节烧结材料的弹性模量，热膨胀系数(CTE)等。示例性的，该烧结材料包括主体材料和填充在主体材料中的填料(Filler)；其中主体材料包括银膏、铜膏或银膜中的至少一种，该填料由与主体材料接合性好的材料形成，且该填料的热膨胀系数小于主体材料的热膨胀系数，从而提高烧结的接合可靠性。
以主体材料为微米银膏为例，在微米银膏中加入填料来降低微米银膏的热膨胀系数，降低接合应力，从而提高银烧接的接合可靠性。示例性的，填料可以包括镍(Ni)、Ni合金、铜(Cu)、铜镀镍、钛(Ti)、Ti合金、铁(Fe)、Fe合金、可伐合金(Kovar，铁镍钴合金4J29)和SiC粉末等中的至少一种，在此不作限定。
在本申请中，第一覆金属层基板和第二覆金属层基板的表面所覆的金属层一般为铜，当烧结材料为银膏或银膜时，为了提高烧结材料与第一覆金属层基板的接合性能，第一覆金属层基板在烧结处可以镀银，即第一覆金属层基板在与烧结材料对应的区域覆盖有镀银层。示例性的，镀银层的厚度可以控制在0.1μm～30μm之间。当然，如果烧结材料自身与第一覆金属层基板的接合性能比较好时，也可以不用镀银，例如当烧结材料为铜膏时，第一覆金属层基板在烧结处不需要镀银。
示例性的，有压烧结可以包括以下步骤：步骤(1)、当烧结材料为铜膏或银膏时，可以采用钢网印刷工艺或丝网印刷工艺将铜膏或银膏印刷在第一覆金属层基板对应的烧结区上。然后可以在N2氛围下，采用100℃～180℃的温度对印刷在第一覆金属层基板上的铜膏或银膏进行预干燥处理5min～40min。之后通过真空吸附，将芯片固定在干燥后的铜膏或银膏上，在温度为100℃～180℃的环境下对贴装在第一覆金属层基板上的芯片上施加0.1MPa～10MPa压力至少10ms。当烧结材料为银膜时，可以通过金属吸嘴吸附芯片，金属吸嘴的温度为80℃～200℃。然后将芯片压在一大块银膜上，施加0.1MPa～5MPa压力，加压时间1ms～10000ms。这样，芯片下方的银膜被压缩和半烧结，粘附在芯片上。再通过真空吸附，将粘附有银膜的芯片固定在第一覆金属层基板上，在温度为100℃～180℃的环境下对贴装在第一覆金属层基板上的芯片上施加0.1MPa～10MPa压力至少10ms。步骤(2)、可以采用加压头对贴装在第一覆金属层基板上的芯片进行有压烧结，以加压头面积为50mm*50mm为例，加压头的平行度可以设置为≤5μm，从而可以减轻烧结后的产品翘曲。示例性的，进行有压烧结的烧结条件可以为：烧结温度控制在200℃～300℃，施加的压力控制在5MPa～30MPa，烧结时间控制在1min～10min。为防止烧结过程加压头对芯片的损伤，对贴装在第一覆金属层基板上的芯片进行有压烧结时，还可以在芯片与加压头之间放置可移除的应力缓和膜。从而在进行有压烧结时，应力缓和膜可以避免加压头与芯片进行直接接触以及降低加压头对芯片应力集中造成的损伤。当有压烧结完成后，可以将应力缓和膜移除。示例性的，应力缓和膜可以采用特氟龙膜等有机膜，在此不作限定。
进一步地，为了控制烧结后产品的翘曲度，可以对烧结完成的第一覆金属层基板与芯片在加压状态下进行冷却。示例性的，冷却条件可以为：施加的压力控制在5MPa～20MPa，冷却时间控制在1min～10min。
可选的，在对贴装在第一覆金属层基板上的芯片进行有压烧结之后，还可以对贴装有芯片的第一覆金属层基板进行清洁处理，以去除残留的有机物。例如采用等离子体处理(Plasma treatment)工艺或有机溶剂清洗工艺去除第一覆金属层基板等处残留的有机物，增加后续塑封料的界面接合性，防止塑封料分层，进一步提高功率模块的可靠性。
可选的，为了释放芯片在焊接或烧结时芯片上产生的应力，以提高功率模块的可靠性，所述芯片面向所述第一覆金属层基板一侧以及所述芯片远离所述第一覆金属层基板一侧均具有表面电极，所述表面电极包括焊接或烧结金属层；位于所述芯片面向所述第一覆金属层基板一侧的所述表面电极还包括位于所述焊接或烧结金属层远离所述第一覆金属层基板一侧的应力缓冲金属层；和/或，位于所述芯片远离所述第一覆金属层基板一侧的所述表面电极还包括位于所述焊接或烧结金属层面向所述第一覆金属层基板一侧的应力缓冲金属层。
示例性的，应力缓冲金属层的材料可以采用硬度小于HV60的软质金属，例如铝、铝合金、铜、镁合金、锌、锌合金、银、银合金、金或金合金等。利用软质金属的柔软性特点进行结合部应力释放。
在具体实施时，当应力缓冲金属层的材料为不具有焊接性的金属时，例如铝、铝合金或镁合金时，应力缓冲金属层可以设置在焊接或烧结金属层的下方。
示例性的，焊接或烧结金属层可以包括：Ti/Ni/Ag、Ti/Ni/Au、Ti/NiV/Ag、Ti/NiV/Au、Ni(P)/Pd/Au、Ni(P)/Pd/Ag、Ni(P)/Au或Ni(P)/Ag等。
在具体实施时，可以采用第一焊料通过焊接方式在芯片远离第一覆金属层基板一侧连接互联柱；采用第二焊料通过焊接方式使互联柱远离芯片一侧与第二覆金属层基板连接。
在具体实施时，焊料的厚度对焊料接合可靠性等有重要影响，为了保证焊料厚度的可控以及厚度的均一性，互联柱与芯片之间设置有至少一个第一支撑柱，该至少一个第一支撑柱可以形成于互联柱面向芯片一侧，即形成在互联柱上；该至少一个第一支撑柱也可以形成于芯片面向互联柱一侧，即形成在芯片上。和/或，互联柱与第二覆金属层基板之间设置有至少一个第二支撑柱，该至少一个第二支撑柱可以形成于互联柱面向第二覆金属层基板一侧，即形成在互联柱上；该至少一个第二支撑柱也可以形成于第二覆金属层基板面向互联柱一侧，即形成在第二覆金属层基板上。
在本申请的功率模块中，除了芯片和互联柱，还可包括位于第一覆金属层基板面向第二覆金属层基板一侧的电子元器件，电子元器件通过第三焊料与第一覆金属层基板连接。
本申请中，第一焊料、第二焊料以及第三焊料可以采用焊膏或焊片形成，在此不作限定。
可选地，本申请中所有焊料可以材料相同，例如，第一焊料、第二焊料以及第三焊料采用相同焊料形成，这样芯片与互联柱的焊接、互联柱与第二覆金属层基板的焊接以及电子元器件与第一覆金属层基板的焊接就可以通过一次回流焊接完成，从而可以简化工艺步骤，节约成本。
当然，在具体实施时，第一焊料、第二焊料以及第三焊料也可以采用不同的焊料，在此不作限定。示例性的，第一焊料和第三焊料可以采用高温焊料，例如高铅焊料，Au基焊 料等，第二焊料可以采用中温焊料，例如SAC305，Sn-Sb焊料等。
示例性的，本申请中的电子元器件包括通过焊料焊接在第一覆金属层基板上任意电子元器件，例如信号端子，功率端子，热敏电阻等。
为了提升电子元器件与第一覆金属层基板的接合可靠性，在电子元器件与第一覆金属层基板之间还设置有至少一个第三支撑柱，该至少一个第三支撑柱可以形成于电子元器件面向第一覆金属层基板一侧，也可以形成于第一覆金属层基板面向电子元器件一侧，在此不作限定。
可选地，支撑柱的材料为导电材料。示例性的，支撑柱可以采用Al、Al合金、Au、Au合金、Cu、Cu合金、Ni、Ni合金、包覆铝的铜、Cu-Sn高熔点合金、或高温焊料中的只是至少一种形成。
进一步地，本申请中还包括填充于所述第一覆金属层基板与所述第二覆金属层基板之间、且塑封所述第一覆金属层基板与所述第二覆金属层基板的塑封料。为了防止塑封料与塑封界面的分层，以提高功率模块的可靠性，塑封料使用低模量的塑封料，示例性的，塑封料可以采用弹性模量在0.5GPa～20GPa之间的材料形成，例如环氧塑封料等，在此不作限定。
本申请的功率模块中，还可以包括位于第一覆金属层基板远离第二覆金属层基板一侧的第一散热器以及位于第二覆金属层基板远离第一覆金属层基板一侧的第二散热器，从而从两面进行模块的冷却，提高功率模块的功率密度和模块可靠性。
可选地，为了提高散热效果，第一散热器可以通过焊接方式或烧结方式与第一覆金属层基板连接；和/或，第二散热器通过焊接方式或烧结方式与第二覆金属层基板连接。
进一步，第一散热器与第一覆金属层基板之间具有第一支撑部件，第一支撑部件可以由多个第四支撑柱、金属丝或金属网形成；和/或，第二散热器与第二覆金属层基板之间具有第二支撑部件，第二支撑部件可以由多个第五支撑柱或金属丝，从而利用第一支撑部件和第二支撑部件控制焊料厚度，保证焊接的可靠性。
在具体实施时，可以将金属丝键合固定在散热器的结合面上，或者功率模块的散热面上，以防止回流时金属丝随液态金属的流动。
第二方面，本申请实施例还提供了一种电源电路，包括电路板和如第一方面或第一方面的各种实施方式所述的功率模块，功率模块与电路板电连接，电路板为功率模块提供信号。
上述第二方面可以达到的技术效果可以参照上述第一方面中任一可能设计可以达到的技术效果说明，这里不再重复赘述。
第三方面，本申请实施例还提供了一种芯片，芯片的表面电极包括叠层设置的应力缓冲金属层和焊接或烧结金属层，其中，应力缓冲金属层的材料可以采用硬度小于HV60的软质金属，利用软质金属的柔软性特点释放结合部应力。
示例性的，软质金属可以包括铝、铝合金、铜、镁合金、锌、锌合金、银、银合金、金和金合金等中的至少一种，在此不作限定。
在具体实施时，当应力缓冲金属层的材料为不具有焊接性的金属时，例如铝、铝合金或镁合金时，应力缓冲金属层可以设置在焊接或烧结金属层的下方。
示例性的，焊接或烧结金属层可以包括：Ti/Ni/Ag、Ti/Ni/Au、Ti/NiV/Ag、Ti/NiV/Au、Ni(P)/Pd/Au、Ni(P)/Pd/Ag、Ni(P)/Au或Ni(P)/Ag，在此不作限定。
附图说明
图1为本申请实施例提供的一种功率模块的结构示意图；
图2为本申请实施例提供的一种功率模块的制备方法的流程示意图；
图3为本申请实施例提供的填充有填料的烧结材料的截面示意图；
图4为本申请实施例提供的又一种功率模块的制备方法的流程示意图；
图5为本申请实施例提供一种功率模块的制备过程的结构示意图；
图6为本申请实施例提供的又一种功率模块的制备方法的流程示意图；
图7为本申请实施例提供的另一种功率模块的制备过程的结构示意图；
图8为本申请实施例提供的又一种功率模块的结构示意图；
图9为本申请实施例提供的芯片的结构示意图；
图10为本申请一种实施例中烧结层的超声波扫描照片图；
图11为本申请实施例中通过焊料焊接的两个被接合体之间设置有支撑柱的结构示意图；
图12为本申请实施例提供的互联柱的结构示意图；
图13为本申请实施例提供的又一种功率模块的结构示意图；
图14为本申请实施例提供的又一种功率模块的制备过程的结构示意图；
图15为本申请实施例提供的又一种功率模块的结构示意图；
图16为本申请实施例提供的又一种功率模块的结构示意图。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地详细描述。
应注意的是，在本说明书中，相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步定义和解释。
在本申请的描述中，需要说明的是，术语“中”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。本申请中所描述的表达位置与方向的词，均是以附图为例进行的说明，但根据需要也可以做出改变，所做改变均包含在本发明保护范围内。本申请的附图仅用于示意相对位置关系不代表真实比例。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
为了方便理解本申请实施例提供的功率模块，首先说明一下其应用场景，该功率模块被广泛用于电源电路中。其中，功率模块是将电源的电压，电流，周波数等进行变换的半导体装置，是电源电路进行电力变换的核心装置。例如，该电源电路可以作为电动车的马 达控制部分(MCU)的直流变换交流的核心装置，作为电动车辆的电池输出直流电，或者将直流电变换为车辆运行所需要的交流电等。
出于节能和低成本的需求，迫切的要求功率模块更加轻型化和小型化。但是，这种需求给功率模块的发展带来了巨大的挑战，因为轻型化和小型化会导致模块电流密度的增加，从而导致模块内部会产生较高的热量，从而引起结温的升高。如果产生的热量不能及时排出，较高的结温会影响模块整体的热机械性能和可靠性。
基于此，本申请提供了一种具有高的散热性能、功率密度和可靠性的功率模块。为了便于理解本申请技术方案，下面将结合附图和具体实施方式对本申请所提供的功率模块进行具体说明。
参见图1，图1为本申请实施例提供的一种功率模块的结构示意图。该功率模块1包括：相对设置的第一覆金属层基板10和第二覆金属层基板20，位于第一覆金属层基板10和第二覆金属层基板20之间的芯片11和互联柱12；其中，芯片11与第一覆金属层基板10之间还设置有烧结材料13，芯片11和第一覆金属层基板10采用烧结材料13通过有压烧结实现电连接，烧结材料13可以包括银膏、铜膏或银膜中的至少一种；互联柱12位于芯片11与第二覆金属层基板20之间，该芯片11通过互联柱12与第二覆金属层基板20电连接。由于芯片11两侧均设置有基板，从而功率模块内部产生的热量可以从第一覆金属层基板10方向和第二覆金属层基板20方向排出，提升功率模块的散热性能。并且，烧结材料应力低，通过有压烧结方式使芯片11与第一覆金属层基板10电连接，可以提高接合可靠性。另外，本申请中的烧结材料13具有烧结温度低、熔点高和热导电率高的优点，因此，不仅可以进一步提高功率模块的散热性能，而且可以提高该功率模块的工作环境温度及使用寿命，从而提高功率模块的功率密度。
参见图2，图2为本申请实施例提供的一种功率模块的制备方法的流程示意图。该制备方法可以包括以下步骤：
S101、提供第一覆金属层基板和第二覆金属层基板。
在具体实施时，第一覆金属层基板和第二覆金属层基板可以为覆铜陶瓷基板(Direct Bond Copper，DBC)、活性金属焊接基板(Active metal brazed copper，AMB，例如Al 2O 3-AMB、Si 3N 4-AMB或AlN-AMB)或绝缘金属基板(Insulated metal substrate，IMS)等，在此不作限定。
示例性的，为了进一步提高功率密度，第一覆金属层基板和第二覆金属层基板可以采用高导热性的AlN-DBC、Si 3N 4-AMB或AlN-AMB形成，在此不作限定。
S102、将芯片贴装在第一覆金属层基板上，且在芯片与第一覆金属层基板之间有烧结材料。
示例性的，烧结材料可以由银膏、铜膏或银膜形成。
在具体实施时，银膏可以包括微米银膏(Micrometer silver particle paste)和纳米银膏(Nanometer silver particle paste)中至少一种。其中，微米银膏是指使用微米银粒子和有机溶剂制作的银膏，成本低，安全。一般在加压下烧结，烧结材料致密性高，被接合体界面接合牢固，接合可靠性高。纳米银膏是纳米银粒子和有机溶剂制作的银膏，成本高，有纳米粒子的作业安全风险。
可选的，为了提高烧结接合的可靠性以及降低成本，本申请的烧结材料可以采用微米银膏(Micrometer silver particle paste)形成。
为了进一步提高烧结接合的可靠性，可以通过在烧结材料中增加材料来调节烧结材料的弹性模量，热膨胀系数(CTE)等。示例性的，该烧结材料包括主体材料和填充在主体材料中的填料(Filler)；其中主体材料包括银膏、铜膏或银膜中的至少一种，该填料由与主体材料接合性好的材料形成，且该填料的热膨胀系数小于主体材料的热膨胀系数，从而提高烧结的接合可靠性。
以主体材料为微米银膏为例，在微米银膏中加入填料来降低微米银膏的热膨胀系数，降低接合应力，从而提高银烧接的接合可靠性。示例性的，填料可以包括镍(Ni)、Ni合金、铜(Cu)、铜镀镍、钛(Ti)、Ti合金、铁(Fe)、Fe合金、可伐合金(Kovar，铁镍钴合金4J29)和SiC粉末等中的至少一种，在此不作限定。
本申请对填料的形状不作限定，示例性的，如图3所示，填料131的长度L1可以控制在20μm～100μm之间，填料131在垂直长度方向的尺寸W1可以控制在20nm～30μm之间。沿长度方向的横截面可以为圆形，椭圆形，多边形等。
在本申请中，第一覆金属层基板和第二覆金属层基板的表面所覆的金属层一般为铜，当烧结材料为银膏或银膜时，为了提高烧结材料与第一覆金属层基板的接合性能，第一覆金属层基板在烧结处可以镀银，即第一覆金属层基板在与烧结材料对应的区域覆盖有镀银层。示例性的，镀银层的厚度可以控制在0.1μm～30μm之间。当然，如果烧结材料自身与第一覆金属层基板的接合性能比较好时，也可以不用镀银，例如当烧结材料为铜膏时，第一覆金属层基板在烧结处不需要镀银。
示例性的，当烧结材料为铜膏或银膏时，参见图4和图5，可以通过以下步骤将芯片贴装在第一覆金属层基板上：
步骤S1021a、将烧结材料印刷在第一覆金属层基板上。
在具体实施时，如图5中(a)和(b)所示，可以采用钢网印刷工艺或丝网印刷工艺将烧结材料13(铜膏或银膏)印刷在第一覆金属层基板10对应的烧结区上。由于钢网印刷工艺相比丝网印刷工艺成本低、制作简单。因此，可选的，本申请采用钢网印刷工艺将铜膏或银膏印刷在第一覆金属层基板对应的烧结区上。
示例性的，印刷的铜膏或银膏的厚度可以控制在30μm～160μm之间，具体可以根据实际产品进行设计，在此不作限定。
可选的，印刷的铜膏或银膏的面积可以设置为大于芯片上对应的烧结区的面积，以吸收芯片与烧结材料的对位误差。铜膏或银膏的边界可以比目标边界(理想状态下芯片的烧结区边界)向外延伸20μm～300μm。
步骤S1022a、对印刷后的烧结材料进行预干燥处理。
在具体实施时，对印刷后的铜膏或银膏进行预干燥处理是为了防止加压烧结时压塌烧结材料。
示例性的，如图5中(c)所示，可以在N2氛围下，采用100℃～180℃的温度对印刷在第一覆金属层基板10上的烧结材料13(铜膏或银膏)进行预干燥处理5min～40min。
步骤S1023a、将芯片贴装在第一覆金属层基板的烧结材料上进行加压。
在具体实施时，如图5中(d)所示，可以先通过真空吸附，将芯片11吸起，然后通过画像识别系统，对烧结材料13(铜膏或银膏)进行对位，之后将芯片11固定在干燥后的烧结材料13(铜膏或银膏)上进行加压。
示例性的，芯片贴装条件可以为：温度控制在100℃～180℃，压力控制在0.1MPa ～10MPa，时间控制在10ms～999ms。即在温度为100℃～180℃的环境下对贴装在第一覆金属层基板10上的芯片11上施加0.1MPa～10MPa压力至少10ms。
示例性的，当烧结材料为银膜时，参见图6和图7，可以通过以下步骤将芯片贴装在第一覆金属层基板上：
步骤S1021b、在芯片面向第一覆金属层基板一侧粘附烧结材料。
在具体实施时，如图7中(a)所示，可以通过金属吸嘴吸附芯片11，金属吸嘴的温度为80℃～200℃。然后将芯片11压在一大块银膜上，施加0.1MPa～5MPa压力，加压时间1ms～10000ms。这样，芯片下方的烧结材料13(银膜)被压缩和半烧结，粘附在芯片11上。
步骤S1022b、将粘附有烧结材料的芯片贴装在第一覆金属层基板上进行加压。
在具体实施时，如图7中(b)所示，可以先通过真空吸附，将芯片11吸起，然后通过画像识别系统，对第一覆金属层基板10进行对位，之后将粘附有烧结材料13(银膜)的芯片11固定在第一覆金属层基板10上进行加压。
示例性的，芯片贴装条件可以为：温度控制在100℃～180℃，压力控制在0.1MPa～10MPa，时间控制在10ms～999ms。即在温度为100℃～180℃的环境下对贴装在第一覆金属层基板上的芯片上施加0.1MPa～10MPa压力至少10ms。
当芯片贴装完成后执行步骤S103。
步骤S103、对贴装在第一覆金属层基板上的芯片进行有压烧结。
有压烧结(Press sintering)是指在高温下向被接合体施加压力，从而增加被烧结体的密度，促进烧结材料粒子间以及烧结材料和被接合体界面的原子扩散，增强结合强度和接合可靠性。本申请对采用的有压烧结的工艺不作限定，可以为任何公知的方法。
在具体实施时，如图5中(e)和图7中(c)所示，可以采用加压头对贴装在第一覆金属层基板10上的芯片11进行有压烧结，以加压头面积为50mm*50mm为例，加压头的平行度可以设置为≤5μm，以减轻烧结后的产品翘曲。
示例性的，进行有压烧结的烧结条件为：烧结温度控制在200℃～300℃，施加的压力控制在5MPa～30MPa，烧结时间控制在1min～10min。
在具体实施时，有压烧结过程可以在空气环境中进行。为防止产品氧化，在保护性气氛或真空环境中在对贴装在第一覆金属层基板上的芯片进行有压烧结。其中保护性气氛可以为还原性气氛，或惰性气氛。示例性的，保护性气氛可以为N2、N2和H2的混合气体，Ar或He等，在此不作限定。
为防止烧结过程加压头对芯片的损伤，如图5中(e)和图7中(c)所示，对贴装在第一覆金属层基板上的芯片进行有压烧结时，还可以在芯片11与加压头之间放置可移除的应力缓和膜30。从而在进行有压烧结时，应力缓和膜30可以避免加压头与芯片11进行直接接触以及降低加压头对芯片11应力集中造成的损伤。当有压烧结完成后，可以将应力缓和膜移除。
可选的，应力缓和膜的厚度可以设置为50μm～90μm，在此不作限定。
示例性的，应力缓和膜可以采用特氟龙膜等有机膜，在此不作限定。
进一步地，为了控制烧结后产品的翘曲度，如图5中(f)和图5中(d)所示，对烧结完成的第一覆金属层基板10与芯片11在加压状态下进行冷却。
示例性的，如果有压烧结过程是在保护性气氛或真空环境中进行的，冷却过程也在保 护性气氛或真空环境中进行。
示例性的，冷却条件可以为：施加的压力控制在5MPa～20MPa，冷却时间控制在1min～10min。
可选的，为加强冷却，可以通过水冷却，或者使用强制氮气冷却，在此不作限定。
可选的，在对贴装在第一覆金属层基板上的芯片进行有压烧结之后，还可以对贴装有芯片的第一覆金属层基板进行清洁处理，以去除残留的有机物。例如采用等离子体处理(Plasma treatment)工艺或有机溶剂清洗工艺去除第一覆金属层基板等处残留的有机物，增加后续塑封料的界面接合性，防止塑封料分层，进一步提高功率模块的可靠性。
其中，等离子体处理是指在等离子体中通过等离子体的粒子等对物体表面的轰击效应和等离子体的离子与有机物的反应，实现对物体表面的洁净化处理。
步骤S104、采用互联柱将使芯片远离第一覆金属层基板一侧与第二覆金属层基板连接。
在具体实施时，互联柱可以采用金属、合金或复合材料形成，用于将使芯片远离第一覆金属层基板一侧与第二覆金属层基板连接。
示例性的，互联柱的材料可以是Cu，Ni，Mo，W，钨合金，Cu-Mo合金，AlSiC和镍合金等，或者还可以是Mo镀Ni、Ni(P)或Cu，W镀Ni、Ni(P)或Cu，Cu-Mo合金镀Ni、Ni(P)或Cu，AlSiC复合材料表面敏化处理后镀Ni、Ni(P)或Cu。当然还可以在镀层Ni、Ni(P)或Cu的表面继续镀Ag或Au。
本申请中，Ni(P)是指通过化学镀工艺制造含磷(P)的Ni镀层。化学镀时，P和Ni同时从溶液中析出，沉积在衬底上，P是不可避免的伴生物质。
本申请对功率模块中芯片的类型和数量不作限定，可以是应用于功率模块中的任意数量的任意类型的芯片。示例性的，如图8所示，芯片11可以为绝缘栅双极型晶体管(Insulated Gate Bipolar Transistor，IGBT)和快恢复二极管(Fast Recovery Diode，FRD)。IGBT芯片11和FRD芯片11均通过烧结材料13与第一覆金属层基板10电连接。
在具体实施时，继续参见图8，IGBT芯片11的栅极可以通过Al线104与第一覆金属层基板10电连接。
在具体实施时，芯片面向第一覆金属层基板一侧以及芯片远离第一覆金属层基板一侧均具有表面电极，表面电极包括焊接或烧结金属层，以用于与其它电器件进行焊接或烧结。
示例性的，焊接或烧结金属层可以包括：Ti/Ni/Ag、Ti/Ni/Au、Ti/NiV/Ag、Ti/NiV/Au、Ni(P)/Pd/Au、Ni(P)/Pd/Ag、Ni(P)/Au或Ni(P)/Ag等。
在本申请中，NiV是指Ni和V的合金。在芯片表面电极制造时使用NiV靶材，通过溅射工艺制造的镀层。
可选的，为了释放芯片在焊接或烧结时芯片上产生的应力，以提高功率模块的可靠性，可以在表面电极中增加应力缓冲金属层，应力缓冲金属层的材料可以采用硬度小于HV60的软质金属，例如铝、铝合金、铜、镁合金、锌、锌合金、银、银合金、金或金合金等。利用软质金属的柔软性特点进行结合部应力释放。
在具体实施时，当应力缓冲金属层的材料为不具有焊接性的金属时，例如铝、铝合金或镁合金时，应力缓冲金属层可以设置在焊接或烧结金属层的下方。
示例性的，可以仅在芯片面向第一覆金属层基板一侧的表面电极中设置应力缓冲金属层，也可以仅在芯片面向互联柱一侧的表面电极中设置应力缓冲金属层，还可以在芯片两侧的表面电极中均设置应力缓冲金属层，在此不作限定。
示例性的，以应力缓冲金属层的材料为铝或铝合金为例，如图9所示，芯片11可包括半导体本体110，表面电极111设置在半导体本体110的表面，其中，芯片11面向第一覆金属层基板一侧的表面电极111中设置有应力缓冲金属层1111，应力缓冲金属层1111位于焊接或烧结金属层1112远离第一覆金属层基板一侧，即应力缓冲金属层1111位于焊接或烧结金属层1112和半导体本体110之间。和/或，芯片11面向互联柱一侧的表面电极111中设置有应力缓冲金属层1111，应力缓冲金属层1111位于焊接或烧结金属层1112远离互联柱一侧，即应力缓冲金属层1111位于焊接或烧结金属层1112和半导体本体110之间。其中，图9以芯片11两侧的表面电极111中均设置有应力缓冲金属层1111为例进行示意。
在具体实施时，在形成芯片的表面电极时，可以先通过物理气相沉积(Physical Vapor Deposition，PVD)法或其他方法形成一层Al膜或Al合金层。因为Al表面很容易形成保护性氧化膜，没有可焊性。为了在非焊接性的Al上具备焊接性或烧结性，可以在应力缓冲金属层上化学镀可焊接金属及表面的润湿性金属，形成焊接或烧结金属层。或者，也可以在表面进行等离子体PVD法等方法，制作焊接或烧结金属层。
在一种可行的实现方式中，在形成芯片的表面电极时，可以先通过PVD法或其他方法形成一层Al膜，然后，通过锌酸盐(Zincate)处理，用Zn置换铝氧化膜，然后化学镀Ni(P)置换Zn，也可以在Ni(P)层上化学镀金(Au)或银(Ag)。即表面电极包括应力缓冲金属层Al和焊接或烧结金属层Ni(P)/Au或Ni(P)/Ag。Ni(P)中磷含量一般为5wt.％～12wt.％。或者，也可以在形成一层Al膜后再采用PVD法形成Ti/Ni/Ag，即表面电极包括应力缓冲金属层Al和焊接或烧结金属层Ti/Ni/Ag。
当然，在形成表面电极时，也可以不形成应力缓冲金属层，而是直接采用PVD法形成焊接或烧结金属层，如Ti/Ni/Ag，Ti/Ni/Au，Ti/NiV/Ag、Ti/NiV/Au、Ni(P)/Pd/Au、Ni(P)/Pd/Ag等。
在本申请对芯片的表面电极的厚度不作限定，根据实际产品进行设定，示例性的，表面电极的厚度可以控制在2μm～10μm之间。
示例性的，用填充有填料的微米银膏烧结具有应力缓冲金属层的芯片到敷金属陶瓷基板上，在苛刻的没有塑封的状态下，在温冲(-40℃至125℃)1000次后的烧结层的超声波(SAT)扫描照片如图10所示，由图10可以看到烧结层没有剥离发生。由此可以看出，将具有应力缓冲金属层的芯片结合降低弹性模量和热膨胀系数的银膏烧结，可以实现高可靠性接合。
本申请中，当芯片与第一覆金属层基板通过有压烧结进行连接后，如图1和图8所示，芯片可以通过第一焊料14与互联柱12连接，互联柱12通过第二焊料15与第二覆金属层基板20连接。在具体实施时，可以采用第一焊料通过焊接方式在芯片远离第一覆金属层基板一侧连接互联柱；采用第二焊料通过焊接方式使互联柱远离芯片一侧与第二覆金属层基板连接。
示例性的，第一焊料和第二焊料可以采用焊膏或焊片形成。其中，第一焊料可以采用高温焊料，例如高铅焊料，Au基焊料等，第二焊料可以采用中温焊料，例如SAC305，Sn-Sb焊料等。
在具体实施时，焊料的厚度对焊料接合可靠性等有重要影响，为了保证焊料厚度的可控以及厚度的均一性，如图11所示，可以在两个被接合体01和02(通过焊料焊接的两个物体，例如芯片与互联柱，互联柱与第二覆金属层基板)之间设置支撑柱03，从而利用支 撑柱03控制该两个被接合体01和02之间的焊料04的厚度以及厚度的均一性。其中，支撑柱03可以形成在两个被接合体01和02中的任一被接合体上。
示例性的，在本申请中，如图8所示，互联柱12与芯片11之间设置有至少一个第一支撑柱16，该至少一个第一支撑柱16可以形成于互联柱12面向芯片11一侧，即形成在互联柱12上；该至少一个第一支撑柱16也可以形成于芯片11面向互联柱12一侧，即形成在芯片11上。
示例性的，在本申请中，如图8所示，互联柱12与第二覆金属层基板20之间设置有至少一个第二支撑柱17，该至少一个第二支撑柱17可以形成于互联柱12面向第二覆金属层基板20一侧，即形成在互联柱12上；该至少一个第二支撑柱17也可以形成于第二覆金属层基板20面向互联柱12一侧，即形成在第二覆金属层基板20上。
本申请对第一支撑柱和第二支撑柱的数量不作限定，具体根据焊接区的面积决定，焊接区的面积越大，支撑柱的数量越多。
本申请中支撑柱的尺寸可以设置为微米级尺寸，主要用于支撑位于该支撑柱两侧的被接合体，以控制焊料的厚度和保证焊料厚度的均一性。
可选地，第一支撑柱和第二支撑柱的材料为导电材料。示例性的，第一支撑柱和第二支撑柱可以采用Al、Al合金、Au、Au合金、Cu、Cu合金、Ni、Ni合金、包覆铝的铜、Cu-Sn高熔点合金、或高温焊料中的只是至少一种形成。
在具体实施时，支撑柱的高度根据焊料的目标厚度决定，示例性的，支撑柱的厚度可以控制在0.02mm～10mm之间。
示例性的，可以利用超音波技术在被接合体上植入微米级尺寸的支撑柱，小尺寸的支撑柱对焊料的焊接工艺和焊料可靠性没有影响。植入的支撑柱在初始时可以是球式的，也可以是柱形的，然后对植入的支撑柱进行平整化处理，实现植入支撑柱的高度可调、可控。从而实现焊接过程中焊料的厚度和翘曲度的可控。
示例性的，如图12所示，以在互联柱12两侧植入支撑柱为例，利用超音波技术在互联柱12面向芯片一侧植入微米级尺寸的金属球，对植入的金属球进行平整化处理(Leveling)形成第一支撑柱16，然后将互联柱12植有第一支撑柱16的一面朝下放入治具中，使已植的第一支撑柱16进入治具的空洞中。通过该治具的定位，采用相同的方法在互联柱12面向第二覆金属层基板一侧植入金属球，对植入的金属球进行平整化处理形成第二支撑柱17，从而在互联柱12的两侧对称位置设置支撑柱，便于自动化贴装时的认识和抓取。
其中，对金属球进行平整化处理可以通对金属球进行加压压平，使植入的金属球的高度一致，并使其高度满足设计的焊料厚度要求，从而可以控制焊料的厚度均一。
在本申请的功率模块中，如图13所示，除了芯片11和互联柱12，还可包括位于第一覆金属层基板10面向第二覆金属层基板20一侧的电子元器件101，电子元器件101通过第三焊料102与第一覆金属层基板10连接。
示例性的，第三焊料可以采用高温焊料，例如高铅焊料，Au基焊料等。
示例性的，如图13所示，本申请中的电子元器件包括通过焊料焊接在第一覆金属层基板10上任意电子元器件，例如图13中的信号端子、图13中的功率端子、热敏电阻等。
为了提升电子元器件与第一覆金属层基板的接合可靠性，如图13所示，在电子元器件101与第一覆金属层基板10之间还设置有至少一个第三支撑柱103，该至少一个第三支撑柱103可以形成于电子元器件101面向第一覆金属层基板10一侧，也可以形成于第一 覆金属层基板10面向电子元器件101一侧，在此不作限定。
在具体实施时，第三支撑柱的实施可以参见上述第一支撑柱和第二支撑柱的实施，在此不作赘述。
本申请中，第一焊料、第二焊料以及第三焊料可以采用焊膏或焊片形成，在此不作限定。
可选地，本申请中所有焊料可以材料相同，例如，第一焊料、第二焊料以及第三焊料采用相同焊料形成，这样芯片与互联柱的焊接、互联柱与第二覆金属层基板的焊接以及电子元器件与第一覆金属层基板的焊接就可以通过一次回流焊接完成，从而可以简化工艺步骤，节约成本。
当然，在具体实施时，第一焊料、第二焊料以及第三焊料也可以采用不同的焊料，在此不作限定。示例性的，第一焊料和第三焊料可以采用高温焊料，例如高铅焊料，Au基焊料等，第二焊料可以采用中温焊料，例如SAC305，Sn-Sb焊料等。
示例性的，以图13所示的功率模块为例，结合图14，在芯片11与第一覆金属层基板10进行有压烧结之后，IGBT芯片11栅极与第一覆金属层基板10通过Al线104键合。之后，在互联柱12的两侧形成第一支撑柱16和第二支撑柱17。然后，在第一覆金属层基板10表面上通过超音波技术植入第三支撑柱103。然后，在芯片11与互联柱12之间形成第一焊料14，在互联柱12与第二覆金属层基板20之间形成第二焊料15，在电子元器件101(功率端子以及信号端子)与第一覆金属层基板10之间形成第三焊料102，其中，焊料可以是焊片或焊膏，焊片可以通过贴装形成，焊膏可以通过印刷工艺形成，其中焊片或焊膏可以是高温焊料，例如高铅焊料，Au基焊料等。
然后进行真空回流，将芯片11与互联柱12，互联柱12与第二覆金属层基板20，电子元器件101(功率端子以及信号端子)与第一覆金属层基板10焊接在一起。这样，功率模块的各个部品被接合在一起。由于各个被接合体的焊料中都植入有支撑柱，因此可以控制焊料的厚度和翘曲度。
在完成功率模块的内部互联后需要进行塑封，在具体实施时，如图15所示，塑封料40填充于第一覆金属层基板10与第二覆金属层基板10之间、且塑封第一覆金属层基板10与第二覆金属层基板20。
为了防止塑封料与塑封界面的分层，以提高功率模块的可靠性，塑封料使用低模量的塑封料，示例性的，塑封料可以采用弹性模量在0.5GPa～20GPa之间的材料形成，例如环氧塑封料等，在此不作限定。
在具体实施时，塑封完成后可以对功率模块的上下表面进行研磨，使功率模块的两面平行。当然，也可以根据需求不用研磨。
示例性的，塑封后还可以对裸露的端子(例如信号端子和功率端子)进行镀锡处理，以防止端子氧化和增加端子的可焊性。
本申请的功率模块中，如图16所示，还可以包括位于第一覆金属层基板10远离第二覆金属层基板20一侧的第一散热器50以及位于第二覆金属层基板20远离第一覆金属层基板10一侧的第二散热器60，从而从两面进行模块的冷却，提高功率模块的功率密度和模块可靠性。
示例性的，第一散热器和第二散热器可以为水冷散热器，在此不作限定。
在具体实施时，第一覆金属层基板与第一散热器可以通过导热硅脂接合，第二覆金属 层基板与第二散热器可以通过导热硅脂接合。
可选地，为了提高散热效果，第一散热器可以通过焊接方式或烧结方式与第一覆金属层基板连接；和/或，第二散热器通过焊接方式或烧结方式与第二覆金属层基板连接。
示例性的，第一散热器可以通过焊接方式与第一覆金属层基板连接；第二散热器通过焊接方式与第二覆金属层基板连接。
进一步，如图16所示，第一散热器50与第一覆金属层基板10之间具有第一支撑部件，第一支撑部件可以由多个第四支撑柱51或金属丝形成；和/或，第二散热器60与第二覆金属层基板20之间具有第二支撑部件，第二支撑部件可以由多个第五支撑柱61或金属丝形成，从而利用第一支撑部件和第二支撑部件控制焊料厚度，保证焊接的可靠性。
在具体实施时，可以将金属丝键合固定在散热器的结合面上，或者功率模块的散热面上，以防止回流时金属丝随液态金属的流动。
在具体实施时，当第一支撑部件由多个第四支撑柱形成时，第四支撑柱可以形成在第一散热器上，也可以形成在第一覆金属层基板上，在此不作限定。在具体实施时，第四支撑柱的实施可以参见上述第一支撑柱和第二支撑柱的实施，在此不作赘述。
在具体实施时，当第二支撑部件由多个第五支撑柱形成时，第五支撑柱可以形成在第二散热器上，也可以形成在第二覆金属层基板上，在此不作限定。在具体实施时，第五支撑柱的实施可以参见上述第一支撑柱和第二支撑柱的实施，在此不作赘述。
相应地，本申请实施例还提供了一种电源电路，包括电路板和本申请实施例提供的上述任一种功率模块，功率模块与电路板电连接，电路板为功率模块提供信号。由于该电源电路解决问题的原理与前述一种功率模块相似，因此该电源电路的实施可以参见前述功率模块的实施，重复之处不再赘述。
相应地，本申请实施例还提供了一种芯片，参见图9，芯片11的表面电极111包括叠层设置的应力缓冲金属层1111和焊接或烧结金属层1112，其中，应力缓冲金属层1111的材料可以采用硬度小于HV60的软质金属，利用软质金属的柔软性特点释放结合部应力。
示例性的，软质金属可以包括铝、铝合金、铜、镁合金、锌、锌合金、银、银合金、金和金合金等中的至少一种，在此不作限定。
在具体实施时，当应力缓冲金属层的材料为不具有焊接性的金属时，例如铝、铝合金或镁合金时，应力缓冲金属层可以设置在焊接或烧结金属层的下方。
示例性的，焊接或烧结金属层可以包括：Ti/Ni/Ag、Ti/Ni/Au、Ti/NiV/Ag、Ti/NiV/Au、Ni(P)/Pd/Au、Ni(P)/Pd/Ag，在此不作限定。
显然，本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (22)

  1. 一种功率模块，其特征在于，包括：相对设置的第一覆金属层基板和第二覆金属层基板、位于所述第一覆金属层基板和所述第二覆金属层基板之间的芯片和互联柱；
    所述芯片与所述第一覆金属层基板之间设置有烧结材料，所述芯片和所述第一覆金属层基板通过所述烧结材料实现电连接，所述烧结材料包括银膏、铜膏和银膜中的至少一种；
    所述互联柱位于所述芯片与所述第二覆金属层基板之间，所述芯片通过所述互联柱与所述第二覆金属层基板连接。
  2. 如权利要求1所述的功率模块，其特征在于，所述烧结材料包括主体材料和填充在所述主体材料中的填料；
    所述填料的热膨胀系数小于所述主体材料的热膨胀系数。
  3. 如权利要求1或2所述的功率模块，其特征在于，所述银膏包括微米银膏和纳米银膏中至少一种。
  4. 如权利要求3所述的功率模块，其特征在于，所述填料包括镍、镍合金、铜、铜镀镍、钛、钛合金、铁、铁合金、可伐合金和SiC粉末中的至少一种。
  5. 如权利要求1-4任一项所述的功率模块，其特征在于，所述芯片面向所述第一覆金属层基板一侧以及所述芯片远离所述第一覆金属层基板一侧均具有表面电极，所述表面电极包括焊接或烧结金属层；
    位于所述芯片面向所述第一覆金属层基板一侧的所述表面电极还包括位于所述焊接或烧结金属层远离所述第一覆金属层基板一侧的应力缓冲金属层；
    和/或，位于所述芯片远离所述第一覆金属层基板一侧的所述表面电极还包括位于所述焊接或烧结金属层面向所述第一覆金属层基板一侧的应力缓冲金属层；
    所述应力缓冲金属层的材料为软质金属，所述软质金属的硬度小于HV60。
  6. 如权利要求5所述的功率模块，其特征在于，所述软质金属包括铝、铝合金、铜、镁合金、锌、锌合金、银、银合金、金和金合金中的至少一种。
  7. 如权利要求6所述的功率模块，其特征在于，所述焊接或烧结金属层包括：Ti/Ni/Ag、Ti/Ni/Au、Ti/NiV/Ag、Ti/NiV/Au、Ni(P)/Pd/Au、Ni(P)/Pd/Ag、Ni(P)/Au或Ni(P)/Ag。
  8. 如权利要求1-7任一项所述的功率模块，其特征在于，所述芯片通过第一焊料与所述互联柱连接，所述互联柱通过第二焊料与所述第二覆金属层基板连接。
  9. 如权利要求8所述的功率模块，其特征在于，还包括：
    位于所述互联柱与所述芯片之间的至少一个第一支撑柱，所述至少一个第一支撑柱形成于所述互联柱面向所述芯片一侧或形成于所述芯片面向所述互联柱一侧；
    和/或，位于所述互联柱与所述第二覆金属层基板之间的至少一个第二支撑柱，所述至少一个第二支撑柱形成于所述互联柱面向所述第二覆金属层基板一侧或形成于所述第二覆金属层基板面向所述互联柱一侧。
  10. 如权利要求1-9任一项所述的功率模块，其特征在于，还包括位于所述第一覆金属层基板面向所述第二覆金属层基板一侧的电子元器件；
    所述电子元器件通过第三焊料与所述第一覆金属层基板连接。
  11. 如权利要求10所述的功率模块，其特征在于，还包括位于所述电子元器件与所述第一覆金属层基板之间的至少一个第三支撑柱；
    所述至少一个第三支撑柱设置于所述电子元器件面向所述第一覆金属层基板一侧或设置于所述第一覆金属层基板面向所述电子元器件一侧。
  12. 如权利要求9-11任一项所述的功率模块，其特征在于，所述支撑柱的材料为导电材料。
  13. 如权利要求12所述的功率模块，其特征在于，所述支撑柱的材料包括铝、铝合金、金、金合金、铜、铜合金、镍、镍合金、包覆铝的铜、铜锡高熔点合金和高温焊料中的至少一种。
  14. 如权利要求1-13任一项所述的功率模块，其特征在于，还包括填充于所述第一覆金属层基板与所述第二覆金属层基板之间、且塑封所述第一覆金属层基板与所述第二覆金属层基板的塑封料，所述塑封料的弹性模量为0.5GPa～20GPa。
  15. 如权利要求14所述的功率模块，其特征在于，所述塑封层的材料包括环氧塑封料。
  16. 如权利要求1-15任一项所述的功率模块，其特征在于，还包括：位于所述第一覆金属层基板远离所述第二覆金属层基板一侧的第一散热器；位于所述第二覆金属层基板远离所述第一覆金属层基板一侧的第二散热器。
  17. 如权利要求16所述的功率模块，其特征在于，所述第一散热器通过焊接方式或烧结方式与所述第一覆金属层基板连接；
    和/或，所述第二散热器通过焊接方式或烧结方式与所述第二覆金属层基板连接。
  18. 如权利要求17所述的功率模块，其特征在于，所述第一散热器与所述第一覆金属层基板之间具有第一支撑部件，所述第一支撑部件包括多个第四支撑柱或金属丝；
    和/或，所述第二散热器与所述第二覆金属层基板之间具有第二支撑部件，所述第二支撑部件包括多个第五支撑柱或金属丝。
  19. 一种电源电路，其特征在于，包括电路板和如权利要求1-18任一项所述的功率模 块，所述功率模块与所述电路板电连接。
  20. 一种芯片，其特征在于，所述芯片的表面电极包括叠层设置的焊接或烧结金属层和应力缓冲金属层。
  21. 如权利要求20所述的芯片，其特征在于，所述应力缓冲金属层的材料为软质金属，所述软质金属的硬度小于HV60。
  22. 如权利要求21所述的芯片，其特征在于，所述软质金属包括铝、铝合金、铜、镁合金、锌、锌合金、银、银合金、金和金合金中的至少一种。
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