WO2022249915A1 - 炭化珪素エピタキシャル基板および炭化珪素半導体装置の製造方法 - Google Patents

炭化珪素エピタキシャル基板および炭化珪素半導体装置の製造方法 Download PDF

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WO2022249915A1
WO2022249915A1 PCT/JP2022/020370 JP2022020370W WO2022249915A1 WO 2022249915 A1 WO2022249915 A1 WO 2022249915A1 JP 2022020370 W JP2022020370 W JP 2022020370W WO 2022249915 A1 WO2022249915 A1 WO 2022249915A1
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Prior art keywords
silicon carbide
main surface
carbide epitaxial
less
substrate
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English (en)
French (fr)
Japanese (ja)
Inventor
弘樹 西原
翼 本家
貴也 宮瀬
太郎 榎薗
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Sumitomo Electric Industries Ltd
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Sumitomo Electric Industries Ltd
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Priority to JP2023523420A priority Critical patent/JPWO2022249915A1/ja
Priority to US18/563,422 priority patent/US20240363696A1/en
Publication of WO2022249915A1 publication Critical patent/WO2022249915A1/ja
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/50—Physical imperfections
    • H10D62/57—Physical imperfections the imperfections being on the surface of the semiconductor body, e.g. the body having a roughened surface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs

Definitions

  • the present disclosure relates to a silicon carbide epitaxial substrate and a method for manufacturing a silicon carbide semiconductor device.
  • This application claims priority from Japanese Patent Application No. 2021-087624 filed on May 25, 2021. All the contents described in the Japanese patent application are incorporated herein by reference.
  • a silicon carbide epitaxial substrate includes a silicon carbide substrate and a silicon carbide epitaxial layer.
  • a silicon carbide epitaxial layer overlies the silicon carbide substrate.
  • the silicon carbide epitaxial layer has a main surface opposite the interface between the silicon carbide substrate and the silicon carbide epitaxial layer.
  • the surface density of pits on the main surface is 1/cm 2 or less.
  • the areal density of the bumps on the main surface is less than 0.7/cm 2 .
  • the pit area is 100 ⁇ m 2 or less
  • the bump area is 100 ⁇ m 2 or less.
  • the pit depth is 0.01 ⁇ m or more and 0.1 ⁇ m or less
  • the bump height is 0.01 ⁇ m or more and 0.1 ⁇ m or less.
  • a silicon carbide epitaxial substrate includes a silicon carbide epitaxial layer and a silicon carbide substrate.
  • a silicon carbide epitaxial layer overlies the silicon carbide substrate.
  • the silicon carbide epitaxial layer has a main surface opposite the interface between the silicon carbide substrate and the silicon carbide epitaxial layer.
  • the areal density of three-dimensional oblique defects on the main surface is 0.006/cm 2 or more and 0.2/cm 2 or less.
  • FIG. 1 is a schematic plan view showing the configuration of a silicon carbide epitaxial substrate according to this embodiment.
  • FIG. 2 is a schematic cross-sectional view taken along line II-II of FIG. 3 is an enlarged plan view of area III of FIG. 1.
  • FIG. 4 is a schematic cross-sectional view along region IV-IV of FIG.
  • FIG. 5 is an enlarged plan view of region V in FIG.
  • FIG. 6 is a schematic cross-sectional view along the region VI-VI in FIG.
  • FIG. 7 is an enlarged plan view of area VII of FIG.
  • FIG. 8 is a schematic cross-sectional view along region VIII-VIII in FIG.
  • FIG. 9 is an enlarged plan view of region IX in FIG.
  • FIG. 1 is a schematic plan view showing the configuration of a silicon carbide epitaxial substrate according to this embodiment.
  • FIG. 2 is a schematic cross-sectional view taken along line II-II of FIG. 3 is an enlarged plan view of area III of FIG. 1.
  • FIG. 10 is a schematic cross-sectional view along region XX in FIG.
  • FIG. 11 is a schematic plan view showing a photoluminescence image of a three-dimensional oblique defect.
  • FIG. 12 is a schematic partial cross-sectional view showing the configuration of a silicon carbide epitaxial substrate manufacturing apparatus.
  • FIG. 13 is a flow chart schematically showing a method for manufacturing a silicon carbide epitaxial substrate according to this embodiment.
  • FIG. 14 is a schematic cross-sectional view showing a step of performing chemical mechanical polishing on the silicon carbide epitaxial layer.
  • FIG. 15 is a schematic cross-sectional view showing the configuration of a chemical mechanical polishing apparatus.
  • FIG. 16 is a flow chart schematically showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment.
  • FIG. 16 is a flow chart schematically showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment.
  • FIG. 17 is a schematic cross-sectional view showing the step of forming the body region.
  • FIG. 18 is a schematic cross-sectional view showing a step of forming a source region.
  • FIG. 19 is a schematic cross-sectional view showing a step of forming trenches in the second main surface of the silicon carbide epitaxial layer.
  • FIG. 20 is a schematic cross-sectional view showing a step of forming a gate insulating film.
  • FIG. 21 is a schematic cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film.
  • FIG. 22 is a schematic cross-sectional view showing the configuration of the silicon carbide semiconductor device according to this embodiment.
  • An object of the present disclosure is to provide a silicon carbide epitaxial substrate and a method for manufacturing a silicon carbide semiconductor device that can improve the reliability of the silicon carbide semiconductor device.
  • a silicon carbide epitaxial substrate capable of improving reliability of a silicon carbide semiconductor device, a method for manufacturing a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device.
  • Silicon carbide epitaxial substrate 100 includes silicon carbide substrate 11 and silicon carbide epitaxial layer 22 .
  • Silicon carbide epitaxial layer 22 is on silicon carbide substrate 11 .
  • Silicon carbide epitaxial layer 22 has a main surface 2 opposite to interface 3 between silicon carbide substrate 11 and silicon carbide epitaxial layer 22 .
  • the surface density of the pits 10 on the main surface 2 is 1/cm 2 or less.
  • the surface density of bumps 20 on main surface 2 is less than 0.7/cm 2 .
  • the area of pit 10 is 100 ⁇ m 2 or less
  • the area of bump 20 is 100 ⁇ m 2 or less.
  • pit 10 has a depth of 0.01 ⁇ m or more and 0.1 ⁇ m or less
  • bump 20 has a height of 0.01 ⁇ m or more and 0.1 ⁇ m or less.
  • silicon carbide epitaxial layer 22 may have a thickness of 15 ⁇ m or more.
  • silicon carbide epitaxial layer 22 may have a thickness of less than 15 ⁇ m.
  • the surface density of bumps 20 on main surface 2 may be 0.1/cm 2 or less.
  • the surface density of pits 10 on main surface 2 may be 0.5/cm 2 or less.
  • surface density of three-dimensional oblique defects 40 on main surface 2 is 0.006/cm 2 or more and 0.2. /cm 2 or less.
  • surface density of scratches 30 on main surface 2 may be 1/cm 2 or less.
  • the width of the scratch 30 may be 10 ⁇ m or less and the length of the scratch 30 may be 150 mm or less when viewed in a direction perpendicular to the main surface 2 .
  • the depth of the scratch 30 may be 0.2 ⁇ m or more in the direction perpendicular to the main surface.
  • Silicon carbide epitaxial substrate 100 includes silicon carbide epitaxial layer 22 and silicon carbide substrate 11 .
  • Silicon carbide epitaxial layer 22 is on silicon carbide substrate 11 .
  • Silicon carbide epitaxial layer 22 has a main surface 2 opposite to interface 3 between silicon carbide substrate 11 and silicon carbide epitaxial layer 22 .
  • the surface density of the three-dimensional oblique defects 40 on the main surface 2 is 0.006/cm 2 or more and 0.2/cm 2 or less.
  • the method for manufacturing silicon carbide semiconductor device 400 according to the present disclosure includes the following steps. Silicon carbide epitaxial substrate 100 according to any one of (1) to (6) above is prepared. A silicon carbide epitaxial substrate 100 is processed. [Details of the embodiment of the present disclosure] Hereinafter, details of embodiments of the present disclosure will be described based on the drawings. In the drawings below, the same or corresponding parts are denoted by the same reference numerals, and the description thereof will not be repeated. In the crystallographic descriptions in this specification, individual orientations are indicated by [ ], aggregated orientations by ⁇ >, individual planes by ( ), and aggregated planes by ⁇ ⁇ . Also, for negative exponents, a "-" (bar) is added above the number in terms of crystallography, but in this specification, a negative sign is added before the number.
  • FIG. 1 is a schematic plan view showing the configuration of a silicon carbide epitaxial substrate 100 according to this embodiment.
  • silicon carbide epitaxial substrate 100 has second main surface 2 and outer peripheral side surface 9 .
  • the second main surface 2 extends along each of the first direction 101 and the second direction 102 .
  • the first direction 101 is, for example, the ⁇ 11-20> direction.
  • the second direction 102 is, for example, the ⁇ 1-100> direction.
  • the second main surface 2 is a plane inclined with respect to the ⁇ 0001 ⁇ plane.
  • the off angle of second main surface 2 with respect to the ⁇ 0001 ⁇ plane may be, for example, 5° or less.
  • the second main surface 2 may be a surface inclined by an off angle of 5° or less with respect to the (0001) plane.
  • the second main surface 2 may be a surface inclined by an off angle of 5° or less with respect to the (000-1) plane.
  • the inclination direction (off direction) of second main surface 2 with respect to the ⁇ 0001 ⁇ plane is, for example, the ⁇ 11-20> direction.
  • the off angle of second main surface 2 with respect to the ⁇ 0001 ⁇ plane may be, for example, 4° or less, or may be 3° or less.
  • the outer peripheral side surface 9 has an orientation flat portion 7 and an arcuate portion 8 .
  • the arcuate portion 8 continues to the orientation flat portion 7 .
  • orientation flat portion 7 extends along first direction 101 when viewed from a direction perpendicular to second main surface 2 .
  • a diameter W1 of the second main surface 2 is, for example, 100 mm or more.
  • the diameter W1 may be 150 mm or more, or may be 200 mm or more.
  • the upper limit of the diameter W1 is not particularly limited, it may be 300 mm or less, for example.
  • the diameter W ⁇ b>1 is the longest straight distance between two different points on the outer peripheral side surface 9 when viewed in a direction perpendicular to the second main surface 2 .
  • FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. The cross section shown in FIG. 2 is perpendicular to the second major surface 2 and parallel to the first direction 101 .
  • silicon carbide epitaxial substrate 100 according to the present embodiment has silicon carbide substrate 11 and silicon carbide epitaxial layer 22 .
  • Silicon carbide epitaxial layer 22 is on silicon carbide substrate 11 .
  • Silicon carbide substrate 11 has first main surface 1 opposite to interface 3 between silicon carbide substrate 11 and silicon carbide epitaxial layer 22 .
  • Silicon carbide epitaxial layer 22 has a second main surface 2 opposite to interface 3 between silicon carbide substrate 11 and silicon carbide epitaxial layer 22 .
  • Second main surface 2 is the surface of silicon carbide epitaxial substrate 100 .
  • First main surface 1 is the back surface of silicon carbide epitaxial substrate 100 .
  • Each of silicon carbide substrate 11 and silicon carbide epitaxial layer 22 is made of silicon carbide single crystal, for example.
  • each of silicon carbide substrate 11 and silicon carbide epitaxial layer 22 may be made of silicon carbide of polytype 4H, for example.
  • Silicon carbide substrate 11 and silicon carbide epitaxial layer 22 each contain a carrier.
  • Silicon carbide substrate 11 and silicon carbide epitaxial layer 22 each contain nitrogen (N) as an n-type impurity, for example.
  • the conductivity type of each of silicon carbide substrate 11 and silicon carbide epitaxial layer 22 is, for example, n type (first conductivity type).
  • Silicon carbide epitaxial layer 22 has an n-type impurity concentration of, for example, 1 ⁇ 10 15 cm ⁇ 3 or more and 1 ⁇ 10 19 cm ⁇ 3 or less.
  • the lower limit of the n-type impurity concentration is not particularly limited, but may be, for example, 5 ⁇ 10 15 cm ⁇ 3 or more, or 1 ⁇ 10 16 cm ⁇ 3 or more.
  • the upper limit of the n-type impurity concentration is not particularly limited, it may be, for example, 5 ⁇ 10 18 cm ⁇ 3 or less, or 1 ⁇ 10 18 cm ⁇ 3 or less.
  • the concentration of n-type impurities contained in silicon carbide epitaxial layer 22 can be measured using, for example, a mercury probe type C (Capacitance)-V (Voltage) measuring device.
  • the thickness (first thickness T1) of silicon carbide epitaxial layer 22 may be, for example, 15 ⁇ m or more. Although the lower limit of the thickness (first thickness T1) of silicon carbide epitaxial layer 22 is not particularly limited, it may be, for example, 20 ⁇ m or more, or 30 ⁇ m or more. Although the upper limit of the thickness (first thickness T1) of silicon carbide epitaxial layer 22 is not particularly limited, it may be, for example, 100 ⁇ m or less, or 50 ⁇ m or less.
  • the thickness (first thickness T1) of silicon carbide epitaxial layer 22 may be, for example, less than 15 ⁇ m.
  • the upper limit of the thickness (first thickness T1) of silicon carbide epitaxial layer 22 is not particularly limited, it may be, for example, 13 ⁇ m or less, or 10 ⁇ m or less.
  • the lower limit of the thickness (first thickness T1) of silicon carbide epitaxial layer 22 is not particularly limited, it may be, for example, 1 ⁇ m or more, or 5 ⁇ m or more.
  • Silicon carbide substrate 11 has a thickness (fifth thickness T5) of, for example, 350 ⁇ m or more and 500 ⁇ m or less.
  • the thickness of silicon carbide epitaxial layer 22 can be measured using, for example, FTIR (Fourier Transform InfraRed spectrometer).
  • the measurement device is, for example, a Fourier transform infrared spectrophotometer (IRPrestige-21) manufactured by Shimadzu Corporation.
  • the measurement of the thickness of the silicon carbide layer epitaxial layer by FTIR is obtained using the optical constant difference caused by the carrier concentration difference between the silicon carbide layer epitaxial layer and the silicon carbide substrate 11 .
  • the measurement wavenumber range is, for example, from 3400 cm ⁇ 1 to 2400 cm ⁇ 1 .
  • the wave number interval is, for example, about 4 cm ⁇ 1 .
  • infrared light is irradiated to interfere with reflected light from second main surface 2 of silicon carbide epitaxial layer 22 and reflected light from interface 3 between silicon carbide epitaxial layer 22 and silicon carbide substrate 11 . is measured, the thickness of silicon carbide epitaxial layer 22 is measured.
  • pits 10 are present, for example, in second main surface 2 of silicon carbide epitaxial substrate 100 .
  • the shape of pit 10 when viewed in a direction perpendicular to second main surface 2 is not particularly limited, but may be substantially circular, for example.
  • the value obtained by dividing the width of pit 10 along first direction 101 (first width A1) by the length of pit 10 along second direction 102 (first length B1) is, for example, 0.1 or more and 10 or less. or 0.2 or more and 5 or less.
  • pit 10 may have a rod-like shape, for example.
  • the area of the pits 10 When viewed in a direction perpendicular to the second main surface 2, the area of the pits 10 is 100 ⁇ m 2 or less.
  • the upper limit of the area of the pits 10 when viewed in the direction perpendicular to the second main surface 2 is not particularly limited, but may be, for example, 80 ⁇ m 2 or less, or 60 ⁇ m 2 or less.
  • the lower limit of the area of the pits 10 when viewed in the direction perpendicular to the second main surface 2 is not particularly limited, but may be, for example, 1 ⁇ m 2 or more, or 10 ⁇ m 2 or more.
  • the upper limit of the width (first width A1) of the pit 10 along the first direction 101 is not particularly limited, but may be, for example, 50 ⁇ m or less, 30 ⁇ m or less, or 10 ⁇ m or less. good too.
  • the lower limit of the width (first width A1) of pit 10 along first direction 101 is not particularly limited, but may be, for example, 1 ⁇ m or more, 2 ⁇ m or more, or 5 ⁇ m or more. good too.
  • the upper limit of the length of the pits 10 along the second direction 102 (the first length B1) is not particularly limited. There may be.
  • the lower limit of the length (first length B1) of pit 10 along second direction 102 is not particularly limited, but may be, for example, 1 ⁇ m or more, 2 ⁇ m or more, or 5 ⁇ m or more. There may be.
  • FIG. 4 is a schematic cross-sectional view along region IV-IV in FIG.
  • pits 10 are depressions formed in second main surface 2 .
  • the side surfaces forming the pit 10 may be curved.
  • the depth of the pits 10 (first depth C1) is 0.01 ⁇ m or more and 0.1 ⁇ m or less.
  • the upper limit of the depth (first depth C1) of the pits 10 in the direction perpendicular to the second main surface 2 is not particularly limited, but may be, for example, 0.09 ⁇ m or less, or 0.08 ⁇ m or less.
  • the lower limit of the depth (first depth C1) of the pits 10 is not particularly limited. may be
  • the surface density of the pits 10 on the second main surface 2 is 1/cm 2 or less.
  • the upper limit of the areal density of the pits 10 on the second main surface 2 is not particularly limited, but may be, for example, 0.5/cm 2 or less, or may be, for example, 0.3/cm 2 or less.
  • the lower limit of the areal density of the pits 10 on the second main surface 2 is not particularly limited, but may be, for example, 0.01/cm 2 or more, or may be, for example, 0.1/cm 2 or more. .
  • FIG. 5 is an enlarged plan view of region V in FIG.
  • the shape of bumps 20 when viewed in a direction perpendicular to second main surface 2 is not particularly limited, but may be substantially circular, for example.
  • the value obtained by dividing the width (second width A2) of bump 20 along first direction 101 by the length (second length B2) of bump 20 along second direction 102 is, for example, 0.1 or more and 10 or less. or 0.2 or more and 5 or less.
  • the area of the bumps 20 When viewed in a direction perpendicular to the second main surface 2, the area of the bumps 20 is 100 ⁇ m 2 or less.
  • the upper limit of the area of bump 20 when viewed in a direction perpendicular to second main surface 2 is not particularly limited, it may be, for example, 80 ⁇ m 2 or less, or 60 ⁇ m 2 or less.
  • the lower limit of the area of bump 20 when viewed in a direction perpendicular to second main surface 2 is not particularly limited, it may be, for example, 1 ⁇ m 2 or more, or 10 ⁇ m 2 or more.
  • the upper limit of the width (second width A2) of bump 20 along first direction 101 is not particularly limited, but may be, for example, 50 ⁇ m or less, 30 ⁇ m or less, or 10 ⁇ m or less. good too.
  • the lower limit of the width (second width A2) of bump 20 along first direction 101 is not particularly limited, but may be, for example, 1 ⁇ m or more, 2 ⁇ m or more, or 5 ⁇ m or more. good too.
  • the upper limit of the length (second length B2) of bump 20 along second direction 102 is not particularly limited, but may be, for example, 50 ⁇ m or less, 30 ⁇ m or less, or 10 ⁇ m or less. There may be.
  • the lower limit of the length (second length B2) of bump 20 along second direction 102 is not particularly limited, but may be, for example, 1 ⁇ m or more, 2 ⁇ m or more, or 5 ⁇ m or more. There may be.
  • FIG. 6 is a schematic cross-sectional view along the area VI-VI in FIG.
  • the bumps 20 are protrusions formed on the second main surface 2 .
  • the side surfaces forming the bump 20 may be curved.
  • the height of the bumps 20 (second height C2) is 0.01 ⁇ m or more and 0.1 ⁇ m or less.
  • the upper limit of the height (second height C2) of the bumps 20 is not particularly limited. may be
  • the lower limit of the height (second height C2) of bump 20 in the direction perpendicular to second main surface 2 is not particularly limited, but may be, for example, 0.02 ⁇ m or more, or 0.03 ⁇ m or more. may be
  • the surface density of bumps 20 on second main surface 2 is less than 0.7/cm 2 .
  • the upper limit of the areal density of the bumps 20 on the second main surface 2 is not particularly limited, but may be, for example, 0.5/cm 2 or less, or may be, for example, 0.1/cm 2 or less. and may be, for example, 0.05/cm 2 or less.
  • the lower limit of the areal density of the bumps 20 on the second main surface 2 is not particularly limited, but may be, for example, 0.01/cm 2 or more, or may be, for example, 0.02/cm 2 or more. .
  • FIG. 7 is an enlarged plan view of area VII of FIG.
  • second main surface 2 of silicon carbide epitaxial substrate 100 may have scratches 30, for example.
  • the shape of the scratch 30 when viewed in the direction perpendicular to the second main surface 2 is not particularly limited, but may be, for example, a rod shape.
  • the length of the scratch 30 along the longitudinal direction of the scratch 30 (third width A3) is the width of the scratch 30 along the lateral direction of the scratch 30 (third width A3).
  • the value divided by the length B3) may be, for example, 7 or more, 10 or more, or 15 or more.
  • the width of the scratch 30 (third length B3) is 10 ⁇ m or less.
  • the upper limit of the width (third length B3) of the scratch 30 is not particularly limited, it may be, for example, 8 ⁇ m or less, 5 ⁇ m or less, or 3 ⁇ m or less.
  • the lower limit of the width (third length B3) of the scratch 30 is not particularly limited, but may be, for example, 0.1 ⁇ m or more, 0.2 ⁇ m or more, or 0.5 ⁇ m or more. good too.
  • the length of the scratch 30 When viewed in a direction perpendicular to the second main surface 2, the length of the scratch 30 (third width A3) is 150 mm or less.
  • the upper limit of the length of the scratch 30 (the third width A3) is not particularly limited, it may be, for example, 90 mm or less, or 80 mm or less.
  • the lower limit of the length of the scratch 30 (third width A3) is not particularly limited, but may be, for example, 0.1 ⁇ m or more, 10 ⁇ m or more, or 20 ⁇ m or more, It may be 50 ⁇ m or more.
  • FIG. 8 is a schematic cross-sectional view along region VIII-VIII in FIG.
  • the cross-section shown in FIG. 8 is perpendicular to the second major surface 2 and perpendicular to the longitudinal direction of the scratch 30 .
  • the scratch 30 is a recess formed in the second main surface 2.
  • the depth of the scratch 30 (third depth C3) is 0.2 ⁇ m or more.
  • the upper limit of the depth of the scratch 30 (the third depth C3) in the direction perpendicular to the second main surface 2 is not particularly limited, it may be, for example, 5 ⁇ m or less, or 2 ⁇ m or less. good.
  • the lower limit of the depth of the scratch 30 (the third depth C3) in the direction perpendicular to the second main surface 2 is not particularly limited, it may be, for example, 0.4 ⁇ m or more, or 0.6 ⁇ m or more. may be
  • the surface density of the scratches 30 on the second main surface 2 is 1 scratch/cm 2 or less.
  • the upper limit of the surface density of the scratches 30 on the second main surface 2 is not particularly limited, but may be, for example, 0.5/cm 2 or less, or may be, for example, 0.1/cm 2 or less. and may be, for example, 0.05/cm 2 or less.
  • the lower limit of the areal density of the scratches 30 on the second main surface 2 is not particularly limited, but may be, for example, 0.01/cm 2 or more, or may be, for example, 0.02/cm 2 or more. .
  • Second main surface 2 of silicon carbide epitaxial substrate 100 is irradiated with light having a wavelength of 546 nm from a light source such as a mercury xenon lamp, and reflected light of the light is observed by a light receiving element. Thereby, a SICA image on the second main surface 2 is acquired.
  • the contrast of SICA images is classified into 256 levels from 1 (minimum) to 256 (maximum).
  • the contrast is maximum, the SICA image is displayed darkest.
  • the SICA image appears brightest when the contrast is minimal.
  • the bottom of the pit 10 appears dark.
  • the bottom of the pit 10 appears bright.
  • Pits 10 with different contrasts are selected in advance, and the depth of each pit 10 is measured with an AFM (Atomic Force Microscope). Thereby, the depth of the pit 10 is estimated from the contrast (brightness and darkness) in the SICA image.
  • the pits 10, the bumps 20 and the scratches 30 are defined based on the planar shapes and depths of the pits 10, the bumps 20 and the scratches 30, respectively. Based on the observed SICA image, each of pits 10, bumps 20 and scratches 30 are identified. "Thresh S", which is an index of SICA's measurement sensitivity, is set to 40, for example.
  • the total number of pits 10, bumps 20 and scratches 30 is counted over the entire surface of the second main surface 2.
  • the surface density of the pits 10 is a value obtained by dividing the total number of pits 10 on the second main surface 2 by the area of the second main surface 2 .
  • the surface density of bumps 20 is a value obtained by dividing the total number of bumps 20 on second main surface 2 by the area of second main surface 2 .
  • the surface density of the scratches 30 is a value obtained by dividing the total number of scratches 30 on the second main surface 2 by the area of the second main surface 2 .
  • On the second main surface 2, the area within 5 mm from the outer peripheral side surface 9 is excluded from the area density measurement area of each of the pits 10, the bumps 20 and the scratches 30 (edge extrusion).
  • FIG. 9 is an enlarged plan view of region IX in FIG.
  • FIG. 10 is a schematic cross-sectional view along region XX in FIG.
  • second main surface 2 of silicon carbide epitaxial substrate 100 may have cubic oblique defect 40, for example.
  • the cubic oblique defect 40 has a protrusion 41 and a stacking fault 42 .
  • the stacking fault 42 continues to the projection 41 .
  • the stacking fault 42 may extend from the projection 41 along the first direction 101 .
  • a portion of top surface 44 of stacking fault 42 constitutes groove 35 .
  • the shape of the stereoscopic oblique defect 40 shown in FIG. 9 is the shape observed using a confocal differential interference contrast microscope.
  • the shape of the protrusion 41 when viewed in a direction perpendicular to the second main surface 2, may be substantially circular, for example.
  • the groove 35 may have a rod shape, for example.
  • the width of the groove 35 (fifth width A5) is greater than the width of the protrusion 41 (fourth width A4).
  • the lower limit of the width of the groove 35 (fifth width A5) in the first direction 101 is not particularly limited. may be In the first direction 101, the upper limit of the width of the groove 35 (fifth width A5) is not particularly limited, but may be 100 times or less, or 50 times or less, the width of the protrusion 41 (fourth width A4). may be
  • the length of the protrusion 41 may be longer than the length of the groove 35 (fifth length B5).
  • the lower limit of the length of the protrusion 41 (fourth length B4) is not particularly limited, but it may be 1.5 times or more the length of the groove 35 (fifth length B5). It may be two times or more.
  • the upper limit of the length (fourth length B4) of the protrusion 41 in the second direction 102 is not particularly limited, but may be 20 times or less the length of the groove 35 (fifth length B5). , 10 times or less.
  • the upper limit of the width (fourth width A4) of protrusion 41 along first direction 101 is not particularly limited, but may be, for example, 50 ⁇ m or less, 30 ⁇ m or less, or 10 ⁇ m or less.
  • the lower limit of the width (fourth width A4) of protrusion 41 along first direction 101 is not particularly limited, but may be, for example, 1 ⁇ m or more, 2 ⁇ m or more, or 5 ⁇ m or more.
  • the upper limit of the length of the protrusion 41 along the second direction 102 (the fourth length B4) is not particularly limited, but may be, for example, 50 ⁇ m or less, 30 ⁇ m or less, or 10 ⁇ m or less. may be
  • the lower limit of the length (fourth length B4) of protrusion 41 along second direction 102 is not particularly limited, but may be, for example, 1 ⁇ m or more, 2 ⁇ m or more, or 5 ⁇ m or more. may be
  • the width (fifth width A5) of the groove 35 along the first direction 101 may be T1/tan ⁇ , for example.
  • the width (fifth width A5) of groove 35 along first direction 101 may be, for example, 0.9 ⁇ (T1/tan ⁇ ) or more and 1.1 ⁇ (T1/tan ⁇ ) or less, or 0.8 x (T1/tan ⁇ ) or more and 1.2 x (T1/tan ⁇ ) or less.
  • the upper limit of the length of groove 35 (fifth length B5) along second direction 102 is not particularly limited, but may be, for example, 30 ⁇ m or less, 20 ⁇ m or less, or 5 ⁇ m or less. There may be.
  • the lower limit of the length of groove 35 along second direction 102 (fifth length B5) is not particularly limited, but may be, for example, 0.1 ⁇ m or more, or 0.5 ⁇ m or more. , 1 ⁇ m or more.
  • stacking faults 42 are connected to threading screw dislocations 46 .
  • Threading screw dislocations 46 continuously extend from first principal surface 1 to interface 3 .
  • the direction in which the threading screw dislocation 46 extends is the fourth direction 104 .
  • the fourth direction 104 is, for example, the ⁇ 0001> direction.
  • a third direction 103 is a direction perpendicular to the second main surface 2 . From another point of view, the third direction 103 is a direction perpendicular to each of the first direction 101 and the second direction 102 . of the fourth direction 104 with respect to the third direction 103 corresponds to the off angle of the second main surface 2 .
  • the stacking fault 42 is in contact with the threading screw dislocation 46 at the interface 3 .
  • the stacking fault 42 has a top surface 44 , side portions 45 and a bottom surface 43 .
  • the bottom surface 43 continues to threading screw dislocations 46 at the interface 3 .
  • Top surface 44 is spaced from threading screw dislocation 46 .
  • the bottom surface 43 is in contact with the protrusion 41 .
  • the top surface 44 is in contact with the protrusion 41 .
  • the side portion 45 is spaced apart from the projection portion 41 .
  • Side 45 is the boundary between top surface 44 and bottom surface 43 .
  • the bottom surface 43 may be located on the ⁇ 0001 ⁇ plane, for example.
  • the ⁇ 0001 ⁇ plane is inclined with respect to the second main surface 2 .
  • the top surface 44 continues to the side portion 45 .
  • the top surface 44 may be slanted with respect to the bottom surface 43 when viewed along the second direction 102 .
  • the top surface 44 may be inclined with respect to the second principal surface 2 .
  • the bottom surface 43 is inclined with respect to the second main surface 2 .
  • the polytype of silicon carbide forming stacking fault 42 may be different from the polytype of silicon carbide forming silicon carbide substrate 11 .
  • the depth (fifth depth C5) of the groove 35 formed by the top surface 44 of the stacking fault 42 is, for example, 0.1 ⁇ m or less.
  • the upper limit of the depth (fifth depth C5) of groove 35 formed by top surface 44 of stacking fault 42 is not particularly limited, but may be, for example, 0.08 ⁇ m or less, or 0.06 ⁇ m or less. good too.
  • the lower limit of the depth (fifth depth C5) of groove 35 formed by top surface 44 of stacking fault 42 is not particularly limited, but may be, for example, 0.001 ⁇ m or more, or 0.01 ⁇ m or more. good too.
  • the depth of the groove 35 may increase with distance from the protrusion 41 .
  • the fifth depth C5 is the depth of the groove 35 at the deepest position.
  • the height of the protrusion 41 (fourth height C4) is, for example, 0.05 ⁇ m or less.
  • the upper limit of the height (fourth height C4) of the projection 41 in the direction perpendicular to the second main surface 2 is not particularly limited, but may be, for example, 0.03 ⁇ m or less, or 0.01 ⁇ m. It may be below.
  • the lower limit of the height (fourth height C4) of the protrusion 41 is not particularly limited, but may be, for example, 0.001 ⁇ m or more, or 0.003 ⁇ m. or more.
  • surface density of three-dimensional oblique defects 40 in second main surface 2 is, for example, 0.006/cm 2 or more and 0.2/cm 2 or less.
  • the lower limit of the surface density of the three-dimensional oblique defects 40 on the second main surface 2 is not particularly limited, but may be, for example, 0.012/cm 2 or more, or 0.024/cm 2 or more. good.
  • the upper limit of the surface density of the three-dimensional oblique defects 40 on the second main surface 2 is not particularly limited, but may be, for example, 0.15/cm 2 or less, or 0.1/cm 2 or less. good.
  • FIG. 11 is a schematic plan view showing a photoluminescence image of a three-dimensional oblique defect 40.
  • FIG. The schematic diagram of the image shown in FIG. 11 is a schematic diagram of an image obtained by photographing the same region as the image shown in FIG.
  • the stacking faults 42 are triangular when viewed in a direction perpendicular to the second main surface 2 .
  • the region of the stacking fault 42 and the region around the stacking fault 42 have different contrasts (brightness and darkness).
  • the region of stacking fault 42 appears darker than the region around stacking fault 42 .
  • the stacking fault 42 has a first side 47 , a second side 48 and a vertex 49 .
  • the vertex 49 is located on the protrusion 41 when viewed in a direction perpendicular to the second main surface 2 .
  • Each of the first side 47 and the second side 48 continues to the vertex 49 .
  • each of the first side 47 and the second side 48 continues to the side portion 45 when viewed in a direction perpendicular to the second main surface 2 .
  • the side portion 45 may extend along the second direction 102 .
  • Each of the first side 47 and the second side 48 may be inclined with respect to the first direction 101 .
  • the distance between the first side 47 and the second side 48 along the second direction 102 may monotonically increase from the vertex 49 toward the side portion 45 .
  • the stereoscopic oblique defect 40 can be identified by using both a defect inspection device having a confocal differential interference contrast microscope and a photoluminescence imaging device.
  • a defect inspection apparatus having a confocal differential interference contrast microscope is, for example, WASAVI series "SICA 6X” manufactured by Lasertec Corporation.
  • the photoluminescence imaging device is, for example, a photoluminescence imaging device manufactured by Photon Design Co., Ltd. (model number: PLI-200-SMH5).
  • photoluminescence light generated from the region to be measured is imaged by the light receiving element. As described above, a photoluminescence image of the area to be measured is captured.
  • the energy of the excitation light is higher than the energy of the bandgap of hexagonal silicon carbide.
  • a mercury-xenon lamp for example, is used as the excitation light source.
  • the wavelength of the excitation light is, for example, 313 nm.
  • the intensity of the excitation light is, for example, 0.1 mW/cm 2 or more and 2 W/cm 2 or less.
  • the exposure time of the irradiation light is, for example, 0.5 seconds or more and 120 seconds or less.
  • a photoluminescence image is captured in the entire region of second main surface 2 .
  • the area of the measurement field of view is, for example, 2.6 mm ⁇ 2.6 mm. Thereby, the photoluminescence image in the entire area of the second main surface 2 is mapped. A stereo oblique defect 40 is observed in the acquired photoluminescence image.
  • the stereoscopic oblique defect 40 is identified by using a confocal differential interference contrast image (SICA image) measured by a defect inspection device having a confocal differential interference microscope and a photoluminescence image measured by a photoluminescence imaging device. be able to.
  • SICA image a confocal differential interference contrast image
  • a three-dimensional oblique defect 40 has a protrusion 41 and a groove 35 continuing from the protrusion 41 .
  • the stereoscopic oblique defect 40 has a triangular shape. That is, in the SICA image, the three-dimensional oblique defect 40 is a defect that has the projection 41 and the groove 35 connected to the projection 41 and has a triangular shape in the photoluminescence image.
  • a confocal differential interference contrast image (SICA image) in the entire measurement area of the second main surface 2 of the silicon carbide epitaxial substrate 100 is measured. Based on the SICA image, the total number of stereoscopic oblique defects 40 defined by the confocal differential interference contrast image (SICA image) is counted on the second main surface 2 .
  • SICA image confocal differential interference contrast image
  • a photoluminescence imaging device the shape of the defect judged to be the stereoscopic oblique defect 40 in the SICA image is observed.
  • the defect is determined to be a stereoscopic oblique defect 40 .
  • the defect is determined not to be the stereoscopic oblique defect 40 .
  • a defect judged to be a stereoscopic oblique defect 40 in both the confocal differential interference contrast image (SICA image) and the photoluminescence image is a true stereoscopic oblique defect 40 .
  • the area density of the three-dimensional oblique defects 40 is a value obtained by dividing the total number of true three-dimensional oblique defects 40 on the second main surface 2 by the area of the second main surface 2 .
  • the area within 5 mm from the outer peripheral side surface 9 is excluded from the area density measurement area of the three-dimensional oblique defect 40 (edge exclusion).
  • FIG. 12 is a schematic partial cross-sectional view showing the configuration of an apparatus for manufacturing silicon carbide epitaxial substrate 100.
  • Manufacturing apparatus 200 for silicon carbide epitaxial substrate 100 is, for example, a hot wall type horizontal CVD (Chemical Vapor Deposition) apparatus.
  • manufacturing apparatus 200 for silicon carbide epitaxial substrate 100 includes reaction chamber 201, gas supply unit 235, control unit 245, heating element 203, quartz tube 204, and heat insulating material (not shown). , an induction heating coil (not shown).
  • the heating element 203 has, for example, a cylindrical shape and forms a reaction chamber 201 inside.
  • the heating element 203 is made of graphite, for example.
  • the heating element 203 is provided inside the quartz tube 204 .
  • the heat insulating material surrounds the outer circumference of the heating element 203 .
  • the induction heating coil is wound along the outer peripheral surface of the quartz tube 204, for example.
  • the induction heating coil is configured such that an alternating current can be supplied from an external power supply (not shown). Thereby, the heating element 203 is induction-heated. As a result, reaction chamber 201 is heated by heating element 203 .
  • the reaction chamber 201 is a space surrounded by the inner wall surface 205 of the heating element 203 .
  • Reaction chamber 201 is provided with a susceptor 210 that holds silicon carbide substrate 11 .
  • Susceptor 210 is made of silicon carbide. Silicon carbide substrate 11 is placed on susceptor 210 .
  • a susceptor 210 is placed on the stage 202 .
  • the stage 202 is rotatably supported by a rotating shaft 209 . Rotation of the stage 202 causes the susceptor 210 to rotate.
  • Manufacturing apparatus 200 for silicon carbide epitaxial substrate 100 further has gas introduction port 207 and gas exhaust port 208 .
  • the gas exhaust port 208 is connected to an exhaust pump (not shown). Arrows in FIG. 12 indicate gas flows.
  • a gas is introduced into the reaction chamber 201 through a gas inlet 207 and exhausted through a gas exhaust port 208 .
  • the pressure inside the reaction chamber 201 is adjusted by the balance between the amount of gas supplied and the amount of gas exhausted.
  • the gas supply unit 235 is configured to be able to supply a mixed gas containing a raw material gas, a dopant gas, and a carrier gas to the reaction chamber 201 .
  • the gas supply section 235 includes a first gas supply section 231, a second gas supply section 232, a third gas supply section 233, and a fourth gas supply section 234, for example.
  • the first gas supply unit 231 is configured to be able to supply a first gas containing carbon atoms, for example.
  • the first gas supply unit 231 is, for example, a gas cylinder filled with the first gas.
  • the first gas is, for example, propane (C 3 H 8 ) gas.
  • the first gas may be, for example, methane (CH 4 ) gas, ethane (C 2 H 6 ) gas, acetylene (C 2 H 2 ) gas, or the like.
  • the second gas supply unit 232 is configured to be able to supply a second gas containing, for example, silane gas.
  • the second gas supply unit 232 is, for example, a gas cylinder filled with the second gas.
  • the second gas is, for example, silane (SiH 4 ) gas.
  • the second gas may be a mixed gas of silane gas and a gas other than silane.
  • the third gas supply unit 233 is configured to be able to supply a third gas containing nitrogen atoms, for example.
  • the third gas supply unit 233 is, for example, a gas cylinder filled with the third gas.
  • a third gas is a doping gas.
  • the third gas is ammonia gas, for example. Ammonia gas is more likely to be thermally decomposed than nitrogen gas having triple bonds.
  • the fourth gas supply unit 234 is configured to be able to supply a fourth gas (carrier gas) such as hydrogen.
  • the fourth gas supply unit 234 is, for example, a gas cylinder filled with hydrogen.
  • the fourth gas may be argon gas.
  • the control section 245 is configured to be able to control the flow rate of the mixed gas supplied from the gas supply section 235 to the reaction chamber 201 .
  • the control unit 245 may include a first gas flow control unit 241, a second gas flow control unit 242, a third gas flow control unit 243, and a fourth gas flow control unit 244. good.
  • Each control unit may be, for example, an MFC (Mass Flow Controller).
  • the control section 245 is arranged between the gas supply section 235 and the gas introduction port 207 .
  • FIG. 13 is a flow chart schematically showing a method for manufacturing silicon carbide epitaxial substrate 100 according to the present embodiment.
  • the method for manufacturing silicon carbide epitaxial substrate 100 according to the present embodiment comprises a step of forming a silicon carbide epitaxial layer on the silicon carbide substrate (S10), and chemically mechanically applying the silicon carbide epitaxial layer to the silicon carbide epitaxial layer (S10). It mainly has a step of polishing (S20).
  • silicon carbide substrate 11 is prepared by slicing an ingot made of a silicon carbide single crystal manufactured by, for example, a sublimation method with a wire saw.
  • Silicon carbide substrate 11 is made of silicon carbide of polytype 4H, for example.
  • Silicon carbide substrate 11 has a diameter of, for example, 100 mm or more.
  • Silicon carbide substrate 11 has a thickness of, for example, 500 ⁇ m or less.
  • Silicon carbide substrate 11 contains n-type impurities such as nitrogen. The n-type impurity concentration is, for example, 1 ⁇ 10 15 cm ⁇ 3 or more and 1 ⁇ 10 19 cm ⁇ 3 or less.
  • a step (S10) of forming a silicon carbide epitaxial layer on the silicon carbide substrate is performed.
  • silicon carbide substrate 11 is placed on susceptor 210 .
  • the reaction chamber 201 is then depressurized. Specifically, the pressure in the reaction chamber 201 is reduced from the atmospheric pressure to about 1 ⁇ 10 ⁇ 6 Pa, for example.
  • temperature rise of silicon carbide substrate 11 is started. During the temperature rise, hydrogen (H 2 ) gas, which is a carrier gas, is introduced into the reaction chamber 201 from the fourth gas supply section 234 .
  • H 2 hydrogen
  • source gas, dopant gas and carrier gas are supplied to reaction chamber 201 .
  • a mixed gas containing, for example, silane, propane, ammonia, and hydrogen is introduced into reaction chamber 201 .
  • Each gas is thermally decomposed in the reaction chamber 201 .
  • the growth temperature is, for example, 1500° C. or higher and 1750° C. or lower.
  • the mixed gas may contain argon instead of hydrogen.
  • the flow rate of the first gas is, for example, 29 sccm.
  • the flow rate of the second gas is, for example, 46 sccm.
  • the flow rate of the third gas is, for example, 1.5 sccm.
  • the flow rate of the fourth gas is 100 slm, for example.
  • the reaction chamber 201 is maintained at a pressure of, for example, 2 kPa or more and 6 kPa or less.
  • silicon carbide epitaxial layer 22 is formed on silicon carbide substrate 11 .
  • FIG. 14 is a schematic cross-sectional view showing a step of performing chemical mechanical polishing on silicon carbide epitaxial layer 22 . As shown in FIG. 14, a portion of silicon carbide epitaxial layer 22 is removed by performing chemical mechanical polishing on the silicon carbide epitaxial layer.
  • a removal amount T2 of silicon carbide epitaxial layer 22 is, for example, 0.1 ⁇ m or more and 0.4 ⁇ m or less.
  • the upper limit of removal amount T2 of silicon carbide epitaxial layer 22 is not particularly limited, but may be, for example, 0.35 ⁇ m or less, or may be 0.3 ⁇ m or less.
  • the lower limit of removal amount T2 of silicon carbide epitaxial layer 22 is not particularly limited, but may be, for example, 0.12 ⁇ m or more, or may be 0.15 ⁇ m or more.
  • FIG. 15 is a schematic cross-sectional view showing the configuration of a chemical mechanical polishing apparatus.
  • chemical mechanical polishing apparatus 300 has polishing cloth 301 , polishing head 302 and vacuum pump 304 .
  • Polishing cloth 301 is, for example, suede.
  • the polishing liquid 310 contains abrasive grains 312 and an oxidizing agent 311, for example.
  • Abrasive grains 312 are colloidal silica.
  • Abrasive grain 312 should not be, for example, fumed silica or alumina.
  • the oxidizing agent 311 is, for example, hydrogen peroxide water.
  • polishing head 302 is, for example, ceramics or stainless steel.
  • Chemical mechanical polishing is performed on second main surface 2 of silicon carbide epitaxial substrate 100 to effectively reduce the surface density of pits, the surface density of bumps, and the surface density of three-dimensional oblique defects without processing damage such as scratches. can be reduced.
  • Second main surface 2 of silicon carbide epitaxial substrate 100 is arranged to face polishing cloth 301 .
  • a polishing liquid 310 containing abrasive grains 312 is supplied between the second main surface 2 and the polishing cloth 301 .
  • the rotation speed of the polishing head 302 is, for example, 60 rpm.
  • the rotation speed of the surface plate provided with the polishing cloth 301 is, for example, 60 rpm.
  • a processing pressure F is, for example, 500 g/cm 2 .
  • silicon carbide epitaxial substrate 100 may be cleaned using a cleaning liquid such as pure water, acid or alkali. As described above, silicon carbide epitaxial substrate 100 according to the present embodiment is manufactured.
  • FIG. 16 is a flow chart schematically showing a method for manufacturing silicon carbide semiconductor device 400 according to the present embodiment.
  • the method for manufacturing silicon carbide semiconductor device 400 according to the present embodiment mainly includes a step of preparing a silicon carbide epitaxial substrate (S1) and a step of processing the silicon carbide epitaxial substrate (S2). have in
  • the step (S1) of preparing a silicon carbide epitaxial substrate is performed.
  • silicon carbide epitaxial substrate 100 according to the present embodiment is prepared (see FIG. 1).
  • silicon carbide epitaxial substrate 100 is processed as follows. First, ion implantation is performed on silicon carbide epitaxial substrate 100 . A body region, for example, is implemented in silicon carbide epitaxial layer 22 .
  • FIG. 17 is a schematic cross-sectional view showing the step of forming the body region. Specifically, a p-type impurity such as aluminum is ion-implanted into second main surface 2 of silicon carbide epitaxial layer 22 . Thereby, body region 13 having p-type conductivity is formed. A portion of silicon carbide epitaxial layer 22 where body region 13 is not formed serves as drift region 21 . Body region 13 has a thickness of, for example, 0.9 ⁇ m.
  • FIG. 18 is a schematic cross-sectional view showing a step of forming a source region.
  • an n-type impurity such as phosphorus is ion-implanted into body region 13 .
  • source region 14 having n-type conductivity is formed.
  • the thickness of source region 14 is, for example, 0.4 ⁇ m.
  • the concentration of n-type impurities contained in source region 14 is higher than the concentration of p-type impurities contained in body region 13 .
  • a contact region 18 is formed by ion-implanting a p-type impurity such as aluminum into the source region 14 .
  • Contact region 18 is formed through source region 14 and body region 13 and in contact with drift region 21 .
  • the concentration of p-type impurities contained in the contact region 18 is higher than the concentration of n-type impurities contained in the source region 14 .
  • activation annealing is performed to activate the ion-implanted impurities.
  • the temperature of the activation annealing is preferably 1500°C or higher and 1900°C or lower, for example about 1700°C.
  • the activation annealing time is, for example, about 30 minutes.
  • the atmosphere for activation annealing is preferably an inert gas atmosphere, such as an argon atmosphere.
  • FIG. 19 is a schematic cross-sectional view showing a step of forming trenches in second main surface 2 of silicon carbide epitaxial layer 22 .
  • a mask 17 having an opening is formed on second main surface 2 comprising source region 14 and contact region 18 .
  • source region 14, body region 13 and part of drift region 21 are etched away.
  • As an etching method for example, reactive ion etching, especially inductively coupled plasma reactive ion etching can be used.
  • inductively coupled plasma reactive ion etching using SF 6 or a mixed gas of SF 6 and O 2 as a reactive gas can be used.
  • a concave portion is formed in the second main surface 2 by etching.
  • a thermal etch is then performed in the recess.
  • Thermal etching can be performed with mask 17 formed on second main surface 2, for example, by heating in an atmosphere containing reactive gas containing at least one type of halogen atom.
  • the at least one halogen atom includes at least one of chlorine (Cl) and fluorine (F) atoms.
  • the atmosphere includes, for example, Cl2 , BCl3 , SF6 or CF4 .
  • a mixed gas of chlorine gas and oxygen gas is used as a reaction gas, and thermal etching is performed at a heat treatment temperature of, for example, 700° C. or higher and 1000° C. or lower.
  • the reaction gas may contain a carrier gas in addition to the chlorine gas and the oxygen gas described above. Nitrogen gas, argon gas, or helium gas, for example, can be used as the carrier gas.
  • trenches 56 are formed in the second main surface 2 by thermal etching.
  • Trench 56 is defined by sidewall surfaces 53 and bottom wall surfaces 54 .
  • Sidewall surface 53 is formed of source region 14 , body region 13 and drift region 21 .
  • Bottom wall surface 54 is configured by drift region 21 .
  • Mask 17 is then removed from second main surface 2 .
  • FIG. 20 is a schematic cross-sectional view showing a step of forming a gate insulating film.
  • silicon carbide epitaxial substrate 100 having trenches 56 formed in second main surface 2 is heated, for example, at a temperature of 1300° C. or more and 1400° C. or less in an atmosphere containing oxygen.
  • bottom wall surface 54 is in contact with drift region 21
  • side wall surface 53 is in contact with each of drift region 21 , body region 13 and source region 14
  • second main surface 2 is in contact with each of source region 14 and contact region 18 .
  • a contacting gate insulating film 15 is formed.
  • FIG. 21 is a schematic cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film.
  • Gate electrode 27 is formed in contact with gate insulating film 15 inside trench 56 .
  • Gate electrode 27 is arranged inside trench 56 and is formed on gate insulating film 15 so as to face each of sidewall surface 53 and bottom wall surface 54 of trench 56 .
  • the gate electrode 27 is formed, for example, by LPCVD (Low Pressure Chemical Vapor Deposition).
  • Interlayer insulating film 26 is formed to cover gate electrode 27 and to be in contact with gate insulating film 15 .
  • Interlayer insulating film 26 is formed by chemical vapor deposition, for example.
  • Interlayer insulating film 26 is made of a material containing, for example, silicon dioxide.
  • portions of interlayer insulating film 26 and gate insulating film 15 are etched so that openings are formed over source region 14 and contact region 18 . This exposes the contact region 18 and the source region 14 from the gate insulating film 15 .
  • Source electrode 16 is formed in contact with each of source region 14 and contact region 18 .
  • Source electrode 16 is formed by sputtering, for example.
  • Source electrode 16 is made of a material containing, for example, Ti (titanium), Al (aluminum) and Si (silicon).
  • source electrode 16 in contact with each of source region 14 and contact region 18 is held at a temperature of, for example, 900° C. or more and 1100° C. or less for about 5 minutes. As a result, at least part of the source electrode 16 is silicided. Thereby, the source electrode 16 that makes an ohmic contact with the source region 14 is formed. Preferably, the source electrode 16 makes an ohmic contact with the contact region 18 .
  • Source wiring 19 is formed.
  • Source wiring 19 is electrically connected to source electrode 16 .
  • Source wiring 19 is formed to cover source electrode 16 and interlayer insulating film 26 .
  • a step of forming a drain electrode is performed. First, silicon carbide substrate 11 is polished on first main surface 1 . Thereby, the thickness of silicon carbide substrate 11 is reduced. Next, a drain electrode 23 is formed. Drain electrode 23 is formed in contact with first main surface 1 . As described above, silicon carbide semiconductor device 400 according to the present embodiment is manufactured.
  • FIG. 22 is a schematic cross-sectional view showing the configuration of the silicon carbide semiconductor device according to this embodiment.
  • Silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • Silicon carbide semiconductor device 400 mainly includes silicon carbide epitaxial substrate 100 , gate electrode 27 , gate insulating film 15 , source electrode 16 , drain electrode 23 , source interconnection 19 , and interlayer insulating film 26 . ing.
  • Silicon carbide epitaxial substrate 100 has drift region 21 , body region 13 , source region 14 and contact region 18 .
  • Silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.
  • IGBT Insulated Gate Bipolar Transistor
  • an oxide film may be formed on the main surface of silicon carbide epitaxial substrate 100 .
  • the main surface of silicon carbide epitaxial substrate 100 has unevenness, the thickness of the oxide film formed on the main surface of silicon carbide epitaxial substrate 100 varies. Further, if a defect exists in the main surface of silicon carbide epitaxial substrate 100, the film quality of the oxide film formed on the defect deteriorates. As a result, the reliability of silicon carbide semiconductor device 400 is lowered.
  • the main surface of silicon carbide epitaxial substrate 100 may be polished.
  • main surface 2 of silicon carbide epitaxial substrate 100 is polished while silicon carbide epitaxial substrate 100 is pressed against polishing cloth 301 .
  • the inventors have found that the formation of scratches 30 on main surface 2 of silicon carbide epitaxial substrate 100 can be suppressed by optimizing the polishing conditions in the chemical mechanical polishing step during polishing. It has been found that the surface density of each of the pits 10 and the bumps 20 can be suppressed while maintaining the same. As a result, reliability of silicon carbide semiconductor device 400 can be improved.
  • surface density of pits 10 in main surface 2 is 1/cm 2 or less.
  • the surface density of bumps 20 on main surface 2 is less than 0.7/cm 2 .
  • the area of pit 10 is 100 ⁇ m 2 or less, and the area of bump 20 is 100 ⁇ m 2 or less.
  • pit 10 has a depth of 0.01 ⁇ m or more and 0.1 ⁇ m or less, and bump 20 has a height of 0.01 ⁇ m or more and 0.1 ⁇ m or less. That is, the surface density of each of pits 10 and bumps 20 is reduced on main surface 2 . Therefore, when an oxide film is formed on main surface 2 of silicon carbide epitaxial substrate 100, deterioration of the quality of the oxide film can be suppressed. As a result, reliability of silicon carbide semiconductor device 400 can be improved.
  • silicon carbide epitaxial layer 22 may have a thickness of 15 ⁇ m or more. Pits 10 and bumps 20 are more likely to occur when silicon carbide epitaxial layer 22 is thicker than when silicon carbide epitaxial layer 22 is thin. According to silicon carbide epitaxial substrate 100 according to the present disclosure, generation of pits 10 and bumps 20 can be significantly suppressed when silicon carbide epitaxial layer 22 has a large thickness.
  • surface density of sterically oblique defects 40 on main surface 2 may be 0.006/cm 2 or more and 0.2/cm 2 or less. That is, the area density of the three-dimensional oblique defects 40 is reduced on the main surface 2 . Therefore, when an oxide film is formed on main surface 2 of silicon carbide epitaxial substrate 100, deterioration of the quality of the oxide film can be further suppressed. As a result, the reliability of silicon carbide semiconductor device 400 can be further improved.
  • surface density of scratches 30 on main surface 2 may be 1/cm 2 or less. That is, the surface density of the scratches 30 on the main surface 2 is reduced. Therefore, when an oxide film is formed on main surface 2 of silicon carbide epitaxial substrate 100, deterioration of the quality of the oxide film can be further suppressed. As a result, the reliability of silicon carbide semiconductor device 400 can be further improved.
  • silicon carbide epitaxial substrates 100 according to samples 1 to 3 and samples 6 to 10 were prepared.
  • the thickness of silicon carbide epitaxial layer 22 of silicon carbide epitaxial substrate 100 according to sample 1 to sample 3 was set to 10 ⁇ m.
  • the thickness of silicon carbide epitaxial layer 22 of silicon carbide epitaxial substrate 100 according to samples 6 to 10 was set to 30 ⁇ m.
  • the conditions of the chemical mechanical polishing step in the steps of manufacturing silicon carbide epitaxial substrates according to samples 1 to 3 and samples 6 to 10 were as follows.
  • a hydrogen peroxide solution (H 2 O 2 ) was used as the oxidizing agent.
  • DSC-0902 manufactured by Fujimi Incorporated was used as a polishing liquid containing an oxidizing agent and abrasive grains.
  • the polishing cloth 301 was G804W manufactured by Fujibo Ehime.
  • the polishing cloth 301 has high hardness and low compressibility.
  • a removal amount T2 of silicon carbide epitaxial layer 22 in the chemical mechanical polishing step was set to 0.1 ⁇ m.
  • the rotation speed of the polishing head 302 was set to 60 rpm.
  • the rotating speed of the platen was 60 rpm.
  • the processing pressure F was set to 500 g/cm 2 .
  • the surface density of each of the pits and bumps was measured using the WASAVI series "SICA 6X” manufactured by Lasertec Corporation. The method for measuring the surface density of each of pits and bumps was as described above.
  • the areal density of three-dimensional oblique defects was measured using a WASAVI series "SICA 6X” manufactured by Lasertec Co., Ltd. and a photoluminescence imaging device "PLI-200-SMH5" manufactured by Photon Design Co., Ltd. The method for measuring the areal density of three-dimensional oblique defects was as described above.
  • Table 1 shows the surface density of pits, the surface density of bumps, and the surface density of three-dimensional oblique defects of silicon carbide epitaxial substrates 100 according to samples 1 to 3 and samples 6 to 10.
  • the areal density of each of pits, bumps and stereoscopic oblique defects after chemical mechanical polishing (CMP) is It was lower than the area density of each of pits, bumps and stereoscopic oblique defects before polishing (CMP).
  • the areal density of bumps on the second main surface 2 of the silicon carbide epitaxial layer 22 is , 0.02 pieces/cm 2 or more and 0.04 pieces/cm 2 or less.
  • the surface density of pits on second main surface 2 of silicon carbide epitaxial layer 22 was 0.17/cm 2 or more and 0.25/cm 2 or less.
  • the areal density of cubic oblique defects in second main surface 2 of silicon carbide epitaxial layer 22 was 0.04/cm 2 or more and 0.15/cm 2 or less.
  • the areal density of bumps on the second main surface 2 of the silicon carbide epitaxial layer 22 is , 0.02 pieces/cm 2 or more and 0.08 pieces/cm 2 or less.
  • the areal density of pits on second main surface 2 of silicon carbide epitaxial layer 22 was 0.23/cm 2 or more and 0.98/cm 2 or less.
  • the areal density of cubic oblique defects in second main surface 2 of silicon carbide epitaxial layer 22 was 0.07/cm 2 or more and 0.14/cm 2 or less.
  • silicon carbide epitaxial substrates 100 according to samples 1 to 3 and samples 6 to 10 no scratches were formed on the second main surface 2 of the silicon carbide epitaxial layer 22 after chemical mechanical polishing (CMP).
  • CMP chemical mechanical polishing
  • silicon carbide epitaxial layer 22 As the thickness of silicon carbide epitaxial layer 22 increases, the surface density of each of pits, bumps, and oblique cubic defects in silicon carbide epitaxial layer 22 tends to increase. As shown in Table 1, compared to the silicon carbide epitaxial substrates 100 of samples 1 to 3, in which the silicon carbide epitaxial layer 22 has a thickness of 10 ⁇ m, samples 6 to 10, in which the silicon carbide epitaxial layer 22 has a thickness of 30 ⁇ m, have a thickness of 30 ⁇ m. Silicon carbide epitaxial substrate 100 had a high surface density of pits, bumps, and cubic oblique defects before CMP polishing.

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