WO2022219283A1 - Procédé de fabrication d'une structure multicouche - Google Patents
Procédé de fabrication d'une structure multicouche Download PDFInfo
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- WO2022219283A1 WO2022219283A1 PCT/FR2022/050691 FR2022050691W WO2022219283A1 WO 2022219283 A1 WO2022219283 A1 WO 2022219283A1 FR 2022050691 W FR2022050691 W FR 2022050691W WO 2022219283 A1 WO2022219283 A1 WO 2022219283A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/12—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
- B32B37/1284—Application of adhesive
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/06—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the heating method
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/10—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the pressing technique, e.g. using action of vacuum or fluid pressure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
- B32B38/0036—Heat treatment
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B38/00—Ancillary operations in connection with laminating processes
- B32B38/10—Removing layers, or parts of layers, mechanically or chemically
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
- B32B7/04—Interconnection of layers
- B32B7/12—Interconnection of layers using interposed adhesives or interposed materials with bonding properties
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P10/00—Bonding of wafers, substrates or parts of devices
- H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P10/00—Bonding of wafers, substrates or parts of devices
- H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
- H10P10/126—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates characterised by the composition of the bonding layer, e.g. dopant concentration or stoichiometry
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/14—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
- B32B37/24—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer not being coherent before laminating, e.g. made up from granular material sprinkled onto a substrate
- B32B2037/243—Coating
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2307/00—Properties of the layers or laminate
- B32B2307/70—Other properties
- B32B2307/732—Dimensional properties
- B32B2307/737—Dimensions, e.g. volume or area
- B32B2307/7375—Linear, e.g. length, distance or width
- B32B2307/7376—Thickness
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2315/00—Other materials containing non-metallic inorganic compounds not provided for in groups B32B2311/00 - B32B2313/04
- B32B2315/02—Ceramics
Definitions
- TITLE Process for manufacturing a multilayer structure
- the present invention relates to the field of the manufacture of advanced substrates for applications in electronics (for example for MEMS) in microelectronics, in optoelectronics (for example for LEDs), in power electronics in RF, for packaging and transfer handles.
- the invention relates to a method for manufacturing a multilayer structure, resistant to high temperatures, and in particular a structure of the SeOi type (for Semiconductor On Insulator) proposing a semiconducting layer separated from a support substrate by a thick layer with adjustable properties, for example for the integration of RF components.
- the invention also relates to a multilayer structure obtained by said manufacturing method.
- the present invention proposes a method for manufacturing a multilayer structure intended for applications in the field of microelectronics, the method comprising the following steps: a) providing a first substrate, b) depositing a thick layer of a precursor formulation comprising a preceramic polymer loaded with inorganic particles on the first substrate, c) providing a second substrate, d) bonding the thick layer and the second substrate, e) thinning of the first substrate or of the second substrate so as to obtain an active layer, intended in particular to receive electronic devices, f) application of a pyrolysis heat treatment so as to ceramize the preceramic polymer of the thick layer and obtain a composite material with a ceramic matrix, the degree of charge and the nature of the inorganic particles being chosen so that the thick layer has a coefficient of thermal expansion which differs, at most, by 15% from that of the first
- the manufacturing method according to the invention thus makes it possible to obtain a multilayer structure whose properties of the thick layer and in particular the coefficient of thermal expansion (also known by the Anglo-Saxon acronym CTE for Coefficient of Thermal Expansion) can be modulated to be compatible with the CTEs of the first substrate and of the second substrate.
- the structure can be advantageously used in processes or applications involving large thermal changes.
- preceramic polymer and inorganic particles ensures that the polymer suitable for the targeted multilayer structure can be chosen, by its properties and its compatibility with the substrate on which it is deposited.
- the preceramic polymer and the inorganic particles are chosen so that, once crosslinked and pyrolyzed, the resulting composite material has a coefficient of thermal expansion close to that of the first and/or second support.
- the constituent materials of the multilayer structure expand and contract in a similar way during temperature changes, which avoids stresses in the structure that can damage the layers by the appearance of cracks, defects, or even delamination of the layers.
- the thick layer can be electrically insulating while having a high heat dissipation capacity. This is particularly advantageous for regulating the temperature of the structure, in particular when it is used in applications comprising components of the transistor type, the working temperature of which can reach 800° C.
- the thick layer according to the invention thus allows great modularity.
- the preceramic polymer has the advantage of excellent temperature resistance.
- a preceramic polymer is an organic/inorganic polymer which is generally used in order to produce, after heat treatment at high temperature, ceramic objects called PDC (Angio-Saxon acronym for “Polymer Derived Ceramics”).
- PDC Angio-Saxon acronym for “Polymer Derived Ceramics”.
- This allows the structure to undergo heat treatments at high temperatures, in particular during healing of the defects generated by an implantation of ionic species for the thinning of a substrate for example.
- this process guarantees the stability of the assembly of the multilayer structure during its manufacturing process, in particular despite a pyrolysis step of the preceramic polymer, and also to resist a high working temperature (related to the electronic components of the active layer).
- the preceramic polymer is a binder of the inorganic particles.
- ceramization by pyrolysis in particular around 1000° C., it leads to the formation of a ceramic matrix in which the inorganic particles are coated.
- the PDC ceramic matrix obtained is mainly amorphous, or even totally amorphous, and forms a binder for the inorganic particles distributed homogeneously in the matrix without coalescence with each other. Pyrolysis also makes it possible to compact the thick layer. Also, ie pre-sintering or sintering of the ceramic which takes place at a temperature higher than that of the pyrolysis is not necessary for the targeted applications, which advantageously limits the manufacturing costs.
- the manufacturing process makes it possible to achieve in a simple and reliable way a multilayer structure that is stable at high temperatures and whose properties can easily be modulated for the targeted applications.
- active layer' we mean a layer of semiconductor material in which the electrical events take place.
- the precursor formulation of the thick layer deposited in step a) comprises a loading rate of inorganic particles in a range ranging from 50% to 80% by volume relative to the volume of the preceramic polymer.
- This filler rate makes it possible to impart the desired properties to the thick layer, in particular in terms of thermal expansion coefficient. This also makes it possible to limit the dimensional losses of the preceramic polymer during ceramization. Indeed the use of preceramic polymers induces a significant dimensional change during the pyrolysis allowing the conversion of the polymer into ceramic. This generates residual mechanical stresses leading to the formation of defects, cracks and sometimes the collapse of the layer when the preceramic polymer is shaped. The presence of fillers thus makes it possible to limit the loss of volume. Furthermore, the filler levels remain sufficiently low to guarantee the presence of a sufficient quantity of preceramic polymer in the layer. The material retains its role as a binder for inorganic particles, before and after ceramization.
- the inorganic particles are chosen from Si 3 N 4 , SiC, GAIN, GAI 2 O 3 and a mixture of these inorganic particles. These particles, considered as such or as a mixture, are used to give the preceramic polymer and the ceramic matrix a CTE close to that of the semiconductor materials that can be used in the multilayer structure.
- the size of the particles used varies from a few nanometers to a hundred micrometers, it is mainly chosen in relation to the thickness of the desired layer.
- a size of less than 1 micrometer will be preferred, while it will be possible to use the entire aforementioned range for a thick layer of several hundred micrometers.
- the method comprises, before step d) of bonding, a step of grinding the thick layer, so as to smooth the surface and achieve the desired layer thickness.
- the thickness of the thick layer is between 10 and 500 micrometers.
- the thick layer loses between 20% and 50% of its initial thickness during ceramization.
- the thickness of the ceramized thick layer is between about 5 and 400 micrometers after step f) starting from a thick layer with a thickness of between 10 and 500 micrometers before ceramization.
- the preceramic polymer of the precursor formulation is chosen from polysiloxanes, polycarbosilanes, polysilazanes, polyborosilanes, polysilsesquioxanes, polysilylcarbodlimides, polysilsesquicarbodiimides, polysilsesquiazane, polyborosiloxanes, polyborosilazanes and a combination of these polymers.
- the choice of the nature of the preceramic polymer depends on the properties targeted for the desired multilayer structure but also on its compatibility with the substrate on which it is deposited.
- Preceramic polymers derived from polysiloxanes, polycarbosilanes, and polysilazanes can contain metals such as Hf, Zr, Ti, Al.
- the targeted ceramic matrices are included among SiOxCy, where x is less than 2 and y is non-zero, SiCN, Si(M)OC, Si(M)C, Si(M)CN, and SiBCN.
- step b) of depositing the thick layer is carried out by coating or screen printing when the precursor formulation is liquid.
- a solvent can be added to the precursor formulation so as to obtain a liquid precursor formulation of the desired viscosity. It is chosen from xylene, MEK (for Methyl Ethyl Ketone or 2-butanone solvent available for example from Sigma Aldrich, Supelco, etc. or from Diestone DLS, (solvent composition supplied by the company Socomore.
- step b) of deposition of the thick layer is carried out by thermopressing.
- the preceramic polymer used is SILRES® MK POWDER and the inorganic particles are made of SiC, the whole leading to a ceramic with a CTE very close to that of silicon.
- the first substrate and the second substrate are made of silicon and the precursor formulation is prepared by mixing a preceramic polymer SILRES® MK POWDER in a proportion ranging from 2% to 4% by weight with inorganic particles of SiC in a proportion ranging from 65 to 72% by weight and a solvent, such as the solvent Diestone DLS, in a proportion ranging from 24% to 33% by weight.
- a preceramic polymer SILRES® MK POWDER in a proportion ranging from 2% to 4% by weight
- inorganic particles of SiC in a proportion ranging from 65 to 72% by weight
- a solvent such as the solvent Diestone DLS
- a mixture of inorganic particles can also be used instead of SiC, such as S13N 4 in a proportion of 75-85% mixed with GAI 2 O3 in a proportion of 15-25%.
- a mixture of S13N 4 in a proportion of 45-70% mixed with I ⁇ IN in a proportion of 30-55% also makes it possible to obtain a thick layer whose CTE differs by less than 10% from silicon.
- the bonding of step d) between the thick layer and the second substrate is carried out by means of a layer of adhesion primer, formed beforehand on the second substrate and/or on the thick layer.
- This layer improves the bonding energy between the thick layer and the material of the second substrate. This contributes to the mechanical strength of the multilayer structure when it is subjected to mechanical steps, such as grinding.
- the choice of the nature of the primer layer is made to confer resistance to the pyrolysis temperature and obtain good adhesion with the thick layer. It is thus chosen from preceramic polymers, existing in liquid or solid form, to which it is possible to add a solvent so as to modulate the viscosity and facilitate its application.
- the bonding primer layer has a thickness of between 1 and 10 micrometers. This thickness is sufficient to achieve its role of glue, and beyond that, it is likely to crack.
- the precursor formulation comprises a preceramic polymer material for adhesion, such as the polysiloxane SILRES® H62C available from Wacker.
- the preceramic adhesion polymer when the preceramic adhesion polymer is deposited on the second substrate, the latter is pre-crosslinked before being brought into contact with the thick layer of so as to allow good bonding.
- This step is carried out at a temperature lower than that of crosslinking of the polymer considered.
- This step consists of a step of stabilizing the preceramic polymer which makes it possible to reach a state just before the thermoset state of the polymer. At this stage, the polymer is deformable but not solubilisable.
- the pre-crosslinked preceramic adhesion polymer indeed has some non-crosslinked functions which allow it to bind to the thick layer.
- the pre-ceramic polymer of the thick layer is pre-crosslinked beforehand, for example by applying a heat treatment at a temperature below the cross-linking temperature of the pre-ceramic polymer , typically between 50 and 400°C.
- the pre-ceramic adhesion polymer (of the adhesion primer layer) is in the form of a solid powder, for example SILRES® MK POWDER, it can be dispensed onto the thick layer. Coiling will take place when the powder is melted.
- the bonding primer layer includes a filler rate of up to 50% of the total volume of the bonding preceramic formulation. This makes it possible to limit the volume shrinkage during the crosslinking of the bonding polymer and also to functionalize the primer layer according to the nature of the filler and the filler rate, such as providing electrical conductivity with Cu, Ag, Al or thermal with SiC, AIN, BN.
- the bonding of step d) comprises a step of bringing the thick layer and the second substrate into contact so as to form a stack and a step i) of thermopressing said stack.
- This step makes it possible to stabilize the bonding by increasing the bonding energy between the thick layer and the second substrate and the mechanical strength of the stack to lead to the multilayer structure.
- the contacting can be achieved by direct contact of the thick layer with ie second substrate or an indirect contacting, obtained by means of a layer of primer, as described above.
- step i) of thermopressing comprises the application of a crosslinking heat treatment at a temperature varying between 100°C to 400°C and a pressure of less than 500 kPa so as to obtain the crosslinking of the preceramic polymer thick layer.
- the use of pressure eliminates cumbersome surface preparation steps before bonding, however the higher the pressure, the more the surfaces must be planarized and free of dust to avoid the breakage of the substrate.
- the preceramic bonding polymer is also crosslinked by this step if necessary.
- the crosslinking heat treatment is applied by a heating ramp between 0.1 and 20° C./min and preferably between 0.5° C./min and 5° C./min and for example rC/min.
- the thinning according to step e) of the process is obtained by the Smart CutTM technology.
- the method comprises before step b) a step a1) of implanting ionic species in the first substrate so as to create an embrittlement plane, and the step e) of thinning comprises a fracture step along the embrittlement plane.
- the fracture stage can be obtained by applying a heat treatment followed or not by the application of a mechanical stress.
- a thermal pyrolysis treatment is then typically carried out as an extension of the fracture treatment, in a neutral atmosphere, such as under argon, which reinforces the bonding interface.
- a heating ramp is judiciously applied according to the thicknesses of the layers, the coefficients of thermal expansion and the materials considered so as to avoid deformations in the structure.
- Step i) of thermopressing can contribute to the fracture thermal budget according to step e) if necessary.
- the method comprises, after step a1) of implantation, a step a2) of depositing a stiffening layer on the implanted face.
- the stiffening layer is deposited before step b) of depositing the thick layer.
- the stiffening layer is formed in S13N4 by a low temperature deposition technique, such as PECVD at 300° C. over a thickness of between 500 nm and 4 microns.
- the material of the stiffening layer is stable at the pyrolysis temperature, and has a CTE close to that of the substrates.
- the deposition conditions used preserve the implanted zone so as not to generate a fracture at this stage of the process.
- the method comprises, before step b) of depositing the thick layer, the depositing of an additional layer of primer in preceramic polymer on the stiffening layer so as to improve the contact between the thick layer and the stiffening layer.
- This additional primer coat also provides an additional stiffening effect. The thickness of the stiffener layer can be reduced accordingly.
- the method provides for thinning carried out by rectification, so as to obtain an active layer thickness ranging from 10 micrometers to 140 micrometers, advantageously from 20 to 120 micrometers, and for example of 90 micrometers to 110 micrometers.
- step f) of the method comprises the application of a thermal pyrolysis treatment under vacuum in the presence of nitrogen or under an argon atmosphere.
- the pyrolysis is carried out under a controlled atmosphere. Pyrolysis in air, in the presence of oxygen, generates for example the undesired formation of an oxide often in the form of a powder.
- the temperature of the pyrolysis heat treatment is lower than the sintering temperature of the ceramic matrix. It depends on the nature of the preceramic polymer used.
- the invention proposes a multilayer structure intended for applications in microelectronics, the multilayer structure comprising a thick layer placed between an active layer and a support substrate consisting of one of a first substrate and a second substrate, the active layer resulting from the thinning of the other among the first substrate and the second substrate, the thick layer comprising, or being constituted by a composite material comprising, or being constituted by a ceramic matrix derived from a polymer and from inorganic particles , the nature and the rate of charge of inorganic particles of the composite material being chosen so that the thick layer has a CTE which differs at most by 15% from the CTE of the material of the support substrate and from that of the active layer, in particular which differs more than 10% of the CTE of the material of the support substrate and that of the active layer and for example which differs at most 5% from the CTE of the material of the support substrate and that of the active layer.
- the multilayer structure has very good mechanical resistance between ambient temperature and the temperature of use, for example 800-1000°C.
- the ceramic of the ceramic matrix is a ceramic derived from a polymer resulting from the pyrolysis of a preceramic polymer loaded with inorganic particles. Said ceramic matrix is devoid of any sintering. It is mostly amorphous, or even completely amorphous, which differs from sintered ceramic which is mostly polycrystalline.
- the first and the second substrate are made of the same material.
- the first substrate and/or the second substrate are made of monocrystalline silicon.
- the material of the active layer is chosen as a monocrystalline material in order to optimize the performance of the components.
- the multilayer structure comprises an active layer and a silicon support substrate, and in which the thick layer is a ceramic matrix of SiOxCy, with x less than 2 and y non-zero, and the inorganic particles consist of SiC .
- the method of manufacturing the multilayer structure of the invention and the multilayer structure itself comprises one or more of the following optional characteristics considered alone or in combination:
- the thick layer has a thickness of between 10 to 500 micrometers. Beyond that, the risk of cracks appearing increases during ceramization (in other words, during pyrolysis).
- the ceramized thick layer namely the thick layer comprising the ceramic matrix composite material and inorganic particles, has a thickness of between about 5 and 400 micrometers.
- the thick layer is bonded to the support substrate or to the active layer via a layer of primer.
- the primer layer is formed from a polysiloxane preceramic polymer, such as SILRES® H62C or SILRES® MK POWDER,
- the primer layer is formed from a composition comprising a polysiloxane preceramic polymer from SILRES® H62C in a proportion ranging from 70% to 80% by weight, diluted in a Diestone DLS solvent in a proportion ranging from 20% at 30% by weight.
- the primer layer has a thickness of between 1 and 10 micrometers.
- the active layer has a variable thickness between 1.4 micrometers and 100 micrometers.
- the active layer obtained by thinning by fracture advantageously has a thickness of between 1.4 and 1.6 micrometers.
- the active layer has a thickness of between 10 and 100 micrometers when it comes from a thinning of the first or second substrate by rectification.
- the materials of the first substrate and of the second substrate are chosen from semiconductor materials, in particular Si, Ge, GaN, and/or SiC.
- the materials of the first substrate and of the second substrate consist of two materials of different nature.
- the materials of the first substrate and of the second substrate consist of two materials of identical nature.
- the materials of the first substrate and/or of the second substrate are monocrystalline.
- Said multilayer structure thus formed is suitable for receiving treatments intended for the manufacture of electronic components, such as rectification, thinning, mechanical-chemical polishing, etching, deposition of dielectric or metal, deposition of au at least one layer, including an active layer intended to receive at least an electronic component, pattern formation, passivation, heat treatment, or a combination of at least one of these treatments.
- treatments intended for the manufacture of electronic components such as rectification, thinning, mechanical-chemical polishing, etching, deposition of dielectric or metal, deposition of au at least one layer, including an active layer intended to receive at least an electronic component, pattern formation, passivation, heat treatment, or a combination of at least one of these treatments.
- FIG. 1 is a schematic view illustrating a step a1) of implantation in a first substrate according to the first embodiment of the invention
- FIG. 2 is a schematic view illustrating a step a2) for depositing a stiffening layer according to the first embodiment of the invention
- FIG. 3 is a schematic view illustrating step b) of depositing a thick layer according to the first embodiment of the invention
- FIG. 4 is a schematic view illustrating step c) of supplying a second substrate covered with a layer of primer according to the first embodiment of the invention
- FIG. 5 is a schematic view illustrating step i) of thermopressing a thick layer in contact with the second substrate according to the first embodiment of the invention
- FIG. 6 is a schematic view illustrating step e) of thinning along a weakening plane according to the first embodiment of the invention
- FIG. 7 is a schematic view illustrating a multilayer structure obtained according to the first embodiment of the invention.
- FIG. 8 is a schematic view illustrating step b) of depositing a thick layer according to a second embodiment of the invention
- FIG. 9 is a schematic view illustrating a thermopressing step i) according to the embodiment of Figure 8,
- FIG. 10 is a schematic view illustrating the thinning step e) according to the embodiment of figure 8.
- FIGS. 1 to 7 A first embodiment of the method of the invention is illustrated in FIGS. 1 to 7, in which a multilayer structure 100 is obtained by Smart CutTM technology.
- a first silicon substrate 1 is provided (step a) then implanted by hydrogen ions with an energy of 160 keV so as to obtain a weakening yaws 2 deep enough in the substrate 1 (step a1).
- a step a2) of depositing a stiffening layer 3 of S13N4 is then carried out on the implanted face of the first substrate 1 (FIG. 2).
- the deposition is carried out by a low temperature technique, such as PECVD at 300° C. with a thickness of approximately 4 micrometers.
- the CTE of the stiffener layer 3 is approximately 3.3.10 S /°C, which is compatible with that of silicon.
- a thick layer 4 is obtained by coating a precursor formulation comprising preceramic polysiloxane polymer at 30% by volume and inorganic SiC particles (CTE of 4- 4.5.10 '6 /°C- source site internet Matweb.com) at 70% in transit. for 100% of the total volume of the dry precursor formulation.
- the volume loading rate of the inorganic particles is between 50 and 70% by volume. depending on the nature of the particles and the materials of the substrates considered.
- the precursor formulation is prepared by mixing a polysiloxane preceramic polymer SILRES® MK POWDER supplied in powder form by Wacker in a proportion of approximately 2.4% by weight with a Diestone DLS solvent in a proportion of approximately 27.9% by weight, and inorganic particles of SiC in a proportion of 69.7% by weight.
- This precursor formulation composition has a CTE which differs by less than 10% with that of silicon, comprised between 3 and 4.10 ⁇ 6 /°C between 200°C and 1000°C according to J. Haisman (applied Optics 1999).
- the inorganic particles of SiC are replaced by a mixture of S13N 4 (CTE of 3.3.10 -6 /°C) in a proportion of 75-85% by volume with GAI 2 O3 (CTE of 8. 2.10 -6 /°C) in a proportion of 15-25% by volume.
- the inorganic particles of SiC are replaced by a mixture of S13N 4 in a proportion of 45-70% vol. with GAIN (CTE of 5.5.10 -6 /°C between 25 and 1000°C according to the matweb website) in a proportion of 30-55% vol.
- the solvent of the thick layer 4 is then evaporated at room temperature then the thick layer 4 is ground so as to thin it down to the desired thickness and flatten the surface.
- the typical thickness of the thick layer 4 is between 10 and 500 micrometers after evaporation of the solvent, depending on the desired applications.
- the solvent is evaporated in an oven placed between 30 and 100°C.
- the deposition of the thick layer 4 is carried out by thermopressing when the precursor formulation based on SILRES® MK POWDER and SiC does not contain any solvent.
- a second silicon substrate 5 is provided according to step c) of the method.
- a layer of primer 6 is deposited on the surface to reach a thickness of 10 micrometers so as to facilitate bonding with the thick layer 4.
- This primer layer is chosen from a pre-ceramic adhesion polymer so as to resist high heat treatment and to facilitate adhesion and bonding with the thick layer 4, itself in preceramic polymer.
- This is a polysiloxane, SILRES® H62C, available in liquid form from the supplier Wacker (75% by weight of the total precursor formulation), it is diluted with a Diestone DLS solvent (25% by weight of the formulation total precursor).
- the precursor formulation of the bonding primer layer 6 is enriched with metal, ceramic or polymer particles, depending on the targeted properties and/or to limit shrinkage in volume during pyrolysis.
- a pre-crosslinking step is applied to this primer coat 6 by applying a heat treatment at a temperature of 175° C. for 1 hour.
- This step makes it possible to pre-cure the pre-ceramic bonding polymer at a temperature below the crosslinking temperature, so as to confer adhesive properties allowing bonding with the thick layer 4, without diffusing into it.
- the layer of primer 6 is deposited on the thick layer 4 pre-crosslinked beforehand, with a view to bonding with the second substrate 5 support.
- the adhesion primer layer 6 is deposited on the stiffener layer 3 before the deposition of the thick layer 4, which allows good adhesion between the stiffener layer 3 and the thick layer 4 but also to complete the stiffening effect of the stiffening layer 3 by filling the porosity of the thick layer 4.
- the method does not have a step of forming a layer of primer 6, the nature of the materials chosen and the conditions make it possible to obtain sufficient bonding energy for the subsequent operations desired. even in the absence of this layer.
- step d) of the method illustrated in FIG. 5 the thick layer 4 is brought into contact with the second substrate 5 via the bonding primer layer 6 and forms a stack 10.
- a step i ) of thermopressing is applied to the stack 10, over a period of 4 hours.
- the pressure applied is 470kPa and the heat treatment is carried out at a temperature of 200°C allowing crosslinking and initial compaction of SILRES® MK POWDER and also that of SILRES® H62C.
- the crosslinking temperature is applied by a heating ramp conventionally ranging between 0.1 to 20° C./min. It is 1° C./min in this specific example.
- a step e) of thinning is then carried out by applying a thermal fracture budget so as to obtain the separation along the weakening plane 2. It is applied in the form of a ramp of heating of 5°C/min with a step at 300°C and at 500°C for 1 hour in this specific example. An active layer 7 of silicon with a thickness of 1.5 micrometers is thus obtained.
- the process includes a step f) of pyrolysis heat treatment under argon until the ceramization temperature of SILRES® MK POWDER is reached with a heating ramp of 1°C/min up to 1000° C comprising two stages of 1 hour each at 600°C and 800°C, and during which the temperature drops freely. Heat treatment at 1000°C also makes it possible to cure implantation defects in the silicon.
- the thick layer 4 is also compacted, its initial thickness is approximately divided by two.
- a multilayer structure 100 comprises, from the surface towards the base, an active layer 7 of silicon, a stiffening layer 3 of Si 3 N 4 , a thick layer 4 of a composite material with an amorphous ceramic matrix, not sintered and loaded with SiC particles, a layer of primer 6 and a second substrate 5 of silicon.
- a second embodiment of the invention is now described in conjunction with FIGS. 8 to 10.
- This embodiment differs from the previous one in particular in that the thinning step e) is obtained by an operation of rectification of the first substrate 1 or of the second substrate 5.
- a thick layer 4 of a precursor formulation is deposited by screen printing on a first substrate 1 of monocrystalline silicon.
- the precursor formulation consists of a mixture of SILRES MK POWDER (50% by volume) and inorganic particles (50% by volume) of S13N4 and A 2 O 3 in a proportion of 80/20 respectively, in which Diestone DLS solvent is added to achieve the desired viscosity for screen printing.
- a second substrate 5 of polycrystalline silicon covered with a layer of primer 6 in pre-crosslinked preceramic polymer is provided with a view of the contacting and bonding with the thick layer 4
- a step i) of thermopressing is carried out at a crosslinking temperature of the preceramic polymer so as to stabilize the stack 10 obtained (FIG. 9).
- a step e) of rectification is carried out on the first substrate 1 so as to obtain an active layer 7 of monocrystalline silicon having a thickness of about 20 micrometers. It should be noted in this case where the thinning is carried out by rectification that the presence of a stiffener layer 3 is not necessary.
- a pyrolysis treatment at 1000° C.
- step f is carried out (step f) with a heating ramp of 1° C./min comprising two steps at 600° C. and at 800° C.
- the two levels have a duration of 1 hour each during which the temperature is allowed to drop freely.
- a support substrate consisting of the second substrate 5 covered with a layer of primer 6, - a thick layer 4 of a composite material with an amorphous SiOC ceramic matrix, devoid of sintering, comprising inorganic fillers of Si 3 N 4 and of Al 2 O 3 and having a thickness of 100 micrometers, and
- the thick layer 4 advantageously has a CTE which differs by at most 15% from the CTE of the material of the support substrate (FIG. 10).
- the present invention proposes a method for manufacturing a multilayer structure that is simple to implement. Thanks to the choice of the nature and thickness of the layers, the structure is resistant to high temperatures and capable of significant heat dissipation. Other properties can be obtained by a judicious choice of the preceramic polymer used, such as that of the rate and nature of the inorganic fillers, while maintaining the desired characteristics concerning the CTEs of the different layers.
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- Physics & Mathematics (AREA)
- Thermal Sciences (AREA)
- Fluid Mechanics (AREA)
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
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Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2023562686A JP2024521248A (ja) | 2021-04-16 | 2022-04-12 | 多層構造の製造方法 |
| EP22722302.1A EP4324020A1 (fr) | 2021-04-16 | 2022-04-12 | Procédé de fabrication d'une structure multicouche |
| KR1020237038723A KR20230171960A (ko) | 2021-04-16 | 2022-04-12 | 다층 구조물의 제조 방법 |
| US18/287,148 US20240190120A1 (en) | 2021-04-16 | 2022-04-12 | Method of manufacturing a multilayer structure |
| CN202280028741.3A CN117280442A (zh) | 2021-04-16 | 2022-04-12 | 生产多层结构的方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR2103986A FR3122034B1 (fr) | 2021-04-16 | 2021-04-16 | Procédé de fabrication d’une structure multicouche |
| FRFR2103986 | 2021-04-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2022219283A1 true WO2022219283A1 (fr) | 2022-10-20 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/FR2022/050691 Ceased WO2022219283A1 (fr) | 2021-04-16 | 2022-04-12 | Procédé de fabrication d'une structure multicouche |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20240190120A1 (https=) |
| EP (1) | EP4324020A1 (https=) |
| JP (1) | JP2024521248A (https=) |
| KR (1) | KR20230171960A (https=) |
| CN (1) | CN117280442A (https=) |
| FR (1) | FR3122034B1 (https=) |
| WO (1) | WO2022219283A1 (https=) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115613013B (zh) * | 2022-10-31 | 2024-06-04 | 中国科学院化学研究所 | 一种复合绝缘层及其制备方法 |
| EP4700820A1 (en) * | 2024-08-19 | 2026-02-25 | Umicore | Compound semiconductor layered structure and processes for preparing a compound semiconductor layered structure |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110073236A1 (en) * | 2009-09-25 | 2011-03-31 | Ferrotec (Usa) Corporation | High strength bonding and coating mixture |
| US20150171045A1 (en) * | 2013-12-13 | 2015-06-18 | Infineon Technologies Ag | Compound Structure and Method for Forming a Compound Structure |
| US20170033011A1 (en) * | 2015-07-31 | 2017-02-02 | Infineon Technologies Ag | Method for Forming a Semiconductor Device and a Semiconductor Device |
| FR3102608A1 (fr) * | 2019-10-28 | 2021-04-30 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de transfert d’une couche mince à l’aide d’un polymère précéramique chargé |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5354900B2 (ja) * | 2007-12-28 | 2013-11-27 | 株式会社半導体エネルギー研究所 | 半導体基板の作製方法 |
| DE102009000888B4 (de) * | 2009-02-16 | 2011-03-24 | Semikron Elektronik Gmbh & Co. Kg | Halbleiteranordnung |
| FR2961515B1 (fr) * | 2010-06-22 | 2012-08-24 | Commissariat Energie Atomique | Procede de realisation d'une couche mince de silicium monocristallin sur une couche de polymere |
| FR2984597B1 (fr) * | 2011-12-20 | 2016-07-29 | Commissariat Energie Atomique | Fabrication d’une structure souple par transfert de couches |
| FR3079662B1 (fr) * | 2018-03-30 | 2020-02-28 | Soitec | Substrat pour applications radiofrequences et procede de fabrication associe |
-
2021
- 2021-04-16 FR FR2103986A patent/FR3122034B1/fr active Active
-
2022
- 2022-04-12 EP EP22722302.1A patent/EP4324020A1/fr active Pending
- 2022-04-12 US US18/287,148 patent/US20240190120A1/en active Granted
- 2022-04-12 WO PCT/FR2022/050691 patent/WO2022219283A1/fr not_active Ceased
- 2022-04-12 JP JP2023562686A patent/JP2024521248A/ja active Pending
- 2022-04-12 CN CN202280028741.3A patent/CN117280442A/zh active Pending
- 2022-04-12 KR KR1020237038723A patent/KR20230171960A/ko active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110073236A1 (en) * | 2009-09-25 | 2011-03-31 | Ferrotec (Usa) Corporation | High strength bonding and coating mixture |
| US20150171045A1 (en) * | 2013-12-13 | 2015-06-18 | Infineon Technologies Ag | Compound Structure and Method for Forming a Compound Structure |
| US20170033011A1 (en) * | 2015-07-31 | 2017-02-02 | Infineon Technologies Ag | Method for Forming a Semiconductor Device and a Semiconductor Device |
| FR3102608A1 (fr) * | 2019-10-28 | 2021-04-30 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de transfert d’une couche mince à l’aide d’un polymère précéramique chargé |
Also Published As
| Publication number | Publication date |
|---|---|
| FR3122034B1 (fr) | 2023-04-14 |
| US20240190120A1 (en) | 2024-06-13 |
| FR3122034A1 (fr) | 2022-10-21 |
| EP4324020A1 (fr) | 2024-02-21 |
| CN117280442A (zh) | 2023-12-22 |
| KR20230171960A (ko) | 2023-12-21 |
| JP2024521248A (ja) | 2024-05-30 |
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