WO2022160441A1 - 显示装置、显示面板及其制造方法、驱动电路及驱动方法 - Google Patents

显示装置、显示面板及其制造方法、驱动电路及驱动方法 Download PDF

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Publication number
WO2022160441A1
WO2022160441A1 PCT/CN2021/082838 CN2021082838W WO2022160441A1 WO 2022160441 A1 WO2022160441 A1 WO 2022160441A1 CN 2021082838 W CN2021082838 W CN 2021082838W WO 2022160441 A1 WO2022160441 A1 WO 2022160441A1
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Prior art keywords
light
emitting device
emitting
driving
layer
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PCT/CN2021/082838
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English (en)
French (fr)
Inventor
闫华杰
朱海彬
李晓虎
焦志强
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/630,906 priority Critical patent/US20230165094A1/en
Priority to CN202180000573.2A priority patent/CN115428163A/zh
Publication of WO2022160441A1 publication Critical patent/WO2022160441A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/18Tiled displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/19Segment displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/32Stacked devices having two or more layers, each emitting at different wavelengths
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/8791Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301Details of OLEDs
    • H10K2102/302Details of OLEDs of OLED structures
    • H10K2102/3023Direction of light emission
    • H10K2102/3031Two-side emission, e.g. transparent OLEDs [TOLED]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/126Shielding, e.g. light-blocking means over the TFTs

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display device, a display panel and a manufacturing method thereof, a driving circuit and a driving method.
  • OLED Organic Light Emitting Diode
  • Organic Light Emitting Diode OLED (Organic Light Emitting Diode, Organic Light Emitting Diode) display panels are widely used in display technology due to their advantages of thinness, high contrast, flexibility, and short response time.
  • existing display panels achieve full color by tiling RGB pixels, resulting in lower pixel density and lower image resolution.
  • the purpose of the present disclosure is to overcome the above-mentioned deficiencies of the prior art, and to provide a display device, a display panel and a manufacturing method thereof, a driving circuit and a driving method, which can improve the display resolution.
  • a display panel comprising:
  • a driving backplane including a plurality of pixel driving circuits
  • the light-emitting device layer includes a plurality of light-emitting units distributed in an array, and the light-emitting unit includes a plurality of light-emitting devices stacked in a direction away from the driving backplane; in the direction perpendicular to the driving backplane, the distance from the The light-emitting device other than the light-emitting device closest to the driving backplane is a transparent device;
  • At least some of the light-emitting devices are connected to the pixel driving circuit for emitting light under the driving of the pixel driving circuit, and at least two of the light-emitting devices in the same light-emitting unit have different light-emitting materials .
  • the light emitting device includes:
  • a first electrode layer formed on one side of the driving backplane, and connected to a pixel driving circuit
  • a light-emitting functional layer formed on the surface of the first electrode layer facing away from the driving backplane
  • a second electrode layer formed on the surface of the light-emitting functional layer away from the driving backplane
  • the second electrode layer of the light emitting device close to the driving backplane and the first electrode layer of the light emitting device facing away from the driving backplane for the same electrode layer.
  • the number of light-emitting devices of the same light-emitting unit is three, and includes a first light-emitting device, a second light-emitting device and a third light-emitting device distributed in a direction away from the driving backplane Three light-emitting devices, and the first light-emitting device, the second light-emitting device and the third light-emitting device have different light-emitting materials for emitting light of different colors.
  • the first electrode layer of the first light-emitting device is disposed on one side of the driving backplane, and the display panel further includes:
  • the pixel definition layer and the first electrode layer of the first light-emitting device are arranged on the same side of the driving backplane, and the pixel definition layer is provided with a plurality of layers exposing the first electrode layers of the first light-emitting devices. open;
  • the light-emitting functional layer of the first light-emitting device is at least partially disposed in the opening;
  • the second electrode layer of the first light-emitting device is disposed on the surface of the pixel definition layer away from the driving backplane, and its orthographic projection in the opening is in the same position as the light-emitting functional layer of the first light-emitting device.
  • the orthographic projections in the opening at least partially overlap; the second electrode layer of the first light-emitting device is connected to the pixel driving circuit through a via hole passing through the pixel definition layer;
  • the light-emitting functional layer of the second light-emitting device covers the surface of the second electrode layer of the first light-emitting device facing away from the driving backplane, and its orthographic projection on the driving backplane covers the first light-emitting device the orthographic projection of the second electrode layer of the device on the driving backplane;
  • the second electrode layer of the second light-emitting device covers the surface of the light-emitting functional layer and the pixel definition layer of the second light-emitting device, and its orthographic projection in the opening corresponds to the light emission of the first light-emitting device
  • the orthographic projection of the functional layer in the opening at least partially overlaps, and is connected to the pixel driving circuit through a via hole passing through the pixel definition layer;
  • the light-emitting functional layer of the third light-emitting device includes a hole transport layer, a light-emitting material layer and an electron transport layer stacked in sequence, and the hole transport layer is located on the first electrode layer of the third light-emitting device away from the driving back one side of the plate, and its orthographic projection on the driving backplane covers the orthographic projection of the second electrode layer of the second light-emitting device on the driving backplane; the light-emitting material layer is located in the hole a side of the transmission layer facing away from the driving backplane, and its orthographic projection in the opening at least partially overlaps the orthographic projection of the second electrode layer of the second light emitting device in the opening; the electron The transport layer covers the surface of the structure formed by the light-emitting material layer and the hole transport layer;
  • the second electrode layer of the third light-emitting device is located on the side of the electron transport layer away from the driving backplane, and its orthographic projection in the opening is the same as the positive projection of the light-emitting material layer in the opening.
  • the projections overlap at least partially.
  • the third light-emitting devices of each of the light-emitting units share the hole transport layer and the electron transport layer.
  • the emission color of the first light emitting device is blue
  • the emission color of the second light emitting device is green
  • the emission color of the third light emitting device is red
  • the driving backplane further includes a connecting lead, the connecting lead includes a first lead and a second lead spaced apart from the first electrode layer, the first lead and the second leads are respectively connected with different pixel driving circuits;
  • the display panel also includes:
  • the first pixel definition layer and the first electrode layer of the first light-emitting device are disposed on the same side of the driving backplane, and the first pixel definition layer is provided with a plurality of first light-emitting devices exposing each of the first light-emitting devices. a first opening of the electrode layer, the sidewall of the first opening shrinks toward the driving backplane;
  • the second pixel definition layer is disposed on the same side of the driving backplane as the first pixel definition layer, is located in the first opening, and has a first gap with the sidewall of the first opening, so The second lead is at least partially exposed in the first gap; the second pixel definition layer includes a second opening, and the first electrode layer of the first light emitting device is located in the second opening and is connected to the second opening.
  • the sidewall of the second opening has a second gap, and the first lead is at least partially exposed in the second gap; in the direction perpendicular to the driving backplane, the thickness of the second pixel definition layer is less than the thickness of the first pixel definition layer;
  • the light-emitting functional layer of the first light-emitting device is at least partially disposed in the second opening, and is disconnected at the boundary of the second opening;
  • the second electrode layer of the first light-emitting device is at least partially disposed in the second opening, and at least partially covers the first lead, and the second electrode layer of the first light-emitting device is located at the second opening. the boundary is broken;
  • the light-emitting functional layer of the second light-emitting device covers the surface of the second electrode layer of the first light-emitting device facing away from the driving backplane, is continuous in the second opening, and is in the first opening. The boundary is disconnected; the light-emitting functional layer of the second light-emitting device exposes the second lead;
  • the second electrode layer of the second light-emitting device at least partially covers the surface of the light-emitting functional layer of the second light-emitting device, and at least partially covers the second lead, and the second electrode layer of the second light-emitting device is in the The boundary of the first opening is disconnected, and its orthographic projection on the driving backplane at least partially overlaps with the orthographic projection of the light-emitting functional layer of the first light-emitting device on the driving backplane;
  • the light-emitting functional layer of the third light-emitting device is located on the side of the first electrode layer of the third light-emitting device away from the driving backplane, and its orthographic projection on the driving backplane covers the third light-emitting device the orthographic projection of the first electrode layer of the device on the driving backplane;
  • the second electrode layer of the third light-emitting device covers the surface of the light-emitting functional layer of the third light-emitting device facing away from the driving backplane, and its orthographic projection on the driving backplane covers the third light-emitting device Orthographic projection of the light-emitting functional layer of the device on the driving backplane.
  • the driving backplane further includes a connecting lead, the connecting lead includes a first lead and a second lead spaced apart from the first electrode layer, the first lead and the second leads are respectively connected with different pixel driving circuits;
  • the display panel also includes:
  • the first pixel definition layer and the first electrode layer of the first light-emitting device are disposed on the same side of the driving backplane, and the first pixel definition layer is provided with a plurality of first light-emitting devices exposing each of the first light-emitting devices. an electrode layer and at least partially expose the first opening of the first lead; the sidewall of the first opening shrinks toward the driving backplane; the second lead can pass through the first pixel definition layer, and exposed to the top surface of the first pixel definition layer;
  • the second pixel definition layer is disposed on the surface of the first pixel definition layer away from the driving backplane, and has a plurality of second openings exposing each of the first openings and at least partially exposing the second leads. the side wall of the second opening shrinks toward the driving backplane;
  • the light-emitting functional layer of the first light-emitting device is at least partially disposed in the first opening, and is disconnected at the boundary of the first opening or the second opening;
  • the second electrode layer of the first light emitting device is at least partially disposed in the first opening, and at least partially covers the first lead, and the second electrode layer of the first light emitting device is located on the second opening. the boundary is broken;
  • the light-emitting functional layer of the second light-emitting device covers the surface of the second electrode layer of the first light-emitting device facing away from the driving backplane, and is at least partially located in the first opening, and is located in the second opening the boundary is broken;
  • the second electrode layer of the second light-emitting device at least partially covers the surface of the light-emitting functional layer of the second light-emitting device, and at least partially covers the second lead, and the second electrode layer of the second light-emitting device is in the The boundary of the second opening is disconnected, and its orthographic projection on the driving backplane at least partially overlaps with the orthographic projection of the light-emitting functional layer of the first light-emitting device on the driving backplane;
  • the light-emitting functional layer of the third light-emitting device is located on the side of the first electrode layer of the third light-emitting device away from the driving backplane, and its orthographic projection on the driving backplane covers the third light-emitting device the orthographic projection of the first electrode layer of the device on the driving backplane;
  • the second electrode layer of the third light-emitting device covers the surface of the light-emitting functional layer of the third light-emitting device facing away from the driving backplane, and its orthographic projection on the driving backplane covers the third light-emitting device Orthographic projection of the light-emitting functional layer of the device on the driving backplane.
  • the display panel further includes:
  • the light-shielding layer is disposed on the side of the light-emitting device layer away from the driving backplane, and has a plurality of light-transmitting holes.
  • the orthographic projection of the light hole on the driving backplane and the orthographic projection of each light-emitting device in the corresponding opening on the driving backplane at least partially overlap.
  • the display panel further includes:
  • the encapsulation layer is located on the side of the light emitting device layer away from the driving backplane.
  • a display device including the display panel described in any one of the above.
  • a method for manufacturing a display panel including:
  • the driving backplane including a plurality of pixel driving circuits
  • a light-emitting device layer is formed on one side of the driving backplane, the light-emitting device layer includes a plurality of light-emitting units distributed in an array, and the light-emitting unit includes a plurality of light-emitting devices stacked in a direction away from the driving backplane ; In the direction perpendicular to the driving backplane, the light-emitting devices other than the light-emitting device closest to the driving backplane are transparent devices;
  • At least some of the light-emitting devices are connected to the pixel driving circuit for emitting light under the driving of the pixel driving circuit, and at least two of the light-emitting devices in the same light-emitting unit have different light-emitting materials .
  • a pixel driving circuit for driving a plurality of light-emitting devices connected in series between a first power supply terminal and a second power supply terminal to emit light;
  • the pixel driving circuit includes a plurality of driving units, and each of the driving units includes a driving transistor, a data writing unit and an energy storage unit;
  • the driving transistor has a control terminal, a first terminal and a second terminal, and the second terminal of the driving transistor is used for connecting with the first terminal of the light emitting device;
  • the data writing unit is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor;
  • the first end of the energy storage unit is connected to the first power supply end, and the second end of the energy storage unit is connected to the control end of the driving transistor;
  • the first terminal of each of the light emitting devices is connected to a second terminal of a driving transistor of the driving unit.
  • a plurality of the driving units include a first driving transistor, a second driving transistor, and a third driving transistor; and the plurality of the light-emitting devices include a first light-emitting device, a second light-emitting device and a third light-emitting device;
  • the second end of the first driving transistor is connected to the first light emitting device
  • the second end of the second driving transistor is connected between the first light emitting device and the second light emitting device;
  • the second end of the third driving transistor is connected between the second light emitting device and the third light emitting device, and the second end of the third light emitting device is connected to the second power supply end.
  • a pixel driving circuit for driving a first light-emitting device, a second light-emitting device and a third light-emitting device connected in series between a first power supply terminal and a second power supply terminal to emit light, the pixel
  • the drive circuit includes:
  • a driving transistor which has a control terminal, a first terminal and a second terminal, the second terminal of the driving transistor is used for connecting with the first terminal of the first light emitting device;
  • a data writing unit which is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor
  • the first end of the energy storage unit is connected to the first power supply end, and the second end of the energy storage unit is connected to the control end of the driving transistor;
  • a first switch unit for turning on in response to a light-emitting control signal, a first end of the first switch unit is connected between the driving transistor and the first light-emitting device, and a second end of the first switch unit is connected between the drive transistor and the first light-emitting device an end is connected between the first light emitting device and the second light emitting device;
  • the second switch unit is configured to be turned on in response to a light-emitting control signal, a first end of the second switch unit is connected between the driving transistor and the first light-emitting device, and a second switch unit of the second switch unit is connected an end is connected between the second light-emitting device and the third light-emitting device;
  • the third switch unit is configured to be turned on in response to the light-emitting control signal, the first end of the third switch unit is connected between the first light-emitting device and the second light-emitting device, and the third switch unit has a the second terminal is connected to the second power terminal;
  • a fourth switch unit configured to be turned on in response to a light-emitting control signal, a first end of the fourth switch unit is connected between the second light-emitting device and the third light-emitting device, and the fourth switch unit has a The second terminal is connected to the second power terminal.
  • a pixel driving circuit for driving a first light-emitting device, a second light-emitting device and a third light-emitting device connected in series between a first power supply terminal and a second power supply terminal to emit light, the pixel
  • the drive circuit includes:
  • a driving transistor which has a control terminal, a first terminal and a second terminal, the second terminal of the driving transistor is used for connecting with the first terminal of the first light emitting device;
  • a data writing unit which is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor
  • the first end of the energy storage unit is connected to the first power supply end, and the second end of the energy storage unit is connected to the control end of the driving transistor;
  • a first switch unit for turning on in response to a light-emitting control signal, a first end of the first switch unit is connected between the driving transistor and the first light-emitting device, and a second end of the first switch unit is connected between the drive transistor and the first light-emitting device an end is connected between the first light emitting device and the second light emitting device;
  • the second switch unit is configured to be turned on in response to the light-emitting control signal, the first end of the second switch unit is connected between the first light-emitting device and the second light-emitting device, and the second switch unit has a The second end is connected between the second light-emitting device and the third light-emitting device;
  • a third switch unit configured to be turned on in response to a light-emitting control signal, a first end of the third switch unit is connected between the second light-emitting device and the third light-emitting device, and the third switch unit has a The second terminal is connected to the second power terminal.
  • a pixel driving circuit for driving a first light-emitting device, a second light-emitting device and a third light-emitting device connected in series between a first power supply terminal and a second power supply terminal to emit light, the pixel
  • the drive circuit includes:
  • a driving transistor which has a control terminal, a first terminal and a second terminal, the second terminal of the driving transistor is used for connecting with the first terminal of the first light emitting device;
  • a data writing unit which is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor
  • the first end of the energy storage unit is connected to the first power supply end, and the second end of the energy storage unit is connected to the control end of the driving transistor;
  • a first switch unit configured to be turned on in response to a light-emitting control signal, the first switch unit is connected between the second end of the driving transistor and the first light-emitting device;
  • the second switch unit is configured to be turned on in response to the light-emitting control signal, the first end of the first switch unit is connected between the driving transistor and the first light-emitting device, the second switch unit of the first switch unit is connected an end is connected between the second light-emitting device and the third light-emitting device;
  • One end of the connecting line is connected between the first light-emitting device and the second light-emitting device, and the other end is connected with the second power supply end.
  • a driving method of a pixel driving circuit which is used in the pixel driving circuit described in any one of the above;
  • the driving method includes:
  • the data writing unit of each driving unit is turned on to transmit the data signal to the control terminal of the driving transistor through the data writing unit and the driving transistor, and
  • the energy storage unit is charged so that the plurality of light emitting devices emit light simultaneously.
  • a driving method of a pixel driving circuit which is used in the pixel driving circuit described in any one of the above;
  • the driving method includes:
  • the data writing unit is turned on, so that the data signal is transmitted to the control terminal of the driving transistor through the data writing unit and the driving transistor, and sent to the energy storage unit Charge;
  • a first power supply signal is input to the driving transistor through the energy storage unit to turn on the driving transistor, so that the signal from the second end of the driving transistor is sent to the first power supply of the first light-emitting device.
  • One end transmission turn off the first switch unit and the second switch unit, turn on the third switch unit and the fourth switch unit, so that the first light-emitting device emits light; or, turn on The first switch unit and the fourth switch unit turn off the second switch unit and the third switch unit, so that the second light-emitting device emits light; or, turn on the first switch unit and the second switch unit, the third switch unit and the fourth switch unit are turned off, so that the third light emitting device emits light.
  • a driving method for a pixel driving circuit which is used for the pixel driving circuit described in any one of the above;
  • the driving method includes:
  • the data writing unit is turned on, so that the data signal is transmitted to the control terminal of the driving transistor through the data writing unit and the driving transistor, and sent to the energy storage unit Charge;
  • a first power supply signal is input to the driving transistor through the energy storage unit to turn on the driving transistor, so that the signal from the second end of the driving transistor is sent to the first power supply of the first light-emitting device.
  • One-end transmission turn off the first switch unit, turn on the second switch unit and the third switch unit, so that the first light-emitting device emits light; or turn off the second switch unit, Turning on the first switch unit and the third switch unit to make the second light emitting device emit light; or turning off the third switch unit and turning on the first switch unit and the second switch unit a switch unit to make the third light emitting device emit light.
  • a driving method for a pixel driving circuit which is used for the pixel driving circuit described in any one of the above;
  • the driving method includes:
  • the data writing unit is turned on, so that the data signal is transmitted to the control terminal of the driving transistor through the data writing unit and the driving transistor, and sent to the energy storage unit Charge;
  • a first power supply signal is input to the driving transistor through the energy storage unit to turn on the driving transistor, so that the signal from the second end of the driving transistor is sent to the first power supply of the first light-emitting device.
  • One end transmission turn off the second switch unit, turn on the first switch unit, so that the first light-emitting device emits light; or, turn off the first switch unit, turn on the second switch unit, and turn off the When the voltage value of the first power supply terminal is lower than the voltage value of the second power supply terminal, the second light-emitting device emits light; or, the first switching unit is turned off, the second switching unit is turned on, and the When the voltage value of the first power supply terminal is higher than the voltage value of the second power supply terminal, the third light emitting device emits light.
  • the display device, the display panel and the manufacturing method thereof, the driving circuit and the driving method of the present disclosure can increase the number of light-emitting devices in each light-emitting unit by stacking a plurality of light-emitting devices, thereby increasing the number of light-emitting devices in the display area, Improve the utilization rate of the display area; at the same time, since at least two light-emitting devices in the same light-emitting unit have different light-emitting materials, they can emit light of multiple colors, and the light of multiple colors can be superimposed to achieve full color, thereby multiplying the improvement.
  • each light-emitting device can be driven separately by each pixel driving circuit, so that each light-emitting device emits light independently without interfering with each other;
  • the light-emitting devices other than the light-emitting device closest to the driving backplane are all transparent devices, so that the light emitted by each light-emitting device can be emitted in the direction away from the driving backplane, so as to prevent the light from irradiating the pixel driving circuit and ensure the pixel driving. circuit stability.
  • FIG. 1 is a schematic tiling diagram of a display panel in the related art.
  • FIG. 2 is a schematic diagram of a display panel in the first embodiment of the disclosure.
  • FIG. 3 is a schematic diagram of a display panel in a second embodiment of the disclosure.
  • FIG. 4 is a schematic diagram of a display panel in a third embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of the driving backplane in the first embodiment of the disclosure.
  • FIG. 6 is a schematic diagram of the planarization layer in the first embodiment of the disclosure.
  • FIG. 7 is a schematic diagram of a spectrum in the first embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of the color gamut of the display panel in the first embodiment of the disclosure.
  • FIG. 9 is a schematic structural diagram of a second electrode layer in an embodiment of the disclosure.
  • FIG. 10 is a schematic diagram of a pixel definition layer in the first embodiment of the disclosure.
  • FIG. 11 is a schematic diagram of a light-emitting functional layer in the first embodiment of the disclosure.
  • FIG. 12 is a schematic diagram of the second electrode layer in the first embodiment of the disclosure.
  • FIG. 13 is a schematic diagram of a light-emitting functional layer of the second light-emitting device in the first embodiment of the disclosure.
  • FIG. 14 is a schematic diagram of a second electrode layer of the second light emitting device in the first embodiment of the disclosure.
  • 15 is a schematic diagram of a light-emitting functional layer of the third light-emitting device in the first embodiment of the disclosure.
  • FIG. 16 is a schematic diagram of the second electrode layer of the third light emitting device in the first embodiment of the disclosure.
  • FIG. 17 is a schematic diagram of a pixel definition layer in the second embodiment of the disclosure.
  • FIG. 18 is a schematic diagram of a light-emitting functional layer of the first light-emitting device in the second embodiment of the disclosure.
  • 19 is a schematic diagram of the second electrode layer of the first light emitting device in the second embodiment of the disclosure.
  • 20 is a schematic diagram of a light-emitting functional layer of the second light-emitting device in the second embodiment of the disclosure.
  • 21 is a schematic diagram of the second electrode layer of the second light emitting device in the second embodiment of the disclosure.
  • FIG. 22 is a schematic diagram of a light-emitting functional layer of a third light-emitting device in the second embodiment of the disclosure.
  • FIG. 23 is a schematic diagram of a pixel definition layer in a third embodiment of the present disclosure.
  • FIG. 24 is a schematic diagram of a light-emitting functional layer of the first light-emitting device in the third embodiment of the disclosure.
  • FIG. 25 is a schematic diagram of the second electrode layer of the first light emitting device in the third embodiment of the disclosure.
  • 26 is a schematic diagram of a light-emitting functional layer of the second light-emitting device in the third embodiment of the disclosure.
  • FIG. 27 is a schematic diagram of the second electrode layer of the second light emitting device in the third embodiment of the disclosure.
  • FIG. 28 is a schematic diagram of a first electrode layer in an embodiment of the disclosure.
  • FIG. 29 is a schematic diagram of an encapsulation layer in an embodiment of the disclosure.
  • FIG. 30 is a flowchart of a method of manufacturing a display panel in an embodiment of the disclosure.
  • FIG. 31 is a schematic diagram of a pixel driving circuit in the first embodiment of the disclosure.
  • FIG. 32 is a timing chart showing the operation principle of the pixel driving circuit in the first embodiment of the disclosure.
  • FIG. 33 is the RGB spectrum of the pixel driving circuit in the first embodiment of the disclosure.
  • FIG. 34 is a schematic diagram of a pixel driving circuit in the second embodiment of the disclosure.
  • FIG. 35 is a timing diagram showing the operation principle of the pixel driving circuit in the second embodiment of the disclosure.
  • Figure 37 is the spectrum of the first light emitting device (G) in one embodiment of the disclosure.
  • FIG. 39 is a schematic diagram of a pixel driving circuit in the third embodiment of the disclosure.
  • FIG. 40 is a timing diagram illustrating the operation principle of the pixel driving circuit in the third embodiment of the disclosure.
  • FIG. 41 is a schematic diagram of a pixel driving circuit in a fourth embodiment of the disclosure.
  • FIG. 42 is a timing diagram illustrating the operation principle of the pixel driving circuit in the fourth embodiment of the disclosure.
  • FIG. 43 is a flowchart of an embodiment of a driving method of the disclosed pixel driving circuit.
  • FIG. 44 is a flowchart of an embodiment of a driving method of the disclosed pixel driving circuit.
  • FIG. 45 is a flowchart of an embodiment of a driving method of the disclosed pixel driving circuit.
  • Example embodiments will now be described more fully with reference to the accompanying drawings.
  • Example embodiments can be embodied in various forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art.
  • the same reference numerals in the drawings denote the same or similar structures, and thus their detailed descriptions will be omitted.
  • the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.
  • the display panel 100 mainly includes a driving backplane and a plurality of light-emitting units arranged in an array arranged on one side of the driving backplane.
  • three tiled sub-pixels are usually used to form a pixel 101 , the display area utilization rate is small, as shown in FIG. 1 , a is the length of the display panel 100 , b is the width of the display panel 100 , c is the diagonal length of the display panel 100 , and the resolution of the pixel 101
  • the PPi of the common display panel 100 is about 600, and the display resolution is low.
  • Embodiments of the present disclosure provide a display panel, which may be an AMOLED display panel. As shown in FIGS. 2-4 , the display panel may include a driving backplane 2 and a light-emitting device layer 4, wherein:
  • the driving backplane 2 includes a plurality of pixel driving circuits 21;
  • the light-emitting device layer 4 includes a plurality of light-emitting units distributed in an array, and the light-emitting units include a plurality of light-emitting devices 41 stacked in a direction away from the driving backplane 2 ;
  • the light-emitting devices 41 other than the nearest light-emitting device 41 are transparent devices;
  • At least some of the light-emitting devices 41 are connected to the pixel driving circuit 21 for emitting light under the driving of the pixel driving circuit 21, and at least two of the light-emitting devices 41 in the same light-emitting unit have different light-emitting materials.
  • the number of light-emitting devices 41 in each light-emitting unit can be increased, thereby increasing the number of light-emitting devices 41 in the display area and improving the utilization rate of the display area; , because at least two light-emitting devices 41 in the same light-emitting unit have different light-emitting materials, they can emit light of multiple colors, and the light of multiple colors can be superimposed to achieve full color, thereby multiplying the display resolution; during this process Among them, since the pixel driving circuit 21 is connected with the light-emitting device 41, each light-emitting device 41 can be driven by each pixel driving circuit 21, so that each light-emitting device 41 emits light independently and does not interfere with each other; In the direction, the light-emitting devices 41 other than the light-emitting device 41 closest to the driving backplane 2 are all transparent devices, so that the light emitted by each light-emitting device 41 can be
  • FIGS. 2-4 are schematic structural diagrams of the display panel according to the embodiment of the present disclosure.
  • the light-emitting principle of the display panel in the embodiment of the present disclosure will be described below with reference to FIGS. 2-4 .
  • the display panel mainly includes a driving backplane 2 and a light-emitting device.
  • Layer 4 wherein the driving backplane 2 may be provided on one side of the substrate 1, which may include a pixel driving layer provided on one side of the substrate 1, and the pixel driving layer includes a plurality of pixel driving circuits 21 arranged side by side, which emit light.
  • the device layer 4 is arranged on the side of the pixel driving layer away from the substrate 1, and includes a plurality of light-emitting units distributed in an array, each light-emitting unit includes a plurality of light-emitting devices 41 stacked in a direction away from the driving backplane 2, each The light-emitting devices 41 have different light-emitting materials, and can emit light of different colors respectively.
  • at least part of the light-emitting devices 41 are connected to the pixel driving circuit 21, and each pixel driving circuit 21 can be energized to each light-emitting device 41 through a sequential method.
  • Each light-emitting device 41 is controlled to emit light independently, thereby displaying an image.
  • multiple light-emitting devices 41 in the same light-emitting unit can be powered on at the same time, and multiple light-emitting devices 41 can be controlled to emit light at the same time, so that light of multiple colors can be superimposed, which can improve the utilization rate of the display area and the resolution of the display area.
  • the substrate 1 may be a flat plate structure, which may be a rigid material such as glass, or a flexible material such as PI (polyimide).
  • the substrate 1 may have a single-layer or multi-layer structure, which is not particularly limited here.
  • the pixel driving circuit 21 may include transistors, and the transistors may be electrically connected to the light-emitting devices 41, so as to control the light-emitting devices 41 in a one-to-one correspondence with each transistor, thereby displaying images.
  • the light-emitting devices 41 emit light independently without interfering with each other.
  • the transistor may include an active layer 211 , a gate insulating layer 212 , a gate electrode 215 and a first source-drain layer 213 , and the gate insulating layer 212 may include a first gate insulating layer 2121 and a second gate insulating layer 2122 .
  • the active layer 211 can be located on the side of the substrate 1 close to the light-emitting device layer 4; the first gate insulating layer 2121 covers the active layer 211; the gate 215 is arranged on the first gate The insulating layer 2121 is on the side away from the substrate 1; the second gate insulating layer 2122 covers the gate electrode 215 and the first gate insulating layer 2121, and the first gate insulating layer 2121 and the second gate insulating layer 2122 can be opened to form A via hole connecting the active region, the orthographic projection of the via hole on the substrate 1 and the orthographic projection of the gate 215 on the substrate 1 do not overlap each other; the first source and drain layers 213 are formed on the second gate insulating layer 2122
  • the side facing away from the substrate 1 includes a source electrode and a drain electrode, and the source electrode and the drain electrode can be connected to both sides of the active layer 211 through vias penetrating the second gate insulating layer 2122 and/or the first gate
  • the driving backplane 2 may further include a protective layer 22 covering the first source-drain layer 213 and a second source-drain layer 214 formed on the side of the protective layer 22 away from the substrate 1 , wherein the protective layer 214
  • the layer 22 can cover the surface of the first source-drain layer 213 away from the substrate 1, and can be used to prevent the hydrogen plasma generated in the subsequent process from diffusing to each transistor; the protective layer 22 can be opened to form a connection to the first source-drain layer.
  • the second source and drain layers 214 can be formed on the side of the protective layer 22 away from the substrate 1 , and can be connected to the first source and drain layers 213 of the transistors through the via holes penetrating the protective layer 22 .
  • the display panel of the present disclosure may further include a planarization layer 3 , and the planarization layer 3 may cover the protective layer 22 and the second source/drain layer 214 to eliminate device breakage of the second source/drain layer 214 .
  • the second source-drain layer 214 may include connecting leads, and the connecting leads may include first and second leads 2141 and 2142 distributed at intervals, and the first leads 2141 and 2141
  • the two leads 2142 can be respectively connected to different pixel driving circuits 21 through vias penetrating the planarization layer 3 and the protective layer 22 .
  • the driving backplane 2 may further include a first light shielding layer 12 and a buffer layer 13, wherein:
  • the first light shielding layer 12 may be located between the driving backplane 2 and the substrate 1. As shown in FIG. 3 and FIG. 4, the first light shielding layer 12 may be located on the side of the substrate 1 close to the driving backplane 2, The light shielding layer 12 blocks external ambient light from entering the active layer 31 of the transistor to protect the stability of the transistor.
  • the first light shielding layer 12 can be formed on the side of the substrate 1 close to the driving backplane 2 by means of vacuum evaporation, magnetron sputtering, chemical vapor deposition or physical vapor deposition.
  • the first light-shielding layer 12 is formed by an etching process, and a light-shielding film layer can be deposited on the side of the substrate 1 close to the driving backplane 2, and a photoresist is formed on the side of the light-shielding film layer away from the substrate 1, and a mask is used for photolithography.
  • the glue is exposed and developed to form a developing area.
  • the pattern of the developing area can be the same as the pattern required by the first light shielding layer 12, and its size can be equal to the size of the pattern required by the first light shielding layer 12.
  • the film layer is anisotropically etched to form the first light shielding layer 12 , and finally the remaining photoresist on the surface of the first light shielding layer can be peeled off to expose the first light shielding layer 12 formed by photolithography.
  • the buffer layer 13 can be located on the side of the first light shielding layer 12 away from the substrate 1, and a process such as chemical vapor deposition, physical vapor deposition or atomic layer deposition can be used to form the buffer layer 13 on the surface of the first light shielding layer 12 away from the substrate 1,
  • the impurity in the substrate 1 can be blocked from diffusing into the driving backplane 2 by the buffer layer 13 , so as to protect the stability of the driving backplane 2 .
  • the pixel driving layer may be formed on the surface of the buffer layer 13 away from the substrate 1 .
  • each light-emitting device 41 in the same light-emitting unit may be stacked in a direction perpendicular to the driving backplane 2, and each light-emitting device 41 may emit light of one color, and the same light-emitting unit
  • Each light-emitting device 41 in the 2 can emit light of a variety of different colors, and the light emitted by each light-emitting device 41 can be superimposed together in the direction perpendicular to the driving backplane 2, and each light-emitting device 41 can be controlled to emit light independently by timing, and then Realize the control of luminous color.
  • the number of light-emitting devices 41 may be two or three.
  • the number of light-emitting devices 41 in the same light-emitting unit is three, which are the first light-emitting device, the second light-emitting device A light-emitting device and a third light-emitting device, wherein the first light-emitting device is located on the side of the pixel driving layer away from the substrate 1, the second light-emitting device is located on the surface of the first light-emitting device away from the substrate 1, and the third light-emitting device is located at the second light-emitting device The device is away from the surface of the substrate 1 , and the first light-emitting device, the second light-emitting device and the third light-emitting device are respectively connected to different pixel driving circuits 21 in the driving backplane 2 in a one-to-one correspondence.
  • the light-emitting materials of the three light-emitting devices 41 may be different from each other, and different light-emitting materials may be used to emit light of different colors, which may be any combination of RGB.
  • the light intensity of the light emitted by the light emitting device 41 on the side close to the driving back plate 2 in the direction perpendicular to the driving back plate 2 may be greater than that far from the driving back plate 2.
  • the light intensity of the light emitted by the light emitting device 41 on the side of the board 2 will not affect the overall display effect even if the light from the light emitting device 41 located below is weakened by the transmittance during use.
  • the light intensity of the light emitted by the first light-emitting device may be greater than that of the light emitted by the second light-emitting device, and the light intensity of the light emitted by the second light-emitting device may be greater than that of the third light-emitting device.
  • the intensity of the light emitted by the light-emitting device may be greater than that of the third light-emitting device.
  • the light emitted by the three light-emitting devices 41 may also be the same, which may help prolong the service life of the light-emitting devices.
  • Figure 7 is a spectrum diagram of three colors of red, green and blue, the abscissa in the figure is the wavelength range, the ordinate is the light intensity, and the peak position in the curve is the light intensity of the light of each color. It can be seen from the figure that the light intensity of blue light (B) is stronger than that of green light (G), and the light intensity of green light (G) is stronger than that of red light (R).
  • the color of the light emitted by the light-emitting device is blue (B)
  • the light emitted by the second light-emitting device is green (G)
  • the color of the light emitted by the third light-emitting device is red (R), which can make the first light-emitting device and the second light-emitting device emit light.
  • FIG. 8 is a color gamut diagram of a display panel in an embodiment of the present disclosure.
  • the abscissa and the ordinate are chromaticity. After testing, the color gamut of the display panel in this embodiment is 96.8%.
  • the light emitting device 41 may include a first electrode layer 411, a light emitting functional layer 412 and a second electrode layer 413, wherein:
  • the first electrode layer 411 can be provided on one side of the driving backplane 2, for example, it can be provided on the side of the pixel driving layer away from the substrate 1, and can be connected to the pixel driving circuit 21, and the first electrode layer 411 can be used as a light-emitting
  • the material of the anode layer of the device 41 can be either a transparent conductive material or a light-shielding material, which is not particularly limited here. For example, it can be ITO or AZO.
  • the light-emitting functional layer 412 can be disposed on the surface of the first electrode layer 411 away from the driving backplane 2, and can provide a recombination site for excitons to emit light.
  • the light-emitting functional layer 412 can be a single-layer film layer or a multi-layer film layer. This is not particularly limited; taking the multilayer film layer as an example, it may include a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer, wherein:
  • the hole injection layer covers the surface of the first electrode layer 411 away from the driving backplane 2, which helps to enhance the electron injection capability of the device;
  • the hole transport layer covers the surface of the hole injection layer away from the first electrode layer 411, which can be Holes provide a transport channel, improve hole mobility, and help improve luminous efficiency;
  • the electron blocking layer covers the surface of the hole transport layer away from the first electrode layer 411, which can be used to block electrons from passing through the light-emitting layer and transporting holes to holes layer movement, to avoid the recombination of excitons in the hole transport layer, and to ensure that the light-emitting center is always located in the light-emitting layer;
  • the light-emitting layer covers the surface of the electron blocking layer away from the first electrode layer 411, and the light-emitting layer can provide a recombination site for electrons and holes.
  • the hole blocking layer covers the surface of the light emitting layer away from the first electrode layer 411, which can be used to block holes from passing through the light emitting layer and moving to the electron transport layer, avoiding the recombination of excitons in the electron transport layer, and further ensuring that the light emitting center is always located in the electron transport layer.
  • the light emitting layer; the electron transport layer covers the surface of the hole blocking layer away from the first electrode layer 411, which can provide a transport channel for electrons and improve electron mobility;
  • the electron injection layer covers the surface of the electron transport layer away from the first electrode layer 411, It can provide a transmission channel for electrons, improve the electron mobility, and further improve the luminous efficiency.
  • Each film layer in the light-emitting functional layer 412 can be made of transparent materials, so as to improve the light transmittance and thus the light extraction rate.
  • the second electrode layer 413 can be disposed on the surface of the light-emitting functional layer 412 away from the driving backplane 2 , and it can be a metal oxide electrode, a metal electrode, a metal alloy electrode or a composite electrode formed by a combination of metal and metal oxide. Special restrictions.
  • the second electrode layer 413 can be used as a cathode layer of the light emitting device 41, and a voltage can be applied to the first electrode layer 411 and the second electrode layer 413, so that the light emitting functional layer 412 emits light.
  • the material of the second electrode layer 413 may be IZO with higher light transmittance, and the second electrode may be formed on the surface of the light-emitting functional layer 412 away from the first electrode layer 411 by a sputtering process layer 413; in another embodiment of the present disclosure, as shown in FIG. 9 , the second electrode layer 413 includes a first electrode modification layer 413a, an electrode layer 413b, and a second electrode modification layer 413c distributed in layers.
  • the modification layer 413a is located on the surface of the light-emitting functional layer 412 away from the driving backplane 2
  • the second electrode modification layer 413c is located on the side of the first electrode modification layer 413a away from the driving backplane 2
  • the electrode layer 413b is located on the first electrode modification layer 413a and the second electrode modification layer 413a.
  • the conductivity of the electrode layer 413b is greater than the conductivity of the first electrode modification layer 413a and the second electrode modification layer 413c, and the first electrode modification layer 413a, the electrode layer 413b and the second electrode modification layer 413c may be
  • the DMD structure is formed, which can improve the light transmittance.
  • the first electrode modification layer 413a, the electrode layer 413b and the second electrode modification layer 413c can all be made of light-transmitting materials.
  • the material of the first electrode modification layer 413a can be molybdenum oxide
  • the material of the electrode layer 413b can be Aluminum-silver alloy
  • the material of the second electrode modification layer can be molybdenum oxide, of course, can also be other light-transmitting materials, which will not be listed here.
  • an electrode layer 411 can be the same electrode layer, thereby reducing the number of electrodes in the light-emitting unit and reducing device efficiency due to the transmittance of the electrodes.
  • the light emitting devices 41 other than the light emitting device 41 closest to the driving backplane 2 may be all transparent light emitting devices, and the light emitting device 41 closest to the driving backplane 2 is close to the driving backplane 2
  • One side can have a shading design, so as to ensure that the light emitted by all the light-emitting devices 41 can be emitted in the direction away from the driving backplane 2, so as to prevent the light from being irradiated to the driving backplane 2, and ensure the stability of the pixel driving circuit 21 in the driving backplane 2. sex.
  • the light emitting device 41 closest to the driving backplane 2 can also be a transparent device, which is not particularly limited here.
  • the display panel of the present disclosure further includes a pixel definition layer 5, as shown in FIGS. It can be located on the side of the pixel driving layer away from the substrate 1 , and the first electrode layer 411 of the first light emitting device and the pixel defining layer 5 can be located on the same side of the driving backplane 2 .
  • the pixel definition layer 5 may be provided with a plurality of openings 51 , and each opening 51 may expose a first electrode layer 411 of a first light emitting device.
  • the light-emitting functional layer 412 of the first light-emitting device may be formed on the surface of the first electrode layer 411 of the first light-emitting device facing away from the driving backplane 2 and may be at least partially located in the opening 51; as shown in FIG.
  • the second electrode layer 413 of the first light-emitting device can be disposed on the surface of the pixel definition layer 5 away from the driving backplane 2 and connected to the pixel driving circuit 21 through the via 52 passing through the pixel definition layer 5 so as to pass the pixel driving circuit 21
  • the second electrode layer 413 of the first light emitting device is energized.
  • the orthographic projection of the second electrode layer 413 of the first light emitting device in the opening 51 at least partially overlaps with the orthographic projection of the light emitting functional layer 412 of the first light emitting device in the opening 51, and overlaps with the light emitting functional layer 412 of the first light emitting device.
  • the light-emitting functional layer 412 of the first light-emitting device and the second electrode layer 413 of the first light-emitting device within the range of the opening 51 and the first electrode layer 411 of the first light-emitting device exposed by the opening 51 can jointly constitute the first light-emitting device device.
  • the second light-emitting device may share an electrode with the first light-emitting device.
  • the first electrode layer of the second light-emitting device may be the second electrode layer 413 of the first light-emitting device.
  • the functional layer 42 covers the surface of the second electrode layer 413 of the first light-emitting device facing away from the driving backplane 2 , and its orthographic projection on the driving backplane 2 covers the second electrode layer 413 of the first light-emitting device on the driving backplane 2 .
  • the orthographic projection on the board 2 can cover at least the opening 51 area, and its two ends can extend outward from the opening 51 area, and respectively cover the two ends of the second electrode layer 413 of the first light-emitting device , so as to prevent the second electrode layer 43 of the second light emitting device formed subsequently and the second electrode layer 413 of the first light emitting device from contacting and short circuiting.
  • the second electrode layer 43 of the second light-emitting device can cover the surface of the light-emitting functional layer 42 and the pixel definition layer 5 of the second light-emitting device, and its orthographic projection in the opening 51 is the same as that of the first light-emitting device.
  • the orthographic projection of the light-emitting functional layer 412 in the opening 51 at least partially overlaps, for example, it extends at least into the region of the opening 51, and can be connected to the pixel driving circuit 21 through the via hole 52 passing through the pixel definition layer 5, and the first light-emitting device
  • the second electrode layer 413 of the second light-emitting device, the light-emitting functional layer 42 of the second light-emitting device, and the second electrode layer 43 of the second light-emitting device can jointly constitute the second light-emitting device.
  • the third light-emitting device may share an electrode with the second light-emitting device.
  • the first electrode layer of the third light-emitting device is the second electrode layer 43 of the second light-emitting device.
  • the light-emitting function of the third light-emitting device The layer 44 covers the surface of the second electrode layer 43 of the second light emitting device facing away from the driving backplane 2 , and its orthographic projection on the driving backplane 2 covers the second electrode layer 43 of the second light emitting device on the driving backplane 2 For example, it can cover at least the area of the opening 51, and its two ends can respectively cover the two ends of the second electrode layer 43 of the second light-emitting device, so as to prevent the third light-emitting device from being formed later.
  • the second electrode layer 45 is short-circuited in contact with the second electrode layer 43 of the second light emitting device.
  • the second electrode layer 45 of the third light-emitting device may cover the surface of the light-emitting functional layer 44 of the third light-emitting device, which may extend at least to the area of the opening 51 , or may cover the light-emitting area of the third light-emitting device.
  • the surface of the functional layer 44 is not particularly limited here.
  • the second electrode layer 45 of the third light emitting device can be connected to an external power source through a circuit outside the light emitting unit so as to be powered on.
  • the second electrode layer 43 of the second light emitting device, the light emitting functional layer 44 of the third light emitting device, and the second electrode layer 45 of the third light emitting device may collectively constitute the third light emitting device.
  • the light-emitting functional layer 44 of the third light-emitting device may include a hole transport layer, a light-emitting material layer 441 and an electron transport layer stacked in sequence, wherein the hole transport layer may be located at the second electrode of the second light-emitting device.
  • the side of the layer 43 facing away from the driving backplane 2, and its orthographic projection on the driving backplane 2 covers the orthographic projection of the second electrode layer 43 of the second light-emitting device on the driving backplane 2, for example, the hole transport layer can be It covers at least the opening 51 area, and both ends of the opening 51 can extend outward from the opening 51 area and cover the two ends of the second electrode layer 43 of the second light-emitting device respectively.
  • the second light-emitting device can cover the second light-emitting device.
  • the entire surface of the second electrode layer 43 of the device simultaneously covers the surfaces of the light emitting functional layer 42 and the pixel definition layer 5 of the second light emitting device that are not covered by the second electrode layer 43 of the second light emitting device.
  • the light-emitting material layer 441 is located on the side of the hole transport layer away from the driving backplane 2, and its orthographic projection in the opening 51 at least partially overlaps with the orthographic projection of the second electrode layer 43 of the second light-emitting device in the opening 51,
  • the light-emitting material layer 441 may be disposed at least in the area of the opening 51 so as to emit light in the area of the opening 51 .
  • the electron transport layer can cover the surface of the structure formed by the light-emitting material layer 441 and the hole transport layer. For example, it can at least completely cover the light-emitting material layer 441 located in the opening 51, and of course, can also completely cover the third light-emitting device.
  • the second electrode layer 45 of the third light emitting device may be located on the side of the electron transport layer away from the driving backplane 2, and its orthographic projection in the opening 51 and the orthographic projection of the light-emitting material layer 441 in the opening 51 at least partially overlap, In order to ensure that the light-emitting material layer 441 located in the opening 51 emits light normally.
  • the light-emitting functional layer 44 of the third light-emitting device may further include a hole injection layer and an electron injection layer, and the hole injection layer may be located between the second electrode layer 43 and the hole transport layer of the second light-emitting device, It can be used to improve the hole injection capability of the third light-emitting device, thereby improving the hole mobility; the electron injection layer can be located between the second electrode layer 45 and the electron transport layer of the third light-emitting device, and can be used to improve the efficiency of the third light-emitting device. Electron injection capability, thereby increasing electron mobility.
  • the third light-emitting device of each light-emitting unit may share the hole transport layer and the electron transport layer, and the hole transport layer of the third light-emitting device of each light-emitting unit may be simultaneously formed by one process, or may be formed by one process. At the same time, the electron transport layer of the third light emitting device of each light emitting unit is formed.
  • the third light-emitting device includes an electron injection layer and a hole injection layer
  • the third light-emitting device of each light-emitting unit can share the electron injection layer and the hole injection layer, and the third light-emitting device of each light-emitting unit can be simultaneously formed through one process.
  • the hole injection layer of the third light-emitting device of each light-emitting unit can be simultaneously formed in one process, thereby simplifying the process and reducing the manufacturing cost.
  • the pixel definition layer 5 may include a first pixel definition layer 510 and a second pixel definition layer 520, wherein:
  • the first pixel definition layer 510 and the first electrode layer 411 of the first light-emitting device can be disposed on the same side of the driving backplane 2 , for example, it can be disposed on the surface of the planarization layer 3 away from the substrate 1 .
  • the first pixel definition layer 510 may be provided with a plurality of first openings exposing the first electrode layers 411 of the first light emitting devices. One side shrinks.
  • the second pixel definition layer 520 and the first pixel definition layer 510 can be disposed on the same side of the driving backplane 2 , that is, the second pixel definition layer 520 can also be disposed on the surface of the planarization layer 3 away from the substrate 1 .
  • the second pixel definition layer 520 may be located in the first opening and have a first gap 501 with the sidewall of the first opening, the second lead 2142 may be at least partially exposed in the first gap 501, and the first opening faces away from the driving backplane
  • the orthographic projection of one side of 2 on the driving backplane 2 does not overlap with the second lead 2142 .
  • the second pixel definition layer 520 may be provided with a second opening, and the sidewall of the second opening may shrink from a side close to the driving backplane 2 to a side away from the driving backplane 2 ; at the same time, the second pixel definition layer 520 is close to
  • the sidewalls of the first gap 501 can also shrink from the side close to the driving backplane 2 to the side far from the driving backplane 2 .
  • the second pixel definition layer 520 can be a first pixel definition layer formed on the first pixel definition layer 510 .
  • An annular structure in an opening, the cross-section of the annular structure in the direction perpendicular to the driving backplane 2 can be an inverted trapezoid, a T-shaped or an I-shaped.
  • the height of the second pixel definition layer 520 may be lower than the height of the first pixel definition layer 510 , so that when the subsequent layers are formed, each layer can be placed on the first pixel definition layer 510 Or the opening of the second pixel definition layer 520 is self-fractured, avoiding the use of a fine mask, thereby reducing the production cost.
  • the specific heights of the first pixel definition layer 510 and the second pixel definition layer 520 can be set according to the thickness of each film layer in each light-emitting unit, so that the first pixel definition layer 510 and the second pixel definition layer 520 make each film layer in the The corresponding position is broken, avoiding the use of a fine mask, which can reduce the alignment accuracy requirements for the mask, simplify the process, and reduce the manufacturing cost.
  • the height of the first pixel definition layer 510 may range from 1 um to 2 um, and the height of the second pixel definition layer 520 may range from 0.2 um to 1 um.
  • the height of the first pixel definition layer 510 may be 0.7um, and the height of the second pixel definition layer 520 may be 1.4um.
  • first electrode layer 411 of the first light emitting device may be located in the second opening and may have a second gap 502 with the sidewall of the second opening, and the first lead 2141 may be at least partially exposed to the second gap 502 middle.
  • the light-emitting functional layer 412 of the first light-emitting device may be formed on the surface of the first electrode layer 411 of the first light-emitting device facing away from the driving backplane 2 , and may be at least partially disposed in the second opening.
  • the light-emitting functional layer 412 of the first light-emitting device can be continuously distributed in the second opening, and can cover the end of the first electrode layer 411 of the first light-emitting device to avoid the subsequent formation of the second electrode of the first light-emitting device.
  • Layer 413 is shorted in contact therewith. And in the manufacturing process, it can be automatically disconnected at the boundary of the second opening, avoiding the use of a fine mask and reducing the manufacturing cost.
  • the second electrode layer 413 of the first light-emitting device can be disposed on the side of the light-emitting functional layer 412 of the first light-emitting device facing away from the driving backplane 2, and can be disposed at least partially in the second opening, and can At least partially covering the first lead 2141, so that the second electrode layer 413 of the first light emitting device can be connected to the pixel driving circuit 21 through the first lead 2141, so that the second electrode layer 413 of the first light emitting device can be connected to the second electrode layer 413 of the first light emitting device through the pixel driving circuit 21. power ups.
  • the second electrode layer 413 of the first light emitting device can be automatically disconnected at the boundary of the second opening, avoiding the use of a fine mask and further reducing the manufacturing cost.
  • the orthographic projection of the second electrode layer 413 of the first light-emitting device in the second opening at least partially overlaps with the orthographic projection of the light-emitting functional layer 412 of the first light-emitting device in the second opening 5, and the first in the range of the second opening.
  • the light-emitting functional layer 412 of a light-emitting device, the second electrode layer 413 of the first light-emitting device, and the first electrode layer 411 of the first light-emitting device exposed by the second opening may together constitute a first light-emitting device.
  • the second light emitting device may share one electrode with the first light emitting device, for example, the first electrode layer of the second light emitting device may be the second electrode layer 413 of the first light emitting device.
  • the light-emitting functional layer 42 of the second light-emitting device covers the surface of the second electrode layer 413 of the first light-emitting device that faces away from the driving backplane 2 , and the light-emitting functional layer 42 of the second light-emitting device is accessible in the second opening.
  • the second electrode layer 43 of the second light-emitting device may at least partially cover the surface of the light-emitting functional layer 42 of the second light-emitting device facing away from the driving backplane 2 , and it may at least partially cover the second lead 2142 , and further may
  • the second electrode layer 43 of the second light emitting device is connected to the pixel driving circuit 21 through the second lead 2142 , so that electricity is supplied to the second electrode layer 43 of the second light emitting device through the pixel driving circuit 21 .
  • the second electrode layer 43 of the second light-emitting device can be automatically disconnected at the boundary of the first opening, avoiding the use of a fine mask, which not only reduces the requirements on the alignment accuracy of the mask, but also reduces the manufacturing cost.
  • the light-emitting functional layer 42 of the second light-emitting device, the second electrode layer 43 of the second light-emitting device, and the first electrode layer of the second light-emitting device may jointly constitute the second light-emitting device.
  • the orthographic projection of the second electrode layer 43 of the second light emitting device on the driving backplane 2 at least partially overlaps the orthographic projection of the light emitting functional layer 412 of the first light emitting device on the driving backplane 2, so that the first light emitting device emits
  • the light emitted from the second light-emitting device is superimposed with the light emitted by the second light-emitting device, which can improve the utilization rate of the display panel and the display resolution.
  • the third light emitting device and the second light emitting device may share an electrode, for example, the first electrode layer of the third light emitting device is the second electrode layer 43 of the second light emitting device.
  • the light-emitting functional layer 44 of the third light-emitting device is located on the side of the first electrode layer 43 of the third light-emitting device away from the driving backplane 2 , and its orthographic projection on the driving backplane 2 can cover the third light-emitting device.
  • the orthographic projection of the first electrode layer 43 of the light-emitting device on the driving backplane 2 can cover at least the first opening area, and can fill the first gap 501, and then cover the light-emitting function of the third light-emitting device
  • the end of the layer 44 is used to prevent the second electrode layer 45 of the third light emitting device and the second electrode layer 43 of the second light emitting device from being contacted and short-circuited.
  • the second electrode layer 45 of the third light emitting device can cover the surface of the light emitting functional layer 44 of the third light emitting device facing away from the driving backplane 2 , and its orthographic projection on the driving backplane 2 can cover the light emitting functional layer of the third light emitting device The orthographic projection of 44 on the drive backplane 2.
  • the second electrode layer 45 of the third light emitting device can be connected to an external power source through a circuit outside the light emitting unit so as to be powered on.
  • the second electrode layer 43 of the second light emitting device, the light emitting functional layer 44 of the third light emitting device, and the second electrode layer 45 of the third light emitting device may collectively constitute the third light emitting device.
  • the pixel definition layer 5 may include a first pixel definition layer 510 and a second pixel definition layer 520, wherein:
  • the first pixel definition layer 510 and the first electrode layer 411 of the first light-emitting device can be disposed on the same side of the driving backplane 2 , for example, it can be disposed on the surface of the planarization layer 3 away from the substrate 1 .
  • the first pixel definition layer 510 may be provided with a plurality of first openings exposing the first electrode layers 411 of the first light emitting devices and at least partially exposing the first leads 2141 .
  • the side away from the drive backplane 2 is retracted laterally.
  • the second lead 2142 can pass through the first pixel definition layer 510 and be exposed to the surface of the first pixel definition layer 510 away from the driving backplane 2 so as to be connected with other electrode layers or connecting lines.
  • the second pixel definition layer 520 can be disposed on the surface of the first pixel definition layer 510 away from the driving backplane 2 , and has a plurality of second openings exposing the first openings.
  • One side is shrunk away from the side of the driving backplane 2; in one embodiment, the bottom of the second opening can at least partially expose the second lead 2142, and the orthographic projection of its top on the first pixel definition layer 510 is the same as the second lead 2142.
  • the leads 2142 do not overlap.
  • the light-emitting functional layer 412 of the first light-emitting device may be formed on the surface of the first electrode layer 411 of the first light-emitting device facing away from the driving backplane 2 , and may be at least partially disposed in the first opening.
  • the light-emitting functional layer 412 of the first light-emitting device can cover the end of the first electrode layer 411 of the first light-emitting device in the first opening, so as to prevent the second electrode layer 413 of the first light-emitting device formed subsequently from contacting with it. short circuit. And during the manufacturing process, it can be automatically disconnected at the boundary of the first opening or the second opening, avoiding the use of a fine mask and reducing the manufacturing cost.
  • the second electrode layer 413 of the first light-emitting device can be disposed on the surface of the light-emitting functional layer 412 of the first light-emitting device facing away from the driving backplane 2 , and can be at least partially disposed in the first opening, and can at least Partially covering the first lead 2141, and then the second electrode layer 413 of the first light emitting device can be connected to the pixel driving circuit 21 through the first lead 2141, so that electricity can be supplied to the second electrode layer 413 of the first light emitting device through the pixel driving circuit 21 .
  • the second electrode layer 413 of the first light emitting device can be automatically disconnected at the boundary of the second opening, avoiding the use of a fine mask and further reducing the manufacturing cost.
  • the orthographic projection of the second electrode layer 413 of the first light-emitting device in the first opening at least partially overlaps with the orthographic projection of the light-emitting functional layer 412 of the first light-emitting device in the first opening, and the first The light emitting functional layer 412 of the light emitting device, the second electrode layer 413 of the first light emitting device, and the first electrode layer 411 of the first light emitting device exposed by the first opening may together constitute the first light emitting device.
  • the second light emitting device may share one electrode with the first light emitting device, for example, the first electrode layer of the second light emitting device may be the second electrode layer 413 of the first light emitting device.
  • the light-emitting functional layer 42 of the second light-emitting device covers the surface of the second electrode layer 413 of the first light-emitting device facing away from the driving backplane 2 , and the light-emitting functional layer 42 of the second light-emitting device can be placed in the second opening.
  • the light-emitting functional layer 42 of the second light-emitting device thus formed will not be covered after the boundary of the second opening is disconnected
  • the second lead 2142 is exposed, thereby exposing the second lead 2142 .
  • the second electrode layer 43 of the second light-emitting device may at least partially cover the surface of the light-emitting functional layer 42 of the second light-emitting device facing away from the driving backplane 2 , and it may at least partially cover the second lead 2142 , and further may
  • the second electrode layer 43 of the second light emitting device is connected to the pixel driving circuit 21 through the second lead 2142 , so that electricity is supplied to the second electrode layer 43 of the second light emitting device through the pixel driving circuit 21 .
  • the second electrode layer 43 of the second light-emitting device can be automatically disconnected at the boundary of the second opening 521, avoiding the use of a fine mask, which can not only reduce the alignment accuracy requirements for the mask, but also Reduce manufacturing costs.
  • the light-emitting functional layer 42 of the second light-emitting device, the second electrode layer 43 of the second light-emitting device, and the first electrode layer of the second light-emitting device may jointly constitute the second light-emitting device.
  • the orthographic projection of the second electrode layer 43 of the second light emitting device on the driving backplane 2 at least partially overlaps the orthographic projection of the light emitting functional layer 412 of the first light emitting device on the driving backplane 2, so that the first light emitting device emits
  • the light emitted from the second light-emitting device is superimposed with the light emitted by the second light-emitting device, which can improve the utilization rate of the display panel and the display resolution.
  • the third light-emitting device and the second light-emitting device may share an electrode.
  • the first electrode layer of the third light-emitting device is the second electrode layer 43 of the second light-emitting device, and the light-emitting functional layer 44 of the third light-emitting device is located in the third light-emitting device.
  • the side of the first electrode layer 43 of the light-emitting device facing away from the driving backplane 2, and its orthographic projection on the driving backplane 2 can cover the orthographic projection of the first electrode layer 43 of the third light-emitting device on the driving backplane 2; For example, it can cover at least the second opening area, and can fill the gap between the first electrode layer 43 of the third light emitting device and the sidewall of the second opening, thereby preventing the subsequent formation of the third light emitting device from the second opening.
  • the electrode layer 45 is short-circuited in contact with the second electrode layer 43 of the second light emitting device.
  • the second electrode layer 45 of the third light emitting device can cover the surface of the light emitting functional layer 44 of the third light emitting device facing away from the driving backplane 2 , and its orthographic projection on the driving backplane 2 can cover the light emitting functional layer of the third light emitting device The orthographic projection of 44 on the drive backplane 2.
  • the second electrode layer 45 of the third light emitting device can be connected to an external power source through a circuit outside the light emitting unit so as to be powered on.
  • the second electrode layer 43 of the second light emitting device, the light emitting functional layer 44 of the third light emitting device, and the second electrode layer 45 of the third light emitting device may collectively constitute the third light emitting device.
  • a plurality of via holes which are respectively connected with different pixel driving circuits 21 can be formed on the driving backplane 2 through a photolithography process, and the via holes can be arranged at intervals. For example, when one light-emitting unit includes three light-emitting devices, at least three via holes may be formed in a region corresponding to one light-emitting unit.
  • a plurality of first electrode layers 411 of the first light-emitting devices distributed in an array can be formed on the surface of the driving backplane 2 by processes such as chemical vapor deposition, physical vapor deposition, vacuum evaporation, magnetron sputtering or atomic layer deposition.
  • the first electrode layer 411 can be connected to the pixel driving circuit 21 through via holes, as shown in FIG. 28 ; then chemical vapor deposition, physical vapor deposition or atomic layer deposition can be used to drive the backplane 2 and each of the first light-emitting devices.
  • the surface of the first electrode layer 411 forms the pixel definition layer 5
  • a photolithography process may be used to perform photolithography on the pixel definition layer 5 to form openings 51 exposing the first electrode layers 411 of the first light-emitting devices, as shown in FIG. 10 ;
  • a mask with a first mask pattern is used for masking, and the first mask pattern can be the same as the pattern of each opening 51 of the pixel definition layer 5, and then the light emitting functional layer of the first light emitting device can be formed in each opening 51 respectively. 412, as shown in FIG. 11 .
  • the pixel definition layer 5 and the planarization layer 3 can be photolithographically formed to form a via hole 52 through the pixel definition layer 5 and the planarization layer 3.
  • the via hole 52 can be connected to a pixel driving circuit 21, and a second mask can be used.
  • the mask of the pattern is masked, the opening of the second mask pattern can be larger than the opening of the first mask pattern, and then the light-emitting functional layer 412 and part of the pixel definition layer covering the first light-emitting device can be formed according to the second mask pattern
  • the second electrode layer 413 of the first light-emitting device of connected as shown in Figure 12.
  • a mask with a third mask pattern can be used for masking, and the opening of the third mask pattern can be larger than the opening of the second mask pattern, and then the light-emitting functional layer of the second light-emitting device can be formed according to the third mask pattern 42, as shown in Figure 13.
  • a mask with a fourth mask pattern can be used for masking, and the opening of the fourth mask pattern can be larger than the opening of the third mask pattern, and then the second electrode of the second light-emitting device can be formed according to the fourth mask pattern Layer 43.
  • the second electrode layer 43 of the second light emitting device can communicate with a pixel driving circuit 21 through vias 52 penetrating the pixel definition layer 5 and the planarization layer 3, as shown in FIG. 14 .
  • an open mask can be used for masking, and then the light-emitting functional layer 44 of the third light-emitting device and the second electrode of the third light-emitting device are sequentially formed on the surface of the second electrode layer 43 of the second light-emitting device layer 45, as shown in FIG. 16 .
  • a mask with a fifth mask pattern can be used to form the light-emitting material layer 441 of the third light-emitting device, and an open mask can be used to form other layers and the first layer of the light-emitting functional layer 44 of the third light-emitting device.
  • the second electrode layer 45 of the three light-emitting devices can be used for masking, and then the light-emitting functional layer 44 of the third light-emitting device and the second electrode of the third light-emitting device are sequentially formed on the surface of the second electrode layer 43 of the second light-emitting device layer 45, as shown in FIG. 16 .
  • a mask with a fifth mask pattern can be used to form the light
  • first electrode layers 411 of each light emitting device are respectively connected to different pixel driving circuits 21 in the driving backplane 2 , so as to control the corresponding light emitting devices 41 to emit light through the different pixel driving circuits 21 respectively.
  • the difference in the spacing distribution from the first electrode layer 411 of the first light emitting device may be A first lead 2141 and a second lead 2142 are respectively formed in the hole, and the pixel driving circuit 21 in the driving backplane 2 can be electrically led out through the first lead 2141 and the second lead 2142 .
  • the pixel definition layer 5 may include a first pixel definition layer 510 and a second pixel definition layer 520 .
  • the first pixel definition layer 510 can be formed first.
  • the driving backplane 2 and the first electrodes of the first light emitting devices can be formed by chemical vapor deposition, physical vapor deposition or atomic layer deposition.
  • a first pixel definition layer 510 is formed on the surface of the layer 411, and then a first opening can be formed in the first pixel definition layer 510 by a photolithography process, and the first opening can expose the first electrode layer 411 and the first lead of the first light-emitting device. 2141 and the second lead 2142.
  • the sidewall of the first opening can be shrunk toward the driving backplane 2 by controlling the lithography rate.
  • a second pixel definition layer 520 may be formed within the first opening, and the thickness of the second pixel definition layer 520 may be smaller than that of the first pixel definition layer 510, for example, by a chemical vapor deposition process, physical vapor deposition, or atomic
  • the second pixel definition layer 520 is formed in the first opening by a process such as layer deposition, and then a second opening can be formed in the second pixel definition layer 520 by a photolithography process, and the second opening can expose the first electrode layer of the first light emitting device. 411, and at the same time, the first lead 2141 can be exposed at least partially.
  • the sidewall of the second opening can be shrunk toward the driving backplane 2 by controlling the lithography rate.
  • an open mask can be used for masking, and then the light-emitting functional layer 412 of the first light-emitting device and the second electrode of the first light-emitting device are sequentially formed on the surface of the first electrode layer 411 of the first light-emitting device layer 413 , the light-emitting functional layer 42 of the second light-emitting device, the second electrode layer 43 of the second light-emitting device, the light-emitting functional layer 44 of the third light-emitting device, and the second electrode layer 45 of the third light-emitting device.
  • different film layers are disconnected at corresponding positions through the arrangement of pixel definition layers with different thicknesses and the first opening and the second opening, avoiding the use of fine masks, which can reduce the accuracy of masks. Bit accuracy requirements, and can reduce manufacturing costs.
  • the method of forming the first lead 2141 and the second lead 2142 is similar to the method of forming the first lead 2141 and the second lead 2142 in the second embodiment of the present disclosure. Therefore, this Nowhere to go into details. It should be noted that the second lead 2142 may protrude from the surface of the driving backplane 2 .
  • the pixel definition layer 5 may include a first pixel definition layer 510 and a second pixel definition layer 520 .
  • the first pixel definition layer 510 can be formed first.
  • the driving backplane 2 , the second lead 2142 and each of the first light-emitting elements can be formed by chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
  • a first pixel definition layer 510 is formed on the surface of the first electrode layer 411 of the device, and then a first opening can be formed in the first pixel definition layer 510 through a photolithography process, and the first opening can expose the first electrode layer of the first light-emitting device 411 , the first lead 2141 and the second lead 2142 , and at the same time, the second lead 2142 may be exposed on the surface of the first pixel definition layer 511 away from the driving backplane 2 .
  • the sidewall of the first opening can be shrunk toward the driving backplane 2 by controlling the lithography rate.
  • a second pixel definition layer 520 may be formed on the side of the first pixel definition layer 510 away from the driving backplane 2 , and then a second opening may be formed in the second pixel definition layer 520 through a photolithography process, and the second opening may be exposed At the same time, the first opening can also at least partially expose the second leads 2142 located on the surface of the first pixel definition layer 511 . During this process, the sidewall of the second opening can be shrunk toward the driving backplane 2 by controlling the lithography rate.
  • an open mask can be used for masking, and then the light-emitting functional layer 412 of the first light-emitting device and the second electrode of the first light-emitting device are sequentially formed on the surface of the first electrode layer 411 of the first light-emitting device layer 413 , the light-emitting functional layer 42 of the second light-emitting device, the second electrode layer 43 of the second light-emitting device, the light-emitting functional layer 44 of the third light-emitting device, and the second electrode layer 45 of the third light-emitting device.
  • the display panel may further include a second light shielding layer 6 , as shown in FIG. 2 , the second light shielding layer 6 may be disposed on the side of the light emitting device layer 4 away from the driving backplane 2 , and has a plurality of light-transmitting holes 61 distributed in an array, each light-transmitting hole 61 can be a through hole, and its shape can be a rectangle, a circle, an ellipse or other shapes, which will not be exemplified here.
  • the light-transmitting holes 61 may be arranged in a one-to-one correspondence with each opening in the pixel definition layer 5 , and each light-transmitting hole 61 at least partially overlaps with each opening in the pixel definition layer 5 , and the overlapping area may be the one in each light-emitting unit. In the region where all the film layers overlap, the light emitted from the light-emitting unit can be emitted from the light-transmitting hole 61 , and the light-emitting area of each light-emitting unit can be defined by the light-transmitting hole 61 .
  • the material of the second light shielding layer 6 may be metal or organic material, which is not particularly limited herein.
  • Vacuum evaporation, magnetron sputtering, chemical vapor deposition or physical vapor deposition can be used to form a light-shielding film layer on the side of the light-emitting device layer 4 away from the driving backplane 2, and a photolithography process is used to form a light-transmitting film in the light-shielding film layer.
  • Holes 61 are formed, thereby forming the second light shielding layer 6 .
  • a light-shielding film layer can be deposited on the side of the light-emitting device layer 4 away from the driving backplane 2
  • a photoresist can be formed on the side of the light-shielding film layer away from the driving backplane 2
  • a mask is used to expose the photoresist and developing to form a developing area
  • the pattern of the developing area can be the same as the pattern required by the second light shielding layer 6, and its size can be equal to the size of the light transmission hole 61
  • the light shielding film layer can be anisotropically etched in the developing area , to form the second light shielding layer 6
  • the remaining photoresist on the surface of the second light shielding layer 6 can be peeled off to expose the second light shielding layer 6 formed by photolithography.
  • the display panel may further include an encapsulation layer 7 , as shown in FIG. 29 , the encapsulation layer 7 may be located on the side of the light-emitting device layer 4 away from the driving backplane 2 .
  • the encapsulation layer 7 may be located between the light emitting device layer 4 and the second light shielding layer 6 , or may be located on the side of the second light shielding layer 6 away from the light emitting device layer 4 , which is not limited herein.
  • the encapsulation layer 7 can be composed of an organic material, an inorganic material, or a composite film layer with alternating organic layers and inorganic layers.
  • the material of the encapsulation layer 7 can be acrylic material, or silicon nitride, oxide
  • the composite film layer composed of materials such as silicon or silicon oxynitride is not particularly limited here.
  • the encapsulation layer 7 may be a composite film structure in which organic layers and inorganic layers are alternated, for example, it may include a first inorganic layer, an organic layer and a second inorganic layer, and the first inorganic layer may be formed on the light emitting device.
  • the second inorganic layer is formed on the side of the first inorganic layer away from the light-emitting device layer 4, and the organic layer is located between the first inorganic layer and the second inorganic layer, which can block water and oxygen through the inorganic layer, and pass through the organic layer.
  • the layer releases the stress of the inorganic layer, preventing peeling between the light-emitting device layer 4 and the first inorganic layer due to the pulling caused by the stress.
  • Embodiments of the present disclosure also provide a method for manufacturing a display panel.
  • the display panel may be the display panel of any of the above-mentioned embodiments, and its structure will not be described in detail here.
  • the manufacturing method may include steps S110- Step S120, wherein:
  • Step S110 forming a driving backplane, where the driving backplane includes a plurality of pixel driving circuits;
  • Step S120 a light-emitting device layer is formed on one side of the driving backplane, the light-emitting device layer includes a plurality of light-emitting units distributed in an array, and the light-emitting units include a plurality of light-emitting units stacked in a direction away from the driving backplane.
  • the light-emitting devices in the direction perpendicular to the driving backplane, the light-emitting devices other than the light-emitting devices closest to the driving backplane are transparent devices; in the same light-emitting unit, at least some of the light-emitting devices and the The pixel driving circuit is connected to emit light under the driving of the pixel driving circuit, and at least two of the light-emitting devices in the same light-emitting unit have different light-emitting materials.
  • steps of the manufacturing method of the display panel in the present disclosure are described in a specific order in the drawings, this does not require or imply that the steps must be performed in the specific order, or that all the steps must be performed. steps shown to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step for execution, and/or one step may be decomposed into multiple steps for execution, and the like.
  • Embodiments of the present disclosure further provide a display device
  • the display device may include the display panel of any of the above-mentioned embodiments, the structure and beneficial effects of which can refer to the above-mentioned embodiments of the display panel, which will not be described in detail here.
  • the display device in the embodiment of the present disclosure may be a device for displaying images, such as a mobile phone, a display screen, a tablet computer, a TV, and a micro-display device, which will not be listed here.
  • the present disclosure also provides a pixel driving circuit, which is used in the display panel in any of the above-mentioned embodiments.
  • the display panel may be an AMOLED display panel, and the display panel may include a driving backplane and a plurality of pixel arrays distributed on one side of the driving backplane.
  • Each light-emitting unit may include a plurality of light-emitting devices connected in series between the first power supply terminal VDD and the second power supply terminal VSS to emit light.
  • the display panel may be divided into a display area and a peripheral area located outside the display area.
  • the driving backplane may include a substrate and a driving circuit arranged on the substrate.
  • the driving circuit may include a pixel driving circuit located in the display area and a peripheral circuit located in the peripheral area.
  • the peripheral circuit is connected to the pixel driving circuit and includes a light emission control circuit. circuit, gate drive circuit and source drive circuit, etc.
  • the light-emitting control circuit can be used to output light-emitting control signals to the pixel driving circuit
  • the gate driving circuit can be used to output the writing control signal to the pixel driving circuit
  • the source driving circuit can be used to output data signals to the pixel driving circuit
  • the driving circuit It can also be used to output the first power supply signal to the first power supply terminal VDD of the pixel driving circuit, and output the second power supply signal to the second power supply terminal VSS.
  • Each light emitting device can be an OLED light emitting element, namely an organic light emitting diode, which can have a first end and a second end, the first end can be an anode, and the second end can be a cathode.
  • the first end of the light emitting device can be connected to the pixel driving circuit, and the second end is used for inputting the second power signal.
  • the light-emitting device By controlling the peripheral circuit to input the light-emitting control signal, write control signal, data signal, first power supply signal and second power supply signal to the pixel driving circuit and the light-emitting device, the light-emitting device can emit light to display an image.
  • the pixel driving circuit includes a plurality of driving units, each of which includes a driving transistor, a data writing unit 301 and an energy storage unit C, wherein:
  • the driving transistor has a control terminal, a first terminal and a second terminal, and the second terminal of the driving transistor is used for connecting with the first terminal of the light emitting device;
  • the data writing unit 301 is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor;
  • the first end of the energy storage unit C is connected to the first power supply terminal VDD, and the second end of the energy storage unit C is connected to the control end of the driving transistor;
  • each light-emitting unit is connected to the second terminal of a driving transistor of a driving unit.
  • the transistors of the first driving unit 310 are the first driving transistor DT1 and the second driving unit
  • the transistor of 320 is the second driving transistor DT2
  • the transistor of the third driving unit 330 is the third driving transistor DT3.
  • the number of light-emitting devices may also be three, which are a first light-emitting device, a second light-emitting device and a third light-emitting device, respectively.
  • the light emitted by the first light emitting device may be red (R)
  • the light emitted by the second light emitting device may be green (G)
  • the light emitted by the third light emitting device may be blue (B).
  • the second end of the first driving transistor DT1 is connected to the first light emitting device (R);
  • the second end of the second driving transistor DT2 is connected between the first light emitting device (R) and the second light emitting device (G);
  • the second end of the third driving transistor DT3 is connected between the second light emitting device (G) and the third light emitting device (B), and the second end of the third light emitting device (B) is connected to the second power supply terminal VSS for A second power supply signal is input.
  • the working process of the pixel driving circuit of the first embodiment of the present disclosure is as follows:
  • the data writing unit 301 of each driving unit is turned on, so that the data signal is transmitted to the control terminal of the driving transistor through the data writing unit 301 and the driving transistor, and the energy storage unit C is charged, so as to make more light-emitting devices emit light simultaneously;
  • the first power supply signal is respectively input to the first driving transistor DT1, the second driving transistor DT2 and the third driving transistor DT3 through the energy storage unit C of each driving unit, so as to connect the first driving transistor DT1 and the second driving transistor DT1 to the second driving transistor DT1.
  • DT2 and the third driving transistor DT3 are turned on respectively, so that the signal of the second end of the first driving transistor DT1 is transmitted to the first end of the first light emitting device (R), and the signal of the second end of the second driving transistor DT2 is transmitted to the second end of the second driving transistor DT2.
  • the first end of the light-emitting device (G) is transmitted, and the signal of the second end of the third driving transistor DT3 is transmitted to the first end of the third light-emitting device (B), thereby driving the first light-emitting device (R) and the second light-emitting device. (G) and the third light-emitting device (B) emit light simultaneously.
  • T1 to T5 are continuous stages.
  • the data signal Gate, the first power supply signal Data1 input by the first driving transistor, and the first power supply signal Data2 input by the second driving transistor and the first power signal Data3 input by the third driving transistor are all high level;
  • the data signal Gate, the first power signal Data1 input by the first driving transistor, the first power signal Data2 input by the second driving transistor and The first power signal Data3 input by the third driving transistor is all low level;
  • stage T3 the data signal Gate, the first power signal Data1 input by the first driving transistor, the first power signal Data2 input by the second driving transistor, and the The first power signal Data3 input by the three driving transistors are all high level;
  • the data signal Gate, the first power signal Data1 input by the first driving transistor, the first power signal Data2 input by the second driving transistor and the third The first power signal Data3 input by the driving transistor is all low level;
  • the voltage passing through the third light-emitting device (B) is Data3
  • the voltage passing through the second light-emitting device (G) is Data2-Data3
  • the voltage passing through the first light-emitting device (R) is Data1-Data2
  • Data1 is greater than Data2 and greater than Data3
  • the specific values of Data1, Data2 and Data3 can be controlled according to the luminous intensity required by each light-emitting device. Therefore, in the T1 stage, the T3 stage and the T5 stage, the RGB can emit light at the same time.
  • the voltage value at both ends of each light-emitting device can be adjusted, and then the spectrum of any color can be adjusted.
  • the adjusted spectrum is shown in Figure 33.
  • the abscissa is the wavelength and the ordinate is light intensity.
  • the pixel driving circuit is used to drive a plurality of light-emitting devices connected in series between the first power supply terminal VDD and the second power supply terminal VSS to emit light, and the plurality of light-emitting devices can emit light.
  • the pixel driving circuit includes a driving transistor DT, a data writing unit 301, an energy storage unit C, and a first switching unit ST1 , the second switch unit ST2, the third switch unit ST3 and the fourth switch unit ST4, wherein:
  • the driving transistor DT has a control terminal, a first terminal and a second terminal, and the second terminal of the driving transistor DT is used for connecting with the first terminal of the first light emitting device (R);
  • the data writing unit 301 is used to be turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor DT;
  • the first end of the energy storage unit C is connected to the first power supply terminal VDD, and the second end of the energy storage unit C is connected to the control end of the driving transistor DT;
  • the first switch unit ST1 is used to turn on in response to the light-emitting control signal, the first end of the first switch unit ST1 is connected between the driving transistor DT and the first light-emitting device (R), and the second end of the first switch unit ST1 connected between the first light-emitting device (R) and the second light-emitting device (G);
  • the second switch unit ST2 is turned on in response to the light-emitting control signal, the first end of the second switch unit ST2 is connected between the driving transistor DT and the first light-emitting device (R), and the second end of the second switch unit ST2 connected between the second light-emitting device (G) and the third light-emitting device (B);
  • the third switch unit ST3 is configured to be turned on in response to the light-emitting control signal.
  • the first end of the third switch unit ST3 is connected between the first light-emitting device (R) and the second light-emitting device (G).
  • the third switch unit ST3 The second end of is connected to the second power supply end VSS;
  • the fourth switch unit ST4 is used to turn on in response to the light-emitting control signal.
  • the first end of the fourth switch unit ST4 is connected between the second light-emitting device (G) and the third light-emitting device (B).
  • the fourth switch unit ST4 The second terminal of the is connected to the second power terminal VSS.
  • the working process of the pixel driving circuit of the second embodiment of the present disclosure is as follows:
  • the data writing unit 301 is turned on to transmit the data signal to the control terminal of the driving transistor DT through the data writing unit 301 and the driving transistor DT, and charging the energy storage unit C;
  • the first power supply signal is input to the driving transistor DT through the energy storage unit C to turn on the driving transistor DT, so that the signal from the second end of the driving transistor DT is sent to the first end of the first light-emitting device (R).
  • T1 to T5 are continuous stages.
  • the data signal Gate and the first power supply signal Data are both at high level, and the first switch unit ST1 and the second switch unit ST2 are turned off. is turned off, the third switch unit ST3 and the fourth switch unit ST4 are turned on; in the T2 stage, the data signal Gate and the first power supply signal Data are both low level, the first switch unit ST1, the second switch unit ST2, and the third switch unit ST2.
  • the unit ST3 and the fourth switch unit ST4 are both turned off; in the stage T3, the data signal Gate and the first power signal Data are both at a high level, the second switch unit ST2 and the third switch unit ST3 are turned off, and the first switch unit ST1 and the fourth switch unit ST4 are turned on; in the T4 stage, the data signal Gate and the first power signal Data are both low level, the first switch unit ST1, the second switch unit ST2, the third switch unit ST3 and the fourth switch unit ST4 are both turned off; in stage T5, the data signal Gate and the first power supply signal Data are both at high level, the first switch unit ST1 and the second switch unit ST2 are turned on, and the third switch unit ST3 and the fourth switch unit ST4 are turned off break. Therefore, in T1 stage R display, T3 stage G display, T5 stage B display, and then realize RGB time-sharing display.
  • the spectrum of the first light-emitting device (R) is shown in Figure 36
  • the spectrum of the second light-emitting device (G) is shown in Figure 37
  • the spectrum of the third light-emitting device (B) is shown in Figure 37.
  • the abscissas are wavelengths
  • the ordinates are light intensity.
  • the pixel driving circuit is used to drive a plurality of light-emitting devices connected in series between the first power supply terminal VDD and the second power supply terminal VSS to emit light, and the plurality of light-emitting devices can emit light.
  • the pixel driving circuit includes a driving transistor DT, a data writing unit 301, an energy storage unit C, and a first switching unit ST1 , the second switch unit ST2 and the third switch unit ST3, wherein:
  • the driving transistor DT has a control terminal, a first terminal and a second terminal, and the second terminal of the driving transistor DT is used for connecting with the first terminal of the first light emitting device (R);
  • the data writing unit 301 is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor DT;
  • the first end of the energy storage unit C is connected to the first power supply terminal VDD, and the second end of the energy storage unit C is connected to the control end of the driving transistor DT;
  • the first switch unit ST1 is used to turn on in response to the light-emitting control signal, the first end of the first switch unit ST1 is connected between the driving transistor DT and the first light-emitting device (R), and the second end of the first switch unit ST1 connected between the first light-emitting device (R) and the second light-emitting device (G);
  • the second switch unit ST2 is used to turn on in response to the light-emitting control signal.
  • the first end of the second switch unit ST2 is connected between the first light-emitting device (R) and the second light-emitting device (G).
  • the second switch unit ST2 The second end of is connected between the second light-emitting device (G) and the third light-emitting device (B);
  • the third switch unit ST3 is turned on in response to the light-emitting control signal.
  • the first end of the third switch unit ST3 is connected between the second light-emitting device (G) and the third light-emitting device (B).
  • the third switch unit ST3 The second terminal of the is connected to the second power terminal VSS.
  • the working process of the pixel driving circuit of the third embodiment of the present disclosure is as follows:
  • the data writing unit 301 is turned on to transmit the data signal to the control terminal of the driving transistor DT through the data writing unit 301 and the driving transistor DT, and charging the energy storage unit C;
  • the first power supply signal is input to the driving transistor DT through the energy storage unit C to turn on the driving transistor DT, so that the signal from the second end of the driving transistor DT is transmitted to the first end of the first light-emitting device (R).
  • T1 to T5 are continuous stages.
  • the data signal Gate and the first power supply signal Data are both at high level, the first switch unit is turned off, and the second switch unit and The third switch unit is turned on;
  • the data signal Gate and the first power supply signal Data are both low level, and the first switch unit, the second switch unit and the third switch unit are all turned off;
  • the data signal Gate and the first power signal Data are both at high level, the first switch unit and the third switch unit are turned on, and the second switch unit is turned off;
  • the data signal Gate and the first power signal Data are both at low level , the first switch unit, the second switch unit and the third switch unit are all turned off;
  • the data signal Gate and the first power supply signal Data are both high level, the first switch unit and the second switch unit are turned on,
  • the third switching unit is turned off. Therefore, in T1 stage R display, T3 stage G display, T5 stage B display
  • the pixel driving circuit is used to drive a plurality of light-emitting devices connected in series between the first power supply terminal VDD and the second power supply terminal VSS to emit light, and the plurality of light-emitting devices can emit light.
  • the pixel driving circuit includes a driving transistor DT, a data writing unit 301, an energy storage unit C, and a first switching unit ST1 , the second switch unit ST2 and the connecting line, wherein:
  • the driving transistor DT has a control terminal, a first terminal and a second terminal, and the second terminal of the driving transistor DT is used for connecting with the first terminal of the first light emitting device (R);
  • the data writing unit 301 is turned on in response to the writing control signal, so as to transmit the data signal to the first end of the driving transistor DT;
  • the first end of the energy storage unit C is connected to the first power supply terminal VDD, and the second end of the energy storage unit C is connected to the control end of the driving transistor DT;
  • the first switch unit ST1 is used for being turned on in response to the light-emitting control signal, and the first switch unit ST1 is connected between the second end of the driving transistor DT and the first light-emitting device (R);
  • the second switch unit ST2 is turned on in response to the light-emitting control signal, the first end of the second switch unit ST2 is connected between the driving transistor DT and the first light-emitting device (R), and the second end of the second switch unit ST2 connected between the second light-emitting device (G) and the third light-emitting device (B);
  • One end of the connecting line is connected between the first light-emitting device (R) and the second light-emitting device (G), and the other end is connected with the second power supply terminal VSS.
  • the operation process of the pixel driving circuit of the fourth embodiment of the present disclosure is as follows:
  • the data writing unit 301 is turned on to transmit the data signal to the control terminal of the driving transistor DT through the data writing unit 301 and the driving transistor DT, and charging the energy storage unit C;
  • the first power supply signal is input to the driving transistor DT through the energy storage unit C to turn on the driving transistor DT, so that the signal from the second end of the driving transistor DT is transmitted to the first end of the first light-emitting device (R).
  • T1 to T5 are continuous stages.
  • the data signal Gate is at a high level
  • the first power supply signal Data is at a positive voltage
  • the first switch unit ST1 is turned on
  • the second switch unit ST2 is turned off
  • the first switch unit ST1 is turned off.
  • a power signal Data is transmitted to the first end of the first light-emitting device (R), and the second power signal is transmitted to the second end of the first light-emitting device (R) through the connecting wire, and then the two ends of the first light-emitting device (R) are transmitted.
  • the terminal forms a voltage difference, and the first light-emitting device (R) emits light;
  • the data signal Gate and the first power supply signal Data are both low levels, and the first switching unit ST1 and the second switching unit ST2 are both turned off;
  • the data signal Gate is at a high level, the first power signal Data is at a negative voltage, the first switch unit ST1 is turned off, the second switch unit ST2 is turned on, and the first power signal Data is transmitted to the second light-emitting device (G)
  • the second end, the second power signal is transmitted to the first end of the second light-emitting device (G) through the connecting wire, and then a voltage difference is formed between the two ends of the second light-emitting device (G), and the second light-emitting device (G) emits light;
  • the data signal Gate and the first power signal Data are both at high level, the first switch unit ST1 is turned off, the second switch unit ST2 is turned on, and the first power signal Data is transmitted to
  • the present disclosure also provides a driving method for a pixel driving circuit, where the pixel driving circuit is the pixel driving circuit of any of the above embodiments, and its structure will not be described in detail here.
  • the driving method of the present disclosure may include:
  • the data writing unit of each driving unit is turned on to transmit the data signal to the control terminal of the driving transistor through the data writing unit and the driving transistor, and
  • the energy storage unit is charged so that the plurality of light emitting devices emit light simultaneously.
  • the driving method of the present disclosure may include steps S310 to S320, wherein:
  • Step S310 in the data writing stage, turn on the data writing unit, so as to transmit the data signal to the control terminal of the driving transistor through the data writing unit and the driving transistor, and send the data to the control terminal of the driving transistor.
  • Step S320 in the light-emitting stage, input a first power supply signal to the driving transistor through the energy storage unit to turn on the driving transistor, so that the signal from the second end of the driving transistor emits light to the first transmitting the first end of the device; turning off the first switch unit and the second switch unit, and turning on the third switch unit and the fourth switch unit, so that the first light-emitting device emits light; or , turning on the first switch unit and the fourth switch unit, and turning off the second switch unit and the third switch unit, so that the second light-emitting device emits light; or, turning on the first switch unit A switch unit and the second switch unit turn off the third switch unit and the fourth switch unit, so that the third light emitting device emits light.
  • the driving method of the present disclosure may include steps S410 to S420, wherein:
  • Step S410 in the data writing stage, turn on the data writing unit, so as to transmit the data signal to the control terminal of the driving transistor through the data writing unit and the driving transistor, and send the data to the control terminal of the driving transistor.
  • Step S420 in the light-emitting stage, input a first power supply signal to the driving transistor through the energy storage unit to turn on the driving transistor, so that the signal from the second end of the driving transistor emits light to the first
  • the first end of the device is transmitted; the first switch unit is turned off, and the second switch unit and the third switch unit are turned on, so that the first light-emitting device emits light; or, the second switch unit is turned off a switch unit, which turns on the first switch unit and the third switch unit, so that the second light-emitting device emits light; or turns off the third switch unit, and turns on the first switch unit and the third switch unit. the second switch unit to make the third light emitting device emit light.
  • the driving method of the present disclosure may include steps S510 to S520, wherein:
  • Step S510 in the data writing stage, turn on the data writing unit, so as to transmit the data signal to the control terminal of the driving transistor through the data writing unit and the driving transistor, and send the data to the control terminal of the driving transistor.
  • Step S520 in the light-emitting stage, input a first power supply signal to the driving transistor through the energy storage unit to turn on the driving transistor, so that the signal from the second end of the driving transistor emits light to the first
  • the first end of the device is transmitted; the second switch unit is turned off, and the first switch unit is turned on, so that the first light-emitting device emits light; or, the first switch unit is turned off, and the second switch unit is turned on , and when the voltage value of the first power supply terminal is lower than the voltage value of the second power supply terminal, the second light-emitting device emits light; or, the first switch unit is turned off, and the second switch unit is turned on , and when the voltage value of the first power supply terminal is higher than the voltage value of the second power supply terminal, the third light-emitting device emits light.

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Abstract

一种显示装置、显示面板及其制造方法、驱动电路及驱动方法,该显示面板(100)包括驱动背板(2)及发光器件层(4),其中:驱动背板(2)包括多个像素驱动电路(21);发光器件层(4)包括多个呈阵列分布的发光单元,发光单元包括向背离驱动背板(2)的方向层叠设置的多个发光器件(41);在垂直于驱动背板(2)的方向上,距离驱动背板(2)最近的发光器件(41)以外的发光器件(41)为透明器件;同一发光单元中,至少部分发光器件(41)与像素驱动电路(21)连接,用于在像素驱动电路(21)的驱动下发光,同一发光单元中至少有两个发光器件(41)的发光材料不同。

Description

显示装置、显示面板及其制造方法、驱动电路及驱动方法
交叉引用
本公开要求于2021年1月26日提交的申请号为202110101413.9,名称为“显示装置、显示面板及其制造方法”的中国专利申请的优先权,该中国专利申请的全部内容通过引用全部并入本文。
技术领域
本公开涉及显示技术领域,具体而言,涉及一种显示装置、显示面板及其制造方法、驱动电路及驱动方法。
背景技术
随着显示技术的发展,OLED(Organic Light Emitting Diode,有机发光二极管)显示面板因具有轻薄、高对比度、可弯曲、响应时间短等优点,被广泛应用于显示技术中。然而,现有显示面板通过将RGB像素进行平铺以实现全彩,像素密度较低,形成的图像分辨率较低。
需要说明的是,在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解,因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
公开内容
本公开的目的在于克服上述现有技术的不足,提供一种显示装置、显示面板及其制造方法、驱动电路及驱动方法,可提高显示分辨率。
根据本公开的一个方面,提供一种显示面板,包括:
驱动背板,包括多个像素驱动电路;
发光器件层,包括多个呈阵列分布的发光单元,所述发光单元包括向背离所述驱动背板的方向层叠设置的多个发光器件;在垂直于所述驱动背板的方向上,距离所述驱动背板最近的所述发光器件以外的发光器件为透明器件;
同一发光单元中,至少部分所述发光器件与所述像素驱动电路连接,用于在所述像素驱动电路的驱动下发光,同一所述发光单元中至少有两个所述发光器件的发光材料不同。
在本公开的一种示例性实施方式中,所述发光器件包括:
第一电极层,形成于所述驱动背板的一侧,并与一所述像素驱动电路连接;
发光功能层,形成于所述第一电极层背离所述驱动背板的表面;
第二电极层,形成于所述发光功能层背离所述驱动背板的表面;
在垂直于所述驱动背板的方向上相邻两个所述发光器件中,靠近所述驱动背板的发光器件的第二电极层与背离所述驱动背板的发光器件的第一电极层为同一电极层。
在本公开的一种示例性实施方式中,同一所述发光单元的发光器件的数量为三个,且包括向背离所述驱动背板的方向分布的第一发光器件、第二发光器件及第三发光器件,且所述第一发光器件、所述第二发光器件及所述第三发光器件发光材料各不相同,用于发出不同颜色的光。
在本公开的一种示例性实施方式中,所述第一发光器件的所述第一电极层设于所 述驱动背板的一侧,所述显示面板还包括:
像素定义层,与所述第一发光器件的第一电极层设于所述驱动背板的同一侧面,所述像素定义层设有多个露出各所述第一发光器件的第一电极层的开口;
所述第一发光器件的发光功能层至少部分设于所述开口内;
所述第一发光器件的第二电极层设于所述像素定义层背离所述驱动背板的表面,且其在所述开口内的正投影与所述第一发光器件的发光功能层在所述开口内的正投影至少部分交叠;所述第一发光器件的第二电极层通过贯穿所述像素定义层的过孔与所述像素驱动电路连接;
所述第二发光器件的发光功能层覆盖于所述第一发光器件的第二电极层背离所述驱动背板的表面,且其在所述驱动背板上的正投影覆盖所述第一发光器件的第二电极层在所述驱动背板上的正投影;
所述第二发光器件的第二电极层覆盖所述第二发光器件的发光功能层及所述像素定义层的表面,且其在所述开口内的正投影与所述第一发光器件的发光功能层在所述开口内的正投影至少部分交叠,并通过贯穿所述像素定义层的过孔与所述像素驱动电路连接;
所述第三发光器件的发光功能层包括依次层叠的空穴传输层、发光材料层及电子传输层,所述空穴传输层位于所述第三发光器件的第一电极层背离所述驱动背板的一侧,且其在所述驱动背板上的正投影覆盖所述第二发光器件的第二电极层在所述驱动背板上的正投影;所述发光材料层位于所述空穴传输层背离所述驱动背板的一侧,且其在所述开口内的正投影与所述第二发光器件的第二电极层在所述开口内的正投影至少部分交叠;所述电子传输层覆盖所述发光材料层及所述空穴传输层共同构成的结构的表面;
所述第三发光器件的第二电极层位于所述电子传输层背离所述驱动背板的一侧,且其在所述开口内的正投影与所述发光材料层在所述开口内的正投影至少部分交叠。
在本公开的一种示例性实施方式中,各所述发光单元的第三发光器件共用所述空穴传输层及所述电子传输层。
在本公开的一种示例性实施方式中,所述第一发光器件的发光颜色为蓝色,所述第二发光器件的发光颜色为绿色,所述第三发光器件的发光颜色为红色。
在本公开的一种示例性实施方式中,所述驱动背板还包括连接引线,所述连接引线包括与所述第一电极层间隔分布的第一引线和第二引线,所述第一引线和所述第二引线分别与不同的像素驱动电路连接;
所述显示面板还包括:
第一像素定义层,与所述第一发光器件的第一电极层设于所述驱动背板的同一侧面,所述第一像素定义层设有多个露出各所述第一发光器件的第一电极层的第一开口,所述第一开口的侧壁向所述驱动背板收缩;
第二像素定义层,与所述第一像素定义层设于所述驱动背板的同一侧面,并位于所述第一开口内,且与所述第一开口的侧壁具有第一间隙,所述第二引线至少部分暴露于所述第一间隙中;所述第二像素定义层包括第二开口,所述第一发光器件的第一电极层位于所述第二开口内,并与所述第二开口的侧壁具有第二间隙,所述第一引线至少部分暴露于所述第二间隙中;在垂直于所述驱动背板的方向上,所述第二像素定义层的厚度低于所述第一像素定义层的厚度;
所述第一发光器件的发光功能层至少部分设于所述第二开口内,并在所述第二开口的边界断开;
所述第一发光器件的第二电极层至少部分设于所述第二开口内,且至少部分覆盖所述第一引线,所述第一发光器件的第二电极层在所述第二开口的边界断开;
所述第二发光器件的发光功能层覆盖于所述第一发光器件的第二电极层背离所述驱动背板的表面,且在所述第二开口内连续,并在所述第一开口的边界断开;所述第二发光器件的发光功能层露出所述第二引线;
所述第二发光器件的第二电极层至少部分覆盖所述第二发光器件的发光功能层的表面,且至少部分覆盖所述第二引线,所述第二发光器件的第二电极层在所述第一开口的边界断开,且其在所述驱动背板上的正投影与所述第一发光器件的发光功能层在所述驱动背板上的正投影至少部分交叠;
所述第三发光器件的发光功能层位于所述第三发光器件的第一电极层背离所述驱动背板的一侧,且其在所述驱动背板上的正投影覆盖所述第三发光器件的第一电极层在所述驱动背板上的正投影;
所述第三发光器件的第二电极层覆盖于所述第三发光器件的发光功能层背离所述驱动背板的表面,且其在所述驱动背板上的正投影覆盖所述第三发光器件的发光功能层在所述驱动背板上的正投影。
在本公开的一种示例性实施方式中,所述驱动背板还包括连接引线,所述连接引线包括与所述第一电极层间隔分布的第一引线和第二引线,所述第一引线和所述第二引线分别与不同的像素驱动电路连接;
所述显示面板还包括:
第一像素定义层,与所述第一发光器件的第一电极层设于所述驱动背板的同一侧面,所述第一像素定义层设有多个露出各所述第一发光器件的第一电极层并至少部分露出所述第一引线的第一开口;所述第一开口的侧壁向所述驱动背板收缩;所述第二引线能穿过所述第一像素定义层,并暴露于所述第一像素定义层的顶表面;
第二像素定义层,设于所述第一像素定义层背离所述驱动背板的表面,且具有多个露出各所述第一开口及至少部分露出所述第二引线的第二开口,所述第二开口的侧壁向所述驱动背板收缩;
所述第一发光器件的发光功能层至少部分设于所述第一开口内,并在所述第一开口或所述第二开口的边界断开;
所述第一发光器件的第二电极层至少部分设于所述第一开口内,且至少部分覆盖所述第一引线,所述第一发光器件的第二电极层在所述第二开口的边界断开;
所述第二发光器件的发光功能层覆盖于所述第一发光器件的第二电极层背离所述驱动背板的表面,且至少部分位于所述第一开口内,并在所述第二开口的边界断开;
所述第二发光器件的第二电极层至少部分覆盖所述第二发光器件的发光功能层的表面,且至少部分覆盖所述第二引线,所述第二发光器件的第二电极层在所述第二开口的边界断开,且其在所述驱动背板上的正投影与所述第一发光器件的发光功能层在所述驱动背板上的正投影至少部分交叠;
所述第三发光器件的发光功能层位于所述第三发光器件的第一电极层背离所述驱动背板的一侧,且其在所述驱动背板上的正投影覆盖所述第三发光器件的第一电极层在所述驱动背板上的正投影;
所述第三发光器件的第二电极层覆盖于所述第三发光器件的发光功能层背离所述驱动背板的表面,且其在所述驱动背板上的正投影覆盖所述第三发光器件的发光功能层在所述驱动背板上的正投影。
在本公开的一种示例性实施方式中,所述显示面板还包括:
遮光层,设于所述发光器件层背离所述驱动背板的一侧,且具有多个透光孔,各所述透光孔与各所述开口一一对应设置,且每个所述透光孔在所述驱动背板上的正投影和与之对应的开口中的各发光器件在所述驱动背板上的正投影至少部分交叠。
在本公开的一种示例性实施方式中,所述显示面板还包括:
封装层,位于所述发光器件层背离所述驱动背板的一侧。
根据本公开的一个方面,提供一种显示装置,包括上述任意一项所述的显示面板。
根据本公开的一个方面,提供一种显示面板的制造方法,包括:
形成驱动背板,所述驱动背板包括多个像素驱动电路;
在所述驱动背板的一侧形成发光器件层,所述发光器件层包括多个呈阵列分布的发光单元,所述发光单元包括向背离所述驱动背板的方向层叠设置的多个发光器件;在垂直于所述驱动背板的方向上,距离所述驱动背板最近的所述发光器件以外的发光器件为透明器件;
同一发光单元中,至少部分所述发光器件与所述像素驱动电路连接,用于在所述像素驱动电路的驱动下发光,同一所述发光单元中至少有两个所述发光器件的发光材料不同。
根据本公开的一个方面,提供一种像素驱动电路,用于驱动串联于第一电源端和第二电源端之间的多个发光器件发光;
所述像素驱动电路包括多个驱动单元,每个所述驱动单元均包括驱动晶体管、数据写入单元及储能单元;
所述驱动晶体管具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述发光器件的第一端连接;
所述数据写入单元用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
每个所述发光器件的第一端与一所述驱动单元的驱动晶体管的第二端连接。
在本公开的一种示例性实施方式中,多个所述驱动单元包括第一驱动晶体管、第二驱动晶体管及第三驱动晶体管;多个所述发光器件包括第一发光器件、第二发光器件和第三发光器件;
所述第一驱动晶体管的第二端与所述第一发光器件连接;
所述第二驱动晶体管的第二端连接于所述第一发光器件与所述第二发光器件之间;
所述第三驱动晶体管的第二端连接于所述第二发光器件与所述第三发光器件之间,所述第三发光器件的第二端与所述第二电源端连接。
根据本公开的一个方面,提供一种像素驱动电路,用于驱动串联于第一电源端和第二电源端之间的第一发光器件、第二发光器件和第三发光器件发光,所述像素驱动电路包括:
驱动晶体管,具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述第一发光器件的第一端连接;
数据写入单元,用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
储能单元,所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
第一开关单元,用于响应发光控制信号而导通,所述第一开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第一开关单元的第二端连接于所述第一发光器件与所述第二发光器件之间;
第二开关单元,用于响应发光控制信号而导通,所述第二开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第二开关单元的第二端连接于所述 第二发光器件与所述第三发光器件之间;
第三开关单元,用于响应发光控制信号而导通,所述第三开关单元的第一端连接于所述第一发光器件与所述第二发光器件之间,所述第三开关单元的第二端与所述第二电源端连接;
第四开关单元,用于响应发光控制信号而导通,所述第四开关单元的第一端连接于所述第二发光器件与所述第三发光器件之间,所述第四开关单元的第二端与所述第二电源端连接。
根据本公开的一个方面,提供一种像素驱动电路,用于驱动串联于第一电源端和第二电源端之间的第一发光器件、第二发光器件和第三发光器件发光,所述像素驱动电路包括:
驱动晶体管,具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述第一发光器件的第一端连接;
数据写入单元,用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
储能单元,所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
第一开关单元,用于响应发光控制信号而导通,所述第一开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第一开关单元的第二端连接于所述第一发光器件与所述第二发光器件之间;
第二开关单元,用于响应发光控制信号而导通,所述第二开关单元的第一端连接于所述第一发光器件与所述第二发光器件之间,所述第二开关单元的第二端连接于所述第二发光器件与所述第三发光器件之间;
第三开关单元,用于响应发光控制信号而导通,所述第三开关单元的第一端连接于所述第二发光器件与所述第三发光器件之间,所述第三开关单元的第二端与所述第二电源端连接。
根据本公开的一个方面,提供一种像素驱动电路,用于驱动串联于第一电源端和第二电源端之间的第一发光器件、第二发光器件和第三发光器件发光,所述像素驱动电路包括:
驱动晶体管,具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述第一发光器件的第一端连接;
数据写入单元,用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
储能单元,所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
第一开关单元,用于响应发光控制信号而导通,所述第一开关单元连接于所述驱动晶体管的第二端与所述第一发光器件之间;
第二开关单元,用于响应发光控制信号而导通,所述第一开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第一开关单元的第二端连接于所述第二发光器件与所述第三发光器件之间;
连接线,一端连接于所述第一发光器件与所述第二发光器件之间,另一端与所述第二电源端连接。
根据本公开的一个方面,提供一种像素驱动电路的驱动方法,用于上述任意一项所述的像素驱动电路;
所述驱动方法包括:
在数据写入阶段,导通各所述驱动单元的所述数据写入单元,以将所述数据信号 经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电,以使多个发光器件同时发光。
根据本公开的一个方面,提供一种像素驱动电路的驱动方法,用于上述任意一项所述的像素驱动电路;
所述驱动方法包括:
在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断所述第一开关单元及所述第二开关单元,导通所述第三开关单元及所述第四开关单元,以使所述第一发光器件发光;或者,导通所述第一开关单元及所述第四开关单元,关断所述第二开关单元及所述第三开关单元,以使所述第二发光器件发光;或者,导通所述第一开关单元及所述第二开关单元,关断所述第三开关单元及所述第四开关单元,以使所述第三发光器件发光。
根据本公开的一个方面,提供一种像素驱动电路的驱动方法,用于上述任意一项所述的像素驱动电路;
所述驱动方法包括:
在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断所述第一开关单元,导通所述第二开关单元及所述第三开关单元,以使所述第一发光器件发光;或者,关断所述第二开关单元,导通所述第一开关单元及所述第三开关单元,以使所述第二发光器件发光;或者,关断所述第三开关单元,导通所述第一开关单元及所述第二开关单元,以使所述第三发光器件发光。
根据本公开的一个方面,提供一种像素驱动电路的驱动方法,用于上述任意一项所述的像素驱动电路;
所述驱动方法包括:
在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断第二开关单元,导通第一开关单元,以使所述第一发光器件发光;或者,关断所述第一开关单元,导通所述第二开关单元,并在所述第一电源端的电压值低于所述第二电源端的电压值时,所述第二发光器件发光;或者,关断所述第一开关单元,导通所述第二开关单元,并在所述第一电源端的电压值高于所述第二电源端的电压值时,所述第三发光器件发光。
本公开的显示装置、显示面板及其制造方法、驱动电路及驱动方法,通过将多个发光器件叠层设置,可增加各发光单元中发光器件的数量,进而增加显示区域中的发光器件数量,提高显示区域的利用率;同时,由于同一发光单元中至少有两个发光器件的发光材料不同,能发出多种颜色的光线,可使多种颜色的光线叠加实现全彩,进而成倍的提升显示分辨率;在此过程中,由于像素驱动电路与发光器件连接,可通过各像素驱动电路分别驱动各发光器件,使得各发光器件独立发光,互不干扰;此外,由于在垂直于驱动背板的方向上,距离驱动背板最近的发光器件以外的发光器件均为透明器件,可使各发光器件发出的光线均向背离驱动背板的方向出射,避免光线照射 至像素驱动电路,保证像素驱动电路的稳定性。
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分,示出了符合本公开的实施例,并与说明书一起用于解释本公开的原理。显而易见地,下面描述中的附图仅仅是本公开的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为相关技术中显示面板的平铺示意图。
图2为本公开第一种实施方式中显示面板的示意图。
图3为本公开第二种实施方式中显示面板的示意图。
图4为本公开第三种实施方式中显示面板的示意图。
图5为本公开第一种实施方式中驱动背板的示意图。
图6为本公开第一种实施方式中平坦化层的示意图。
图7为本公开第一种实施方式中的光谱示意图。
图8为本公开第一种实施方式中显示面板的色域示意图。
图9为本公开实施方式中第二电极层的结构示意图。
图10为本公开第一种实施方式中像素定义层的示意图。
图11为本公开第一种实施方式中发光功能层的示意图。
图12为本公开第一种实施方式中第二电极层的示意图。
图13为本公开第一种实施方式中第二发光器件的发光功能层的示意图。
图14为本公开第一种实施方式中第二发光器件的第二电极层的示意图。
图15为本公开第一种实施方式中第三发光器件的发光功能层的示意图。
图16为本公开第一种实施方式中第三发光器件的第二电极层的示意图。
图17为本公开第二种实施方式中像素定义层的示意图。
图18为本公开第二种实施方式中第一发光器件发光功能层的示意图。
图19为本公开第二种实施方式中第一发光器件第二电极层的示意图。
图20为本公开第二种实施方式中第二发光器件的发光功能层的示意图。
图21为本公开第二种实施方式中第二发光器件的第二电极层的示意图。
图22为本公开第二种实施方式中第三发光器件的发光功能层的示意图。
图23为本公开第三种实施方式中像素定义层的示意图。
图24为本公开第三种实施方式中第一发光器件发光功能层的示意图。
图25为本公开第三种实施方式中第一发光器件第二电极层的示意图。
图26为本公开第三种实施方式中第二发光器件的发光功能层的示意图。
图27为本公开第三种实施方式中第二发光器件的第二电极层的示意图。
图28为本公开一实施方式中第一电极层的示意图。
图29为本公开一实施方式中封装层的示意图。
图30为本公开实施方式中显示面板的制造方法的流程图。
图31为本公开第一种实施方式中像素驱动电路的示意图。
图32为本公开第一种实施方式中像素驱动电路的工作原理的时序图。
图33为本公开第一种实施方式中像素驱动电路的RGB光谱。
图34为本公开第二种实施方式中像素驱动电路的示意图。
图35为本公开第二种实施方式中像素驱动电路的工作原理的时序图。
图36为本公开一种实施方式中第一发光器件(R)的光谱。
图37为本公开一种实施方式中第一发光器件(G)的光谱。
图38为本公开一种实施方式中第一发光器件(B)的光谱。
图39为本公开第三种实施方式中像素驱动电路的示意图。
图40为本公开第三种实施方式中像素驱动电路的工作原理的时序图。
图41为本公开第四种实施方式中像素驱动电路的示意图。
图42为本公开第四种实施方式中像素驱动电路的工作原理的时序图。
图43为本公开像素驱动电路的驱动方法一实施方式的流程图。
图44为本公开像素驱动电路的驱动方法一实施方式的流程图。
图45为本公开像素驱动电路的驱动方法一实施方式的流程图。
附图标记说明:
100、显示面板;101、像素;1、衬底;12、第一遮光层;13、缓冲层;2、驱动背板;21、像素驱动电路;211、有源层;212、栅绝缘层;2121、第一栅绝缘层;2122、第二栅绝缘层;213、第一源漏层;214、第二源漏层;2141、第一引线;2142、第二引线;215、栅极;22、保护层;3、平坦化层;4、发光器件层;41、发光器件;411、第一电极层;412、发光功能层;413、第二电极层;413a、第一电极修饰层;413b、电极层;413c、第二电极修饰层;42、第二发光器件的发光功能层;43、第二发光器件的第二电极层;44、第三发光器件的发光功能层;441、发光材料层;45、第三发光器件的第二电极层;5、像素定义层;51、开口;510、第一像素定义层;520、第二像素定义层;501、第一间隙;502、第二间隙;52、过孔;6、第二遮光层;61、透光孔;7、封装层;300、驱动单元;301、数据写入单元;DT1、第一驱动晶体管;DT2、第二驱动晶体管;DT3、第三驱动晶体管;Data、数据写入单元;C、储能单元;ST1、第一开关单元;ST2、第二开关单元;ST3、第三开关单元;ST4、第四开关单元。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而,示例实施方式能够以多种形式实施,且不应被理解为限于在此阐述的实施方式;相反,提供这些实施方式使得本公开将全面和完整,并将示例实施方式的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构,因而将省略它们的详细描述。此外,附图仅为本公开的示意性图解,并非一定是按比例绘制。
虽然本说明书中使用相对性的用语,例如“上”“下”来描述图标的一个组件对于另一组件的相对关系,但是这些术语用于本说明书中仅出于方便,例如根据附图中所述的示例的方向。能理解的是,如果将图标的装置翻转使其上下颠倒,则所叙述在“上”的组件将会成为在“下”的组件。当某结构在其它结构“上”时,有可能是指某结构一体形成于其它结构上,或指某结构“直接”设置在其它结构上,或指某结构通过另一结构“间接”设置在其它结构上。
用语“一个”、“一”、“该”、“所述”和“至少一个”用以表示存在一个或多个要素/组成部分/等;用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等;用语“第一”、“第二”、“第三”和“第四”等仅作为标记使用,不是对其对象的数量限制。
在相关技术中,显示面板100主要包括驱动背板和平铺于驱动背板一侧的多个呈阵列分布的发光单元,为了实现全彩显示,通常采用三个平铺的亚像素组成一个像素101,显示面积利用率较小,如图1所示,a为显示面板100的长度,b为显示面板100的宽 度,c为显示面板100的对角线长度,该像素101的分辨率
Figure PCTCN2021082838-appb-000001
且在制造过程中,受蒸镀用精细掩膜版工艺极限的限制,常见显示面板100的PPi在600左右,显示分辨率较低。
本公开实施方式提供了一种显示面板,该显示面板可以是AMOLED显示面板,如图2-图4所示,显示面板可包括驱动背板2和发光器件层4,其中:
驱动背板2包括多个像素驱动电路21;
发光器件层4包括多个呈阵列分布的发光单元,发光单元包括向背离驱动背板2的方向层叠设置的多个发光器件41;在垂直于驱动背板2的方向上,距离驱动背板2最近的发光器件41以外的发光器件41为透明器件;
同一发光单元中,至少部分发光器件41与像素驱动电路21连接,用于在像素驱动电路21的驱动下发光,同一发光单元中至少有两个所述发光器件41的发光材料不同。
在本公开的显示面板中,通过将多个发光器件41叠层设置,可增加各发光单元中发光器件41的数量,进而增加显示区域中的发光器件41数量,提高显示区域的利用率;同时,由于同一发光单元中至少有两个发光器件41的发光材料不同,能发出多种颜色的光线,可使多种颜色的光线叠加实现全彩,进而成倍的提升显示分辨率;在此过程中,由于像素驱动电路21与发光器件41连接,可通过各像素驱动电路21分别驱动各发光器件41,使得各发光器件41独立发光,互不干扰;此外,由于在垂直于驱动背板2的方向上,距离驱动背板2最近的发光器件41以外的发光器件41均为透明器件,可使各发光器件41发出的光线均向背离驱动背板2的方向出射,避免光线照射至像素驱动电路21,保证像素驱动电路21的稳定性。
图2-图4示出了本公开实施方式显示面板的结构示意图,下面结合图2-图4对本公开实施方式中的显示面板的发光原理进行说明,显示面板主要包括驱动背板2和发光器件层4,其中,驱动背板2可设于衬底1的一侧,其可包括设于衬底1一侧的像素驱动层,该像素驱动层包括多个并排设置的像素驱动电路21,发光器件层4设于像素驱动层背离衬底1的一侧,且包括多个呈阵列分布的发光单元,每个发光单元包括多个向背离驱动背板2的方向层叠设置的发光器件41,各发光器件41的发光材料不同,可分别发出不同颜色的光线,同一发光单元中,至少部分发光器件41与像素驱动电路21连接,可通过各像素驱动电路21向各发光器件41通电,通过时序方式控制各发光器件41独立发光,进而显示图像。例如,可对同一发光单元中的多个发光器件41同时通电,控制多个发光器件41同时发光,使多种颜色的光线叠加,可提高显示区域的利用率,提高显示区域的分辨率。
在本公开的一种示例性实施方式中,衬底1可为平板结构,其可采用玻璃等硬质材料,也可采用PI(聚酰亚胺)等柔性材料。衬底1可以是单层或多层结构,在此不做特殊限定。
如图2-图4所示,像素驱动电路21可包括晶体管,晶体管可与发光器件41电连接,以便通过各晶体管一一对应的控制各发光器件41,进而显示图像,在此过程中,各发光器件41独立发光,互不干扰。
晶体管可包括有源层211、栅绝缘层212、栅极215和第一源漏层213,栅绝缘层212可包括第一栅绝缘层2121和第二栅绝缘层2122,可对有源区进行多次掺杂以形成有源层211,有源层211可位于衬底1靠近发光器件层4的一侧;第一栅绝缘层2121覆盖于有源层211;栅极215设于第一栅绝缘层2121背离衬底1的一侧;第二栅绝缘层2122覆盖于栅极215和第一栅绝缘层2121,可对第一栅绝缘层2121和第二栅绝缘层2122进行开孔以形成连接有源区的过孔,该过孔在衬底1上的正投影与栅极215在衬底1上的正投影互不交叠;第一源漏层213形成于第二栅绝缘层2122背离衬底1的一侧,且包括源极和漏极,源极和漏极可通过贯穿第二栅绝缘层2122和/或第一栅绝缘层2121 的过孔连接于有源层211的两端。
此外,如图5所示,驱动背板2还可包括覆盖第一源漏层213的保护层22以及形成于保护层22背离衬底1的一侧的第二源漏层214,其中,保护层22可覆盖于第一源漏层213背离衬底1的表面,可用于阻挡后续工艺中产生的氢等离子体向各晶体管扩散;可对保护层22进行开孔以形成连接第一源漏层213的过孔,第二源漏层214可形成于保护层22背离衬底1的一侧,并可通过贯穿保护层22的过孔与晶体管的第一源漏层213连接。如图6所示,本公开的显示面板还可包括平坦化层3,平坦化层3可覆盖保护层22及第二源漏层214,以消除第二源漏层214的器件断差。
在一实施方式中,如图3和图4所示,第二源漏层214可包括连接引线,该连接引线可包括间隔分布的第一引线2141和第二引线2142,第一引线2141和第二引线2142可分别通过贯穿平坦化层3及保护层22的过孔与不同的像素驱动电路21连接。
在本公开的一种示例性实施方式中,驱动背板2还可包括第一遮光层12及缓冲层13,其中:
第一遮光层12可位于驱动背板2与衬底1之间,如图3和图4所示,第一遮光层12可位于衬底1靠近驱动背板2的一侧,可通过第一遮光层12阻挡外界环境光入射到晶体管的有源层31,保护晶体管的稳定性。
举例而言,可采用真空蒸镀、磁控溅射、化学气相沉积或物理气相沉积等方式在衬底1靠近驱动背板2的一侧形成第一遮光层12,举例而言,可采用光刻工艺形成第一遮光层12,可在衬底1靠近驱动背板2的一侧沉积遮光膜层,在遮光膜层背离衬底1的一侧形成光刻胶,采用掩膜版对光刻胶进行曝光并显影,以形成显影区,显影区的图案可与第一遮光层12所需的图案相同,其尺寸可与第一遮光层12所需图案的尺寸相等,可在显影区对遮光膜层进行非等向蚀刻,以形成第一遮光层12,最后可剥离第一遮光层表面剩余的光刻胶,以将光刻形成的第一遮光层12暴露出来。
缓冲层13可位于第一遮光层12背离衬底1的一侧,可采用化学气相沉积、物理气相沉积或原子层沉积等工艺在第一遮光层12背离衬底1的表面形成缓冲层13,可通过缓冲层13阻挡衬底1中的杂质扩散至驱动背板2中,保护驱动背板2的稳定性。举例而言,像素驱动层可形成于缓冲层13背离衬底1的表面。
在本公开的一种示例性实施方式中,同一发光单元中的各发光器件41可沿垂直于驱动背板2的方向层叠设置,每一个发光器件41可以发出一种颜色的光线,同一发光单元中的各发光器件41可发出多种不同颜色的光,在垂直于驱动背板2的方向上各发光器件41发出的光线可叠加在一起,可通过时序方式控制各发光器件41独立发光,进而实现发光颜色调控。
举例而言,同一发光单元中,发光器件41的数量可为两个或三个,在一实施方式中,同一发光单元中发光器件41的数量为三个,分别为第一发光器件、第二发光器件和第三发光器件,其中,第一发光器件位于像素驱动层背离衬底1的一侧,第二发光器件位于第一发光器件背离衬底1的表面,第三发光器件位于第二发光器件背离衬底1的表面,且第一发光器件、第二发光器件及第三发光器件分别与驱动背板2中的不同的像素驱动电路21一一对应连接。
三个发光器件41的发光材料可各不相同,不同的发光材料可用于发出不同颜色的光,其可以是RGB的任意组合。为了提高分辨率,并均衡各发光器件41发出的光线的光强,在垂直于驱动背板2的方向上靠近驱动背板2一侧的发光器件41发出的光线的光强可大于远离驱动背板2一侧的发光器件41发出的光线的光强,在使用时,即便位于下方的发光器件41的光线受透过率影响有所减弱,也不会影响整体显示效果。例如,在垂直于驱动背板2的方向上,第一发光器件发出的光线的光强可大于第二发光器件发出的光线的光强,第二发光器件发出的光线的光强可大于第三发光器件发出的光线的 光强。
需要说明的是,三个发光器件41发出的光线也可均相同,可有助于延长发光器件的使用寿命。
图7为红、绿、蓝三种颜色的光谱图,图中横坐标为波长范围,纵坐标为光强,曲线中波峰位置为各颜色的光的光强。由图可知,蓝光(B)的光强大于绿光(G)的光强,绿光(G)的光强大于红光(R)的光强,由此可知,优选的方案为:第一发光器件发出的光线颜色为蓝色(B),第二发光器件发出的光线为绿色(G),第三发光器件发出的光线颜色为红色(R),可使第一发光器件、第二发光器件及第三发光器件同时发光,进而可以将显示分辨率提高三倍。如图8为本公开一种实施方式中显示面板的色域图,图中,横坐标和纵坐标均为色度,经测试,该实施方式中的显示面板的色域为96.8%。
在本公开的一种示例性实施方式中,发光器件41可包括第一电极层411、发光功能层412和第二电极层413,其中:
第一电极层411可设于驱动背板2的一侧,例如,其可设于像素驱动层背离衬底1的一侧,并可与像素驱动电路21连接,第一电极层411可作为发光器件41的阳极层,其材料可为透明导电材料,也可为遮光材料,在此不做特殊限定。举例而言,其可为ITO或AZO。
发光功能层412可设于第一电极层411背离驱动背板2的表面,可为激子提供复合场所而发光,发光功能层412可为单层膜层,也可为多层膜层,在此不做特殊限定;以多层膜层为例,其可包括空穴注入层、空穴传输层、电子阻挡层、发光层、空穴阻挡层、电子传输层和电子注入层,其中:
空穴注入层覆盖于第一电极层411背离驱动背板2的表面,有助于增强器件的电子注入能力;空穴传输层覆盖于空穴注入层背离第一电极层411的表面,可为空穴提供传输通道,提高空穴迁移率,有助于提高发光效率;电子阻挡层覆盖于空穴传输层背离第一电极层411的表面,可用于阻挡电子穿过发光层而向空穴传输层移动,避免激子在空穴传输层复合,保证发光中心始终位于发光层;发光层覆盖于电子阻挡层背离第一电极层411的表面,可通过发光层为电子和空穴提供复合场所而发光;空穴阻挡层覆盖于发光层背离第一电极层411的表面,可用于阻挡空穴穿过发光层而向电子传输层移动,避免激子在电子传输层复合,进一步保证发光中心始终位于发光层;电子传输层覆盖于空穴阻挡层背离第一电极层411的表面,可为电子提供传输通道,提高电子迁移率;电子注入层覆盖于电子传输层背离第一电极层411的表面,可为电子提供传输通道,提高电子迁移率,进一步提高发光效率。发光功能层412中的各膜层均可为透明材料,以便提高透光率,进而提高出光率。
第二电极层413可设于发光功能层412背离驱动背板2的表面,其可为金属氧化物电极、金属电极、金属合金电极或金属与金属氧化物组合形成的复合电极,在此不做特殊限定。第二电极层413可作为发光器件41的阴极层,可向第一电极层411和第二电极层413施加电压,从而使发光功能层412发光。
在本公开的一种实施方式中,第二电极层413的材料可为具有较高光透过率的IZO,可通过溅射工艺在发光功能层412背离第一电极层411的表面形成第二电极层413;在本公开的另一种实施方式中,如图9所示,第二电极层413包括层叠分布的第一电极修饰层413a、电极层413b及第二电极修饰层413c,第一电极修饰层413a位于发光功能层412背离驱动背板2的表面,第二电极修饰层413c位于第一电极修饰层413a背离驱动背板2的一侧,电极层413b位于第一电极修饰层413a和第二电极修饰层413c之间,电极层413b的导电率大于第一电极修饰层413a及第二电极修饰层413c的导电率,第一电极修饰层413a、电极层413b及第二电极修饰层413c可构成DMD结构,可提高光 透过率。举例而言,第一电极修饰层413a、电极层413b及第二电极修饰层413c均可为透光材料,例如,第一电极修饰层413a的材料可为氧化钼,电极层413b的材料可为铝银合金,第二电极修饰层的材料可为氧化钼,当然,也可以是其他透光材料,在此不再一一列举。
同一发光单元中,在垂直于驱动背板2的方向上相邻两个发光器件41中,靠近驱动背板2的发光器件的第二电极层413与背离驱动背板2的发光器件41的第一电极层411可为同一电极层,由此可减少发光单元中的电极数量,减少由于电极透过率的原因造成的器件效率降低。
在本公开的一种示例性实施例中,距离驱动背板2最近的发光器件41以外的发光器件41可均为透明发光器件,距离驱动背板2最近的发光器件41靠近驱动背板2的一侧可具有遮光设计,进而保证所有发光器件41发出的光线均可向背向驱动背板2的方向出射,避免光线照射至驱动背板2,保证驱动背板2中的像素驱动电路21的稳定性。需要说明的是,距离驱动背板2最近的发光器件41也可为透明器件,在此不做特殊限定。
为了在发光功能层412中限定出各个发光单元的范围,本公开的显示面板还包括像素定义层5,如图10-图12所示,其可设于驱动背板2的一侧面,例如,其可位于像素驱动层背离衬底1的一侧,且第一发光器件的第一电极层411可与像素定义层5设于驱动背板2的同一侧面。
下面通过多种实施方式对像素定义层5的结构及具体细节进行详细说明:
在本公开的第一种实施方式中,如图10所示,像素定义层5可设有多个开口51,每个开口51可露出一个第一发光器件的第一电极层411。如图11所示,第一发光器件的发光功能层412可形成于第一发光器件的第一电极层411背离驱动背板2的表面,并可至少部分位于开口51内;如图12所示,第一发光器件的第二电极层413可设于像素定义层5背离驱动背板2的表面,并通过贯穿像素定义层5的过孔52与像素驱动电路21连接,以便通过像素驱动电路21向第一发光器件的第二电极层413通电。第一发光器件的第二电极层413在开口51内的正投影与第一发光器件的发光功能层412在开口51内的正投影至少部分交叠,并与第一发光器件的发光功能层412接触,在开口51范围内的第一发光器件的发光功能层412和第一发光器件的第二电极层413与被开口51露出的第一发光器件的第一电极层411可共同构成第一发光器件。
第二发光器件可与第一发光器件共用一个电极,例如,第二发光器件的第一电极层可为第一发光器件的第二电极层413,如图13所示,第二发光器件的发光功能层42覆盖于第一发光器件的第二电极层413背离驱动背板2的表面,且其在驱动背板2上的正投影覆盖第一发光器件的第二电极层413在所述驱动背板2上的正投影,例如,其可至少覆盖于开口51区域,且其两端可由开口51区域向外延伸,并分别包覆于第一发光器件的第二电极层413的两个端部,以防止后续形成的第二发光器件的第二电极层43与第一发光器件的第二电极层413接触短路。如图14所示,第二发光器件的第二电极层43可覆盖第二发光器件的发光功能层42及像素定义层5的表面,且其在开口51内的正投影与第一发光器件的发光功能层412在开口51内的正投影至少部分交叠,例如,其至少延伸至开口51区域内,并能通过贯穿像素定义层5的过孔52与像素驱动电路21连接,第一发光器件的第二电极层413、第二发光器件的发光功能层42、第二发光器件的第二电极层43可共同构成第二发光器件。
第三发光器件可与第二发光器件共用一个电极,例如,第三发光器件的第一电极层为第二发光器件的第二电极层43,如图15所示,第三发光器件的发光功能层44覆盖于第二发光器件的第二电极层43背离驱动背板2的表面,且其在驱动背板2上的正投影覆盖第二发光器件的第二电极层43在驱动背板2上的正投影,例如,其可至少覆盖 于开口51区域,其两端可分别包覆于第二发光器件的第二电极层43的两个端部,以防止后续形成的第三发光器件的第二电极层45与第二发光器件的第二电极层43接触短路。
如图16所示,第三发光器件的第二电极层45可覆盖第三发光器件的发光功能层44的表面,其可至少延伸至开口51区域内,也可铺满第三发光器件的发光功能层44的表面,在此不做特殊限定。第三发光器件的第二电极层45可通过发光单元外围的电路与外接电源连接,以便通电。第二发光器件的第二电极层43、第三发光器件的发光功能层44及第三发光器件的第二电极层45可共同构成第三发光器件。
在一实施方式中,第三发光器件的发光功能层44可包括依次层叠的空穴传输层、发光材料层441及电子传输层,其中,空穴传输层可位于第二发光器件的第二电极层43背离驱动背板2的一侧,且其在驱动背板2上的正投影覆盖第二发光器件的第二电极层43在驱动背板2上的正投影,例如,空穴传输层可至少覆盖于开口51区域,其两端可由开口51区域向外延伸,并分别包覆于第二发光器件的第二电极层43的两个端部,举例而言,其可铺满第二发光器件的第二电极层43的整个表面,同时覆盖未被第二发光器件的第二电极层43覆盖的第二发光器件的发光功能层42及像素定义层5的表面。发光材料层441位于空穴传输层背离驱动背板2的一侧,且其在开口51内的正投影与第二发光器件的第二电极层43在开口51内的正投影至少部分交叠,例如,发光材料层441可至少设于开口51区域内,以便在开口51区域内发光。电子传输层可覆盖发光材料层441及空穴传输层共同构成的结构的表面,举例而言,其可至少完全覆盖位于开口51内的发光材料层441,当然,也可完全覆盖第三发光器件的发光材料层441及空穴传输层共同的结构。第三发光器件的第二电极层45可位于电子传输层背离驱动背板2的一侧,且其在开口51内的正投影与发光材料层441在开口51内的正投影至少部分交叠,以保证位于开口51内的发光材料层441正常发光。
需要说明的是,第三发光器件的发光功能层44还可包括空穴注入层和电子注入层,空穴注入层可位于第二发光器件的第二电极层43和空穴传输层之间,可用于提高第三发光器件的空穴注入能力,从而提高空穴迁移率;电子注入层可位于第三发光器件的第二电极层45和电子传输层之间,可用于提高第三发光器件的电子注入能力,从而提高电子迁移率。
在一实施方式中,各发光单元的第三发光器件可共用空穴传输层及电子传输层,可通过一次工艺同时形成各发光单元的第三发光器件的空穴传输层,也可通过一次工艺同时形成各发光单元的第三发光器件的电子传输层。此外,当第三发光器件均包括电子注入层和空穴注入层时,各发光单元的第三发光器件可共用电子注入层和空穴注入层,可通过一次工艺同时形成各发光单元的第三发光器件的电子注入层,也可通过一次工艺同时形成各发光单元的第三发光器件的空穴注入层,从而简化工艺,降低制造成本。
在本公开的第二种实施方式中,如图17-图22所示,像素定义层5可包括第一像素定义510层和第二像素定义层520,其中:
如图17所示,第一像素定义层510可与第一发光器件的第一电极层411设于驱动背板2的同一侧面,例如,其可设于平坦化层3背离衬底1的表面。第一像素定义层510可设有多个露出各第一发光器件的第一电极层411的第一开口,第一开口的侧壁可由靠近驱动背板2的一侧向远离驱动背板2的一侧收缩。
第二像素定义层520可与第一像素定义层510设于驱动背板2的同一侧面,即:第二像素定义层520也可设于平坦化层3背离衬底1的表面。第二像素定义层520可位于第一开口内,并与第一开口的侧壁具有第一间隙501,第二引线2142可至少部分暴露于第一间隙501中,且第一开口背离驱动背板2的一侧在驱动背板2上的正投影与第二 引线2142无交叠。
第二像素定义层520可设有第二开口,第二开口的侧壁可由靠近驱动背板2的一侧向远离驱动背板2的一侧收缩;与此同时,第二像素定义层520靠近第一间隙501的侧壁也可由靠近驱动背板2的一侧向远离驱动背板2的一侧收缩,举例而言,第二像素定义层520可为形成于第一像素定义层510的第一开口内的环形结构,该环形结构在垂直于驱动背板2的方向上的截面可为倒梯形、T型或工字型。
在垂直于驱动背板2的方向上,第二像素定义层520的高度可低于第一像素定义层510的高度,以便在形成后续膜层时,各膜层可在第一像素定义层510或第二像素定义层520的开口处自行断裂,避免使用精细掩膜版,进而降低生产成本。
第一像素定义层510和第二像素定义层520的具体高度可根据各发光单元中各膜层的厚度进行设置,以便通过第一像素定义层510和第二像素定义层520使各膜层在相应位置断裂,避免使用精细掩膜版,可降低对掩膜版的对位精度要求,简化工艺,降低制造成本。
举例而言,第一像素定义层510的高度范围可为1um~2um,第二像素定义层520的高度范围可为0.2um~1um。优选的,第一像素定义层510的高度可为0.7um,第二像素定义层520的高度可为1.4um。
需要说明的是,第一发光器件的第一电极层411可位于第二开口内,并可与第二开口的侧壁具有第二间隙502,第一引线2141可至少部分暴露于第二间隙502中。
如图18所示,第一发光器件的发光功能层412可形成于第一发光器件的第一电极层411背离驱动背板2的表面,并可至少部分设于第二开口内。第一发光器件的发光功能层412在第二开口内可连续分布,并可包覆于第一发光器件的第一电极层411的端部,以避免后续形成的第一发光器件的第二电极层413与其接触而短路。且在制造过程中,其可在第二开口的边界处可自动断开,避免使用精细掩膜版,降低制造成本。
如图19所示,第一发光器件的第二电极层413可设于第一发光器件的发光功能层412背离驱动背板2的一侧,且可至少部分设于第二开口内,并能至少部分覆盖第一引线2141,进而可通过第一引线2141将第一发光器件的第二电极层413与像素驱动电路21连接,以便通过像素驱动电路21向第一发光器件的第二电极层413通电。在制造过程中,第一发光器件的第二电极层413可在第二开口的边界处自动断开,避免使用精细掩膜版,进一步降低制造成本。
第一发光器件的第二电极层413在第二开口内的正投影与第一发光器件的发光功能层412在第二开口5内的正投影至少部分交叠,在第二开口范围内的第一发光器件的发光功能层412和第一发光器件的第二电极层413与被第二开口露出的第一发光器件的第一电极层411可共同构成第一发光器件。
第二发光器件可与第一发光器件共用一个电极,例如,第二发光器件的第一电极层可为第一发光器件的第二电极层413。如图20所示,第二发光器件的发光功能层42覆盖于第一发光器件的第二电极层413背离驱动背板2的表面,第二发光器件的发光功能层42在第二开口内可连续分布,并可填满第二间隙,在制造过程中,其可在第一开口的边界处断开,在此过程中,由于第一开口背离驱动背板2的一侧在驱动背板2上的正投影与第二引线2142无交叠,进而形成的第二发光器件的发光功能层42在第一开口的边界断开后不会覆盖第二引线2142,进而可露出第二引线2142。
如图21所示,第二发光器件的第二电极层43可至少部分覆盖第二发光器件的发光功能层42背离驱动背板2的表面,且其可至少部分覆盖第二引线2142,进而可通过第二引线2142将第二发光器件的第二电极层43与像素驱动电路21连接,以便通过像素驱动电路21向第二发光器件的第二电极层43通电。在制造过程中,第二发光器件的第二电极层43可在第一开口的边界处自动断开,避免使用精细掩膜版,即可降低对掩膜 版的对位精度要求,又可降低制造成本。
第二发光器件的发光功能层42和第二发光器件的第二电极层43与第二发光器件的第一电极层可共同构成第二发光器件。第二发光器件的第二电极层43在驱动背板2上的正投影与第一发光器件的发光功能层412在驱动背板2上的正投影至少部分交叠,以便使第一发光器件发出的光线与第二发光器件发出的光线叠加,可提高显示面板利用率及显示分辨率。
第三发光器件可与第二发光器件可共用一电极,例如,第三发光器件的第一电极层为第二发光器件的第二电极层43。如图22所示,第三发光器件的发光功能层44位于第三发光器件的第一电极层43背离驱动背板2的一侧,且其在驱动背板2上的正投影可覆盖第三发光器件的第一电极层43在驱动背板2上的正投影;例如,其可至少覆盖于第一开口区域,并可填满第一间隙501,进而包覆于第三发光器件的发光功能层44的端部,以防止后续形成的第三发光器件的第二电极层45与第二发光器件的第二电极层43接触短路。
第三发光器件的第二电极层45可覆盖第三发光器件的发光功能层44背离驱动背板2的表面,且其在驱动背板2上的正投影可覆盖第三发光器件的发光功能层44在驱动背板2上的正投影。第三发光器件的第二电极层45可通过发光单元外围的电路与外接电源连接,以便通电。第二发光器件的第二电极层43、第三发光器件的发光功能层44及第三发光器件的第二电极层45可共同构成第三发光器件。
在本公开的第三种实施方式中,如图23-图27所示,像素定义层5可包括第一像素定义510层和第二像素定义层520,其中:
如图23所示,第一像素定义层510可与第一发光器件的第一电极层411设于驱动背板2的同一侧面,例如,其可设于平坦化层3背离衬底1的表面。第一像素定义层510可设有多个露出各第一发光器件的第一电极层411并至少部分露出第一引线2141的第一开口,第一开口的侧壁可由靠近驱动背板2的一侧向远离驱动背板2的一侧收缩。需要说明的是,第二引线2142能穿过第一像素定义层510,并暴露于第一像素定义层510背离驱动背板2的表面,以便与其他电极层或连接走线连接。
第二像素定义层520可设于第一像素定义层510背离驱动背板2的表面,且具有多个露出各第一开口的第二开口,第二开口的侧壁由靠近驱动背板2的一侧向远离驱动背板2的一侧收缩;在一实施方式中,第二开口的底部可至少部分露出第二引线2142,且其顶部在第一像素定义层510上的正投影与第二引线2142无交叠。
如图24所示,第一发光器件的发光功能层412可形成于第一发光器件的第一电极层411背离驱动背板2的表面,并可至少部分设于第一开口内。第一发光器件的发光功能层412在第一开口内可包覆于第一发光器件的第一电极层411的端部,以避免后续形成的第一发光器件的第二电极层413与其接触而短路。且在制造过程中,其可在第一开口或第二开口的边界处可自动断开,避免使用精细掩膜版,降低制造成本。
如图25所示,第一发光器件的第二电极层413可设于第一发光器件的发光功能层412背离驱动背板2的表面,且可至少部分设于第一开口内,并能至少部分覆盖第一引线2141,进而可通过第一引线2141将第一发光器件的第二电极层413与像素驱动电路21连接,以便通过像素驱动电路21向第一发光器件的第二电极层413通电。在制造过程中,第一发光器件的第二电极层413可在第二开口的边界处自动断开,避免使用精细掩膜版,进一步降低制造成本。
第一发光器件的第二电极层413在第一开口内的正投影与第一发光器件的发光功能层412在第一开口内的正投影至少部分交叠,在第一开口范围内的第一发光器件的发光功能层412和第一发光器件的第二电极层413与被第一开口露出的第一发光器件的第一电极层411可共同构成第一发光器件。
第二发光器件可与第一发光器件共用一个电极,例如,第二发光器件的第一电极层可为第一发光器件的第二电极层413。如图26所示,第二发光器件的发光功能层42覆盖于第一发光器件的第二电极层413背离驱动背板2的表面,第二发光器件的发光功能层42在第二开口内可连续分布,并可填满第二发光器件的第一电极层与第一开口的侧壁之间的间隙,在制造过程中,其可在第二开口的边界处断开,在此过程中,由于第二开口的顶部在第一像素定义层510上的正投影与第二引线2142无交叠,进而形成的第二发光器件的发光功能层42在第二开口的边界断开后不会覆盖第二引线2142,进而露出第二引线2142。
如图27所示,第二发光器件的第二电极层43可至少部分覆盖第二发光器件的发光功能层42背离驱动背板2的表面,且其可至少部分覆盖第二引线2142,进而可通过第二引线2142将第二发光器件的第二电极层43与像素驱动电路21连接,以便通过像素驱动电路21向第二发光器件的第二电极层43通电。在制造过程中,第二发光器件的第二电极层43可在第二开口521的边界处自动断开,避免使用精细掩膜版,既可降低对掩膜版的对位精度要求,又可降低制造成本。第二发光器件的发光功能层42和第二发光器件的第二电极层43与第二发光器件的第一电极层可共同构成第二发光器件。第二发光器件的第二电极层43在驱动背板2上的正投影与第一发光器件的发光功能层412在驱动背板2上的正投影至少部分交叠,以便使第一发光器件发出的光线与第二发光器件发出的光线叠加,可提高显示面板利用率及显示分辨率。
第三发光器件可与第二发光器件可共用一电极,例如,第三发光器件的第一电极层为第二发光器件的第二电极层43,第三发光器件的发光功能层44位于第三发光器件的第一电极层43背离驱动背板2的一侧,且其在驱动背板2上的正投影可覆盖第三发光器件的第一电极层43在驱动背板2上的正投影;例如,其可至少覆盖于第二开口区域,并可填满第三发光器件的第一电极层43与第二开口的侧壁之间的间隙,进而防止后续形成的第三发光器件的第二电极层45与第二发光器件的第二电极层43接触短路。
第三发光器件的第二电极层45可覆盖第三发光器件的发光功能层44背离驱动背板2的表面,且其在驱动背板2上的正投影可覆盖第三发光器件的发光功能层44在驱动背板2上的正投影。第三发光器件的第二电极层45可通过发光单元外围的电路与外接电源连接,以便通电。第二发光器件的第二电极层43、第三发光器件的发光功能层44及第三发光器件的第二电极层45可共同构成第三发光器件。
下面对本公开实施方式中发光单元的形成工艺做详细说明:
可通过光刻工艺在驱动背板2上形成多个分别与不同的像素驱动电路21连通的过孔,各过孔可间隔设置。举例而言,当一个发光单元包括3个发光器件时,在一个发光单元对应的区域可至少形成3个过孔。可通过化学气相沉积、物理气相沉积、真空蒸镀、磁控溅射或原子层沉积等工艺在驱动背板2的表面形成多个呈阵列分布的第一发光器件的第一电极层411,各第一电极层411均可通过过孔与像素驱动电路21连接,如图28所示;随后可采用化学气相沉积、物理气相沉积或原子层沉积等工艺在驱动背板2及各第一发光器件的第一电极层411的表面形成像素定义层5。
下面对本公开不同实施方式中发光单元的形成过程的具体细节进行详细说明:
在本公开的第一种实施方式中,可采用光刻工艺在像素定义层5上进行光刻形成露出各第一发光器件的第一电极层411的开口51,如图10所示;可采用具有第一掩膜图案的掩膜版进行掩膜,第一掩膜图案可与像素定义层5的各开口51的图案相同,进而可在各开口51内分别形成第一发光器件的发光功能层412,如图11所示。
可对像素定义层5及平坦化层3进行光刻形成贯穿像素定义层5及平坦化层3的过孔52,该过孔52可与一像素驱动电路21连接,可采用具有第二掩膜图案的掩膜版进行掩膜,第二掩膜图案的开口可大于第一掩膜图案的开口,进而可根据第二掩膜图案形 成覆盖第一发光器件的发光功能层412及部分像素定义层5的第一发光器件的第二电极层413,在此过程中,第一发光器件的第二电极层413可通过贯穿像素定义层5及平坦化层3的过孔52与一像素驱动电路21连通,如图12所示。
可采用具有第三掩膜图案的掩膜版进行掩膜,第三掩膜图案的开口可大于第二掩膜图案的开口,进而可根据第三掩膜图案形成第二发光器件的发光功能层42,如图13所示。
可采用具有第四掩膜图案的掩膜版进行掩膜,第四掩膜图案的开口可大于第三掩膜图案的开口,进而可根据第四掩膜图案形成第二发光器件的第二电极层43,在此过程中,第二发光器件的第二电极层43可通过贯穿像素定义层5及平坦化层3的过孔52与一像素驱动电路21连通,如图14所示。
为了降低制造成本,可采用开放式掩膜版进行掩膜,进而在第二发光器件的第二电极层43的表面依次形成第三发光器件的发光功能层44及第三发光器件的第二电极层45,如图16所示。在此过程中,可采用具有第五掩膜图案的掩膜版形成第三发光器件的发光材料层441,采用开放式掩膜版形成第三发光器件的发光功能层44的其他膜层及第三发光器件的第二电极层45。
需要说明的是,各发光器件的第一电极层411分别与驱动背板2中的不同像素驱动电路21连接,以便通过不同的像素驱动电路21分别控制与之对应的发光器件41发光。
在本公开的第二种实施方式中,如图17所示,在形成第一发光器件的第一电极层411的同时,可在与第一发光器件的第一电极层411间隔分布的不同过孔中分别形成第一引线2141和第二引线2142,进而可通过第一引线2141和第二引线2142将驱动背板2内的像素驱动电路21电学引出。
在本实施方式中,像素定义层5可包括第一像素定义层510和第二像素定义层520。在形成像素定义层5时,可先形成第一像素定义层510,例如,可通过化学气相沉积、物理气相沉积或原子层沉积等工艺在驱动背板2及各第一发光器件的第一电极层411的表面形成第一像素定义层510,进而可通过光刻工艺在第一像素定义层510内形成第一开口,第一开口可露出第一发光器件的第一电极层411、第一引线2141及第二引线2142。在此过程中,可通过控制光刻速率使得第一开口的侧壁向驱动背板2收缩。随后,可在第一开口内形成第二像素定义层520,第二像素定义层520的厚度小于第一像素定义层510的厚度,举例而言,可通过化学气相沉积工艺、物理气相沉积或原子层沉积等工艺在第一开口内形成第二像素定义层520,进而可通过光刻工艺在第二像素定义层520内形成第二开口,第二开口可露出第一发光器件的第一电极层411,同时,还可至少部分露出第一引线2141。在此过程中,可通过控制光刻速率使得第二开口的侧壁向驱动背板2收缩。
为了降低制造成本,可采用开放式掩膜版进行掩膜,进而在第一发光器件的第一电极层411的表面依次形成第一发光器件的发光功能层412、第一发光器件的第二电极层413、第二发光器件的发光功能层42、第二发光器件的第二电极层43、第三发光器件的发光功能层44及第三发光器件的第二电极层45。在此过程中,通过不同厚度的像素定义层及第一开口和第二开口的设置使得不同的膜层在相应的位置断开,避免使用精细掩膜版,既可降低对掩膜版的对位精度要求,又可降低制造成本。
在本公开的第三种实施方式中,第一引线2141和第二引线2142的形成方法与本公开第二种实施方式中的第一引线2141和第二引线2142的形成方法类似,因此,此处不在赘述。需要说明的是,第二引线2142可凸出于驱动背板2的表面。
在本实施方式中,如图23所示,像素定义层5可包括第一像素定义层510和第二像素定义层520。在形成像素定义层5时,可先形成第一像素定义层510,例如,可通过化学气相沉积、物理气相沉积或原子层沉积等工艺在驱动背板2、第二引线2142及 各第一发光器件的第一电极层411的表面形成第一像素定义层510,进而可通过光刻工艺在第一像素定义层510内形成第一开口,第一开口可露出第一发光器件的第一电极层411、第一引线2141及第二引线2142,同时,第一像素定义层511背离驱动背板2的表面还可露出第二引线2142。在此过程中,可通过控制光刻速率使得第一开口的侧壁向驱动背板2收缩。随后,可在第一像素定义层510背离驱动背板2的一侧形成第二像素定义层520,进而可通过光刻工艺在第二像素定义层520内形成第二开口,第二开口可露出第一开口,同时,还可至少部分露出位于第一像素定义层511表面的第二引线2142。在此过程中,可通过控制光刻速率使得第二开口的侧壁向驱动背板2收缩。
为了降低制造成本,可采用开放式掩膜版进行掩膜,进而在第一发光器件的第一电极层411的表面依次形成第一发光器件的发光功能层412、第一发光器件的第二电极层413、第二发光器件的发光功能层42、第二发光器件的第二电极层43、第三发光器件的发光功能层44及第三发光器件的第二电极层45。在此过程中,通过不同厚度的像素定义层及第一开口511和第二开口522的设置使得不同的膜层在相应的位置断开,避免使用精细掩膜版,既可降低对掩膜版的对位精度要求,又可降低制造成本。
在本公开的一种示例性实施方式中,显示面板还可包括第二遮光层6,如图2所示,该第二遮光层6可设于发光器件层4背离驱动背板2的一侧,且具有多个呈阵列分布的透光孔61,各透光孔61均可为通孔,其形状可为矩形、圆形、椭圆形或其他形状,在此不再一一例举。透光孔61可与像素定义层5中的各开口一一对应设置,且各透光孔61与像素定义层5中的各开口至少部分交叠,其交叠区域可为各发光单元中的所有膜层均重叠的区域,发光单元中出射的光线可从透光孔61中射出,进而可通过透光孔61定义出各发光单元的发光面积。
在一实施方式中,第二遮光层6的材料可为金属或有机材料,在此不做特殊限定。可采用真空蒸镀、磁控溅射、化学气相沉积或物理气相沉积等方式在发光器件层4背离驱动背板2的一侧形成遮光膜层,采用光刻工艺在遮光膜层内形成透光孔61,进而形成第二遮光层6。举例而言,可在发光器件层4背离驱动背板2的一侧沉积遮光膜层,在遮光膜层背离驱动背板2的一侧形成光刻胶,采用掩膜版对光刻胶进行曝光并显影,以形成显影区,显影区的图案可与第二遮光层6所需的图案相同,其尺寸可与透光孔61的尺寸相等,可在显影区对遮光膜层进行非等向蚀刻,以形成第二遮光层6,最后可剥离第二遮光层6表面剩余的光刻胶,以将光刻形成的第二遮光层6暴露出来。
在本公开的一种示例性实施方式中,显示面板还可包括封装层7,如图29所示,封装层7可位于所述发光器件层4背离所述驱动背板2的一侧,可用于阻隔外界水、氧,避免发光器件层4被外界水氧侵蚀,可延长器件使用寿命。举例而言,封装层7可位于发光器件层4与第二遮光层6之间,也可位于第二遮光层6背离发光器件层4的一侧,在此不做特殊限定。
封装层7可由有机材料构成,也可由无机材料构成,还可以是有机层、无机层交替的复合膜层,举例而言,封装层7的材料可为亚克力材料,也可以是氮化硅、氧化硅或氮氧化硅等材料构成的复合膜层,在此不做特殊限定。
在一实施方式中,封装层7可以是有机层和无机层交替的复合膜层结构,例如,其可包括第一无机层、有机层和第二无机层,第一无机层可形成于发光器件层4的表面,第二无机层形成于第一无机层背离发光器件层4的一侧,有机层位于第一无机层和第二无机层之间,可通过无机层阻挡水、氧,通过有机层释放无机层的应力,防止发光器件层4和第一无机层间因应力产生的拉扯而剥离。
本公开实施方式还提供一种显示面板的制造方法,该显示面板可以是上述任意实施方式的显示面板,其结构在此不再详述,如图30所示,该制造方法可包括步骤S110-步骤S120,其中:
步骤S110,形成驱动背板,所述驱动背板包括多个像素驱动电路;
步骤S120,在所述驱动背板的一侧形成发光器件层,所述发光器件层包括多个呈阵列分布的发光单元,所述发光单元包括向背离所述驱动背板的方向层叠设置的多个发光器件;在垂直于所述驱动背板的方向上,距离所述驱动背板最近的所述发光器件以外的发光器件为透明器件;同一发光单元中,至少部分所述发光器件与所述像素驱动电路连接,用于在所述像素驱动电路的驱动下发光,同一发光单元中至少有两个所述发光器件的发光材料不同。
本公开实施方式的制造方法的具体细节和有益效果已在上文显示面板的实施方式中进行了说明,因此,此处不再赘述。
需要说明的是,尽管在附图中以特定顺序描述了本公开中显示面板的制造方法的各个步骤,但是,这并非要求或者暗示必须按照该特定顺序来执行这些步骤,或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的,可以省略某些步骤,将多个步骤合并为一个步骤执行,以及/或者将一个步骤分解为多个步骤执行等。
本公开实施方式还提供一种显示装置,该显示装置可包括上述任意实施方式的显示面板,其结构和有益效果可参考上述显示面板的实施方式,在此不再详述。本公开实施方式的显示装置可以是手机、显示屏、平板电脑、电视、微显示设备等用于显示图像的装置,在此不再列举。
本公开还提供一种像素驱动电路,用于上述任一实施方式中的显示面板,该显示面板可以是AMOLED显示面板,该显示面板可包括驱动背板以及阵列分布于驱动背板一侧的多个发光单元,每个发光单元均可包括串联于第一电源端VDD和第二电源端VSS之间的多个发光器件发光。显示面板可划分为显示区和位于显示区外的外围区。
驱动背板可包括衬底和设于衬底上的驱动电路,该驱动电路可包括位于显示区内的像素驱动电路和位于外围区的外围电路,外围电路与像素驱动电路连接,且包括发光控制电路、栅极驱动电路和源极驱动电路等。其中,发光控制电路可用于向像素驱动电路输出发光控制信号,栅极驱动电路可用于向像素驱动电路输出写入控制信号,源极驱动电路可用于向像素驱动电路输出数据信号,此外,驱动电路还可用于向像素驱动电路的第一电源端VDD输出第一电源信号,并向第二电源端VSS输出第二电源信号。
各发光器件均可为OLED发光元件,即有机发光二极管,其可具有第一端和第二端,第一端可为阳极,第二端可为阴极。发光器件的第一端可与像素驱动电路连接,第二端用于输入第二电源信号。
通过控制外围电路向像素驱动电路和发光器件输入发光控制信号、写入控制信号、数据信号、第一电源信号和第二电源信号,可使发光器件发光,以显示图像。
如图31所示,在本公开的第一种实施方式中,像素驱动电路包括多个驱动单元,每个所述驱动单元均包括驱动晶体管、数据写入单元301及储能单元C,其中:
驱动晶体管具有控制端、第一端和第二端,驱动晶体管的第二端用于与发光器件的第一端连接;
数据写入单元301用于响应写入控制信号而导通,以将数据信号传输至驱动晶体管的第一端;
储能单元C的第一端与第一电源端VDD连接,储能单元C的第二端与驱动晶体管的控制端连接;
每个发光单元的第一端与一驱动单元的驱动晶体管的第二端连接。
需要说明的是,驱动单元可为3个,分别为第一驱动单元310、第二驱动单元320和第三驱动单元330,第一驱动单元310的晶体管为第一驱动晶体管DT1,第二驱动单元320的晶体管为第二驱动晶体管DT2,第三驱动单元330的晶体管为第三驱动晶体管 DT3。
发光器件也可为3个,分别为第一发光器件、第二发光器件和第三发光器件。在本公开实施方式中,第一发光器件发出的光线可为红色(R),第二发光器件发出的光线可为绿色(G),第三发光器件发出的光线可为蓝色(B)。
第一驱动晶体管DT1的第二端与第一发光器件(R)连接;
第二驱动晶体管DT2的第二端连接于第一发光器件(R)与第二发光器件(G)之间;
第三驱动晶体管DT3的第二端连接于第二发光器件(G)与第三发光器件(B)之间,第三发光器件(B)的第二端与第二电源端VSS连接,用于输入第二电源信号。
如图31和图32所示,本公开第一种实施方式的像素驱动电路的工作过程如下:
在数据写入阶段,导通各驱动单元的数据写入单元301,以将数据信号经过数据写入单元301和驱动晶体管传输至驱动晶体管的控制端,并向储能单元C充电,以使多个发光器件同时发光;
在发光阶段,通过各驱动单元的储能单元C分别向第一驱动晶体管DT1、第二驱动晶体管DT2及第三驱动晶体管DT3输入第一电源信号,以将第一驱动晶体管DT1、第二驱动晶体管DT2及第三驱动晶体管DT3分别导通,以使第一驱动晶体管DT1的第二端的信号向第一发光器件(R)的第一端传输,第二驱动晶体管DT2的第二端的信号向第二发光器件(G)的第一端传输,第三驱动晶体管DT3的第二端的信号向第三发光器件(B)的第一端传输,进而可驱动第一发光器件(R)、第二发光器件(G)及第三发光器件(B)同时发光。
在上述过程中,如图32所示,T1~T5为连续的阶段,在T1阶段,数据信号Gate、第一驱动晶体管输入的第一电源信号Data1、第二驱动晶体管输入的第一电源信号Data2及第三驱动晶体管输入的第一电源信号Data3均为高电平;在T2阶段,数据信号Gate、第一驱动晶体管输入的第一电源信号Data1、第二驱动晶体管输入的第一电源信号Data2及第三驱动晶体管输入的第一电源信号Data3均为低电平;在T3阶段,数据信号Gate、第一驱动晶体管输入的第一电源信号Data1、第二驱动晶体管输入的第一电源信号Data2及第三驱动晶体管输入的第一电源信号Data3均为高电平;在T4阶段,数据信号Gate、第一驱动晶体管输入的第一电源信号Data1、第二驱动晶体管输入的第一电源信号Data2及第三驱动晶体管输入的第一电源信号Data3均为低电平;在T5阶段,数据信号Gate、第一驱动晶体管输入的第一电源信号Data1、第二驱动晶体管输入的第一电源信号Data2及第三驱动晶体管输入的第一电源信号Data3均为高电平。其中,通过第三发光器件(B)的电压为Data3,通过第二发光器件(G)的电压为Data2-Data3,通过第一发光器件(R)的电压为Data1-Data2,Data1大于Data2大于Data3,可根据各发光器件所需的发光强度控制Data1、Data2及Data3的具体数值。因此,在T1阶段、T3阶段及T5阶段,RGB可同时发光。
当RGB三个发光器件同时发光时,可通过调节各发光器件两端的电压值,进而调出任意颜色的光谱,调出的光谱如图33所示,图中,横坐标为波长,纵坐标为光强。
如图34所示,在本公开的第二种实施方式中,像素驱动电路用于驱动串联于第一电源端VDD和第二电源端VSS之间的多个发光器件发光,多个发光器件可包括第一发光器件(R)、第二发光器件(G)和第三发光器件(B),该像素驱动电路包括驱动晶体管DT、数据写入单元301、储能单元C、第一开关单元ST1、第二开关单元ST2、第三开关单元ST3及第四开关单元ST4,其中:
驱动晶体管DT,具有控制端、第一端和第二端,驱动晶体管DT的第二端用于与第一发光器件(R)的第一端连接;
数据写入单元301,用于响应写入控制信号而导通,以将数据信号传输至驱动晶体 管DT的第一端;
储能单元C,储能单元C的第一端与第一电源端VDD连接,储能单元C的第二端与驱动晶体管DT的控制端连接;
第一开关单元ST1,用于响应发光控制信号而导通,第一开关单元ST1的第一端连接于驱动晶体管DT与第一发光器件(R)之间,第一开关单元ST1的第二端连接于第一发光器件(R)与第二发光器件(G)之间;
第二开关单元ST2,用于响应发光控制信号而导通,第二开关单元ST2的第一端连接于驱动晶体管DT与第一发光器件(R)之间,第二开关单元ST2的第二端连接于第二发光器件(G)与第三发光器件(B)之间;
第三开关单元ST3,用于响应发光控制信号而导通,第三开关单元ST3的第一端连接于第一发光器件(R)与第二发光器件(G)之间,第三开关单元ST3的第二端与第二电源端VSS连接;
第四开关单元ST4,用于响应发光控制信号而导通,第四开关单元ST4的第一端连接于第二发光器件(G)与第三发光器件(B)之间,第四开关单元ST4的第二端与第二电源端VSS连接。
如图34和图35所示,本公开第二种实施方式的像素驱动电路的工作过程如下:
在数据写入阶段,导通数据写入单元301,以将数据信号经过数据写入单元301和驱动晶体管DT传输至驱动晶体管DT的控制端,并向储能单元C充电;
在发光阶段,通过储能单元C向驱动晶体DT管输入第一电源信号,以将驱动晶体管DT导通,以使驱动晶体管DT的第二端的信号向第一发光器件(R)的第一端传输;关断第一开关单元ST1及第二开关单元ST2,导通第三开关单元ST3及第四开关单元ST4,以使第一发光器件(R)发光;或者,导通第一开关单元ST1及第四开关单元ST4,关断第二开关单元ST2及第三开关单元ST3,以使第二发光器件(G)发光;或者,导通第一开关单元ST1及第二开关单元ST2,关断第三开关单元ST3及第四开关单元ST4,以使第三发光器件(B)发光。
在上述过程中,如图35所示,T1~T5为连续的阶段,在T1阶段,数据信号Gate和第一电源信号Data均为高电平,第一开关单元ST1和第二开关单元ST2关断,第三开关单元ST3和第四开关单元ST4导通;在T2阶段,数据信号Gate和第一电源信号Data均为低电平,第一开关单元ST1、第二开关单元ST2、第三开关单元ST3和第四开关单元ST4均关断;在T3阶段,数据信号Gate和第一电源信号Data均为高电平,第二开关单元ST2和第三开关单元ST3关断,第一开关单元ST1和第四开关单元ST4导通;在T4阶段,数据信号Gate和第一电源信号Data均为低电平,第一开关单元ST1、第二开关单元ST2、第三开关单元ST3和第四开关单元ST4均关断;在T5阶段,数据信号Gate和第一电源信号Data均为高电平,第一开关单元ST1和第二开关单元ST2导通,第三开关单元ST3和第四开关单元ST4关断。因此,在T1阶段R显示、T3阶段G显示、T5阶段B显示,进而实现RGB分时显示。
当RGB三个发光器件分时发光时,第一发光器件(R)的光谱如图36所示,第二发光器件(G)的光谱如图37所示,第三发光器件(B)的光谱如图38所示,且在图36-图38图中,横坐标均为波长,纵坐标均为光强。经过计算,当RGB分时发光时,色域大于NTSC 117%。
如图39所示,在本公开的第三种实施方式中,像素驱动电路用于驱动串联于第一电源端VDD和第二电源端VSS之间的多个发光器件发光,多个发光器件可包括第一发光器件(R)、第二发光器件(G)和第三发光器件(B),该像素驱动电路包括驱动晶体管DT、数据写入单元301、储能单元C、第一开关单元ST1、第二开关单元ST2及第三开关单元ST3,其中:
驱动晶体管DT,具有控制端、第一端和第二端,驱动晶体管DT的第二端用于与第一发光器件(R)的第一端连接;
数据写入单元301,用于响应写入控制信号而导通,以将数据信号传输至驱动晶体管DT的第一端;
储能单元C,储能单元C的第一端与第一电源端VDD连接,储能单元C的第二端与驱动晶体管DT的控制端连接;
第一开关单元ST1,用于响应发光控制信号而导通,第一开关单元ST1的第一端连接于驱动晶体管DT与第一发光器件(R)之间,第一开关单元ST1的第二端连接于第一发光器件(R)与第二发光器件(G)之间;
第二开关单元ST2,用于响应发光控制信号而导通,第二开关单元ST2的第一端连接于第一发光器件(R)与第二发光器件(G)之间,第二开关单元ST2的第二端连接于第二发光器件(G)与第三发光器件(B)之间;
第三开关单元ST3,用于响应发光控制信号而导通,第三开关单元ST3的第一端连接于第二发光器件(G)与第三发光器件(B)之间,第三开关单元ST3的第二端与第二电源端VSS连接。
如图39和图40所示,本公开第三种实施方式的像素驱动电路的工作过程如下:
在数据写入阶段,导通数据写入单元301,以将数据信号经过数据写入单元301和驱动晶体管DT传输至驱动晶体管DT的控制端,并向储能单元C充电;
在发光阶段,通过储能单元C向驱动晶体管DT输入第一电源信号,以将驱动晶体管DT导通,以使驱动晶体管DT的第二端的信号向第一发光器件(R)的第一端传输;关断第一开关单元ST1,导通第二开关单元ST2及第三开关单元ST3,以使第一发光器件(R)发光;或者,关断第二开关单元ST2,导通第一开关单元ST1及第三开关单元ST3,以使第二发光器件(G)发光;或者,关断第三开关单元ST3,导通第一开关单元ST1及第二开关单元ST2,以使第三发光器件(B)发光。
在上述过程中,如图40所示,T1~T5为连续的阶段,在T1阶段,数据信号Gate和第一电源信号Data均为高电平,第一开关单元关断,第二开关单元和第三开关单元导通;在T2阶段,数据信号Gate和第一电源信号Data均为低电平,第一开关单元、第二开关单元和第三开关单元均关断;在T3阶段,数据信号Gate和第一电源信号Data均为高电平,第一开关单元和第三开关单元导通,第二开关单元关断;在T4阶段,数据信号Gate和第一电源信号Data均为低电平,第一开关单元、第二开关单元和第三开关单元均关断;在T5阶段,数据信号Gate和第一电源信号Data均为高电平,第一开关单元和第二开关单元导通,第三开关单元关断。因此,在T1阶段R显示、T3阶段G显示、T5阶段B显示,进而实现RGB分时显示。
如图41所示,在本公开的第四种实施方式中,像素驱动电路用于驱动串联于第一电源端VDD和第二电源端VSS之间的多个发光器件发光,多个发光器件可包括第一发光器件(R)、第二发光器件(G)和第三发光器件(B),该像素驱动电路包括驱动晶体管DT、数据写入单元301、储能单元C、第一开关单元ST1、第二开关单元ST2及连接线,其中:
驱动晶体管DT,具有控制端、第一端和第二端,驱动晶体管DT的第二端用于与第一发光器件(R)的第一端连接;
数据写入单元301,用于响应写入控制信号而导通,以将数据信号传输至驱动晶体管DT的第一端;
储能单元C,储能单元C的第一端与第一电源端VDD连接,储能单元C的第二端与驱动晶体管DT的控制端连接;
第一开关单元ST1,用于响应发光控制信号而导通,第一开关单元ST1连接于驱动 晶体管DT的第二端与第一发光器件(R)之间;
第二开关单元ST2,用于响应发光控制信号而导通,第二开关单元ST2的第一端连接于驱动晶体管DT与第一发光器件(R)之间,第二开关单元ST2的第二端连接于第二发光器件(G)与第三发光器件(B)之间;
连接线,一端连接于第一发光器件(R)与第二发光器件(G)之间,另一端与第二电源端VSS连接。
如图41和图42所示,本公开第四种实施方式的像素驱动电路的工作过程如下:
在数据写入阶段,导通数据写入单元301,以将数据信号经过数据写入单元301和驱动晶体管DT传输至驱动晶体管DT的控制端,并向储能单元C充电;
在发光阶段,通过储能单元C向驱动晶体管DT输入第一电源信号,以将驱动晶体管DT导通,以使驱动晶体管DT的第二端的信号向第一发光器件(R)的第一端传输;关断第二开关单元ST2,导通第一开关单元ST1,以使第一发光器件(R)发光;或者,关断第一开关单元ST1,导通第二开关单元ST2,并在第一电源信号的电压值低于第二电源信号的电压值时,第二发光器件(G)发光;或者,关断第一开关单元ST1,导通第二开关单元ST2,并在第一电源信号的电压值高于第二电源信号的电压值时,第三发光器件(B)发光。
在上述过程中,如图42所示,第一电源信号Data为正压时控制第一发光器件(R)和第三发光器件(B)显示,第一电源信号Data为负压时控制第二发光器件(G)显示。具体而言,T1~T5为连续的阶段,在T1阶段,数据信号Gate为高电平,第一电源信号Data为正压,第一开关单元ST1导通,第二开关单元ST2关断,第一电源信号Data传输至第一发光器件(R)的第一端,第二电源信号通过连接线传输至第一发光器件(R)的第二端,进而在第一发光器件(R)的两端形成电压差,第一发光器件(R)发光;在T2阶段,数据信号Gate和第一电源信号Data均为低电平,第一开关单元ST1和第二开关单元ST2均关断;在T3阶段,数据信号Gate为高电平,第一电源信号Data为负压,第一开关单元ST1关断,第二开关单元ST2导通,第一电源信号Data传输至第二发光器件(G)的第二端,第二电源信号通过连接线传输至第二发光器件(G)的第一端,进而在第二发光器件(G)的两端形成电压差,第二发光器件(G)发光;在T4阶段,数据信号Gate和第一电源信号Data均为高电平,第一开关单元ST1关断,第二开关单元ST2导通,第一电源信号Data传输至第三发光器件(B)的第一端,第二电源信号传输至第三发光器件(B)的第二端,进而在第三发光器件(B)的两端形成电压差,第三发光器件(B)发光。因此,在T1阶段R显示、T3阶段G显示、T5阶段B显示,进而实现RGB分时显示。
本公开还提供一种像素驱动电路的驱动方法,像素驱动电路为上文任意实施方式的像素驱动电路,其结构在此不再详述。
针对于本开的第一种实施方式中的像素驱动电路,本公开的驱动方法可包括:
在数据写入阶段,导通各所述驱动单元的所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电,以使多个发光器件同时发光。
如图43所示,针对于本开的第二种实施方式中的像素驱动电路,本公开的驱动方法可包括步骤S310-步骤S320,其中:
步骤S310,在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
步骤S320,在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件 的第一端传输;关断所述第一开关单元及所述第二开关单元,导通所述第三开关单元及所述第四开关单元,以使所述第一发光器件发光;或者,导通所述第一开关单元及所述第四开关单元,关断所述第二开关单元及所述第三开关单元,以使所述第二发光器件发光;或者,导通所述第一开关单元及所述第二开关单元,关断所述第三开关单元及所述第四开关单元,以使所述第三发光器件发光。
如图44所示,针对于本开的第三种实施方式中的像素驱动电路,本公开的驱动方法可包括步骤S410-步骤S420,其中:
步骤S410,在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
步骤S420,在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断所述第一开关单元,导通所述第二开关单元及所述第三开关单元,以使所述第一发光器件发光;或者,关断所述第二开关单元,导通所述第一开关单元及所述第三开关单元,以使所述第二发光器件发光;或者,关断所述第三开关单元,导通所述第一开关单元及所述第二开关单元,以使所述第三发光器件发光。
如图45所示,针对于本开的第四种实施方式中的像素驱动电路,本公开的驱动方法可包括步骤S510-步骤S520,其中:
步骤S510,在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
步骤S520,在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断第二开关单元,导通第一开关单元,以使所述第一发光器件发光;或者,关断所述第一开关单元,导通所述第二开关单元,并在所述第一电源端的电压值低于所述第二电源端的电压值时,所述第二发光器件发光;或者,关断所述第一开关单元,导通所述第二开关单元,并在所述第一电源端的电压值高于所述第二电源端的电压值时,所述第三发光器件发光。
上述驱动方法的细节和有益效果已在上文中像素驱动电路的实施方式进行了详细说明,具体可参考像素驱动电路的结构和工作过程,在此不再赘述。
需要说明的是,尽管在附图中以特定顺序描述了本公开中驱动方法的各个步骤,但是,这并非要求或者暗示必须按照该特定顺序来执行这些步骤,或是必须执行全部所示的步骤才能实现期望的结果。附加的或备选的,可以省略某些步骤,将多个步骤合并为一个步骤执行,以及/或者将一个步骤分解为多个步骤执行等。
本领域技术人员在考虑说明书及实践这里公开的发明后,将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化,这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的,本公开的真正范围和精神由所附的权利要求指出。

Claims (21)

  1. 一种显示面板,其中,包括:
    驱动背板,包括多个像素驱动电路;
    发光器件层,包括多个呈阵列分布的发光单元,所述发光单元包括向背离所述驱动背板的方向层叠设置的多个发光器件;在垂直于所述驱动背板的方向上,距离所述驱动背板最近的所述发光器件以外的发光器件为透明器件;
    同一发光单元中,至少部分所述发光器件与所述像素驱动电路连接,用于在所述像素驱动电路的驱动下发光,同一所述发光单元中至少有两个所述发光器件的发光材料不同。
  2. 根据权利要求1所述的显示面板,其中,所述发光器件包括:
    第一电极层,形成于所述驱动背板的一侧,并与一所述像素驱动电路连接;
    发光功能层,形成于所述第一电极层背离所述驱动背板的表面;
    第二电极层,形成于所述发光功能层背离所述驱动背板的表面;
    在垂直于所述驱动背板的方向上相邻两个所述发光器件中,靠近所述驱动背板的发光器件的第二电极层与背离所述驱动背板的发光器件的第一电极层为同一电极层。
  3. 根据权利要求2所述的显示面板,其中,同一所述发光单元的发光器件的数量为三个,且包括向背离所述驱动背板的方向分布的第一发光器件、第二发光器件及第三发光器件,且所述第一发光器件、所述第二发光器件及所述第三发光器件发光材料各不相同,用于发出不同颜色的光。
  4. 根据权利要求3所述的显示面板,其中,所述第一发光器件的所述第一电极层设于所述驱动背板的一侧,所述显示面板还包括:
    像素定义层,与所述第一发光器件的第一电极层设于所述驱动背板的同一侧面,所述像素定义层设有多个露出各所述第一发光器件的第一电极层的开口;
    所述第一发光器件的发光功能层至少部分设于所述开口内;
    所述第一发光器件的第二电极层设于所述像素定义层背离所述驱动背板的表面,且其在所述开口内的正投影与所述第一发光器件的发光功能层在所述开口内的正投影至少部分交叠;所述第一发光器件的第二电极层通过贯穿所述像素定义层的过孔与所述像素驱动电路连接;
    所述第二发光器件的发光功能层覆盖于所述第一发光器件的第二电极层背离所述驱动背板的表面,且其在所述驱动背板上的正投影覆盖所述第一发光器件的第二电极层在所述驱动背板上的正投影;
    所述第二发光器件的第二电极层覆盖所述第二发光器件的发光功能层及所述像素定义层的表面,且其在所述开口内的正投影与所述第一发光器件的发光功能层在所述开口内的正投影至少部分交叠,并通过贯穿所述像素定义层的过孔与所述像素驱动电路连接;
    所述第三发光器件的发光功能层包括依次层叠的空穴传输层、发光材料层及电子传输层,所述空穴传输层位于所述第三发光器件的第一电极层背离所述驱动背板的一侧,且其在所述驱动背板上的正投影覆盖所述第二发光器件的第二电极层在所述驱动背板上的正投影;所述发光材料层位于所述空穴传输层背离所述驱动背板的一侧,且其在所述开口内的正投影与所述第二发光器件的第二电极层在所述开口内的正投影至少部分交叠;所述电子传输层覆盖所述发光材料层及所述空穴传输层共同构成的结构的表面;
    所述第三发光器件的第二电极层位于所述电子传输层背离所述驱动背板的一侧,且其在所述开口内的正投影与所述发光材料层在所述开口内的正投影至少部分交叠。
  5. 根据权利要求4所述的显示面板,其中,各所述发光单元的第三发光器件共用所述空穴传输层及所述电子传输层。
  6. 根据权利要求3所述的显示面板,其中,所述第一发光器件的发光颜色为蓝色,所述第二发光器件的发光颜色为绿色,所述第三发光器件的发光颜色为红色。
  7. 根据权利要求3所述的显示面板,其中,所述驱动背板还包括连接引线,所述连接引线包括与所述第一电极层间隔分布的第一引线和第二引线,所述第一引线和所述第二引线分别与不同的像素驱动电路连接;
    所述显示面板还包括:
    第一像素定义层,与所述第一发光器件的第一电极层设于所述驱动背板的同一侧面,所述第一像素定义层设有多个露出各所述第一发光器件的第一电极层的第一开口,所述第一开口的侧壁向所述驱动背板收缩;
    第二像素定义层,与所述第一像素定义层设于所述驱动背板的同一侧面,并位于所述第一开口内,且与所述第一开口的侧壁具有第一间隙,所述第二引线至少部分暴露于所述第一间隙中;所述第二像素定义层包括第二开口,所述第一发光器件的第一电极层位于所述第二开口内,并与所述第二开口的侧壁具有第二间隙,所述第一引线至少部分暴露于所述第二间隙中;在垂直于所述驱动背板的方向上,所述第二像素定义层的厚度低于所述第一像素定义层的厚度;
    所述第一发光器件的发光功能层至少部分设于所述第二开口内,并在所述第二开口的边界断开;
    所述第一发光器件的第二电极层至少部分设于所述第二开口内,且至少部分覆盖所述第一引线,所述第一发光器件的第二电极层在所述第二开口的边界断开;
    所述第二发光器件的发光功能层覆盖于所述第一发光器件的第二电极层背离所述驱动背板的表面,且在所述第二开口内连续,并在所述第一开口的边界断开;所述第二发光器件的发光功能层露出所述第二引线;
    所述第二发光器件的第二电极层至少部分覆盖所述第二发光器件的发光功能层的表面,且至少部分覆盖所述第二引线,所述第二发光器件的第二电极层在所述第一开口的边界断开,且其在所述驱动背板上的正投影与所述第一发光器件的发光功能层在所述驱动背板上的正投影至少部分交叠;
    所述第三发光器件的发光功能层位于所述第三发光器件的第一电极层背离所述驱动背板的一侧,且其在所述驱动背板上的正投影覆盖所述第三发光器件的第一电极层在所述驱动背板上的正投影;
    所述第三发光器件的第二电极层覆盖于所述第三发光器件的发光功能层背离所述驱动背板的表面,且其在所述驱动背板上的正投影覆盖所述第三发光器件的发光功能层在所述驱动背板上的正投影。
  8. 根据权利要求3所述的显示面板,其中,所述驱动背板还包括连接引线,所述连接引线包括与所述第一电极层间隔分布的第一引线和第二引线,所述第一引线和所述第二引线分别与不同的像素驱动电路连接;
    所述显示面板还包括:
    第一像素定义层,与所述第一发光器件的第一电极层设于所述驱动背板的同一侧面,所述第一像素定义层设有多个露出各所述第一发光器件的第一电极层并至少部分露出所述第一引线的第一开口;所述第一开口的侧壁向所述驱动背板收缩;所述第二引线能穿过所述第一像素定义层,并暴露于所述第一像素定义层的顶表面;
    第二像素定义层,设于所述第一像素定义层背离所述驱动背板的表面,且具有多个露出各所述第一开口及至少部分露出所述第二引线的第二开口,所述第二开口的侧壁向所述驱动背板收缩;
    所述第一发光器件的发光功能层至少部分设于所述第一开口内,并在所述第一开口或所述第二开口的边界断开;
    所述第一发光器件的第二电极层至少部分设于所述第一开口内,且至少部分覆盖所述第一引线,所述第一发光器件的第二电极层在所述第二开口的边界断开;
    所述第二发光器件的发光功能层覆盖于所述第一发光器件的第二电极层背离所述驱动背板的表面,且至少部分位于所述第一开口内,并在所述第二开口的边界断开;
    所述第二发光器件的第二电极层至少部分覆盖所述第二发光器件的发光功能层的表面,且至少部分覆盖所述第二引线,所述第二发光器件的第二电极层在所述第二开口的边界断开,且其在所述驱动背板上的正投影与所述第一发光器件的发光功能层在所述驱动背板上的正投影至少部分交叠;
    所述第三发光器件的发光功能层位于所述第三发光器件的第一电极层背离所述驱动背板的一侧,且其在所述驱动背板上的正投影覆盖所述第三发光器件的第一电极层在所述驱动背板上的正投影;
    所述第三发光器件的第二电极层覆盖于所述第三发光器件的发光功能层背离所述驱动背板的表面,且其在所述驱动背板上的正投影覆盖所述第三发光器件的发光功能层在所述驱动背板上的正投影。
  9. 根据权利要求4所述的显示面板,其中,所述显示面板还包括:
    遮光层,设于所述发光器件层背离所述驱动背板的一侧,且具有多个透光孔,各所述透光孔与各所述开口一一对应设置,且每个所述透光孔在所述驱动背板上的正投影和与之对应的开口中的各发光器件在所述驱动背板上的正投影至少部分交叠。
  10. 根据权利要求1-9任一项所述的显示面板,其中,所述显示面板还包括:
    封装层,位于所述发光器件层背离所述驱动背板的一侧。
  11. 一种显示装置,其中,包括权利要求1-10任一项所述的显示面板。
  12. 一种显示面板的制造方法,其中,包括:
    形成驱动背板,所述驱动背板包括多个像素驱动电路;
    在所述驱动背板的一侧形成发光器件层,所述发光器件层包括多个呈阵列分布的发光单元,所述发光单元包括向背离所述驱动背板的方向层叠设置的多个发光器件;在垂直于所述驱动背板的方向上,距离所述驱动背板最近的所述发光器件以外的发光器件为透明器件;
    同一发光单元中,至少部分所述发光器件与所述像素驱动电路连接,用于在所述像素驱动电路的驱动下发光,同一所述发光单元中至少有两个所述发光器件的发光材料不同。
  13. 一种像素驱动电路,其中,用于驱动串联于第一电源端和第二电源端之间的多个发光器件发光;
    所述像素驱动电路包括多个驱动单元,每个所述驱动单元均包括驱动晶体管、数据写入单元及储能单元;
    所述驱动晶体管具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述发光器件的第一端连接;
    所述数据写入单元用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
    所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
    每个所述发光器件的第一端与一所述驱动单元的驱动晶体管的第二端连接。
  14. 根据权利要求13所述的像素驱动电路,其中,多个所述驱动单元包括第一驱动晶体管、第二驱动晶体管及第三驱动晶体管;多个所述发光器件包括第一发光器件、 第二发光器件和第三发光器件;
    所述第一驱动晶体管的第二端与所述第一发光器件连接;
    所述第二驱动晶体管的第二端连接于所述第一发光器件与所述第二发光器件之间;
    所述第三驱动晶体管的第二端连接于所述第二发光器件与所述第三发光器件之间,所述第三发光器件的第二端与所述第二电源端连接。
  15. 一种像素驱动电路,其中,用于驱动串联于第一电源端和第二电源端之间的第一发光器件、第二发光器件和第三发光器件发光,所述像素驱动电路包括:
    驱动晶体管,具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述第一发光器件的第一端连接;
    数据写入单元,用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
    储能单元,所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
    第一开关单元,用于响应发光控制信号而导通,所述第一开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第一开关单元的第二端连接于所述第一发光器件与所述第二发光器件之间;
    第二开关单元,用于响应发光控制信号而导通,所述第二开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第二开关单元的第二端连接于所述第二发光器件与所述第三发光器件之间;
    第三开关单元,用于响应发光控制信号而导通,所述第三开关单元的第一端连接于所述第一发光器件与所述第二发光器件之间,所述第三开关单元的第二端与所述第二电源端连接;
    第四开关单元,用于响应发光控制信号而导通,所述第四开关单元的第一端连接于所述第二发光器件与所述第三发光器件之间,所述第四开关单元的第二端与所述第二电源端连接。
  16. 一种像素驱动电路,其中,用于驱动串联于第一电源端和第二电源端之间的第一发光器件、第二发光器件和第三发光器件发光,所述像素驱动电路包括:
    驱动晶体管,具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述第一发光器件的第一端连接;
    数据写入单元,用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
    储能单元,所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
    第一开关单元,用于响应发光控制信号而导通,所述第一开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第一开关单元的第二端连接于所述第一发光器件与所述第二发光器件之间;
    第二开关单元,用于响应发光控制信号而导通,所述第二开关单元的第一端连接于所述第一发光器件与所述第二发光器件之间,所述第二开关单元的第二端连接于所述第二发光器件与所述第三发光器件之间;
    第三开关单元,用于响应发光控制信号而导通,所述第三开关单元的第一端连接于所述第二发光器件与所述第三发光器件之间,所述第三开关单元的第二端与所述第二电源端连接。
  17. 一种像素驱动电路,其中,用于驱动串联于第一电源端和第二电源端之间的第一发光器件、第二发光器件和第三发光器件发光,所述像素驱动电路包括:
    驱动晶体管,具有控制端、第一端和第二端,所述驱动晶体管的第二端用于与所述第一发光器件的第一端连接;
    数据写入单元,用于响应写入控制信号而导通,以将数据信号传输至所述驱动晶体管的第一端;
    储能单元,所述储能单元的第一端与所述第一电源端连接,所述储能单元的第二端与所述驱动晶体管的控制端连接;
    第一开关单元,用于响应发光控制信号而导通,所述第一开关单元连接于所述驱动晶体管的第二端与所述第一发光器件之间;
    第二开关单元,用于响应发光控制信号而导通,所述第一开关单元的第一端连接于所述驱动晶体管与所述第一发光器件之间,所述第一开关单元的第二端连接于所述第二发光器件与所述第三发光器件之间;
    连接线,一端连接于所述第一发光器件与所述第二发光器件之间,另一端与所述第二电源端连接。
  18. 一种像素驱动电路的驱动方法,其中,用于权利要求13或14所述的像素驱动电路;
    所述驱动方法包括:
    在数据写入阶段,导通各所述驱动单元的所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电,以使多个发光器件同时发光。
  19. 一种像素驱动电路的驱动方法,其中,用于权利要求15所述的像素驱动电路;
    所述驱动方法包括:
    在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
    在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断所述第一开关单元及所述第二开关单元,导通所述第三开关单元及所述第四开关单元,以使所述第一发光器件发光;或者,导通所述第一开关单元及所述第四开关单元,关断所述第二开关单元及所述第三开关单元,以使所述第二发光器件发光;或者,导通所述第一开关单元及所述第二开关单元,关断所述第三开关单元及所述第四开关单元,以使所述第三发光器件发光。
  20. 一种像素驱动电路的驱动方法,其中,用于权利要求16所述的像素驱动电路;
    所述驱动方法包括:
    在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
    在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断所述第一开关单元,导通所述第二开关单元及所述第三开关单元,以使所述第一发光器件发光;或者,关断所述第二开关单元,导通所述第一开关单元及所述第三开关单元,以使所述第二发光器件发光;或者,关断所述第三开关单元,导通所述第一开关单元及所述第二开关单元,以使所述第三发光器件发光。
  21. 一种像素驱动电路的驱动方法,其中,用于权利要求17所述的像素驱动电路;
    所述驱动方法包括:
    在数据写入阶段,导通所述数据写入单元,以将所述数据信号经过所述数据写入单元和所述驱动晶体管传输至所述驱动晶体管的控制端,并向所述储能单元充电;
    在发光阶段,通过所述储能单元向所述驱动晶体管输入第一电源信号,以将所述驱动晶体管导通,以使所述驱动晶体管的第二端的信号向所述第一发光器件的第一端传输;关断第二开关单元,导通第一开关单元,以使所述第一发光器件发光;或者,关断所述第一开关单元,导通所述第二开关单元,并在所述第一电源端的电压值低于所述第二电源端的电压值时,所述第二发光器件发光;或者,关断所述第一开关单元,导通所述第二开关单元,并在所述第一电源端的电压值高于所述第二电源端的电压值时,所述第三发光器件发光。
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