WO2022156321A1 - 一种用于制作高密度互连线路板的方法 - Google Patents
一种用于制作高密度互连线路板的方法 Download PDFInfo
- Publication number
- WO2022156321A1 WO2022156321A1 PCT/CN2021/130130 CN2021130130W WO2022156321A1 WO 2022156321 A1 WO2022156321 A1 WO 2022156321A1 CN 2021130130 W CN2021130130 W CN 2021130130W WO 2022156321 A1 WO2022156321 A1 WO 2022156321A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit board
- manufacturing
- copper
- density
- board according
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 47
- 229910052802 copper Inorganic materials 0.000 claims abstract description 46
- 239000010949 copper Substances 0.000 claims abstract description 46
- 238000009713 electroplating Methods 0.000 claims abstract description 18
- 238000000227 grinding Methods 0.000 claims abstract description 6
- 238000003825 pressing Methods 0.000 claims abstract description 5
- 239000000654 additive Substances 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 8
- 238000003475 lamination Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 238000005520 cutting process Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 23
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000001680 brushing effect Effects 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004880 explosion Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
Definitions
- the invention relates to the technical field of PCB board fabrication, in particular to a method for fabricating high-density interconnection circuit boards.
- PCB printed Circuit Board
- the Chinese name is printed circuit board, also known as printed circuit board, is an important electronic component, a support body for electronic components, and a carrier for electrical connection of electronic components. Because it is made by electronic printing, it is called a "printed" circuit board.
- the conventional conduction process of high-density interconnected circuit boards is to use drilling + electroplating to achieve interlayer conduction. This process has the following disadvantages for the production of high-multi-layer high-density interconnected circuit board products:
- a method for making a high-density interconnect circuit board comprising
- the copper pillars are opened, and the specific method is as follows;
- the stripping process is performed after the S2 electroplating of the copper pillars.
- the method for fabricating the circuit is a semi-additive method.
- the preparation method of the semi-additive method is:
- the via hole uses a positive film to open the window
- the dry film is a high-resolution photosensitive dry film.
- the height error of the electroplated copper column is between +3 ⁇ m--3 ⁇ m.
- the above-mentioned method for manufacturing a high-density interconnected circuit board has a simple manufacturing method, can realize conduction of any layer, and improves the production efficiency; the method of using the electroplated copper column does not produce depression, and it is easy to realize the hole-on-hole and hole-plate combination.
- the first structure has high alignment accuracy.
- the semi-additive method is used to make graphic circuits, which can accurately control the copper thickness of each layer of circuits, realize more precise circuit manufacturing, and ensure the quality of products.
- FIG. 1 is a flowchart of a method for fabricating a high-density interconnection circuit board according to an embodiment of the present invention.
- a method for fabricating a high-density interconnection circuit board comprising:
- the copper pillars are opened, and the specific method is as follows;
- the stripping process is performed after the S2 electroplating of the copper pillars.
- the method for fabricating the circuit is a semi-additive method.
- the preparation method of the semi-additive method is:
- the via hole uses a positive film to open the window
- the dry film is a high-resolution photosensitive dry film.
- the height error of the electroplated copper column is between +3 ⁇ m--3 ⁇ m.
- the method for manufacturing a high-density interconnected circuit board is simple, can realize conduction of any layer, and improves the production efficiency; the method of using electroplating copper posts does not generate depressions, and it is easy to realize holes on holes and hole disks
- the integrated structure has high alignment accuracy.
- the semi-additive method is used for pattern circuit production, which can accurately control the copper thickness of each layer of circuit, realize more precise circuit production, and ensure the quality of the product.
- the production method of the thin copper conductive layer is divided into a semi-additive method and an improved semi-additive method.
- Making a thin copper layer to achieve conduction the thickness of the copper layer is generally less than 1.5 ⁇ m; improved semi-additive method: the thin copper conduction layer is a copper-containing substrate to reduce copper or laminate a thin copper foil to achieve conduction, and the thickness of the copper layer is generally 1.5 ⁇ m ⁇ m-3 ⁇ m.
- the semi-additive method or the improved semi-additive method can be selected to control the copper of each layer of circuits according to the specific copper layer thickness requirements, so as to realize more precise circuit manufacturing.
- the dry film used is a high-resolution photosensitive dry film. Make the photosensitive dry film resolution 1:1, so that the exposure effect is good.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (7)
- 一种用于制作高密度互连线路板的方法,其特征在于:包括S1、开料;S2、电镀铜柱;S3、芯板制作;S4、压合;S5、研磨;S6、线路制作。
- 根据权利要求1所述的一种用于制作高密度互连线路板的方法,其特征在于:所述S2电镀铜柱之前先进行铜柱开窗,具体的方法为;S21、使用预设厚度的干膜进行压膜;S22、曝光;S23、显影。
- 根据权利要求1所述的一种用于制作高密度互连线路板的方法,其特征在于:在S2电镀铜柱之后进行脱膜处理。
- 根据权利要求1所述的一种用于制作高密度互连线路板的方法,其特征在于:所述线路制作的方法为半加成法。
- 根据权利要求4所述的一种用于制作高密度互连线路板的方法,其特征在于:所述半加成法的制作方法为:S51、在基板制作薄铜导通层;S52、线路图形制作;S53、导通孔使用正片开窗;S54、在线路图形和导通孔开窗区域加成预设厚度的导通铜;S55、再移除薄铜导通层。
- 根据权利要求1所述的一种用于制作高密度互连线路板的方法,其特征在于:所述干膜为高解晰感光干膜。
- 根据权利要求1所述的一种用于制作高密度互连线路板的方法,其特征在于:所述电镀铜柱高度误差在+3μm--3μm之间。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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CN202110077223.8 | 2021-01-20 | ||
CN202110077223.8A CN112752439A (zh) | 2021-01-20 | 2021-01-20 | 一种用于制作高密度互连线路板的方法 |
Publications (1)
Publication Number | Publication Date |
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WO2022156321A1 true WO2022156321A1 (zh) | 2022-07-28 |
Family
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PCT/CN2021/130130 WO2022156321A1 (zh) | 2021-01-20 | 2021-11-11 | 一种用于制作高密度互连线路板的方法 |
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CN (1) | CN112752439A (zh) |
WO (1) | WO2022156321A1 (zh) |
Families Citing this family (3)
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CN112752439A (zh) * | 2021-01-20 | 2021-05-04 | 惠州市金百泽电路科技有限公司 | 一种用于制作高密度互连线路板的方法 |
CN113225937A (zh) * | 2021-05-19 | 2021-08-06 | 惠州市金百泽电路科技有限公司 | 一种应用于高密度互连电路板无芯板的制作方法 |
CN114286530A (zh) * | 2022-01-05 | 2022-04-05 | 江西景旺精密电路有限公司 | 一种hdi板增层方法以及电路板 |
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CN101286454A (zh) * | 2007-04-10 | 2008-10-15 | 上海美维科技有限公司 | 印制电路板和集成电路封装基板的制作方法 |
CN106304668A (zh) * | 2016-10-31 | 2017-01-04 | 安捷利电子科技(苏州)有限公司 | 一种采用增强型半加成法制作印制线路板的制作方法 |
US20180368266A1 (en) * | 2017-04-21 | 2018-12-20 | Albert Yeh | Method for manufacturing traces of pcb |
CN111491459A (zh) * | 2020-04-09 | 2020-08-04 | 江苏普诺威电子股份有限公司 | 基于半加成法的细密线路基板的制作方法 |
CN112752439A (zh) * | 2021-01-20 | 2021-05-04 | 惠州市金百泽电路科技有限公司 | 一种用于制作高密度互连线路板的方法 |
Family Cites Families (3)
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CN103813650B (zh) * | 2012-11-15 | 2017-08-01 | 深南电路有限公司 | 一种能够承载大电流的电路板及其加工方法 |
KR20150137001A (ko) * | 2014-05-28 | 2015-12-08 | 쿄세라 서킷 솔루션즈 가부시키가이샤 | 배선 기판의 제조방법 |
CN106961808B (zh) * | 2017-02-20 | 2019-09-10 | 宁波华远电子科技有限公司 | 下沉式高密度互连板的制作方法 |
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- 2021-01-20 CN CN202110077223.8A patent/CN112752439A/zh active Pending
- 2021-11-11 WO PCT/CN2021/130130 patent/WO2022156321A1/zh active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101286454A (zh) * | 2007-04-10 | 2008-10-15 | 上海美维科技有限公司 | 印制电路板和集成电路封装基板的制作方法 |
CN106304668A (zh) * | 2016-10-31 | 2017-01-04 | 安捷利电子科技(苏州)有限公司 | 一种采用增强型半加成法制作印制线路板的制作方法 |
US20180368266A1 (en) * | 2017-04-21 | 2018-12-20 | Albert Yeh | Method for manufacturing traces of pcb |
CN111491459A (zh) * | 2020-04-09 | 2020-08-04 | 江苏普诺威电子股份有限公司 | 基于半加成法的细密线路基板的制作方法 |
CN112752439A (zh) * | 2021-01-20 | 2021-05-04 | 惠州市金百泽电路科技有限公司 | 一种用于制作高密度互连线路板的方法 |
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