WO2022141527A1 - 显示装置以及驱动方法 - Google Patents
显示装置以及驱动方法 Download PDFInfo
- Publication number
- WO2022141527A1 WO2022141527A1 PCT/CN2020/142426 CN2020142426W WO2022141527A1 WO 2022141527 A1 WO2022141527 A1 WO 2022141527A1 CN 2020142426 W CN2020142426 W CN 2020142426W WO 2022141527 A1 WO2022141527 A1 WO 2022141527A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- transistor
- driving
- electrode
- voltage
- driving transistor
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 36
- 239000003990 capacitor Substances 0.000 claims description 15
- 230000000737 periodic effect Effects 0.000 claims description 3
- 239000004973 liquid crystal related substance Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
Definitions
- the present application relates to the field of display technology, and in particular, to a display device and a driving method.
- the luminous effect of sub-pixels is limited by the corresponding The performance of the driving transistor in the sub-pixel driving circuit, especially the threshold voltage of the driving transistor; as the continuous operation time of the display device becomes longer, the threshold voltage of the driving transistor will also drift (hereinafter referred to as threshold voltage drift), This will affect the light-emitting effect of the sub-pixels, thereby causing uneven display of the display device and affecting the service life.
- Embodiments of the present application provide a display device and a driving method for alleviating the threshold voltage shift of the existing driving transistors.
- the present application provides a display device, which includes:
- a display panel comprising sub-pixel driving circuits arranged in an array in the display area, the sub-pixel driving circuits comprising driving transistors;
- a periodic reverse compensation period compensates for a second threshold voltage shift of the drive transistor formed by the gate bias of the drive transistor, the second threshold voltage shift being caused by the drive transistor the forward current is formed.
- the driving period includes first to sixth time periods
- the driving chip is configured to compensate the first threshold voltage shift of the driving transistor in the first to third time periods
- the display panel is driven to work by the driving transistor in the fourth time period
- the drift of the second threshold voltage of the driving transistor is compensated in the fifth to sixth time periods.
- the driver chip is used for:
- a compensation voltage is input to the gate of the driving transistor, a high potential voltage is input to the first electrode of the driving transistor, a reference voltage is input to the second electrode of the driving transistor, and the driving is interrupted a conductive path between the second electrode of the transistor and the pixel electrode;
- stop inputting the compensation voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, interrupting the conductive path between the second electrode of the driving transistor and the pixel electrode;
- stop inputting the driving voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, The conductive path between the second electrode of the driving transistor and the pixel electrode is opened.
- the driver chip is used for:
- stop inputting a voltage to the gate of the driving transistor input a high-potential voltage to the first electrode of the driving transistor, stop inputting a voltage to the second electrode of the driving transistor, and turn on the driving A conductive path between the second electrode of the transistor and the pixel electrode.
- the driver chip is used for:
- a driving voltage is input to the gate of the driving transistor, a low-potential voltage is input to the first electrode of the driving transistor, and a high-potential voltage is input to the second electrode of the driving transistor, and the a conductive path between the second electrode of the driving transistor and the pixel electrode;
- the input voltage to the gate of the driving transistor is stopped, the high potential voltage is input to the first electrode of the driving transistor, the input voltage to the second electrode of the driving transistor is stopped, and the driving is interrupted A conductive path between the second electrode of the transistor and the pixel electrode.
- the first time period to the fourth time period belong to the previous display frame in two consecutive display frames
- the fifth time period and the sixth time period belong to the Displays the last frame of two consecutive display frames.
- the sub-pixel driving circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a storage capacitor, the gate of the first transistor and the The first electrode of the second transistor is connected to the first node, the first electrode of the first transistor is connected to the high-potential voltage line, the second electrode of the first transistor, the first electrode of the third transistor, the The first electrode of the fourth transistor and the first electrode of the fifth transistor are connected to the second node, the gate of the second transistor is connected to the first scan line, and the second electrode of the second transistor is connected to the data line , the gate of the third transistor is connected to the second scan line, the gate of the fourth transistor is connected to the third scan line, the gate of the fifth transistor is connected to the fourth scan line, the third The second electrode of the transistor and the second electrode of the fourth transistor are connected to the parameter voltage line, the second electrode of the fifth transistor is connected to the light-emitting device, the first plate of the storage capacitor is connected to the first node
- the present application provides a method for driving a display device, the display device includes a display panel and a driving chip, the display panel includes a sub-pixel driving circuit arranged in an array in a display area, the sub-pixel driving circuit includes a driving transistor, and the The display device driving method includes:
- the driving chip compensates for the first threshold voltage drift of the driving transistor in the internal compensation period of the driving cycle, and the first threshold voltage drift is formed by the gate bias of the driving transistor;
- the driving chip drives the display panel to work through the driving transistor during the display period of the driving cycle
- the driving chip compensates for a second threshold voltage shift of the driving transistor during a reverse compensation period of the driving cycle, where the second threshold voltage shift is formed by a forward current of the driving transistor.
- the driving period includes first to sixth time periods, wherein:
- the driving chip compensates the drift of the first threshold voltage of the driving transistor in the first to third time periods
- the driving chip drives the display panel to work through the driving transistor in a fourth time period
- the driving chip compensates the drift of the second threshold voltage of the driving transistor in the fifth to sixth time periods.
- the driving chip compensating for the drift of the first threshold voltage of the driving transistor in the first to third time periods includes:
- a compensation voltage is input to the gate of the driving transistor, a high potential voltage is input to the first electrode of the driving transistor, a reference voltage is input to the second electrode of the driving transistor, and the driving is interrupted a conductive path between the second electrode of the transistor and the pixel electrode;
- stop inputting the compensation voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, interrupting the conductive path between the second electrode of the driving transistor and the pixel electrode;
- stop inputting the driving voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, The conductive path between the second electrode of the driving transistor and the pixel electrode is opened.
- the driving chip to drive the display panel to work through the driving transistor in the fourth time period includes:
- stop inputting a voltage to the gate of the driving transistor input a high-potential voltage to the first electrode of the driving transistor, stop inputting a voltage to the second electrode of the driving transistor, and turn on the driving A conductive path between the second electrode of the transistor and the pixel electrode.
- the driving chip compensating the drift of the second threshold voltage of the driving transistor in the fifth to sixth time period includes:
- a driving voltage is input to the gate of the driving transistor, a low-potential voltage is input to the first electrode of the driving transistor, and a high-potential voltage is input to the second electrode of the driving transistor, and the a conductive path between the second electrode of the driving transistor and the pixel electrode;
- the input voltage to the gate of the driving transistor is stopped, the high potential voltage is input to the first electrode of the driving transistor, the input voltage to the second electrode of the driving transistor is stopped, and the driving is interrupted A conductive path between the second electrode of the transistor and the pixel electrode.
- the first time period to the fourth time period belong to a previous display frame in two consecutive display frames
- the fifth time period and the sixth time period belong to The latter one of the two consecutive display frames is displayed.
- the sub-pixel driving circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a storage capacitor, and the gate of the first transistor and The first electrode of the second transistor is connected to the first node, the first electrode of the first transistor is connected to the high-potential voltage line, the second electrode of the first transistor, the first electrode of the third transistor, The first electrode of the fourth transistor and the first electrode of the fifth transistor are connected to the second node, the gate of the second transistor is connected to the first scan line, and the second electrode of the second transistor is connected to the second node data line, the gate of the third transistor is connected to the second scan line, the gate of the fourth transistor is connected to the third scan line, the gate of the fifth transistor is connected to the fourth scan line, the The second electrode of the third transistor and the second electrode of the fourth transistor are connected to the parameter voltage line, the second electrode of the fifth transistor is connected to the light-emitting device, and the first plate of the storage capacitor is connected
- the present application provides a display device and a driving method.
- the method includes the driving chip compensating for a first threshold voltage drift of the driving transistor in an internal compensation period of a driving cycle, and the first threshold voltage drift is determined by The gate bias voltage of the driving transistor is formed, the display panel is driven to work by the driving transistor in the display period of the driving period, and the second threshold voltage of the driving transistor is set in the reverse compensation period of the driving period The drift is compensated, and the second threshold voltage drift is formed by the forward current of the drive transistor.
- the threshold voltage drift formed by the gate bias voltage of the driving transistor and the threshold voltage drift formed by the forward current are respectively compensated, so that the threshold voltage drift of the existing driving transistor is alleviated, and the normal service life of the product is improved.
- FIG. 1 is a schematic structural diagram of a display device involved in the present application.
- FIG. 2 is a flowchart of a method for driving a display device according to the present application.
- FIG. 3 is a schematic structural diagram of a sub-pixel driving circuit involved in the present application.
- FIG. 4 is an operation timing diagram of the sub-pixel driving circuit involved in the present application.
- 5a to 5f are schematic diagrams of the operation of the sub-pixel driving circuit involved in the present application.
- first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more of said features. In the description of the present application, “plurality” means two or more, unless otherwise expressly and specifically defined.
- the terms “installed”, “connected” and “connected” should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
- installed should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
- a first feature "on” or “under” a second feature may include direct contact between the first and second features, or may include the first and second features Not directly but through additional features between them.
- the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
- the first feature is “below”, “below” and “below” the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
- Embodiments of the present application provide a display device and a driving method for alleviating the threshold voltage shift of the existing driving transistors.
- the present application provides a display device, which includes:
- the display panel 11 includes sub-pixel driving circuits arranged in an array in the display area, and the sub-pixel driving circuits include driving transistors;
- the driving chip 12 is used for compensating for the drift of the first threshold voltage of the driving transistor in the internal compensation period of the driving cycle, and driving the display panel to work through the driving transistor in the display period of the driving cycle, and in the display period of the driving cycle, the display panel is driven to work.
- the reverse compensation period of the drive cycle compensates for a second threshold voltage shift of the drive transistor formed by the gate bias of the drive transistor, the second threshold voltage shift being caused by the drive
- the forward current of the transistor is formed.
- the driving period includes first to sixth time periods
- the driving chip is configured to compensate the first threshold voltage drift of the driving transistor in the first to third time periods
- the display panel is driven to work by the driving transistor in the fourth time period, and the second threshold voltage shift of the driving transistor is compensated in the fifth to sixth time periods.
- the driver chip is used for:
- a compensation voltage is input to the gate of the driving transistor, a high potential voltage is input to the first electrode of the driving transistor, a reference voltage is input to the second electrode of the driving transistor, and the driving is interrupted a conductive path between the second electrode of the transistor and the pixel electrode;
- stop inputting the compensation voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, interrupting the conductive path between the second electrode of the driving transistor and the pixel electrode;
- stop inputting the driving voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, The conductive path between the second electrode of the driving transistor and the pixel electrode is opened.
- the driver chip is used for:
- stop inputting a voltage to the gate of the driving transistor input a high-potential voltage to the first electrode of the driving transistor, stop inputting a voltage to the second electrode of the driving transistor, and turn on the driving A conductive path between the second electrode of the transistor and the pixel electrode.
- the driver chip is used for:
- a driving voltage is input to the gate of the driving transistor, a low-potential voltage is input to the first electrode of the driving transistor, and a high-potential voltage is input to the second electrode of the driving transistor, and the a conductive path between the second electrode of the driving transistor and the pixel electrode;
- the input voltage to the gate of the driving transistor is stopped, the high potential voltage is input to the first electrode of the driving transistor, the input voltage to the second electrode of the driving transistor is stopped, and the driving is interrupted A conductive path between the second electrode of the transistor and the pixel electrode.
- the present application provides a method for driving a display device, and the method for driving a display device includes:
- Step 201 the driving chip compensates a first threshold voltage drift of the driving transistor during the internal compensation period of the driving cycle, and the first threshold voltage drift is formed by the gate bias of the driving transistor;
- Step 202 the driving chip drives the display panel to work through the driving transistor during the display period of the driving cycle;
- Step 203 the driving chip compensates a second threshold voltage shift of the driving transistor during the reverse compensation period of the driving cycle, where the second threshold voltage shift is formed by the forward current of the driving transistor.
- the drive cycle includes first to sixth time periods, wherein:
- the driving chip compensates the drift of the first threshold voltage of the driving transistor in the first to third time periods
- the driving chip drives the display panel to work through the driving transistor in a fourth time period
- the driving chip compensates the drift of the second threshold voltage of the driving transistor in the fifth to sixth time periods.
- the driving chip compensating for the drift of the first threshold voltage of the driving transistor in the first to third time periods includes:
- a compensation voltage is input to the gate of the driving transistor, a high potential voltage is input to the first electrode of the driving transistor, a reference voltage is input to the second electrode of the driving transistor, and the driving is interrupted a conductive path between the second electrode of the transistor and the pixel electrode;
- stop inputting the compensation voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, interrupting the conductive path between the second electrode of the driving transistor and the pixel electrode;
- stop inputting the driving voltage to the gate of the driving transistor continue to input the high potential voltage to the first electrode of the driving transistor, stop inputting the voltage to the second electrode of the driving transistor, The conductive path between the second electrode of the driving transistor and the pixel electrode is opened.
- the driving chip to drive the display panel to work through the driving transistor in the fourth time period includes:
- stop inputting a voltage to the gate of the driving transistor input a high-potential voltage to the first electrode of the driving transistor, stop inputting a voltage to the second electrode of the driving transistor, and turn on the driving A conductive path between the second electrode of the transistor and the pixel electrode.
- the driving chip compensating the drift of the second threshold voltage of the driving transistor in the fifth to sixth time periods includes:
- a driving voltage is input to the gate of the driving transistor, a low-potential voltage is input to the first electrode of the driving transistor, and a high-potential voltage is input to the second electrode of the driving transistor, and the a conductive path between the second electrode of the driving transistor and the pixel electrode;
- the input voltage to the gate of the driving transistor is stopped, the high potential voltage is input to the first electrode of the driving transistor, the input voltage to the second electrode of the driving transistor is stopped, and the driving is interrupted A conductive path between the second electrode of the transistor and the pixel electrode.
- the display device provided by the present application can be a liquid crystal display device or an OLED display device, and the sub-pixel driving circuit thereof can be any circuit with a driving transistor. illustrate.
- the sub-pixel driving circuit provided by the present application is a 5T1C circuit.
- the transistor T1 is the driving transistor involved in the present application.
- the sub-pixel driving circuit provided by the present application is a 5T1C circuit. It includes: a first transistor T1 to a fifth transistor T5 , and the connection mode of each transistor is shown in FIG. 3 , and details are not repeated here.
- the present application provides the control sequence shown in FIG. 4.
- the driving cycle includes the display time length of 2 display frames, and OVDD is generally a high-potential voltage provided by the power supply, such as 32V.
- OVSS is a low potential voltage, such as 0V, etc.
- the voltage Vinit is a compensation voltage for real-time compensation for the offset of the threshold voltage Vth of the driving transistor TFT caused by the display device during operation through an internal compensation circuit, and Vref is a parameter voltage.
- the time period t1 to the time period t4 belong to the display frame Fi, and the time period t5 and the time period t6 belong to the display frame Fi+1; based on FIG. 3 and FIG.
- the logic of the display device driving method is as follows:
- the transistor T1 in the reset stage, that is, in the first time period t1, the transistor T1, the transistor T2 and the transistor T3 are turned on, and the transistor T4 and the transistor T5 are turned off.
- the signal of the data line data is input to the transistor T1 through the transistor T2.
- the transistor T1 and the transistor T2 are turned on, and the transistor T3, the transistor T4 and the transistor T5 are turned off.
- the signal of the data line data is input to the transistor T1 through the transistor T2.
- the drain voltage Vs Vinit-Vth
- the voltage signal detected by the signal line Verf is the voltage of Vs from Verf to Vinit-Vth.
- the transistor T1 the transistor T2 and the transistor T5 are turned on, and the transistor T4 and the transistor T3 are turned off.
- the signal of the data line data (the driving voltage Vdata) passes through
- the transistor T1 and the transistor T5 are turned on, and the transistor T2, the transistor T4 and the transistor T3 are turned off.
- the signal of the data line data passes through the transistor T2 Input to the gate of transistor T1
- the current I has nothing to do with the threshold voltage of the transistor T1.
- the luminous intensity of the OLED is related to the circuit passing through the OLED (that is, the transistor T1), the luminous intensity of the sub-pixel has nothing to do with the threshold voltage of the transistor T1. Then, based on FIG. 5 a to FIG. 5 c , the effect of the Vth offset of the driving TFT caused by the display in the working process on the display effect of the display device is realized in real time based on the internal compensation circuit.
- the first electrode of the transistor T1 is connected to the high potential voltage OVDD, the first electrode is the source electrode, and the current flows from the first electrode to the second electrode.
- the transistor T1 the transistor T2 and the transistor T4 are turned on, and the transistor T5 and the transistor T3 are turned off.
- the signal of the data line data ( The driving voltage Vdata) is input to the gate of the transistor T1 through the transistor T2
- the power supply OVDD changes from a high potential voltage to a low potential voltage OVSS
- the signal of the signal line Verf (the high potential voltage OVDD) is input to the second electrode of the transistor T1 through the transistor T4.
- the first electrode voltage is OVSS
- the polarity of the Vds of the transistor T1 is reversed
- the current flows from the second electrode to the first electrode, providing a current reverse to alleviate the threshold voltage shift of transistor T1 caused by the continuous forward current of transistor T1.
- the transistor T2 in the reverse compensation reset stage after the end of the light emission, that is, in the sixth time period t6, the transistor T2, the transistor T3, the transistor T4 and the transistor T5 are turned off, and the gate voltage of the transistor T1 becomes a low potential; this When the signal (0) of the data line data is input to the gate of the transistor T1 through the transistor T2, the power supply OVDD is restored to the high potential voltage OVDD, and the signal of the signal line Verf (restored to the low potential), completes the reset of the reverse compensation.
- the 5T1C compensation circuit provided by the present application can compensate the Vth offset of the driving TFT caused by the display during the working process in real time through the internal compensation circuit, and within two consecutive frames of display, the compensation and display are performed within one frame. , one frame gives the driving TFT reverse current pressure to compensate the threshold voltage shift caused by the forward bias stress of the driving TFT gate and the unidirectional current.
- the transistor T4 can be deleted to obtain a 4T1C sub-pixel driving circuit.
- the specific working principle and corresponding control timing can be referred to FIG. 3 to FIG. 5f, and will not be repeated.
- a transistor T' can also be added.
- the source and drain of the transistor T' and the transistor T2 are connected in parallel, and are specially used for the input of the compensation voltage Vinit under the timing control. Its specific working principle For the corresponding control sequence, reference may be made to FIG. 3 to FIG. 5 f , which will not be described again.
- the present application provides a display device and a driving method.
- the method includes the driving chip compensating, in an internal compensation period of a driving cycle, a first threshold voltage drift of the driving transistor, and the first threshold voltage drift is caused by the driving
- the gate bias voltage of the transistor is formed, the display panel is driven to work by the driving transistor in the display period of the driving period, and the second threshold voltage drift of the driving transistor is compensated in the reverse compensation period of the driving period , the second threshold voltage shift is formed by the forward current of the drive transistor.
- the threshold voltage drift formed by the gate bias voltage of the driving transistor and the threshold voltage drift formed by the forward current are respectively compensated, so that the threshold voltage drift of the existing driving transistor is alleviated, and the normal service life of the product is improved.
- a display device and a driving method provided by the embodiments of the present application have been described in detail above, and the principles and implementations of the present application are described with specific examples herein. The descriptions of the above embodiments are only used to help understand the present application. Those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements to some of the technical features; and these modifications or replacements, and The essence of the corresponding technical solutions is not deviated from the scope of the technical solutions of the embodiments of the present application.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of El Displays (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
本申请提供一种显示装置以及驱动方法，该方法包括驱动芯片在驱动周期的内部补偿时段对驱动晶体管的第一阈值电压漂移进行补偿，在驱动周期的显示时段通过驱动晶体管驱动显示面板工作，在驱动周期的反向补偿时段对驱动晶体管的第二阈值电压漂移进行补偿。本申请缓解了现有驱动晶体管的阈值电压漂移，提高了产品使用寿命。
Description
本申请涉及显示技术领域，尤其涉及一种显示装置以及驱动方法。
随着显示技术的迅速发展，人们越来越依赖显示装置，例如手机、平板等，与之伴随的是这些显示装置的持续工作时间变长；在显示装置内部，子像素的发光效果受制于对应子像素驱动电路中驱动晶体管的性能，尤其是该驱动晶体管的阈值电压；随着显示装置的持续工作时间变长，驱动晶体管的阈值电压也会随之发生漂移（下文称为阈值电压漂移），这会导致子像素的发光效果受到影响，进而造成显示装置显示不均，影响使用寿命。
本申请实施例提供一种显示装置以及驱动方法，用以缓解现有驱动晶体管的阈值电压漂移。
本申请提供一种显示装置，其包括：
显示面板，包括在显示区内阵列排布的子像素驱动电路，所述子像素驱动电路包括驱动晶体管；
驱动芯片，用于在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作，在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。
在本申请提供的显示装置中，所述驱动周期包括第一至第六时间段，所述驱动芯片用于在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿，在第四时间段内通过所述驱动晶体管驱动所述显示面板工作，在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
在本申请提供的显示装置中，所述驱动芯片用于：
在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在本申请提供的显示装置中，所述驱动芯片用于：
在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在本申请提供的显示装置中，所述驱动芯片用于：
在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
在本申请提供的显示装置中，所述第一时间段至所述第四时间段属于连续两个显示帧中前一个显示帧，所述第五时间段和所述第六时间段属于所述连续两个显示帧中后一个显示帧。
在本申请提供的显示装置中，所述子像素驱动电路包括第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和存储电容，所述第一晶体管的栅极和所述第二晶体管的第一电极连接第一节点，所述第一晶体管的第一电极接入高电位电压线，所述第一晶体管的第二电极、所述第三晶体管的第一电极、所述第四晶体管的第一电极以及所述第五晶体管的第一电极连接第二节点，所述第二晶体管的栅极接入第一扫描线，所述第二晶体管的第二电极接入数据线，所述第三晶体管的栅极接入第二扫描线，所述第四晶体管的栅极接入第三扫描线，所述第五晶体管的栅极接入第四扫描线，所述第三晶体管的第二电极和所述第四晶体管的第二电极接入参数电压线，所述第五晶体管的第二电极连接发光器件，所述存储电容的第一极板连接所述第一节点，所述存储电容的第二极板连接所述第二节点，所述驱动晶体管为所述第一晶体管。
本申请提供一种显示装置驱动方法，所述显示装置包括显示面板以及驱动芯片，所述显示面板包括在显示区内阵列排布的子像素驱动电路，所述子像素驱动电路包括驱动晶体管，所述显示装置驱动方法包括：
所述驱动芯片在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成；
所述驱动芯片在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作；
所述驱动芯片在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。
在本申请提供的显示装置驱动方法中，所述驱动周期包括第一至第六时间段，其中：
所述驱动芯片在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿；
所述驱动芯片在第四时间段内通过所述驱动晶体管驱动所述显示面板工作；
所述驱动芯片在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
在本申请提供的显示装置驱动方法中，所述驱动芯片在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿包括：
在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在本申请提供的显示装置驱动方法中，所述驱动芯片在第四时间段内通过所述驱动晶体管驱动所述显示面板工作包括：
在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在本申请提供的显示装置驱动方法中，所述驱动芯片在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿包括：
在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
在本申请提供的显示装置驱动方法中，所述第一时间段至所述第四时间段属于连续两个显示帧中前一个显示帧，所述第五时间段和所述第六时间段属于所述连续两个显示帧中后一个显示帧。
在本申请提供的显示装置驱动方法中，所述子像素驱动电路包括第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和存储电容，所述第一晶体管的栅极和所述第二晶体管的第一电极连接第一节点，所述第一晶体管的第一电极接入高电位电压线，所述第一晶体管的第二电极、所述第三晶体管的第一电极、所述第四晶体管的第一电极以及所述第五晶体管的第一电极连接第二节点，所述第二晶体管的栅极接入第一扫描线，所述第二晶体管的第二电极接入数据线，所述第三晶体管的栅极接入第二扫描线，所述第四晶体管的栅极接入第三扫描线，所述第五晶体管的栅极接入第四扫描线，所述第三晶体管的第二电极和所述第四晶体管的第二电极接入参数电压线，所述第五晶体管的第二电极连接发光器件，所述存储电容的第一极板连接所述第一节点，所述存储电容的第二极板连接所述第二节点，所述驱动晶体管为所述第一晶体管。
有益效果：本申请提供一种显示装置以及驱动方法，该方法包括所述驱动芯片在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成，在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作，在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。本申请通过对驱动晶体管的栅偏压形成的阈值电压漂移、以及正向电流形成的阈值电压漂移分别进行补偿，缓解了现有驱动晶体管的阈值电压漂移，提高了产品正常使用寿命。
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为本申请涉及的显示装置的结构示意图。
图2为本申请涉及的显示装置驱动方法的流程图。
图3为本申请涉及的子像素驱动电路的结构示意图。
图4为本申请涉及的子像素驱动电路的工作时序图。
图5a至图5f为本申请涉及的子像素驱动电路的工作示意图。
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
本申请实施例提供一种显示装置以及驱动方法，用以缓解现有驱动晶体管的阈值电压漂移。
如图1所示，本申请提供了一种显示装置，其包括：
显示面板11，包括在显示区内阵列排布的子像素驱动电路，所述子像素驱动电路包括驱动晶体管；
驱动芯片12，用于在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作，在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。
在一种实施例中，所述驱动周期包括第一至第六时间段，所述驱动芯片用于在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿，在第四时间段内通过所述驱动晶体管驱动所述显示面板工作，在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
在一种实施例中，所述驱动芯片用于：
在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在一种实施例中，所述驱动芯片用于：
在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在一种实施例中，所述驱动芯片用于：
在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
如图2所示，本申请提供了一种显示装置驱动方法，所述显示装置驱动方法包括：
步骤201：所述驱动芯片在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成；
步骤202：所述驱动芯片在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作；
步骤203：所述驱动芯片在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。
在一种实施例中，所述驱动周期包括第一至第六时间段，其中：
所述驱动芯片在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿；
所述驱动芯片在第四时间段内通过所述驱动晶体管驱动所述显示面板工作；
所述驱动芯片在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
在一种实施例中，所述驱动芯片在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿包括：
在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在一种实施例中，所述驱动芯片在第四时间段内通过所述驱动晶体管驱动所述显示面板工作包括：
在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
在一种实施例中，所述驱动芯片在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿包括：
在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；
在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
本申请提供的显示装置可以是液晶显示装置，也可以是OLED显示装置，其子像素驱动电路可以是任意的具备驱动晶体管的电路，下文以本申请提供的几种优选实现方式对本申请的思想进行说明。
如图3所示，本申请提供的子像素驱动电路为5T1C电路，在该电路中，晶体管T1为本申请涉及的驱动晶体管，具体的，如图3所示，本申请提供的子像素驱动电路包括：第一晶体管T1至第五晶体管T5，各晶体管的连接方式如图3所示，不再赘述。
针对图3所示的电路，本申请提供图4所示的控制时序，在图4中，驱动周期包括2个显示帧的显示时间长度，OVDD一般为电源提供的高电位电压，例如32V大小，OVSS为低电位电压，例如0V等，电压Vinit为补偿电压，用于通过内部补偿电路实时补偿显示装置在工作过程中造成的驱动晶体管TFT的阈值电压Vth偏移，Vref为参数电压。
在一种实施例中，如图4所示，时间段t1至时间段t4属于显示帧Fi，时间段t5和时间段t6属于显示帧Fi+1；基于图3以及图4，实现本申请上述显示装置驱动方法的逻辑如下：
如图5a所示，在复位阶段，即第一时间段t1内，晶体管T1、晶体管T2以及晶体管T3打开，晶体管T4以及晶体管T5关闭，此时数据线data的信号通过晶体管T2输入到晶体管T1的栅极，信号线Verf的信号（参考电压Verf）通过晶体管T3输入到晶体管T1的第二电极，晶体管T1的第一电极接电源电压OVDD，晶体管T1的栅极电压Vg=Vinit，漏极电压Vs=Verf，栅极电压为OVDD。
如图5b所示，在侦测阶段，即第二时间段t2内，晶体管T1、晶体管T2打开，晶体管T3、晶体管T4以及晶体管T5关闭，此时数据线data的信号通过晶体管T2输入到晶体管T1的栅极，晶体管T1的栅极电压Vg=Vinit，漏极电压Vs= Vinit –Vth，信号线Verf侦测到的电压信号为Vs的电压由Verf变为Vinit –Vth。
如图5c所示，在电压写入阶段，即第三时间段t2内，晶体管T1、晶体管T2以及晶体管T5打开，晶体管T4以及晶体管T3关闭，此时数据线data的信号（驱动电压Vdata）通过晶体管T2输入到晶体管T1的栅极，晶体管T1的栅极电压与漏极电压之差Vgs=Vg- Vs =Vdata-（Vinit
–Vth）。
如图5d所示，在发光阶段，即第四时间段t4内，晶体管T1以及晶体管T5打开，晶体管T2、晶体管T4以及晶体管T3关闭，此时数据线data的信号（驱动电压Vdata）通过晶体管T2输入到晶体管T1的栅极，通过晶体管T1的电流I=k*（Vgs- Vth）*（Vgs- Vth）= k*（Vdata-Vinit）*（Vdata-Vinit），其中k为一个固定系数，*表示相乘的关系，此时电流I与晶体管T1的阈值电压无关，由于OLED的发光强度与通过OLED（即晶体管T1）的电路相关，那么子像素发光强度与晶体管T1的阈值电压也无关，那么基于图5a至图5c所示，实现了基于内部补偿电路实时补偿显示器在工作过程中造成的驱动TFT的Vth偏移对显示装置显示效果的影响。
在第一时间段t1至第四时间段t4这一个显示帧内，晶体管T1的第一电极连接高电位电压OVDD，此时第一电极为源极，电流由第一电极流向第二电极。
如图5e所示，在发光结束之后的反向补偿输入阶段，即第五时间段t5内，晶体管T1、晶体管T2以及晶体管T4打开，晶体管T5以及晶体管T3关闭，此时数据线data的信号（驱动电压Vdata）通过晶体管T2输入到晶体管T1的栅极，电源OVDD由高电位电压变为低电位电压OVSS，信号线Verf的信号（高电位电压OVDD）通过晶体管T4输入到晶体管T1的第二电极，晶体管T1的栅极电压Vg=Vdata，第二电极电压Vs=Verf=OVDD，第一电极电压位OVSS，晶体管T1的Vds极性反转，电流由第二电极流向第一电极，提供电流反向压力，以缓解晶体管T1持续正向电流导致的晶体管T1的阈值电压偏移。
如图5f所示，在发光结束之后的反向补偿复位阶段，即第六时间段t6内，晶体管T2、晶体管T3、晶体管T4以及晶体管T5关闭，晶体管T1的栅极电压变为低电位；此时数据线data的信号（0）通过晶体管T2输入到晶体管T1的栅极，电源OVDD恢复为高电位电压OVDD，信号线Verf的信号（恢复为低电位），完成反向补偿的复位。
基于上述实施例，本申请提供的5T1C补偿电路能通过内部补偿电路实时补偿显示器在工作过程中造成的驱动TFT的Vth偏移，并且在显示的连续两帧时间内，通过一帧内补和显示，一帧给予驱动TFT反向电流压力的方式，补偿驱动TFT栅极正偏应力和单向电流带来的阈值电压漂移。
在本申请的其他实施例中，可以删除晶体管T4，得到一个4T1C的子像素驱动电路，其具体的工作原理和对应的控制时序可以参考图3至图5f，不再赘述。
相应的，在本申请的其他实施例中，还可以增加一个晶体管T’，晶体管T’和晶体管T2的源漏极并联，在时序控制下专门用于补偿电压Vinit的输入，其具体的工作原理和对应的控制时序可以参考图3至图5f，不再赘述。
根据以上实施例可知：
本申请提供一种显示装置以及驱动方法，该方法包括所述驱动芯片在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成，在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作，在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。本申请通过对驱动晶体管的栅偏压形成的阈值电压漂移、以及正向电流形成的阈值电压漂移分别进行补偿，缓解了现有驱动晶体管的阈值电压漂移，提高了产品正常使用寿命。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种显示装置以及驱动方法进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。
Claims (20)
- 一种显示装置，其特征在于，包括：显示面板，包括在显示区内阵列排布的子像素驱动电路，所述子像素驱动电路包括驱动晶体管；驱动芯片，用于在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作，在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。
- 如权利要求1所述的显示装置，其特征在于，所述驱动周期包括第一至第六时间段，所述驱动芯片用于在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿，在第四时间段内通过所述驱动晶体管驱动所述显示面板工作，在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
- 如权利要求2所述的显示装置，其特征在于，所述驱动芯片用于：在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求3所述的显示装置，其特征在于，所述驱动芯片用于：在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求4所述的显示装置，其特征在于，所述驱动芯片用于：在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求2所述的显示装置，其特征在于，所述第一时间段至所述第四时间段属于连续两个显示帧中前一个显示帧，所述第五时间段和所述第六时间段属于所述连续两个显示帧中后一个显示帧。
- 如权利要求1所述的显示装置，其特征在于，所述子像素驱动电路包括第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和存储电容，所述第一晶体管的栅极和所述第二晶体管的第一电极连接第一节点，所述第一晶体管的第一电极接入高电位电压线，所述第一晶体管的第二电极、所述第三晶体管的第一电极、所述第四晶体管的第一电极以及所述第五晶体管的第一电极连接第二节点，所述第二晶体管的栅极接入第一扫描线，所述第二晶体管的第二电极接入数据线，所述第三晶体管的栅极接入第二扫描线，所述第四晶体管的栅极接入第三扫描线，所述第五晶体管的栅极接入第四扫描线，所述第三晶体管的第二电极和所述第四晶体管的第二电极接入参数电压线，所述第五晶体管的第二电极连接发光器件，所述存储电容的第一极板连接所述第一节点，所述存储电容的第二极板连接所述第二节点，所述驱动晶体管为所述第一晶体管。
- 一种显示装置驱动方法，所述显示装置包括显示面板以及驱动芯片，所述显示面板包括在显示区内阵列排布的子像素驱动电路，所述子像素驱动电路包括驱动晶体管，其特征在于，所述显示装置驱动方法包括：所述驱动芯片在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成；所述驱动芯片在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作；所述驱动芯片在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成。
- 如权利要求8所述的显示装置驱动方法，其特征在于，所述驱动周期包括第一至第六时间段，其中：所述驱动芯片在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿；所述驱动芯片在第四时间段内通过所述驱动晶体管驱动所述显示面板工作；所述驱动芯片在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
- 如权利要求9所述的显示装置驱动方法，其特征在于，所述驱动芯片在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿包括：在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求10所述的显示装置驱动方法，其特征在于，所述驱动芯片在第四时间段内通过所述驱动晶体管驱动所述显示面板工作包括：在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求11所述的显示装置驱动方法，其特征在于，所述驱动芯片在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿包括：在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求9所述的显示装置驱动方法，其特征在于，所述第一时间段至所述第四时间段属于连续两个显示帧中前一个显示帧，所述第五时间段和所述第六时间段属于所述连续两个显示帧中后一个显示帧。
- 如权利要求8所述的显示装置驱动方法，其特征在于，所述子像素驱动电路包括第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和存储电容，所述第一晶体管的栅极和所述第二晶体管的第一电极连接第一节点，所述第一晶体管的第一电极接入高电位电压线，所述第一晶体管的第二电极、所述第三晶体管的第一电极、所述第四晶体管的第一电极以及所述第五晶体管的第一电极连接第二节点，所述第二晶体管的栅极接入第一扫描线，所述第二晶体管的第二电极接入数据线，所述第三晶体管的栅极接入第二扫描线，所述第四晶体管的栅极接入第三扫描线，所述第五晶体管的栅极接入第四扫描线，所述第三晶体管的第二电极和所述第四晶体管的第二电极接入参数电压线，所述第五晶体管的第二电极连接发光器件，所述存储电容的第一极板连接所述第一节点，所述存储电容的第二极板连接所述第二节点，所述驱动晶体管为所述第一晶体管。
- 一种显示装置，其特征在于，包括：显示面板，包括在显示区内阵列排布的子像素驱动电路，所述子像素驱动电路包括驱动晶体管；驱动芯片，用于在驱动周期的内部补偿时段对所述驱动晶体管的第一阈值电压漂移进行补偿，在所述驱动周期的显示时段通过所述驱动晶体管驱动所述显示面板工作，在所述驱动周期的反向补偿时段对所述驱动晶体管的第二阈值电压漂移进行补偿，所述第一阈值电压漂移由所述驱动晶体管的栅偏压形成，所述第二阈值电压漂移由所述驱动晶体管的正向电流形成；其中，所述子像素驱动电路包括第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管和存储电容，所述第一晶体管的栅极和所述第二晶体管的第一电极连接第一节点，所述第一晶体管的第一电极接入高电位电压线，所述第一晶体管的第二电极、所述第三晶体管的第一电极、所述第四晶体管的第一电极以及所述第五晶体管的第一电极连接第二节点，所述第二晶体管的栅极接入第一扫描线，所述第二晶体管的第二电极接入数据线，所述第三晶体管的栅极接入第二扫描线，所述第四晶体管的栅极接入第三扫描线，所述第五晶体管的栅极接入第四扫描线，所述第三晶体管的第二电极和所述第四晶体管的第二电极接入参数电压线，所述第五晶体管的第二电极连接发光器件，所述存储电容的第一极板连接所述第一节点，所述存储电容的第二极板连接所述第二节点，所述驱动晶体管为所述第一晶体管；所述驱动周期包括第一至第六时间段，所述驱动芯片用于在第一至第三时间段内对所述驱动晶体管的第一阈值电压漂移进行补偿，在第四时间段内通过所述驱动晶体管驱动所述显示面板工作，在第五至第六时间段内对所述驱动晶体管的第二阈值电压漂移进行补偿。
- 如权利要求15所述的显示装置，其特征在于，所述驱动芯片用于：在第一时间段内，向所述驱动晶体管的栅极输入补偿电压，向所述驱动晶体管的第一电极输入高电位电压，向所述驱动晶体管的第二电极输入参考电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第二时间段内，停止向所述驱动晶体管的栅极输入补偿电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第三时间段内，停止向所述驱动晶体管的栅极输入驱动电压，持续向所述驱动晶体管的第一电极输入所述高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求16所述的显示装置，其特征在于，所述驱动芯片用于：在第四时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，打通所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求17所述的显示装置，其特征在于，所述驱动芯片用于：在第五时间段内，向所述驱动晶体管的栅极输入驱动电压，向所述驱动晶体管的第一电极输入低电位电压，向所述驱动晶体管的第二电极输入高电位电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路；在第六时间段内，停止向所述驱动晶体管的栅极输入电压，向所述驱动晶体管的第一电极输入高电位电压，停止向所述驱动晶体管的第二电极输入电压，中断所述驱动晶体管的第二电极和像素电极之间的导电通路。
- 如权利要求15所述的显示装置，其特征在于，所述第一时间段至所述第四时间段属于连续两个显示帧中前一个显示帧，所述第五时间段和所述第六时间段属于所述连续两个显示帧中后一个显示帧。
- 如权利要求15所述的显示装置，其特征在于，所述显示装置为液晶显示装置或OLED显示装置。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011605739.7 | 2020-12-30 | ||
| CN202011605739.7A CN112581900B (zh) | 2020-12-30 | 2020-12-30 | 显示装置以及驱动方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2022141527A1 true WO2022141527A1 (zh) | 2022-07-07 |
Family
ID=75144242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2020/142426 WO2022141527A1 (zh) | 2020-12-30 | 2020-12-31 | 显示装置以及驱动方法 |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN112581900B (zh) |
| WO (1) | WO2022141527A1 (zh) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150243222A1 (en) * | 2009-08-03 | 2015-08-27 | Samsung Display Co., Ltd. | Organic light emitting display and driving method thereof |
| CN108091302A (zh) * | 2016-11-21 | 2018-05-29 | 乐金显示有限公司 | 显示装置 |
| CN111312160A (zh) * | 2020-03-31 | 2020-06-19 | 深圳市华星光电半导体显示技术有限公司 | 像素驱动电路及显示面板 |
| CN111402789A (zh) * | 2020-04-08 | 2020-07-10 | 深圳市华星光电半导体显示技术有限公司 | 像素驱动电路和显示面板 |
| CN111653240A (zh) * | 2020-06-30 | 2020-09-11 | 京东方科技集团股份有限公司 | 像素驱动电路及其驱动方法、显示面板及其驱动方法 |
-
2020
- 2020-12-30 CN CN202011605739.7A patent/CN112581900B/zh active Active
- 2020-12-31 WO PCT/CN2020/142426 patent/WO2022141527A1/zh active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150243222A1 (en) * | 2009-08-03 | 2015-08-27 | Samsung Display Co., Ltd. | Organic light emitting display and driving method thereof |
| CN108091302A (zh) * | 2016-11-21 | 2018-05-29 | 乐金显示有限公司 | 显示装置 |
| CN111312160A (zh) * | 2020-03-31 | 2020-06-19 | 深圳市华星光电半导体显示技术有限公司 | 像素驱动电路及显示面板 |
| CN111402789A (zh) * | 2020-04-08 | 2020-07-10 | 深圳市华星光电半导体显示技术有限公司 | 像素驱动电路和显示面板 |
| CN111653240A (zh) * | 2020-06-30 | 2020-09-11 | 京东方科技集团股份有限公司 | 像素驱动电路及其驱动方法、显示面板及其驱动方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112581900B (zh) | 2021-12-28 |
| CN112581900A (zh) | 2021-03-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2016145693A1 (zh) | Amoled像素驱动电路及像素驱动方法 | |
| WO2020062802A1 (zh) | 显示面板及像素电路的驱动方法 | |
| JP6474911B2 (ja) | 画素回路、有機エレクトロルミネセンス表示パネル、表示装置及びその駆動方法 | |
| US9886898B2 (en) | Pixel driving circuit, driving method for pixel driving circuit and display device | |
| JP4398413B2 (ja) | スレッショルド電圧の補償を備えた画素駆動回路 | |
| US10733933B2 (en) | Pixel driving circuit and driving method thereof, display panel and display device | |
| WO2020233491A1 (zh) | 像素电路及其驱动方法、阵列基板及显示装置 | |
| CN100561556C (zh) | 像素电路、显示装置以及控制像素电路的方法 | |
| WO2018000982A1 (zh) | 像素电路及驱动方法和显示设备 | |
| WO2016155053A1 (zh) | Amoled像素驱动电路及像素驱动方法 | |
| WO2016173124A1 (zh) | 像素电路、其驱动方法及相关装置 | |
| WO2017031909A1 (zh) | 像素电路及其驱动方法、阵列基板、显示面板及显示装置 | |
| KR101298302B1 (ko) | 유기 발광다이오드 표시장치와 그의 구동방법 | |
| US6693383B2 (en) | Electro-luminescence panel | |
| WO2018049866A1 (zh) | 像素驱动电路及像素驱动方法、阵列基板以及显示装置 | |
| WO2017024754A1 (zh) | 像素电路及其驱动方法、阵列基板、显示装置 | |
| WO2020215884A1 (zh) | 像素驱动电路及其驱动方法、显示面板和显示装置 | |
| US9589528B2 (en) | Display device | |
| US12014692B2 (en) | Display driving module, method for driving the same and display device | |
| WO2020062813A1 (zh) | 像素电路、其驱动方法及显示装置 | |
| JP5685747B2 (ja) | アクティブマトリクス型表示装置 | |
| WO2021046999A1 (zh) | 一种oled像素补偿电路及像素补偿方法 | |
| WO2021077487A1 (zh) | 像素单元及显示面板 | |
| WO2023115533A1 (zh) | 像素电路以及显示面板 | |
| US10510297B2 (en) | Pixel circuit, driving method thereof, display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 20967865 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 20967865 Country of ref document: EP Kind code of ref document: A1 |