WO2017024754A1 - 像素电路及其驱动方法、阵列基板、显示装置 - Google Patents

像素电路及其驱动方法、阵列基板、显示装置 Download PDF

Info

Publication number
WO2017024754A1
WO2017024754A1 PCT/CN2016/070105 CN2016070105W WO2017024754A1 WO 2017024754 A1 WO2017024754 A1 WO 2017024754A1 CN 2016070105 W CN2016070105 W CN 2016070105W WO 2017024754 A1 WO2017024754 A1 WO 2017024754A1
Authority
WO
WIPO (PCT)
Prior art keywords
module
switching transistor
driving
compensation
pixel circuit
Prior art date
Application number
PCT/CN2016/070105
Other languages
English (en)
French (fr)
Inventor
胡祖权
Original Assignee
京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 合肥鑫晟光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/123,426 priority Critical patent/US10008153B2/en
Publication of WO2017024754A1 publication Critical patent/WO2017024754A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel circuit and a driving method thereof, an array substrate including the pixel circuit, and a display device including the array substrate.
  • AMOLED Active Matrix Organic Light Emitting Diode
  • the circuit diagram includes a thin film transistor T D and a thin film transistor T S , a storage capacitor C, and an OLED.
  • the gate of the thin film transistor T S is connected to the scanning signal line Vscan, the drain is connected to the data signal input terminal Vdata, and the source is connected to the gate of the thin film transistor T D .
  • the drain of the thin film transistor T D is connected to the cathode of the OLED, the source is connected to the second power source ELVss, and the second power source ELVss is at a low level.
  • Both ends of the storage capacitor C are connected between the gate and the source of the thin film transistor T D .
  • the anode of the OLED is connected to the third power source ELVdd, and the third power source ELVdd is at a high level.
  • the thin film transistor T D and the thin film transistor T S may both be N-type thin film transistors.
  • FIG. 2 is a driving timing diagram of the pixel structure of FIG. 1.
  • the scanning signal line Vscan is at a high level, so the thin film transistor T S is turned on, and the data signal input terminal is at this time.
  • high Vdata is written to the storage capacitor C and a gate of the thin film transistor T D, the thin film transistor T D is turned on, then the cathode of the OLED is connected to a second power source ELVss, work began emitting OLED; at time t2, the scanning The signal line Vscan is at a low level, so the thin film transistor T S is turned off.
  • the gate of the thin film transistor T D will maintain a high level state, the thin film transistor T D continues to be turned on, and the OLED continues.
  • the illumination state of the OLED may change.
  • the thin film transistor T S controls the writing of the voltage signal input terminal Vdata, and thus is generally referred to as a switching transistor
  • the thin film transistor T D controls the operating state of the OLED, and thus is generally referred to as a driving transistor
  • the storage capacitor C is mainly The voltage is maintained.
  • the threshold voltage Vth of the driving transistor T D drifts as the display time of the panel increases, and the luminance of the OLED is closely related to the threshold voltage Vth of the driving transistor T D , and therefore, the driving The variation of the threshold voltage Vth of the transistor T D has a considerable influence on the luminance of the OLED. Specifically, the variation of the threshold voltage Vth of the driving transistor T D affects the luminance uniformity of the OLED. In addition, in the light-emitting holding phase of the AMOLED display panel, the leakage of the switching transistor T S also causes a change in the driving voltage of the gate of the driving transistor T D , resulting in uneven illumination of the AMOLED display panel.
  • the present invention is directed to the problem that the threshold voltage variation of the driving transistor in the prior art affects the brightness uniformity of the OLED and the leakage of the switching transistor causes the driving voltage of the gate of the driving transistor T D to cause uneven illumination of the AMOLED display panel, and provides a pixel circuit. And a driving method thereof, an array substrate including the pixel circuit, and a display device including the array substrate.
  • the technical solution adopted to solve the technical problem of the present invention is a pixel circuit, comprising: a working unit, a storage module, a driving module, a compensation module and a control module, the driving module and the control module, the compensation module and the
  • the storage module is connected, the control module is further connected to the working unit, the compensation module, the storage module and the signal input end, the compensation module is further connected to the storage module, the first power source and the data signal input end Connecting, the storage module is further connected to the signal input end, and the working unit is further connected to the third power source; in the initialization phase, the compensation module and the driving module are initialized under the control of the first power source; In number According to the writing and charging phase, the data signal input terminal charges the storage module through the compensation module and the driving module, so that a threshold voltage corresponding to the driving module is input to a voltage difference between the two ends of the storage module.
  • the control module is turned on, and the storage module discharges the working unit through the driving module to operate the working unit, and compensates
  • the storage module includes a storage capacitor, one end of the storage capacitor is connected to the signal input terminal and the control module via a first node, and the other end of the storage capacitor is connected to the drive module via a second node Connected to the compensation module.
  • the driving module includes a first switching transistor; a gate of the first switching transistor is connected to the compensation module and the memory module via a second node, and a source of the first switching transistor is via a fourth A node is connected to the control module and the compensation module, and a drain of the first switching transistor is connected to the compensation module and the control module via a third node.
  • the compensation module includes: a second switching transistor, a fifth switching transistor, a sixth switching transistor, a first scan line and a third scan line; a gate of the second switching transistor is connected to the first scan line a drain of the second switching transistor is connected to the data signal input end, a source of the second switching transistor is connected to the driving module and the control module via a third node; a gate is connected to the first scan line, a source of the fifth switch transistor is connected to the driving module and the control module via a fourth node, and a drain of the fifth switching transistor is connected to a second node a driving module is connected to the memory module; a gate of the sixth switching transistor is connected to the third scan line, and a source of the sixth switching transistor is connected to the memory module and the driving module via a second node Connected, the drain of the sixth switching transistor is connected to the first power source.
  • the control module includes a third switching transistor, a fourth switching transistor and a second scan line; a gate of the third switching transistor is connected to the second scan line, and a source of the third switching transistor is via a first node is connected to the storage module and the signal input end, and a drain of the third switching transistor is connected to a fourth node Connected to the driving module and the compensation module; the gate of the fourth switching transistor is connected to the second scan line, the drain of the fourth switching transistor is connected to the working unit, and the fourth switching transistor The source is connected to the compensation module and the drive module via a third node.
  • the working unit comprises an OLED.
  • the size of the fifth switching transistor is the same as the size of the sixth switching transistor.
  • the voltage ELVd 2 (Vdata+Vth)-ELVss of the first power source, wherein the Vdata is a voltage of the input end of the data signal, the Vth is a threshold voltage of the driving module, and the ELVss Is the voltage at the input of the signal.
  • the present invention further provides a driving method of a pixel circuit, the pixel circuit comprising: a working unit, a storage module, a driving module, a compensation module, and a control module, the driving module and the control module, the The compensation module is connected to the storage module, the control module is further connected to the working unit, the compensation module, the storage module and the signal input end, and the compensation module is further connected to the storage module and the first power supply And the data signal input end, the storage module is further connected to the signal input end, the working unit is further connected to the third power source; the driving method comprises: in the initialization phase, the compensation module and the driving module Initializing under the control of the first power source; in the data writing and charging phase, the data signal input terminal charges the storage module through the compensation module and the driving module, so as to correspond to the driving module The threshold voltage is input to a voltage difference across the memory module; in the working phase, the control module is turned on, and the Module by the drive module to discharge the working unit to make the working unit of work, and
  • the driving module includes a first switching transistor
  • the compensation module includes a sixth switching transistor and a third scan line
  • the step of initializing the compensation module and the driving module under the control of the first power source includes: the sixth switching transistor is turned on under the control of a third scan signal output by the third scan line; and the first power source is turned on to the first through the sixth switch transistor that is turned on The off transistor outputs a first supply voltage to turn the first switching transistor on.
  • the voltage ELVd 2 (Vdata+Vth)-ELVss of the first power source, wherein the Vdata is a voltage of a data signal input end, the Vth is a threshold voltage of the first switching transistor, the ELVss Is the voltage at the signal input.
  • the compensation module comprises a first scan line, a second switching transistor and a fifth switching transistor
  • the driving module comprises a first switching transistor
  • the data signal input end is passed through the compensation module and the driving module
  • the storage module is charged such that a threshold voltage corresponding to the driving module is input to a voltage difference across the storage module, the second switching transistor and the fifth switching transistor are output at the first scan line Turning on the control of the first scan signal;
  • the data signal input terminal outputs a data signal input terminal voltage to the first switching transistor through the turned-on second switching transistor and the fifth switching transistor;
  • a switching transistor charges the memory module such that a threshold voltage of the first switching transistor is input to a voltage difference across the memory module.
  • the control module includes a second scan line, a third switching transistor and a fourth switching transistor
  • the driving module includes a first switching transistor
  • the control module is turned on
  • the memory module passes through the driving module
  • the step of discharging the working unit includes: the third switching transistor and the fourth switching transistor being turned on under control of a second scan signal output by the second scan line; and the first switch of the memory module being turned on A transistor, the third switching transistor, and the fourth switching transistor are discharged to the working unit to operate the working unit.
  • the present invention provides an array substrate including any one of the above pixel circuits.
  • the present invention provides a display device including the above array substrate.
  • the pixel circuit of the present invention comprises a working unit, a storage module, a driving module, a compensation module and a control module.
  • the threshold voltage of the driving module can be compensated for as the display time of the panel increases, thereby being effective Ground compensation of the threshold voltage non-uniformity of the driving module, so that the brightness of the AMOLED display panel is independent of the threshold voltage of the driving module; meanwhile, by compensating the switching transistor
  • the change of the gate voltage of the driving module caused by the leakage current improves the uniformity of the illumination of the AMOLED display panel and the display quality as a whole, so that the uniformity of the picture of the organic light emitting display is improved.
  • 1 is a circuit diagram of a conventional pixel circuit.
  • FIG. 2 is a timing diagram of the pixel circuit of FIG. 1.
  • FIG. 3 is a block diagram showing the structure of a pixel circuit according to Embodiment 1 of the present invention.
  • FIG. 4 is a circuit diagram of a pixel circuit according to Embodiment 2 of the present invention.
  • FIG. 5 is a timing diagram of the pixel circuit of FIG. 4.
  • FIG. 3 is a structural block diagram of a pixel circuit according to an embodiment of the present invention.
  • the embodiment provides a pixel circuit, including: a working unit 11, a storage module 12, a driving module 13, a compensation module 14, and a control module 15.
  • the drive module 13 is connected to the control module 15, the compensation module 14, and the storage module 12.
  • the control module 15 is connected to the working unit 11, the compensation module 14, the drive module 13, the storage module 12, and the signal input terminal ELVss (shown as a second power source).
  • the compensation module 14 is connected to the control module 15, the drive module 13, the storage module 12, and the first power source ELVd.
  • the storage module 12 is connected to the compensation module 14, the drive module 13, the control module 15, and the signal input terminal ELVss.
  • the working unit 11 is connected to the control module 15 and the third power source ELVdd.
  • the working process of the pixel circuit of this embodiment can be divided into three phases: an initialization phase, a data writing and charging phase, and a working phase.
  • the compensation module 14 and the drive module 13 are initialized under the control of the first power source ELVd.
  • the data signal input passes through the compensation module 14 and The drive module 13 charges the memory module 12 such that a threshold voltage corresponding to the drive module 13 is input to a voltage difference across the memory module 12.
  • control module 15 is turned on, and the memory module 12 is discharged to the working unit 11 through the driving module 13 to operate the working unit 11, and compensates for the influence of the threshold voltage drift corresponding to the driving module 13 on the performance of the working unit 11.
  • the pixel circuit of the embodiment of the present invention includes a working unit 11, a storage module 12, a driving module 13, a compensation module 14, and a control module 15, in which the threshold voltage of the driving module 13 occurs as the display time of the panel increases.
  • the drift can be compensated so that the non-uniformity of the threshold voltage of the driving module 13 can be effectively compensated so that the AMOLED luminance is independent of the threshold voltage of the driving module 13.
  • FIG. 4 is a circuit diagram of a pixel circuit according to the present embodiment. As shown in FIG. 4, this embodiment provides a specific circuit structure of the pixel circuit of FIG.
  • the memory module 12 may include a storage capacitor C; the driving module 13 may include a first switching transistor T1; and the compensation module 14 may include a second switching transistor T2, a fifth switching transistor T5, and a sixth switch.
  • control module 15 is connected to the storage module 12 and the signal input terminal ELVss via the first node N1, and the drive module 13 is connected to the compensation module 14 and the storage module 12 via the second node N2, and the drive module 13 is connected to the storage module 13 via the third node N3.
  • the compensation module 14 is connected to the control module 15, and the control module 15 is connected to the drive module 13 and the compensation module 14 via the fourth node N4.
  • the gate of the first switching transistor T1 is connected to the second node N2, the source of the first switching transistor T1 is connected to the drain of the third switching transistor T3, the drain of the first switching transistor T1 is connected to the third node N3; the second switching transistor The gate of T2 is connected to the first scan line S1, the drain of the second switch transistor T2 is connected to the data signal input terminal Vdata, the source of the second switching transistor T2 is connected to the third node N3, and the third switching transistor T3 The gate is connected to the second scan line S2, the source of the third switching transistor T3 is connected to the first node N1, the drain of the third switching transistor T3 is connected to the source of the first switching transistor T1; the gate of the fourth switching transistor T4 Connected to the second scan line S2, the drain of the fourth switching transistor T4 is connected to the OLED, the source of the fourth switching transistor T4 is connected to the third node N3; the gate of the fifth switching transistor T5 is connected to the first scan line S1, the fifth switch The source of the transistor T5
  • the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, the fourth switching transistor T4, the fifth switching transistor T5, and the sixth switching transistor T6 are N-type thin film transistors.
  • the working process of the pixel circuit will be specifically described below in conjunction with the pixel circuit shown in FIG. 4 and the timing chart shown in FIG. 5.
  • the working process is divided into three phases: an initialization phase, a data writing and charging phase, and a working phase.
  • the first stage is an initialization stage t1.
  • the first scan signal output by the first scan line S1, the second scan signal output by the second scan line S2, and the data signal input terminal voltage Vdata are both The low level
  • the third scan signal outputted by the third scan line S3 is at a high level.
  • the sixth switching transistor T6 is turned on under the control of the high-level third scanning signal output from the third scanning line S3.
  • the first power source ELVd outputs a first voltage of a high level to the gate of the first switching transistor T1 such that the first switching transistor T1 is in an on state.
  • the second switching transistor T2, the third switching transistor T3, the fourth switching transistor T4, and the fifth switching transistor T5 output low level of the first scan signal and the second scan line S2 outputted at the first scan line S1.
  • the second scanning signal of the level is turned off under the control of the second scanning signal, so the working unit OLED is in an inoperative state.
  • the second stage is a data writing and charging phase t2.
  • the first scan signal outputted by the first scan line S1 and the data signal input terminal voltage Vdata are both high level, and the second scan line
  • the second scan signal output by S2 and the third scan signal output by the third scan line S3 are both low.
  • the second switching transistor T2 and the fifth switching transistor T5 are turned on under the control of the high level first scan signal outputted by the first scan line S1, and the third switching transistor T3, the fourth switching transistor T4, and the sixth switching transistor T6 are The second scan signal of the low level output by the second scan line S2 and the third scan signal of the low level output by the third scan line S3 are both turned off.
  • the data signal input terminal voltage Vdata will be input to the drain of the first switching transistor T1 through the second switching transistor T2, which is known by the t1 phase, and the first switching transistor T1 is turned on under the action of the first voltage.
  • the five-switch transistor T5 is turned on, so that the gate of the first switching transistor T1 is connected to the source, which forms a diode-like circuit.
  • the third stage is a working stage.
  • the first scan signal output by the first scan line S1, the third scan signal output by the third scan line S3, and the data signal input terminal voltage Vdata are both low.
  • the level, the second scan signal output by the second scan line S2 is at a high level.
  • the third switching transistor T3 and the fourth switching transistor T4 are turned on under the control of the high level second scan signal outputted by the second scan line S2, and the second switching transistor T2, the fifth switching transistor T5, and the sixth switching transistor T6 Both of the first scan signal of the low level output by the first scan line S1 and the third scan signal of the low level output by the third scan line S3 are turned off.
  • the voltage in the storage capacitor C can pass through the first switching transistor T1, the third switching transistor T3, and the fourth switching transistor. T4 discharges to work unit 11 to make work Unit 11 works.
  • the current flowing through the first switching transistor T1 can be expressed by the following formula:
  • I K(Vgs-Vth) 2 /(1).
  • K 1/2 * ⁇ * Cox * W / L, which is a constant associated with the transistor.
  • the gate-source voltage of the first switching transistor T1 is maintained at the value at the end of the previous t2 phase, ie,
  • the first switching transistor T1 since the value obtained by subtracting the threshold voltage Vth from the gate-source voltage Vgs of the first switching transistor T1 is less than or equal to the drain-source voltage Vds of T1, that is, Vgs ⁇ Vth ⁇ Vds, the first switching transistor T1 is in a saturated on state. .
  • the current value flowing through the first switching transistor T1 is independent of the change of the threshold voltage, that is, the threshold voltage of the first switching transistor T1 drifts even after a long period of use.
  • the current of the first switching transistor T1 is also not affected as a result of this, which guarantees the quality of operation of the working unit 11.
  • the pixel circuit can effectively compensate the non-uniformity of the threshold voltage of the first switching transistor T1, so that the uniformity of the screen of the display device is improved without Threshold voltage compensation is performed by means of an external compensation circuit, thereby reducing development and manufacturing costs.
  • the timing of the pixel circuit is simple and easy to implement.
  • the fifth switching transistor T5 and the sixth switching transistor T6 are the same size.
  • the reason for this is that if the fifth switching transistor T5 is leaked, the gate voltage of the first switching transistor T1 is changed in the subsequent continuous operation phase, and therefore, in order to maintain the voltage value of the input data signal input terminal voltage Vdata, The leakage current can be compensated by the first voltage output by the first power source ELVd.
  • the specific method is: in the process of preparing the fifth switching transistor T5 and the sixth switching transistor T6, the sizes of the fifth switching transistor T5 and the sixth switching transistor T6 are designed to be the same size, and at the same time, in the working phase of the subsequent working unit 11, The first power ELVd phase
  • the voltage difference for the second node N2 is designed to be equal to the voltage difference of the second node N2 with respect to the fourth node N4.
  • the leakage current of the switching transistor T6 is compensated, thereby improving the uniformity of the illumination of the AMOLED display panel and the display quality as a whole, so that the picture uniformity of the organic light emitting display is improved.
  • the working unit 11 in this embodiment is not limited to the OLED, and other devices are also applicable to the embodiment, and details are not described herein again.
  • the pixel circuit of this embodiment includes a working unit 11, a storage module 12, a driving module 13, a compensation module 14, and a control module 15, in which the threshold voltage of the driving module 13 drifts as the display time of the panel increases. Compensation can be obtained, so that the unevenness of the threshold voltage of the driving module 13 can be effectively compensated, so that the luminance of the AMOLED display panel is independent of the threshold voltage of the driving module 13; meanwhile, by compensating for the leakage of the switching transistor (the fifth switching transistor T5) The current causes a change in the gate voltage of the driving module 13 (the first switching transistor T1), which improves the uniformity of the illumination of the AMOLED display panel and the display quality as a whole, so that the picture uniformity of the organic light emitting display is improved.
  • the embodiment provides a driving method of a pixel circuit.
  • the pixel circuit includes: a working unit 11, a storage module 12, a driving module 13, a compensation module 14, and a control module 15, and the driving module 13 and The control module 15 and the compensation module 14 are connected to the storage module 12.
  • the control module 15 is connected to the working unit 11, the compensation module 14, the driving module 13, the storage module 12, and the signal input terminal ELVss.
  • the compensation module 14 and the control module 15 and the driving module 13 are connected.
  • the storage module 12 is connected to the first power source ELVd, and the storage module 12 is connected to the compensation module 14, the drive module 13, the control module 15 and the signal input terminal ELVss, and the working unit 11 is connected to the control module 15 and the third power source ELVdd, and the drive
  • the method includes: an initialization phase, the compensation module 14 and the driving module 13 are initialized under the control of the first power source; during the data writing and charging phase, the data signal input terminal passes through the compensation module 14 and the driving module 13 to the storage module 12 charging, so that the threshold voltage corresponding to the driving module 13 is input to the voltage difference between the two ends of the storage module 12; in the working phase, the control module 15 is turned on, and the storage module 12 is discharged to the working unit 11 through the driving module 13 to operate the working unit 11 The effect of the threshold voltage drift corresponding to the driving module 13 on the performance of the working unit 11 is compensated.
  • the memory module 12 includes a storage capacitor; the driving module 13 includes a first switching transistor T1, the compensation module 14 includes a sixth switching transistor T6 and a third scan line S3; and the compensation module 14 and the driving module 13 are under the control of the first power source ELVd
  • the step of performing initialization includes: the sixth switching transistor T6 is turned on under the control of the third scan signal outputted by the third scan line S3; the first power source ELVd outputs the first voltage to the first switching transistor T1 through the turned-on sixth switching transistor T6. So that the first switching transistor T1 is turned on.
  • the compensation module 14 includes a first scan line S1, a second switching transistor T2, and a fifth switching transistor T5.
  • the driving module 13 includes a first switching transistor T1.
  • the data signal input terminal passes through the compensation module 14 and the driving module 13 to the memory module 12.
  • Charging such that the threshold voltage corresponding to the driving module 13 is input to the voltage difference across the memory module 12 includes: control of the first scan signal output by the second switching transistor T2 and the fifth switching transistor T5 at the first scan line S1 Turning on; the data signal input terminal outputs a data signal input terminal voltage Vdata to the first switching transistor T1 through the turned-on second switching transistor T2 and the fifth switching transistor T5; the first switching transistor T1 charges the storage capacitor C, so that the first switch The threshold voltage of the transistor T1 is input to the voltage difference across the storage capacitor C.
  • control module 15 includes a second scan line S2, a third switching transistor T3, and a fourth switching transistor T4, the driving module 13 includes a first switching transistor T1; and the second scanning signal output by the control module 15 at the second scanning line S2 Controlled to be turned on, the step of discharging the memory module 12 to the working unit 11 through the driving module 13 includes: the third switching transistor T3 and the fourth switching transistor T4 are turned on under the control of the second scanning signal outputted by the second scanning line S2; the storage capacitor C discharges to the working unit 11 through the turned-on first switching transistor T1, third switching transistor T3, and fourth switching transistor T4 to operate the working unit 11.
  • the voltage of the first power source ELVd 2 (Vdata+Vth)-ELVss, where Vdata is the data signal input terminal voltage, Vth is the threshold voltage of the first switching transistor T1, and ELVss is the signal input terminal voltage.
  • the pixel circuit used in this embodiment includes a working unit 11, a storage module 12, a driving module 13, a compensation module 14, and a control module 15.
  • the driving of the pixel circuit by the driving method of the embodiment can compensate the threshold voltage of the driving module 13 with
  • the panel displays the drift caused by the increase of time, so that the unevenness of the threshold voltage of the driving module 13 can be effectively compensated, so that the luminance of the AMOLED is independent of the threshold voltage of the driving module 13; meanwhile, by compensating for the leakage current of the switching transistor
  • the gate voltage variation of the driving module 13 improves the uniformity of the AMOLED light emission and the display quality as a whole, so that the picture uniformity of the organic light emitting display is improved.
  • the driving method of the pixel circuit provided in this embodiment is simple and easy to implement, so the applicability is wider.
  • This embodiment provides an array substrate including the pixel circuit in Embodiment 2.
  • the drift of the threshold voltage of the driving module 13 with the increase of the panel display time can be compensated, so that the threshold voltage non-uniformity of the driving module 13 can be effectively compensated.
  • the brightness of the AMOLED light is made independent of the threshold voltage of the driving module 13; at the same time, by adjusting the gate voltage variation of the driving module 13 caused by the leakage current of the switching transistor, the uniformity and display quality of the AMOLED light emission are improved as a whole, so that the organic light emitting display The uniformity of the picture is improved, so that the performance of the array substrate in this embodiment is more stable.
  • the embodiment provides a display device, which includes an array substrate, which is described in Embodiment 4 and is not described in detail herein.
  • the display device in this embodiment may include: an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc. Any product or part that has a display function.
  • the display device has the above array substrate, the screen uniformity of the display device of the present embodiment is remarkably improved.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种像素电路及其驱动方法、阵列基板、显示装置。所述像素电路包括：工作单元（11）、存储模块（12）、驱动模块（13）、补偿模块（14）和控制模块（15）；在初始化阶段（t1），补偿模块（14）和驱动模块（13）在第一电源（ELVd）的控制下进行初始化；在数据写入及充电阶段（t2），数据信号输入端（Vdata）通过补偿模块（14）和驱动模块（13）向存储模块（12）充电，使得与驱动模块（13）对应的阈值电压（Vth）输入到存储模块（12）两端的电压差中；在工作阶段（t3），控制模块（15）开启，存储模块（12）通过驱动模块（13）向工作单元（11）放电以使工作单元（11）发光，并补偿与驱动模块（13）对应的阈值电压（Vth）漂移对工作单元（11）性能的影响。

Description

像素电路及其驱动方法、阵列基板、显示装置 技术领域
本发明属于显示技术领域，具体涉及像素电路及其驱动方法、包括所述像素电路的阵列基板和包括所述阵列基板的显示装置。
背景技术
随着显示技术的进步，越来越多的有源矩阵有机发光二极管(Active Matrix Organic Light Emitting Diode,AMOLED)显示面板进入市场。相对于传统的薄膜晶体管液晶显示面板(Thin Film Transistor Liquid Crystal Display,TFT LCD)，AMOLED显示面板具有更快的反应速度，更高的对比度以及更广阔的视角。因此，AMOLED越来越多地受到面板厂商的重视。
图1为现有的AMOLED显示面板中的像素结构的电路图，从图1中可以看出，该电路图包括薄膜晶体管TD和薄膜晶体管TS、存储电容器C以及OLED。薄膜晶体管TS的栅极与扫描信号线Vscan相连，漏极与数据信号输入端Vdata相连，源极与薄膜晶体管TD的栅极相连。薄膜晶体管TD的漏极与OLED的阴极相连，源极与第二电源ELVss相连，第二电源ELVss为低电平。存储电容器C的两端跨接在薄膜晶体管TD的栅极与源极之间。OLED的阳极与第三电源ELVdd相连，第三电源ELVdd为高电平。薄膜晶体管TD和薄膜晶体管TS可均为N型薄膜晶体管。
图2为图1中像素结构的驱动时序图，结合图1和图2可以看出，在t1时间段，扫描信号线Vscan处于高电平，因此薄膜晶体管TS开启，这时数据信号输入端Vdata的高电平写入到存储电容器C以及薄膜晶体管TD的栅极，因此薄膜晶体管TD开启，此时OLED的阴极与第二电源ELVss相连，OLED开始工作发光；在t2时间段，扫描信号线Vscan处于低电平，因此薄膜晶体管TS 关断，此时由于存储电容器C的电荷保持作用，薄膜晶体管TD的栅极将维持高电平状态，薄膜晶体管TD继续开启，OLED继续工作，直到后面某个时刻扫描信号线Vscan的高电平信号到来时，OLED的发光状态才可能会改变。由上可知，薄膜晶体管TS控制数据信号输入端电压Vdata的写入，因而通常称为开关晶体管，而薄膜晶体管TD控制OLED的工作状态，因而通常称为驱动晶体管，此外，存储电容器C主要起电压保持作用。
但现有技术中至少存在如下问题：驱动晶体管TD的阈值电压Vth会随着面板显示时间的增长而发生漂移，而OLED的发光亮度与驱动晶体管TD的阈值电压Vth密切相关，因此，驱动晶体管TD的阈值电压Vth变化会对OLED的发光亮度产生相当大的影响，具体地，驱动晶体管TD的阈值电压Vth变化影响OLED的亮度均一性。另外，在AMOLED显示面板的发光保持阶段，开关晶体管TS的漏电也会导致驱动晶体管TD栅极的驱动电压的变化，从而导致AMOLED显示面板发光不均匀。
发明内容
本发明针对现有技术中驱动晶体管的阈值电压变化影响OLED的亮度均一性以及开关晶体管的漏电导致驱动晶体管TD栅极的驱动电压的变化进而导致AMOLED显示面板发光不均匀的问题，提供像素电路及其驱动方法、包括该像素电路的阵列基板、包括该阵列基板的显示装置。
解决本发明技术问题所采用的技术方案是一种像素电路，其包括：工作单元、存储模块、驱动模块、补偿模块和控制模块，所述驱动模块与所述控制模块、所述补偿模块和所述存储模块连接，所述控制模块还与所述工作单元、所述补偿模块、所述存储模块和信号输入端连接，所述补偿模块还与所述存储模块、第一电源和数据信号输入端连接，所述存储模块还所述信号输入端相连，所述工作单元还与第三电源连接；在初始化阶段，所述补偿模块和所述驱动模块在所述第一电源的控制下进行初始化；在数 据写入及充电阶段，所述数据信号输入端通过所述补偿模块和所述驱动模块向所述存储模块充电，使得与所述驱动模块对应的阈值电压输入到所述存储模块两端的电压差中；在工作阶段，所述控制模块开启，所述存储模块通过所述驱动模块向所述工作单元放电以使所述工作单元工作，并补偿与所述驱动模块对应的阈值电压漂移对所述工作单元性能的影响。
优选地，所述存储模块包括存储电容器，所述存储电容器的一端经由第一节点与所述信号输入端和所述控制模块连接，所述存储电容器的另一端经由第二节点与所述驱动模块和所述补偿模块连接。
优选地，所述驱动模块包括第一开关晶体管；所述第一开关晶体管的栅极经由第二节点与所述补偿模块和所述存储模块连接，所述第一开关晶体管的源极经由第四节点与所述控制模块和所述补偿模块连接，所述第一开关晶体管的漏极经由第三节点与所述补偿模块和所述控制模块连接。
优选地，所述补偿模块包括：第二开关晶体管、第五开关晶体管、第六开关晶体管、第一扫描线和第三扫描线；所述第二开关晶体管的栅极连接所述第一扫描线，所述第二开关晶体管的漏极连接所述数据信号输入端，所述第二开关晶体管的源极经由第三节点与所述驱动模块和所述控制模块连接；所述第五开关晶体管的栅极连接所述第一扫描线，所述第五开关晶体管的源极经由第四节点与所述驱动模块和所述控制模块连接，所述第五开关晶体管的漏极经由第二节点与所述驱动模块和所述存储模块连接；所述第六开关晶体管的栅极连接所述第三扫描线，所述第六开关晶体管的源极经由第二节点与所述存储模块和所述驱动模块连接，所述第六开关晶体管的漏极连接所述第一电源。
优选地，所述控制模块包括第三开关晶体管、第四开关晶体管和第二扫描线；所述第三开关晶体管的栅极连接所述第二扫描线，所述第三开关晶体管的源极经由第一节点与所述存储模块和所述信号输入端连接，所述第三开关晶体管的漏极经由第四节点 与所述驱动模块和所述补偿模块连接；所述第四开关晶体管的栅极连接所述第二扫描线，所述第四开关晶体管的漏极连接所述工作单元，所述第四开关晶体管的源极经由第三节点与所述补偿模块和所述驱动模块连接。
优选地，所述工作单元包括OLED。
优选地，所述第五开关晶体管的尺寸和所述第六开关晶体管的尺寸相同。
优选地，所述第一电源的电压ELVd＝2(Vdata+Vth)-ELVss，其中，所述Vdata为所述数据信号输入端的电压，所述Vth为所述驱动模块的阈值电压，所述ELVss为所述信号输入端的电压。
作为另一技术方案，本发明还提供一种像素电路的驱动方法，所述像素电路包括：工作单元、存储模块、驱动模块、补偿模块和控制模块，所述驱动模块与所述控制模块、所述补偿模块和所述存储模块连接，所述控制模块还与所述工作单元、所述补偿模块、所述存储模块和信号输入端连接，所述补偿模块还与所述存储模块、第一电源和数据信号输入端连接，所述存储模块还与所述信号输入端相连，所述工作单元还与第三电源连接；所述驱动方法包括：在初始化阶段，所述补偿模块和所述驱动模块在所述第一电源的控制下进行初始化；在数据写入及充电阶段，所述数据信号输入端通过所述补偿模块和所述驱动模块向所述存储模块充电，使得与所述驱动模块对应的阈值电压输入到所述存储模块两端的电压差中；在工作阶段，所述控制模块开启，所述存储模块通过所述驱动模块向所述工作单元放电以使所述工作单元工作，并补偿与所述驱动模块对应的阈值电压漂移对所述工作单元性能的影响。
优选地，所述驱动模块包括第一开关晶体管，所述补偿模块包括第六开关晶体管和第三扫描线；所述补偿模块和所述驱动模块在所述第一电源的控制下进行初始化的步骤包括：所述第六开关晶体管在所述第三扫描线输出的第三扫描信号的控制下开启；以及所述第一电源通过开启的所述第六开关晶体管向所述第一开 关晶体管输出第一电源电压，以使所述第一开关晶体管开启。
优选地，所述第一电源的电压ELVd＝2(Vdata+Vth)-ELVss，其中，所述Vdata为数据信号输入端的电压，所述Vth为所述第一开关晶体管的阈值电压，所述ELVss为信号输入端的电压。
优选地，所述补偿模块包括第一扫描线、第二开关晶体管和第五开关晶体管，所述驱动模块包括第一开关晶体管；所述数据信号输入端通过所述补偿模块和所述驱动模块向所述存储模块充电，使得与所述驱动模块对应的阈值电压输入到所述存储模块两端的电压差中的步骤包括：所述第二开关晶体管和第五开关晶体管在所述第一扫描线输出的第一扫描信号的控制下开启；所述数据信号输入端通过开启的所述第二开关晶体管和所述第五开关晶体管向所述第一开关晶体管输出数据信号输入端电压；以及所述第一开关晶体管向所述存储模块充电，使得所述第一开关晶体管的阈值电压输入到所述存储模块两端的电压差中。
优选地，所述控制模块包括第二扫描线、第三开关晶体管和第四开关晶体管，所述驱动模块包括第一开关晶体管；所述控制模块开启，所述存储模块通过所述驱动模块向所述工作单元放电的步骤包括：所述第三开关晶体管和第四开关晶体管在所述第二扫描线输出的第二扫描信号的控制下开启；以及所述存储模块通过开启的所述第一开关晶体管、所述第三开关晶体管和所述第四开关晶体管向所述工作单元放电，以使所述工作单元工作。
作为又一技术方案，本发明提供一种阵列基板，包括上述任意一种像素电路。
作为又一技术方案，本发明提供一种显示装置，包括上述的阵列基板。
本发明的像素电路包括工作单元、存储模块、驱动模块、补偿模块和控制模块，在该像素电路中，驱动模块的阈值电压随着面板显示时间的增长而发生的漂移可得到补偿，从而可以有效地补偿驱动模块的阈值电压的不均匀性，使得AMOLED显示面板发光亮度与驱动模块的阈值电压无关；同时，通过补偿开关晶体管 的漏电流导致的驱动模块的栅极电压变化，从整体上提高AMOLED显示面板发光的均匀性和显示质量，使得有机发光显示器的画面均匀性提高。
附图说明
图1为现有的像素电路的电路图。
图2为图1像素电路的时序图。
图3为本发明的实施例1提供的像素电路的结构框图。
图4为本发明的实施例2提供的像素电路的电路图。
图5为图4像素电路的时序图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1：
图3为本实施例提供的像素电路的结构框图。如图3所示，本实施例提供一种像素电路，包括：工作单元11、存储模块12、驱动模块13、补偿模块14和控制模块15。驱动模块13与控制模块15、补偿模块14和存储模块12连接。控制模块15与工作单元11、补偿模块14、驱动模块13、存储模块12和信号输入端ELVss(图中示为第二电源)连接。补偿模块14与控制模块15、驱动模块13、存储模块12和第一电源ELVd连接。存储模块12与补偿模块14、驱动模块13、控制模块15和信号输入端ELVss相连。工作单元11与控制模块15和第三电源ELVdd连接。
本实施例的像素电路的工作过程可分三个阶段：初始化阶段、数据写入及充电阶段和工作阶段。
在初始化阶段，补偿模块14和驱动模块13在第一电源ELVd的控制下进行初始化。
在数据写入及充电阶段，数据信号输入端通过补偿模块14和 驱动模块13向存储模块12充电，使得与驱动模块13对应的阈值电压输入到存储模块12两端的电压差中。
在工作阶段，控制模块15开启，存储模块12通过驱动模块13向工作单元11放电以使工作单元11工作，并补偿与驱动模块13对应的阈值电压漂移对工作单元11性能的影响。
本发明实施例的像素电路包括工作单元11、存储模块12、驱动模块13、补偿模块14和控制模块15，在该像素电路中，驱动模块13的阈值电压随着面板显示时间的增长而发生的漂移可得到补偿，从而可以有效地补偿驱动模块13的阈值电压的不均匀性，使得AMOLED发光亮度与驱动模块13的阈值电压无关。
实施例2：
图4为根据本实施例的像素电路的电路图。如图4所示，本实施例提供了图3中像素电路的一种具体电路结构。
在本实施例中，参照图4，存储模块12可包括存储电容器C；驱动模块13可包括第一开关晶体管T1；补偿模块14可包括第二开关晶体管T2、第五开关晶体管T5、第六开关晶体管T6、第一扫描线S1和第三扫描线S3；控制模块15可包括第三开关晶体管T3、第四开关晶体管T4和第二扫描线S2；工作单元11可包括OLED。
参照图4，控制模块15经由第一节点N1与存储模块12和信号输入端ELVss连接，驱动模块13经由第二节点N2与补偿模块14和存储模块12连接，驱动模块13经由第三节点N3与补偿模块14和控制模块15连接，控制模块15经由第四节点N4与驱动模块13和补偿模块14连接。
第一开关晶体管T1的栅极连接第二节点N2，第一开关晶体管T1的源极连接第三开关晶体管T3的漏极，第一开关晶体管T1的漏极连接第三节点N3；第二开关晶体管T2的栅极连接第一扫描线S1，第二开关晶体管T2的漏极连接数据信号输入端Vdata，第二开关晶体管T2的源极连接第三节点N3；第三开关晶体管T3 的栅极连接第二扫描线S2，第三开关晶体管T3的源极连接第一节点N1，第三开关晶体管T3的漏极连接第一开关晶体管T1的源极；第四开关晶体管T4的栅极连接第二扫描线S2，第四开关晶体管T4的漏极连接OLED，第四开关晶体管T4的源极连接第三节点N3；第五开关晶体管T5的栅极连接第一扫描线S1，第五开关晶体管T5的源极连接第三开关晶体管T3的漏极，第五开关晶体管T5的漏极连接第二节点N2；第六开关晶体管T6的栅极连接第三扫描线S3，第六开关晶体管T6的源极连接存储电容器C的一端和第二节点N2，第六开关晶体管T6的漏极连接第一电源ELVd；存储电容器C的另一端连接信号输入端ELVss；OLED连接第三电源ELVdd。
例如，第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5和第六开关晶体管T6为N型薄膜晶体管。
下面结合图4所示的像素电路以及图5所示的时序图具体说明该像素电路的工作过程，该工作过程分3个阶段：初始化阶段、数据写入及充电阶段、工作阶段。
第一阶段为初始化阶段t1，在该阶段，如图5所示，第一扫描线S1输出的第一扫描信号、第二扫描线S2输出的第二扫描信号以及数据信号输入端电压Vdata均为低电平，第三扫描线S3输出的第三扫描信号为高电平。第六开关晶体管T6在第三扫描线S3输出的高电平的第三扫描信号的控制下开启。此时，第一电源ELVd向第一开关晶体管T1的栅极输出高电平的第一电压，使得第一开关晶体管T1处于开启状态。此外，第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4和第五开关晶体管T5在第一扫描线S1输出的低电平的第一扫描信号和第二扫描线S2输出的低电平的第二扫描信号的控制下均关闭，故工作单元OLED处于不工作的状态。
第二阶段为数据写入及充电阶段t2，在该阶段，如图5所示，第一扫描线S1输出的第一扫描信号和数据信号输入端电压Vdata 均为高电平，第二扫描线S2输出的第二扫描信号和第三扫描线S3输出的第三扫描信号均为低电平。第二开关晶体管T2和第五开关晶体管T5在第一扫描线S1输出的高电平的第一扫描信号的控制下开启，第三开关晶体管T3、第四开关晶体管T4和第六开关晶体管T6在第二扫描线S2输出的低电平的第二扫描信号和第三扫描线S3输出的低电平的第三扫描信号的作用下均关闭。此时，数据信号输入端电压Vdata将通过第二开关晶体管T2输入到第一开关晶体管T1的漏极，由t1阶段知道，第一开关晶体管T1在第一电压的作用下是开启的，由于第五开关晶体管T5开启，使得第一开关晶体管T1的栅极与源极相连，其形成了类似二极管的电路，由于第一开关晶体管T1先前输入的第一电压为高电平，因此，第一开关晶体管T1的栅极电压在达到Vdata+Vth时，该二极管将截止，即第二节点N2的电压为VN2＝Vdata+Vth，其中Vth为第一开关晶体管T1的阈值电压；这时，存储电容器C两端的电压即为第二节点N2与第一节点N1之间的电压VN2N1＝Vdata+Vth-ELVss，其中，ELVss为信号输入端电压。因此，为了电压补偿而进行充电的结果是使得第一开关晶体管T1的阈值电压输入到存储电容器C两端的电压差VN2N1中；此时，由于第四开关晶体管T4关断，故工作单元11处于不工作状态。
第三阶段为工作阶段，在该阶段，如图5所示，第一扫描线S1输出的第一扫描信号、第三扫描线S3输出的第三扫描信号和数据信号输入端电压Vdata均为低电平，第二扫描线S2输出的第二扫描信号为高电平。第三开关晶体管T3和第四开关晶体管T4在第二扫描线S2输出的高电平的第二扫描信号的控制下开启，而第二开关晶体管T2、第五开关晶体管T5和第六开关晶体管T6在第一扫描线S1输出的低电平的第一扫描信号和第三扫描线S3输出的低电平的第三扫描信号的控制下均关闭。此时，由于第一开关晶体管T1、第三开关晶体管T3和第四开关晶体管T4保持开启，因此，存储电容器C中的电压可以通过第一开关晶体管T1、第三开关晶体管T3和第四开关晶体管T4向工作单元11放电以使工作 单元11工作。
此时，流过第一开关晶体管T1的电流可以用下述公式表达：
I＝K(Vgs-Vth)2.....(1)。
其中K＝1/2*μ*Cox*W/L，为与晶体管相关的常数。
第一开关晶体管T1的栅-源电压保持在前t2阶段末的值，即，
Vgs＝VN2N1＝Vdata+Vth-ELVss.....(2)。
另外，由于第一开关晶体管T1的栅-源电压Vgs减去阈值电压Vth得到的值小于等于T1的漏-源电压Vds，即Vgs-Vth≤Vds，因此，第一开关晶体管T1处于饱和开启状态。
将公式(2)代入公式(1)可以得到第一开关晶体管T1的开启电流：
I＝K(Vgs-Vth)2＝K(Vdata+Vth-ELVss-Vth)2＝K(Vdata-ELVss)2.....(3)。
从公式(3)可以看出，流过第一开关晶体管T1的电流值与其阈值电压的变化无关，也就是说，即使经过长时间的使用使得第一开关晶体管T1的阈值电压发生漂移，流过第一开关晶体管T1的电流也不会因此而受到影响，这保证了工作单元11的工作质量。相应地，由于单个像素电路中工作单元11的工作质量得到了保证，因此利用本像素电路可以有效地补偿第一开关晶体管T1阈值电压的不均匀性，使得显示装置的画面均匀性提高，而无需借助外部补偿电路进行阈值电压补偿，由此降低了研发及制造成本。而且该像素电路的时序简单，容易实现。
例如，第五开关晶体管T5和第六开关晶体管T6的尺寸相同。
之所以如此设置，是由于如果第五开关晶体管T5漏电，则会导致第一开关晶体管T1的栅极电压在后续持续工作阶段发生改变，因此为了保持输入的数据信号输入端电压Vdata的电压值，可以通过第一电源ELVd输出的第一电压来补偿该漏电流。具体方法为：在制备第五开关晶体管T5和第六开关晶体管T6工艺中，将第五开关晶体管T5和第六开关晶体管T6的尺寸设计为相同尺寸，同时，在后续工作单元11的工作阶段，将第一电源ELVd相 对于第二节点N2的电压差设计为与第二节点N2相对于第四节点N4的电压差相等。为此，需将第一电源ELVd的电压值设计为：ELVd＝2(Vdata+Vth)-ELVss，这样就可以使得第五开关晶体管T5产生的第一开关晶体管T1的栅极漏电流由第六开关晶体管T6的漏电流来补偿，从而整体上提高AMOLED显示面板发光的均匀性和显示质量，使得有机发光显示器的画面均匀性提高。
显然，本实施例中的工作单元11并不仅限于OLED，其他器件也适用于本实施例，在此不再赘述。
本实施例的像素电路包括工作单元11、存储模块12、驱动模块13、补偿模块14和控制模块15，在该像素电路中，驱动模块13的阈值电压随着面板显示时间的增长而发生的漂移可得到补偿，从而可以有效地补偿驱动模块13的阈值电压的不均匀性，使得AMOLED显示面板发光亮度与驱动模块13的阈值电压无关；同时，通过补偿开关晶体管(第五开关晶体管T5)的漏电流导致的驱动模块13(第一开关晶体管T1)的栅极电压变化，从整体上提高AMOLED显示面板发光的均匀性和显示质量，使得有机发光显示器的画面均匀性提高。
实施例3：
本实施例提供一种像素电路的驱动方法，如图3、图4所示，该像素电路包括：工作单元11、存储模块12、驱动模块13、补偿模块14和控制模块15，驱动模块13与控制模块15、补偿模块14和存储模块12连接，控制模块15与工作单元11、补偿模块14、驱动模块13、存储模块12和信号输入端ELVss连接，补偿模块14与控制模块15、驱动模块13、存储模块12和第一电源ELVd连接，存储模块12与补偿模块14、驱动模块13、控制模块15和信号输入端ELVss相连，工作单元11与控制模块15和第三电源ELVdd连接，并且该驱动方法包括：初始化阶段，补偿模块14和驱动模块13在第一电源的控制下进行初始化；数据写入及充电阶段，数据信号输入端通过补偿模块14和驱动模块13向存储模块 12充电，使得与驱动模块13对应的阈值电压输入到存储模块12两端的电压差中；工作阶段，控制模块15开启，存储模块12通过驱动模块13向工作单元11放电以使工作单元11工作，并补偿与驱动模块13对应的阈值电压漂移对工作单元11性能的影响。
例如，存储模块12包括存储电容器；驱动模块13包括第一开关晶体管T1，补偿模块14包括第六开关晶体管T6和第三扫描线S3；补偿模块14和驱动模块13在第一电源ELVd的控制下进行初始化的步骤包括：第六开关晶体管T6在第三扫描线S3输出的第三扫描信号的控制下开启；第一电源ELVd通过开启的第六开关晶体管T6向第一开关晶体管T1输出第一电压，以使第一开关晶体管T1开启。
例如，补偿模块14包括第一扫描线S1、第二开关晶体管T2和第五开关晶体管T5，驱动模块13包括第一开关晶体管T1；数据信号输入端通过补偿模块14和驱动模块13向存储模块12充电，使得与驱动模块13对应的阈值电压输入到存储模块12两端的电压差中的步骤包括：第二开关晶体管T2和第五开关晶体管T5在第一扫描线S1输出的第一扫描信号的控制下开启；数据信号输入端通过开启的第二开关晶体管T2和第五开关晶体管T5向第一开关晶体管T1输出数据信号输入端电压Vdata；第一开关晶体管T1向存储电容器C充电，使得第一开关晶体管T1的阈值电压输入到存储电容器C两端的电压差中。
例如，控制模块15包括第二扫描线S2、第三开关晶体管T3和第四开关晶体管T4，驱动模块13包括第一开关晶体管T1；控制模块15在第二扫描线S2输出的第二扫描信号的控制下开启，存储模块12通过驱动模块13向工作单元11放电的步骤包括：第三开关晶体管T3和第四开关晶体管T4在第二扫描线S2输出的第二扫描信号的控制下开启；存储电容器C通过开启的第一开关晶体管T1、第三开关晶体管T3和第四开关晶体管T4向工作单元11放电，以使工作单元11工作。
例如，第一电源的电压ELVd＝2(Vdata+Vth)-ELVss，其中， Vdata为数据信号输入端电压，Vth为第一开关晶体管T1的阈值电压，ELVss为信号输入端电压。
本实施例提供的像素电路的驱动方法的具体实施方式与实施例2的工作原理相同，在此不再追述。
本实施例使用的像素电路包括工作单元11、存储模块12、驱动模块13、补偿模块14和控制模块15，利用本实施例的驱动方法驱动所述像素电路可补偿驱动模块13的阈值电压随着面板显示时间的增长而发生的漂移，从而可以有效地补偿驱动模块13的阈值电压的不均匀性，使得AMOLED发光亮度与驱动模块13的阈值电压无关；同时，通过补偿开关晶体管的漏电流导致的驱动模块13的栅极电压变化，从整体上提高AMOLED发光的均匀性和显示质量，使得有机发光显示器的画面均匀性提高。
本实施例提供的像素电路的驱动方法简单，容易实现，所以适用性更广。
实施例4：
本实施例提供一种阵列基板，其包括实施例2中的像素电路。
本实施例包括实施例2中的像素电路中，驱动模块13的阈值电压随着面板显示时间的增长而发生的漂移可得到补偿，从而可以有效地补偿驱动模块13的阈值电压的不均匀性，使得AMOLED发光亮度与驱动模块13的阈值电压无关；同时，通过补偿开关晶体管的漏电流导致的驱动模块13的栅极电压变化，从整体上提高AMOLED发光的均匀性和显示质量，使得有机发光显示器的画面均匀性提高，使得本实施例中的阵列基板性能更加稳定。
实施例5：
本实施例提供一种显示装置，该显示装置中包括阵列基板，所述阵列基板如实施例4中所述，此处不详细描述。
当然，本实施例中的显示装置可以包括：OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等 任何具有显示功能的产品或部件。
由于显示装置具有上述的阵列基板，故本实施例的显示装置的画面均匀性明显提高。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (15)

  1. 一种像素电路，包括：工作单元、存储模块、驱动模块、补偿模块和控制模块，其中，所述驱动模块与所述控制模块、所述补偿模块和所述存储模块连接，所述控制模块还与所述工作单元、所述补偿模块、所述存储模块和信号输入端连接，所述补偿模块还与所述存储模块、第一电源和数据信号输入端连接，所述存储模块还与所述信号输入端相连，所述工作单元还与第三电源连接；
    在初始化阶段，所述补偿模块和所述驱动模块在所述第一电源的控制下进行初始化；
    在数据写入及充电阶段，所述数据信号输入端通过所述补偿模块和所述驱动模块向所述存储模块充电，使得与所述驱动模块对应的阈值电压输入到所述存储模块两端的电压差中；
    在工作阶段，所述控制模块开启，所述存储模块通过所述驱动模块向所述工作单元放电以使所述工作单元工作，并补偿与所述驱动模块对应的阈值电压漂移对所述工作单元性能的影响。
  2. 根据权利要求1所述的像素电路，其中，所述存储模块包括存储电容器，所述存储电容器的一端经由第一节点与所述信号输入端和所述控制模块连接，所述存储电容器的另一端经由第二节点与所述驱动模块和所述补偿模块连接。
  3. 根据权利要求1所述的像素电路，其中，所述驱动模块包括第一开关晶体管；
    所述第一开关晶体管的栅极经由第二节点与所述补偿模块和所述存储模块连接，所述第一开关晶体管的源极经由第四节点与所述控制模块和所述补偿模块连接，所述第一开关晶体管的漏极经由第三节点与所述补偿模块和所述控制模块连接。
  4. 根据权利要求1所述的像素电路，其中，所述补偿模块包括：第二开关晶体管、第五开关晶体管、第六开关晶体管、第一扫描线和第三扫描线；
    所述第二开关晶体管的栅极连接所述第一扫描线，所述第二开关晶体管的漏极连接所述数据信号输入端，所述第二开关晶体管的源极经由第三节点与所述驱动模块和所述控制模块连接；
    所述第五开关晶体管的栅极连接所述第一扫描线，所述第五开关晶体管的源极经由第四节点与所述驱动模块和所述控制模块连接，所述第五开关晶体管的漏极经由第二节点与所述驱动模块和所述存储模块连接；
    所述第六开关晶体管的栅极连接所述第三扫描线，所述第六开关晶体管的源极经由第二节点与所述存储模块和所述驱动模块连接，所述第六开关晶体管的漏极连接所述第一电源。
  5. 根据权利要求1所述的像素电路，其中，所述控制模块包括第三开关晶体管、第四开关晶体管和第二扫描线；
    所述第三开关晶体管的栅极连接所述第二扫描线，所述第三开关晶体管的源极经由第一节点与所述存储模块和所述信号输入端连接，所述第三开关晶体管的漏极经由第四节点与所述驱动模块和所述补偿模块连接；
    所述第四开关晶体管的栅极连接所述第二扫描线，所述第四开关晶体管的漏极连接所述工作单元，所述第四开关晶体管的源极经由第三节点与所述补偿模块和所述驱动模块连接。
  6. 根据权利要求1所述的像素电路，其中，所述工作单元包括OLED。
  7. 根据权利要求4所述的像素电路，其中，所述第五开关晶体管的尺寸和所述第六开关晶体管的尺寸相同。
  8. 根据权利要求7所述的像素电路，其中，所述第一电源的电压ELVd＝2(Vdata+Vth)-ELVss，其中，
    所述Vdata为所述数据信号输入端的电压，所述Vth为所述驱动模块的阈值电压，所述ELVss为所述信号输入端的电压。
  9. 一种像素电路的驱动方法，其中，所述像素电路包括：工作单元、存储模块、驱动模块、补偿模块和控制模块，所述驱动模块与所述控制模块、所述补偿模块和所述存储模块连接，所述控制模块还与所述工作单元、所述补偿模块、所述存储模块和信号输入端连接，所述补偿模块还与所述存储模块、第一电源和数据信号输入端连接，所述存储模块还与所述信号输入端相连，所述工作单元还与第三电源连接；
    所述驱动方法包括：
    在初始化阶段，所述补偿模块和所述驱动模块在所述第一电源的控制下进行初始化；
    在数据写入及充电阶段，所述数据信号输入端通过所述补偿模块和所述驱动模块向所述存储模块充电，使得与所述驱动模块对应的阈值电压输入到所述存储模块两端的电压差中；
    在工作阶段，所述控制模块开启，所述存储模块通过所述驱动模块向所述工作单元放电以使所述工作单元工作，并补偿与所述驱动模块对应的阈值电压漂移对所述工作单元性能的影响。
  10. 根据权利要求9所述的像素电路的驱动方法，其中，所述驱动模块包括第一开关晶体管，所述补偿模块包括第六开关晶体管和第三扫描线；
    所述补偿模块和所述驱动模块在所述第一电源的控制下进行初始化的步骤包括：
    所述第六开关晶体管在所述第三扫描线输出的第三扫描信号的控制下开启；以及
    所述第一电源通过开启的所述第六开关晶体管向所述第一开 关晶体管输出第一电源电压，以使所述第一开关晶体管开启。
  11. 根据权利要求10所述的像素电路的驱动方法，其中，所述第一电源的电压ELVd＝2(Vdata+Vth)-ELVss，其中，
    所述Vdata为所述数据信号输入端的电压，所述Vth为所述第一开关晶体管的阈值电压，所述ELVss为信号输入端的电压。
  12. 根据权利要求9所述的像素电路的驱动方法，其中，所述补偿模块包括第一扫描线、第二开关晶体管和第五开关晶体管，所述驱动模块包括第一开关晶体管；
    所述数据信号输入端通过所述补偿模块和所述驱动模块向所述存储模块充电，使得与所述驱动模块对应的阈值电压输入到所述存储模块两端的电压差中的步骤包括：
    所述第二开关晶体管和所述第五开关晶体管在所述第一扫描线输出的第一扫描信号的控制下开启；
    所述数据信号输入端通过开启的所述第二开关晶体管和所述第五开关晶体管向所述第一开关晶体管输出数据信号输入端的电压；以及
    所述第一开关晶体管向所述存储模块充电，使得所述第一开关晶体管的阈值电压输入到所述存储模块两端的电压差中。
  13. 根据权利要求9所述的像素电路的驱动方法，其中，所述控制模块包括第二扫描线、第三开关晶体管和第四开关晶体管，所述驱动模块包括第一开关晶体管；
    所述控制模块开启，所述存储模块通过所述驱动模块向所述工作单元放电的步骤包括：
    所述第三开关晶体管和第四开关晶体管在所述第二扫描线输出的第二扫描信号的控制下开启；
    所述存储模块通过开启的所述第一开关晶体管、所述第三开关晶体管和所述第四开关晶体管向所述工作单元放电，以使所述 工作单元工作。
  14. 一种阵列基板，包括如权利要求1至8中任一项所述的像素电路。
  15. 一种显示装置，包括如权利要求14所述的阵列基板。
PCT/CN2016/070105 2015-08-13 2016-01-05 像素电路及其驱动方法、阵列基板、显示装置 WO2017024754A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/123,426 US10008153B2 (en) 2015-08-13 2016-01-05 Pixel circuit and driving method thereof, array substrate, display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510497655.9A CN105096826A (zh) 2015-08-13 2015-08-13 一种像素电路及其驱动方法、阵列基板、显示装置
CN201510497655.9 2015-08-13

Publications (1)

Publication Number Publication Date
WO2017024754A1 true WO2017024754A1 (zh) 2017-02-16

Family

ID=54577121

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/070105 WO2017024754A1 (zh) 2015-08-13 2016-01-05 像素电路及其驱动方法、阵列基板、显示装置

Country Status (3)

Country Link
US (1) US10008153B2 (zh)
CN (1) CN105096826A (zh)
WO (1) WO2017024754A1 (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105096826A (zh) 2015-08-13 2015-11-25 京东方科技集团股份有限公司 一种像素电路及其驱动方法、阵列基板、显示装置
CN107665672B (zh) * 2016-07-27 2020-01-31 上海和辉光电有限公司 像素电路及其驱动方法
CN106067291A (zh) * 2016-08-18 2016-11-02 成都京东方光电科技有限公司 一种像素驱动电路及其驱动方法、显示装置
CN106782330B (zh) * 2016-12-20 2019-03-12 上海天马有机发光显示技术有限公司 有机发光像素驱动电路、驱动方法以及有机发光显示面板
CN106710527A (zh) 2017-03-31 2017-05-24 深圳市华星光电技术有限公司 驱动电路及液晶显示设备
CN109147670B (zh) * 2017-06-16 2020-05-19 上海和辉光电有限公司 一种像素补偿电路及其驱动方法、显示装置
CN108648696B (zh) * 2018-03-22 2020-02-18 京东方科技集团股份有限公司 像素电路、阵列基板、显示装置和像素驱动方法
CN108288456B (zh) * 2018-04-28 2021-03-19 京东方科技集团股份有限公司 一种像素驱动电路及其驱动方法、显示装置
CN108877674A (zh) 2018-07-27 2018-11-23 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
CN110444167A (zh) * 2019-06-28 2019-11-12 福建华佳彩有限公司 一种amoled补偿电路
TWI697884B (zh) * 2019-08-20 2020-07-01 友達光電股份有限公司 畫素電路
CN110570813A (zh) * 2019-09-30 2019-12-13 昆山国显光电有限公司 像素电路、驱动方法及显示面板
CN111754922A (zh) * 2020-07-24 2020-10-09 武汉华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板
CN112785972A (zh) * 2021-03-08 2021-05-11 深圳市华星光电半导体显示技术有限公司 发光器件驱动电路、背光模组以及显示面板
CN114267299B (zh) * 2021-12-28 2023-06-02 昆山工研院新型平板显示技术中心有限公司 一种显示装置及驱动方法
CN116913341B (zh) * 2023-09-12 2024-04-30 温州核芯智存科技有限公司 一种存储器及补偿方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060139252A1 (en) * 2004-12-24 2006-06-29 I-Shu Lee Display device and display panel, pixel circuit and compensating method thereof
US20080054798A1 (en) * 2006-08-30 2008-03-06 Jin-Tae Jeong Organic light emitting display device and mother substrate of the same
CN101256732A (zh) * 2007-03-02 2008-09-03 三星Sdi株式会社 有机发光显示器
CN102346999A (zh) * 2011-06-27 2012-02-08 昆山工研院新型平板显示技术中心有限公司 Amoled像素电路及其驱动方法
CN103456263A (zh) * 2012-05-29 2013-12-18 三星显示有限公司 有机发光显示设备及其驱动方法
CN103886826A (zh) * 2012-12-21 2014-06-25 上海天马微电子有限公司 一种有机发光二极管显示阵列
CN104282259A (zh) * 2013-07-12 2015-01-14 三星显示有限公司 有机发光二极管显示器
CN105096826A (zh) * 2015-08-13 2015-11-25 京东方科技集团股份有限公司 一种像素电路及其驱动方法、阵列基板、显示装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060139252A1 (en) * 2004-12-24 2006-06-29 I-Shu Lee Display device and display panel, pixel circuit and compensating method thereof
US20080054798A1 (en) * 2006-08-30 2008-03-06 Jin-Tae Jeong Organic light emitting display device and mother substrate of the same
CN101256732A (zh) * 2007-03-02 2008-09-03 三星Sdi株式会社 有机发光显示器
CN102346999A (zh) * 2011-06-27 2012-02-08 昆山工研院新型平板显示技术中心有限公司 Amoled像素电路及其驱动方法
CN103456263A (zh) * 2012-05-29 2013-12-18 三星显示有限公司 有机发光显示设备及其驱动方法
CN103886826A (zh) * 2012-12-21 2014-06-25 上海天马微电子有限公司 一种有机发光二极管显示阵列
CN104282259A (zh) * 2013-07-12 2015-01-14 三星显示有限公司 有机发光二极管显示器
CN105096826A (zh) * 2015-08-13 2015-11-25 京东方科技集团股份有限公司 一种像素电路及其驱动方法、阵列基板、显示装置

Also Published As

Publication number Publication date
US20170178569A1 (en) 2017-06-22
CN105096826A (zh) 2015-11-25
US10008153B2 (en) 2018-06-26

Similar Documents

Publication Publication Date Title
WO2017024754A1 (zh) 像素电路及其驱动方法、阵列基板、显示装置
US10453389B2 (en) Pixel circuit, organic electroluminescent display panel and display apparatus
JP6474911B2 (ja) 画素回路、有機エレクトロルミネセンス表示パネル、表示装置及びその駆動方法
WO2016187990A1 (zh) 像素电路以及像素电路的驱动方法
US10643535B2 (en) Driving method for preventing image sticking of display panel upon shutdown, and display device
WO2018076719A1 (zh) 像素驱动电路及其驱动方法、显示面板和显示装置
WO2020062802A1 (zh) 显示面板及像素电路的驱动方法
WO2016188012A1 (zh) 像素电路、其驱动方法及显示装置
WO2017041453A1 (zh) 像素电路、其驱动方法及相关装置
JP2023093602A (ja) 画素回路、駆動方法、電界発光表示パネル及び表示装置
US10504436B2 (en) Pixel driving circuits, pixel driving methods and display devices
US10255858B2 (en) Pixel compensation circuit and AMOLED display device
WO2016095477A1 (zh) 像素驱动电路、像素驱动方法和显示装置
WO2016173124A1 (zh) 像素电路、其驱动方法及相关装置
WO2017031909A1 (zh) 像素电路及其驱动方法、阵列基板、显示面板及显示装置
KR100858618B1 (ko) 유기전계발광 표시장치 및 그의 구동방법
CN107346654B (zh) 一种像素电路及其驱动方法、显示装置
US20070290973A1 (en) Structure of pixel circuit for display and driving method thereof
US20200342812A1 (en) Pixel driving circuit, driving method thereof, display device
WO2015127760A1 (zh) 像素电路及其驱动方法、显示面板和显示装置
WO2016045256A1 (zh) 像素电路及其发光器件驱动方法和有机电致发光显示面板
WO2015169006A1 (zh) 一种像素驱动电路及其驱动方法和显示装置
WO2016155183A1 (zh) 像素电路、显示装置及其驱动方法
WO2016187991A1 (zh) 像素电路、驱动方法、有机电致发光显示面板及显示装置
US9424779B2 (en) Organic light emitting display device and driving method thereof

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15123426

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16834382

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16834382

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16834382

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 23/08/2018)

122 Ep: pct application non-entry in european phase

Ref document number: 16834382

Country of ref document: EP

Kind code of ref document: A1