WO2022084801A1 - 強誘電体デバイス、半導体装置 - Google Patents
強誘電体デバイス、半導体装置 Download PDFInfo
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- WO2022084801A1 WO2022084801A1 PCT/IB2021/059304 IB2021059304W WO2022084801A1 WO 2022084801 A1 WO2022084801 A1 WO 2022084801A1 IB 2021059304 W IB2021059304 W IB 2021059304W WO 2022084801 A1 WO2022084801 A1 WO 2022084801A1
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- insulator
- conductor
- oxide
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
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Definitions
- One aspect of the present invention relates to a metal nitride film, a ferroelectric device using the metal nitride film, and a method for manufacturing the same.
- one aspect of the invention relates to transistors, semiconductor devices, and electronic devices.
- one aspect of the present invention relates to a method for manufacturing a semiconductor device.
- one aspect of the present invention relates to a semiconductor wafer and a module.
- the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics.
- a semiconductor circuit, an arithmetic unit, and a storage device, including a semiconductor element such as a transistor, are one aspect of a semiconductor device. It may be said that a display device (liquid crystal display device, light emission display device, etc.), projection device, lighting device, electro-optic device, power storage device, storage device, semiconductor circuit, image pickup device, electronic device, and the like have a semiconductor device.
- One aspect of the present invention is not limited to the above technical fields.
- One aspect of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method. Also, one aspect of the invention relates to a process, machine, manufacture, or composition (composition of matter).
- a CPU is an aggregate of semiconductor elements formed by processing a semiconductor wafer, having a chipped semiconductor integrated circuit (at least a transistor and a memory), and forming an electrode as a connection terminal.
- IC chips Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on circuit boards, for example, printed wiring boards, and are used as one of various electronic device components.
- transistors are widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also referred to simply as display devices).
- ICs integrated circuits
- image display devices also referred to simply as display devices.
- Silicon-based semiconductor materials, oxide semiconductors, and the like are known as semiconductor thin films applicable to transistors.
- Non-Patent Document 1 research and development of a memory array using a ferroelectric substance (ferroelectric) are being actively carried out. Further, for the next generation of ferroelectric memory, as shown in Non-Patent Document 2, research on ferroelectric HfO 2 -based materials is being actively conducted. Further, in recent years, a study on the ferroelectricity of a nitride semiconductor of a Group 13 element shown in Non-Patent Document 3 has been reported.
- Non-Patent Documents 1 to 3 various researches and developments have been carried out on ferroelectrics.
- Non-Patent Document 1 it is reported in "orthorhombic phase Ferroelectric" that the sign of polarization (P) changes depending on the movement of oxygen atoms.
- Non-Patent Document 2 reports that the magnitude of polarization and the dielectric constant ( ⁇ r ) change depending on the composition ratio of Hf and Zr.
- Non-Patent Document 3 reports that ferroelectric switching occurs in Al 1-x Sc x N.
- one aspect of the present invention is to provide a material having good ferroelectricity, that is, a metal nitride film having ferroelectricity.
- one aspect of the present invention is to provide a capacitive element using a material capable of having ferroelectricity.
- one aspect of the present invention is to provide a transistor using a material capable of having ferroelectricity.
- one aspect of the present invention is to provide a capacitive element and a diode using a material capable of having ferroelectricity.
- one aspect of the present invention is to provide an element using a material capable of having ferroelectricity and using a tunnel junction.
- One aspect of the present invention includes an insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, and a second conductor on the metal nitride film.
- a strong dielectric having a first insulator on a first conductor, a metal nitride film, and a second conductor, and a second insulator on a first insulator. It is a device.
- the first conductor, the metal nitride film, and the second conductor are wrapped with an insulating film, a first insulator, and a second insulator, and the metal nitride film has a strong dielectric property.
- the metal nitride film has a first element, a second element, and nitrogen, and the first element is one or more elements selected from Group 13 elements, and the second element is present.
- the elements of are one or more elements selected from Group 13 elements excluding the first element and Group 2 to Group 6 elements, respectively, of the first conductor and the second conductor.
- one aspect of the present invention is a first conductor, a metal nitride film on the first conductor, a second conductor on the metal nitride film, and a first conductor.
- a strong dielectric device having a first insulator on a metal nitride film and a second conductor, and a second insulator on the first insulator.
- the first insulator has a region in contact with the side surface of the metal nitride film, a region in contact with the side surface of the second conductor, and a region in contact with the upper surface of the second conductor, and the metal nitride film is strong.
- the metal nitride film has a dielectric property, has a first element, a second element, and nitrogen, and the first element is one or more elements selected from Group 13 elements.
- the second element is a group 13 element excluding the first element, and one or more elements selected from the group 2 to group 6 elements, the first conductor, and the second conductivity.
- Each of the bodies has nitrogen, the first insulator has aluminum and oxygen, and the second insulator has silicon and nitrogen.
- the first insulator preferably has an amorphous structure.
- another aspect of the present invention is an insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, and a second conductor on the metal nitride film.
- a strong dielectric device having an insulator on a first conductor, on a metal nitride film, and on a second conductor. The insulator has a region in contact with the upper surface of the insulating film, a region in contact with the side surface of the metal nitride film, a region in contact with the side surface of the second conductor, and a region in contact with the upper surface of the second conductor.
- the material film has strong dielectric properties
- the metal nitride film has a first element, a second element, and nitrogen
- the first element is selected from Group 13 elements.
- the second element is a group 13 element excluding the first element, and one or more elements selected from the group 2 to group 6 elements, and the first conductor.
- each of the second conductors has nitrogen
- each of the insulating film and the insulator has silicon and nitrogen.
- the metal nitride film preferably has a wurtzite-type structure.
- the first element is preferably any one or more of aluminum (Al), gallium (Ga), and indium (In).
- the second element is boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodym (Nd), and europium (Eu). It is preferable that any one or more of the above is used.
- the first element is preferably aluminum (Al), and the second element is preferably one or more selected from lanthanoids and actinides.
- the first element is aluminum (Al)
- the second element is titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), and niobium (V). It is preferably one or more selected from Nb) and tantalum (Ta).
- the first conductor has a crystal having a sodium chloride type structure.
- a silicon nitride film may be provided between the first conductor and the metal nitride film.
- a silicon nitride film may be provided between the metal nitride film and the second conductor.
- another aspect of the present invention is a semiconductor device having the above-mentioned ferroelectric device and a transistor including an oxide semiconductor in a channel forming region.
- another aspect of the present invention is a metal nitride film having strong dielectric property, and the metal nitride film has aluminum, one or more selected from lanthanoids and actinides, and nitrogen. ..
- another aspect of the present invention is a metal nitride film having strong dielectric property
- the metal nitride film includes aluminum, titanium (Ti), zirconium (Zr), hafnium (Hf), and vanadium (.
- Ti titanium
- Zr zirconium
- Hf hafnium
- vanadium vanadium
- One or more selected from V niobium (Nb), and tantalum (Ta), one or more selected from magnesium (Mg), calcium (Ca), zinc (Zn), etc., and nitrogen.
- a material having good ferroelectricity that is, a metal nitride film having ferroelectricity.
- a capacitive element using a material that may have ferroelectricity.
- a transistor using a material that may have ferroelectricity.
- a capacitive element and a diode using a material capable of having ferroelectricity.
- an element using a material capable of having ferroelectricity and using a tunnel junction it is possible to provide a material capable of having ferroelectricity and using a tunnel junction.
- FIG. 1A to 1C are cross-sectional views of a capacitive element according to an aspect of the present invention.
- 2A to 2C are diagrams illustrating the atomic arrangement of the metal nitride.
- 2D and 2E are diagrams for explaining the calculation model.
- 3A and 3B are diagrams illustrating the calculation results.
- 4A to 4C are schematic views of the ferroelectric substance contained in the capacitive element.
- 5A to 5C are cross-sectional views showing a method of manufacturing a capacitive element according to one aspect of the present invention.
- FIG. 6A is a diagram showing a film formation sequence of a metal nitride film according to one aspect of the present invention.
- FIG. 6B is a cross-sectional view of the metal nitride film manufacturing apparatus according to one aspect of the present invention.
- FIG. 6C is a diagram showing an oxide film formation sequence.
- 7A1, FIG. 7B1, and FIG. 7C1 are diagrams illustrating a circuit diagram of a semiconductor device according to an aspect of the present invention.
- 7A2, 7B2, 7C2, 7C3, and 7C4 are views for explaining the cross-sectional structure of the semiconductor device according to one aspect of the present invention.
- FIG. 8A is a top view of a semiconductor device according to an aspect of the present invention.
- 8B to 8D are sectional views of a semiconductor device according to an aspect of the present invention.
- 9A and 9B are sectional views of a semiconductor device according to an aspect of the present invention.
- FIG. 10A is a diagram illustrating the classification of the crystal structure of IGZO.
- FIG. 10B is a diagram illustrating an XRD spectrum of a CAAC-IGZO film.
- FIG. 10C is a diagram illustrating a microelectron diffraction pattern of a CAAC-IGZO film.
- FIG. 11A is a top view of the semiconductor device according to one aspect of the present invention.
- 11B and 11C are cross-sectional views of a semiconductor device according to an aspect of the present invention.
- FIG. 12A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 12B to 12D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 13A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 13B to 13D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 14A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 14B to 14D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 15A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 15B to 15D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- 16A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 16B to 16D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 17A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 17B to 17D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 18A is a top view of a semiconductor device according to an aspect of the present invention.
- FIG. 18B is a cross-sectional view of a semiconductor device according to an aspect of the present invention.
- 19A to 19D are cross-sectional views of a capacitive element according to an aspect of the present invention.
- 20A to 20C are cross-sectional views of a semiconductor device according to an aspect of the present invention.
- 21A to 21C are cross-sectional views showing the configuration of the element according to one aspect of the present invention.
- FIG. 22 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 23 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- 24A and 24B are cross-sectional views showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 25 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 26 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 28A and 27B are cross-sectional views showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 28A is a block diagram showing a configuration example of a storage device according to an aspect of the present invention.
- FIG. 28B is a perspective view showing a configuration example of a storage device according to an aspect of the present invention.
- FIG. 29A is a circuit diagram showing a configuration example of a memory cell.
- FIG. 29B1 is a graph showing an example of the hysteresis characteristics of the ferroelectric layer.
- FIG. 29B2 is a graph showing an example of the hysteresis characteristics of an ideal ferroelectric layer.
- FIG. 29C is a timing chart showing an example of a memory cell driving method.
- 30A to 30E are schematic views of a storage device according to an aspect of the present invention.
- 31A to 31H are views showing an electronic device according to an aspect of the present invention.
- the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.
- the drawings schematically show ideal examples, and are not limited to the shapes or values shown in the drawings. For example, in an actual manufacturing process, layers, resist masks, and the like may be unintentionally reduced due to processing such as etching, but they may not be reflected in the figure for ease of understanding.
- the same reference numerals may be used in common between different drawings for the same parts or parts having similar functions, and the repeated description thereof may be omitted.
- the hatch pattern may be the same and no particular reference numeral may be added.
- a top view also referred to as a "plan view”
- a perspective view etc.
- the description of some components may be omitted.
- some hidden lines may be omitted.
- the ordinal numbers attached as the first, second, etc. are used for convenience, and do not indicate the process order or the stacking order. Therefore, for example, the "first” can be appropriately replaced with the “second” or “third” for explanation.
- the ordinal numbers described in the present specification and the like may not match the ordinal numbers used to specify one aspect of the present invention.
- X and Y are connected, the case where X and Y are electrically connected and the case where X and Y function. It is assumed that the case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification and the like. Therefore, it is not limited to the predetermined connection relationship, for example, the connection relationship shown in the figure or text, and the connection relationship other than the connection relationship shown in the figure or text is also disclosed in the figure or text.
- X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).
- a transistor is an element having at least three terminals including a gate, a drain, and a source. Further, it has a region (hereinafter, also referred to as a channel forming region) in which a channel is formed between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode). A current can flow between the source and the drain through the channel formation region.
- the channel forming region means a region in which a current mainly flows.
- the function of the source or drain may be switched when a transistor with a different polarity is adopted, or when the direction of the current changes in the circuit operation. Therefore, in the present specification and the like, the terms source and drain may be used interchangeably.
- the channel length is, for example, a source in a region where a semiconductor (or a portion where a current flows in a semiconductor when the transistor is on) and a gate electrode overlap each other in a top view of a transistor, or a channel formation region.
- the channel length does not always take the same value in all regions. That is, the channel length of one transistor may not be fixed to one value. Therefore, in the present specification, the channel length is any one value, the maximum value, the minimum value, or the average value in the channel formation region.
- the channel width is, for example, the channel length direction in the region where the semiconductor (or the portion where the current flows in the semiconductor when the transistor is on) and the gate electrode overlap each other in the top view of the transistor, or in the channel formation region. Refers to the length of the channel formation region in the vertical direction with respect to. In one transistor, the channel width does not always take the same value in all regions. That is, the channel width of one transistor may not be fixed to one value. Therefore, in the present specification, the channel width is any one value, the maximum value, the minimum value, or the average value in the channel formation region.
- the channel width in the region where the channel is actually formed (hereinafter, also referred to as “effective channel width”) and the channel width shown in the top view of the transistor. (Hereinafter, also referred to as “apparent channel width”) and may be different.
- the effective channel width may be larger than the apparent channel width, and the influence thereof may not be negligible.
- the ratio of the channel forming region formed on the side surface of the semiconductor may be large. In that case, the effective channel width is larger than the apparent channel width.
- channel width may refer to an apparent channel width.
- channel width may refer to an effective channel width.
- the values of the channel length, channel width, effective channel width, apparent channel width, and the like can be determined, for example, by analyzing a cross-sectional TEM image.
- the semiconductor impurities are, for example, other than the main components constituting the semiconductor.
- an element having a concentration of less than 0.1 atomic% can be said to be an impurity.
- the inclusion of impurities may result in, for example, an increase in the defect level density of the semiconductor, a decrease in crystallinity, and the like.
- the impurities that change the characteristics of the semiconductor include, for example, Group 1 element, Group 2 element, Group 13 element, Group 14 element, Group 15 element, and oxide semiconductor.
- transition metals other than the main component such as hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Water may also function as an impurity.
- oxygen deficiency VO: oxygen vacancy
- the oxidative nitride refers to a nitride having a higher oxygen content than nitrogen as its composition.
- silicon oxide has a higher oxygen content than nitrogen in its composition.
- the nitride oxide refers to an oxide having a higher nitrogen content than oxygen as its composition.
- silicon nitride oxide has a higher nitrogen content than oxygen in its composition.
- the term “insulator” can be paraphrased as an insulating film or an insulating layer.
- the term “conductor” can be paraphrased as a conductive film or a conductive layer.
- the term “semiconductor” can be paraphrased as a semiconductor film or a semiconductor layer.
- parallel means a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, the case of -5 degrees or more and 5 degrees or less is also included.
- approximately parallel means a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less.
- vertical means a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, the case of 85 degrees or more and 95 degrees or less is also included.
- approximately vertical means a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.
- a metal oxide is a metal oxide in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS) and the like. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when it is described as an OS transistor, it can be rephrased as a transistor having a metal oxide or an oxide semiconductor.
- normally off means that when a potential is not applied to the gate or a ground potential is applied to the gate, the drain current per 1 ⁇ m of the channel width flowing through the transistor is 1 ⁇ 10 ⁇ at room temperature. It means that it is 20 A or less, 1 ⁇ 10 -18 A or less at 85 ° C, or 1 ⁇ 10 -16 A or less at 125 ° C.
- the barrier insulating film refers to an insulating film having a barrier property.
- the barrier property is a function of suppressing the diffusion of the corresponding substance (also referred to as low permeability).
- the corresponding substance has a function of capturing or fixing (also called gettering).
- the description such as “A covers B”, “A wraps B”, or “A wraps B” is not necessarily the whole of B hidden by A. Does not mean state.
- the description such as “A covers B”, “A wraps B”, or “A wraps B” includes a state in which a part of B is exposed from A.
- the description "A covers B” can be paraphrased as "A wraps B” or "A wraps B".
- the capacitive element 100 includes a conductor 110, a conductor 120, and an insulator 130 sandwiched between the conductor 110 and the conductor 120.
- the conductor 110 may be arranged on the insulator 105
- the insulator 130 may be arranged on the insulator 110
- the conductor 120 may be arranged on the insulator 130.
- the conductor 110 functions as a lower electrode of the capacitive element 100
- the conductor 120 functions as an upper electrode of the capacitive element 100
- the insulator 130 functions as a dielectric of the capacitive element 100.
- the insulator 152 is arranged so as to wrap the capacitive element 100, and the insulator 155 is arranged at least between the insulator 152 and the insulator 130.
- the insulator 155 is arranged so as to wrap the conductor 110, the insulator 130, and the conductor 120, and the insulator 152 is arranged so as to wrap the insulator 155.
- the insulator 155 may come into contact with the insulator 105 in a region where it does not overlap with the conductor 110.
- the insulator 155 has a region in contact with each of the side surface of the conductor 110, the side surface of the insulator 130, the side surface of the conductor 120, and the upper surface of the conductor 120.
- the insulator 152 and the insulator 155 functions as a barrier insulating film against hydrogen.
- the insulator 152 has a function of suppressing the diffusion of hydrogen and at least one hydrogen-bonded substance (for example, OH ⁇ ). Therefore, it is assumed that the insulator 152 has a higher ability to suppress the diffusion of hydrogen and at least one of hydrogen-bonded substances (for example, OH ⁇ ) than the insulator 130.
- the insulator 155 has a function of capturing or fixing (also referred to as gettering) hydrogen and at least one of hydrogen-bonded substances. Therefore, it is assumed that the insulator 155 has a higher ability to capture or fix hydrogen and at least one of hydrogen-bonded substances than the insulator 130.
- a material capable of having ferroelectricity for the insulator 130.
- a metal nitride having a Wurtzite - type structure space group: P63 mc
- spontaneous polarization occurs along the c-axis.
- the polarity of polarization is reversed by an external electric field within the range where dielectric breakdown does not occur. It is presumed that by changing the direction or strength of the external electric field, a part of the nitrogen atom in the metal nitride moves and the sign of the polarization generated inside is changed. At this time, ferroelectricity develops.
- a metal nitride having a first element, a second element, and nitrogen may have ferroelectricity.
- the first element is one or more elements selected from the Group 13 elements.
- the second element is an element that lowers the barrier (also referred to as an inversion barrier) when the polarity of polarization is inverted.
- the metal nitride containing the second element as a main component preferably has a crystal structure other than the wurtzite type structure, and has a layered hexagonal structure (space group: P6 3 / mmc) or a sodium chloride type structure. It is more preferable to have (NaCl type structure, space group: Fm-3m).
- the second element is one or more elements selected from Group 13 elements excluding the first element, Group 2 elements to Group 6 elements, and the like.
- the metal nitride containing the first element as a main component tends to have a crystal structure having a wurtzite-type structure. Further, when the metal nitride contains a second element, the polarity of the polarization of the metal nitride may be reversed by an external electric field within a range in which dielectric breakdown does not occur.
- Examples of the material having a ferroelectricity include a metal nitride having an element M1, an element M2, and nitrogen.
- the element M1 corresponds to the first element
- the element M2 corresponds to the second element.
- the element M1 is one or a plurality selected from aluminum (Al), gallium (Ga), indium (In) and the like.
- the element M2 is one or a plurality selected from boron (B), a rare earth element, and an actinide (15 elements from actinium (Ac) to lawrencium (Lr)).
- the rare earth element is a general term for scandium (Sc), yttrium (Y), and lanthanoid (15 elements from lanthanum (La) to lutetium (Lu)
- the element M2 is boron (B) and scandium. (Sc), yttrium (Y), lanthanoids, and one or more selected from actinoids.
- the element M2 may be one or more selected from boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodym (Nd), europium (Eu) and the like. It is preferable to have.
- the ratio of the sum of the atomic numbers of the elements M1 and M2 to the atomic number of nitrogen may be 1: 1 or close to it.
- the neighborhood includes the range of ⁇ 30% of the ratio of the desired number of atoms.
- the ratio of the number of atoms of the element M1 to the number of atoms of the element M2 can be appropriately set.
- the number of atoms of the element M1 is preferably larger than the number of atoms of the element M2, and more preferably 1.5 times or more the number of atoms of the element M2.
- the ratio of the number of atoms of the element M1 to the number of atoms of the element M2 is preferably in the range in which the metal nitride can form a solid solution.
- the aluminum nitride scandium Al 1-a Sc a N b (a is a real number larger than 0 and smaller than 0.5) is typically used.
- B is a value at or near 1)
- Al-Ga-Sc nitride Al 1-c-d Ga c Sc d N b (each of c and d is a positive real number, c + d). Is greater than 0, less than 0.5, b is a value at or near 1)
- Ga-Sc nitride Ga 1-e Sc e N b (e is greater than 0 and greater than 1).
- examples of the material capable of having ferroelectricity include a material having aluminum nitride and / or scandium nitride.
- Al-Ga-Sc nitride as a material that may have ferroelectricity, rather than aluminum nitride scandium.
- the ionic radius of gallium is larger than the ionic radius of aluminum and smaller than the ionic radius of scandium. Therefore, it is presumed that by adding gallium to the aluminum nitride scandium, the crystal structure of the aluminum nitride scandium and its lattice constant can be adjusted so that the ferroelectricity can be easily exhibited. Therefore, the Al-Ga-Sc nitride is expected to exhibit ferroelectricity.
- the bandgap of gallium nitride is smaller than the bandgap of aluminum nitride and larger than the bandgap of scandium nitride. Therefore, by adding gallium to the aluminum nitride scandium, the insulating property of the scandium nitride is enhanced, and it can be used for a ferroelectric device described later.
- a metal nitride having an element M1, an element M3, and nitrogen can be mentioned.
- the element M1 corresponds to the first element
- the element M3 corresponds to the second element.
- the element M1 is one or a plurality selected from aluminum (Al), gallium (Ga), indium (In) and the like.
- the element M3 is one or more selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr) and the like.
- the valence of these metal elements is +3 valence. Therefore, the valence of the element M3 can be +3 even in the metal nitride having the element M1, the element M3, and nitrogen. Therefore, when the ratio of the sum of the atomic numbers of the elements M1 and M3 to the atomic number of nitrogen is 1: 1 or its vicinity, the electrical neutrality of the metal nitride may be maintained.
- the metal nitride having the element M1, the element M3, and nitrogen may contain the element M4.
- the element M4 is an element that can maintain the electrical neutrality of the metal nitride.
- the element M4 is, for example, an element that easily takes a +1 valence or an element that easily takes a +2 valence.
- Specific examples of the element M4 include sodium (Na), potassium (K), rubidium (Ru), cesium (Cs), magnesium (Mg), calcium (Ca), strontium (Sr), zinc (Zn), and the like. And one or more selected from cadmium (Cd) and the like.
- Titanium, zirconium, hafnium, vanadium, niobium, tantalum, and chromium exemplified as the element M3 can have valences of +4 or more. Therefore, it is presumed that the electric neutrality of the metal nitride is maintained by containing the element M4 capable of maintaining the electrical neutrality of the metal nitride.
- the ratio of the number of atoms of the element M3 and the element M4 can be appropriately set depending on the type of the element selected as the element M3 or the element M4.
- the element M4 is an element that can easily take a +2 valence (for example, Mg, Ca, Sr, Zn, and Cd), and the element M3 can take a +4 valence (for example, Ti, Zr). , And Hf, etc.), the ratio of the number of atoms of the element M4 to the number of atoms of the element M3 is preferably 1: 1 or its vicinity.
- a +2 valence for example, Mg, Ca, Sr, Zn, and Cd
- the element M3 can take a +4 valence (for example, Ti, Zr). , And Hf, etc.)
- the ratio of the number of atoms of the element M4 to the number of atoms of the element M3 is preferably 1: 1 or its vicinity.
- the element M4 is an element that can easily take a +2-valent valence and the element M3 is an element that can take a +5-valent valence (for example, V, Nb, and Ta, etc.)
- the number of atoms of the element M4 is preferably 2: 1 or close to it.
- the element M4 is an element (Na, K, Ru, Cs, etc.) that can easily take a +1 valence
- the element M3 is an element that can take a +5 valence
- the number of atoms of the element M4 is preferably 1: 1 or close to it.
- the ratio of the atomic numbers of the element M1, the element M3, and the element M4 can be appropriately set.
- the number of atoms of the element M1 is preferably larger than the sum of the number of atoms of the element M3 and the element M4.
- the metal nitride having the element M1, the element M2, and nitrogen may contain the element M3 or the element M4.
- the ratio of the number of atoms of the element M3 or the element M4 to the sum of the number of atoms of the element M1 and the element M2 is preferably 0.05 or less, more preferably 0.02 or less. This makes it possible to suppress the number of defects formed in order to maintain the electrical neutrality of the metal nitride. By suppressing the number of defects, the crystallinity of the metal nitride is improved and the ferroelectricity is easily developed.
- the element M2 may be contained in the metal nitride having the element M1, the element M3, and nitrogen. At this time, there is no particular limitation on the ratio of the sum of the atomic numbers of the elements M1 and M3 to the atomic numbers of the element M2. This is because even if the metal nitride contains the element M2, the electrical neutrality of the metal nitride is maintained.
- the element M2 may be contained in the metal nitride having the element M1, the element M3, the element M4, and nitrogen. At this time, there is no particular limitation on the ratio of the sum of the atomic numbers of the elements M1, M3, and M4 to the atomic numbers of the element M2. This is because even if the metal nitride contains the element M2, the electrical neutrality of the metal nitride is maintained.
- the metal nitride contains at least a Group 13 element and nitrogen which is a Group 15 element, the metal nitride is a strong dielectric of Group III-V and a strong dielectric of Group III nitride. Sometimes called the body.
- FIGS. 2A to 2C show the atomic arrangement of the wurtzite type structure
- FIG. 2B shows the atomic arrangement of the layered hexagonal structure
- the white spheres are cations (cationic sites) and the black spheres are nitrogen (N) (nitrogen (N) sites).
- the arrows in FIGS. 2A to 2C indicate the c-axis direction (c-axis) of the crystal structure of the metal nitride.
- the plane perpendicular to the c-axis is the ab plane of the crystal structure of the metal nitride.
- the metal nitride having a wurtzite structure is polarized along the c-axis. For example, if the metal nitride has the atomic arrangement shown in FIG. 2A, polarization occurs along the c-axis. Further, in the metal nitride, the polarity of polarization is reversed by an external electric field in a range where dielectric breakdown does not occur. For example, when the metal nitride changes from the atomic arrangement shown in FIG. 2A to the atomic arrangement shown in FIG. 2C, the polarity of the polarization is reversed.
- the metal nitride temporarily has an atomic arrangement in which the nitrogen atom is located in the layer parallel to the ab plane and containing the cation in the process of inversion of the polarity of the polarization.
- the metal nitride has, for example, the atomic arrangement shown in FIG. 2B temporarily.
- the polarity of the polarization of the metal nitride is reversed by changing from the atomic arrangement shown in FIG. 2A to the atomic arrangement shown in FIG. 2C via the atomic arrangement shown in FIG. 2B.
- the inversion barrier for the type and ratio of atoms located at the cation site is calculated by first-principles calculation.
- the unit cell is expanded to create a supercell having 32 atoms. At this time, the number of cations (cation sites) contained in the supercell is 16, and the number of nitrogens (nitrogen sites) contained in the supercell is 16. From the above, a supercell having a wurtzite structure and a supercell having a layered hexagonal structure can be prepared.
- the supercell shown in FIG. 2D has a wurtzite-type crystal structure, and the periodicity of the atomic arrangement is the same as the periodicity of the atomic arrangement of the structure shown in FIG. 2A.
- the crystal structure is a layered hexagonal structure, and the periodicity of the atomic arrangement is the same as the periodicity of the atomic arrangement of the structure shown in FIG. 2B.
- the arrows in FIGS. 2D and 2E indicate the c-axis direction of the crystal structure of the supercell.
- the plane perpendicular to the c-axis is the ab plane of the crystal structure of the supercell.
- a computational model of the wurtzite structure and a layered hexagonal crystal are placed.
- a computational model of the structure a metal atom different from an aluminum atom is referred to as an atom M0.
- the ratio of the number of atoms M0 arranged in the cation site in the calculation model to the number of cation sites in the calculation model is defined as a [%]. For example, when the atom M0 is placed at one cation site in the calculation model, the ratio is 6.25% (1/16).
- the atom M0 is a scandium atom (Sc), a titanium atom (Ti), a zirconium atom (Zr), a hafnium atom (Hf), a vanadium atom (V), a niobium atom (Nb), or a tantalum atom (Ta).
- the ratio a is 6.25%, 12.5%, 25%, or 50%.
- one of the 20 calculation models is a calculation model in which aluminum atoms are arranged at all cation sites.
- the potential generated by the Projector Augmented Wave (PAW) method was used for the electronic state pseudopotential, and GGA / PBE (Generalized-Gradient-Perdewation / Perdew-Burke-Ernzerhof) was used for the functional. Also, symmetry is taken into consideration.
- PAW Projector Augmented Wave
- the structural optimization of the calculation model can be achieved by repeatedly performing the calculation that optimizes the atomic coordinates by fixing the shape and volume of the cell and the calculation that optimizes the shape and volume of the cell and the atomic coordinates. Will be done.
- the inversion barrier is calculated using the calculation model of the layered hexagonal structure after the structure optimization and the calculation model of the wurtzite type structure after the structure optimization. Specifically, the total energy calculated based on the calculated model of the layered hexagonal structure after structural optimization is subtracted from the total energy calculated based on the calculated model of the Wurtzite structure after structural optimization. The value obtained by dividing the value by 16 is used as the reversal barrier.
- FIG. 3A shows the reversal barrier calculated using the calculation model in which the ratio a is 6.25%.
- the horizontal axis is the atom M0
- the vertical axis is the inversion barrier [meV / f. u. ] (Fu .: formulaunit).
- the inversion barrier calculated using a calculation model in which aluminum atoms are arranged at all cation sites in the calculation model is also shown in FIG. 3A.
- a calculation model in which the ratio a is 0% is referred to as a calculation model in which the atom M0 is Al.
- the reversal barrier is lowered by adding Sc, Ti, Zr, Hf, V, Nb, or Ta to aluminum nitride.
- the atom added to the aluminum nitride is Ti, V, Nb, or Ta
- the inversion barrier is further lowered. Therefore, it is presumed that a metal nitride having one or more selected from Sc, Ti, Zr, Hf, V, Nb, and Ta, Al, and nitrogen may have ferroelectricity.
- FIG. 3B is a diagram illustrating the relationship between the ratio a and the reversal barrier.
- the inversion barrier shown in FIG. 3B is calculated using a calculation model in which the atom M0 is Sc, Ti, Nb, or Ta.
- the horizontal axis is the ratio a [%]
- the vertical axis is the reversal barrier [meV / f. u. ].
- the inversion barrier for the computational model where the ratio a is 50% and the atom M0 is Ti, Nb, or Ta is not plotted in FIG. 3B.
- the reversal barrier tends to decrease as the ratio a increases.
- the atom M0 is Ti, Nb, or Ta and the ratio a is 50%, it is suggested that polarization may not occur. Therefore, a metal nitride having Ti, Nb, or Ta, Al, and nitrogen has a strong dielectric property by increasing the number of atoms of Al to be larger than the number of atoms of Ti, Nb, or Ta. It is presumed to be possible.
- the material capable of having ferroelectricity for example, a mixture or compound composed of a plurality of materials selected from the materials listed above can be used.
- the insulator 130 may have a laminated structure composed of a plurality of materials selected from the materials listed above.
- the crystal structure (characteristics) of the materials listed above may change depending not only on the film forming conditions but also on various processes, only the materials exhibiting ferroelectricity are used in the present specification and the like.
- the ferroelectric substance includes not only a material exhibiting ferroelectricity but also a material capable of having ferroelectricity.
- the above-mentioned metal nitride particularly the material having aluminum nitride and / or scandium nitride is preferable because it can have ferroelectricity even when processed into a thin film of several nm.
- the film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, still more preferably 10 nm or less (typically 2 nm or more and 9 nm or less).
- the film thickness is preferably 8 nm or more and 12 nm or less.
- the capacitive element 100 can be combined with a semiconductor element such as a miniaturized transistor to form a semiconductor device.
- a layered material capable of having ferroelectricity may be referred to as a ferroelectric layer or a metal nitride film.
- such a device having a ferroelectric layer may be referred to as a ferroelectric device in the present specification and the like.
- a material that can have ferroelectricity is an insulator, which has a property that polarization is generated inside by applying an electric field from the outside, and polarization remains even if the electric field is set to zero. Therefore, a non-volatile storage element can be formed by using a capacitive element (hereinafter, may be referred to as a ferroelectric capacitor) using the material as a dielectric.
- a ferroelectric capacitor may be referred to as a FeRAM (Ferroelectric Random Access Memory), a ferroelectric memory, or the like.
- a ferroelectric memory may have a transistor and a ferroelectric capacitor, and one of the source and drain of the transistor may be electrically connected to one terminal of the ferroelectric capacitor. Therefore, the capacitive element 100 shown in the present embodiment and the semiconductor device using the transistor can function as a ferroelectric memory.
- FIGS. 4A to 4C show enlarged views of the vicinity of the insulator 130 functioning as the ferroelectric layer shown in FIGS. 1A and the like.
- the insulator 130 As shown in FIG. 4A, a crystal structure in which crystals form a layer and the layers are laminated is preferable. Further, the layer preferably contains a single crystal structure.
- the broken line of the insulator 130 shown in FIG. 4A indicates the layer of the crystal, and the arrow 132 indicates the c-axis of the crystal.
- the crystal layer contained in the insulator 130 extends in the ab plane direction. Further, the crystal layer contained in the insulator 130 grows in the c-axis direction (sometimes called axial growth), and a plurality of crystal layers are laminated in the c-axis direction. It is preferable that the c-axis is oriented substantially perpendicular to the surface to be formed or the upper surface of the insulator 130.
- the angle ⁇ formed by the normal line and the arrow 132 with respect to the upper surface of the conductor 110 is preferably 30 ° or less, and more preferably 5 ° or less.
- the insulator 130 may have a polycrystalline structure having a plurality of grains 136 having different crystallinity.
- the plurality of grains 136 preferably has a hexagonal crystal structure, and more preferably has a wurtzite-type structure. Having a hexagonal crystal structure in at least a part of the plurality of grains 136 is preferable because ferroelectricity is exhibited in the insulator 130.
- the insulator 130 may have a structure having a layer 138a having a single crystal structure and a layer 138b having a polycrystal structure.
- a layer 138a having a plurality of single crystal structures and a plurality of polycrystalline layers 138b may be laminated on the conductor 110.
- the insulator 130 has a hexagonal crystal structure because it exhibits ferroelectricity.
- the insulator 130 may have an amorphous structure.
- the insulator 130 may have a composite structure having an amorphous structure and a crystal structure.
- the insulator 130 having good crystallinity, it is preferable that impurities such as hydrogen, carbon, hydrocarbons, and chlorine in the insulator 130 are reduced.
- impurities such as hydrogen, carbon, hydrocarbons, and chlorine in the insulator 130 are reduced.
- the above-mentioned impurities do not refer only to a single atom.
- the substances bonded to the above-mentioned impurity elements are also reduced.
- substances bonded to hydrogen (for example, OH ⁇ ) in the insulator 130 are also reduced.
- These impurities may form nitrogen deficiencies in the crystals in the insulator 130.
- an impurity element such as hydrogen may be bonded to the nitrogen-deficient portion to reduce the crystallinity of the insulator 130.
- the inclusion of these impurities in the insulator 130 may inhibit the crystallization of the insulator 130.
- ferroelectricity is exhibited by the displacement of nitrogen by an external electric field. Therefore, in order to improve the ferroelectricity of the insulator 130, it is preferable to reduce impurities such as hydrogen, carbon, hydrocarbons, and chlorine.
- the concentration of hydrogen contained in the insulator 130 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, and more preferably 1 ⁇ 10 20 atoms / cm 3 or less.
- the concentration of the hydrocarbon contained in the insulator 130 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, more preferably 1 ⁇ 10 20 atoms / cm 3 or less, and 5 ⁇ 10 19 atoms / cm 3 or less. Is even more preferable.
- the concentration of carbon contained in the insulator 130 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, more preferably 1 ⁇ 10 20 atoms / cm 3 or less, and 5 ⁇ 10 19 atoms / cm 3 or less. More preferred. Further, for example, the concentration of chlorine contained in the insulator 130 is preferably 5 ⁇ 10 21 atoms / cm 3 or less, more preferably 1 ⁇ 10 21 atoms / cm 3 or less, and 5 ⁇ 10 20 atoms / cm 3 or less. More preferred.
- SIMS Secondary Ion Mass Spectrometry
- XPS X-ray Photoelectron Spectroscopy
- AES Auger Electrospectry
- the insulator 152 is provided so as to wrap the capacitive element 100, and the insulator 155 is provided between the insulator 152 and the insulator 130.
- the insulator 152 can prevent impurities such as hydrogen from diffusing from the outside of the insulator 152 to the insulator 130. Further, impurities such as hydrogen existing in the region surrounded by the insulator 152 can be captured or fixed by the insulator 155, and the concentration of impurities such as hydrogen contained in the insulator 130 can be reduced. ..
- the insulator 152 and the insulator 155 for example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, silicon nitride and the like can be used.
- the insulator 152 having a high ability to suppress the diffusion of impurities such as hydrogen for example, silicon nitride (SiN x : x is an arbitrary number larger than 0) is preferably used. In this case, the insulator 152 is an insulator having at least nitrogen and silicon.
- the insulator 155 having a high ability to capture or fix impurities such as hydrogen it is preferable to use an oxide having an amorphous structure.
- a metal oxide such as aluminum oxide (AlO x : x is an arbitrary number larger than 0) or magnesium oxide (MgO y : y is an arbitrary number larger than 0).
- AlO x : x is an arbitrary number larger than 0
- magnesium oxide MgO y : y is an arbitrary number larger than 0.
- the insulator 155 becomes an insulator having at least oxygen and aluminum.
- an oxygen atom has a dangling bond, and the dangling bond may have a property of capturing or fixing hydrogen.
- a metal oxide having such an amorphous structure as a component of the capacitive element 100 or by providing it around the capacitive element 100, hydrogen contained in the capacitive element 100 or hydrogen existing around the capacitive element 100 can be obtained. Can be captured or stuck. In particular, it is preferable to capture or fix hydrogen contained in the insulator 130.
- the insulator 155 preferably has an amorphous structure, but a crystal region may be partially formed. Further, the insulator 155 may have a multilayer structure in which a layer having an amorphous structure and a layer having a crystal region are laminated. For example, the insulator 155 may have a laminated structure in which a layer having a crystal region, typically a layer having a polycrystalline structure, is formed on a layer having an amorphous structure.
- the insulator 105 uses an insulator similar to the insulator 152, which has a high ability to suppress the diffusion of impurities such as hydrogen. Further, the insulator 155 and the insulator 105 are in contact with each other in a region that does not overlap with the capacitive element 100. That is, the conductor 110, the insulator 130, and the conductor 120 are wrapped with the insulator 105, the insulator 152, and the insulator 155. In other words, the capacitive element 100 is sealed by the insulator 155, the insulator 152, and the insulator 105.
- the insulator 155, the insulator 152, and the insulator 105 function as a sealing film.
- the insulator 155 captures or fixes the hydrogen inside the insulator 152 and the insulator 105, so that the capacitance element
- the hydrogen concentration of the insulator 130 of 100 can be reduced. Therefore, the ferroelectricity of the insulator 130 can be enhanced.
- the present invention is not limited to this, and any insulating material may be used as the insulator 105.
- the insulating material described in the item of ⁇ insulator >> of the second embodiment described later may be used. Can be done.
- the insulator 130 it is possible to improve the crystallinity of the insulator 130 by eliminating impurities such as hydrogen or extremely reducing the content of impurities such as hydrogen in the insulator 130, which is high. It can be a structure having ferroelectricity.
- the conductor 110 includes aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, indium, ruthenium, and iridium. It is preferable to use a metal element selected from strontium, lanthanum and the like, an alloy containing the above-mentioned metal element as a component, an alloy in which the above-mentioned metal element is combined, and the like. As the alloy containing the above-mentioned metal element as a component, a nitride of the alloy or an oxide of the alloy may be used.
- tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like are used. Is preferable.
- tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize.
- a plurality of conductive layers formed of the above materials may be laminated and used.
- a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined.
- a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing nitrogen are combined.
- a laminated structure may be formed in which the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined.
- the flatness of the upper surface of the conductor 110 is good.
- the roughness of the upper surface of the underlying conductor 110 is an arithmetic mean roughness (Ra) or a root mean square roughness (RMS: Root Mean Square) of 2 nm or less, preferably 1 nm or less, more preferably 0. It may be 8 nm or less, more preferably 0.5 nm or less, still more preferably 0.4 nm or less.
- a layer for enhancing the crystallinity of the insulator 130 may be provided between the insulator 130 and the conductor 110 and / or between the insulator 130 and the conductor 120.
- the above-mentioned metal nitride is used for the insulator 130, it is preferable to use, for example, a material that stabilizes the wurtzite structure as the layer for enhancing the crystallinity.
- the layer for enhancing the crystallinity for example, it is preferable to use a layer containing at least one element of the insulator 130. It is preferable that the composition of the layer that enhances crystallinity and the composition of the insulator 130 are different.
- the layer for enhancing the crystallinity is specifically a metal nitride such as aluminum nitride, gallium nitride, or scandium nitride, or aluminum, gallium, or scandium. Is preferable.
- the composition of the layer that enhances crystallinity does not have to have the element of the insulator 130.
- the element that can be used include indium, silicon, yttrium, hafnium, and zirconium.
- a conductive material that can be used for the conductor 110 may be used.
- the conductor 110 or the conductor 120 has nitrogen, and it is more preferable that each of the conductor 110 and the conductor 120 has nitrogen.
- the conductor 110 and / or the conductor 120 it is particularly preferable to use tantalum nitride or titanium nitride. With this configuration, the formation of a different layer at the interface between the insulator 130 and the conductor 110 and / or the conductor 120 is suppressed, and the insulator 130 containing the layered crystals as described above is formed. Can be formed.
- the different layer is a layer having a compound containing a component of the insulator 130 and a component of the conductor 110 (conductor 120).
- the crystallinity of the insulator 130 may be improved by using tantalum nitride or titanium nitride as the conductor 110. Tantalum nitride and titanium nitride tend to have a sodium chloride type structure. Further, the atomic arrangement when the sodium chloride type structure is viewed from the [111] direction and the atomic arrangement when the wurtzite type structure is viewed from the [001] direction are similar. That is, depending on the composition and the combination of elements, the lattice consistency between the conductor 110 and the insulator 130 may be high.
- the conductor 110 has a crystal having a sodium chloride type structure. Further, it is preferable that the crystal is (111) oriented with respect to the surface of the insulator 105. When the conductor 110 has the crystals, the crystallinity of the insulator 130 may be improved.
- the above crystals can be confirmed, for example, by observing the regularity of metal ions with a cross-section TEM. Further, for example, it can be confirmed by the FFT pattern obtained by performing a fast Fourier transform (FFT: Fast Fourier Transform) process on the cross-section TEM. Further, for example, it can be confirmed by the diffraction pattern observed by the electron beam diffraction method.
- FFT Fast Fourier Transform
- tantalum nitride or titanium nitride may be used as the layer in contact with the insulator 130.
- tantalum nitride or titanium nitride may be used as the layer in contact with the insulator 130.
- a conductive material containing tungsten, copper, or aluminum as a main component can be used as the layer that does not contact the insulator 130.
- tantalum nitride or titanium nitride may be used as the layer in contact with the insulator 130. With such a configuration, it is possible to suppress the formation of a different layer at the interface between the insulator 130 and the conductor 120.
- a conductive material containing tungsten, copper, or aluminum as a main component can be used as the layer not in contact with the insulator 130.
- the capacitive element 100 shown in FIG. 1A has a structure in which the conductor 110, the insulator 130, and the conductor 120 have all the side surfaces thereof, but the present invention is not limited to this.
- the side surface of the conductor 110 may be located inside the side surface of the insulator 130 and the conductor 120.
- the insulator 130 is formed so as to cover the upper surface and the side surface of the conductor 110, and a region that does not overlap with the conductor 110 of the insulator 130 is in contact with the insulator 105.
- the outer circumference of the conductor 110 is located inside the outer circumferences of the insulator 130 and the conductor 120.
- the side surfaces of the insulator 130 and the conductor 120 may be located inside the side surface of the conductor 110.
- the outer circumferences of the insulator 130 and the conductor 120 are located inside the outer circumference of the conductor 110 in the top view.
- the insulator 130 is not formed in the vicinity of the step on the surface to be formed formed by the conductor 110, and therefore is formed in the vicinity of the step when the insulator 130 is formed.
- the capacitive element 100 can be formed by removing the region having low crystallinity. Therefore, the insulator 130 shown in FIG. 1C is in contact with the highly flat upper surface of the conductor 110 as a whole, and can have many regions with high crystallinity.
- the insulator 155 may be formed so that its side surface is located inside the side surface of the conductor 110. At this time, it is preferable that the side surfaces of the insulator 130, the conductor 120, and the insulator 155 are substantially aligned. Further, the insulator 152 is provided so as to cover the conductor 110, the insulator 130, the conductor 120, and the insulator 155. With this configuration, the insulator 155 can capture or fix impurities such as hydrogen contained in the insulator 130 via the conductor 120.
- the insulator 130 and the insulator 155 do not come into contact with each other, it is possible to suppress the formation of a mixed layer at the interface between the insulator 130 and the insulator 155 even when an oxide is used as the insulator 155. .. In addition, it is possible to prevent oxygen from being mixed into the insulator 130.
- the concentration of impurities in the insulator 130 can be reduced by optimizing the film forming method of the insulator 130, it may not be necessary to provide the insulator 155.
- the insulator 152 has a region in contact with each of the upper surface of the insulator 105, the side surface of the insulator 130, the side surface of the conductor 120, and the upper surface of the conductor 120. Further, the capacitive element 100 is sealed by the insulator 152 and the insulator 105. As a result, it is possible to suppress the diffusion of hydrogen from the outside of the insulator 152 and the insulator 105 to the capacitive element 100. Therefore, the ferroelectricity of the insulator 130 can be enhanced.
- the material that can have ferroelectricity that can be used for the insulator 130 is not limited to the above-mentioned metal nitride.
- a metal oxide such as hafnium oxide, zirconium oxide, and HfZrOX ( X is a real number larger than 0) may be used.
- hafnium oxide has an element J1 (the element J1 here is zirconium (Zr), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), and the like.
- a material to which one or more selected from lanthanum (La), strontium (Sr), etc. may be used.
- the ratio of the number of atoms of the hafnium atom and the element J1 can be appropriately set, and for example, the number of atoms of the hafnium atom and the element J1 may be 1: 1 or in the vicinity thereof.
- zirconium oxide has an element J2 (the element J2 here is hafnium (Hf), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), and the like.
- a material to which one or more selected from lanthanum (La), strontium (Sr), etc. may be used.
- the ratio of the number of atoms of the zirconium atom to the element J2 can be appropriately set, and for example, the number of atoms of the zirconium atom to the element J2 may be 1: 1 or close to it.
- the crystal structure of the hafnium oxide or the material having hafnium oxide and zirconium oxide may be one or more selected from cubic, tetragonal, orthorhombic, and monoclinic. good.
- lead titanate (PbTiO X ), barium titanate strontium (BST), strontium titanate, lead zirconate titanate (PZT), strontium bismuthate tantanate (SBT), A piezoelectric ceramic having a perovskite structure such as bismuth ferrite (BFO) and barium titanate may be used.
- perovskite-type oxynitrides such as SrTaO 2 N and BaTaO 2 N, GaFeO 3 having a ⁇ -alumina type structure, and the like may be used.
- metal oxides and metal nitrides have been exemplified, but the materials that can have ferroelectricity are not limited to these.
- a metal oxide nitride obtained by adding nitrogen to the above-mentioned metal oxide, or a metal nitride oxide obtained by adding oxygen to the above-mentioned metal nitride may be used.
- an insulator 105 is formed on a substrate (not shown).
- the description of the insulator 152 described later can be taken into consideration.
- the conductor 110 is formed on the insulator 105.
- the film formation of the conductor 110 is performed by a sputtering method, a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, or a pulsed laser deposition (PLD) method.
- a layer deposition (ALD: Atomic Laser Deposition) method or the like can be used.
- the ALD method include a thermal ALD (Thermal ALD) method in which the reaction of the precursor and the reactor is performed only by thermal energy, and a PEALD (Plasma Enhanced ALD) method using a plasma-excited reactor.
- a thermal ALD Thermal ALD
- PEALD Pasma Enhanced ALD
- titanium nitride may be formed by using the thermal ALD method.
- the conductor 110 may be appropriately patterned by using a lithography method or the like. By forming the conductor 110 in a pattern before forming the insulator 130, the capacitive element 100 having the structure shown in FIG. 1B or FIG. 1C can be formed.
- the surface on which the conductor 110 is formed also referred to as the formed surface
- the upper surface of the conductor 110 has high flatness.
- the surface on which the conductor 110 is formed or the upper surface of the conductor 110 may be flattened by a flattening treatment using a chemical mechanical polishing (CMP) method or the like in order to improve the flatness.
- CMP chemical mechanical polishing
- the crystallinity of the insulator 130 can be enhanced above the surface or, more specifically, the crystallinity of the insulator 130.
- an insulator 130 is formed on the conductor 110.
- the film formation of the insulator 130 can be performed by using a sputtering method, a CVD method, an ALD method, or the like.
- the insulator 130 can be formed on the conductor 110 with good coverage. As a result, it is possible to suppress the generation of a leak current between the upper electrode and the lower electrode of the capacitive element 100.
- the insulator 130 It is preferable to use a material capable of having ferroelectricity for the insulator 130.
- the material capable of having ferroelectricity the above-mentioned material can be used.
- the film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, still more preferably 10 nm or less (typically 2 nm or more and 9 nm or less).
- the insulator 130 When the above-mentioned metal nitride is used as the insulator 130, it is preferable to form a film by using a thermal ALD method or a PEALD method. The details of the film forming method of the insulator 130 by the ALD method will be described later.
- a material containing no hydrocarbon also referred to as Hydrogen Carbon or HC
- HC Hydrogen Carbon
- the insulator 130 may inhibit the crystallization of the insulator 130. Therefore, as described above, it is preferable to reduce the concentration of either one or both of hydrogen and carbon in the insulator 130 by using a precursor containing no hydrocarbon.
- a precursor containing no hydrocarbon a chlorine-based material can be mentioned.
- the present invention is not limited to this, and the insulator 130 can also be formed by using a precursor containing a hydrocarbon.
- impurities such as hydrogen contained in the insulator 130 are sufficiently captured or fixed by the insulator 155 to reduce the concentration of impurities such as hydrogen in the insulator.
- a sputtering method for forming a film of the insulator 130 in which the above-mentioned metal nitride is used.
- the concentration of impurities in the film can be reduced or a dense film can be formed, which is suitable for forming the insulator 130.
- the film formation of the insulator 130 by the sputtering method is preferably performed in an atmosphere containing nitrogen. Specifically, it is preferable to use nitrogen gas or a mixed gas of nitrogen and noble gas as the sputtering gas.
- the insulator 130 is formed into a film by a sputtering method, it is preferable to use a target composed of the elements contained in the insulator 130.
- the insulator 130 may be formed into a film by sputtering one target.
- a target containing the two or more kinds of elements may be used, or the target containing the two or more kinds of elements and nitrogen may be used. You may use it.
- the insulator 130 may be formed by sputtering a plurality of targets at the same time.
- the method of simultaneously sputtering a plurality of targets may be referred to as a co-sputtering method.
- a co-sputtering method For example, when the insulator 130 is composed of two or more elements and nitrogen, a first target containing a part of the two or more elements, and all other elements of the two or more elements are used. A second target containing may be used. In addition, nitrogen may be contained in one or both of the first target and the second target. Alternatively, it includes a first target containing a part of the two or more elements, a second target containing another part of the two or more elements, and all others of the two or more elements. A third target may be used. In addition, nitrogen may be contained in any one or more of the first to third targets.
- the target of the Al-Ga-Sc alloy or the Al-Ga-Sc nitride is used for forming the insulator 130 by the sputtering method.
- Target can be used.
- a metal aluminum or aluminum nitride target and a Ga-Sc nitride target may be used.
- a gallium nitride target and an Al—Sc alloy target may be used.
- a gallium nitride target, a metallic aluminum or aluminum nitride target, and a metallic scandium target may be used.
- the insulator 130 is formed by the co-sputtering method.
- the RF sputtering method is used for the aluminum nitride target having an insulating property.
- the insulator 130 contains gallium, since metallic gallium has a low melting point, a target of a nitride containing gallium or a target of an alloy containing gallium is used.
- the conductor 120 is formed on the insulator 130.
- the conductor 120 is arranged apart from the conductor 110 via the insulator 130.
- the conductor 120 may be formed into a film by using a sputtering method, an ALD method, a CVD method, or the like.
- titanium nitride may be formed by using the thermal ALD method.
- the film formation of the conductor 120 is preferably a method of forming a film while heating the substrate, such as the thermal ALD method.
- the film may be formed by setting the substrate temperature to room temperature or higher, preferably 300 ° C. or higher, more preferably 325 ° C. or higher, and further preferably 350 ° C. or higher.
- the film may be formed by setting the substrate temperature to 500 ° C. or lower, preferably 450 ° C. or lower.
- the substrate temperature may be set to about 400 ° C.
- the conductor 120 By forming the conductor 120 in the temperature range as described above, insulation is performed without performing high-temperature baking treatment (for example, heat treatment temperature of 400 ° C. or higher or 500 ° C. or higher) after the formation of the conductor 120. Ferroelectricity can be imparted to the body 130. Further, by forming the conductor 120 into a film by using the ALD method, which causes relatively little damage to the substrate as described above, it is possible to prevent the crystal structure of the insulator 130 from being excessively destroyed. The ferroelectricity of the insulator 130 can be increased.
- self-annealing to improve the crystallinity or ferroelectricity of the insulator 130 by utilizing the temperature at the time of film formation of the conductor 120 without performing the baking treatment after the film formation of the conductor 120. In some cases.
- the conductor 110, the insulator 130, and the conductor 120 are formed by the sputtering method, the conductor 110, the insulator 130, and the conductor 120 are continuously formed without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used. By forming the film without opening it to the atmosphere, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the conductor 110 and the insulator 130, and it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the vicinity of the interface between the conductor 110 and the insulator 130. , And the vicinity of the interface between the insulator 130 and the conductor 120 can be kept clean.
- the conductor 120 and the insulator 130 may be appropriately patterned by using a lithography method or the like.
- the capacitive element 100 having the structure shown in FIG. 1B can be formed.
- the capacitive element 100 having the structure shown in FIG. 1A can be formed.
- the insulator 155 is formed so as to enclose the conductor 110, the insulator 130, and the conductor 120.
- the film formation of the insulator 155 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- aluminum oxide is formed as the insulator 155 by a pulse DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.
- the insulator 155 it is preferable to use a metal oxide having an amorphous structure, for example, aluminum oxide, which has a high function of capturing or fixing hydrogen. As a result, impurities such as hydrogen contained in the insulator 130 can be captured or fixed. In particular, it is preferable to use aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 155 because hydrogen may be captured or fixed more effectively.
- the hydrogen concentration of the insulator 155 and the underlying conductor 120 is reduced by forming the insulator 155 by using a sputtering method without using a gas containing hydrogen molecules as the film forming gas. can do. As a result, more impurities such as hydrogen contained in the insulator 130 can be captured or fixed.
- the insulator 155 may have a laminated structure of two or more layers.
- a laminated film of aluminum oxide formed by the ALD method and aluminum oxide formed on the aluminum oxide by the sputtering method may be used. With such a configuration, even if pinholes or step breaks are formed in the aluminum oxide film formed by the sputtering method, the portion overlapping with them is formed by the ALD method having good coverage. It can be closed with an aluminum oxide film.
- the insulator 155 may be patterned by using a lithography method or the like. By forming a pattern of the insulator 155, the conductor 120, and the insulator 130 after the film formation of the insulator 155, the capacitive element 100 having the structure shown in FIG. 1C can be formed.
- the insulator 152 is formed so as to enclose the conductor 110, the insulator 130, the conductor 120, and the insulator 155.
- the film formation of the insulator 152 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the insulator 152 it is preferable to use silicon nitride, which has a high ability to suppress the diffusion of hydrogen.
- silicon nitride is formed as the insulator 152 by a pulse DC sputtering method in an atmosphere containing nitrogen gas.
- the hydrogen concentration of the insulator 152 and the insulator 155 as a base during the film forming can be reduced by forming the insulator 152 into a film by the sputtering method. can do.
- the insulator 152 may have a laminated structure of two or more layers.
- a laminated film of silicon nitride formed by a sputtering method and silicon nitride formed on the silicon nitride by a PEALD method may be used.
- the portion overlapping with them is formed by the ALD method having good coverage. It can be covered with a silicon nitride film.
- the heat treatment may be performed, for example, by setting the substrate temperature to 300 ° C. or higher, preferably 325 ° C. or higher, and more preferably 350 ° C. or higher. Further, for example, the substrate temperature may be set to 600 ° C. or lower, preferably 500 ° C. or lower, more preferably 450 ° C. or lower. For example, the substrate temperature may be set to about 400 ° C.
- the heat treatment time may be, for example, about 1 hour or more and 10 hours or less.
- the heat treatment can be performed in an atmosphere containing oxygen gas, nitrogen gas, or an inert gas.
- the hydrogen contained in the insulator 130 and a substance bonded to hydrogen can be desorbed and diffused from the insulator 130 to the insulator 155.
- the hydrogen and the substance bonded to hydrogen may diffuse in the conductor 120 and diffuse to the insulator 155.
- the concentration of hydrogen contained in the insulator 130 can be reduced.
- the insulator 155 and the capacitive element 100 are wrapped in the insulator 152, it is possible to suppress the diffusion of hydrogen from the outside of the insulator 152. In this way, the ferroelectricity of the insulator 130 can be increased.
- the capacitive element 100 having the insulator 130 between the conductor 110 and the conductor 120 and being wrapped in the insulator 155 and the insulator 152, as shown in FIG. 5C, can be manufactured.
- the ALD method utilizes the self-regulating properties of atoms and allows atoms to be deposited layer by layer, so ultra-thin film formation is possible, film formation into structures with a high aspect ratio is possible, pinholes, etc. It has the effects of being able to form a film with few defects, being able to form a film with excellent coverage, and being able to form a film at a low temperature.
- a first raw material gas (also called a precursor) and a second raw material gas (also called a nitride) for the reaction are alternately introduced into the chamber, and the introduction of these raw material gases is repeated to form a film. I do.
- a second raw material gas also called a nitride
- N2 , Ar or the like may be introduced into the reaction chamber together with the precursor or the nitride as a carrier purge gas.
- the carrier purge gas it is possible to suppress the adsorption of the precursor or the nitride to the inside of the pipe and the inside of the valve, and to introduce the precursor or the nitride into the reaction chamber (also called a carrier gas).
- the precursor or nitride remaining in the reaction chamber can be quickly exhausted (also called purge gas). Since it has two roles of introduction (carrier) and exhaust (purge) in this way, N2 , Ar, etc. introduced into the reaction chamber together with the precursor or the nitride are sometimes called carrier purge gas. Further, it is preferable to use the carrier purge gas because the uniformity of the formed film is improved.
- FIG. 6A shows a film formation sequence of a film of a material capable of having ferroelectricity (hereinafter referred to as a ferroelectric layer) using the ALD method.
- a ferroelectric layer a material capable of having ferroelectricity (hereinafter referred to as a ferroelectric layer) using the ALD method.
- a precursor containing aluminum (Al) can be used.
- a precursor containing scandium (Sc) can be used.
- a precursor formed of an inorganic substance (sometimes referred to as an inorganic precursor) may be used, or a precursor formed of an organic substance (sometimes referred to as an organic precursor) may be used. May be used.
- the precursor containing aluminum trimethylaluminum, triethylaluminum, triisobutylaluminum, dimethylaluminum hydride, tris (dimethylamino) aluminum, tris (diethylamino) aluminum, aluminum trichloride and the like can be used.
- the precursor 401 and the precursor 402 are formed by heating and gasifying a liquid raw material or a solid raw material. It is preferable that the precursor 401 and the precursor 402 have reduced impurities.
- the impurities include Ba, Co, Cu, Fe, Li, Mn, Na, Ni and the like.
- ammonia (NH 3 ) can be used as the nitride 405.
- the carrier purge gas 404 any one or a plurality selected from N2 , He, Ar, Kr, and Xe can be used. In this item, N 2 is used as the carrier purge gas 404.
- the carrier purge gas 404 is introduced into the reaction chamber (ON).
- the nitride agent 405 is introduced into the reaction chamber (step S01).
- the introduction of the nitride 405 is stopped (OFF), only the carrier purge gas 404 is used, and the nitride 405 remaining in the reaction chamber is purged (step S02).
- the precursor 401 is introduced into the reaction chamber to keep the pressure in the reaction chamber constant (step S03). In this way, the precursor 401 is adsorbed on the surface to be formed.
- the introduction of the precursor 401 is stopped, only the carrier purge gas 404 is used, and the precursor 401 remaining in the reaction chamber is purged (step S04).
- the nitride agent 405 is introduced into the reaction chamber (step S05).
- the precursor 401 is nitrided to form aluminum nitride.
- the introduction of the nitride 405 is stopped, only the carrier purge gas 404 is used, and the nitride 405 remaining in the reaction chamber is purged (step S06).
- the precursor 402 is introduced into the reaction chamber to keep the pressure in the reaction chamber constant (step S07). In this way, the precursor 402 is adsorbed on the nitrogen layer of the aluminum nitride.
- the introduction of the precursor 402 is stopped, only the carrier purge gas 404 is used, and the precursor 402 remaining in the reaction chamber is purged (step S08).
- the nitride 405 is introduced into the reaction chamber. By introducing the nitriding agent 405, the precursor 402 is nitrided and scandium nitride is formed on the aluminum nitride.
- steps S01 to S08 are set as one cycle, and the cycle is repeated until a desired film thickness is reached. It should be noted that steps S01 to S08 may be performed in a temperature range of 250 ° C. or higher and 450 ° C. or lower, and preferably in a temperature range of 350 ° C. or higher and 400 ° C. or lower.
- the ferroelectric layer is formed by using the PEALD method
- nitrogen (N 2 ), ammonia (NH 3 ), and nitrogen (N 2 ) and hydrogen (H 2 ) are mixed as the nitride 405.
- One or more selected from the gas may be plasma-excited and introduced into the reaction chamber.
- the mixed gas for example, a mixed gas of 95 vol% of nitrogen (N 2 ) and 5 vol% of hydrogen (H 2 ) can be used.
- the ferroelectric layer can be formed by forming a film while introducing plasma-excited nitrogen and / or ammonia.
- the nitride 405 may also serve as a carrier purge gas 404.
- nitrogen (N 2 ) is used as the carrier purge gas 404
- the nitrogen is plasma-excited by turning on the plasma generator in the step of introducing the nitride 405 (step S01 and step S05), and the nitrogen plasma is generated.
- a film having an arbitrary composition can be formed.
- a layered crystal structure can be formed by forming a film using the ALD method. Further, as described above, by forming a film using a precursor having reduced impurities, it is possible to prevent impurities from being mixed in during the film formation and hindering the formation of the layered crystal structure. As described above, by forming the insulator 130 into a layered crystal structure having high crystallinity, the insulator 130 can be given high ferroelectricity.
- the insulator 130 does not necessarily exhibit ferroelectricity immediately after film formation. As described above, the insulator 130 may exhibit ferroelectricity not immediately after film formation but after forming the conductor 120 on the insulator 130.
- a precursor containing gallium (Ga) is used in addition to the above-mentioned precursor 401 and precursor 402.
- the gallium-containing precursor an inorganic precursor or an organic precursor may be used.
- Organic precursors containing gallium include trimethylgallium, triethylgallium, tris (dimethylamide) gallium, gallium (III) acetylacetonate, tris (2,2,6,6-tetramethyl-3,5-heptandioic acid) gallium.
- Dimethylchlorogallium, diethylchlorogallium, dimethylgallium isopropoxide and the like can be used.
- halogen-based gallium compounds such as gallium trichloride, gallium tribromide, and gallium triiodide can be used.
- the nitride 405 is introduced into the reaction chamber.
- the precursor 402 is nitrided to form scandium nitride.
- the introduction of the nitride 405 is stopped, only the carrier purge gas 404 is used, and the nitride 405 remaining in the reaction chamber is purged.
- a precursor containing gallium is introduced into the reaction chamber to keep the pressure in the reaction chamber constant. In this way, the precursor containing gallium is adsorbed on the nitrogen layer of the scandium nitride.
- the introduction of the gallium-containing precursor is stopped, only the carrier purge gas 404 is used, and the gallium-containing precursor remaining in the reaction chamber is purged.
- the nitride 405 is introduced into the reaction chamber. By introducing the nitriding agent 405, the precursor containing gallium is nitrided, and gallium nitride is formed on the scandium nitride.
- One cycle is from step S01 described above to the step of purging the precursor containing gallium remaining in the reaction chamber, and the cycle is repeated until the desired film thickness is reached.
- the Al-Ga-Sc nitride can be formed into a film.
- the order of introducing the precursor 401, the precursor 402, and the precursor containing gallium into the reaction chamber is not limited to the above.
- the precursor 402 may be introduced in step S03, and the precursor 401 may be introduced in step S07.
- the introduction amount and the number of introductions (also referred to as the number of pulses) of the raw material gas are controlled.
- a precursor containing hafnium and further containing one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen can be used.
- a precursor containing zirconium and further containing one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen can be used.
- HfCl 4 is used as the precursor 401 containing hafnium
- ZrCl 4 is used as the precursor 402 containing zirconium.
- the precursor 401 is formed from a solid raw material of HfCl 4
- the precursor 402 is formed from a solid raw material of ZrCl 4 . It is preferable that these solid raw materials have reduced impurities.
- the impurities include Ba, Cd, Co, Cr, Cu, Fe, Ga, Li, Mg, Mn, Na, Ni, Sr, V, Zn and the like.
- the above impurities are preferably less than 1000 wppb.
- wppb is a unit in which the concentration of impurities converted into weight is expressed in parts per billion.
- an oxidizing gas is used instead of the nitride 405.
- the oxidizing gas any one or a plurality selected from O 2 , O 3 , N 2 O, NO 2 , H 2 O, and H 2 O 2 can be used.
- a gas containing H2O is used as the oxidizing gas.
- FIG. 6B is a schematic view of the manufacturing apparatus 900 by the ALD method.
- the manufacturing apparatus 900 has a reaction chamber 901, a gas introduction port 903, a reaction chamber inlet 904, an exhaust port 905, a wafer stage 907, and a shaft 908.
- the wafer 950 is arranged on the wafer stage 907.
- the reaction chamber 901 may be provided with a heater system for heating the inside of the reaction chamber 901, the precursor 401, the precursor 402, the nitride 405, and the carrier purge gas 404.
- the wafer stage 907 may be provided with a heater system for heating the wafer 950.
- the wafer stage 907 may be provided with a rotation mechanism that rotates horizontally with the shaft 908 as a rotation axis.
- a precursor 401, a precursor 402, a nitride 405, and a carrier purge gas 404 are introduced into the gas inlet 903 at an appropriate timing and at an appropriate flow rate in front of the gas inlet 903.
- Gas supply system is installed.
- an exhaust system having a vacuum pump is installed at the end of the exhaust port 905.
- the manufacturing device 900 shown in FIG. 6B is an ALD device called a cross-flow method.
- the flow of the precursor 401, the precursor 402, the nitride 405, and the carrier purge gas 404 in the cross-flow method will be described below.
- the precursor 401, the precursor 402, the nitride 405, and the carrier purge gas 404 flow from the gas inlet 903 to the reaction chamber 901 via the reaction chamber inlet 904, reach the wafer 950, and are exhausted through the exhaust port 905.
- the arrow shown in FIG. 6B schematically indicates the direction in which the gas flows.
- step S05 of introducing the nitride 405 into the reaction chamber 901 shown in FIG. 6A the precursor 401 adsorbed on the wafer 950 is nitrided by the nitride 405 to form aluminum nitride. Due to the structure of the manufacturing apparatus 900 of the cross-flow method, the nitride 405 reaches the wafer 950 after being in contact with the heated reaction chamber member for a long time. When the wafer stage 907 is rotated horizontally about the shaft 908, the peripheral portion of the wafer 950 reaches the nitride 405 first, so that the film thickness of the aluminum nitride becomes thicker toward the peripheral portion of the wafer 950 and the central portion becomes thicker. It becomes thinner than the peripheral part.
- the heating temperature of the reaction chamber it is necessary to set the heating temperature of the reaction chamber to an appropriate temperature in order to prevent the nitriding agent 405 from decomposing and reducing the nitriding power.
- the nitriding of the precursor 401 has been described as an example, but the same applies to the nitriding of the precursor 402.
- the film thickness uniformity in the substrate surface is preferably ⁇ 1.5% or less, more preferably ⁇ 1.0% or less. Further, if the maximum film thickness in the substrate surface-the minimum film thickness in the substrate surface is defined as RANGE, and the film thickness uniformity in the substrate surface is defined as ⁇ PNU (Percent Non Uniformity) (%), ⁇ PNU (%). ) Can be obtained by (RANGE ⁇ 100) / (2 ⁇ average value of film thickness in the substrate surface).
- an insulator 130 made of a material capable of having ferroelectricity can be formed.
- the capacitive element 100 can be made into a ferroelectric capacitor.
- the capacitive element containing a material that may have ferroelectricity.
- the capacitive element can be provided with good productivity.
- ferroelectric device according to one aspect of the present invention will be described with reference to FIGS. 7A1, 7A2, 7B1, 7B2, 7C1, 7C2, 7C3, and 7C4.
- the ferroelectric device described in this item is a modification of the ferroelectric device having the above-mentioned conductor 110, insulator 130, and conductor 120. Therefore, the conductor 110, the insulator 130, and the like. And the conductor 120, the above description can be taken into consideration.
- FIG. 7A1, FIG. 7B1, and FIG. 7C1 are circuit diagrams of a ferroelectric device according to an aspect of the present invention, respectively.
- the circuit diagram shown in FIG. 7A1 has one transistor (also referred to as a field effect transistor or FET) and one capacitive element, and the capacitive element includes a material capable of having ferroelectricity.
- the circuit diagram shown in FIG. 7B1 has one transistor and includes a material capable of having ferroelectricity in the gate insulating film of the transistor.
- the circuit diagram shown in FIG. 7C1 includes one capacitive element and a diode, and the capacitive element includes a material capable of having ferroelectricity.
- FIG. 7A1 has one transistor (also referred to as a field effect transistor or FET) and one capacitive element, and the capacitive element includes a material capable of having ferroelectricity.
- the circuit diagram shown in FIG. 7B1 has one transistor and includes a material capable of having ferroelectricity in the gate
- one capacitive element and one diode are described separately, but the present invention is not limited to this.
- one element has both the functions of one capacitive element and one diode, it is not necessary to separate the respective functions.
- an element configuration in which an insulator is provided between a pair of electrodes and a tunnel junction is used between the insulator and the electrodes can be used. ..
- the circuit diagram shown in FIG. 7A1 can be regarded as an element configuration of 1Tr1C (1 transistor, 1 capacitor), and may be referred to as FeRAM (Ferroelectric Random Access Memory) or Type 1 structure.
- the circuit diagram shown in FIG. 7B1 can be regarded as an element configuration of 1Tr (1 transistor), and may be referred to as a FeFET (Ferroelectric Field Effect Transistor) or a Type 2 structure.
- the circuit diagram shown in FIG. 7C1 can be regarded as an element configuration of one capacitor using a tunnel junction, and may be referred to as an FTJ (Feroelectric Tunnel Junction) element or a Type 3 structure.
- 7A2, 7B2, 7C2, 7C3, and 7C4 are cross-sectional views showing an example of a ferroelectric device according to an aspect of the present invention, respectively.
- white circles represent terminals.
- FIG. 7A2 is a cross-sectional view corresponding to the capacitive element shown in FIG. 7A1
- FIG. 7B2 is a cross-sectional view corresponding to a transistor including a material capable of having a ferroelectricity shown in FIG. 7B1, FIGS. 7C2 and 7C3.
- FIG. 7C4 are cross-sectional views corresponding to the capacitive element and the diode shown in FIG. 7C1, respectively.
- FIG. 7A2 has a conductor 110, an insulator 130 on the conductor 110, and a conductor 120 on the insulator 130.
- the insulator 130 preferably uses a material that can have ferroelectricity.
- the insulator 130 may be read as a dielectric or a ferroelectric substance.
- the conductor 120 may be configured to be connected to the source or drain of the transistor.
- FIG. 7B2 has an oxide 230, an insulator 130 on the oxide 230, and a conductor 120 on the insulator 130.
- the insulator 130 preferably uses a material that can have ferroelectricity. Further, in FIG. 7B2, it can be said that the oxide 230 and the insulator 130, that is, a material having a ferroelectricity, are in contact with each other. The details of the oxide 230 will be described later (see Embodiment 2).
- FIG. 7C2 has a conductor 110, an insulator 115a on the conductor 110, an insulator 130 on the insulator 115a, and a conductor 120 on the insulator 130. It can be said that FIG. 7C2 has a structure having an insulator 115a between the conductor 110 of FIG. 7A2 and the insulator 130. Further, FIG. 7C3 has a conductor 110, an insulator 130 on the conductor 110, an insulator 115b on the insulator 130, and a conductor 120 on the insulator 115b. It can be said that FIG. 7C3 has a structure having an insulator 115b between the insulator 130 of FIG. 7A2 and the conductor 120.
- FIG. 7C4 shows the conductor 110, the insulator 115a on the conductor 110, the insulator 130 on the insulator 115a, the insulator 115b on the insulator 130, and the conductor 120 on the insulator 115b.
- PE characteristic Polyization density-Electric field
- the first section is 0 (V) to 3 (V)
- the second section is 3 (V) to 0 (V)
- the third section is -Va (V) to Va.
- Va is preferably a voltage equal to or lower than the coercive electric field (Ec) in this circuit diagram.
- the insulator 115a and the insulator 115b may have different configurations in at least one of the film type, the film quality, and the film thickness.
- the insulator 115a and the insulator 115b may be of normal dielectric materials, respectively, and for example, silicon oxide, silicon nitride, silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, aluminum nitride, and the like may be used. Can be done. In particular, as the insulator 115a and the insulator 115b, a silicon nitride film is preferable. Further, the insulator 115a and the insulator 115b can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like, respectively.
- the insulator 115a and the insulator 115b it is preferable to form a film by using the PEALD method.
- a precursor containing halogens such as fluorine, chlorine, bromine and iodine.
- plasma treatment is performed in an atmosphere in which a nitride such as N 2 , N 2 O, NH 3 , NO, NO 2 , and N 2 O 2 is introduced to obtain a high-quality silicon nitride film. Can be formed.
- the insulator 130 having a metal nitride and the insulator 115a have nitrogen as a common main component. Therefore, it is possible to suppress the formation of a mixed layer at the interface between the insulator 130 and the insulator 115a and its vicinity thereof, and to improve the crystallinity of the insulator 130.
- the PEALD method may also be used to form the insulator 130.
- the manufacturing equipment can be shared.
- the insulator 130 can be continuously formed on the insulator 115a. Therefore, the insulator 115a and the insulator 130 can be continuously formed without opening to the atmosphere, and the vicinity of the interface between the insulator 115a and the insulator 130 can be kept clean.
- a material capable of having ferroelectricity that is, a metal nitride film having ferroelectricity.
- a ferroelectric device using a material that may have ferroelectricity.
- a capacitive element using a material that may have ferroelectricity.
- a transistor using a material that may have ferroelectricity.
- a capacitive element and a diode using a material capable of having ferroelectricity.
- the metal nitride film of one aspect of the present invention can be used for any one or more ferroelectric devices of capacitive elements, transistors, and diodes.
- FIGS. 7A1 and 7A2 are the same as those of the capacitive element 100 shown in FIG. 1 and the like, and the description thereof can be taken into consideration.
- the configurations shown in FIGS. 7B1 and 7B2, and FIGS. 7C1, 7C2, 7C3, and 7C4 are also partially configured (for example, oxide 230, insulator 115a, insulator 115b, etc.). ),
- the configuration according to FIG. 1 and the like can be applied. Further, the same can be applied to the following description of the present specification and the like.
- FIGS. 8A to 21C an example of a semiconductor device having a transistor 200 according to an aspect of the present invention, and an example of a semiconductor device having a transistor 200 and a capacitive element 100 according to an aspect of the present invention. , And a method for producing the same.
- the capacitive element 100 used in the semiconductor device the description relating to the capacitive element 100 shown in the first embodiment can be taken into consideration.
- FIG. 8A to 8D are a top view and a cross-sectional view of a semiconductor device having a transistor 200.
- FIG. 8A is a top view of the semiconductor device.
- 8B to 8D are cross-sectional views of the semiconductor device.
- FIG. 8B is a cross-sectional view of the portion shown by the alternate long and short dash line of A1-A2 in FIG. 8A, and is also a cross-sectional view of the transistor 200 in the channel length direction.
- FIG. 8C is a cross-sectional view of the portion shown by the alternate long and short dash line of A3-A4 in FIG. 8A, and is also a cross-sectional view of the transistor 200 in the channel width direction.
- FIG. 8D is a cross-sectional view of the portion shown by the alternate long and short dash line of A5-A6 in FIG. 8A.
- FIG. 8D In the top view of FIG. 8A, some elements are omitted for the purpose of clarifying the figure.
- the semiconductor device of one aspect of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the insulator 212, a transistor 200 on the insulator 214, and an insulator provided on the transistor 200.
- the insulator 212, the insulator 214, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 274 function as an interlayer film.
- the insulator 283 is in contact with a part of the upper surface of the insulator 214, the side surface of the insulator 275, the side surface of the insulator 280, and the side surface and the upper surface of the insulator 282.
- the transistor 200 has a semiconductor layer, a first gate, a second gate, a source, and a drain.
- Insulator 271 (insulator 271a and insulator 271b) is provided in contact with the source and drain of the transistor 200.
- the transistor 200 is an insulator 216 on the insulator 214 and a conductor 205 (conductor 205a, and a conductor 205a) arranged to be embedded in the insulator 214 and / or the insulator 216.
- Conductor 205b) insulator 222 on insulator 216, and insulator 205, insulator 224 on insulator 222, oxide 230a on insulator 224, and oxide 230b on oxide 230a.
- the insulator 252 includes an upper surface of the insulator 222, a side surface of the insulator 224, a side surface of the oxide 230a, a side surface and an upper surface of the oxide 230b, and a side surface of the conductor 242. It is in contact with the side surface of the insulator 271, the side surface of the insulator 275, the side surface of the insulator 280, and the lower surface of the insulator 250.
- the upper surface of the conductor 260 is arranged so as to substantially coincide in height with the uppermost portion of the insulator 254, the uppermost portion of the insulator 250, the uppermost portion of the insulator 252, and the upper surface of the insulator 280. Further, the insulator 282 is in contact with at least a part of the upper surface of each of the conductor 260, the insulator 252, the insulator 250, the insulator 254, and the insulator 280.
- the oxide 230a and the oxide 230b may be collectively referred to as the oxide 230.
- the conductor 242a and the conductor 242b may be collectively referred to as a conductor 242.
- the insulator 271a and the insulator 271b may be collectively referred to as an insulator 271.
- the insulator 280 and the insulator 275 are provided with an opening reaching the oxide 230b.
- Insulator 252, insulator 250, insulator 254, and conductor 260 are arranged in the opening. Further, in the channel length direction of the transistor 200, the conductor 260, the insulator 252, the insulator 250, and the insulator 254 are placed between the insulator 271a and the conductor 242a and the insulator 271b and the conductor 242b. It is provided.
- the insulator 254 has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260.
- the oxide 230 preferably has an oxide 230a arranged on the insulator 224 and an oxide 230b arranged on the oxide 230a.
- the oxide 230a By having the oxide 230a under the oxide 230b, it is possible to suppress the diffusion of impurities from the structure formed below the oxide 230a to the oxide 230b.
- the transistor 200 shows a configuration in which the oxide 230 is laminated with two layers of the oxide 230a and the oxide 230b
- the present invention is not limited to this.
- a single layer of the oxide 230b or a laminated structure of three or more layers may be provided, or each of the oxide 230a and the oxide 230b may have a laminated structure.
- the conductor 260 functions as a first gate (also referred to as a top gate) electrode, and the conductor 205 functions as a second gate (also referred to as a back gate) electrode.
- the insulator 252, the insulator 250 and the insulator 254 function as the first gate insulator, and the insulator 222 and the insulator 224 function as the second gate insulator.
- the gate insulator may be referred to as a gate insulating layer or a gate insulating film.
- the conductor 242a functions as one of the source or the drain, and the conductor 242b functions as the other of the source or the drain. Further, at least a part of the region overlapping with the conductor 260 of the oxide 230 functions as a channel forming region.
- FIG. 9A an enlarged view of the vicinity of the channel formation region in FIG. 8B is shown in FIG. 9A.
- the oxide 230b is provided so as to sandwich the region 230bc that functions as a channel forming region of the transistor 200, and the region 230ba and the region 230bb that function as a source region or a drain region. , Have.
- At least a part of the region 230bc overlaps with the conductor 260.
- the region 230bc is provided in the region between the conductor 242a and the conductor 242b.
- the region 230ba is provided so as to be superimposed on the conductor 242a
- the region 230bb is provided so as to be superimposed on the conductor 242b.
- the region 230bc that functions as a channel forming region is a high resistance region having a low carrier concentration because it has less oxygen deficiency or a lower impurity concentration than the regions 230ba and 230bb. Therefore, it can be said that the region 230bc is i-type (intrinsic) or substantially i-type.
- the region 230bc can be easily formed by performing microwave treatment in an atmosphere containing oxygen, for example.
- the microwave processing refers to processing using, for example, a device having a power source for generating high-density plasma using microwaves. Further, in the present specification and the like, microwave refers to an electromagnetic wave having a frequency of 300 MHz or more and 300 GHz or less.
- the region 230ba and the region 230bb that function as the source region or the drain region are regions where the carrier concentration is increased and the resistance is lowered due to a large oxygen deficiency or a high concentration of impurities such as hydrogen, nitrogen and metal elements. be. That is, the region 230ba and the region 230bb are n-type regions having a high carrier concentration and low resistance as compared with the region 230bc.
- the carrier concentration of the region 230 bc that functions as the channel forming region is preferably 1 ⁇ 10 18 cm -3 or less, more preferably less than 1 ⁇ 10 17 cm -3 , and 1 ⁇ 10 16 cm. It is more preferably less than -3 , still more preferably less than 1 ⁇ 10 13 cm -3 , and even more preferably less than 1 ⁇ 10 12 cm -3 .
- the lower limit of the carrier concentration in the region 230 bc that functions as the channel forming region is not particularly limited, but may be, for example, 1 ⁇ 10 -9 cm -3 .
- the carrier concentration is equal to or lower than the carrier concentration of the region 230 ba and the region 230 bb, and equal to or higher than the carrier concentration of the region 230 bc.
- Regions may be formed. That is, the region functions as a junction region between the region 230 bc and the region 230 ba or the region 230 bb.
- the hydrogen concentration may be equal to or lower than the hydrogen concentration of the region 230ba and the region 230bb, and may be equal to or higher than the hydrogen concentration of the region 230bc.
- the junction region may have an oxygen deficiency equal to or less than that of the region 230ba and the region 230bb, and may be equal to or greater than the oxygen deficiency of the region 230bc.
- FIG. 9A shows an example in which the region 230ba, the region 230bb, and the region 230bc are formed on the oxide 230b, but the present invention is not limited thereto.
- each of the above regions may be formed not only with the oxide 230b but also with the oxide 230a.
- the concentrations of the metal elements detected in each region and the impurity elements such as hydrogen and nitrogen are not limited to the stepwise changes in each region, but may be continuously changed in each region. That is, the closer the region is to the channel formation region, the lower the concentration of the metal element and the impurity elements such as hydrogen and nitrogen is sufficient.
- a metal oxide hereinafter, also referred to as an oxide semiconductor that functions as a semiconductor for the oxide 230 (oxide 230a and oxide 230b) containing a channel forming region.
- the metal oxide that functions as a semiconductor it is preferable to use one having a band gap of 2 eV or more, and more preferably one having a band gap of 2.5 eV or more. As described above, by using a metal oxide having a large bandgap, the off-current of the transistor can be reduced.
- an In-M-Zn oxide having indium, element M and zinc (element M is aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium). , Zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. (one or more) and the like may be used. Further, as the oxide 230, an In-Ga oxide, an In-Zn oxide, or an indium oxide may be used.
- the oxide 230b preferably has crystallinity.
- CAAC-OS c-axis aligned crystalline semiconductor semiconductor
- CAAC-OS is a metal oxide having a highly crystalline and dense structure and having few impurities and defects (for example, oxygen deficiency).
- the CAAC-OS is heat-treated at a temperature at which the metal oxide does not polycrystallize (for example, 400 ° C. or higher and 600 ° C. or lower), whereby CAAC-OS has a more crystalline and dense structure. Can be.
- a temperature at which the metal oxide does not polycrystallize for example, 400 ° C. or higher and 600 ° C. or lower
- the metal oxide having CAAC-OS has stable physical properties. Therefore, the metal oxide having CAAC-OS is resistant to heat and has high reliability.
- a transistor using an oxide semiconductor if impurities and oxygen deficiencies are present in the region where a channel is formed in the oxide semiconductor, the electrical characteristics are liable to fluctuate and the reliability may be deteriorated. Further, hydrogen in the vicinity of the oxygen deficiency may form a defect in which hydrogen is contained in the oxygen deficiency (hereinafter, may be referred to as VOH) to generate an electron as a carrier. Therefore, if oxygen deficiency is contained in the region where the channel is formed in the oxide semiconductor, the transistor has normal-on characteristics (the channel exists even if no voltage is applied to the gate electrode, and the current is applied to the transistor. Flowing characteristics).
- the region in which the channel is formed in the oxide semiconductor is preferably i-type (intrinsic) or substantially i-type with a reduced carrier concentration.
- excess oxygen an insulator containing oxygen desorbed by heating
- the oxide semiconductor is removed from the insulator.
- the on-current of the transistor 200 may decrease or the field effect mobility may decrease.
- the amount of oxygen supplied to the source region or the drain region varies in the surface of the substrate, so that the characteristics of the semiconductor device having the transistor vary.
- the region 230bac that functions as a channel forming region preferably has a reduced carrier concentration and is i-type or substantially i-type, but the region 230ba that functions as a source region or a drain region and The region 230bb has a high carrier concentration and is preferably n-type. That is, it is preferable to reduce oxygen deficiency and VOH in the region 230bc of the oxide semiconductor so that an excessive amount of oxygen is not supplied to the region 230ba and the region 230bb.
- a curved surface may be provided between the side surface of the oxide 230b and the upper surface of the oxide 230b in a cross-sectional view of the transistor 200 in the channel width direction. That is, the end portion of the side surface and the end portion of the upper surface may be curved (hereinafter, also referred to as a round shape).
- the radius of curvature on the curved surface is preferably larger than 0 nm, smaller than the film thickness of the oxide 230b in the region overlapping the conductor 242, or smaller than half the length of the region having no curved surface.
- the radius of curvature on the curved surface is larger than 0 nm and 20 nm or less, preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less.
- the oxide 230 preferably has a laminated structure of a plurality of oxide layers having different chemical compositions.
- the atomic number ratio of the element M to the metal element as the main component is the ratio of the element M to the metal element as the main component in the metal oxide used for the oxide 230b. It is preferably larger than the atomic number ratio.
- the atomic number ratio of the element M to In is preferably larger than the atomic number ratio of the element M to In in the metal oxide used for the oxide 230b.
- the atomic number ratio of In to the element M is preferably larger than the atomic number ratio of In to the element M in the metal oxide used for the oxide 230a.
- the oxide 230b is preferably an oxide having crystallinity such as CAAC-OS.
- Crystalline oxides such as CAAC-OS have a dense structure with high crystallinity with few impurities and defects (oxygen deficiency, etc.). Therefore, it is possible to suppress the extraction of oxygen from the oxide 230b by the source electrode or the drain electrode. As a result, oxygen can be reduced from being extracted from the oxide 230b even if heat treatment is performed, so that the transistor 200 is stable against a high temperature (so-called thermal budget) in the manufacturing process.
- the lower end of the conduction band changes gently.
- the lower end of the conduction band at the junction between the oxide 230a and the oxide 230b is continuously changed or continuously bonded. In order to do so, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b.
- the oxide 230a and the oxide 230b have a common element other than oxygen as a main component, the defect level density at the interface between the oxide 230a and the oxide 230b can be lowered.
- a mixed layer having a low defect level density can be formed.
- the oxide 230b is an In-M-Zn oxide
- the oxide 230a is an In-M-Zn oxide, an M-Zn oxide, an element M oxide, an In-Zn oxide, or an indium oxide. You may use an object or the like.
- the composition in the vicinity includes a range of ⁇ 30% of the desired atomic number ratio. Further, it is preferable to use gallium as the element M.
- the above-mentioned atomic number ratio is not limited to the atomic number ratio of the formed metal oxide, but is the atomic number ratio of the sputtering target used for forming the metal oxide. May be.
- the interface between the oxide 230 and the insulator 252 and its vicinity thereof can be provided.
- Indium contained in the oxide 230 may be unevenly distributed.
- the vicinity of the surface of the oxide 230 has an atomic number ratio close to that of indium oxide or an atomic number ratio close to that of In—Zn oxide.
- the atomic number ratio of indium in the vicinity of the surface of the oxide 230, particularly the oxide 230b, is increased, so that the field effect mobility of the transistor 200 can be improved.
- the defect level density at the interface between the oxide 230a and the oxide 230b can be lowered. Therefore, the influence of interfacial scattering on carrier conduction is reduced, and the transistor 200 can obtain a large on-current and high frequency characteristics.
- At least one of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 has impurities such as water and hydrogen from the substrate side or the transistor 200. It is preferable to function as a barrier insulating film that suppresses diffusion from above to the transistor 200.
- At least one of insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, insulator 283, and insulator 285 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, It is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as nitrogen oxide molecules ( N2O, NO, NO2, etc.) and copper atoms (the above impurities are difficult to permeate). Alternatively, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom and an oxygen molecule) (the above-mentioned oxygen is difficult to permeate).
- the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 are insulators having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.
- impurities such as water and hydrogen, and oxygen.
- aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, silicon nitride, and the like can be used.
- silicon nitride or the like which has a higher hydrogen barrier property, as in the insulator 152 shown in the previous embodiment.
- the insulator 214 As the insulator 214, the insulator 271, the insulator 282, and the insulator 285, aluminum oxide or oxidation having a high function of capturing or fixing hydrogen, similar to the insulator 155 shown in the previous embodiment. It is preferable to use magnesium or the like. This makes it possible to prevent impurities such as water and hydrogen from diffusing from the substrate side to the transistor 200 side via the insulator 212 and the insulator 214. Alternatively, it is possible to prevent impurities such as water and hydrogen from diffusing to the transistor 200 side from the interlayer insulating film or the like arranged outside the insulator 285.
- the transistor 200 has an insulator 212, an insulator 214, an insulator 271, an insulator 275, an insulator 282, an insulator 283, and an insulator 212 having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. It is preferable to have a structure surrounded by an insulator 285.
- an oxide having an amorphous structure as the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285.
- a metal oxide such as AlO x (x is an arbitrary number larger than 0) or MgO y (y is an arbitrary number larger than 0).
- an oxygen atom has a dangling bond, and the dangling bond may have a property of capturing or fixing hydrogen.
- a metal oxide having such an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, hydrogen contained in the transistor 200 or hydrogen existing around the transistor 200 is captured or fixed. be able to. In particular, it is preferable to capture or fix hydrogen contained in the channel forming region of the transistor 200.
- a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, it is possible to manufacture the transistor 200 having good characteristics and high reliability, and a semiconductor device.
- the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 preferably have an amorphous structure, but a region of a polycrystal structure is partially formed. It may be formed. Further, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 are multi-layered in which a layer having an amorphous structure and a layer having a polycrystal structure are laminated. It may be a structure. For example, a laminated structure in which a layer having a polycrystalline structure is formed on a layer having an amorphous structure may be used.
- the film formation of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 may be performed by using, for example, a sputtering method. Since the sputtering method does not require the use of molecules containing hydrogen in the film forming gas, the hydrogen concentrations of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285. Can be reduced.
- the film forming method is not limited to the sputtering method, but is limited to a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. May be used as appropriate.
- CVD chemical vapor deposition
- MBE molecular beam epitaxy
- PLD pulsed laser deposition
- ALD atomic layer deposition
- the insulator 283 may be able to mitigate the charge-up of the conductor 205, the conductor 242, the conductor 260, or the conductor 110.
- the resistivity of the insulator 212, the insulator 275, and the insulator 283 is preferably 1 ⁇ 10 10 ⁇ cm or more and 1 ⁇ 10 15 ⁇ cm or less.
- the insulator 216, the insulator 274, the insulator 280, and the insulator 285 have a lower dielectric constant than the insulator 214.
- a material having a low dielectric constant as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings.
- the conductor 205 is arranged so as to overlap the oxide 230 and the conductor 260.
- the conductor 205 is embedded in the opening formed in the insulator 216. Further, a part of the conductor 205 may be embedded in the insulator 214.
- the conductor 205 has a conductor 205a and a conductor 205b.
- the conductor 205a is provided in contact with the bottom surface and the side wall of the opening.
- the conductor 205b is provided so as to be embedded in the recess formed in the conductor 205a.
- the height of the upper surface of the conductor 205b is substantially the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216.
- the conductor 205a has a function of suppressing the diffusion of impurities such as hydrogen atom, hydrogen molecule, water molecule, nitrogen atom, nitrogen molecule, nitrogen oxide molecule ( N2O, NO, NO2 , etc.) and copper atom. It is preferable to use a conductive material having. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom and an oxygen molecule).
- the conductor 205a By using a conductive material having a function of reducing the diffusion of hydrogen for the conductor 205a, impurities such as hydrogen contained in the conductor 205b are transferred to the oxide 230 via the insulator 224, the insulator 216, and the like. It can be prevented from spreading. Further, by using a conductive material having a function of suppressing the diffusion of oxygen for the conductor 205a, it is possible to prevent the conductor 205b from being oxidized and the conductivity from being lowered. As the conductive material having a function of suppressing the diffusion of oxygen, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used. Therefore, the conductive material 205a may be a single layer or a laminated material. For example, titanium nitride may be used for the conductor 205a.
- a conductive material containing tungsten, copper, or aluminum as a main component for the conductor 205b.
- tungsten may be used for the conductor 205b.
- the conductor 205 may function as a second gate electrode.
- the threshold voltage (Vth) of the transistor 200 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260 without interlocking with the potential applied to the conductor 260.
- Vth threshold voltage
- by applying a negative potential to the conductor 205 it is possible to increase the Vth of the transistor 200 and reduce the off-current. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0 V can be made smaller than when it is not applied.
- the transistor 200 is normally placed without applying a potential to the conductor 205 and / or the conductor 260. It may be expected to be turned off (the threshold voltage of the transistor 200 is made larger than 0V). In this case, it is preferable to connect the conductor 260 and the conductor 205 so that the same potential is applied.
- the electrical resistivity of the conductor 205 is designed in consideration of the potential applied to the above-mentioned conductor 205, and the film thickness of the conductor 205 is set according to the electrical resistivity.
- the film thickness of the insulator 216 is substantially the same as that of the conductor 205.
- the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, so that the impurities can be reduced from diffusing into the oxide 230. ..
- the conductor 205 may be provided larger than the size of the region that does not overlap with the conductor 242a and the conductor 242b of the oxide 230.
- the conductor 205 extends even in a region outside the ends of the oxides 230a and 230b in the channel width direction. That is, it is preferable that the conductor 205 and the conductor 260 are superimposed via an insulator on the outside of the side surface of the oxide 230 in the channel width direction.
- the channel forming region of the oxide 230 is electrically surrounded by the electric field of the conductor 260 that functions as the first gate electrode and the electric field of the conductor 205 that functions as the second gate electrode. Can be done.
- the structure of the transistor that electrically surrounds the channel forming region by the electric fields of the first gate and the second gate is called a curved channel (S-channel) structure.
- the transistor having an S-channel structure represents the structure of a transistor that electrically surrounds the channel formation region by the electric fields of one and the other of the pair of gate electrodes.
- the S-channel structure disclosed in the present specification and the like is different from the Fin type structure and the planar type structure.
- the transistor 200 By making the transistor 200 normally off and having the above-mentioned S-Channel structure, the channel formation region can be electrically surrounded. Therefore, the transistor 200 can be regarded as a GAA (Gate All Around) structure or an LGAA (Lateral Gate All Around) structure.
- the transistor 200 By forming the transistor 200 into an S-Channel structure, a GAA structure, or an LGAA structure, the channel forming region formed at or near the interface between the oxide 230 and the gate insulating film is the entire bulk of the oxide 230. be able to.
- the transistor 200 having an S-Channel structure, a GAA structure, or an LGAA structure it is possible to obtain a so-called Bulk-Flow type in which the carrier path is used as the entire bulk.
- a Bulk-Flow type transistor structure it is possible to improve the current density flowing through the transistor, so that it is expected that the on-current of the transistor will be improved or the field effect mobility of the transistor will be improved.
- the conductor 205 is extended to function as wiring.
- the present invention is not limited to this, and a conductor that functions as wiring may be provided under the conductor 205. Further, it is not always necessary to provide one conductor 205 for each transistor. For example, the conductor 205 may be shared by a plurality of transistors.
- the conductor 205 shows a configuration in which the conductor 205a and the conductor 205b are laminated, but the present invention is not limited to this.
- the conductor 205 may be provided as a single layer or a laminated structure having three or more layers.
- the insulator 222 and the insulator 224 function as a gate insulator.
- the insulator 222 preferably has a function of suppressing the diffusion of hydrogen (for example, at least one hydrogen atom, hydrogen molecule, etc.). Further, it is preferable that the insulator 222 has a function of suppressing the diffusion of oxygen (for example, at least one oxygen atom, oxygen molecule, etc.). For example, the insulator 222 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 224.
- the insulator 222 it is preferable to use an insulator containing oxides of one or both of aluminum and hafnium, which are insulating materials.
- the insulator it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
- an oxide containing hafnium and zirconium for example, hafnium zirconium oxide.
- the insulator 222 impurities such as hydrogen can be suppressed from diffusing into the inside of the transistor 200, and the generation of oxygen deficiency in the oxide 230 can be suppressed. Further, it is possible to suppress the conductor 205 from reacting with the oxygen contained in the insulator 224 and the oxide 230.
- aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator.
- these insulators may be nitrided.
- the insulator 222 may be used by laminating silicon oxide, silicon oxide or silicon nitride on these insulators.
- an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, and hafnium zirconium oxide may be used in a single layer or in a laminated state.
- a high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, and hafnium zirconium oxide.
- a substance having a high dielectric constant such as lead zirconate titanate (PZT), strontium titanate (SrTiO 3 ), (Ba, Sr) TiO 3 (BST) may be used.
- silicon oxide, silicon oxynitride, or the like may be appropriately used.
- the heat treatment may be performed, for example, at 100 ° C. or higher and 600 ° C. or lower, more preferably 350 ° C. or higher and 550 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the heat treatment is preferably performed in an oxygen atmosphere. As a result, oxygen can be supplied to the oxide 230 to reduce oxygen deficiency. Further, the heat treatment may be performed in a reduced pressure state.
- the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen after the heat treatment in an atmosphere of nitrogen gas or an inert gas. good.
- the heat treatment may be performed in an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more, and then continuously heat-treated in an atmosphere of nitrogen gas or an inert gas.
- the oxygen deficiency in the oxide 230 can be repaired by the supplied oxygen, in other words, the reaction "VO + O ⁇ null" can be promoted. .. Further, the oxygen supplied to the hydrogen remaining in the oxide 230 reacts, so that the hydrogen can be removed (dehydrated) as H2O . As a result, it is possible to suppress the hydrogen remaining in the oxide 230 from being recombined with the oxygen deficiency to form VOH.
- the insulator 222 and the insulator 224 may have a laminated structure of two or more layers.
- the laminated structure is not limited to the same material, and may be a laminated structure made of different materials.
- the insulator 224 may be formed in an island shape by superimposing on the oxide 230a. In this case, the insulator 275 is in contact with the side surface of the insulator 224 and the upper surface of the insulator 222.
- the conductor 242a and the conductor 242b are provided in contact with the upper surface of the oxide 230b.
- the conductor 242a and the conductor 242b function as a source electrode or a drain electrode of the transistor 200, respectively.
- Examples of the conductor 242 include a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, and the like. It is preferable to use a nitride containing titanium and aluminum. In one aspect of the invention, a nitride containing tantalum is particularly preferred. Further, for example, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like may be used. These materials are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when oxygen is absorbed.
- hydrogen contained in the oxide 230b or the like may diffuse into the conductor 242a or the conductor 242b.
- hydrogen contained in the oxide 230b or the like is likely to diffuse into the conductor 242a or the conductor 242b, and the diffused hydrogen is the conductor. It may bind to the nitrogen contained in the 242a or the conductor 242b. That is, hydrogen contained in the oxide 230b or the like may be absorbed by the conductor 242a or the conductor 242b.
- the conductor 242 it is preferable that no curved surface is formed between the side surface of the conductor 242 and the upper surface of the conductor 242.
- the cross-sectional area of the conductor 242 in the cross section in the channel width direction as shown in FIG. 8D can be increased.
- the conductivity of the conductor 242 can be increased and the on-current of the transistor 200 can be increased.
- the insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is provided in contact with the upper surface of the conductor 242b.
- the insulator 271 preferably functions as a barrier insulating film against at least oxygen. Therefore, it is preferable that the insulator 271 has a function of suppressing the diffusion of oxygen.
- the insulator 271 preferably has a function of suppressing the diffusion of oxygen more than the insulator 280.
- an insulator such as aluminum oxide or magnesium oxide may be used.
- the insulator 275 is provided so as to cover the insulator 224, the oxide 230a, the oxide 230b, the conductor 242, and the insulator 271.
- the insulator 275 preferably has a function of capturing or fixing hydrogen.
- the insulator 275 preferably contains an insulator such as silicon nitride or a metal oxide having an amorphous structure, for example, aluminum oxide or magnesium oxide. Further, for example, as the insulator 275, a laminated film of aluminum oxide and silicon nitride on the aluminum oxide may be used.
- the conductor 242 can be wrapped with the insulator having a barrier property against oxygen. That is, it is possible to prevent oxygen contained in the insulator 224 and the insulator 280 from diffusing into the conductor 242. As a result, the conductor 242 is directly oxidized by the oxygen contained in the insulator 224 and the insulator 280 to increase the resistivity and suppress the decrease in the on-current.
- the insulator 252 functions as a part of the gate insulator. As the insulator 252, it is preferable to use a barrier insulating film against oxygen. As the insulator 252, an insulator that can be used for the above-mentioned insulator 282 may be used. As the insulator 252, an insulator containing an oxide of one or both of aluminum and hafnium may be used. As the insulator, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate) and the like can be used. In this embodiment, aluminum oxide is used as the insulator 252. In this case, the insulator 252 is an insulator having at least oxygen and aluminum.
- the insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230b, the side surface of the oxide 230a, the side surface of the insulator 224, and the upper surface of the insulator 222. That is, the region overlapping the oxide 230a, the oxide 230b, and the conductor 260 of the insulator 224 is covered with the insulator 252 in the cross section in the channel width direction. Thereby, when the heat treatment or the like is performed, the desorption of oxygen by the oxide 230a and the oxide 230b can be blocked by the insulator 252 having a barrier property against oxygen.
- the insulator 280 and the insulator 250 contain an excessive amount of oxygen, it is possible to suppress the excessive supply of the oxygen to the oxide 230a and the oxide 230b. Therefore, it is possible to prevent the region 230ba and the region 230bb from being excessively oxidized through the region 230bc to cause a decrease in the on-current of the transistor 200 or a decrease in the field effect mobility.
- the insulator 252 is provided in contact with the side surfaces of the conductor 242, the insulator 271, the insulator 275, and the insulator 280. Therefore, it is possible to reduce the oxidation of the side surface of the conductor 242 and the formation of an oxide film on the side surface. As a result, it is possible to suppress a decrease in the on-current of the transistor 200 or a decrease in the field effect mobility.
- the insulator 252 needs to be provided in the opening formed in the insulator 280 or the like together with the insulator 254, the insulator 250, and the conductor 260. In order to miniaturize the transistor 200, it is preferable that the film thickness of the insulator 252 is thin.
- the film thickness of the insulator 252 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less.
- the insulator 252 may have a region having the above-mentioned film thickness at least in a part thereof.
- the film thickness of the insulator 252 is preferably thinner than the film thickness of the insulator 250. In this case, the insulator 252 may have a region having a film thickness thinner than that of the insulator 250, at least in part.
- the film In order to form a film of the insulator 252 having a thin film thickness as described above, it is preferable to form the film by using the ALD method.
- the ALD method include a thermal ALD method in which the reaction of the precursor and the reactor is performed only by thermal energy, and a PEALD method using a plasma-excited reactor. In the PEALD method, it may be preferable to use plasma because it is possible to form a film at a lower temperature.
- the ALD method utilizes the characteristics of atoms, which are self-regulating properties, and can deposit atoms layer by layer, so ultra-thin film formation is possible, film formation into structures with a high aspect ratio is possible, pinholes, etc. It has the effects of being able to form a film with few defects, being able to form a film with excellent coverage, and being able to form a film at a low temperature. Therefore, the insulator 252 can be formed on the side surface of the opening formed in the insulator 280 or the like with good coverage and with a thin film thickness as described above.
- the film provided by the ALD method may contain a large amount of impurities such as carbon as compared with the film provided by other film forming methods.
- the quantification of impurities can be performed by using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES).
- the insulator 250 functions as a part of the gate insulator.
- the insulator 250 is preferably arranged in contact with the upper surface of the insulator 252.
- the insulator 250 includes silicon oxide, silicon nitriding, silicon nitride, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide having holes, and the like. Can be used.
- silicon oxide and silicon nitride nitride are preferable because they are heat-stable.
- the insulator 250 is an insulator having at least oxygen and silicon.
- the insulator 250 preferably has a reduced concentration of impurities such as water and hydrogen in the insulator 250.
- the film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less, and more preferably 0.5 nm or more and 15.0 nm or less. In this case, the insulator 250 may have, at least in part, a region having the above-mentioned film thickness.
- FIGS. 8A to 8D show a configuration in which the insulator 250 is a single layer
- the present invention is not limited to this, and a laminated structure of two or more layers may be used.
- the insulator 250 may have a two-layer laminated structure of the insulator 250a and the insulator 250b on the insulator 250a.
- the lower insulator 250a is formed by using an insulator that easily permeates oxygen
- the upper insulator 250b is a diffusion of oxygen. It is preferable to use an insulator having a function of suppressing the above. With such a configuration, oxygen contained in the insulator 250a can be suppressed from diffusing into the conductor 260. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. Further, it is possible to suppress the oxidation of the conductor 260 by the oxygen contained in the insulator 250a.
- the insulator 250a may be provided by using a material that can be used for the above-mentioned insulator 250, and the insulator 250b may be an insulator containing an oxide of one or both of aluminum and hafnium.
- the insulator aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate) and the like can be used.
- hafnium oxide is used as the insulator 250b.
- the insulator 250b is an insulator having at least oxygen and hafnium.
- the film thickness of the insulator 250b is 0.5 nm or more and 5.0 nm or less, preferably 1.0 nm or more and 5.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less.
- the insulator 250b may have, at least in part, a region having the above-mentioned film thickness.
- an insulating material which is a high-k material having a high relative permittivity may be used for the insulator 250b.
- the gate insulator By forming the gate insulator into a laminated structure of the insulator 250a and the insulator 250b, it is possible to obtain a laminated structure that is stable against heat and has a high relative permittivity. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. Further, it is possible to reduce the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator. Therefore, the withstand voltage of the insulator 250 can be increased.
- EOT equivalent oxide film thickness
- the insulator 254 functions as a part of the gate insulator.
- silicon nitride formed by the PEALD method may be used as the insulator 254.
- the insulator 254 is an insulator having at least nitrogen and silicon.
- the insulator 254 may further have a barrier property against oxygen. As a result, oxygen contained in the insulator 250 can be suppressed from diffusing into the conductor 260.
- the insulator 254 needs to be provided in the opening formed in the insulator 280 or the like together with the insulator 252, the insulator 250, and the conductor 260. In order to miniaturize the transistor 200, it is preferable that the film thickness of the insulator 254 is thin.
- the film thickness of the insulator 254 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less.
- the insulator 254 may have, at least in part, a region having the above-mentioned film thickness.
- the film thickness of the insulator 254 is preferably thinner than the film thickness of the insulator 250. In this case, the insulator 254 may have a region having a film thickness thinner than that of the insulator 250, at least in part.
- the conductor 260 functions as the first gate electrode of the transistor 200.
- the conductor 260 preferably has a conductor 260a and a conductor 260b arranged on the conductor 260a.
- the conductor 260a is preferably arranged so as to wrap the bottom surface and the side surface of the conductor 260b.
- the uppermost portion of the conductor 260 substantially coincides with the uppermost portion of the insulator 250.
- the conductor 260 is shown as a two-layer structure of the conductor 260a and the conductor 260b in FIGS. 8B and 8C, it may be a single-layer structure or a laminated structure of three or more layers.
- the conductor 260a it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atom, hydrogen molecule, water molecule, nitrogen atom, nitrogen molecule, nitrogen oxide molecule and copper atom.
- a conductive material having a function of suppressing the diffusion of oxygen for example, at least one such as an oxygen atom and an oxygen molecule.
- the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to prevent the conductor 260b from being oxidized by the oxygen contained in the insulator 250 and the conductivity from being lowered.
- the conductive material having a function of suppressing the diffusion of oxygen for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used.
- the conductor 260 also functions as wiring, it is preferable to use a conductor having high conductivity.
- a conductor having high conductivity for example, as the conductor 260b, a conductive material containing tungsten, copper, or aluminum as a main component can be used.
- the conductor 260b may have a laminated structure, for example, titanium or a laminated structure of titanium nitride and the conductive material.
- the conductor 260 is self-aligned so as to fill the opening formed in the insulator 280 or the like.
- the conductor 260 can be reliably arranged in the region between the conductor 242a and the conductor 242b without aligning the conductor 260.
- the height is preferably lower than the height of the bottom surface of the oxide 230b.
- the conductor 260 which functions as a gate electrode, covers the side surface and the upper surface of the channel forming region of the oxide 230b via an insulator 250 or the like, so that the electric field of the conductor 260 can be applied to the channel forming region of the oxide 230b. It becomes easier to act on the whole. Therefore, the on-current of the transistor 200 can be increased and the frequency characteristics can be improved.
- the difference is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, and more preferably 5 nm or more and 20 nm or less.
- the insulator 280 is provided on the insulator 275, and an opening is formed in the region where the insulator 250 and the conductor 260 are provided. Further, the upper surface of the insulator 280 may be flattened.
- the insulator 280 that functions as an interlayer film preferably has a low dielectric constant.
- a material having a low dielectric constant as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings.
- the insulator 280 is provided by using the same material as the insulator 216, for example.
- silicon oxide and silicon oxynitride are preferable because they are thermally stable.
- materials such as silicon oxide, silicon oxynitride, and silicon oxide having pores are preferable because they can easily form a region containing oxygen desorbed by heating.
- the insulator 280 preferably has an excess oxygen region or excess oxygen. Further, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced.
- impurities such as water and hydrogen in the insulator 280
- silicon oxide, silicon oxynitride, or the like may be appropriately used for the insulator 280.
- the insulator 282 preferably functions as a barrier insulating film that suppresses impurities such as water and hydrogen from diffusing into the insulator 280 from above, and preferably has a function of capturing impurities such as hydrogen. Further, the insulator 282 preferably functions as a barrier insulating film that suppresses the permeation of oxygen.
- a metal oxide having an amorphous structure for example, an insulator such as aluminum oxide may be used. In this case, the insulator 282 is an insulator having at least oxygen and aluminum.
- the insulator 282 which has a function of capturing impurities such as hydrogen in contact with the insulator 280 in the region sandwiched between the insulator 212 and the insulator 283, hydrogen contained in the insulator 280 and the like can be obtained. Impurities can be captured and the amount of hydrogen in the region can be kept constant. In particular, it is preferable to use aluminum oxide having an amorphous structure as the insulator 282 because hydrogen may be captured or fixed more effectively. This makes it possible to manufacture a transistor 200 having good characteristics and high reliability, and a semiconductor device.
- the insulator 283 functions as a barrier insulating film that suppresses impurities such as water and hydrogen from diffusing into the insulator 280 from above.
- the insulator 283 is placed on top of the insulator 282.
- a nitride containing silicon such as silicon nitride or silicon nitride oxide.
- silicon nitride formed by a sputtering method may be used as the insulator 283.
- a silicon nitride film having a high density can be formed as an insulator 283.
- silicon nitride formed by the PEALD method or the CVD method may be further laminated on the silicon nitride formed by the sputtering method.
- an insulator substrate for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used.
- the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), a resin substrate, and the like.
- the semiconductor substrate include a semiconductor substrate made of silicon and germanium, and a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide.
- the conductor substrate includes a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate and the like.
- the substrate having a metal nitride there are a substrate having a metal oxide, and the like.
- a substrate in which a conductor or a semiconductor is provided in an insulator substrate a substrate in which a conductor or an insulator is provided in a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided in a conductor substrate, and the like.
- those on which an element is provided may be used.
- Elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light emitting element, a storage element, and the like.
- Insulator examples include oxides having insulating properties, nitrides, nitride oxides, nitride oxides, metal oxides, metal oxide nitrides, metal nitride oxides and the like.
- Examples of the insulator having a high specific dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, nitrides having aluminum and hafnium, oxides having silicon and hafnium, silicon and hafnium. There are nitrides having oxides, or nitrides having silicon and hafnium.
- Examples of the insulator having a low relative permittivity include silicon oxide, silicon oxide, silicon nitride, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and empty. There are silicon oxide with pores, resin, and the like.
- the transistor using a metal oxide can stabilize the electrical characteristics of the transistor by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen.
- the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen include boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, tantalum, and zirconium. Insulations containing, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in layers.
- an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen
- Metal oxides such as tantalum oxide, and metal nitrides such as aluminum nitride, silicon nitride, and silicon nitride can be used.
- the insulator that functions as a gate insulator is preferably an insulator having a region containing oxygen that is desorbed by heating.
- the oxygen deficiency of the oxide 230 can be compensated by having the structure in which silicon oxide or silicon oxide having a region containing oxygen desorbed by heating is in contact with the oxide 230.
- Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, indium, ruthenium, iridium, strontium, and lanthanum. It is preferable to use a metal element selected from the above, an alloy containing the above-mentioned metal element as a component, an alloy in which the above-mentioned metal element is combined, or the like.
- tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like are used. Is preferable.
- tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize.
- a plurality of conductive layers formed of the above materials may be laminated and used.
- a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined.
- a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing nitrogen are combined.
- a laminated structure may be formed in which the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined.
- a laminated structure in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined is used for the conductor functioning as a gate electrode.
- a conductive material containing oxygen may be provided on the channel forming region side.
- the conductor that functions as the gate electrode it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed.
- the above-mentioned conductive material containing a metal element and nitrogen may be used.
- a conductive material containing nitrogen such as titanium nitride and tantalum nitride may be used.
- indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon were added.
- Indium tin oxide may be used.
- indium gallium zinc oxide containing nitrogen may be used.
- Metal Oxide As the oxide 230, it is preferable to use a metal oxide (oxide semiconductor) that functions as a semiconductor.
- a metal oxide oxide semiconductor
- the metal oxide applicable to the oxide 230 according to the present invention will be described.
- the metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to them, it is preferable that aluminum, gallium, yttrium, tin and the like are contained. Further, one or more kinds selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and the like may be contained.
- the metal oxide is an In-M-Zn oxide having indium, the element M, and zinc.
- the element M is aluminum, gallium, yttrium, or tin.
- Other elements applicable to the element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and the like.
- the element M a plurality of the above-mentioned elements may be combined in some cases.
- a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, the metal oxide having nitrogen may be referred to as a metal oxynitride.
- FIG. 10A is a diagram illustrating the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).
- IGZO a metal oxide containing In, Ga, and Zn
- oxide semiconductors are roughly classified into “Amorphous”, “Crystalline”, and “Crystal”.
- Amorphous includes “completable amorphous”.
- Crystalline includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite).
- single crystal, poly crystal, and compactry amorphous are excluded from the classification of “Crystalline” (excluding single crystal and poly crystal).
- “Crystal” includes single crystal and poly crystal.
- the structure in the thick frame shown in FIG. 10A is an intermediate state between "Amorphous” and “Crystal", and belongs to a new boundary region (New crystal line phase). .. That is, the structure can be rephrased as a structure completely different from the energetically unstable "Amorphous” and "Crystal".
- the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD: X-Ray Diffraction) spectrum.
- XRD X-ray diffraction
- the GIXD method is also referred to as a thin film method or a Seemann-Bohlin method.
- the XRD spectrum obtained by the GIXD measurement shown in FIG. 10B may be simply referred to as an XRD spectrum in the present specification.
- the thickness of the CAAC-IGZO film shown in FIG. 10B is 500 nm.
- the horizontal axis is 2 ⁇ [deg. ], And the vertical axis is intensity [a. u. ].
- a peak showing clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film.
- the crystal structure of the film or the substrate can be evaluated by a diffraction pattern (also referred to as a microelectron diffraction pattern) observed by a micro electron diffraction method (NBED: Nano Beam Electron Diffraction).
- the diffraction pattern of the CAAC-IGZO film is shown in FIG. 10C.
- FIG. 10C is a diffraction pattern observed by the NBED in which the electron beam is incident parallel to the substrate.
- electron diffraction is performed with the probe diameter set to 1 nm.
- oxide semiconductors may be classified differently from FIG. 10A.
- oxide semiconductors are divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors.
- the non-single crystal oxide semiconductor include the above-mentioned CAAC-OS and nc-OS.
- the non-single crystal oxide semiconductor includes a polycrystal oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: atomous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.
- CAAC-OS CAAC-OS
- nc-OS nc-OS
- a-like OS the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.
- CAAC-OS is an oxide semiconductor having a plurality of crystal regions, the plurality of crystal regions having the c-axis oriented in a specific direction.
- the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface to be formed of the CAAC-OS film, or the normal direction of the surface of the CAAC-OS film.
- the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region in which the lattice arrangement is aligned. Further, the CAAC-OS has a region in which a plurality of crystal regions are connected in the ab plane direction, and the region may have distortion.
- the strain refers to a region in which a plurality of crystal regions are connected in which the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another grid arrangement is aligned. That is, CAAC-OS is an oxide semiconductor that is c-axis oriented and not clearly oriented in the ab plane direction.
- Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm).
- the maximum diameter of the crystal region is less than 10 nm.
- the size of the crystal region may be about several tens of nm.
- CAAC-OS has indium (In) and oxygen. It tends to have a layered crystal structure (also referred to as a layered structure) in which a layer (hereinafter, In layer) and a layer having elements M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are laminated. There is. Indium and element M can be replaced with each other. Therefore, the (M, Zn) layer may contain indium. In addition, the In layer may contain the element M. The In layer may contain Zn.
- the layered structure is observed as a grid image, for example, in a high resolution TEM image.
- the position of the peak indicating the c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.
- a plurality of bright spots are observed in the electron diffraction pattern of the CAAC-OS film. Note that a certain spot and another spot are observed at point-symmetrical positions with the spot of the incident electron beam transmitted through the sample (also referred to as a direct spot) as the center of symmetry.
- the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit lattice is not limited to a regular hexagon and may be a non-regular hexagon. Further, in the above strain, it may have a lattice arrangement such as a pentagon or a heptagon.
- a clear grain boundary cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between the atoms changes due to the replacement of metal atoms. it is conceivable that.
- CAAC-OS for which no clear crystal grain boundary is confirmed, is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor.
- a configuration having Zn is preferable.
- In-Zn oxide and In-Ga-Zn oxide are more suitable than In oxide because they can suppress the generation of grain boundaries.
- CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries can be confirmed. Therefore, it can be said that CAAC-OS is unlikely to cause a decrease in electron mobility due to grain boundaries. Further, since the crystallinity of the oxide semiconductor may be deteriorated due to the mixing of impurities, the generation of defects, etc., CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the oxide semiconductor having CAAC-OS has stable physical properties. Therefore, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability. CAAC-OS is also stable against high temperatures (so-called thermal budgets) in the manufacturing process. Therefore, if CAAC-OS is used for the OS transistor, the degree of freedom in the manufacturing process can be expanded.
- nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less).
- nc-OS has tiny crystals. Since the size of the minute crystal is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystal is also referred to as a nanocrystal.
- nc-OS has no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film.
- nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductor depending on the analysis method.
- a peak indicating crystallinity is not detected in the Out-of-plane XRD measurement using a ⁇ / 2 ⁇ scan.
- electron beam diffraction also referred to as limited field electron diffraction
- a diffraction pattern such as a halo pattern is performed. Is observed.
- electron diffraction also referred to as nanobeam electron diffraction
- an electron beam having a probe diameter for example, 1 nm or more and 30 nm or less
- An electron diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be acquired.
- the a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor.
- the a-like OS has a void or low density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS.
- a-like OS has a higher hydrogen concentration in the membrane than nc-OS and CAAC-OS.
- CAC-OS relates to the material composition.
- CAC-OS is, for example, a composition of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof.
- the metal oxide one or more metal elements are unevenly distributed, and the region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size in the vicinity thereof.
- the mixed state is also called a mosaic shape or a patch shape.
- the CAC-OS has a structure in which the material is separated into a first region and a second region to form a mosaic, and the first region is distributed in the film (hereinafter, also referred to as a cloud shape). It is said.). That is, the CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.
- the atomic number ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are expressed as [In], [Ga], and [Zn], respectively.
- the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film.
- the second region is a region in which [Ga] is larger than [Ga] in the composition of the CAC-OS film.
- the first region is a region in which [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region.
- the second region is a region in which [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.
- the first region is a region in which indium oxide, indium zinc oxide, or the like is the main component.
- the second region is a region containing gallium oxide, gallium zinc oxide, or the like as a main component. That is, the first region can be rephrased as a region containing In as a main component. Further, the second region can be rephrased as a region containing Ga as a main component.
- a region containing In as a main component (No. 1) by EDX mapping acquired by using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy). It can be confirmed that the region (1 region) and the region containing Ga as a main component (second region) are unevenly distributed and have a mixed structure.
- the conductivity caused by the first region and the insulating property caused by the second region act in a complementary manner to switch the switching function (On / Off function).
- the CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS for the transistor, high on -current (Ion), high field effect mobility ( ⁇ ), and good switching operation can be realized.
- Oxide semiconductors have various structures, and each has different characteristics.
- the oxide semiconductor of one aspect of the present invention has two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, CAC-OS, nc-OS, and CAAC-OS. You may.
- the oxide semiconductor as a transistor, a transistor with high field effect mobility can be realized. In addition, a highly reliable transistor can be realized.
- the carrier concentration in the channel formation region of the oxide semiconductor is 1 ⁇ 10 17 cm -3 or less, preferably 1 ⁇ 10 15 cm -3 or less, more preferably 1 ⁇ 10 13 cm -3 or less, and more preferably 1 ⁇ . It is 10 11 cm -3 or less, more preferably 1 ⁇ 10 10 cm -3 or less, and 1 ⁇ 10 -9 cm -3 or more.
- the impurity concentration in the oxide semiconductor film may be lowered to lower the defect level density.
- a low impurity concentration and a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic.
- An oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.
- the trap level density may also be low.
- the charge captured at the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel forming region is formed in an oxide semiconductor having a high trap level density may have unstable electrical characteristics.
- Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon and the like.
- the concentration of silicon and carbon in the channel formation region of the oxide semiconductor and the concentration of silicon or carbon near the interface with the channel formation region of the oxide semiconductor is 2 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
- the oxide semiconductor contains an alkali metal or an alkaline earth metal
- defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is set to 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less. ..
- the nitrogen concentration in the channel formation region of the oxide semiconductor obtained by SIMS is 5 ⁇ 10 19 atoms / cm 3 or less, preferably 5 ⁇ 10 18 atoms / cm 3 or less, more preferably 1 ⁇ 10 18 atoms. / Cm 3 or less, more preferably 5 ⁇ 10 17 atoms / cm 3 or less.
- hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency.
- oxygen deficiency When hydrogen enters the oxygen deficiency, electrons that are carriers may be generated.
- a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable that hydrogen in the channel forming region of the oxide semiconductor is reduced as much as possible.
- the hydrogen concentration obtained by SIMS is less than 1 ⁇ 10 20 atoms / cm 3 , preferably less than 5 ⁇ 10 19 atoms / cm 3 , more preferably 1 ⁇ 10. It should be less than 19 atoms / cm 3 , more preferably less than 5 ⁇ 10 18 atoms / cm 3 , and even more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
- the semiconductor material that can be used for the oxide 230 is not limited to the above-mentioned metal oxide.
- a semiconductor material having a bandgap (a semiconductor material that is not a zero-gap semiconductor) may be used.
- a semiconductor of a simple substance element such as silicon, a compound semiconductor such as gallium arsenide, a layered substance (also referred to as an atomic layer material, a two-dimensional material, etc.) that functions as a semiconductor, and the like as a semiconductor material.
- the layered substance is a general term for a group of materials having a layered crystal structure.
- a layered crystal structure is a structure in which layers formed by covalent or ionic bonds are laminated via bonds that are weaker than covalent or ionic bonds, such as van der Waals forces.
- the layered material has high electrical conductivity in the unit layer, that is, high two-dimensional electrical conductivity.
- Chalcogenides are compounds containing chalcogens. Chalcogen is a general term for elements belonging to Group 16, and includes oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides.
- oxide 230 for example, it is preferable to use a transition metal chalcogenide that functions as a semiconductor.
- Specific transition metal chalcogenides applicable as oxide 230 include molybdenum sulfide (typically MoS 2 ), molybdenum selenate (typically MoSe 2 ), and molybdenum tellurium (typically MoTe 2 ).
- Tungsten disulfide typically WS 2
- Tungsten disulfide typically WSe 2
- Tungsten tellurium typically WTe 2
- Hafnium sulfide typically HfS 2
- Hafnium serene typically typically
- Typical examples include HfSe 2 ), zirconium sulfide (typically ZrS 2 ), and zirconium selenium (typically ZrSe 2 ).
- FIG. 11A shows a top view of the semiconductor device 500.
- the x-axis shown in FIG. 11A is parallel to the channel length direction of the transistor 200, and the y-axis is perpendicular to the x-axis.
- FIG. 11B is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line of A1-A2 shown in FIG. 11A, and is also a cross-sectional view of the transistor 200 in the channel length direction.
- 11C is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line of A3-A4 shown in FIG. 11A, and is also a cross-sectional view of the opening region 400 and its vicinity.
- some elements are omitted for the purpose of clarifying the figure.
- the same reference numerals are added to the structures having the same functions as the structures constituting the semiconductor devices shown in ⁇ Semiconductor device configuration example>.
- the materials described in detail in ⁇ Semiconductor device configuration example> can be used as the constituent materials of the semiconductor device.
- the semiconductor device 500 shown in FIGS. 11A to 11C is a modification of the semiconductor device shown in FIGS. 8A to 8D.
- the semiconductor device 500 shown in FIGS. 11A to 11C is different from the semiconductor device shown in FIGS. 8A to 8D in that the opening region 400 is formed in the insulator 282 and the insulator 280. Further, it differs from the semiconductor device shown in FIGS. 8A to 8D in that the sealing portion 265 is formed so as to surround the plurality of transistors 200.
- the semiconductor device 500 has a plurality of transistors 200 and a plurality of aperture regions 400 arranged in a matrix. Further, a plurality of conductors 260 that function as gate electrodes of the transistor 200 are provided extending in the y-axis direction.
- the opening region 400 is formed in a region that does not overlap with the oxide 230 and the conductor 260. Further, the sealing portion 265 is formed so as to surround the plurality of transistors 200, the plurality of conductors 260, and the plurality of opening regions 400.
- the number, arrangement, and size of the transistor 200, the conductor 260, and the opening region 400 are not limited to the structures shown in FIGS. 11A to 11C, and may be appropriately set according to the design of the semiconductor device 500. ..
- the sealing portion 265 is provided so as to surround the plurality of transistors 200, the insulator 216, the insulator 222, the insulator 275, the insulator 280, and the insulator 282.
- the insulator 283 is provided so as to cover the insulator 216, the insulator 222, the insulator 275, the insulator 280, and the insulator 282.
- the insulator 283 is in contact with the upper surface of the insulator 214.
- an insulator 274 is provided between the insulator 283 and the insulator 285.
- the height of the upper surface of the insulator 274 is substantially the same as that of the uppermost surface of the insulator 283.
- the same insulator as the insulator 280 can be used.
- a plurality of transistors 200 can be wrapped (sealed) with the insulator 283, the insulator 214, and the insulator 212.
- one or more of the insulator 283, the insulator 214, and the insulator 212 preferably functions as a barrier insulating film against hydrogen.
- the insulator 283, the insulator 214, and the insulator 212 having such a function may be referred to as a sealing film.
- the insulator 282 has an opening. Further, in the opening region 400, the insulator 280 may overlap with the opening of the insulator 282 and have a groove portion. The depth of the groove portion of the insulator 280 may be set so that the upper surface of the insulator 275 is exposed at the deepest, and may be, for example, about 1/4 or more and 1/2 or less of the maximum film thickness of the insulator 280.
- the insulator 283 is in contact with the side surface of the insulator 282, the side surface of the insulator 280, and the upper surface of the insulator 280 inside the opening region 400. Further, in the opening region 400, a part of the insulator 274 may be formed so as to embed the recess formed in the insulator 283. At this time, the height of the upper surface of the insulator 274 formed in the opening region 400 and the height of the uppermost surface of the insulator 283 may be substantially the same.
- hydrogen contained in the insulator 280 can be combined with oxygen and released to the outside through the opening region 400. Hydrogen combined with oxygen is released as water. Therefore, it is possible to reduce the hydrogen contained in the insulator 280 and reduce the hydrogen contained in the insulator 280 from being mixed in the oxide 230.
- the shape of the opening region 400 in the top view is substantially rectangular, but the present invention is not limited to this.
- the shape of the opening region 400 in the top view may be a rectangle, an ellipse, a circle, a rhombus, or a combination thereof.
- the area of the opening region 400 and the arrangement interval can be appropriately set according to the design of the semiconductor device including the transistor 200. For example, in a region where the density of the transistor 200 is low, the area of the opening region 400 may be increased or the arrangement interval of the opening regions 400 may be narrowed. Further, for example, in a region where the density of the transistor 200 is high, the area of the opening region 400 may be narrowed or the arrangement interval of the opening region 400 may be widened.
- FIGS. 8A to 8D ⁇ Method of manufacturing semiconductor devices> Next, a method for manufacturing the semiconductor device according to one aspect of the present invention shown in FIGS. 8A to 8D will be described with reference to FIGS. 12A to 17D.
- a in each figure shows a top view.
- B in each figure is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line in A1 to A2 in each figure, and is also a cross-sectional view in the channel length direction of the transistor 200.
- C in each figure is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line in A3 to A4 in each figure, and is also a cross-sectional view in the channel width direction of the transistor 200.
- D in each figure is a cross-sectional view of a portion shown by a dotted chain line of A5-A6 in A in each figure. In the top view of A in each figure, some elements are omitted for the purpose of clarifying the figure.
- the insulating material for forming an insulator, the conductive material for forming a conductor, or the semiconductor material for forming a semiconductor is a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD.
- the film can be formed by using a method or the like as appropriate.
- the sputtering method includes an RF sputtering method that uses a high-frequency power supply as a sputtering power supply, a DC sputtering method that uses a DC power supply, and a pulse DC sputtering method that changes the voltage applied to the electrodes in a pulsed manner.
- the RF sputtering method is mainly used when forming an insulating film
- the DC sputtering method is mainly used when forming a metal conductive film.
- the pulse DC sputtering method is mainly used when a compound such as an oxide, a nitride, or a carbide is formed into a film by the reactive sputtering method.
- the CVD method can be classified into a plasma CVD (PECVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat, an optical CVD (PhotoCVD) method using light, and the like. Further, it can be divided into a metal CVD (MCVD: Metall CVD) method and an organic metal CVD (MOCVD: Metalorganic CVD) method depending on the raw material gas used.
- PECVD plasma CVD
- TCVD Thermal CVD
- PhotoCVD PhotoCVD
- MCVD Metal CVD
- MOCVD Metalorganic CVD
- the plasma CVD method can obtain a high quality film at a relatively low temperature. Further, since the thermal CVD method does not use plasma, it is a film forming method capable of reducing plasma damage to the object to be processed. For example, wiring, electrodes, elements (transistors, capacitive elements, etc.) included in a semiconductor device may be charged up by receiving electric charges from plasma. At this time, the accumulated electric charge may destroy the wiring, electrodes, elements, and the like included in the semiconductor device. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so that the yield of the semiconductor device can be increased. Further, in the thermal CVD method, plasma damage during film formation does not occur, so that a film having few defects can be obtained.
- the ALD method a thermal ALD method in which the reaction of the precursor and the reactor is performed only by thermal energy, a PEALD method using a plasma-excited reactor, and the like can be used.
- the CVD method and ALD method are different from the sputtering method in which particles emitted from a target or the like are deposited. Therefore, it is a film forming method that is not easily affected by the shape of the object to be treated and has good step coverage.
- the ALD method has excellent step covering property and excellent thickness uniformity, and is therefore suitable for covering the surface of an opening having a high aspect ratio.
- the ALD method since the ALD method has a relatively slow film forming speed, it may be preferable to use it in combination with another film forming method such as a CVD method having a high film forming speed.
- a film having an arbitrary composition can be formed depending on the flow rate ratio of the raw material gas.
- a film having a continuously changed composition can be formed by changing the flow rate ratio of the raw material gas while forming the film.
- the time required for film formation is shortened because it does not require time for transport or pressure adjustment as compared with the case of forming a film using multiple film forming chambers. can do. Therefore, it may be possible to increase the productivity of the semiconductor device.
- a film having an arbitrary composition can be formed by simultaneously introducing a plurality of different types of precursors.
- a film having an arbitrary composition can be formed by controlling the number of cycles of each precursor.
- a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (see FIGS. 12A to 12D).
- the film formation of the insulator 212 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 212 can be reduced.
- the film formation of the insulator 212 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used.
- silicon nitride is formed as the insulator 212 by a pulse DC sputtering method using a silicon target in an atmosphere containing nitrogen gas.
- an insulator such as silicon nitride that is difficult for impurities such as water and hydrogen to permeate it is possible to suppress the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212. Further, by using an insulator such as silicon nitride that is difficult for copper to permeate as the insulator 212, even if a metal such as copper that is easily diffused is used for the conductor in the layer below the insulator 212 (not shown), the metal is used. Can be prevented from diffusing upward through the insulator 212.
- the insulator 214 is formed on the insulator 212 (see FIGS. 12A to 12D).
- the film formation of the insulator 214 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 214 can be reduced.
- the film formation of the insulator 214 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used.
- aluminum oxide is formed as the insulator 214 by a pulse DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.
- the insulator 214 it is preferable to use a metal oxide having an amorphous structure, for example, aluminum oxide, which has a high function of capturing or fixing hydrogen. As a result, hydrogen contained in the insulator 216 or the like can be captured or fixed, and the hydrogen can be prevented from diffusing into the oxide 230.
- a metal oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 214 because hydrogen may be captured or fixed more effectively. This makes it possible to manufacture a transistor 200 having good characteristics and high reliability, and a semiconductor device.
- the insulator 216 is formed on the insulator 214.
- the film formation of the insulator 216 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 216 can be reduced.
- the film formation of the insulator 216 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used.
- silicon oxide is formed as the insulator 216 by a pulse DC sputtering method using a silicon target in an atmosphere containing oxygen gas.
- the insulator 212, the insulator 214, and the insulator 216 are continuously formed without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used.
- the insulator 212, the insulator 214, and the insulator 216 are formed by reducing the amount of hydrogen in the film, and further, the amount of hydrogen mixed in the film between the film forming steps is reduced. Can be done.
- an opening reaching the insulator 214 is formed in the insulator 216.
- the opening also includes, for example, a groove, a slit, and the like. Further, the area where the opening is formed may be referred to as an opening. Although wet etching may be used to form the openings, it is preferable to use dry etching for microfabrication.
- the insulator 214 it is preferable to select an insulator that functions as an etching stopper film when the insulator 216 is etched to form a groove. For example, when silicon oxide or silicon oxide nitride is used for the insulator 216 forming the groove, silicon nitride, aluminum oxide, or hafnium oxide may be used for the insulator 214.
- a capacitively coupled plasma (CCP: Capacitively Coupled Plasma) etching apparatus having parallel plate type electrodes can be used.
- the capacitive coupling type plasma etching apparatus having a parallel plate type electrode may be configured to apply a high frequency voltage to one of the parallel plate type electrodes. Alternatively, a plurality of different high frequency voltages may be applied to one of the parallel plate type electrodes. Alternatively, a high frequency voltage having the same frequency may be applied to each of the parallel plate type electrodes. Alternatively, a high frequency voltage having a different frequency may be applied to each of the parallel plate type electrodes.
- a dry etching apparatus having a high-density plasma source can be used. As the dry etching apparatus having a high-density plasma source, for example, an inductively coupled plasma (ICP: Inductively Coupled Plasma) etching apparatus or the like can be used.
- ICP Inductively Coupled Plasma
- a conductive film to be a conductor 205a is formed. It is desirable that the conductive film contains a conductor having a function of suppressing the permeation of oxygen.
- a conductor having a function of suppressing the permeation of oxygen For example, tantalum nitride, tungsten nitride, titanium nitride and the like can be used. Alternatively, it can be a laminated film of a conductor having a function of suppressing the permeation of oxygen and a tantalum, tungsten, titanium, molybdenum, aluminum, copper or molybdenum tungsten alloy.
- the film formation of the conductive film can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- titanium nitride is formed as a conductive film to be the conductor 205a.
- a metal nitride in the lower layer of the conductor 205b, it is possible to suppress the oxidation of the conductor 205b by the insulator 216 or the like. Further, even if a metal that easily diffuses such as copper is used as the conductor 205b, it is possible to prevent the metal from diffusing out from the conductor 205a.
- a conductive film to be the conductor 205b is formed.
- the conductive film tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten alloy and the like can be used.
- the film formation of the conductive film can be performed by using a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- tungsten is formed as the conductive film.
- a part of the conductive film to be the conductor 205a and a part of the conductive film to be the conductor 205b is removed, and the insulator 216 is exposed (see FIGS. 12A to 12D).
- the conductor 205a and the conductor 205b remain only in the opening.
- a part of the insulator 216 may be removed by the CMP treatment.
- the insulator 222 is formed on the insulator 216 and the conductor 205 (see FIGS. 12A to 12D).
- the insulator 222 it is preferable to form an insulator containing an oxide of one or both of aluminum and hafnium.
- the insulator containing one or both oxides of aluminum and hafnium it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
- hafnium zirconium oxide Insulators containing oxides of one or both of aluminum and hafnium have barrier properties against oxygen, hydrogen, and water.
- the insulator 222 has a barrier property against hydrogen and water, hydrogen and water contained in the structure provided around the transistor 200 are suppressed from diffusing into the inside of the transistor 200 through the insulator 222. , The formation of oxygen deficiency in the oxide 230 can be suppressed.
- the film formation of the insulator 222 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- hafnium oxide is formed as the insulator 222 by using the ALD method.
- the heat treatment may be performed at 250 ° C. or higher and 650 ° C. or lower, preferably 300 ° C. or higher and 500 ° C. or lower, and more preferably 320 ° C. or higher and 450 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the oxygen gas may be about 20%.
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen. May be.
- the gas used in the above heat treatment is highly purified.
- the amount of water contained in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less.
- an insulating film 224A is formed on the insulator 222 (see FIGS. 12A to 12D).
- the film formation of the insulating film 224A can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- silicon oxide is formed as the insulating film 224A by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulating film 224A can be reduced. Since the insulating film 224A comes into contact with the oxide 230a in a later step, it is preferable that the hydrogen concentration is reduced in this way.
- the oxide film 230A and the oxide film 230B are formed in this order on the insulating film 224A (see FIGS. 12A to 12D). It is preferable that the oxide film 230A and the oxide film 230B are continuously formed without being exposed to the atmospheric environment. By forming the film without opening it to the atmosphere, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the oxide film 230A and the oxide film 230B, and the vicinity of the interface between the oxide film 230A and the oxide film 230B. Can be kept clean.
- the oxide film 230A and the oxide film 230B can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the sputtering method is used to form the oxide film 230A and the oxide film 230B.
- the oxide film 230A and the oxide film 230B are formed by a sputtering method
- oxygen or a mixed gas of oxygen and noble gas is used as the sputtering gas.
- the sputtering gas By increasing the proportion of oxygen contained in the sputtering gas, excess oxygen in the oxide film formed can be increased.
- the above oxide film is formed by a sputtering method, the above In—M—Zn oxide target or the like can be used.
- the proportion of oxygen contained in the sputtering gas may be 70% or more, preferably 80% or more, and more preferably 100%.
- the oxide film 230B is formed by a sputtering method, if the ratio of oxygen contained in the sputtering gas is more than 30% and 100% or less, preferably 70% or more and 100% or less, the oxygen excess type oxidation is performed. A physical semiconductor is formed. Transistors using oxygen-rich oxide semiconductors in the channel formation region can obtain relatively high reliability. However, one aspect of the present invention is not limited to this.
- the oxide film 230B is formed by a sputtering method and the ratio of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less, an oxygen-deficient oxide semiconductor is formed. To. Transistors using oxygen-deficient oxide semiconductors in the channel formation region can obtain relatively high field-effect mobilities. Further, the crystallinity of the oxide film can be improved by forming a film while heating the substrate.
- the insulating film 224A, the oxide film 230A, and the oxide film 230B are continuously formed by a sputtering method without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used. As a result, it is possible to reduce the mixing of hydrogen into the insulating film 224A, the oxide film 230A, and the oxide film 230B between the film forming steps.
- the oxide film 230A and the oxide film 230B may be formed by using the ALD method.
- a film forming method of the oxide film 230A and the oxide film 230B using the ALD method will be described. Since the film formation method using the ALD method is also described in the previous embodiment, different parts can be mainly described, and the common parts can be referred to the description of the previous embodiment. ..
- the In-M-Zn oxide that can be used for the oxide film 230A and the oxide film 230B includes a layer having indium (In) and oxygen (hereinafter, In layer), and elements M, zinc (Zn), and oxygen. It tends to have a layered crystal structure in which a layer having (hereinafter, (M, Zn) layer) is laminated.
- FIG. 6C shows an example of a film forming sequence using the precursors 411 to 413 and the oxidizing gas 414 to form a film.
- the film formation sequence includes steps S11 to S13.
- a precursor containing indium can be used.
- a precursor containing the element M can be used.
- a precursor containing zinc can be used.
- Inorganic precursors or organic precursors may be used for each of the precursors 411 to 413.
- a gas applicable to the oxidizing gas described in the previous embodiment can be used.
- step S11 a step of introducing the precursor 411 and adsorbing the precursor having indium to the surface to be formed, a step of stopping the introduction of the precursor 411 and purging the excess precursor 411 in the chamber, and an oxidizing gas 414 are introduced.
- the step of oxidizing the precursor 411 to form the In layer, the step of stopping the introduction of the oxidizing gas 414, and the step of purging the excess oxidizing gas 414 in the chamber are performed in this order.
- step S12 is performed.
- step S12 a step of introducing the precursor 412 and adsorbing the precursor having the element M on the surface of the In layer, a step of stopping the introduction of the precursor 413 and purging the excess precursor 412 in the chamber, and introducing an oxidizing gas 414.
- the step of oxidizing the precursor 412 to form a layer having the element M and oxygen hereinafter referred to as M layer
- the step of stopping the oxidizing gas 414 and purging the excess oxidizing gas 414 in the chamber In order.
- step S13 is performed.
- step S13 a step of introducing the precursor 413 to adsorb the zinc-containing precursor to the surface of the M layer, a step of stopping the introduction of the precursor 413, and a step of purging the excess precursor 413 in the chamber, and introducing an oxidizing gas 414 are introduced.
- the steps to be performed are performed in order.
- an In—M—Zn oxide having a desired film thickness By repeating the cycle with steps S11 to S13 as one cycle (cycle), an In—M—Zn oxide having a desired film thickness can be formed.
- the element M or Zn may be mixed in the In layer during the film formation or due to the heat treatment after the film formation.
- In or Zn may be mixed in the M layer.
- In or Ga may be mixed in the Zn layer.
- steps S11 to S13 are performed in one cycle is not limited to one.
- the number of steps S11 to S13 in one cycle may be set so as to obtain an In—M—Zn oxide having a desired composition.
- the cycle is set to step S11, step S13, step S12, and step S13 as one cycle. It is good to repeat.
- the In—Zn oxide can be formed by repeating the cycle composed of steps S11 and S12.
- the (M, Zn) layer may be formed in step S12 by introducing the precursor 413 at the same time.
- the precursor 412 or the precursor 413 may be introduced at the same time to form an In layer containing the element M or Zn in step S11.
- the manufacturing apparatus used for the film formation by the ALD method can take into consideration the explanation of the above-described embodiment.
- the manufacturing apparatus can be standardized.
- the insulator 130 can be continuously formed on the oxide film 230B by forming the oxide film 230A and the oxide film 230B and then switching between the precursor and the oxidizing gas. can. Therefore, the oxide film 230B and the insulator 130 can be formed without opening to the atmosphere, and the vicinity of the interface between the oxide film 230B and the insulator 130 can be kept clean.
- two or more manufacturing devices used for film formation by the ALD method may be incorporated in the multi-chamber type film forming device.
- the oxide film 230A and the oxide film 230B and the ferroelectric layer may be formed by different manufacturing apparatus, the oxide film 230A and the oxide film 230B can be formed without switching between the precursor and the oxidizing gas.
- a ferroelectric layer can be continuously formed.
- the heat treatment may be performed in a temperature range in which the oxide film 230A and the oxide film 230B do not crystallize, and may be performed at 250 ° C. or higher and 650 ° C. or lower, preferably 400 ° C. or higher and 600 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the oxygen gas may be about 20%.
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen. May be.
- the gas used in the above heat treatment is highly purified.
- the amount of water contained in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less.
- hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B moves to the insulator 222 and is absorbed into the insulator 222.
- hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B diffuses into the insulator 222. Therefore, the hydrogen concentration of the insulator 222 increases, but the hydrogen concentration in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B decreases.
- the insulating film 224A functions as a gate insulator of the transistor 200, and the oxide film 230A and the oxide film 230B function as a channel forming region of the transistor 200. Therefore, the transistor 200 having the insulating film 224A, the oxide film 230A, and the oxide film 230B having the reduced hydrogen concentration is preferable because it has good reliability.
- a conductive film 242A is formed on the oxide film 230B (see FIGS. 12A to 12D).
- the film formation of the conductive film 242A can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- a sputtering method for example, as the conductive film 242A, tantalum nitride may be formed by using a sputtering method.
- the heat treatment may be performed before the film formation of the conductive film 242A.
- the heat treatment may be performed under reduced pressure to continuously form a conductive film 242A without exposure to the atmosphere.
- the water and hydrogen adsorbed on the surface of the oxide film 230B can be removed, and the water concentration and the hydrogen concentration in the oxide film 230A and the oxide film 230B can be further reduced.
- the temperature of the heat treatment is preferably 100 ° C. or higher and 400 ° C. or lower. In the present embodiment, the temperature of the heat treatment is set to 200 ° C.
- an insulating film 271A is formed on the conductive film 242A (see FIGS. 12A to 12D).
- the insulating film 271A can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- As the insulating film 271A it is preferable to use an insulating film having a function of suppressing the permeation of oxygen.
- aluminum oxide or silicon nitride may be formed as the insulating film 271A by a sputtering method.
- the conductive film 242A and the insulating film 271A are continuously formed by a sputtering method without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used.
- the conductive film 242A and the insulating film 271A can be formed by reducing the amount of hydrogen in the film, and further, it is possible to reduce the mixing of hydrogen in the film between each film forming step.
- the film to be the hard mask may be continuously formed without being exposed to the atmosphere.
- the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A are processed into an island shape by using a lithography method to form an insulator 224, an oxide 230a, an oxide 230b, and a conductive film.
- a layer 242B and an insulating layer 271B are formed (see FIGS. 13A to 13D).
- the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B are formed so that at least a part thereof overlaps with the conductor 205.
- a dry etching method or a wet etching method can be used. Processing by the dry etching method is suitable for microfabrication. Further, the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A may be processed under different conditions.
- the resist is first exposed through a mask. Next, the exposed area is removed or left with a developer to form a resist mask. Next, a conductor, a semiconductor, an insulator, or the like can be processed into a desired shape by etching the resist mask.
- a resist mask may be formed by exposing the resist using KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light, or the like. Further, an immersion technique may be used in which a liquid (for example, water) is filled between the substrate and the projection lens for exposure. Further, instead of the above-mentioned light, an electron beam or an ion beam may be used.
- the resist mask can be removed by performing a dry etching process such as ashing, performing a wet etching process, performing a wet etching process after the dry etching process, or performing a dry etching process after the wet etching process.
- a dry etching process such as ashing, performing a wet etching process, performing a wet etching process after the dry etching process, or performing a dry etching process after the wet etching process.
- a hard mask made of an insulator or a conductor may be used under the resist mask.
- a hard mask an insulating film or a conductive film to be a hard mask material is formed on the conductive film 242A, a resist mask is formed on the insulating film or a conductive film, and the hard mask material is etched to form a hard mask having a desired shape. can do.
- Etching of the conductive film 242A or the like may be performed after removing the resist mask, or may be performed while leaving the resist mask. In the latter case, the resist mask may disappear during etching.
- the hard mask may be removed by etching after etching the conductive film 242A or the like.
- the material of the hard mask does not affect the post-process or can be used in the post-process, it is not always necessary to remove the hard mask.
- the insulating layer 271B is used as a hard mask.
- the conductive layer 242B does not have a curved surface between the side surface and the upper surface as shown in FIGS. 13B to 13D.
- the conductor 242a and the conductor 242b shown in FIGS. 8B and 8D have a square end at the intersection of the side surface and the upper surface. Since the end portion where the side surface and the upper surface of the conductor 242 intersect is angular, the cross-sectional area of the conductor 242 becomes larger than that in the case where the end portion has a curved surface. As a result, the resistance of the conductor 242 is reduced, so that the on-current of the transistor 200 can be increased.
- the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may have a tapered shape.
- the tapered shape refers to a shape in which at least a part of the side surface of the structure is provided so as to be inclined with respect to the substrate surface.
- the angle formed by the inclined side surface and the substrate surface (hereinafter, may be referred to as a taper angle) is less than 90 °.
- the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may have, for example, a taper angle of 60 ° or more and less than 90 °.
- the present invention is not limited to the above, and the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be configured to be substantially perpendicular to the upper surface of the insulator 222. With such a configuration, when a plurality of transistors 200 are provided, it is possible to reduce the area and increase the density.
- the by-products generated in the etching step may be formed in layers on the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B.
- the layered by-product will be formed between the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B, and the insulator 275. Therefore, it is preferable to remove the layered by-product formed in contact with the upper surface of the insulator 222.
- the insulator 275 is formed by covering the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B.
- the insulator 275 is in close contact with the upper surface of the insulator 222 and the side surface of the insulator 224.
- the film formation of the insulator 275 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- As the insulator 275 it is preferable to use an insulating film having a function of suppressing the permeation of oxygen.
- the insulator 275 aluminum oxide may be formed into a film by a sputtering method, and silicon nitride may be formed on the aluminum oxide by a PEALD method.
- the function of suppressing the diffusion of impurities such as water and hydrogen and oxygen may be improved.
- the oxide 230a, the oxide 230b, and the conductive layer 242B can be covered with the insulator 275 and the insulating layer 271B having a function of suppressing the diffusion of oxygen. This makes it possible to reduce the direct diffusion of oxygen from the insulator 280 or the like into the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B in a later step.
- an insulating film to be the insulator 280 is formed on the insulator 275.
- the film formation of the insulating film can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- a silicon oxide film may be formed by using a sputtering method.
- an insulator 280 containing excess oxygen can be formed.
- the hydrogen concentration in the insulator 280 can be reduced.
- heat treatment may be performed before the film formation of the insulating film.
- the heat treatment may be performed under reduced pressure to continuously form the insulating film without exposing it to the atmosphere.
- the water and hydrogen adsorbed on the surface of the insulator 275 and the like are removed, and the water concentration and the hydrogen concentration in the oxide 230a, the oxide 230b, and the insulator 224 are further reduced. It can be reduced.
- the above-mentioned heat treatment conditions can be used for the heat treatment.
- the insulator 280 may have a laminated structure of silicon oxide formed by a sputtering method and silicon oxide formed on the insulator by a CVD method. Further, silicon nitride may be further laminated on top of the silicon nitride.
- the insulating film to be the insulator 280 is subjected to CMP treatment to form an insulator 280 having a flat upper surface.
- silicon nitride may be formed on the insulator 280 by, for example, a sputtering method, and CMP treatment may be performed until the silicon nitride reaches the insulator 280.
- a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B are processed to form an opening reaching the oxide 230b.
- the opening is preferably formed so as to overlap the conductor 205.
- an insulator 271a, an insulator 271b, a conductor 242a, and a conductor 242b are formed (see FIGS. 14A to 14D).
- the side surfaces of the insulator 280, the insulator 275, the insulator 271, and the conductor 242 may have a tapered shape.
- the taper angle of the insulator 280 may be larger than the taper angle of the conductor 242.
- the upper portion of the oxide 230b may be removed when the opening is formed.
- a dry etching method or a wet etching method can be used for processing a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B.
- Processing by the dry etching method is suitable for microfabrication. Further, the processing may be performed under different conditions. For example, a part of the insulator 280 is processed by a dry etching method, a part of the insulator 275 and a part of the insulating layer 271B are processed by a wet etching method, and a part of the conductive layer 242B is processed by a dry etching method. You may.
- impurities may adhere to the side surface of the oxide 230a, the upper surface and the side surface of the oxide 230b, the side surface of the conductor 242, the side surface of the insulator 280, or the diffusion of the impurities into the inside thereof.
- a step of removing such impurities may be performed. Further, the dry etching may form a damaged region on the surface of the oxide 230b. Such damaged areas may be removed.
- the impurities include an insulator 280, an insulator 275, a part of the insulating layer 271B, and a component contained in the conductive layer 242B, and a component contained in a member used in an apparatus used for forming the opening. Examples thereof include those caused by the components contained in the gas or liquid used for etching.
- the impurities include hafnium, aluminum, silicon, tantalum, fluorine, chlorine and the like.
- impurities such as aluminum or silicon inhibit the conversion of oxide 230b to CAAC-OS. Therefore, it is preferable that impurity elements such as aluminum and silicon that inhibit CAAC-OS formation are reduced or removed.
- the concentration of aluminum atoms in the oxide 230b and its vicinity may be 5.0 atomic% or less, preferably 2.0 atomic% or less, more preferably 1.5 atomic% or less, and 1.0. Atomic% or less is more preferable, and less than 0.3 atom% is further preferable.
- the region of the metal oxide that has become a pseudo-amorphous oxide semiconductor (a-like OS: atomous-like oxide semiconductor) due to the inhibition of CAAC-OS by impurities such as aluminum or silicon is defined as a non-CAAC region. May be called.
- a-like OS atomous-like oxide semiconductor
- impurities such as aluminum or silicon
- the non-CAAC region since the crystal structure is less dense, a large amount of VOH is formed, and the transistor is likely to be normally turned on. Therefore, it is preferable that the non-CAAC region of the oxide 230b is reduced or removed.
- the oxide 230b has a layered CAAC structure.
- the conductor 242a or the conductor 242b and its vicinity function as a drain. That is, it is preferable that the oxide 230b near the lower end of the conductor 242a (conductor 242b) has a CAAC structure.
- the damaged region of the oxide 230b is removed, and by having the CAAC structure, fluctuations in the electrical characteristics of the transistor 200 can be further suppressed. In addition, the reliability of the transistor 200 can be improved.
- a cleaning process is performed in order to remove impurities and the like adhering to the surface of the oxide 230b in the above etching step.
- the cleaning method include wet cleaning using a cleaning liquid (also referred to as wet etching treatment), plasma treatment using plasma, cleaning by heat treatment, and the like, and the above cleaning may be appropriately combined.
- the cleaning process may deepen the groove.
- Wet cleaning may be performed using carbonated water or an aqueous solution obtained by diluting ammonium water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. with pure water, pure water, carbonated water, or the like.
- ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water.
- these cleanings may be performed in combination as appropriate.
- an aqueous solution obtained by diluting hydrofluoric acid with pure water may be referred to as diluted hydrofluoric acid
- an aqueous solution obtained by diluting ammonia water with pure water may be referred to as diluted ammonia water.
- concentration, temperature, etc. of the aqueous solution may be appropriately adjusted depending on the impurities to be removed, the configuration of the semiconductor device to be washed, and the like.
- the ammonia concentration of the diluted ammonia water may be 0.01% or more and 5% or less, preferably 0.1% or more and 0.5% or less.
- the hydrogen fluoride concentration of the diluted hydrofluoric acid may be 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 ppm or less.
- the above cleaning treatment may be performed a plurality of times, and the cleaning liquid may be changed for each cleaning treatment.
- a treatment using diluted hydrofluoric acid or diluted aqueous ammonia may be performed as the first cleaning treatment
- a treatment using pure water or carbonated water may be performed as the second cleaning treatment.
- wet cleaning is performed using diluted ammonia water.
- impurities adhering to the surface of the oxide 230a, the oxide 230b, etc. or diffused inside can be removed. Further, the crystallinity of the oxide 230b can be enhanced.
- the heat treatment may be performed after the etching or the cleaning.
- the heat treatment may be performed at 100 ° C. or higher and 450 ° C. or lower, preferably 350 ° C. or higher and 400 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the heat treatment is preferably performed in an oxygen atmosphere.
- oxygen can be supplied to the oxide 230a and the oxide 230b to reduce the oxygen deficiency.
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment may be continuously performed in a nitrogen atmosphere without being exposed to the atmosphere.
- an insulating film 252A is formed (see FIGS. 15A to 15D).
- the insulating film 252A can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the insulating film 252A is preferably formed by using the ALD method.
- the insulating film 252A is preferably formed with a thin film thickness, and it is necessary to reduce the variation in film thickness.
- the ALD method is a film-forming method in which a precursor and a reactor (for example, an oxidizing agent) are alternately introduced, and the film thickness can be adjusted by the number of times this cycle is repeated, so that the film thickness is precise.
- the film thickness can be adjusted. Further, as shown in FIGS. 15B and 15C, the insulating film 252A needs to be formed on the bottom surface and the side surface of the opening formed in the insulator 280 or the like with good coverage. In particular, it is preferable that a film is formed on the upper surface and the side surface of the oxide 230 and the side surface of the conductor 242 with good coverage. Since the atomic layer can be deposited layer by layer on the bottom surface and the side surface of the opening, the insulating film 252A can be formed with good coverage on the opening.
- ozone (O 3 ), oxygen (O 2 ), water (H 2 O) and the like can be used as the oxidizing agent.
- oxygen (O 2 ), or the like, which does not contain hydrogen, as an oxidizing agent hydrogen diffused in the oxide 230b can be reduced.
- aluminum oxide is formed as the insulating film 252A by the thermal ALD method.
- microwave processing for example, it is preferable to use a microwave processing apparatus having a power source for generating high-density plasma using microwaves.
- the frequency of the microwave processing device may be 300 MHz or more and 300 GHz or less, preferably 2.4 GHz or more and 2.5 GHz or less, for example, 2.45 GHz.
- the electric power of the power source to which the microwave of the microwave processing apparatus is applied may be 1000 W or more and 10000 W or less, preferably 2000 W or more and 5000 W or less.
- the microwave processing device may have a power supply for applying RF to the substrate side. Further, by applying RF to the substrate side, oxygen ions generated by the high-density plasma can be efficiently guided into the oxide 230b.
- the microwave treatment is preferably performed under reduced pressure, and the pressure may be 10 Pa or more and 1000 Pa or less, preferably 300 Pa or more and 700 Pa or less.
- the treatment temperature may be 750 ° C. or lower, preferably 500 ° C. or lower, for example, about 400 ° C.
- the heat treatment may be continuously performed without exposing to the outside air.
- the heat treatment may be performed at 100 ° C. or higher and 750 ° C. or lower, preferably 300 ° C. or higher and 500 ° C. or lower.
- the microwave treatment may be performed using oxygen gas and argon gas.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be larger than 0% and 100% or less.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be larger than 0% and 50% or less.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be 10% or more and 40% or less.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be 10% or more and 30% or less.
- the carrier concentration in the region 230 bc can be reduced by performing the microwave treatment in an atmosphere containing oxygen. Further, in the microwave treatment, by preventing an excessive amount of oxygen from being introduced into the chamber, it is possible to prevent the carrier concentration from being excessively lowered in the region 230ba and the region 230bb.
- oxygen gas is turned into plasma using microwaves or high frequencies such as RF, and the oxygen plasma is applied to the region between the conductors 242a and the conductors 242b of the oxide 230b.
- the region 230bc can be irradiated with a high frequency such as microwaves or RF. That is, a microwave, a high frequency oxygen plasma such as RF, or the like can be applied to the region 230 bc.
- the VOH of the region 230 bc can be divided and hydrogen can be removed from the region 230 bc.
- the reaction “VO H ⁇ H + VO” occurs, and the VO H contained in the region 230 bc can be reduced. Therefore, oxygen deficiency and VOH in the region 230bc can be reduced, and the carrier concentration can be lowered. Further, by supplying the oxygen radical generated by the oxygen plasma or the oxygen contained in the insulator 250 to the oxygen deficiency formed in the region 230 bc, the oxygen deficiency in the region 230 bc is further reduced and the carrier concentration is increased. Can be reduced.
- a conductor 242a and a conductor 242b are provided on the region 230ba and the region 230bb shown in FIG. 9A, respectively.
- the conductor 242 functions as a shielding film against the action of microwaves, high frequencies such as RF, oxygen plasma, etc. when microwave treatment is performed in an atmosphere containing oxygen. Therefore, it is preferable that the conductor 242 has a function of shielding electromagnetic waves of 300 MHz or more and 300 GHz or less, for example, 2.4 GHz or more and 2.5 GHz or less.
- microwave treatment does not cause a reduction in VOH and an excessive amount of oxygen supply in the regions 230ba and 230bb , so that the carrier concentration in the regions 230ba and 230bb does not occur. It is possible to prevent the decrease.
- an insulator 252 having a barrier property against oxygen is provided in contact with the side surfaces of the conductor 242a and the conductor 242b. As a result, it is possible to suppress the formation of an oxide film on the side surfaces of the conductor 242a and the conductor 242b by microwave treatment.
- oxygen deficiency and VOH can be selectively removed in the region 230 bc of the oxide semiconductor to make the region 230 bc i-type or substantially i-type. Further, it is possible to suppress the supply of excess oxygen to the region 230ba and the region 230bb that function as the source region or the drain region, and maintain the state of the n-type region before the microwave treatment. As a result, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and suppress variations in the electrical characteristics of the transistor 200 within the substrate surface.
- an insulating film 250A is formed (see FIGS. 15A to 15D).
- the heat treatment may be performed before the film formation of the insulating film 250A, or the heat treatment may be performed under reduced pressure to continuously form the insulating film 250A without exposure to the atmosphere. Further, it is preferable that the heat treatment is performed in an atmosphere containing oxygen. By performing such a treatment, it is possible to remove the water and hydrogen adsorbed on the surface of the insulating film 252A and further reduce the water concentration and the hydrogen concentration in the oxide 230a and the oxide 230b. ..
- the temperature of the heat treatment is preferably 100 ° C. or higher and 400 ° C. or lower.
- the insulating film 250A can be formed by using a sputtering method, a CVD method, a PECVD method, an MBE method, a PLD method, an ALD method, or the like. Further, it is preferable that the insulating film 250A is formed by a film forming method using a gas in which hydrogen atoms are reduced or removed. Thereby, the hydrogen concentration of the insulating film 250A can be reduced. Since the insulating film 250A becomes the insulator 250 facing the oxide 230b via the insulator 252 having a thin film thickness in a later step, it is preferable that the hydrogen concentration is reduced in this way.
- silicon oxide nitride is formed as the insulating film 250A by the PECVD method.
- an insulating film to be the insulator 250b may be formed after the film formation of the insulating film 250A.
- a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like can be used for the film formation of the insulating film to be the insulator 250b.
- the insulating film to be the insulator 250b is preferably formed by using an insulator having a function of suppressing the diffusion of oxygen. With such a configuration, oxygen contained in the insulator 250a can be suppressed from diffusing into the conductor 260.
- the insulating film to be the insulator 250b can be provided by using the same material as the insulator 222.
- hafnium oxide may be formed by a thermal ALD method as an insulating film to be an insulator 250b.
- Microwave treatment may be performed after the insulating film 250A is formed.
- the microwave treatment conditions performed after the film formation of the insulating film 252A described above may be used.
- the microwave treatment may be performed after the film formation of the insulating film 250A without performing the microwave treatment performed after the film formation of the insulating film 252A.
- the insulating film to be the insulator 250b is provided as described above, microwave treatment may be performed after the insulating film 250A is formed.
- the microwave treatment conditions performed after the film formation of the insulating film 252A described above may be used.
- the microwave treatment may be performed after the film formation of the insulating film to be the insulator 250b without performing the microwave treatment performed after the film formation of the insulating film 252A or the insulating film 250A.
- the heat treatment may be performed while maintaining the reduced pressure state after each microwave treatment.
- hydrogen in the insulating film 252A, the insulating film 250A, the insulating film to be the insulator 250b, the oxide 230b, and the oxide 230a can be efficiently removed.
- a part of hydrogen may be gettered to the conductor 242 (conductor 242a and conductor 242b).
- the step of performing the heat treatment may be repeated a plurality of times while maintaining the reduced pressure state after the microwave treatment.
- the heat treatment temperature is preferably 300 ° C. or higher and 500 ° C. or lower.
- the microwave treatment that is, microwave annealing may also serve as the heat treatment. When the oxide 230b or the like is sufficiently heated by microwave annealing, the heat treatment may not be performed.
- the diffusion of hydrogen, water, impurities, etc. can be suppressed. Therefore, hydrogen, water, impurities, etc. diffuse into the oxide 230b, the oxide 230a, etc. via the insulator 252 by a post-step such as forming a film of the conductive film to be the conductor 260 or a post-treatment such as heat treatment. Can be suppressed.
- an insulating film 254A is formed (see FIGS. 15A to 15D).
- a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like can be used for the film formation of the insulating film 254A.
- the insulating film 254A is preferably formed by using the ALD method in the same manner as the insulating film 252A.
- the insulating film 254A can be formed with a thin film thickness and good coverage.
- silicon nitride is formed as the insulating film 254A by the PEALD method.
- a conductive film to be the conductor 260a and a conductive film to be the conductor 260b are formed in order.
- the film formation of the conductive film to be the conductor 260a and the conductive film to be the conductor 260b can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the ALD method is used to form titanium nitride as the conductive film to be the conductor 260a
- the CVD method is used to form tungsten as the conductive film to be the conductor 260b.
- the insulating film 252A, the insulating film 250A, the insulating film 254A, the conductive film to be the conductor 260a, and the conductive film to be the conductor 260b are polished until the insulator 280 is exposed.
- 252, insulator 250, insulator 254, and conductor 260 (conductor 260a and conductor 260b) are formed (see FIGS. 16A to 16D).
- the insulator 252 is arranged so as to cover the opening reaching the oxide 230b.
- the conductor 260 is arranged so as to embed the opening via the insulator 252, the insulator 250, and the insulator 254.
- the heat treatment may be performed under the same conditions as the above heat treatment.
- the treatment is carried out in a nitrogen atmosphere at a temperature of 400 ° C. for 1 hour.
- the heat treatment the water concentration and the hydrogen concentration in the insulator 250 and the insulator 280 can be reduced.
- the insulator 282 may be continuously formed without being exposed to the atmosphere.
- the insulator 282 is formed on the insulator 252, the insulator 250, the insulator 254, the conductor 260, and the insulator 280 (see FIGS. 16A to 16D).
- the film formation of the insulator 282 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the insulator 282 is preferably performed by using a sputtering method. By using a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 282 can be reduced.
- aluminum oxide is formed as the insulator 282 by a pulse DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.
- the pulse DC sputtering method By using the pulse DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and the film quality can be improved.
- oxygen can be added to the insulator 280 while forming the film. This allows the insulator 280 to contain excess oxygen. At this time, it is preferable to form the insulator 282 while heating the substrate.
- an etching mask is formed on the insulator 282 by a lithography method, and a part of the insulator 282, a part of the insulator 280, a part of the insulator 275, a part of the insulator 222, and the insulator 216 are formed. Is partially processed until the upper surface of the insulator 214 is exposed. Although wet etching may be used for the processing, it is preferable to use dry etching for fine processing.
- heat treatment may be performed.
- the heat treatment may be performed at 250 ° C. or higher and 650 ° C. or lower, preferably 350 ° C. or higher and 600 ° C. or lower. Further, the heat treatment is preferably lower than the heat treatment temperature performed after the oxide film 230B is formed.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas. By performing the heat treatment, a part of oxygen added to the insulator 280 diffuses into the oxide 230 via the insulator 250 and the like.
- the insulator 280 is included in the insulator 280 from the side surface of the insulator 280 formed by processing the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216. Oxygen and hydrogen combined with the oxygen can be released to the outside. Hydrogen combined with oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced.
- the insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230. Since the insulator 252 has a barrier property against oxygen, it is possible to reduce the diffusion of an excessive amount of oxygen into the oxide 230. As a result, oxygen can be supplied to the region 230 bc and its vicinity so that an excessive amount of oxygen is not supplied. Thereby, oxygen deficiency and VOH formed in the region 230 bc can be reduced while suppressing the oxidation of the side surface of the conductor 242 by excess oxygen. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be improved.
- the volume of the insulator 280 for one transistor 200 may become excessively small.
- the amount of oxygen diffused in the oxide 230 is significantly reduced. If the oxide 230 is heated in contact with an oxidative insulator (for example, an insulator 250) that does not contain sufficient oxygen, the oxygen constituting the oxide 230 may be desorbed.
- the insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230 in the region overlapping with the conductor 260 of the oxide 230.
- the insulator 252 Since the insulator 252 has a barrier property against oxygen, it is possible to reduce the desorption of oxygen from the oxide 230 even in the above heat treatment. Thereby, oxygen deficiency and VOH formed in the region 230 bc can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be improved.
- a transistor having good electrical characteristics and good reliability is formed regardless of whether the amount of oxygen supplied from the insulator 280 is large or small. Can be done. Therefore, it is possible to provide a semiconductor device in which the electrical characteristics of the transistor 200 are suppressed from being dispersed in the substrate surface.
- the insulator 283 is formed on the insulator 282 (see FIGS. 17A to 17D).
- the film formation of the insulator 283 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the insulator 283 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 283 can be reduced.
- the insulator 283 may have a multi-layer structure.
- silicon nitride may be formed into a film by a sputtering method, and silicon nitride may be formed on the silicon nitride by an ALD method.
- ALD method By wrapping the transistor 200 with the insulator 283 and the insulator 214 having high barrier properties, it is possible to prevent moisture and hydrogen from entering from the outside.
- an insulating film to be the insulator 274 is formed on the insulator 283.
- the film formation of the insulating film to be the insulator 274 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- silicon oxide is formed by a CVD method as an insulating film to be an insulator 274.
- the insulating film to be the insulator 274 is polished by CMP treatment until the insulator 283 is exposed to flatten the upper surface and form the insulator 274 (see FIGS. 17A to 17D). A part of the upper surface of the insulator 283 may be removed by the CMP treatment.
- the insulator 285 is formed on the insulator 274 and the insulator 283 (see FIGS. 8A to 8D).
- the film formation of the insulator 285 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the insulator 285 is preferably performed by using a sputtering method. By using a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 285 can be reduced.
- silicon oxide is formed as an insulator 285 by a sputtering method.
- the semiconductor device having the transistor 200 shown in FIGS. 8A to 8D can be manufactured. Further, as described above, by thoroughly removing at least one of impurities, here hydrogen, hydrocarbon, and carbon in the film of the insulator 130, a film having high purity and intrinsic ferroelectricity is formed. can do. A film having high-purity intrinsic ferroelectricity and a high-purity intrinsic oxide semiconductor have very high consistency in the manufacturing process. Therefore, it is possible to provide a method for manufacturing a semiconductor device having high productivity.
- FIG. 18A and 18B show a semiconductor device including the transistor 200 and the capacitive element 100 according to the previous embodiment.
- FIG. 18A is a top view of the semiconductor device.
- FIG. 18B is a cross-sectional view of the portion shown by the alternate long and short dash line of A1-A2 in FIG. 18A, and is also a cross-sectional view of the transistor 200 in the channel length direction.
- FIG. 18A some elements are omitted for the purpose of clarifying the figure.
- a capacitive element 100 and a conductor 246 functioning as wiring are arranged on the transistor 200.
- the area where the capacitive element 100 and the transistor 200 overlap is large in the top view. With such a configuration, the occupied area of the semiconductor device having the capacitive element 100 and the transistor 200 can be reduced. As a result, the semiconductor device can be miniaturized or highly integrated.
- the semiconductor device has conductors 240 (conductors 240a and 240b) that are electrically connected to the source and drain of the transistor 200 and function as plugs. As shown in FIG. 18B, the conductor 240a is in contact with the upper surface of the conductor 242a, and the conductor 240b is in contact with the upper surface of the conductor 242b. Further, the conductor 240a is in contact with the lower surface of the conductor 246, and the conductor 240b is in contact with the lower surface of the conductor 110.
- the insulator 241a is provided in contact with the side surface of the conductor 240a, and the insulator 241b is provided in contact with the side surface of the conductor 240b.
- the capacitive element 100 shown in FIG. 18B has the same configuration as the capacitive element 100 shown in FIG. 1A.
- the conductor 120 has a laminated structure of the conductor 120a and the conductor 120b provided in contact with the conductor 120a.
- the insulator 155 has a laminated structure of the insulator 155a and the insulator 155b provided in contact with the insulator 155a.
- the insulator 152 has a laminated structure of the insulator 152a and the insulator 152b provided in contact with the insulator 152a.
- an insulator 287 that can use the same insulator as the insulator 152 is provided instead of the insulator 105 shown in FIG. 1A.
- the conductor 120, the insulator 155, and the insulator 152 may have a single-layer structure or a structure having three or more layers, or the insulator 105 may be provided under the conductor 110. .. Further, the lower surface of the conductor 246, the lower surface of the insulator 155a, and the lower surface of the conductor 110 may be in contact with the upper surface of the insulator 285 without providing the insulator 287.
- a conductor that can be used for the conductor 120 shown in the above embodiment may be formed by using an ALD method, a CVD method, or the like.
- titanium nitride may be formed by using the thermal ALD method.
- the film formation of the conductor 120a is preferably a method of forming a film while heating the substrate, such as the thermal ALD method.
- the film may be formed by setting the substrate temperature to room temperature or higher, preferably 300 ° C. or higher, more preferably 325 ° C. or higher, and further preferably 350 ° C. or higher.
- the film may be formed by setting the substrate temperature to 500 ° C. or lower, preferably 450 ° C. or lower.
- the substrate temperature may be set to about 400 ° C.
- a conductor that can be used for the conductor 120 shown in the above embodiment may be formed by using a sputtering method, an ALD method, a CVD method, or the like.
- tungsten may be formed by using a metal CVD method.
- the insulator 155a it is preferable to form an insulator that can be used for the insulator 155 shown in the above embodiment by using an ALD method, particularly a thermal ALD method.
- an ALD method particularly a thermal ALD method.
- aluminum oxide formed by the ALD method can be used as the insulator 155a.
- the portion overlapping with them can be closed with aluminum oxide formed by the ALD method having good covering properties. can.
- an insulator that can be used for the insulator 155 shown in the above embodiment may be formed into a film by a sputtering method.
- a sputtering method aluminum oxide formed by a sputtering method can be used. Since the sputtering method does not require the use of hydrogen-containing molecules in the film-forming gas, it is possible to reduce the hydrogen concentration of the insulator 155 and the lower conductor 120. As a result, more impurities such as hydrogen contained in the insulator 130 can be captured or fixed.
- the insulator 152a may be formed by forming an insulator that can be used for the insulator 152 shown in the above embodiment by a sputtering method.
- a sputtering method silicon nitride formed by a sputtering method can be used. Since the sputtering method does not require the use of molecules containing hydrogen in the film-forming gas, it is possible to reduce the hydrogen concentration of the insulator 152a and the insulator 155 as a base during the film-forming.
- the insulator 152b it is preferable to form an insulator that can be used for the insulator 152 shown in the above embodiment by using an ALD method, particularly a PEALD method.
- an ALD method particularly a PEALD method.
- silicon nitride formed by the PEALD method can be used as the insulator 152b.
- the insulator 152b can be formed into a film with good coverage. Therefore, even if pinholes or step breaks are formed in the insulator 152a due to the unevenness of the base, hydrogen can be formed by covering them with the insulator 152b. Can be reduced from diffusing into the insulator 130 and the like.
- the capacitance element 100 is sealed by the insulator 155a, the insulator 155b, the insulator 152a, the insulator 152b, and the insulator 287.
- the insulator 155a, the insulator 155b, the insulator 152a, the insulator 152b, and the insulator 287 function as a sealing film.
- impurities such as hydrogen are suppressed from being diffused from the outside of the insulator 152b and the insulator 287 to the capacitive element 100, and the insulator 155 captures impurities such as hydrogen inside the insulator 152b and the insulator 287.
- it can be fixed and the hydrogen concentration of the insulator 130 of the capacitive element 100 can be reduced. Therefore, the ferroelectricity of the insulator 130 can be enhanced.
- the transistor 200 is also sealed by the insulator 283, the insulator 282, and the insulator 214 and the insulator 212. Therefore, when performing a heat treatment for capturing or fixing impurities such as hydrogen in the capacitive element 100 to the insulator 155, at the same time, impurities such as hydrogen in the transistor 200 are captured or fixed to the insulator 282 and the insulator 214. Can be done.
- the insulator 155a, the insulator 155b, the insulator 152a, and the insulator 152b are provided so as to enclose not only the capacitive element 100 but also the conductor 246. This makes it possible to prevent impurities such as hydrogen from diffusing into the oxide 230 via the capacitive element 100, the conductor 246, and the conductor 240 during the heat treatment. In this way, the capacitive element having high-purity intrinsic ferroelectricity with reduced impurities such as hydrogen and the high-purity intrinsic oxide semiconductor with reduced impurities such as hydrogen have very high consistency in the manufacturing process. High. Therefore, it is possible to provide a method for manufacturing a semiconductor device having high productivity.
- the conductor 240 is provided so as to embed the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 287.
- the lower surface of the conductor 240 is in contact with the upper surface of the conductor 242.
- the conductor 240 it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component.
- the conductor 240 may have a laminated structure of a first conductor having a thin film thickness provided along the side surface and the bottom surface of the opening and the second conductor on the first conductor.
- a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen is used for the first conductor arranged in the vicinity of the insulator 285 and the insulator 280.
- a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen is used for the first conductor arranged in the vicinity of the insulator 285 and the insulator 280.
- tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide and the like are preferably used.
- the conductive material having a function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or in a laminated manner.
- impurities such as water and hydrogen contained in the layer above the insulator 283 can be suppressed from being mixed into the oxide 230 through the conductor 240.
- the above-mentioned conductive material containing tungsten, copper, or aluminum as a main component may be used.
- the conductor 240 shown in FIG. 18B shows a configuration in which the first conductor and the second conductor are laminated, but the present invention is not limited to this.
- the conductor 240 may be provided as a single layer or a laminated structure having three or more layers.
- the conductor 246 may be arranged in contact with the upper surface of the conductor 240.
- the conductor 246 it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component.
- the conductor 246 may have a laminated structure, for example, titanium or titanium nitride may be laminated with the conductive material. Further, it is preferable that the conductor 246 is formed of the same material in the same layer as the conductor 110.
- the insulator 241a is provided in contact with the inner wall of the opening of the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 287, and is in contact with the side surface of the insulator 241a to conduct conductivity.
- a body 240a is provided.
- the insulator 241b is provided in contact with the inner wall of the opening of the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285 and the insulator 287, and is in contact with the side surface of the insulator 241b.
- a conductor 240b is provided.
- Each of the insulator 241a and the insulator 241b has a structure in which the first insulator is provided in contact with the inner wall of the opening, and the second insulator is further provided inside.
- a barrier insulating film that can be used for the insulator 275 or the like may be used.
- an insulator such as silicon nitride, aluminum oxide, or silicon nitride may be used. Since the insulator 241a and the insulator 241b are provided in contact with the insulator 283, the insulator 282, the insulator 275, and the insulator 271, impurities such as water and hydrogen contained in the insulator 280 and the like are contained in the conductor 240a and the conductor 240a. It is possible to suppress mixing with the oxide 230 through the conductor 240b. In particular, silicon nitride is suitable because it has a high barrier property against hydrogen. Further, it is possible to prevent oxygen contained in the insulator 280 from being absorbed by the conductor 240a and the conductor 240b.
- the first insulator in contact with the inner wall of the opening such as the insulator 280 and the second insulator inside the insulator are against oxygen. It is preferable to use a barrier insulating film in combination with a barrier insulating film against hydrogen.
- aluminum oxide formed by the ALD method may be used as the first insulator, and silicon nitride formed by the PEALD method may be used as the second insulator.
- silicon nitride formed by the PEALD method may be used as the second insulator.
- the side surface of the conductor 110 may be located inside the side surface of the insulator 130 and the conductor 120.
- the insulator 130 is formed so as to cover the upper surface and the side surface of the conductor 110, and a region that does not overlap with the conductor 110 of the insulator 130 is in contact with the insulator 287.
- the outer circumference of the conductor 110 is located inside the outer circumferences of the insulator 130 and the conductor 120.
- the conductor 110 has a single-layer structure, but the present invention is not limited to this, and the conductor 110 may have a laminated structure of two or more layers.
- the conductor 110 may have a laminated structure of two or more layers.
- FIG. 19B a two-layer laminated structure of the conductor 110a and the conductor 110b on the conductor 110a may be used.
- a conductor that can be used for the conductor 110 shown in the above embodiment may be formed by using a sputtering method, an ALD method, a CVD method, or the like.
- tungsten may be formed by using a sputtering method.
- a conductor that can be used for the conductor 110 shown in the above embodiment may be formed by using an ALD method, a CVD method, or the like.
- titanium nitride may be formed by using the thermal ALD method.
- CMP treatment or the like it is preferable that the flatness is improved by using CMP treatment or the like, as in the case of the conductor 110 shown in the previous embodiment.
- the side surfaces of the insulator 130 and the conductor 120 may be located inside the side surface of the conductor 110.
- the outer circumferences of the insulator 130 and the conductor 120 are located inside the outer circumference of the conductor 110 in the top view.
- the insulator 130 is not formed in the vicinity of the step on the surface to be formed formed by the conductor 110, so that the region having low crystallinity formed in the vicinity of the step when the insulator 130 is formed is formed. It can be removed to form the capacitive element 100. Therefore, the insulator 130 shown in FIG. 19C is in contact with the highly flat upper surface of the conductor 110 as a whole, and can have many regions with high crystallinity.
- the capacitive element 100 shown in FIG. 19C has a configuration in which the insulator 130 and the insulator 155a do not come into contact with each other.
- a metal nitride is used for the insulator 130 and a metal oxide is used for the insulator 155a, it is possible to suppress the oxidation of the insulator 130 by having such a configuration.
- the insulator 155 is configured such that the side surface thereof is located inside the side surface of the conductor 110, but the present invention is not limited to this.
- the insulator 155a and the insulator 155b can be used with the conductor 110 and the insulator 130. And may be provided so as to wrap the conductor 120.
- FIG. 18 shows a configuration in which the transistor 200 is connected to a capacitive element 100 including a material that may have ferroelectricity, but the present invention is not limited thereto.
- a material capable of having ferroelectricity may be used as the transistor 200 and the insulator provided around the transistor 200.
- a transistor having such a configuration will be described with reference to FIGS. 20A to 20C.
- the transistor 200 shown in FIGS. 20A to 20C the transistor 200 shown in FIG. 8 is further provided with a conductor 240a, a conductor 240b, a conductor 246a, a conductor 246b, an insulator 241a, and an insulator 241b. There is.
- the conductor 246a and the conductor 246b are the same conductors as the conductor 246 described above, the conductor 246a is provided in contact with the upper surface of the conductor 240a, and the conductor 246b is in contact with the upper surface of the conductor 240b. It is provided.
- the transistor 200 shown in FIG. 20A uses an insulator 130a instead of the insulator 222.
- As the insulator 130a a material that can have the same ferroelectricity as that of the insulator 130 can be used. That is, the transistor 200 shown in FIG. 20A uses a material capable of having ferroelectricity for the second gate insulator.
- the transistor 200 shown in FIG. 20B uses an insulator 130b instead of the insulator 252, the insulator 250, and the insulator 254.
- As the insulator 130b a material that can have the same ferroelectricity as that of the insulator 130 can be used. That is, the transistor 200 shown in FIG. 20B uses a material having a ferroelectricity for the first gate insulator. With such a configuration, the transistor 200 shown in FIG. 20B can function as the FeFET shown in FIG. 7B1.
- all the first gate insulators are made of ferroelectric materials, but the present invention is not limited to this.
- one or more of the insulator 252, the insulator 250a, the insulator 250b, and the insulator 254 shown in FIG. 9B may be configured by using a material capable of having ferroelectricity.
- an insulating film having a laminated structure of the insulator 252 and the insulator 130b on the insulator 252 may be provided between the oxide 230b and the conductor 260.
- an insulating film having a laminated structure of the insulator 130b and the insulator 254 on the insulator 130b may be provided between the oxide 230b and the conductor 260.
- an insulator 130c is provided on the conductor 260, and a conductor 262 is provided on the insulator 130c.
- a material that can have the same ferroelectricity as that of the insulator 130 can be used.
- a conductive material that can be used for the conductor 260 can be used.
- An insulator 282 is provided so as to cover the insulator 130c and the conductor 262. In the semiconductor device shown in FIG. 20C, it can be considered that one terminal of the ferroelectric capacitor is provided on the gate electrode of the transistor 200.
- the insulator 130a, the insulator 130b, or the insulator 130c has the insulator 212, the insulator 214, the insulator 282, and the insulator 283 together with the transistor 200. , Is sealed. This suppresses the diffusion of hydrogen from the outside of the insulator 212 and the insulator 283 to the insulator 130a, the insulator 130b, or the insulator 130c, and further insulates the hydrogen inside the insulator 212 and the insulator 283.
- the body 282 can be captured or adhered to reduce the hydrogen concentration of the insulator 130a, the insulator 130b, or the insulator 130c. Therefore, the ferroelectricity of the insulator 130a to the insulator 130c can be enhanced.
- the insulator 130 is configured to be in contact with the upper surface of the insulator 287, the upper surface and the side surface of the conductor 110, but the present invention is not limited thereto.
- the insulator 115a may be provided between the insulator 130 and the insulator 287 and the conductor 110. That is, the insulator 130 is in contact with the upper surface of the insulator 115a, and the insulator 287 and the conductor 110 are in contact with the lower surface of the insulator 115a.
- the insulator 115a the insulator 115a shown in FIG.
- the film thickness of the insulator 115a may be 0.2 nm or more and 2 nm or less, preferably 0.5 nm or more and 1 nm or less.
- the insulator 130 is configured to be in contact with the lower surface of the conductor 120, but the present invention is not limited to this.
- the insulator 115b may be provided between the insulator 130 and the conductor 120. That is, the insulator 130 is in contact with the lower surface of the insulator 115b, and the conductor 120 is in contact with the upper surface of the insulator 115b.
- the insulator 115b the insulator 115b shown in FIG. 7C3 or the like can be used in the above embodiment.
- the film thickness of the insulator 115b may be 0.2 nm or more and 2 nm or less, preferably 0.5 nm or more and 1 nm or less.
- an insulator 115a is provided between the insulator 130 and the insulator 287 and the conductor 110, and an insulator 115b is provided between the insulator 130 and the conductor 120. It may be provided.
- the capacitive element 100 shown in FIG. 21C can function as an FTJ element in which the capacitive element and the diode are connected as shown in FIGS. 7C1 and 7C4.
- the insulator 155 and the insulator 287 are in contact with each other in a region that does not overlap with the conductor 120. That is, the FTJ element is sealed by the insulator 155a, the insulator 155b, the insulator 152a, the insulator 152b, and the insulator 287.
- hydrogen is suppressed from diffusing from the outside of the insulator 152b and the insulator 287 to the insulator 130, and the insulator 155 captures or fixes the hydrogen inside the insulator 152b and the insulator 287, and the insulator
- the hydrogen concentration of 130 can be reduced. Therefore, the ferroelectricity of the insulator 130 of the FTJ element can be enhanced.
- the FTJ element shown in FIGS. 21A to 21C shows a configuration in which the conductor 240 is provided in contact with the lower surface of the conductor 110, the conductor 110 does not necessarily have to be electrically connected to the transistor 200. ..
- a new transistor can be provided.
- a semiconductor device having little variation in transistor characteristics Alternatively, one aspect of the present invention can provide a semiconductor device having good electrical characteristics. Alternatively, one aspect of the present invention can provide a semiconductor device with good reliability.
- a semiconductor device having low power consumption can be provided.
- a capacitive element containing a material capable of having ferroelectricity it is possible to provide a capacitive element containing a material capable of having ferroelectricity.
- the capacitive element can be provided with good productivity.
- the semiconductor device capable of miniaturization or high integration can be provided.
- FIG. 22 shows an example of a semiconductor device (storage device) according to one aspect of the present invention.
- the transistor 200 is provided above the transistor 300, and the capacitive element 100 is provided above the transistor 300 and the transistor 200.
- the transistor 200 the transistor 200 described in the previous embodiment can be used.
- the capacitive element 100 the capacitive element 100 described in the previous embodiment can be used.
- FIG. 22 shows an example in which the capacitive element 100 shown in FIG. 19A and the transistor 200 shown in FIG. 18B are used, but the present invention is not limited to this, and the capacitive element 100 and the transistor 200 are appropriately selected. Can be done.
- the capacitive element 100 is made of a material capable of having a ferroelectricity, which has a property that polarization is generated inside by applying an electric field from the outside and polarization remains even when the electric field is zero. This makes it possible to form a non-volatile storage element using the capacitive element 100. That is, a 1-transistor 1-capacitor type ferroelectric memory can be formed by using a capacitive element that functions as a ferroelectric capacitor and a transistor 200.
- the transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor.
- the transistor 200 has a characteristic of having a high withstand voltage. Therefore, by using an oxide semiconductor for the transistor 200, a high voltage can be applied to the transistor 200 even if the transistor 200 is miniaturized. By miniaturizing the transistor 200, the occupied area of the semiconductor device can be reduced.
- the wiring 1001 is electrically connected to the source of the transistor 300, and the wiring 1002 is electrically connected to the drain of the transistor 300. Further, the wiring 1003 is electrically connected to one of the source and drain of the transistor 200, the wiring 1004 is electrically connected to one of the first gates of the transistor 200, and the wiring 1005 is electrically connected to one of the electrodes of the capacitive element 100. The wiring 1006 is electrically connected to the second gate of the transistor 200, and the wiring 1007 is electrically connected to the gate of the transistor 300.
- the storage devices shown in FIG. 22 can form a memory cell array by arranging them in a matrix.
- the transistor 300 is provided on the substrate 311 and has a conductor 316 that functions as a gate, an insulator 315 that functions as a gate insulator, a semiconductor region 313 that is a part of the substrate 311 and a low that functions as a source region or a drain region. It has a resistance region 314a and a low resistance region 314b.
- the transistor 300 may be either a p-channel type or an n-channel type.
- the substrate 311 includes a semiconductor such as a silicon-based semiconductor in a region in which a channel of the semiconductor region 313 is formed, a region in the vicinity thereof, a low resistance region 314a serving as a source region or a drain region, a low resistance region 314b, and the like.
- a semiconductor such as a silicon-based semiconductor in a region in which a channel of the semiconductor region 313 is formed, a region in the vicinity thereof, a low resistance region 314a serving as a source region or a drain region, a low resistance region 314b, and the like.
- it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like.
- a configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may be used.
- the transistor 300 may be a HEMT (High Electro
- n-type conductivity such as arsenic and phosphorus, or p-type conductivity such as boron are imparted.
- the conductor 316 that functions as a gate electrode is a semiconductor material such as silicon, a metal material, or an alloy containing an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron.
- a conductive material such as a material or a metal oxide material can be used.
- the threshold voltage can be adjusted by changing the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride and tantalum nitride for the conductor. Further, in order to achieve both conductivity and embedding property, it is preferable to use a metal material such as tungsten and aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten in terms of heat resistance.
- the semiconductor region 313 (a part of the substrate 311) in which the channel is formed has a convex shape. Further, the side surface and the upper surface of the semiconductor region 313 are provided so as to be covered by the conductor 316 via the insulator 315.
- the conductor 316 may be made of a material that adjusts the work function. Since such a transistor 300 utilizes a convex portion of a semiconductor substrate, it is also called a FIN type transistor. In addition, it may have an insulator that is in contact with the upper part of the convex portion and functions as a mask for forming the convex portion. Further, although the case where a part of the semiconductor substrate is processed to form a convex portion is shown here, the SOI substrate may be processed to form a semiconductor film having a convex shape.
- a material capable of having ferroelectricity can be used as in the transistor 200 shown in FIGS. 20A to 20C.
- the Si transistor can function as a FeFET.
- the transistor 300 shown in FIG. 22 is an example, and the transistor 300 is not limited to the structure thereof, and an appropriate transistor may be used according to the circuit configuration or the driving method.
- a wiring layer provided with an interlayer film, wiring, a plug, and the like may be provided between the structures. Further, a plurality of wiring layers can be provided according to the design.
- the conductor having a function as a plug or wiring may collectively give a plurality of structures the same reference numeral. Further, in the present specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.
- an insulator 320, an insulator 322, an insulator 324, and an insulator 326 are laminated in this order on the transistor 300 as an interlayer film. Further, the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are embedded with a capacitive element 100, a conductor 328 electrically connected to the transistor 200, a conductor 330, and the like. The conductor 328 and the conductor 330 function as a plug or wiring.
- the insulator that functions as an interlayer film may function as a flattening film that covers the uneven shape below the insulator.
- the upper surface of the insulator 322 may be flattened by a flattening treatment using a chemical mechanical polishing (CMP) method or the like in order to improve the flatness.
- CMP chemical mechanical polishing
- a wiring layer may be provided on the insulator 326 and the conductor 330.
- the insulator 350, the insulator 352, and the insulator 354 are laminated in this order.
- a conductor 356 is formed on the insulator 350, the insulator 352, and the insulator 354. The conductor 356 functions as a plug or wiring.
- the insulator 210, the insulator 212, the insulator 214, and the insulator 216 are embedded with a conductor 218, a conductor (conductor 205) constituting the transistor 200, and the like.
- the conductor 218 has a function as a plug or wiring for electrically connecting to the capacitive element 100 or the transistor 300.
- the insulator 217 is provided in contact with the side surface of the conductor 218 that functions as a plug.
- the insulator 217 is provided in contact with the inner wall of the opening formed in the insulator 210, the insulator 212, the insulator 214, and the insulator 216. That is, the insulator 217 is provided between the conductor 218 and the insulator 210, the insulator 212, the insulator 214, and the insulator 216. Since the conductor 205 can be formed in parallel with the conductor 218, the insulator 217 may be formed in contact with the side surface of the conductor 205.
- an insulator such as silicon nitride, aluminum oxide, or silicon nitride may be used. Since the insulator 217 is provided in contact with the insulator 210, the insulator 212, the insulator 214, and the insulator 222, impurities such as water or hydrogen from the insulator 210 or the insulator 216 or the like are oxidized through the conductor 218. It is possible to suppress mixing with the object 230. In particular, silicon nitride is suitable because it has a high blocking property against hydrogen. Further, it is possible to prevent oxygen contained in the insulator 210 or the insulator 216 from being absorbed by the conductor 218.
- the insulator 217 can be formed in the same manner as the insulator 241.
- silicon nitride may be formed into a film by using the PEALD method, and an opening reaching the conductor 356 may be formed by anisotropic etching.
- an insulator 287 that functions as a barrier insulating film against hydrogen on the insulator 285. It should be noted that the insulator 287 may not be provided. For details of the insulator 285 and the insulator 287, the description of the previous embodiment can be referred to.
- the capacitive element 100 and the conductor 112 are provided on the insulator 287 and the conductor 240.
- the conductor 112 has a function as a plug or wiring for electrically connecting to the transistor 200 or the transistor 300.
- the capacitive element 100 has a conductor 110, an insulator 130, and a conductor 120 (conductor 120a and conductor 120b).
- the conductor 110 is formed in the same layer as the conductor 112 and is in contact with the upper surface of the conductor 240.
- the conductor 110 is electrically connected to the other of the source and drain of the transistor 200 via the conductor 240.
- the details of the conductor 110, the insulator 130, and the conductor 120 can refer to the description of the previous embodiment.
- the conductor 110 and the conductor 112 are provided on the insulator 285 and the conductor 240.
- An insulator 155 is provided so as to cover the conductor 120, the insulator 130, and the conductor 112. Further, an insulator 152 (insulator 152a and insulator 152b) that functions as a barrier insulating film against hydrogen is provided on the insulator 155. Further, an insulator 286 is provided so as to cover the insulator 152. For details of the insulator 155 and the insulator 152, the description of the previous embodiment can be referred to. Further, although the insulator 155 is shown as a single layer in FIG. 22 and the like, the insulator is not limited to this, and may have a laminated structure as in the previous embodiment.
- the insulator 155 By providing the insulator 155 so as to cover the capacitance element 100, hydrogen contained in the insulator 130 of the capacitance element 100 can be captured or fixed, and the hydrogen concentration in the insulator 130 can be reduced. As a result, the crystallinity of the insulator 130 can be improved, and the ferroelectricity of the insulator 130 can be enhanced. Further, the leakage current between the conductor 110 and the conductor 120 can be reduced.
- impurities such as hydrogen contained in the insulator 286 on the insulator 152b are transferred to the transistor 200 via the capacitive element 100, the conductor 112, and the conductor 240. It is possible to reduce the diffusion.
- the insulator 155 and the insulator 287 are in contact with each other in a region that does not overlap with the capacitive element 100. That is, the capacitive element 100 is sealed by the insulator 155, the insulator 152a, the insulator 152b, and the insulator 287.
- the insulator 155, the insulator 152a, the insulator 152b, and the insulator 287 function as a sealing film.
- the capacitive element 100 can be sealed in the region sandwiched between the insulator 152, the insulator 155, and the insulator 283.
- the transistor 200 is also sealed with an insulator 283, an insulator 214, and an insulator 212, which function as a barrier insulating film against hydrogen.
- an insulator 283, an insulator 214, and an insulator 212 which function as a barrier insulating film against hydrogen.
- Examples of the insulator that can be used as the interlayer film include oxides having insulating properties, nitrides, nitride oxides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.
- the material may be selected according to the function of the insulator.
- the insulator 210, the insulator 286, the insulator 352, the insulator 354, and the like have an insulator having a low relative permittivity.
- the insulator preferably has silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having pores, or a resin.
- the insulator may be silicon oxide, silicon oxide, silicon nitride, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, silicon oxide with carbon and nitrogen, or silicon oxide with pores.
- silicon oxide and silicon oxide nitride are thermally stable, they can be combined with a resin to form a laminated structure that is thermally stable and has a low relative permittivity.
- the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, acrylic, and the like.
- a transistor using an oxide semiconductor can stabilize the electrical characteristics of the transistor by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. Therefore, for the insulator 214, the insulator 212, the insulator 350, and the like, an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen may be used.
- Examples of the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen include boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, tantalum, and zirconium. Insulations containing, lanthanum, neodymium, hafnium or tantalum may be used in a single layer or in layers.
- an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or Metal oxides such as tantalum oxide, silicon nitride oxide, silicon nitride and the like can be used.
- Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, and indium.
- a material containing one or more metal elements selected from ruthenium and the like can be used.
- a semiconductor having high electrical conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, and a silicide such as nickel silicide may be used.
- the conductor 328, the conductor 330, the conductor 356, the conductor 218, the conductor 112, and the like include a metal material, an alloy material, a metal nitride material, a metal oxide material, and the like formed of the above materials.
- a metal material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten.
- it is preferably formed of a low resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low resistance conductive material.
- the capacitive element 100 is insulated by forming the conductor 120a by a method involving substrate heating such as a thermal ALD method, so that the conductor 120a is not baked at a high temperature after formation.
- the ferroelectricity of the body 130 can be increased. Therefore, since the semiconductor device can be manufactured without baking at a high temperature, a low resistance conductive material such as copper having a low melting point can be used.
- an insulator having an excess oxygen region may be provided in the vicinity of the oxide semiconductor. In that case, it is preferable to provide an insulator having a barrier property between the insulator having the excess oxygen region and the conductor provided in the insulator having the excess oxygen region.
- the transistor 200 can be configured to be sealed by the insulator having a barrier property.
- the insulator 241 it is possible to suppress the excess oxygen contained in the insulator 280 from being absorbed by the conductor 240. Further, by having the insulator 241, it is possible to suppress the diffusion of hydrogen, which is an impurity, to the transistor 200 via the conductor 240.
- an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen it is preferable to use silicon nitride, silicon nitride oxide, aluminum oxide, hafnium oxide and the like.
- silicon nitride is preferable because it has a high blocking property against hydrogen.
- metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, and tantalum oxide can be used.
- the transistor 200 may be configured to be sealed with an insulator 212, an insulator 214, an insulator 282, and an insulator 283.
- an insulator 212, an insulator 214, an insulator 282, and an insulator 283 With such a configuration, it is possible to reduce the mixing of hydrogen contained in the insulator 274, the insulator 285, the insulator 210 and the like into the insulator 280 and the like.
- the insulator 212, the insulator 214, the insulator 282, and the insulator 283 function as a sealing film.
- the conductor 240 penetrates the insulator 283 and the insulator 282, and the conductor 218 penetrates the insulator 214 and the insulator 212.
- the insulator 241 is in contact with the conductor 240.
- the insulator 217 is provided in contact with the conductor 218.
- the transistor 200 is sealed with the insulator 212, the insulator 214, the insulator 282, the insulator 283, the insulator 241 and the insulator 217, and impurities such as hydrogen contained in the insulator 274 and the like are outside. It is possible to reduce contamination from.
- one transistor 200 is shown in the region sealed by the insulator 212, the insulator 283, and the like, but the present invention is not limited to this, and the sealed region is not limited to this.
- a plurality of transistors 200 can be provided.
- a dicing line (sometimes referred to as a scribe line, a division line, or a cutting line) provided when a plurality of semiconductor devices are taken out in the form of chips by dividing a large-area substrate into semiconductor elements will be described. ..
- a dividing method for example, there is a case where a groove (dicing line) for dividing a semiconductor element is first formed on a substrate, then the dicing line is cut, and the semiconductor device is divided (divided) into a plurality of semiconductor devices.
- the region where the insulator 283 and the insulator 214 are in contact overlap with the dicing line it is preferable to design so that the region where the insulator 283 and the insulator 214 are in contact overlap with the dicing line. That is, openings are provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216 in the vicinity of the region serving as the dicing line provided on the outer edge of the memory cell having the plurality of transistors 200.
- the insulator 214 and the insulator 283 come into contact with each other at the openings provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216.
- openings may be provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, the insulator 216, and the insulator 214.
- the insulator 212 and the insulator 283 come into contact with each other at the openings provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, the insulator 216, and the insulator 214. ..
- the insulator 212 and the insulator 283 may be formed by using the same material and the same method. By providing the insulator 212 and the insulator 283 with the same material and the same method, the adhesion can be enhanced. For example, it is preferable to use silicon nitride.
- the transistor 200 can be wrapped by the insulator 212, the insulator 214, the insulator 282, and the insulator 283. Since at least one of the insulator 212, the insulator 214, the insulator 282, and the insulator 283 has a function of suppressing the diffusion of oxygen, hydrogen, and water, the semiconductor element shown in the present embodiment is formed. By dividing the substrate for each circuit region, even if it is processed into a plurality of chips, impurities such as hydrogen or water are prevented from being mixed in from the side surface direction of the divided substrate and diffused to the transistor 200. Can be done.
- the structure can prevent the excess oxygen of the insulator 280 and the insulator 224 from diffusing to the outside. Therefore, the excess oxygen of the insulator 280 and the insulator 224 is efficiently supplied to the oxide in which the channel is formed in the transistor 200.
- the oxygen can reduce the oxygen deficiency of the oxide in which the channel is formed in the transistor 200.
- the oxide in which the channel is formed in the transistor 200 can be made into an oxide semiconductor having a low defect level density and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability.
- the shape of the capacitive element 100 is a planar type, but the storage device shown in the present embodiment is not limited to this.
- the shape of the capacitance element 100 may be a cylinder type.
- the storage device shown in FIG. 23 has the same configuration as that of the storage device shown in FIG. 22 below the insulator 287.
- the capacitive element 100 shown in FIG. 23 is arranged in the insulator 286 on the insulator 290, the insulator 142 on the insulator 286, and the openings formed in the insulator 290, the insulator 286, and the insulator 142. It has a conductor 110, an insulator 130 on the insulator 110 and the insulator 142, and a conductor 120 on the insulator 130. Here, at least a part of the conductor 110, the insulator 130, and the conductor 120 is arranged in the openings formed in the insulator 286 and the insulator 142.
- the insulator 290 is arranged so as to cover the conductor 112, and an insulator that can be used for the insulator 152 or the insulator 155 may be used.
- the conductor 110 functions as a lower electrode of the capacitive element 100
- the conductor 120 functions as an upper electrode of the capacitive element 100
- the insulator 130 functions as a dielectric of the capacitive element 100.
- the capacitance element 100 has a configuration in which the upper electrode and the lower electrode face each other with a dielectric sandwiched not only on the bottom surface but also on the side surface at the openings of the insulator 286 and the insulator 142, so that the capacitance per unit area can be determined. Can be made larger. Therefore, the deeper the depth of the opening, the larger the capacitance of the capacitive element 100 can be. By increasing the capacity per unit area of the capacitive element 100 in this way, it is possible to promote miniaturization or high integration of the semiconductor device.
- the insulator 142 preferably functions as an etching stopper when forming an opening of the insulator 286, and an insulator that can be used for the insulator 214 may be used.
- the shape of the openings formed in the insulator 286 and the insulator 142 as viewed from the upper surface may be a quadrangle, a polygon shape other than the quadrangle, or a shape in which the corners are curved in the polygon shape. , May be a circular shape including an ellipse.
- it is preferable that the area where the opening and the transistor 200 overlap is large in the top view. With such a configuration, the occupied area of the semiconductor device having the capacitive element 100 and the transistor 200 can be reduced.
- the conductor 110 is arranged in contact with the insulator 142 and the opening formed in the insulator 286. It is preferable that the uppermost portion of the conductor 110 substantially coincides with the upper surface of the insulator 142. Further, the lower surface of the conductor 110 is in contact with the conductor 112 through the opening of the insulator 290.
- the conductor 110 is preferably formed into a film by using an ALD method, a CVD method, or the like.
- the insulator 130 is arranged so as to cover the conductor 110 and the insulator 142.
- the conductor 120 is arranged so as to fill the openings formed in the insulator 142 and the insulator 286. Further, the conductor 120 is electrically connected to the wiring 1005 via the conductor 140 and the conductor 143.
- the conductor 120 is preferably formed by using an ALD method, a CVD method, or the like.
- An insulator 155 is provided so as to cover the conductor 120 and the insulator 142. Further, an insulator 152 (insulator 152a and insulator 152b) that functions as a barrier insulating film against hydrogen is provided on the insulator 155. Further, the insulator 141 is provided on the insulator 152. Further, the insulator 144 is provided on the insulator 141. As the insulator 141, an insulator that can be used for the insulator 280 may be used. Further, as the insulator 144, an insulator that can be used for the insulator 287 may be used.
- the capacitance element 100 is sandwiched between the insulator 155 and the insulator 152, and the insulator 290 and the insulator 287.
- hydrogen is suppressed from diffusing from the outside of the insulator 152b and the insulator 287 to the capacitance element 100, and the insulator 155 captures or fixes the hydrogen inside the insulator 152b and the insulator 287, and the capacitance element
- the hydrogen concentration of the insulator 130 of 100 can be reduced. Therefore, the ferroelectricity of the insulator 130 can be enhanced.
- the conductor 143 is provided on the insulator 144 and is covered with the insulator 146.
- a conductor that can be used for the conductor 112 may be used, and as the insulator 146, an insulator that can be used for the insulator 141 may be used.
- the conductor 143 is in contact with the upper surface of the conductor 140 and functions as a terminal of the capacitive element 100, the transistor 200, or the transistor 300.
- the storage device shown in FIG. 22 has a configuration in which the transistor 200 and the capacitive element 100 are electrically connected, but the present invention is not limited to this.
- the transistor 200 and the capacitive element 100 may be configured not to be electrically connected.
- the storage device shown in FIG. 24A has the same configuration as the storage device shown in FIG. 22 for the transistor 200 and the capacitive element 100 above the insulator 212.
- the structure below the insulator 212 may be the same as that of the storage device shown in FIG. 22, or the substrate 311 may be provided in contact with the bottom of the insulator 212.
- an opening may be formed in the insulator 286, the insulator 152b, the insulator 152a, and the insulator 155, and the conductor 288 and the insulator 289 may be provided so as to embed the opening. good.
- the conductor 288 has the same configuration as the conductor 240, and the insulator 289 has the same configuration as the insulator 241.
- one of the source and drain of the transistor 200 is electrically connected to the wiring 1003 via the conductor 288, and the other of the source and drain of the transistor 200 is electrically connected to the wiring 1008 via the conductor 288. Be connected.
- one of the electrodes (conductor 120) of the capacitive element 100 is electrically connected to the wiring 1005 via the conductor 288. Further, the other electrode (conductor 110) of the capacitive element 100 is electrically connected to the wiring 1009 via the conductor 240, the conductor 255 in the same layer as the conductor 205, the conductor 112, and the conductor 288. Ru.
- the transistor 200 and the capacitive element 100 may be configured to be individually sealed by a sealing film.
- the transistor 200 is sealed by an insulator 283, an insulator 214, and an insulator 212.
- the conductor 240 and the conductor 255 which function as wirings or plugs connected to the capacitive element 100, may be individually sealed from the transistor 200.
- a region in contact between the insulator 283 and the insulator 214 is formed between the transistor 200, the conductor 240, and the conductor 255.
- an insulator 285 and an insulator 287 are provided between the transistor 200 and the capacitive element 100, but the present invention is not limited to this.
- the insulator 285 and the insulator 287 may not be provided, and the lower surfaces of the conductor 112, the conductor 110, and the insulator 155 may be in contact with the insulator 283.
- the capacitive element 100 is sealed with the insulator 152a, the insulator 152b, the insulator 155, and the insulator 283. This eliminates the need to provide the insulator 285 and the insulator 287, so that the productivity of the storage device can be improved.
- the transistor 200 and the capacitive element 100 are individually sealed by a barrier insulating film against hydrogen, but the present invention is not limited thereto. As shown in FIG. 25, the transistor 200 and the capacitive element 100 may be collectively sealed by a barrier insulating film (insulator 212, insulator 152a, and insulator 152b) against hydrogen.
- a barrier insulating film insulator 212, insulator 152a, and insulator 152b
- the insulator 214, the insulator 216, the insulator 222, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 155 reach the insulator 212.
- An opening is formed.
- the insulator 152a and the insulator 152b on the insulator 155 are formed along the side surface and the bottom surface of the opening.
- the insulator 152a is in contact with the upper surface of the insulator 212 at the bottom surface of the opening.
- the transistor 200 and the capacitive element 100 can be collectively sealed by the insulator 212, the insulator 152a, and the insulator 152b.
- hydrogen is suppressed from diffusing from the outside of the insulator 212 and the insulator 152b to the capacitive element 100 and the transistor 200, and the hydrogen concentration of the insulator 130 of the capacitive element 100 and the oxide semiconductor film of the transistor 200 is increased.
- the capacitive element 100 is provided on the transistor 200, but the present invention is not limited to this. As shown in FIG. 26, the capacitive element 100 may be provided on the same layer as the transistor 200.
- the conductor 110 that functions as the lower electrode of the capacitive element 100 is preferably formed of the same conductor as the conductor 205 that functions as the back gate of the transistor 200.
- the insulator 130 is arranged on the conductor 110, and the conductor 120 (conductor 120a and conductor 120b) is arranged on the insulator 130.
- the insulator 130 covers the upper surface of the conductor 110 and separates the conductor 110 from the conductor 120.
- the insulator 130 and the conductor 120 may have the same configuration as that shown in FIG. 22 and the like, and for details, the description of [configuration example of the storage device] and the previous embodiment may be taken into consideration. can.
- the insulator 222 is arranged so as to cover the insulator 130 and the conductor 120.
- the conductor 240 is provided in contact with the upper surface of the conductor 120b, and the conductor 112 is provided in contact with the upper surface of the conductor 240.
- the conductor 112 is in contact with a conductor 240 electrically connected to one of the source and drain of the transistor 200. That is, the conductor 120 that functions as the upper electrode of the capacitive element 100 shown in FIG. 26 is electrically connected to one of the source and drain of the transistor 200. Further, the conductor 110 that functions as the lower electrode of the capacitive element 100 is electrically connected to the wiring 1005.
- the transistor 200 and the capacitive element 100 can be collectively sealed by the insulator 212, the insulator 152a, and the insulator 152b.
- hydrogen is suppressed from diffusing from the outside of the insulator 212 and the insulator 152b to the capacitive element 100 and the transistor 200, and the hydrogen concentration of the insulator 130 of the capacitive element 100 and the oxide semiconductor film of the transistor 200 is increased.
- the storage device shown in FIG. 22 or the like has a configuration in which the transistor 200 is provided on the transistor 300 and the capacitive element 100 is connected to the transistor 200, but the present invention is not limited to this. As shown in FIG. 27A, the capacitive element 100 may be connected to the transistor 300 without providing the transistor 200.
- the insulator 320, the insulator 322, and the insulator 287 are formed with an opening reaching the low resistance region 314a of the transistor 300, and the conductor 357 is formed so as to embed the opening. ..
- the same conductor as the conductor 328 can be used.
- the upper surface of the conductor 357 is in contact with the lower surface of the conductor 110 of the capacitive element 100. In this way, the conductor 110 that functions as the lower electrode of the capacitive element 100 and the low resistance region 314a that functions as one of the source and drain of the transistor 300 are connected via the conductor 357.
- the configurations of the transistor 300, the capacitive element 100, and the layer including them are the same as those shown in FIG. 22, and the description related to the configuration shown in FIG. 22 can be taken into consideration.
- the capacitive element 100 can be sealed with the insulator 287, the insulator 152a, and the insulator 152b, similarly to the storage device shown in FIG. 22.
- the ferroelectricity of the insulator 130 can be enhanced.
- the low resistance region 314a of the transistor 300 and the conductor 110 of the capacitive element 100 are directly connected by the conductor 357, but the present invention is not limited to this.
- a plurality of wiring layers shown in FIG. 22 or the like may be provided between the capacitive element 100 and the transistor 300.
- the conductor 328 is formed on the transistor 300
- the conductor 330 is formed on the conductor 328
- the conductor 356 is formed on the conductor 330
- the conductor 356 is formed.
- a conductor 357 may be formed on the conductor.
- the low resistance region 314a of the transistor 300 and the conductor 110 of the capacitive element 100 are electrically connected by the conductor 328, the conductor 330, the conductor 356, and the conductor 357.
- the description of [Structure example of storage device] can be referred to.
- a transistor using an oxide as a semiconductor hereinafter, may be referred to as an OS transistor
- a ferroelectric capacitor according to one aspect of the present invention
- the applied storage device will be described.
- the device according to the present embodiment is a storage device having at least a capacitive element and an OS transistor for controlling charge / discharge of the capacitive element.
- the apparatus according to this embodiment functions as a 1-transistor 1-capacitor type ferroelectric memory using a ferroelectric capacitor.
- FIG. 28A shows an example of the configuration of the storage device.
- the storage device 1400 has a peripheral circuit 1411 and a memory cell array 1470.
- the peripheral circuit 1411 includes a row circuit 1420, a column circuit 1430, an output circuit 1440, and a control logic circuit 1460.
- the column circuit 1430 includes, for example, a column decoder, a bit line driver circuit, a precharge circuit, a sense amplifier, a write circuit, and the like.
- the precharge circuit has a function of precharging the wiring.
- the sense amplifier has a function of amplifying a data signal read from a memory cell.
- the wiring is the wiring connected to the memory cell of the memory cell array 1470, and will be described in detail later.
- the amplified data signal is output to the outside of the storage device 1400 as a data signal RDATA via the output circuit 1440.
- the row circuit 1420 has, for example, a row decoder, a word line driver circuit, and the like, and the row to be accessed can be selected.
- the storage device 1400 is supplied with a low power supply voltage (VSS) as a power supply voltage, a high power supply voltage (SiO) for the peripheral circuit 1411, and a high power supply voltage (VIL) for the memory cell array 1470 from the outside. Further, a control signal (CE, WE, RE), an address signal ADDR, and a data signal WDATA are input to the storage device 1400 from the outside.
- the address signal ADDR is input to the row decoder and column decoder, and the data signal WDATA is input to the write circuit.
- the control logic circuit 1460 processes the control signals (CE, WE, RE) input from the outside to generate the control signals of the row decoder and the column decoder.
- the control signal CE is a chip enable signal
- the control signal WE is a write enable signal
- the control signal RE is a read enable signal.
- the signal processed by the control logic circuit 1460 is not limited to this, and other control signals may be input as needed.
- the memory cell array 1470 has a plurality of memory cells MC arranged in a matrix and a plurality of wirings.
- the number of wires connecting the memory cell array 1470 and the row circuit 1420 is determined by the configuration of the memory cell MC, the number of memory cell MCs in one column, and the like. Further, the number of wirings connecting the memory cell array 1470 and the column circuit 1430 is determined by the configuration of the memory cell MC, the number of memory cell MCs in one row, and the like.
- FIG. 28A shows an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane
- the present embodiment is not limited to this.
- the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411.
- a sense amplifier may be provided so as to overlap under the memory cell array 1470.
- the configurations of the peripheral circuit 1411, the memory cell array 1470, and the like shown in the present embodiment are not limited to the above.
- the arrangement or function of these circuits and the wiring, circuit elements, etc. connected to the circuits may be changed, deleted, or added as necessary.
- the storage device of one aspect of the present invention has a high operating speed and can retain data for a long period of time.
- the circuit diagram shown in FIG. 29A shows a configuration example of the above-mentioned memory cell MC.
- the memory cell MC has a transistor Tr and a capacitance Fe.
- the semiconductor device having the transistor 200 and the capacitive element 100 shown in the previous embodiment can be used.
- the transistor Tr corresponds to the transistor 200
- the capacitance Fe corresponds to the capacitive element 100.
- the transistor Tr may or may not have a back gate in addition to the gate.
- the transistor Tr is an n-channel type transistor in FIG. 29A, it may be a p-channel type transistor.
- One of the source and drain of the transistor Tr is electrically connected to the wiring BL.
- the other of the source or drain of the transistor Tr is electrically connected to one electrode of the capacitance Fe.
- the gate of the transistor Tr is electrically connected to the wiring WL.
- the other electrode of the capacitance Fe is electrically connected to the wiring PL.
- the wiring WL has a function as a word line, and the on / off of the transistor Tr can be controlled by controlling the potential of the wiring WL. For example, by setting the potential of the wiring WL to a high potential, the transistor Tr can be turned on, and by setting the potential of the wiring WL to a low potential, the transistor Tr can be turned off.
- the wiring WL is electrically connected to the word line driver circuit included in the row circuit 1420, and the potential of the wiring WL can be controlled by the word line driver circuit.
- the wiring BL has a function as a bit line, and when the transistor Tr is in the ON state, the potential of the wiring BL is supplied to one electrode of the capacitance Fe.
- the wiring BL is electrically connected to the bit line driver circuit of the column circuit 1430.
- the bit line driver circuit has a function of generating data to be written to the memory cell MC. Further, the bit line driver circuit has a function of reading the data output from the memory cell MC. Specifically, the bit line driver circuit is provided with a sense amplifier, and the data output from the memory cell MC can be read out by using the sense amplifier.
- the wiring PL has a function as a plate wire, and the potential of the wiring PL can be the potential of the other electrode of the capacitance Fe.
- the OS transistor has a characteristic of having a high withstand voltage. Therefore, by using the transistor Tr as an OS transistor, a high voltage can be applied to the transistor Tr even if the transistor Tr is miniaturized. By miniaturizing the transistor Tr, the occupied area of the memory cell MC can be reduced. For example, the occupied area per memory cell MC shown in FIG. 29A can be 1/3 to 1/6 of the occupied area per SRAM cell. Therefore, the memory cells MC can be arranged at a high density. Thereby, the storage device according to one aspect of the present invention can be a storage device having a large storage capacity.
- the capacitive Fe has a material that can have ferroelectricity as a dielectric layer between the two electrodes.
- the dielectric layer having the capacitance Fe is referred to as a ferroelectric layer.
- a material that can have ferroelectricity a material that can be used for the above-mentioned insulator 130 may be used.
- a material capable of having ferroelectricity a material having aluminum nitride and / or scandium nitride is preferable because it can have ferroelectricity even when processed into a thin film of several nm.
- the ferroelectric layer has a hysteresis characteristic.
- FIG. 29B1 is a graph showing an example of the hysteresis characteristic.
- the horizontal axis represents the voltage applied to the ferroelectric layer.
- the voltage can be, for example, the difference between the potential of one electrode of the capacitance Fe and the potential of the other electrode of the capacitance Fe.
- the vertical axis indicates the amount of polarization of the ferroelectric layer, and when the value is positive, the negative charge is biased to one electrode side of the capacitance Fe, and the positive charge is biased to the other electrode side of the capacitance Fe. Show that it is.
- the amount of polarization is a negative value, it indicates that the negative charge is biased toward the other electrode side of the capacitance Fe and the positive charge is biased toward one electrode side of the capacitance Fe.
- the voltage shown on the horizontal axis of the graph of FIG. 29B1 may be the difference between the potential of the other electrode of the capacitance Fe and the potential of one electrode of the capacitance Fe.
- the amount of polarization (also referred to as polarization) shown on the vertical axis of the graph of FIG. 29B1 is when the negative charge is biased toward the other electrode side of the capacitance Fe and the positive charge is biased toward one electrode side of the capacitance Fe. It may be a positive value, and may be a negative value when the negative charge is biased to one electrode side of the capacitance Fe and the positive charge is biased to the other electrode side of the capacitance Fe.
- the hysteresis characteristic of the ferroelectric layer can be represented by the curve 51 and the curve 52.
- VSP and ⁇ VSP can be said to be saturated polarization voltages.
- VSP may be referred to as a first saturated polarization voltage
- ⁇ VSP may be referred to as a second saturation polarization voltage.
- the absolute value of the first saturated polarization voltage and the absolute value of the second saturated polarization voltage are equal to each other, but they may be different.
- the voltage applied to the ferroelectric layer when the polarization amount of the ferroelectric layer changes according to the curve 51 and the polarization amount of the ferroelectric layer is 0 is defined as Vc.
- the voltage applied to the ferroelectric layer when the polarization amount of the ferroelectric layer changes according to the curve 52 and the polarization amount of the ferroelectric layer is 0 is defined as ⁇ Vc.
- Vc and -Vc can be said to be withstand voltage. It can be said that the value of Vc and the value of -Vc are values between -VSP and VSP.
- Vc may be referred to as a first coercive voltage
- ⁇ Vc may be referred to as a second coercive voltage.
- the absolute value of the first coercive voltage and the absolute value of the second coercive voltage are equal to each other, but they may be different.
- the voltage applied to the ferroelectric layer of the capacitance Fe can be expressed by the difference between the potential of one electrode of the capacitance Fe and the potential of the other electrode of the capacitance Fe. Further, as described above, the other electrode of the capacitance Fe is electrically connected to the wiring PL. Therefore, by controlling the potential of the wiring PL, it is possible to control the voltage applied to the ferroelectric layer having the capacitance Fe.
- FIG. 29B2 is a graph showing an example of hysteresis characteristics showing an ideal amount of polarization of the ferroelectric layer.
- the straight line 52i and the straight line 51i shown in FIG. 29B2 are ideal polarization amounts of the ferroelectric layer.
- the crystallinity of the ferroelectric material is improved, the leak component from the vicinity of the ferroelectric material and the material is eliminated, and the impurity concentration of the ferroelectric material is eliminated. It may be done to reduce. Since the metal nitride film of one aspect of the present invention is highly purified, it can be expected to approach an example of the hysteresis characteristic showing the ideal polarization amount of the ferroelectric layer shown in FIG. 29B2.
- the voltage applied to the ferroelectric layer of the capacitance Fe indicates the difference between the potential of one electrode of the capacitance Fe and the potential of the other electrode (wiring PL) of the capacitance Fe. do.
- the transistor Tr is an n-channel type transistor.
- FIG. 29C is a timing chart showing an example of the driving method of the memory cell MC shown in FIG. 29A.
- FIG. 29C shows an example of writing and reading binary digital data to the memory cell MC. Specifically, in FIG. 29C, data "1" is written to the memory cell MC at time T01 to time T02, read and rewritten at time T03 to time T05, read out at time T11 to time T13, and the memory cell. An example of writing data "0" to the MC, reading and rewriting at time T14 to time T16, reading from time T17 to time T19, and writing data "1" to the memory cell MC is shown. ing.
- Vref is supplied as a reference potential to the sense amplifier electrically connected to the wiring BL.
- Vref is supplied as a reference potential to the sense amplifier electrically connected to the wiring BL.
- the potential of the wiring BL is higher than Vref, it is assumed that the data “1” is read by the bit line driver circuit.
- the potential of the wiring BL is lower than Vref, it is assumed that the data "0" is read by the bit line driver circuit.
- the potential of the wiring WL is set to a high potential (H).
- the transistor Tr is turned on.
- the potential of the wiring BL is Vw.
- the potential of one electrode of the capacitance Fe is Vw.
- the potential of the wiring PL is set to GND. From the above, the voltage applied to the ferroelectric layer of the capacitance Fe becomes "Vw-GND". As a result, the data "1" can be written to the memory cell MC. Therefore, it can be said that the time T01 to the time T02 is a period during which the writing operation is performed.
- Vw is preferably VSP or higher, and is preferably equal to, for example, VSP.
- the GND can be set to, for example, a ground potential, but it does not necessarily have to be a ground potential as long as the memory cell MC can be driven so as to satisfy the gist of one aspect of the present invention.
- GND can be a potential other than ground.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes 0V. Since the voltage "Vw-GND" applied to the ferroelectric layer of the capacitance Fe at time T01 to time T02 can be equal to or higher than VSS, the amount of polarization of the ferroelectric layer of the capacitance Fe at time T02 to time T03. Changes according to the curve 52 shown in FIG. 29B. From the above, at time T02 to time T03, the polarization inversion does not occur in the ferroelectric layer having the capacitance Fe.
- the potential of the wiring BL and the wiring PL After setting the potential of the wiring BL and the potential of the wiring PL to GND, set the potential of the wiring WL to the low potential (L). As a result, the transistor Tr is turned off. As a result, the writing operation is completed, and the data "1" is held in the memory cell MC.
- the potentials of the wiring BL and the wiring PL polarization inversion does not occur in the ferroelectric layer of the capacitance Fe, that is, the voltage applied to the ferroelectric layer of the capacitance Fe is ⁇ Vc or more, which is the second coercive voltage. If so, any potential can be used.
- the potential of the wiring WL is set to a high potential.
- the transistor Tr is turned on.
- the potential of the wiring PL is Vw.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes “GND-Vw”.
- the voltage applied to the ferroelectric layer of the capacitance Fe at time T01 to time T02 is “Vw-GND”. Therefore, the polarization inversion occurs in the ferroelectric layer having the capacitance Fe.
- a current flows through the wiring BL, and the potential of the wiring BL becomes higher than Vref.
- the bit line driver circuit can read the data "1" held in the memory cell MC. Therefore, it can be said that the time T03 to the time T04 is a period during which the read operation is performed.
- Vref is higher than GND and lower than Vw, it may be higher than Vw, for example.
- the time T04 to the time T05 is a period during which the rewrite operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the potential of the wiring WL is set to a low potential. As a result, the rewrite operation is completed, and the data "1" is held in the memory cell MC.
- the potential of the wiring WL is set to a high potential, and the potential of the wiring PL is set to Vw. Since the data "1" is held in the memory cell MC, the potential of the wiring BL becomes higher than Vref, and the data "1" held in the memory cell MC is read out. Therefore, it can be said that the time T11 to the time T12 is a period during which the read operation is performed.
- the potential of the wiring BL is set to GND. Since the transistor Tr is in the ON state, the potential of one electrode of the capacitance Fe is GND. Further, the potential of the wiring PL is Vw. From the above, the voltage applied to the ferroelectric layer of the capacitance Fe is "GND-Vw". As a result, the data "0" can be written to the memory cell MC. Therefore, it can be said that the time T12 to the time T13 is a period during which the writing operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes 0V. Since the voltage "GND-Vw" applied to the ferroelectric layer of the capacitance Fe at time T12 to T13 can be -VSP or less, the polarization of the ferroelectric layer of the capacitance Fe from time T13 to time T14. The amount varies according to the curve 51 shown in FIG. 29B1. From the above, at time T13 to time T14, the polarization inversion does not occur in the ferroelectric layer having the capacitance Fe.
- the potentials of the wiring BL and the wiring PL are such that the polarization inversion does not occur in the ferroelectric layer of the capacitance Fe, that is, the voltage applied to the ferroelectric layer of the capacitance Fe is Vc or less, which is the first coercive voltage. If so, it can be any potential.
- the potential of the wiring WL is set to a high potential.
- the transistor Tr is turned on.
- the potential of the wiring PL is Vw.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes “GND-Vw”.
- the voltage applied to the ferroelectric layer of the capacitance Fe at time T12 to time T13 is “GND-Vw”. Therefore, the polarization inversion does not occur in the ferroelectric layer having the capacitance Fe. Therefore, the amount of current flowing through the wiring BL is smaller than the case where the polarization inversion occurs in the ferroelectric layer having the capacitance Fe.
- the increase width of the potential of the wiring BL becomes smaller than that in the case where the polarization inversion occurs in the ferroelectric layer of the capacitance Fe, and specifically, the potential of the wiring BL becomes Vref or less. Therefore, the bit line driver circuit can read the data “0” held in the memory cell MC. Therefore, it can be said that the time T14 to the time T15 is a period during which the read operation is performed.
- the potential of the wiring BL is set to GND, and the potential of the wiring PL is set to Vw.
- the data "0" is rewritten to the memory cell MC. Therefore, it can be said that the time T15 to the time T16 is a period during which the rewrite operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the potential of the wiring WL is set to a low potential. As a result, the rewrite operation is completed, and the data "0" is held in the memory cell MC.
- the potential of the wiring WL is set to a high potential, and the potential of the wiring PL is set to Vw. Since the data "0" is held in the memory cell MC, the potential of the wiring BL becomes lower than Vref, and the data "0" held in the memory cell MC is read out. Therefore, it can be said that the time T17 to the time T18 is a period during which the read operation is performed.
- the potential of the wiring BL is Vw. Since the transistor Tr is in the ON state, the potential of one electrode of the capacitance Fe is Vw. Further, the potential of the wiring PL is set to GND. From the above, the voltage applied to the ferroelectric layer of the capacitance Fe becomes "Vw-GND". As a result, the data "1" can be written to the memory cell MC. Therefore, it can be said that the time T18 to the time T19 is a period during which the writing operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the potential of the wiring WL is set to a low potential. As a result, the writing operation is completed, and the data "1" is held in the memory cell MC.
- the semiconductor device shown in the above embodiment is, for example, a storage device for various electronic devices (for example, an information terminal, a computer, a smartphone, an electronic book terminal, a digital camera (including a video camera), a recording / playback device, a navigation system, etc.).
- the computer includes a tablet computer, a notebook computer, a desktop computer, and a large computer such as a server system.
- the semiconductor device shown in the above embodiment is applied to various removable storage devices such as a memory card (for example, an SD card), a USB memory, and an SSD (solid state drive).
- 30A to 30E schematically show some configuration examples of the removable storage device.
- the semiconductor device shown in the above embodiment is processed into a packaged memory chip and used for various storage devices and removable memories.
- FIG. 30A is a schematic diagram of a USB memory.
- the USB memory 1100 has a housing 1101, a cap 1102, a USB connector 1103, and a board 1104.
- the board 1104 is housed in the housing 1101.
- a memory chip 1105 and a controller chip 1106 are attached to the substrate 1104.
- the semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1105 or the like. As a result, the storage capacity of the USB memory 1100 can be further increased.
- FIG. 30B is a schematic diagram of the appearance of the SD card
- FIG. 30C is a schematic diagram of the internal structure of the SD card.
- the SD card 1110 has a housing 1111, a connector 1112, and a substrate 1113.
- the board 1113 is housed in the housing 1111.
- a memory chip 1114 and a controller chip 1115 are attached to the substrate 1113.
- a wireless chip having a wireless communication function may be provided on the substrate 1113.
- the data of the memory chip 1114 can be read and written by wireless communication between the host device and the SD card 1110.
- the semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1114 or the like. As a result, the storage capacity of the SD card 1110 can be further increased.
- FIG. 30D is a schematic diagram of the appearance of the SSD
- FIG. 30E is a schematic diagram of the internal structure of the SSD.
- the SSD 1150 has a housing 1151, a connector 1152 and a substrate 1153.
- the substrate 1153 is housed in the housing 1151.
- a memory chip 1154, a memory chip 1155, and a controller chip 1156 are attached to the substrate 1153.
- the memory chip 1155 is a work memory of the controller chip 1156, and for example, a DOSRAM chip may be used.
- the capacity of the SSD 1150 can be increased.
- the semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1154 or the like. As a result, the storage capacity of the SSD 1150 can be further increased.
- the semiconductor device according to one aspect of the present invention can be used for a processor such as a CPU or GPU, or a chip.
- a processor such as a CPU or GPU, or a chip
- these can be miniaturized and the storage capacity can be further increased.
- 31A to 31H show specific examples of electronic devices including a processor such as a CPU, GPU, or a chip according to one aspect of the present invention.
- the GPU or chip according to one aspect of the present invention can be mounted on various electronic devices.
- electronic devices include relatively large screens such as television devices, monitors for desktop or notebook information terminals, digital signage (electronic signage), large game machines such as pachinko machines, and the like.
- digital cameras digital camera, digital video camera, digital photo frame, electronic book reader, mobile phone, portable game machine, mobile information terminal, sound reproduction device, and the like can be mentioned.
- artificial intelligence can be mounted on the electronic device.
- the electronic device of one aspect of the present invention may have an antenna.
- the display unit can display images, information, and the like.
- the antenna may be used for non-contact power transmission.
- the electronic device of one aspect of the present invention includes sensors (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, It may have the ability to measure voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays).
- the electronic device of one aspect of the present invention can have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar, a function to display a date or time, a function to execute various software (programs), wireless communication. It can have a function, a function of reading a program or data recorded on a recording medium, and the like.
- 31A to 31H show examples of electronic devices.
- FIG. 31A illustrates a mobile phone (smartphone) which is a kind of information terminal.
- the information terminal 5100 has a housing 5101 and a display unit 5102, and a touch panel is provided in the display unit 5102 and a button is provided in the housing 5101 as an input interface.
- the information terminal 5100 can execute an application using artificial intelligence by applying the chip of one aspect of the present invention.
- Examples of the application using artificial intelligence include an application that recognizes a conversation and displays the conversation content on the display unit 5102, and recognizes characters and figures input by the user on the touch panel provided in the display unit 5102.
- Examples include an application displayed on the display unit 5102, an application for performing biometric authentication such as a fingerprint and a voice print, and the like.
- FIG. 31B illustrates a notebook type information terminal 5200.
- the notebook type information terminal 5200 includes a main body 5201 of the information terminal, a display unit 5202, and a keyboard 5203.
- the note-type information terminal 5200 can execute an application using artificial intelligence by applying the chip of one aspect of the present invention.
- applications using artificial intelligence include design support software, text correction software, menu automatic generation software, and the like. Further, by using the notebook type information terminal 5200, it is possible to develop a new artificial intelligence.
- a smartphone and a notebook-type information terminal are taken as examples as electronic devices, and although they are shown in FIGS. 31A and 31B, respectively, information terminals other than the smartphone and the notebook-type information terminal can be applied.
- information terminals other than smartphones and notebook-type information terminals include PDAs (Personal Digital Assistants), desktop-type information terminals, workstations, and the like.
- FIG. 31C shows a portable game machine 5300, which is an example of a game machine.
- the portable game machine 5300 has a housing 5301, a housing 5302, a housing 5303, a display unit 5304, a connection unit 5305, an operation key 5306, and the like.
- the housing 5302 and the housing 5303 can be removed from the housing 5301.
- the connection unit 5305 provided in the housing 5301 to another housing (not shown)
- the video output to the display unit 5304 can be output to another video device (not shown). can.
- the housing 5302 and the housing 5303 can each function as an operation unit. This allows multiple players to play the game at the same time.
- the chips shown in the previous embodiment can be incorporated into the chips provided on the substrates of the housing 5301, the housing 5302, and the housing 5303.
- FIG. 31D shows a stationary game machine 5400, which is an example of a game machine.
- a controller 5402 is connected to the stationary game machine 5400 wirelessly or by wire.
- a low power consumption game machine By applying the GPU or chip of one aspect of the present invention to a game machine such as a portable game machine 5300 or a stationary game machine 5400, a low power consumption game machine can be realized. Further, since the heat generation from the circuit can be reduced due to the low power consumption, the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be reduced.
- the portable game machine 5300 having artificial intelligence can be realized.
- expressions such as the progress of the game, the behavior of creatures appearing in the game, and the phenomena that occur in the game are determined by the program that the game has, but by applying artificial intelligence to the handheld game machine 5300.
- Expressions that are not limited to game programs are possible. For example, it is possible to express what the player asks, the progress of the game, the time, and the behavior of the characters appearing in the game.
- the game player can be constructed by artificial intelligence in an anthropomorphic manner. Therefore, by setting the opponent as a game player by artificial intelligence, even one player can play the game. You can play the game.
- FIGS. 31C and 31D a portable game machine and a stationary game machine are illustrated as examples of the game machine, but the game machine to which the GPU or chip of one aspect of the present invention is applied is not limited to this.
- Examples of the game machine to which the GPU or chip of one aspect of the present invention is applied include an arcade game machine installed in an entertainment facility (game center, amusement park, etc.), a pitching machine for batting practice installed in a sports facility, and the like. Can be mentioned.
- the GPU or chip of one aspect of the present invention can be applied to a large computer.
- FIG. 31E is a diagram showing a supercomputer 5500, which is an example of a large computer.
- FIG. 31F is a diagram showing a rack-mounted computer 5502 included in the supercomputer 5500.
- the supercomputer 5500 has a rack 5501 and a plurality of rack mount type computers 5502.
- the plurality of computers 5502 are stored in the rack 5501. Further, the computer 5502 is provided with a plurality of substrates 5504, and the GPU or the chip described in the above embodiment can be mounted on the substrate.
- the supercomputer 5500 is a large computer mainly used for scientific and technological calculations. In scientific and technological calculations, it is necessary to process a huge amount of calculations at high speed, so power consumption is high and the heat generated by the chip is large.
- the GPU or chip of one aspect of the present invention to the supercomputer 5500, a supercomputer having low power consumption can be realized. Further, since the heat generation from the circuit can be reduced due to the low power consumption, the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be reduced.
- a supercomputer is illustrated as an example of a large computer, but the large computer to which the GPU or chip of one aspect of the present invention is applied is not limited to this.
- Examples of the large-scale computer to which the GPU or chip of one aspect of the present invention is applied include a computer (server) for providing a service, a large-scale general-purpose computer (mainframe), and the like.
- the GPU or chip of one aspect of the present invention can be applied to a moving vehicle and around the driver's seat of the vehicle.
- FIG. 31G is a diagram showing the periphery of the windshield in the interior of an automobile, which is an example of a moving body.
- the display panel 5701 attached to the dashboard, the display panel 5702, the display panel 5703, and the display panel 5704 attached to the pillar are illustrated.
- the display panel 5701 to the display panel 5703 can provide various information by displaying a speedometer, a tachometer, a mileage, a fuel gauge, a gear status, an air conditioner setting, and the like.
- the display items, layout, and the like displayed on the display panel can be appropriately changed according to the user's preference, and the design can be improved.
- the display panel 5701 to 5703 can also be used as a lighting device.
- the display panel 5704 can supplement the field of view (blind spot) blocked by the pillars by projecting an image from an image pickup device (not shown) provided in the automobile. That is, by displaying the image from the image pickup device provided on the outside of the automobile, the blind spot can be supplemented and the safety can be enhanced. In addition, by projecting an image that complements the invisible part, it is possible to confirm safety more naturally and without discomfort.
- the display panel 5704 can also be used as a lighting device.
- the GPU or chip of one aspect of the present invention can be applied as a component of artificial intelligence
- the chip can be used, for example, in an automatic driving system of an automobile.
- the chip can be used in a system for performing road guidance, danger prediction, and the like.
- the display panel 5701 to the display panel 5704 may be configured to display information such as road guidance and danger prediction.
- moving objects include trains, monorails, ships, flying objects (helicopters, unmanned aerial vehicles (drones), airplanes, rockets), etc., and the chip of one aspect of the present invention is applied to these moving objects. Therefore, it is possible to provide a system using artificial intelligence.
- FIG. 31H shows an electric freezer / refrigerator 5800 which is an example of an electric appliance.
- the electric freezer / refrigerator 5800 has a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like.
- the electric refrigerator-freezer 5800 By applying the chip of one aspect of the present invention to the electric refrigerator-freezer 5800, it is possible to realize the electric refrigerator-freezer 5800 having artificial intelligence.
- the electric refrigerator-freezer 5800 has a function to automatically generate foods based on the foodstuffs stored in the electric refrigerator-freezer 5800, the expiration date of the foodstuffs, etc., and the foodstuffs stored in the electric food-freezer refrigerator 5800. It can have a function of automatically adjusting the temperature according to the above.
- An electric refrigerator / freezer has been described as an example of electric appliances, but other electric appliances include, for example, a vacuum cleaner, a microwave oven, an electric oven, a rice cooker, a water heater, an IH cooker, a water server, and a heating / cooling device including an air conditioner. Examples include washing machines, dryers, and audiovisual equipment.
- the electronic device described in this embodiment the function of the electronic device, the application example of artificial intelligence, its effect, etc. can be appropriately combined with the description of other electronic devices.
Abstract
Description
図2A乃至図2Cは、金属窒化物の原子配置を説明する図である。図2Dおよび図2Eは、計算モデルを説明するための図である。
図3Aおよび図3Bは、計算結果を説明する図である。
図4A乃至図4Cは、容量素子が有する強誘電体の模式図である。
図5A乃至図5Cは、本発明の一態様である容量素子の作製方法を示す断面図である。
図6Aは、本発明の一態様に係る金属窒化物膜の成膜シーケンスを示す図である。図6Bは、本発明の一態様に係る金属窒化膜の製造装置の断面図である。図6Cは、酸化物の成膜シーケンスを示す図である。
図7A1、図7B1、及び図7C1は、本発明の一態様に係る半導体装置の回路図を説明する図である。図7A2、図7B2、図7C2、図7C3、及び図7C4は、本発明の一態様に係る半導体装置の断面構造を説明する図である。
図8Aは本発明の一態様である半導体装置の上面図である。図8B乃至図8Dは本発明の一態様である半導体装置の断面図である。
図9Aおよび図9Bは本発明の一態様である半導体装置の断面図である。
図10AはIGZOの結晶構造の分類を説明する図である。図10BはCAAC−IGZO膜のXRDスペクトルを説明する図である。図10CはCAAC−IGZO膜の極微電子線回折パターンを説明する図である。
図11Aは本発明の一態様に係る半導体装置の上面図である。図11Bおよび図11Cは本発明の一態様である半導体装置の断面図である。
図12Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図12B乃至図12Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図13Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図13B乃至図13Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図14Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図14B乃至図14Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図15Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図15B乃至図15Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図16Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図16B乃至図16Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図17Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図17B乃至図17Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図18Aは本発明の一態様である半導体装置の上面図である。図18Bは本発明の一態様である半導体装置の断面図である。
図19A乃至図19Dは、本発明の一態様である容量素子の断面図である。
図20A乃至図20Cは本発明の一態様である半導体装置の断面図である。
図21A乃至図21Cは本発明の一態様に係る素子の構成を示す断面図である。
図22は本発明の一態様に係る記憶装置の構成を示す断面図である。
図23は本発明の一態様に係る記憶装置の構成を示す断面図である。
図24Aおよび図24Bは本発明の一態様に係る記憶装置の構成を示す断面図である。
図25は本発明の一態様に係る記憶装置の構成を示す断面図である。
図26は本発明の一態様に係る記憶装置の構成を示す断面図である。
図27A及び図27Bは本発明の一態様に係る記憶装置の構成を示す断面図である。
図28Aは本発明の一態様に係る記憶装置の構成例を示すブロック図である。図28Bは本発明の一態様に係る記憶装置の構成例を示す斜視図である。
図29Aは、メモリセルの構成例を示す回路図である。図29B1は、強誘電体層のヒステリシス特性の一例を示すグラフである。図29B2は、理想的な強誘電体層のヒステリシス特性の一例を示すグラフである。図29Cは、メモリセルの駆動方法の一例を示すタイミングチャートである。
図30A乃至図30Eは本発明の一態様に係る記憶装置の模式図である。
図31A乃至図31Hは本発明の一態様に係る電子機器を示す図である。
本実施の形態では、図1乃至図7を用いて、本発明の一態様に係る、容量素子及び強誘電体デバイスの構成例について説明する。
図1Aに示すように、本発明の一態様に係る容量素子100は、導電体110と、導電体120と、導電体110と導電体120の間に挟まれる絶縁体130と、を有する。例えば、絶縁体105の上に、導電体110が配置され、導電体110の上に絶縁体130が配置され、絶縁体130の上に導電体120が配置される構成にすればよい。ここで、導電体110は容量素子100の下部電極として機能し、導電体120は容量素子100の上部電極として機能し、絶縁体130は、容量素子100の誘電体として機能する。
強誘電性を有しうる材料について、第一原理計算の結果を用いて説明する。ここでは、強誘電性を有しうる材料として、金属窒化物を挙げる。
本項目では、図5A乃至図5Cを用いて、本発明の一態様に係る、容量素子の作製方法について説明する。
以下では、図6A、および図6Bを用いて、ALD法による絶縁体130の成膜方法、および当該成膜に用いる成膜装置について、説明する。
本実施の形態では、図7A1、図7A2、図7B1、図7B2、図7C1、図7C2、図7C3、及び図7C4を用いて、本発明の一態様に係る強誘電体デバイスについて説明を行う。本項目で説明する強誘電体デバイスは、上述の導電体110と、絶縁体130と、導電体120と、を有する、強誘電体デバイスの変形例であるので、導電体110、絶縁体130、および導電体120について、上述の記載を参酌することができる。
本実施の形態では、図8A乃至図21Cを用いて、本発明の一態様に係るトランジスタ200を有する半導体装置の一例、本発明の一態様に係るトランジスタ200および容量素子100を有する半導体装置の一例、およびその作製方法について説明する。ここで、上記半導体装置に用いる容量素子100は、実施の形態1に示す容量素子100に係る記載を参酌することができる。
図8A乃至図8Dは、トランジスタ200を有する半導体装置の上面図および断面図である。図8Aは、当該半導体装置の上面図である。また、図8B乃至図8Dは、当該半導体装置の断面図である。ここで、図8Bは、図8AにA1−A2の一点鎖線で示す部位の断面図であり、トランジスタ200のチャネル長方向の断面図でもある。また、図8Cは、図8AにA3−A4の一点鎖線で示す部位の断面図であり、トランジスタ200のチャネル幅方向の断面図でもある。また、図8Dは、図8AにA5−A6の一点鎖線で示す部位の断面図である。なお、図8Aの上面図では、図の明瞭化のために一部の要素を省いている。
図8A乃至図8Dに示すように、トランジスタ200は、絶縁体214上の絶縁体216と、絶縁体214および/または絶縁体216に埋め込まれるように配置された導電体205(導電体205a、および導電体205b)と、絶縁体216上、および導電体205上の絶縁体222と、絶縁体222上の絶縁体224と、絶縁体224上の酸化物230aと、酸化物230a上の酸化物230bと、酸化物230b上の導電体242aと、導電体242a上の絶縁体271aと、酸化物230b上の導電体242bと、導電体242b上の絶縁体271bと、酸化物230b上の絶縁体252と、絶縁体252上の絶縁体250と、絶縁体250上の絶縁体254と、絶縁体254上に位置し、酸化物230bの一部と重なる導電体260(導電体260a、および導電体260b)と、絶縁体222、絶縁体224、酸化物230a、酸化物230b、導電体242a、導電体242b、絶縁体271a、および絶縁体271b上に配置される絶縁体275と、を有する。ここで、図8Bおよび図8Cに示すように、絶縁体252は、絶縁体222の上面、絶縁体224の側面、酸化物230aの側面、酸化物230bの側面および上面、導電体242の側面、絶縁体271の側面、絶縁体275の側面、絶縁体280の側面、ならびに絶縁体250の下面と接する。また、導電体260の上面は、絶縁体254の最上部、絶縁体250の最上部、絶縁体252の最上部、および絶縁体280の上面と高さが概略一致するように配置される。また、絶縁体282は、導電体260、絶縁体252、絶縁体250、絶縁体254、および絶縁体280のそれぞれの上面の少なくとも一部と接する。
以下では、半導体装置に用いることができる構成材料について説明する。
トランジスタ200を形成する基板としては、例えば、絶縁体基板、半導体基板、または導電体基板を用いればよい。絶縁体基板としては、例えば、ガラス基板、石英基板、サファイア基板、安定化ジルコニア基板(イットリア安定化ジルコニア基板など)、樹脂基板などがある。また、半導体基板としては、例えば、シリコン、ゲルマニウムを材料とした半導体基板、または炭化シリコン、シリコンゲルマニウム、ヒ化ガリウム、リン化インジウム、酸化亜鉛、酸化ガリウムからなる化合物半導体基板などがある。さらには、前述の半導体基板内部に絶縁体領域を有する半導体基板、例えば、SOI(Silicon On Insulator)基板などがある。導電体基板としては、黒鉛基板、金属基板、合金基板、導電性樹脂基板などがある。または、金属の窒化物を有する基板、金属の酸化物を有する基板などがある。さらには、絶縁体基板に導電体または半導体が設けられた基板、半導体基板に導電体または絶縁体が設けられた基板、導電体基板に半導体または絶縁体が設けられた基板などがある。または、これらの基板に素子が設けられたものを用いてもよい。基板に設けられる素子としては、容量素子、抵抗素子、スイッチ素子、発光素子、記憶素子などがある。
絶縁体としては、絶縁性を有する酸化物、窒化物、酸化窒化物、窒化酸化物、金属酸化物、金属酸化窒化物、金属窒化酸化物などがある。
導電体としては、アルミニウム、クロム、銅、銀、金、白金、タンタル、ニッケル、チタン、モリブデン、タングステン、ハフニウム、バナジウム、ニオブ、マンガン、マグネシウム、ジルコニウム、ベリリウム、インジウム、ルテニウム、イリジウム、ストロンチウム、ランタンなどから選ばれた金属元素、または上述した金属元素を成分とする合金か、上述した金属元素を組み合わせた合金等を用いることが好ましい。例えば、窒化タンタル、窒化チタン、タングステン、チタンとアルミニウムを含む窒化物、タンタルとアルミニウムを含む窒化物、酸化ルテニウム、窒化ルテニウム、ストロンチウムとルテニウムを含む酸化物、ランタンとニッケルを含む酸化物などを用いることが好ましい。また、窒化タンタル、窒化チタン、チタンとアルミニウムを含む窒化物、タンタルとアルミニウムを含む窒化物、酸化ルテニウム、窒化ルテニウム、ストロンチウムとルテニウムを含む酸化物、ランタンとニッケルを含む酸化物は、酸化しにくい導電性材料、または、酸素を吸収しても導電性を維持する材料であるため、好ましい。また、リン等の不純物元素を含有させた多結晶シリコンに代表される、電気伝導度が高い半導体、ニッケルシリサイドなどのシリサイドを用いてもよい。
酸化物230として、半導体として機能する金属酸化物(酸化物半導体)を用いることが好ましい。以下では、本発明に係る酸化物230に適用可能な金属酸化物について説明する。
まず、酸化物半導体における、結晶構造の分類について、図10Aを用いて説明を行う。図10Aは、酸化物半導体、代表的にはIGZO(Inと、Gaと、Znと、を含む金属酸化物)の結晶構造の分類を説明する図である。
なお、酸化物半導体は、結晶構造に着目した場合、図10Aとは異なる分類となる場合がある。例えば、酸化物半導体は、単結晶酸化物半導体と、それ以外の非単結晶酸化物半導体と、に分けられる。非単結晶酸化物半導体としては、例えば、上述のCAAC−OS、及びnc−OSがある。また、非単結晶酸化物半導体には、多結晶酸化物半導体、擬似非晶質酸化物半導体(a−like OS:amorphous−like oxide semiconductor)、非晶質酸化物半導体、などが含まれる。
CAAC−OSは、複数の結晶領域を有し、当該複数の結晶領域はc軸が特定の方向に配向している酸化物半導体である。なお、特定の方向とは、CAAC−OS膜の厚さ方向、CAAC−OS膜の被形成面の法線方向、またはCAAC−OS膜の表面の法線方向である。また、結晶領域とは、原子配列に周期性を有する領域である。なお、原子配列を格子配列とみなすと、結晶領域とは、格子配列の揃った領域でもある。さらに、CAAC−OSは、a−b面方向において複数の結晶領域が連結する領域を有し、当該領域は歪みを有する場合がある。なお、歪みとは、複数の結晶領域が連結する領域において、格子配列の揃った領域と、別の格子配列の揃った領域と、の間で格子配列の向きが変化している箇所を指す。つまり、CAAC−OSは、c軸配向し、a−b面方向には明らかな配向をしていない酸化物半導体である。
nc−OSは、微小な領域(例えば、1nm以上10nm以下の領域、特に1nm以上3nm以下の領域)において原子配列に周期性を有する。別言すると、nc−OSは、微小な結晶を有する。なお、当該微小な結晶の大きさは、例えば、1nm以上10nm以下、特に1nm以上3nm以下であることから、当該微小な結晶をナノ結晶ともいう。また、nc−OSは、異なるナノ結晶間で結晶方位に規則性が見られない。そのため、膜全体で配向性が見られない。したがって、nc−OSは、分析方法によっては、a−like OSまたは非晶質酸化物半導体と区別が付かない場合がある。例えば、nc−OS膜に対し、XRD装置を用いて構造解析を行うと、θ/2θスキャンを用いたOut−of−plane XRD測定では、結晶性を示すピークが検出されない。また、nc−OS膜に対し、ナノ結晶よりも大きいプローブ径(例えば50nm以上)の電子線を用いる電子線回折(制限視野電子線回折ともいう。)を行うと、ハローパターンのような回折パターンが観測される。一方、nc−OS膜に対し、ナノ結晶の大きさと近いかナノ結晶より小さいプローブ径(例えば1nm以上30nm以下)の電子線を用いる電子線回折(ナノビーム電子線回折ともいう。)を行うと、ダイレクトスポットを中心とするリング状の領域内に複数のスポットが観測される電子線回折パターンが取得される場合がある。
a−like OSは、nc−OSと非晶質酸化物半導体との間の構造を有する酸化物半導体である。a−like OSは、鬆又は低密度領域を有する。即ち、a−like OSは、nc−OS及びCAAC−OSと比べて、結晶性が低い。また、a−like OSは、nc−OS及びCAAC−OSと比べて、膜中の水素濃度が高い。
次に、上述のCAC−OSの詳細について、説明を行う。なお、CAC−OSは材料構成に関する。
CAC−OSとは、例えば、金属酸化物を構成する元素が、0.5nm以上10nm以下、好ましくは、1nm以上3nm以下、またはその近傍のサイズで偏在した材料の一構成である。なお、以下では、金属酸化物において、一つまたは複数の金属元素が偏在し、該金属元素を有する領域が、0.5nm以上10nm以下、好ましくは、1nm以上3nm以下、またはその近傍のサイズで混合した状態をモザイク状、またはパッチ状ともいう。
続いて、上記酸化物半導体をトランジスタに用いる場合について説明する。
ここで、酸化物半導体中における各不純物の影響について説明する。
酸化物230に用いることができる半導体材料は、上述の金属酸化物に限られない。酸化物230として、バンドギャップを有する半導体材料(ゼロギャップ半導体ではない半導体材料)を用いてもよい。例えば、シリコンなどの単体元素の半導体、ヒ化ガリウムなどの化合物半導体、半導体として機能する層状物質(原子層物質、2次元材料などともいう。)などを半導体材料に用いることが好ましい。特に、半導体として機能する層状物質を半導体材料に用いると好適である。
以下では、図11を用いて、本発明の一態様である半導体装置の一例について説明する。
次に、図8A乃至図8Dに示す、本発明の一態様である半導体装置の作製方法を、図12A乃至図17Dを用いて説明する。
図18Aおよび図18Bに、上記のトランジスタ200と、先の実施の形態に係る容量素子100と、を有する半導体装置を示す。図18Aは、当該半導体装置の上面図である。また、図18Bは、図18AにA1−A2の一点鎖線で示す部位の断面図であり、トランジスタ200のチャネル長方向の断面図でもある。なお、図18Aの上面図では、図の明瞭化のために一部の要素を省いている。
なお、図18Aおよび図18Bに示す容量素子100は、図1Aに示す容量素子100と同様に、導電体110の側面と、絶縁体130の側面と、導電体120の側面と、が概略一致している構成としたが、本発明はこれに限られるものではない。以下に、図19A乃至図19Dを用いて、図18Aおよび図18Bに示す容量素子100の変形例について示す。
図18では、トランジスタ200が、強誘電性を有しうる材料を含む容量素子100と接続する構成について示したが、本発明はこれに限られるものではない。例えば、トランジスタ200、およびその周囲に設けられる絶縁体として、強誘電性を有しうる材料を用いる構成にしてもよい。このような構成のトランジスタについて、図20A乃至図20Cを用いて説明する。なお、図20A乃至図20Cに示すトランジスタ200は、図8に示すトランジスタ200において、さらに、導電体240a、導電体240b、導電体246a、導電体246b、絶縁体241a、および絶縁体241bを設けている。導電体246aおよび導電体246bは、上述の導電体246と同様の導電体であり、導電体246aは導電体240aの上面に接して設けられており、導電体246bは導電体240bの上面に接して設けられている。
図19Aに示す容量素子100では、絶縁体130が、絶縁体287の上面、導電体110の上面および側面に接する構成にしたが、本発明はこれに限られるものではない。図21Aに示すように、絶縁体130と、絶縁体287および導電体110との間に、絶縁体115aを設ける構成にしてもよい。つまり、絶縁体130が絶縁体115aの上面に接し、絶縁体287および導電体110が絶縁体115aの下面に接する。ここで、絶縁体115aは、先の実施の形態で、図7C2などに示す絶縁体115aを用いることができる。また、絶縁体115aの膜厚は、0.2nm以上2nm以下、好ましくは0.5nm以上1nm以下にすればよい。このような構成にすることで、図21Aに示す容量素子100は、図7C1および図7C2に示す、容量素子とダイオードを接続したFTJ素子として機能させることができる。
本実施の形態では、半導体装置の一形態を、図22を用いて説明する。
本発明の一態様に係る半導体装置(記憶装置)の一例を図22に示す。本発明の一態様の記憶装置では、トランジスタ200はトランジスタ300の上方に設けられ、容量素子100はトランジスタ300、およびトランジスタ200の上方に設けられている。なお、トランジスタ200として、先の実施の形態で説明したトランジスタ200を用いることができる。また、容量素子100として、先の実施の形態で説明した容量素子100を用いることができる。なお、図22では、図19Aに示す容量素子100および図18Bに示すトランジスタ200を用いる例について示しているが、本発明はこれに限られることなく、容量素子100およびトランジスタ200を適宜選択することができる。
トランジスタ300は、基板311上に設けられ、ゲートとして機能する導電体316、ゲート絶縁体として機能する絶縁体315、基板311の一部からなる半導体領域313、およびソース領域またはドレイン領域として機能する低抵抗領域314a、および低抵抗領域314bを有する。トランジスタ300は、pチャネル型、あるいはnチャネル型のいずれでもよい。
各構造体の間には、層間膜、配線、およびプラグ等が設けられた配線層が設けられていてもよい。また、配線層は、設計に応じて複数層設けることができる。ここで、プラグまたは配線としての機能を有する導電体は、複数の構造をまとめて同一の符号を付与する場合がある。また、本明細書等において、配線と、配線と電気的に接続するプラグとが一体物であってもよい。すなわち、導電体の一部が配線として機能する場合、および導電体の一部がプラグとして機能する場合もある。
なお、トランジスタ200に、酸化物半導体を用いる場合、酸化物半導体の近傍に過剰酸素領域を有する絶縁体を設けることがある。その場合、該過剰酸素領域を有する絶縁体と、該過剰酸素領域を有する絶縁体に設ける導電体との間に、バリア性を有する絶縁体を設けることが好ましい。
以下では、大面積基板を半導体素子ごとに分断することによって、複数の半導体装置をチップ状で取り出す場合に設けられるダイシングライン(スクライブライン、分断ライン、又は切断ラインと呼ぶ場合がある)について説明する。分断方法としては、例えば、まず、基板に半導体素子を分断するための溝(ダイシングライン)を形成した後、ダイシングラインにおいて切断し、複数の半導体装置に分断(分割)する場合がある。
図22に示す記憶装置では、容量素子100の形状をプレーナ型としたが、本実施の形態に示す記憶装置はこれに限られるものではない。たとえば、図23に示すように、容量素子100の形状をシリンダ型にしてもよい。なお、図23に示す記憶装置は、絶縁体287より下の構成は、図22に示す記憶装置と同様である。
なお、図22に示す記憶装置では、トランジスタ200と容量素子100が電気的に接続される構成であったが、本発明はこれに限られるものではない。図24Aに示すように、トランジスタ200と容量素子100が電気的に接続されない構成にしてもよい。ここで、図24Aに示す記憶装置は、絶縁体212より上のトランジスタ200および容量素子100については、図22に示す記憶装置と同様の構成を有する。絶縁体212より下は、図22に示す記憶装置と同様の構成にしてもよいし、絶縁体212の下に接して基板311を設けるような構成にしてもよい。
図22に示す記憶装置は、トランジスタ200と容量素子100が、水素に対するバリア絶縁膜によって、個別に封止されていたが、本発明はこれに限られるものではない。図25に示すように、トランジスタ200と容量素子100を、水素に対するバリア絶縁膜(絶縁体212、絶縁体152a、および絶縁体152b)によって、一括して封止する構成にしてもよい。
図25に示す記憶装置は、トランジスタ200の上に容量素子100が設けられていたが、本発明はこれに限られるものではない。図26に示すように、トランジスタ200と同じ層に容量素子100を設ける構成にしてもよい。
図22などに示す記憶装置は、トランジスタ300上にトランジスタ200を設け、トランジスタ200に容量素子100を接続する構成であったが、本発明はこれに限られるものではない。図27Aに示すように、トランジスタ200を設けずに、トランジスタ300に容量素子100を接続する構成にしてもよい。
本実施の形態では、図28A、および図28Bを用いて、本発明の一態様に係る、酸化物を半導体に用いたトランジスタ(以下、OSトランジスタと呼ぶ場合がある。)、および強誘電キャパシタが適用されている記憶装置について説明する。本実施の形態に係る装置は、少なくとも容量素子と、容量素子の充放電を制御するOSトランジスタを有する記憶装置である。本実施の形態に係る装置は、強誘電キャパシタを用いた、1トランジスタ1キャパシタ型の強誘電体メモリとして機能する。
図28Aに記憶装置の構成の一例を示す。記憶装置1400は、周辺回路1411、およびメモリセルアレイ1470を有する。周辺回路1411は、行回路1420、列回路1430、出力回路1440、およびコントロールロジック回路1460を有する。
図29Aに示す回路図に、上述のメモリセルMCの構成例を示す。メモリセルMCは、トランジスタTrと、容量Feと、を有する。ここで、メモリセルMCとして、先の実施の形態に示す、トランジスタ200および容量素子100を有する半導体装置などを用いることができる。この場合、トランジスタTrはトランジスタ200に、容量Feは容量素子100に対応する。なお、トランジスタTrは、ゲートの他、バックゲートを有してもよいし、有していなくてもよい。また、図29Aでは、トランジスタTrをnチャネル型トランジスタとしているが、pチャネル型トランジスタとしてもよい。
以下では、図29Aに示すメモリセルMCの駆動方法の一例を説明する。以下の説明において、容量Feの強誘電体層に印加される電圧とは、容量Feの一方の電極の電位と、容量Feの他方の電極(配線PL)の電位と、の差を示すものとする。また、トランジスタTrは、nチャネル型トランジスタとする。
本実施の形態では、先の実施の形態に示す半導体装置を用いた記憶装置の応用例について説明する。先の実施の形態に示す半導体装置は、例えば、各種電子機器(例えば、情報端末、コンピュータ、スマートフォン、電子書籍端末、デジタルカメラ(ビデオカメラも含む)、録画再生装置、ナビゲーションシステムなど)の記憶装置に適用できる。なお、ここで、コンピュータとは、タブレット型のコンピュータ、ノート型のコンピュータ、デスクトップ型のコンピュータの他、サーバシステムのような大型のコンピュータを含むものである。または、先の実施の形態に示す半導体装置は、メモリカード(例えば、SDカード)、USBメモリ、SSD(ソリッド・ステート・ドライブ)等の各種のリムーバブル記憶装置に適用される。図30A乃至図30Eにリムーバブル記憶装置の幾つかの構成例を模式的に示す。例えば、先の実施の形態に示す半導体装置は、パッケージングされたメモリチップに加工され、様々なストレージ装置、リムーバブルメモリに用いられる。
本発明の一態様に係る半導体装置は、CPU、GPUなどのプロセッサ、またはチップに用いることができる。上記実施の形態に示す半導体装置を、CPU、GPUなどのプロセッサ、またはチップに用いることで、これらを小型化し、さらに記憶容量を大きくすることができる。図31A乃至図31Hに、本発明の一態様に係るCPU、GPUなどのプロセッサ、またはチップを備えた電子機器の具体例を示す。
本発明の一態様に係るGPUまたはチップは、様々な電子機器に搭載することができる。電子機器の例としては、例えば、テレビジョン装置、デスクトップ型またはノート型の情報端末用などのモニタ、デジタルサイネージ(Digital Signage:電子看板)、パチンコ機などの大型ゲーム機、などの比較的大きな画面を備える電子機器の他、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、電子ブックリーダー、携帯電話機、携帯型ゲーム機、携帯情報端末、音響再生装置、などが挙げられる。また、本発明の一態様に係るGPUまたはチップを電子機器に設けることにより、電子機器に人工知能を搭載することができる。
図31Aには、情報端末の一種である携帯電話(スマートフォン)が図示されている。情報端末5100は、筐体5101と、表示部5102と、を有しており、入力用インターフェースとして、タッチパネルが表示部5102に備えられ、ボタンが筐体5101に備えられている。
図31Cは、ゲーム機の一例である携帯ゲーム機5300を示している。携帯ゲーム機5300は、筐体5301、筐体5302、筐体5303、表示部5304、接続部5305、操作キー5306等を有する。筐体5302、および筐体5303は、筐体5301から取り外すことが可能である。筐体5301に設けられている接続部5305を別の筐体(図示せず)に取り付けることで、表示部5304に出力される映像を、別の映像機器(図示せず)に出力することができる。このとき、筐体5302、および筐体5303は、それぞれ操作部として機能することができる。これにより、複数のプレイヤーが同時にゲームを行うことができる。筐体5301、筐体5302、および筐体5303の基板に設けられているチップなどに先の実施の形態に示すチップを組み込むことができる。
本発明の一態様のGPUまたはチップは、大型コンピュータに適用することができる。
本発明の一態様のGPUまたはチップは、移動体である自動車、および自動車の運転席周辺に適用することができる。
図31Hは、電化製品の一例である電気冷凍冷蔵庫5800を示している。電気冷凍冷蔵庫5800は、筐体5801、冷蔵室用扉5802、冷凍室用扉5803等を有する。
Claims (11)
- 絶縁膜と、
前記絶縁膜上の、第1の導電体と、
前記第1の導電体上の、金属窒化物膜と、
前記金属窒化物膜上の、第2の導電体と、
前記第1の導電体上、前記金属窒化物膜上、および前記第2の導電体上の、第1の絶縁体と、
前記第1の絶縁体上の、第2の絶縁体と、を有し、
前記第1の導電体、前記金属窒化物膜、および前記第2の導電体は、前記絶縁膜と、前記第1の絶縁体および前記第2の絶縁体と、で包まれ、
前記金属窒化物膜は、強誘電性を有し、
前記金属窒化物膜は、第1の元素と、第2の元素と、窒素と、を有し、
前記第1の元素は、第13族元素から選ばれる一以上の元素であり、
前記第2の元素は、前記第1の元素を除く第13族元素、ならびに、第2族元素乃至第6族元素から選ばれる一以上の元素であり、
前記第1の導電体、および前記第2の導電体のそれぞれは、窒素を有し、
前記第1の絶縁体は、アルミニウムと、酸素と、を有し、
前記絶縁膜、および前記第2の絶縁体のそれぞれは、シリコンと、窒素と、を有する、
強誘電体デバイス。 - 第1の導電体と、
前記第1の導電体上の、金属窒化物膜と、
前記金属窒化物膜上の、第2の導電体と、
前記第1の導電体上、前記金属窒化物膜上、および前記第2の導電体上の、第1の絶縁体と、
前記第1の絶縁体上の、第2の絶縁体と、を有し、
前記第1の絶縁体は、前記金属窒化物膜の側面と接する領域、前記第2の導電体の側面と接する領域、および前記第2の導電体の上面と接する領域を有し、
前記金属窒化物膜は、強誘電性を有し、
前記金属窒化物膜は、第1の元素と、第2の元素と、窒素と、を有し、
前記第1の元素は、第13族元素から選ばれる一以上の元素であり、
前記第2の元素は、前記第1の元素を除く第13族元素、ならびに、第2族元素乃至第6族元素から選ばれる一以上の元素であり、
前記第1の導電体、および前記第2の導電体のそれぞれは、窒素を有し、
前記第1の絶縁体は、アルミニウムと、酸素と、を有し、
前記第2の絶縁体は、シリコンと、窒素と、を有する、
強誘電体デバイス。 - 請求項1または請求項2のいずれか一項において、
前記第1の絶縁体は、アモルファス構造を有する、
強誘電体デバイス。 - 絶縁膜と、
前記絶縁膜上の、第1の導電体と、
前記第1の導電体上の、金属窒化物膜と、
前記金属窒化物膜上の、第2の導電体と、
前記第1の導電体上、前記金属窒化物膜上、および前記第2の導電体上の、絶縁体と、を有し、
前記絶縁体は、前記絶縁膜の上面と接する領域、前記金属窒化物膜の側面と接する領域、前記第2の導電体の側面と接する領域、および前記第2の導電体の上面と接する領域を有し、
前記金属窒化物膜は、強誘電性を有し、
前記金属窒化物膜は、第1の元素と、第2の元素と、窒素と、を有し、
前記第1の元素は、第13族元素から選ばれる一以上の元素であり、
前記第2の元素は、前記第1の元素を除く第13族元素、ならびに、第2族元素乃至第6族元素から選ばれる一以上の元素であり、
前記第1の導電体、および前記第2の導電体のそれぞれは、窒素を有し、
前記絶縁膜、および前記絶縁体のそれぞれは、シリコンと、窒素と、を有する、
強誘電体デバイス。 - 請求項1乃至請求項4のいずれか一項において、
前記金属窒化物膜は、ウルツ鉱型構造を有する、
強誘電体デバイス。 - 請求項1乃至請求項5のいずれか一項において、
前記第1の元素は、アルミニウムであり、
前記第2の元素は、ランタノイド、およびアクチノイドから選ばれる一つまたは複数である、
強誘電体デバイス。 - 請求項1乃至請求項5のいずれか一項において、
前記第1の元素は、アルミニウムであり、
前記第2の元素は、チタン、ジルコニウム、ハフニウム、バナジウム、ニオブ、およびタンタルから選ばれる一つまたは複数である、
強誘電体デバイス。 - 請求項1乃至請求項7のいずれか一項において、
前記第1の導電体は、塩化ナトリウム型構造の結晶を有する、
強誘電体デバイス。 - 請求項1乃至請求項8のいずれか一項において、
前記第1の導電体と、前記金属窒化物膜と、の間に、窒化シリコン膜を有する、
強誘電体デバイス。 - 請求項1乃至請求項8のいずれか一項において、
前記金属窒化物膜と、前記第2の導電体と、の間に、窒化シリコン膜を有する、
強誘電体デバイス。 - 請求項1乃至請求項8のいずれか一項に記載の強誘電体デバイスと、チャネル形成領域に酸化物半導体を含むトランジスタと、を有する半導体装置。
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CN202180071444.2A CN116438634A (zh) | 2020-10-20 | 2021-10-12 | 铁电器件、半导体装置 |
US18/030,334 US20230380180A1 (en) | 2020-10-20 | 2021-10-12 | Ferroelectric device and semiconductor device |
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JP2001223342A (ja) * | 1999-12-22 | 2001-08-17 | Texas Instr Inc <Ti> | 半導体デバイスの強誘電性コンデンサ下に位置する導電性プラグを平坦化する方法 |
JP2002359291A (ja) * | 2002-03-25 | 2002-12-13 | Seiko Epson Corp | 強誘電体装置の製造方法および強誘電体装置 |
WO2010032456A1 (ja) * | 2008-09-16 | 2010-03-25 | ローム株式会社 | 半導体記憶装置および半導体記憶装置の製造方法 |
JP2010251590A (ja) * | 2009-04-17 | 2010-11-04 | Seiko Epson Corp | 半導体装置とその製造方法 |
JP2011151370A (ja) * | 2009-12-25 | 2011-08-04 | Ricoh Co Ltd | 電界効果型トランジスタ、半導体メモリ、表示素子、画像表示装置及びシステム |
JP2014053568A (ja) * | 2012-09-10 | 2014-03-20 | Toshiba Corp | 強誘電体メモリ及びその製造方法 |
JP2017201050A (ja) * | 2016-05-06 | 2017-11-09 | 学校法人早稲田大学 | 圧電体薄膜及びそれを用いた圧電素子 |
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JP2001223342A (ja) * | 1999-12-22 | 2001-08-17 | Texas Instr Inc <Ti> | 半導体デバイスの強誘電性コンデンサ下に位置する導電性プラグを平坦化する方法 |
JP2002359291A (ja) * | 2002-03-25 | 2002-12-13 | Seiko Epson Corp | 強誘電体装置の製造方法および強誘電体装置 |
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JP2010251590A (ja) * | 2009-04-17 | 2010-11-04 | Seiko Epson Corp | 半導体装置とその製造方法 |
JP2011151370A (ja) * | 2009-12-25 | 2011-08-04 | Ricoh Co Ltd | 電界効果型トランジスタ、半導体メモリ、表示素子、画像表示装置及びシステム |
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JP2017201050A (ja) * | 2016-05-06 | 2017-11-09 | 学校法人早稲田大学 | 圧電体薄膜及びそれを用いた圧電素子 |
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DE112021005537T5 (de) | 2023-08-17 |
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