WO2022049459A1 - 金属酸化物膜、半導体装置、およびその作製方法 - Google Patents
金属酸化物膜、半導体装置、およびその作製方法 Download PDFInfo
- Publication number
- WO2022049459A1 WO2022049459A1 PCT/IB2021/057803 IB2021057803W WO2022049459A1 WO 2022049459 A1 WO2022049459 A1 WO 2022049459A1 IB 2021057803 W IB2021057803 W IB 2021057803W WO 2022049459 A1 WO2022049459 A1 WO 2022049459A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- insulator
- oxide
- conductor
- film
- oxygen
- Prior art date
Links
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 90
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 88
- 239000004065 semiconductor Substances 0.000 title claims description 333
- 238000004519 manufacturing process Methods 0.000 title claims description 80
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 258
- 239000001301 oxygen Substances 0.000 claims abstract description 255
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 247
- 229910052735 hafnium Inorganic materials 0.000 claims abstract description 60
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052726 zirconium Inorganic materials 0.000 claims abstract description 36
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims abstract description 34
- 239000004020 conductor Substances 0.000 claims description 515
- 229910052739 hydrogen Inorganic materials 0.000 claims description 188
- 239000001257 hydrogen Substances 0.000 claims description 186
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 173
- 239000007789 gas Substances 0.000 claims description 167
- 239000002243 precursor Substances 0.000 claims description 62
- 230000001590 oxidative effect Effects 0.000 claims description 50
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 42
- 229910052799 carbon Inorganic materials 0.000 claims description 40
- 229910052710 silicon Inorganic materials 0.000 claims description 39
- 239000010703 silicon Substances 0.000 claims description 39
- 238000010926 purge Methods 0.000 claims description 22
- 238000004458 analytical method Methods 0.000 claims description 11
- 239000000460 chlorine Substances 0.000 claims description 10
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims description 9
- 229910052801 chlorine Inorganic materials 0.000 claims description 9
- 229910007926 ZrCl Inorganic materials 0.000 claims description 5
- 229910003865 HfCl4 Inorganic materials 0.000 claims description 3
- PDPJQWYGJJBYLF-UHFFFAOYSA-J hafnium tetrachloride Chemical group Cl[Hf](Cl)(Cl)Cl PDPJQWYGJJBYLF-UHFFFAOYSA-J 0.000 claims description 3
- 230000001404 mediated effect Effects 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 121
- 230000005621 ferroelectricity Effects 0.000 abstract description 43
- 230000002349 favourable effect Effects 0.000 abstract 1
- 239000012212 insulator Substances 0.000 description 1097
- 239000010408 film Substances 0.000 description 538
- 238000000034 method Methods 0.000 description 279
- 230000006870 function Effects 0.000 description 164
- 239000000758 substrate Substances 0.000 description 139
- 239000010410 layer Substances 0.000 description 136
- 238000010438 heat treatment Methods 0.000 description 117
- 239000012535 impurity Substances 0.000 description 109
- 238000000231 atomic layer deposition Methods 0.000 description 105
- 238000004544 sputter deposition Methods 0.000 description 102
- 230000015572 biosynthetic process Effects 0.000 description 95
- 239000013078 crystal Substances 0.000 description 91
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 74
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 64
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 64
- 229910001868 water Inorganic materials 0.000 description 64
- 229910052814 silicon oxide Inorganic materials 0.000 description 57
- 229910052581 Si3N4 Inorganic materials 0.000 description 56
- 238000005229 chemical vapour deposition Methods 0.000 description 54
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 53
- 239000012298 atmosphere Substances 0.000 description 50
- 229910052782 aluminium Inorganic materials 0.000 description 48
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 48
- 229910052751 metal Inorganic materials 0.000 description 48
- 229910000449 hafnium oxide Inorganic materials 0.000 description 45
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 45
- 239000002184 metal Substances 0.000 description 42
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 40
- 238000009792 diffusion process Methods 0.000 description 39
- 238000012545 processing Methods 0.000 description 39
- 239000011701 zinc Substances 0.000 description 39
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 38
- 125000004429 atom Chemical group 0.000 description 38
- 230000004888 barrier function Effects 0.000 description 35
- 238000006243 chemical reaction Methods 0.000 description 32
- 229910052757 nitrogen Inorganic materials 0.000 description 30
- 238000004549 pulsed laser deposition Methods 0.000 description 29
- 238000010586 diagram Methods 0.000 description 28
- 150000004767 nitrides Chemical class 0.000 description 28
- -1 for example Chemical compound 0.000 description 27
- 239000000203 mixture Substances 0.000 description 26
- 238000001451 molecular beam epitaxy Methods 0.000 description 26
- 229910052721 tungsten Inorganic materials 0.000 description 26
- 239000010937 tungsten Substances 0.000 description 26
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 25
- 206010021143 Hypoxia Diseases 0.000 description 24
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 24
- 230000007547 defect Effects 0.000 description 22
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 21
- 150000002431 hydrogen Chemical class 0.000 description 21
- 229910052715 tantalum Inorganic materials 0.000 description 21
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 21
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical group [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 20
- 238000005530 etching Methods 0.000 description 20
- 239000010936 titanium Chemical group 0.000 description 20
- 229910052719 titanium Inorganic materials 0.000 description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 19
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 19
- 238000004140 cleaning Methods 0.000 description 19
- 238000001312 dry etching Methods 0.000 description 19
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 19
- 238000003860 storage Methods 0.000 description 19
- 229910001928 zirconium oxide Inorganic materials 0.000 description 19
- 230000007423 decrease Effects 0.000 description 18
- 239000010409 thin film Substances 0.000 description 18
- 229910052802 copper Inorganic materials 0.000 description 17
- 239000010949 copper Substances 0.000 description 17
- 229910001882 dioxygen Inorganic materials 0.000 description 16
- 229910001873 dinitrogen Inorganic materials 0.000 description 15
- 229930195733 hydrocarbon Natural products 0.000 description 15
- 150000002430 hydrocarbons Chemical class 0.000 description 15
- 229910052738 indium Inorganic materials 0.000 description 15
- 239000011261 inert gas Substances 0.000 description 15
- 230000008569 process Effects 0.000 description 15
- 239000002356 single layer Substances 0.000 description 15
- 239000000126 substance Substances 0.000 description 15
- 230000015654 memory Effects 0.000 description 14
- 239000002994 raw material Substances 0.000 description 14
- 229910052712 strontium Inorganic materials 0.000 description 14
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 13
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 13
- XEEYBQQBJWHFJM-UHFFFAOYSA-N iron Substances [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 13
- 229910052746 lanthanum Inorganic materials 0.000 description 13
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 description 13
- 230000003647 oxidation Effects 0.000 description 13
- 238000007254 oxidation reaction Methods 0.000 description 13
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 13
- 230000007812 deficiency Effects 0.000 description 12
- 229910052733 gallium Inorganic materials 0.000 description 12
- 239000011229 interlayer Substances 0.000 description 12
- 229910052759 nickel Inorganic materials 0.000 description 12
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 12
- 238000001039 wet etching Methods 0.000 description 12
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 11
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 11
- 239000003990 capacitor Substances 0.000 description 11
- 229910052731 fluorine Inorganic materials 0.000 description 11
- 239000011737 fluorine Substances 0.000 description 11
- 230000037230 mobility Effects 0.000 description 11
- 229910052750 molybdenum Inorganic materials 0.000 description 11
- 239000011733 molybdenum Substances 0.000 description 11
- 229910052707 ruthenium Inorganic materials 0.000 description 11
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 10
- 239000004215 Carbon black (E152) Substances 0.000 description 10
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical group [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 10
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 10
- 230000005684 electric field Effects 0.000 description 10
- 238000012986 modification Methods 0.000 description 10
- 230000004048 modification Effects 0.000 description 10
- 230000010287 polarization Effects 0.000 description 10
- 239000010453 quartz Substances 0.000 description 10
- 230000000694 effects Effects 0.000 description 9
- 230000005669 field effect Effects 0.000 description 9
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 9
- 238000005259 measurement Methods 0.000 description 9
- 230000007246 mechanism Effects 0.000 description 9
- 239000007800 oxidant agent Substances 0.000 description 9
- 125000004430 oxygen atom Chemical group O* 0.000 description 9
- 238000012546 transfer Methods 0.000 description 9
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 8
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 8
- 239000002131 composite material Substances 0.000 description 8
- 230000010354 integration Effects 0.000 description 8
- 229910052749 magnesium Inorganic materials 0.000 description 8
- 239000011777 magnesium Substances 0.000 description 8
- 239000000395 magnesium oxide Substances 0.000 description 8
- 239000011347 resin Substances 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- 239000000523 sample Substances 0.000 description 8
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 8
- 229910052727 yttrium Inorganic materials 0.000 description 8
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 8
- 229910052725 zinc Inorganic materials 0.000 description 8
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 7
- 230000009471 action Effects 0.000 description 7
- 239000003463 adsorbent Substances 0.000 description 7
- 238000000137 annealing Methods 0.000 description 7
- 238000010894 electron beam technology Methods 0.000 description 7
- 239000011810 insulating material Substances 0.000 description 7
- 229910052742 iron Inorganic materials 0.000 description 7
- 238000001459 lithography Methods 0.000 description 7
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 7
- 238000002156 mixing Methods 0.000 description 7
- 238000007789 sealing Methods 0.000 description 7
- 239000007787 solid Substances 0.000 description 7
- 238000001228 spectrum Methods 0.000 description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 6
- 239000000956 alloy Substances 0.000 description 6
- 229910052786 argon Inorganic materials 0.000 description 6
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 6
- 229910002113 barium titanate Inorganic materials 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 6
- 230000008859 change Effects 0.000 description 6
- 229910052804 chromium Inorganic materials 0.000 description 6
- 239000011651 chromium Substances 0.000 description 6
- 150000001875 compounds Chemical class 0.000 description 6
- 238000003795 desorption Methods 0.000 description 6
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 6
- 239000000945 filler Substances 0.000 description 6
- 229910001195 gallium oxide Inorganic materials 0.000 description 6
- 229910052732 germanium Inorganic materials 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical group [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 6
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 6
- 229910003437 indium oxide Inorganic materials 0.000 description 6
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 6
- 229910052451 lead zirconate titanate Inorganic materials 0.000 description 6
- 239000011148 porous material Substances 0.000 description 6
- 238000011160 research Methods 0.000 description 6
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 6
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 6
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 6
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 5
- 229910052779 Neodymium Inorganic materials 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 5
- 235000011114 ammonium hydroxide Nutrition 0.000 description 5
- 239000007864 aqueous solution Substances 0.000 description 5
- 238000013461 design Methods 0.000 description 5
- 238000002003 electron diffraction Methods 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- 239000002159 nanocrystal Substances 0.000 description 5
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 5
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 5
- 239000012466 permeate Substances 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 5
- 229910052720 vanadium Inorganic materials 0.000 description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical group [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 4
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 4
- 229910052783 alkali metal Inorganic materials 0.000 description 4
- 150000001340 alkali metals Chemical class 0.000 description 4
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 4
- 150000001342 alkaline earth metals Chemical class 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 4
- 239000000969 carrier Substances 0.000 description 4
- 210000004027 cell Anatomy 0.000 description 4
- 150000004770 chalcogenides Chemical class 0.000 description 4
- 229910000423 chromium oxide Inorganic materials 0.000 description 4
- 239000000470 constituent Substances 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 238000002149 energy-dispersive X-ray emission spectroscopy Methods 0.000 description 4
- SHXXPRJOPFJRHA-UHFFFAOYSA-K iron(iii) fluoride Chemical compound F[Fe](F)F SHXXPRJOPFJRHA-UHFFFAOYSA-K 0.000 description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 4
- PLDDOISOJJCEMH-UHFFFAOYSA-N neodymium(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Nd+3].[Nd+3] PLDDOISOJJCEMH-UHFFFAOYSA-N 0.000 description 4
- 229910052756 noble gas Inorganic materials 0.000 description 4
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 238000004151 rapid thermal annealing Methods 0.000 description 4
- 238000009751 slip forming Methods 0.000 description 4
- 229910001936 tantalum oxide Inorganic materials 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- 229910052723 transition metal Inorganic materials 0.000 description 4
- GPPXJZIENCGNKB-UHFFFAOYSA-N vanadium Chemical group [V]#[V] GPPXJZIENCGNKB-UHFFFAOYSA-N 0.000 description 4
- 239000011787 zinc oxide Substances 0.000 description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 3
- 229910052684 Cerium Inorganic materials 0.000 description 3
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 3
- 238000004833 X-ray photoelectron spectroscopy Methods 0.000 description 3
- 239000006227 byproduct Substances 0.000 description 3
- ZMIGMASIKSOYAM-UHFFFAOYSA-N cerium Chemical compound [Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce][Ce] ZMIGMASIKSOYAM-UHFFFAOYSA-N 0.000 description 3
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical compound [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 description 3
- 230000002950 deficient Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 3
- 238000007865 diluting Methods 0.000 description 3
- YBMRDBCBODYGJE-UHFFFAOYSA-N germanium oxide Inorganic materials O=[Ge]=O YBMRDBCBODYGJE-UHFFFAOYSA-N 0.000 description 3
- KQHQLIAOAVMAOW-UHFFFAOYSA-N hafnium(4+) oxygen(2-) zirconium(4+) Chemical compound [O--].[O--].[O--].[O--].[Zr+4].[Hf+4] KQHQLIAOAVMAOW-UHFFFAOYSA-N 0.000 description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 3
- 238000009616 inductively coupled plasma Methods 0.000 description 3
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 description 3
- 238000005121 nitriding Methods 0.000 description 3
- 125000004433 nitrogen atom Chemical group N* 0.000 description 3
- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 3
- PVADDRMAFCOOPC-UHFFFAOYSA-N oxogermanium Chemical compound [Ge]=O PVADDRMAFCOOPC-UHFFFAOYSA-N 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
- 239000013589 supplement Substances 0.000 description 3
- 229910052714 tellurium Inorganic materials 0.000 description 3
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 3
- 229910001930 tungsten oxide Inorganic materials 0.000 description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 2
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000004783 Serene Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910001080 W alloy Inorganic materials 0.000 description 2
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 229910052788 barium Inorganic materials 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- 229910052797 bismuth Inorganic materials 0.000 description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 2
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 2
- 229910052794 bromium Inorganic materials 0.000 description 2
- 229910052800 carbon group element Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052798 chalcogen Inorganic materials 0.000 description 2
- 150000001787 chalcogens Chemical class 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000002524 electron diffraction data Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- 238000001093 holography Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- PNDPGZBMCMUPRI-UHFFFAOYSA-N iodine Chemical compound II PNDPGZBMCMUPRI-UHFFFAOYSA-N 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000000386 microscopy Methods 0.000 description 2
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 2
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 2
- 229910021334 nickel silicide Inorganic materials 0.000 description 2
- 229910052758 niobium Inorganic materials 0.000 description 2
- 239000010955 niobium Substances 0.000 description 2
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 238000001552 radio frequency sputter deposition Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000004645 scanning capacitance microscopy Methods 0.000 description 2
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 2
- MTCFGRXMJLQNBG-UHFFFAOYSA-N serine Chemical compound OCC(N)C(O)=O MTCFGRXMJLQNBG-UHFFFAOYSA-N 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- 238000012916 structural analysis Methods 0.000 description 2
- 238000004506 ultrasonic cleaning Methods 0.000 description 2
- 229910052724 xenon Inorganic materials 0.000 description 2
- 229910000859 α-Fe Inorganic materials 0.000 description 2
- 210000002925 A-like Anatomy 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 108010083687 Ion Pumps Proteins 0.000 description 1
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- 229910016001 MoSe Inorganic materials 0.000 description 1
- 239000004677 Nylon Substances 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 description 1
- 229910003902 SiCl 4 Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 238000003917 TEM image Methods 0.000 description 1
- 238000005411 Van der Waals force Methods 0.000 description 1
- 229910007932 ZrCl4 Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 229910052790 beryllium Inorganic materials 0.000 description 1
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical group [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 1
- WVMYSOZCZHQCSG-UHFFFAOYSA-N bis(sulfanylidene)zirconium Chemical compound S=[Zr]=S WVMYSOZCZHQCSG-UHFFFAOYSA-N 0.000 description 1
- 229910000416 bismuth oxide Inorganic materials 0.000 description 1
- 229910052795 boron group element Inorganic materials 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- TYIXMATWDRGMPF-UHFFFAOYSA-N dibismuth;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Bi+3].[Bi+3] TYIXMATWDRGMPF-UHFFFAOYSA-N 0.000 description 1
- 238000002050 diffraction method Methods 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- NRJVMVHUISHHQB-UHFFFAOYSA-N hafnium(4+);disulfide Chemical compound [S-2].[S-2].[Hf+4] NRJVMVHUISHHQB-UHFFFAOYSA-N 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 125000005843 halogen group Chemical group 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 238000002173 high-resolution transmission electron microscopy Methods 0.000 description 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- 239000002648 laminated material Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 239000011572 manganese Substances 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 229910001507 metal halide Inorganic materials 0.000 description 1
- 150000005309 metal halides Chemical class 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical compound S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 description 1
- 229910000484 niobium oxide Inorganic materials 0.000 description 1
- URLJKFSTXLNXLG-UHFFFAOYSA-N niobium(5+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Nb+5].[Nb+5] URLJKFSTXLNXLG-UHFFFAOYSA-N 0.000 description 1
- 238000006902 nitrogenation reaction Methods 0.000 description 1
- 229920001778 nylon Polymers 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000879 optical micrograph Methods 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 235000006408 oxalic acid Nutrition 0.000 description 1
- 238000006213 oxygenation reaction Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052696 pnictogen Inorganic materials 0.000 description 1
- 229910052699 polonium Inorganic materials 0.000 description 1
- HZEBHPIOVYHPMT-UHFFFAOYSA-N polonium atom Chemical compound [Po] HZEBHPIOVYHPMT-UHFFFAOYSA-N 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 238000011002 quantification Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 239000011819 refractory material Substances 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000000682 scanning probe acoustic microscopy Methods 0.000 description 1
- 238000004570 scanning spreading resistance microscopy Methods 0.000 description 1
- JLLMPOYODONDTH-UHFFFAOYSA-N selanylidenezirconium Chemical compound [Se].[Zr] JLLMPOYODONDTH-UHFFFAOYSA-N 0.000 description 1
- 238000004098 selected area electron diffraction Methods 0.000 description 1
- 229910052711 selenium Inorganic materials 0.000 description 1
- 239000011669 selenium Substances 0.000 description 1
- 229910021428 silicene Inorganic materials 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000005477 sputtering target Methods 0.000 description 1
- 229910002076 stabilized zirconia Inorganic materials 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 150000003624 transition metals Chemical class 0.000 description 1
- ITRNXVSDJBHYNJ-UHFFFAOYSA-N tungsten disulfide Chemical compound S=[W]=S ITRNXVSDJBHYNJ-UHFFFAOYSA-N 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- 229910001233 yttria-stabilized zirconia Inorganic materials 0.000 description 1
- DUNKXUFBGCUVQW-UHFFFAOYSA-J zirconium tetrachloride Chemical group Cl[Zr](Cl)(Cl)Cl DUNKXUFBGCUVQW-UHFFFAOYSA-J 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/10—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the top-view layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1207—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
Definitions
- One aspect of the present invention relates to a metal oxide, a capacitive element using the metal oxide, and a method for manufacturing the same.
- one aspect of the invention relates to transistors, semiconductor devices, and electronic devices.
- one aspect of the present invention relates to a method for manufacturing a semiconductor device.
- one aspect of the present invention relates to a semiconductor wafer and a module.
- the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics.
- a semiconductor circuit, an arithmetic unit, and a storage device, including a semiconductor element such as a transistor, are one aspect of a semiconductor device. It may be said that a display device (liquid crystal display device, light emission display device, etc.), projection device, lighting device, electro-optic device, power storage device, storage device, semiconductor circuit, image pickup device, electronic device, and the like have a semiconductor device.
- One aspect of the present invention is not limited to the above technical fields.
- One aspect of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method. Also, one aspect of the invention relates to a process, machine, manufacture, or composition (composition of matter).
- a CPU is an aggregate of semiconductor elements formed by processing a semiconductor wafer, having a chipped semiconductor integrated circuit (at least a transistor and a memory), and forming an electrode as a connection terminal.
- IC chips Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on circuit boards, for example, printed wiring boards, and are used as one of various electronic device components.
- transistors are widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also referred to simply as display devices).
- ICs integrated circuits
- image display devices also referred to simply as display devices.
- Silicon-based semiconductor materials, oxide semiconductors, and the like are known as semiconductor thin films applicable to transistors.
- Non-Patent Document 1 research and development of a memory array using a ferroelectric substance (ferroelectric) are being actively carried out.
- ferroelectric HfO 2 -based materials Patent Document 2
- ferroelectricity of hafnium oxide thin films Non-Patent Document 3
- HfO high-density dielectric
- Non-Patent Documents 1 to 4 various researches and developments have been carried out on ferroelectrics.
- Non-Patent Document 1 As shown in FIG. 5A, it is reported that the sign of polarization (P) changes depending on the movement of oxygen atoms at the time of "Orthorhombic phase Ferroelectric".
- Non-Patent Document 2 As shown in FIG. 5B, it is reported that the magnitude of polarization and the dielectric constant ( ⁇ r ) change depending on the composition of Hf and Zr.
- Non-Patent Document 3 as shown in FIG. 6, it is reported that the rewrite resistance, which is one of the reliability tests of the ferroelectric substance, is about 109 times. Further, Non-Patent Document 4 reports on the diffraction intensity, polarization, and crystal structure of HfO 2 as shown in FIGS. 7A, 7B, and 7C.
- one aspect of the present invention is to provide a material having good ferroelectricity.
- one aspect of the present invention is to provide a capacitive element containing a material that may have ferroelectricity.
- one aspect of the present invention is to provide the capacitive element with good productivity.
- one aspect of the present invention is to provide a semiconductor device having the above-mentioned capacitive element and transistor.
- one aspect of the present invention is to provide the above-mentioned semiconductor device capable of miniaturization or high integration.
- One aspect of the present invention comprises a first layer and a second layer, the first layer comprising a first oxygen and hafnium, and the second layer having a second layer.
- Hafnium and zirconium are bonded to each other via the first oxygen, and the second oxygen is bonded to zirconium, which is a metal oxide film.
- Another aspect of the present invention comprises a plurality of first layers and a plurality of second layers, the first layer comprising a first oxygen and hafnium, and a second.
- the layer comprises a second oxygen and zirconium, hafnium contained in one of the plurality of first layers, and zirconium contained in one of the plurality of second layers of the plurality of first layers.
- Zirconium contained in one of the plurality of second layers and hafnium contained in the other one of the plurality of first layers, which are bonded to each other via the first oxygen contained in one of the layers, are a plurality of first layers. It is a metal oxide film that is bonded to each other via a second oxygen contained in one of the two layers.
- another aspect of the present invention includes a capacitive element and a transistor electrically connected to the capacitive element, and the capacitive element includes a first conductor, a second conductor, and a metal.
- the metal oxide film has an oxide film, and the metal oxide film is provided between the first conductor and the second conductor, and the metal oxide film has a first layer and a second layer.
- the first layer has the first oxygen and hafnium
- the second layer has the second oxygen and zirconium
- the hafnium and zirconium are the first.
- a semiconductor device that bonds to each other via the oxygen of 1 and the second oxygen to zirconium.
- the transistor has silicon in the channel forming region.
- the transistor has an oxide semiconductor in the channel forming region.
- the concentration of at least one or more of hydrogen and carbon contained in the metal oxide film is preferably 5 ⁇ 10 20 atoms / cm 3 or less in the SIMS analysis.
- the concentration of at least one or more of hydrogen and carbon contained in the metal oxide film is preferably 1 ⁇ 10 20 atoms / cm 3 or less in the SIMS analysis.
- the metal oxide film may have chlorine.
- another aspect of the present invention is a first step of introducing a first oxidizing gas, a second step of introducing a first precursor, and a third step of introducing a second oxidizing gas.
- the first precursor is HfCl4, the second precursor is ZrCl4 , and the first to fourth steps are included.
- This is a method for producing a metal oxide film, in which the above steps are repeated a plurality of times.
- the first oxidizing gas and the second oxidizing gas are one or both of H2O and O3, respectively.
- the purge gas is preferably N 2 .
- any one or more of the first step to the fourth step is performed by the ALD device.
- the present invention it is possible to provide a material having good ferroelectricity.
- a capacitive element containing a material that may have ferroelectricity Alternatively, according to one aspect of the present invention, the capacitive element can be provided with good productivity.
- a semiconductor device having the above-mentioned capacitive element and transistor it is possible to provide a semiconductor device having the above-mentioned capacitive element and transistor.
- the semiconductor device capable of miniaturization or high integration can be provided.
- FIG. 1A to 1C are cross-sectional views showing a method of manufacturing a capacitive element according to one aspect of the present invention.
- FIG. 2 is a model diagram illustrating the crystal structure of hafnium oxide according to one aspect of the present invention.
- FIG. 3 is a diagram showing a film formation sequence of a metal oxide film according to one aspect of the present invention.
- FIG. 4A is a cross-sectional view of a metal oxide film manufacturing apparatus according to an aspect of the present invention.
- FIG. 4B is a model diagram of the crystal structure of HfZrO x .
- FIG. 5A is a diagram illustrating the polarization of the ferroelectric substance disclosed in Non-Patent Document 1, and FIG.
- FIG. 5B is a diagram of the polarization due to the composition of Hf and Zr disclosed in Non-Patent Document 2. It is a figure explaining the change of the size and the dielectric constant.
- FIG. 6 is a diagram illustrating the rewrite resistance of the ferroelectric substance disclosed in Non-Patent Document 3.
- 7A to 7C are diagrams illustrating the diffraction intensity, polarization, and crystal structure of HfO 2 disclosed in Non-Patent Document 4.
- FIG. 8A is a top view of a semiconductor device according to an aspect of the present invention.
- 8B to 8D are sectional views of a semiconductor device according to an aspect of the present invention.
- 9A and 9B are sectional views of a semiconductor device according to an aspect of the present invention.
- FIG. 10A is a diagram illustrating the classification of the crystal structure of IGZO.
- FIG. 10B is a diagram illustrating an XRD spectrum of a CAAC-IGZO film.
- FIG. 10C is a diagram illustrating a microelectron diffraction pattern of a CAAC-IGZO film.
- FIG. 11A is a top view of a semiconductor device according to an aspect of the present invention.
- FIG. 11B is a cross-sectional view of a semiconductor device according to an aspect of the present invention.
- FIG. 12A is a top view of a semiconductor device according to an aspect of the present invention.
- FIG. 12B is a cross-sectional view of a semiconductor device according to an aspect of the present invention.
- FIG. 13A is a top view of a semiconductor device according to an aspect of the present invention.
- FIG. 13B is a cross-sectional view of a semiconductor device according to an aspect of the present invention.
- FIG. 14A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 14B to 14D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 15A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 15B to 15D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 16A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- FIG. 16B to 16D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 17A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 17B to 17D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 18A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 18B to 18D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 19A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- FIG. 19B to 19D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 20A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 20B to 20D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 21A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 21B to 21D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 22A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- FIG. 22B to 22D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 23A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 23B to 23D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 24A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 24B to 24D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 25A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- FIG. 25B to 25D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 26A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 26B to 26D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 27A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 27B to 27D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 28A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- FIG. 28B to 28D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 29A is a top view showing a method for manufacturing a semiconductor device according to an aspect of the present invention.
- 29B to 29D are cross-sectional views showing a method of manufacturing a semiconductor device according to one aspect of the present invention.
- FIG. 30 is a top view illustrating a microwave processing apparatus according to an aspect of the present invention.
- FIG. 31 is a cross-sectional view illustrating a microwave processing apparatus according to an aspect of the present invention.
- FIG. 32 is a cross-sectional view illustrating the microwave processing apparatus according to one aspect of the present invention.
- FIG. 33 is a cross-sectional view illustrating the microwave processing apparatus according to one aspect of the present invention.
- FIG. 34A is a plan view of the semiconductor device according to one aspect of the present invention.
- 34B and 34C are cross-sectional views of a semiconductor device according to an aspect of the present invention.
- FIG. 35 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 36 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 37 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- FIG. 38 is a cross-sectional view showing the configuration of the storage device according to one aspect of the present invention.
- 39A and 39B are cross-sectional views showing the configuration of a storage device according to an aspect of the present invention.
- FIG. 40A to 40C are cross-sectional views of a semiconductor device according to an aspect of the present invention.
- FIG. 41A is a block diagram showing a configuration example of a storage device according to an aspect of the present invention.
- FIG. 41B is a perspective view showing a configuration example of a storage device according to an aspect of the present invention.
- FIG. 42A is a circuit diagram showing a configuration example of a memory cell.
- FIG. 42B is a graph showing an example of the hysteresis characteristics of the ferroelectric layer.
- FIG. 42C is a timing chart showing an example of a memory cell driving method.
- 43A to 43E are schematic views of a storage device according to an aspect of the present invention.
- 44A to 44H are views showing an electronic device according to an aspect of the present invention.
- FIG. 45A is an optical micrograph showing the appearance of the sample.
- FIG. 45B is a schematic cross-sectional view of the sample.
- FIG. 45C is a diagram showing an input voltage waveform.
- 46A to 46F are diagrams illustrating a method of acquiring PE characteristics using a triangular wave.
- FIG. 47A is a diagram showing the measurement results of the PE characteristics.
- FIG. 47B is a diagram showing a GIXD measurement result.
- FIG. 48 is a diagram showing the results of SIMS analysis.
- FIG. 49 is a diagram showing the results of SIMS analysis.
- FIG. 50 is a diagram showing the results of SIMS analysis.
- FIG. 51 is a diagram showing the results of SIMS analysis.
- 52A and 52B are diagrams showing the measurement results of fatigue characteristics.
- FIG. 53A is a diagram showing PE characteristics.
- FIG. 53B is a diagram showing the measurement results of fatigue characteristics.
- FIG. 54 is a diagram showing PE characteristics for each voltage amplitude of the triangular wave.
- FIG. 55A is a schematic top view of the sample.
- FIG. 55B is a schematic cross-sectional view of the sample.
- FIG. 56 is a diagram illustrating the results of electron holography analysis.
- the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.
- the drawings schematically show ideal examples, and are not limited to the shapes or values shown in the drawings. For example, in an actual manufacturing process, layers, resist masks, and the like may be unintentionally reduced due to processing such as etching, but they may not be reflected in the figure for ease of understanding.
- the same reference numerals may be used in common between different drawings for the same parts or parts having similar functions, and the repeated description thereof may be omitted.
- the hatch pattern may be the same and no particular reference numeral may be added.
- a top view also referred to as a "plan view”
- a perspective view etc.
- the description of some components may be omitted.
- some hidden lines may be omitted.
- the ordinal numbers attached as the first, second, etc. are used for convenience, and do not indicate the process order or the stacking order. Therefore, for example, the "first” can be appropriately replaced with the “second” or “third” for explanation.
- the ordinal numbers described in the present specification and the like may not match the ordinal numbers used to specify one aspect of the present invention.
- X and Y are connected, the case where X and Y are electrically connected and the case where X and Y function. It is assumed that the case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification and the like. Therefore, it is not limited to the predetermined connection relationship, for example, the connection relationship shown in the figure or text, and the connection relationship other than the connection relationship shown in the figure or text is also disclosed in the figure or text.
- X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).
- a transistor is an element having at least three terminals including a gate, a drain, and a source. Further, it has a region (hereinafter, also referred to as a channel forming region) in which a channel is formed between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode). A current can flow between the source and the drain through the channel formation region.
- the channel forming region means a region in which a current mainly flows.
- the function of the source or drain may be switched when a transistor with a different polarity is adopted, or when the direction of the current changes in the circuit operation. Therefore, in the present specification and the like, the terms source and drain may be used interchangeably.
- the channel length is, for example, a source in a region where a semiconductor (or a portion where a current flows in a semiconductor when the transistor is on) and a gate electrode overlap each other in a top view of a transistor, or a channel formation region.
- the channel length does not always take the same value in all regions. That is, the channel length of one transistor may not be fixed to one value. Therefore, in the present specification, the channel length is any one value, the maximum value, the minimum value, or the average value in the channel formation region.
- the channel width is, for example, the channel length direction in the region where the semiconductor (or the portion where the current flows in the semiconductor when the transistor is on) and the gate electrode overlap each other in the top view of the transistor, or in the channel formation region. Refers to the length of the channel formation region in the vertical direction with respect to. In one transistor, the channel width does not always take the same value in all regions. That is, the channel width of one transistor may not be fixed to one value. Therefore, in the present specification, the channel width is any one value, the maximum value, the minimum value, or the average value in the channel formation region.
- the channel width in the region where the channel is actually formed (hereinafter, also referred to as “effective channel width”) and the channel width shown in the top view of the transistor. (Hereinafter, also referred to as “apparent channel width”) and may be different.
- the effective channel width may be larger than the apparent channel width, and the influence thereof may not be negligible.
- the ratio of the channel forming region formed on the side surface of the semiconductor may be large. In that case, the effective channel width is larger than the apparent channel width.
- channel width may refer to an apparent channel width.
- channel width may refer to an effective channel width.
- the values of the channel length, channel width, effective channel width, apparent channel width, and the like can be determined by analyzing a cross-sectional TEM image or the like.
- the semiconductor impurities are, for example, other than the main components constituting the semiconductor.
- an element having a concentration of less than 0.1 atomic% can be said to be an impurity.
- the inclusion of impurities may result in, for example, an increase in the defect level density of the semiconductor, a decrease in crystallinity, and the like.
- the impurities that change the characteristics of the semiconductor include, for example, Group 1 element, Group 2 element, Group 13 element, Group 14 element, Group 15 element, and oxide semiconductor.
- transition metals other than the main component such as hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Water may also function as an impurity.
- oxygen deficiency VO: oxygen vacancy
- silicon oxide nitriding has a higher oxygen content than nitrogen as its composition. Further, silicon nitride oxide has a higher nitrogen content than oxygen in its composition.
- the term “insulator” can be paraphrased as an insulating film or an insulating layer.
- the term “conductor” can be paraphrased as a conductive film or a conductive layer.
- the term “semiconductor” can be paraphrased as a semiconductor film or a semiconductor layer.
- parallel means a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, the case of -5 degrees or more and 5 degrees or less is also included.
- approximately parallel means a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less.
- vertical means a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, the case of 85 degrees or more and 95 degrees or less is also included.
- approximately vertical means a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.
- a metal oxide is a metal oxide in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS) and the like. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when it is described as an OS transistor, it can be rephrased as a transistor having a metal oxide or an oxide semiconductor.
- normally off means that when a potential is not applied to the gate or a ground potential is applied to the gate, the drain current per 1 ⁇ m of the channel width flowing through the transistor is 1 ⁇ 10 ⁇ at room temperature. It means that it is 20 A or less, 1 ⁇ 10 -18 A or less at 85 ° C, or 1 ⁇ 10 -16 A or less at 125 ° C.
- the conductor 110 is formed on a substrate (not shown).
- the film formation of the conductor 110 is performed by a sputtering method, a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, and an atomic layer deposition (PLD) method. It can be carried out by using a deposition (ALD: Atomic Layer Deposition) method or the like.
- ALD Atomic Layer Deposition
- the conductor 110 may be appropriately patterned by using a lithography method or the like.
- an insulator 130 is formed on the conductor 110.
- the film formation of the insulator 130 can be performed by using a sputtering method, a CVD method, an ALD method, or the like.
- the insulator 130 can be formed on the conductor 110 with good coverage. As a result, it is possible to suppress the generation of a leak current between the upper electrode and the lower electrode of the capacitive element 100.
- a material capable of having ferroelectricity for the insulator 130.
- Materials that can have strong dielectric properties include hafnium oxide, zirconium oxide, HfZrO x (x is a real number larger than 0), hafnium oxide and element J1 (here, element J1 is zirconium (Zr), silicon.
- element J2 is hafnium) (Hf), silicon (Si), aluminum (Al), gadrinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.) are added to the material.
- element J2 here is hafnium) (Hf), silicon (Si), aluminum (Al), gadrinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.
- PbTIO x barium titanate strontium (BST), barium titanate, lead zirconate titanate (PZT), strontium bismuthate tantanate (SBT), bismuth ferrite (BFO).
- the insulator 130 may have a laminated structure composed of a plurality of materials selected from the materials listed above.
- hafnium oxide, or a material having hafnium oxide and zirconium oxide as a material capable of having ferroelectricity is preferable because it can have ferroelectricity even when processed into a thin film of several nm.
- the film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, still more preferably 10 nm or less (typically 2 nm or more and 9 nm or less).
- FIG. 2 is a model diagram illustrating the crystal structure of hafnium oxide (HfO 2 in this embodiment).
- Hafnium oxide is known to have various crystal structures.
- the cubic system (cubic, space group: Fm-3m) and the tetragonal system (tetragonal, space group: P4 2 / nmc) shown in FIG. 2 are known to have various crystal structures.
- monoclinic, space group: P2 1 / c As shown in FIG.
- each of the above-mentioned crystal structures may undergo a phase change.
- the crystal structure of monoclinic hafnium oxide can be changed to an orthorhombic crystal structure.
- the composite material When the above-mentioned composite material is formed by alternately forming hafnium oxide and zirconium oxide in a 1: 1 composition using the ALD method, the composite material has an orthorhombic crystal structure. Alternatively, the composite material has an amorphous structure. Then, by applying heat treatment or the like to the composite material, the amorphous structure can be made into an orthorhombic crystal structure. The crystal structure of the orthorhombic system may change to the crystal structure of the monoclinic system. When imparting strong dielectric property to the above-mentioned composite material, an orthorhombic crystal structure is preferable to a monoclinic crystal structure.
- the crystal structure of the insulator 130 is not particularly limited.
- the crystal structure of the insulator 130 may be one or more selected from a cubic system, a tetragonal system, an orthorhombic system, and a monoclinic system. In particular, it is preferable that the insulator 130 has an orthorhombic crystal structure because it exhibits ferroelectricity.
- the crystal structure of the insulator 130 may be an amorphous structure.
- the insulator 130 may have a composite structure having an amorphous structure and a crystal structure.
- the insulator 130 When a material having hafnium oxide and zirconium oxide (HfZrO x ) is used as the insulator 130, it is preferable to form a film by using the thermal ALD method.
- HfZrO x hafnium oxide and zirconium oxide
- the insulator 130 when the insulator 130 is formed into a film by using the thermal ALD method, it is preferable to use a material containing no hydrocarbon (hydrocarbon, also referred to as HC) as a precursor. If the insulator 130 contains one or both of hydrogen and carbon, it may inhibit the crystallization of the insulator 130. Therefore, as described above, it is preferable to reduce the concentration of either one or both of hydrogen and carbon in the insulator 130 by using a precursor containing no hydrocarbon. For example, as a precursor containing no hydrocarbon, a chlorine-based material can be mentioned. When a material having hafnium oxide and zirconium oxide (HfZrO x ) is used as the insulator 130, HfCl 4 and / or ZrCl 4 may be used as the precursor.
- HfZrO x hafnium oxide and zirconium oxide
- the oxidizing agent of the thermal ALD method it is preferable to use O3 rather than H2O because the hydrogen concentration in the membrane can be reduced.
- the oxidizing agent of the thermal ALD method is not limited to this.
- the oxidizing agent in the thermal ALD method may contain one or more selected from O 2 , O 3 , N 2 O, NO 2 , H 2 O, and H 2 O 2 .
- the conductor 120 is formed on the insulator 130.
- the conductor 120 is arranged apart from the conductor 110 via the insulator 130.
- the conductor 120 may have a laminated structure of a conductor 120a provided in contact with the insulator 130 and a conductor 120b provided in contact with the conductor 120a.
- the conductor 120a may be formed into a film by using an ALD method, a CVD method, or the like.
- titanium nitride may be formed by using the thermal ALD method.
- the film formation of the conductor 120a is preferably a method of forming a film while heating the substrate, such as the thermal ALD method.
- the film may be formed by setting the substrate temperature to room temperature or higher, preferably 300 ° C. or higher, more preferably 325 ° C. or higher, and further preferably 350 ° C. or higher.
- the film may be formed by setting the substrate temperature to 500 ° C. or lower, preferably 450 ° C. or lower.
- the substrate temperature may be set to about 400 ° C.
- insulation is performed without performing high-temperature baking treatment (for example, heat treatment temperature of 400 ° C. or higher or 500 ° C. or higher) after the formation of the conductor 120a.
- Ferroelectricity can be imparted to the body 130.
- the conductor 120a by using the ALD method, which causes relatively little damage to the substrate as described above, it is possible to prevent the crystal structure of the insulator 130 from being excessively destroyed.
- the ferroelectricity of the insulator 130 can be increased.
- the conductor 120a when the conductor 120a is formed by a sputtering method or the like, damage may enter the base film, here, the insulator 130.
- a material having hafnium oxide and zirconium oxide (HfZrO x ) is used as the insulator 130 and the conductor 120a is formed by a sputtering method, the underlying film HfZrO x is damaged by the sputtering method, and crystals of HfZrO x are formed.
- the structure typically a crystal structure such as an orthorhombic system
- the dangling bond (for example, O * ) in HfZrO x and the hydrogen contained in HfZrO x may be bonded to each other, and the damage in the crystal structure of HfZrO x may not be recovered.
- the dangling bond in HfZrO x is formed, for example, by the damage obtained by forming the conductor 120a into a film by a sputtering method.
- the insulator 130 here HfZrO x , it is preferable to use a material that does not contain hydrogen or has an extremely low hydrogen content.
- the concentration of hydrogen contained in the insulator 130 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, and more preferably 1 ⁇ 10 20 atoms / cm 3 or less.
- the insulator 130 may become a film that does not contain hydrocarbons as a main component or has an extremely low content of hydrocarbons.
- the concentration of carbon constituting the hydrocarbon contained in the insulator 130 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, and more preferably 1 ⁇ 10 20 atoms / cm 3 or less.
- the insulator 130 may be a film containing no carbon as a main component or having an extremely low carbon content.
- the concentration of carbon contained in the insulator 130 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, more preferably 1 ⁇ 10 20 atoms / cm 3 or less.
- the insulator 130 it is preferable to use a material having an extremely low content of at least one of hydrogen, hydrocarbon, and carbon, but in particular, the content of hydrocarbon and carbon should be extremely reduced. is important. Hydrocarbons and carbon are heavier molecules or atoms than hydrogen and are difficult to remove in later steps. Therefore, it is preferable to thoroughly eliminate hydrocarbons and carbon when forming the insulator 130.
- the insulator 130 is insulated by using a material that does not contain at least one or more of hydrogen, hydrocarbon, and carbon, or has an extremely low content of at least one or more of hydrogen, hydrocarbon, and carbon. It is possible to improve the crystallinity of the body 130, and it is possible to form a structure having high strong dielectric properties.
- a film having high purity and intrinsic ferroelectricity by thoroughly removing at least one of impurities, here hydrogen, hydrocarbon, and carbon in the film of the insulator 130, here. It is possible to form a high-purity intrinsic capacitive element. It should be noted that the capacitive element having high-purity intrinsic ferroelectricity and the high-purity intrinsic oxide semiconductor shown in the embodiment described later have very high consistency in the manufacturing process. Therefore, it is possible to provide a method for manufacturing a semiconductor device having high productivity.
- a hydrocarbon-free precursor typically a chlorine-based precursor
- an oxidizing agent typically, using the thermal ALD method
- an oxidizing agent typically
- the conductor 120b may be formed into a film by using a sputtering method, an ALD method, a CVD method, or the like.
- tungsten may be formed by using a metal CVD method.
- the capacitive element 100 having the insulator 130 between the conductor 110 and the conductor 120 shown in FIG. 1C can be manufactured.
- the capacitive element 100 according to the present embodiment can enhance the ferroelectricity of the insulator 130 without performing a high-temperature baking treatment after the conductor 120a is formed. As a result, the process of manufacturing the ferroelectric capacitor can be reduced, so that the productivity of the ferroelectric capacitor and the semiconductor device including the ferroelectric capacitor can be improved.
- the ALD method utilizes the self-regulating properties of atoms and allows atoms to be deposited layer by layer, so ultra-thin film formation is possible, film formation into structures with a high aspect ratio is possible, pinholes, etc. It has the effects of being able to form a film with few defects, being able to form a film with excellent coverage, and being able to form a film at a low temperature.
- a first raw material gas (also called a precursor) and a second raw material gas (also called an oxidizing gas) for the reaction are alternately introduced into the reaction chamber, and the introduction of these raw material gases is repeated.
- a second raw material gas also called an oxidizing gas
- perform film formation when introducing the precursor or the oxidizing gas, N2 , Ar or the like may be introduced into the reaction chamber together with the precursor or the oxidizing gas as a carrier purge gas.
- the carrier purge gas it is possible to suppress the adsorption of the precursor or oxidizing gas inside the pipe and the inside of the valve, and to introduce the precursor or oxidizing gas into the reaction chamber (also called carrier gas). ).
- the precursor or oxidizing gas remaining in the reaction chamber can be quickly exhausted (also called purge gas). Since it has two roles of introduction (carrier) and exhaust (purge) in this way, it is sometimes called a carrier purge gas. Further, it is preferable to use the carrier purge gas because the uniformity of the formed film is improved
- FIG. 3 shows a film formation sequence of a film of a material capable of having ferroelectricity (hereinafter referred to as a ferroelectric layer) using the ALD method.
- a ferroelectric layer a material capable of having ferroelectricity (hereinafter referred to as a ferroelectric layer) using the ALD method.
- a ferroelectric layer having hafnium oxide and zirconium oxide is formed as the insulator 130 will be shown.
- a precursor containing hafnium and further containing one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen can be used.
- a precursor containing zirconium and further containing one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen can be used.
- HfCl 4 is used as the precursor 401 containing hafnium
- ZrCl 4 is used as the precursor 402 containing zirconium.
- the precursor 401 and the precursor 402 are formed by heating and gasifying a liquid raw material or a solid raw material.
- the precursor 401 is formed from a solid raw material of HfCl 4
- the precursor 402 is formed from a solid raw material of ZrCl 4 .
- the precursor 401 and the precursor 402 have reduced impurities, and it is preferable that these solid raw materials also have reduced impurities.
- the impurities include Ba, Cd, Co, Cr, Cu, Fe, Ga, Li, Mg, Mn, Na, Ni, Sr, V, Zn and the like.
- the above impurities are preferably less than 1000 wppb.
- wppb is a unit in which the concentration of impurities converted by mass is expressed in parts per billion.
- any one or a plurality selected from O 2 , O 3 , N 2 O, NO 2, H 2 O, and H 2 O 2 can be used.
- a gas containing H2O is used as the oxidizing gas 403.
- the carrier purge gas 404 any one or a plurality selected from N2 , He, Ar, Kr, and Xe can be used.
- N 2 is used as the carrier purge gas 404.
- the oxidizing gas 403 is introduced into the reaction chamber (step S01).
- the introduction of the oxidizing gas 403 is stopped, only the carrier purge gas 404 is used, and the oxidizing gas 403 remaining in the reaction chamber is purged (step S02).
- a precursor 401 and a carrier purge gas 404 are introduced into the reaction chamber to keep the pressure in the reaction chamber constant (step S03). In this way, the precursor 401 is adsorbed on the surface to be formed.
- the introduction of the precursor 401 is stopped, only the carrier purge gas 404 is used, and the precursor 401 remaining in the reaction chamber is purged (step S04).
- the oxidizing gas 403 is introduced into the reaction chamber.
- the precursor 401 is oxidized to form hafnium oxide (step S05).
- the introduction of the oxidizing gas 403 is stopped, only the carrier purge gas 404 is used, and the oxidizing gas 403 remaining in the reaction chamber is purged (step S06).
- a precursor 402 and a carrier purge gas 404 are introduced into the reaction chamber to keep the pressure in the reaction chamber constant (step S07). In this way, the precursor 402 is adsorbed on the oxygen layer of hafnium oxide.
- the introduction of the precursor 402 is stopped, only the carrier purge gas 404 is used, and the precursor 402 remaining in the reaction chamber is purged (step S08).
- the oxidizing gas 403 is introduced into the reaction chamber. By introducing the oxidizing gas 403, the precursor 402 is oxidized and zirconium oxide is formed on hafnium oxide.
- steps S01 to S08 are set as one cycle, and the cycle is repeated until a desired film thickness is reached. It should be noted that steps S01 to S08 may be performed in a temperature range of 250 ° C. or higher and 450 ° C. or lower, and preferably in a temperature range of 350 ° C. or higher and 400 ° C. or lower.
- the insulator 130 by forming a film using the ALD method, it is possible to form a layered crystal structure in which a hafnium layer, an oxygen layer, a zirconium layer, and an oxygen layer are repeated. Further, as described above, by forming a film using a precursor having reduced impurities, it is possible to prevent impurities from being mixed in during the film formation and hindering the formation of the layered crystal structure. As described above, by forming the insulator 130 into a layered crystal structure having high crystallinity, the insulator 130 can be given high ferroelectricity.
- the insulator 130 does not necessarily exhibit ferroelectricity immediately after film formation. As described above, the insulator 130 may exhibit ferroelectricity not immediately after film formation but after forming the conductor 120 on the insulator 130.
- FIG. 4A is a schematic view of a manufacturing apparatus 900 used for film formation by the ALD method.
- the manufacturing apparatus 900 has a reaction chamber 901, a gas introduction port 903, a reaction chamber inlet 904, an exhaust port 905, a wafer stage 907, and a shaft 908.
- the wafer 950 is arranged on the wafer stage 907.
- a heater system for heating the precursor 401, the precursor 402, the oxidizing gas 403, and the carrier purge gas 404 may be arranged inside the reaction chamber 901. Further, the wafer stage 907 may be provided with a heater system for heating the wafer 950. Further, the wafer stage 907 may be provided with a rotation mechanism that rotates horizontally with the shaft 908 as a rotation axis. Further, although not shown, in front of the gas introduction port 903, a precursor 401, a precursor 402, an oxidizing gas 403, and a carrier purge gas 404 are placed at an appropriate timing and at an appropriate flow rate to the gas inlet 903 for an appropriate time. The gas supply system to be introduced is installed. Further, although not shown, an exhaust system having a vacuum pump is installed at the end of the exhaust port 905.
- the manufacturing device 900 shown in FIG. 4A is an ALD device called a cross-flow method.
- the flow of the precursor 401, the precursor 402, the oxidizing gas 403, and the carrier purge gas 404 in the cross-flow method will be described below.
- the precursor 401, the precursor 402, the oxidizing gas 403, and the carrier purge gas 404 flow from the gas inlet 903 to the reaction chamber 901 via the reaction chamber inlet 904, reach the wafer 950, and are exhausted through the exhaust port 905. .
- the arrow shown in FIG. 4A schematically indicates the direction in which the gas flows.
- step S05 for introducing the oxidizing gas 403 into the reaction chamber 901 as shown in FIG. 3 the precursor 401 adsorbed on the wafer 950 is oxidized by the oxidizing gas 403 to form hafnium oxide. Due to the structure of the manufacturing apparatus 900 of the cross-flow method, the oxidizing gas 403 reaches the wafer 950 after being in contact with the heated reaction chamber member for a long time. Therefore, for example , when O3 is used as the oxidizing gas 403, the oxidizing gas 403 is decomposed by the reaction between the high temperature solid surface and the oxidizing gas 403 before reaching the state, and the oxidizing power is lowered.
- the film formation rate of hafnium oxide depends on the reach of the oxidizing gas 403 from the reaction chamber inlet 904 to the wafer 950.
- the peripheral portion of the wafer 950 reaches the oxidizing gas 403 first, so that the film thickness of hafnium oxide becomes thicker toward the peripheral portion of the wafer 950 and the central portion. Is thinner than the peripheral part.
- the heating temperature of the reaction chamber it is necessary to set the heating temperature of the reaction chamber to an appropriate temperature in order to suppress the decomposition of the oxidizing gas 403 and the decrease in the oxidizing power.
- the oxidation of the precursor 401 has been described as an example, but the same applies to the oxidation of the precursor 402.
- the uniformity in the substrate surface is preferably ⁇ 1.5% or less, more preferably ⁇ 1.0% or less.
- RANGE maximum film thickness in the substrate surface-the minimum film thickness in the substrate surface
- ⁇ PNU Percent Non Uniformity
- the oxidizing gas 403 forms a layer of oxygen having excellent uniformity, so that a more regular layered crystal structure can be formed.
- the insulator 130 by forming the insulator 130 into a highly regular, layered crystal structure, the insulator 130 can be given high ferroelectricity.
- an insulator 130 made of a material capable of having ferroelectricity can be formed.
- the capacitive element 100 can be made into a ferroelectric capacitor.
- FIG. 4B is a model diagram of the crystal structure of HfZrO x , here Hf 0.5 Zr 0.5 O 2 . Further, in FIG. 4B, the directions of the a-axis, the b-axis, and the c-axis are also shown.
- FIG. 4B is a structure in which Zr is arranged in a layer with respect to the orthorhombic structure ( PCA 2 1 ) of HfO 2 . For the cells having the orthorhombic structure of HfO 2 , the structure was optimized using the first-principles calculation.
- hafnium and zirconium are in a state of being bonded to each other via oxygen. This can be formed by alternately depositing hafnium and zirconium by the ALD method as in the film formation sequence shown in FIG.
- the metal oxide of one aspect of the present invention can produce a crystal structure as shown in FIG. 4B by using the film forming sequence shown in FIG. 3 and the manufacturing apparatus shown in FIG. 4A.
- the capacitive element containing a material capable of having ferroelectricity.
- the capacitive element can be provided with good productivity.
- FIGS. 8A to 25D an example of a semiconductor device having a transistor 200 and a capacitive element 100 according to an aspect of the present invention, and a method for manufacturing the same will be described with reference to FIGS. 8A to 25D.
- the capacitive element 100 used in the semiconductor device the description relating to the capacitive element 100 shown in the first embodiment can be taken into consideration.
- FIG. 8A to 8D are a top view and a cross-sectional view of a semiconductor device having a transistor 200 and a capacitive element 100.
- FIG. 8A is a top view of the semiconductor device.
- 8B to 8D are cross-sectional views of the semiconductor device.
- FIG. 8B is a cross-sectional view of the portion shown by the alternate long and short dash line of A1-A2 in FIG. 8A, and is also a cross-sectional view of the transistor 200 in the channel length direction.
- FIG. 8C is a cross-sectional view of the portion shown by the alternate long and short dash line of A3-A4 in FIG.
- FIG. 8A is also a cross-sectional view of the transistor 200 in the channel width direction.
- FIG. 8D is a cross-sectional view of the portion shown by the alternate long and short dash line of A5-A6 in FIG. 8A.
- FIG. 8A some elements are omitted for the purpose of clarifying the figure.
- the semiconductor device of one aspect of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the insulator 212, a transistor 200 on the insulator 214, and an insulator provided on the transistor 200.
- the insulator 212, the insulator 214, the insulator 216, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 274 function as an interlayer film.
- the insulator 283 is in contact with a part of the upper surface of the insulator 214, the side surface of the insulator 216, the side surface of the insulator 222, the side surface of the insulator 275, the side surface of the insulator 280, and the side surface and the upper surface of the insulator 282. ..
- the transistor 200 has a semiconductor layer, a first gate, a second gate, a source, and a drain.
- One of the source and the drain of the transistor 200 is above the semiconductor layer and is in contact with one of the electrodes of the capacitive element 100.
- Insulator 271 (insulator 271a and insulator 271b) is provided in contact with the source and drain of the transistor 200.
- the insulator 271a and the insulator 271b may be collectively referred to as an insulator 271.
- the capacitive element 100 is provided in an opening reaching one of the source and drain of the transistor 200 formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285.
- the capacitive element 100 is placed on the conductor 110, which is in contact with the upper surface of one of the source and drain of the transistor 200 at the opening, the insulator 130 arranged on the conductor 110 and the insulator 285, and the insulator 130.
- It has a conductor 120 (conductor 120a and conductor 120b) to be arranged.
- the conductor 110 is arranged along the side surface and the bottom surface of the opening.
- the insulator 245 is provided between the conductor 110 and the insulator 280.
- the insulator 245 preferably has a function of suppressing the diffusion of hydrogen (for example, at least one hydrogen atom, hydrogen molecule, etc.).
- the insulator 245 preferably has a function of suppressing the diffusion of oxygen (for example, at least one oxygen atom, oxygen molecule, etc.).
- the insulator 245 is preferably less permeable to one or both of oxygen and hydrogen than the insulator 280.
- the transistor 200 is an insulator 216 on the insulator 214 and a conductor 205 (conductor 205a, and a conductor 205a) arranged to be embedded in the insulator 214 and / or the insulator 216.
- Conductor 205b) insulator 222 on insulator 216, and insulator 205, insulator 224 on insulator 222, oxide 230a on insulator 224, and oxide 230b on oxide 230a.
- the insulator 252 includes an upper surface of the insulator 222, a side surface of the insulator 224, a side surface of the oxide 230a, a side surface and an upper surface of the oxide 230b, and a side surface of the conductor 242. It is in contact with the side surface of the insulator 271, the side surface of the insulator 275, the side surface of the insulator 280, and the lower surface of the insulator 250.
- the upper surface of the conductor 260 is arranged so as to substantially coincide in height with the uppermost portion of the insulator 254, the uppermost portion of the insulator 250, the uppermost portion of the insulator 252, and the upper surface of the insulator 280. Further, the insulator 282 is in contact with at least a part of the upper surface of each of the conductor 260, the insulator 252, the insulator 250, the insulator 254, and the insulator 280.
- the oxide 230a and the oxide 230b may be collectively referred to as the oxide 230.
- the conductor 242a and the conductor 242b may be collectively referred to as a conductor 242.
- the insulator 280 and the insulator 275 are provided with an opening reaching the oxide 230b.
- Insulator 252, insulator 250, insulator 254, and conductor 260 are arranged in the opening. Further, in the channel length direction of the transistor 200, the conductor 260, the insulator 252, the insulator 250, and the insulator 254 are placed between the insulator 271a and the conductor 242a and the insulator 271b and the conductor 242b. It is provided.
- the insulator 254 has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260.
- the oxide 230 preferably has an oxide 230a arranged on the insulator 224 and an oxide 230b arranged on the oxide 230a.
- the oxide 230a By having the oxide 230a under the oxide 230b, it is possible to suppress the diffusion of impurities from the structure formed below the oxide 230a to the oxide 230b.
- the transistor 200 shows a configuration in which the oxide 230 is laminated with two layers of the oxide 230a and the oxide 230b
- the present invention is not limited to this.
- a single layer of the oxide 230b or a laminated structure of three or more layers may be provided, or each of the oxide 230a and the oxide 230b may have a laminated structure.
- the conductor 260 functions as a first gate (also referred to as a top gate) electrode, and the conductor 205 functions as a second gate (also referred to as a back gate) electrode.
- the insulator 252, the insulator 250 and the insulator 254 function as the first gate insulator, and the insulator 222 and the insulator 224 function as the second gate insulator.
- the gate insulator may be referred to as a gate insulating layer or a gate insulating film.
- the conductor 242a functions as one of the source or the drain, and the conductor 242b functions as the other of the source or the drain. Further, at least a part of the region overlapping with the conductor 260 of the oxide 230 functions as a channel forming region.
- FIG. 9A an enlarged view of the vicinity of the channel formation region in FIG. 8B is shown in FIG. 9A.
- the oxide 230b is provided so as to sandwich the region 230bc that functions as a channel forming region of the transistor 200, and the region 230ba and the region 230bb that function as a source region or a drain region. , Have.
- At least a part of the region 230bc overlaps with the conductor 260.
- the region 230bc is provided in the region between the conductor 242a and the conductor 242b.
- the region 230ba is provided so as to be superimposed on the conductor 242a
- the region 230bb is provided so as to be superimposed on the conductor 242b.
- the region 230bc that functions as a channel forming region is a high resistance region having a low carrier concentration because it has less oxygen deficiency or a lower impurity concentration than the regions 230ba and 230bb. Therefore, it can be said that the region 230bc is i-type (intrinsic) or substantially i-type.
- the region 230ba and the region 230bb that function as the source region or the drain region are regions where the carrier concentration is increased and the resistance is lowered due to a large oxygen deficiency or a high concentration of impurities such as hydrogen, nitrogen and metal elements. be. That is, the region 230ba and the region 230bb are n-type regions having a high carrier concentration and low resistance as compared with the region 230bc.
- the carrier concentration of the region 230 bc that functions as the channel forming region is preferably 1 ⁇ 10 18 cm -3 or less, more preferably less than 1 ⁇ 10 17 cm -3 , and 1 ⁇ 10 16 cm. It is more preferably less than -3 , still more preferably less than 1 ⁇ 10 13 cm -3 , and even more preferably less than 1 ⁇ 10 12 cm -3 .
- the lower limit of the carrier concentration in the region 230 bc that functions as the channel forming region is not particularly limited, but may be, for example, 1 ⁇ 10 -9 cm -3 .
- the carrier concentration in the oxide can be determined by a phase shift method in electron holography analysis, a scanning capacitance microscopy (SCM), a scanning spread resistance microscopy (SSRM: Scanning Precision Microscopy), or the like. Can be measured using.
- a material having a relatively high carrier concentration may be referred to as a material having a high electrical conductivity or a material having a low resistivity.
- a material having a relatively low carrier concentration may be referred to as a material having a low electrical conductivity or a material having a high resistivity.
- the carrier concentration is equal to or lower than the carrier concentration of the region 230 ba and the region 230 bb, and equal to or higher than the carrier concentration of the region 230 bc.
- Regions may be formed. That is, the region functions as a junction region between the region 230 bc and the region 230 ba or the region 230 bb.
- the hydrogen concentration may be equal to or lower than the hydrogen concentration of the region 230ba and the region 230bb, and may be equal to or higher than the hydrogen concentration of the region 230bc.
- the junction region may have an oxygen deficiency equal to or less than that of the region 230ba and the region 230bb, and may be equal to or greater than the oxygen deficiency of the region 230bc.
- FIG. 9A shows an example in which the region 230ba, the region 230bb, and the region 230bc are formed on the oxide 230b, but the present invention is not limited thereto.
- each of the above regions may be formed not only with the oxide 230b but also with the oxide 230a.
- the concentrations of the metal elements detected in each region and the impurity elements such as hydrogen and nitrogen are not limited to the stepwise changes in each region, but may be continuously changed in each region. That is, the closer the region is to the channel formation region, the lower the concentration of the metal element and the impurity elements such as hydrogen and nitrogen is sufficient.
- a metal oxide hereinafter, also referred to as an oxide semiconductor that functions as a semiconductor for the oxide 230 (oxide 230a and oxide 230b) containing a channel forming region.
- the metal oxide that functions as a semiconductor it is preferable to use a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more. As described above, by using a metal oxide having a large bandgap, the off-current of the transistor can be reduced.
- an In-M-Zn oxide having indium, element M and zinc (element M is aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium).
- Zinc, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. (one or more) and the like may be used.
- an In-Ga oxide, an In-Zn oxide, or an indium oxide may be used as the oxide 230.
- the atomic number ratio of In to the element M in the metal oxide used for the oxide 230b is larger than the atomic number ratio of In to the element M in the metal oxide used for the oxide 230a.
- the oxide 230a under the oxide 230b By arranging the oxide 230a under the oxide 230b in this way, it is possible to suppress the diffusion of impurities and oxygen from the structure formed below the oxide 230a to the oxide 230b. ..
- the oxide 230a and the oxide 230b have a common element (main component) other than oxygen, the defect level density at the interface between the oxide 230a and the oxide 230b can be lowered. Since the defect level density at the interface between the oxide 230a and the oxide 230b can be lowered, the influence of the interfacial scattering on the carrier conduction is small, and a high on-current can be obtained.
- the oxide 230b preferably has crystallinity.
- CAAC-OS c-axis aligned crystalline semiconductor semiconductor
- CAAC-OS is a metal oxide having a highly crystalline and dense structure and having few impurities and defects (for example, oxygen deficiency (VO, etc.).
- the metal By heat-treating at a temperature at which the oxide does not polycrystallize (for example, 400 ° C. or higher and 600 ° C. or lower), CAAC-OS can be made into a more crystalline and dense structure.
- a temperature at which the oxide does not polycrystallize for example, 400 ° C. or higher and 600 ° C. or lower
- CAAC-OS By increasing the density of CAAC-OS, the diffusion of impurities or oxygen in the CAAC-OS can be further reduced.
- the metal oxide having CAAC-OS has stable physical properties. Therefore, the metal oxide having CAAC-OS is resistant to heat and has high reliability.
- a transistor using an oxide semiconductor if impurities and oxygen deficiencies are present in the region where a channel is formed in the oxide semiconductor, the electrical characteristics are liable to fluctuate and the reliability may be deteriorated. Further, hydrogen in the vicinity of the oxygen deficiency may form a defect in which hydrogen is contained in the oxygen deficiency (hereinafter, may be referred to as VOH) to generate an electron as a carrier. Therefore, if oxygen deficiency is contained in the region where the channel is formed in the oxide semiconductor, the transistor has normal-on characteristics (the channel exists even if no voltage is applied to the gate electrode, and the current is applied to the transistor. Flowing characteristics).
- the region in which the channel is formed in the oxide semiconductor is preferably i-type (intrinsic) or substantially i-type with a reduced carrier concentration.
- excess oxygen an insulator containing oxygen desorbed by heating
- the oxide semiconductor is removed from the insulator.
- the on-current of the transistor 200 may decrease or the field effect mobility may decrease.
- the oxygen supplied to the source region or the drain region varies in the surface of the substrate, so that the characteristics of the semiconductor device having the transistor vary.
- the region 230bac that functions as a channel forming region preferably has a reduced carrier concentration and is i-type or substantially i-type, but the region 230ba that functions as a source region or a drain region and The region 230bb has a high carrier concentration and is preferably n-type. That is, it is preferable to reduce oxygen deficiency and VOH in the region 230bc of the oxide semiconductor so that an excessive amount of oxygen is not supplied to the region 230ba and the region 230bb.
- microwave treatment is performed in an atmosphere containing oxygen to reduce oxygen deficiency and VOH in the region 230bc .
- the microwave processing refers to processing using, for example, a device having a power source for generating high-density plasma using microwaves.
- oxygen gas By performing microwave treatment in an atmosphere containing oxygen, oxygen gas can be turned into plasma by using a high frequency such as microwave or RF, and the oxygen plasma can be allowed to act. At this time, the region 230bc can be irradiated with a high frequency such as microwaves or RF.
- the VOH of the region 230bc can be divided, hydrogen ( H ) can be removed from the region 230bc , and oxygen deficiency (VO) can be supplemented with oxygen. That is, in the region 230bc , the reaction “VOH ⁇ H + VO” occurs, and the hydrogen concentration in the region 230bc can be reduced. Therefore, oxygen deficiency and VOH in the region 230bc can be reduced, and the carrier concentration can be lowered.
- the action of microwaves, high frequencies such as RF, oxygen plasma, etc. is shielded by the conductors 242a and 242b and does not reach the regions 230ba and 230bb. ..
- the action of the oxygen plasma can be reduced by the insulator 271 and the insulator 280 provided overlying the oxide 230b and the conductor 242.
- the reduction of VOH and the supply of an excessive amount of oxygen do not occur in the region 230ba and the region 230bb , so that the reduction of the carrier concentration can be prevented.
- microwave treatment in an atmosphere containing oxygen after the film formation of the insulating film to be the insulator 252 or the film formation of the insulating film to be the insulator 250.
- microwave treatment in an atmosphere containing oxygen through the insulator 252 or the insulator 250 in this way, oxygen can be efficiently injected into the region 230 bc.
- the insulator 252 so as to be in contact with the side surface of the conductor 242 and the surface of the region 230 bc, the injection of more oxygen than necessary into the region 230 bc is suppressed, and the oxidation of the side surface of the conductor 242 is suppressed. be able to.
- oxidation of the side surface of the conductor 242 can be suppressed when the insulating film to be the insulator 250 is formed.
- the oxygen injected into the region 230bc has various forms such as an oxygen atom, an oxygen molecule, and an oxygen radical (also called an O radical, an atom or molecule having an unpaired electron, or an ion).
- the oxygen injected into the region 230bc may be any one or more of the above-mentioned forms, and it is particularly preferable that it is an oxygen radical.
- the film quality of the insulator 252 and the insulator 250 can be improved, the reliability of the transistor 200 is improved.
- the oxide semiconductor has a structure in which an i-type region (region 230bc) is sandwiched between n-type regions (region 230ba and region 230bb). Such a structure may be referred to as an n-i-n junction. As a result, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and suppress variations in the electrical characteristics of the transistor 200 within the substrate surface.
- a curved surface may be provided between the side surface of the oxide 230b and the upper surface of the oxide 230b in a cross-sectional view of the transistor 200 in the channel width direction. That is, the end portion of the side surface and the end portion of the upper surface may be curved (hereinafter, also referred to as a round shape).
- the radius of curvature on the curved surface is preferably larger than 0 nm, smaller than the film thickness of the oxide 230b in the region overlapping the conductor 242, or smaller than half the length of the region having no curved surface.
- the radius of curvature on the curved surface is larger than 0 nm and 20 nm or less, preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less.
- the oxide 230 preferably has a laminated structure of a plurality of oxide layers having different chemical compositions.
- the atomic number ratio of the element M to the metal element as the main component is the ratio of the element M to the metal element as the main component in the metal oxide used for the oxide 230b. It is preferably larger than the atomic number ratio.
- the atomic number ratio of the element M to In is preferably larger than the atomic number ratio of the element M to In in the metal oxide used for the oxide 230b.
- the atomic number ratio of In to the element M is preferably larger than the atomic number ratio of In to the element M in the metal oxide used for the oxide 230a.
- the oxide 230b is preferably an oxide having crystallinity such as CAAC-OS.
- Crystalline oxides such as CAAC-OS have a dense structure with high crystallinity with few impurities and defects (oxygen deficiency, etc.). Therefore, it is possible to suppress the extraction of oxygen from the oxide 230b by the source electrode or the drain electrode. As a result, oxygen can be reduced from being extracted from the oxide 230b even if heat treatment is performed, so that the transistor 200 is stable against a high temperature (so-called thermal budget) in the manufacturing process.
- the lower end of the conduction band changes gently.
- the lower end of the conduction band at the junction between the oxide 230a and the oxide 230b is continuously changed or continuously bonded. In order to do so, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b.
- the oxide 230a and the oxide 230b have a common element other than oxygen as a main component, so that a mixed layer having a low defect level density can be formed.
- the oxide 230b is an In-M-Zn oxide
- the oxide 230a is an In-M-Zn oxide, an M-Zn oxide, an element M oxide, an In-Zn oxide, or an indium oxide. Etc. may be used.
- the composition in the vicinity includes a range of ⁇ 30% of the desired atomic number ratio. Further, it is preferable to use gallium as the element M.
- the above-mentioned atomic number ratio is not limited to the atomic number ratio of the formed metal oxide, but is the atomic number ratio of the sputtering target used for forming the metal oxide. May be.
- the interface between the oxide 230 and the insulator 252 and its vicinity thereof can be provided.
- Indium contained in the oxide 230 may be unevenly distributed.
- the vicinity of the surface of the oxide 230 has an atomic number ratio close to that of the indium oxide or an atomic number ratio close to that of the In—Zn oxide.
- the atomic number ratio of indium in the vicinity of the surface of the oxide 230, particularly the oxide 230b, is increased, so that the field effect mobility of the transistor 200 can be improved.
- the defect level density at the interface between the oxide 230a and the oxide 230b can be lowered. Therefore, the influence of interfacial scattering on carrier conduction is reduced, and the transistor 200 can obtain a large on-current and high frequency characteristics.
- At least one of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 has impurities such as water and hydrogen from the substrate side or the transistor 200. It is preferable to function as a barrier insulating film that suppresses diffusion from above to the transistor 200.
- At least one of insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, insulator 283, and insulator 285 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, It is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as nitrogen oxide molecules ( N2O, NO, NO2, etc.) and copper atoms (the above impurities are difficult to permeate). Alternatively, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom and an oxygen molecule) (the above-mentioned oxygen is difficult to permeate).
- the barrier insulating film refers to an insulating film having a barrier property.
- the barrier property is a function of suppressing the diffusion of the corresponding substance (also referred to as low permeability).
- the corresponding substance has a function of capturing and fixing (also referred to as gettering).
- the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 are insulators having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.
- impurities such as water and hydrogen, and oxygen.
- silicon nitride having a higher hydrogen barrier property it is preferable to use silicon nitride having a higher hydrogen barrier property.
- the insulator 214 it is preferable to use aluminum oxide or magnesium oxide having a high function of capturing hydrogen and fixing hydrogen. This makes it possible to prevent impurities such as water and hydrogen from diffusing from the substrate side to the transistor 200 side via the insulator 212 and the insulator 214. Alternatively, it is possible to prevent impurities such as water and hydrogen from diffusing to the transistor 200 side from the interlayer insulating film or the like arranged outside the insulator 285. Alternatively, it is possible to prevent oxygen contained in the insulator 224 or the like from diffusing toward the substrate side via the insulator 212 and the insulator 214.
- the transistor 200 has an insulator 212, an insulator 214, an insulator 271, an insulator 275, an insulator 282, an insulator 283, and an insulator 212 having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. It is preferable to have a structure surrounded by an insulator 285.
- an oxide having an amorphous structure as the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285.
- a metal oxide such as AlO x (x is an arbitrary number larger than 0) or MgO y (y is an arbitrary number larger than 0).
- an oxygen atom has a dangling bond, and the dangling bond may have a property of capturing or fixing hydrogen.
- a metal oxide having such an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, hydrogen contained in the transistor 200 or hydrogen existing around the transistor 200 is captured or fixed. be able to. In particular, it is preferable to capture or fix hydrogen contained in the channel forming region of the transistor 200.
- a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, it is possible to manufacture the transistor 200 having good characteristics and high reliability, and a semiconductor device.
- the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 preferably have an amorphous structure, but a region of a polycrystal structure is partially formed. It may be formed. Further, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 are multi-layered in which a layer having an amorphous structure and a layer having a polycrystal structure are laminated. It may be a structure. For example, a laminated structure in which a layer having a polycrystalline structure is formed on a layer having an amorphous structure may be used.
- the film formation of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 may be performed by using, for example, a sputtering method. Since the sputtering method does not require the use of molecules containing hydrogen in the film forming gas, the hydrogen concentrations of the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285. Can be reduced.
- the film forming method is not limited to the sputtering method, but is limited to a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, and a pulsed laser deposition (PLD) method.
- CVD chemical vapor deposition
- MBE molecular beam epitaxy
- PLD pulsed laser deposition
- Method, atomic layer deposition (ALD) method, or the like may be appropriately used.
- the insulator 283 may be able to mitigate the charge-up of the conductor 205, the conductor 242, the conductor 260, or the conductor 110.
- the resistivity of the insulator 212, the insulator 275, and the insulator 283 is preferably 1 ⁇ 10 10 ⁇ cm or more and 1 ⁇ 10 15 ⁇ cm or less.
- the insulator 216, the insulator 274, the insulator 280, and the insulator 285 have a lower dielectric constant than the insulator 214.
- a material having a low dielectric constant as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings.
- the conductor 205 is arranged so as to overlap the oxide 230 and the conductor 260.
- the conductor 205 is embedded in the opening formed in the insulator 216. Further, a part of the conductor 205 may be embedded in the insulator 214.
- the conductor 205 has a conductor 205a and a conductor 205b.
- the conductor 205a is provided in contact with the bottom surface and the side wall of the opening.
- the conductor 205b is provided so as to be embedded in the recess formed in the conductor 205a.
- the height of the upper surface of the conductor 205b is substantially the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216.
- the conductor 205a has a function of suppressing the diffusion of impurities such as hydrogen atom, hydrogen molecule, water molecule, nitrogen atom, nitrogen molecule, nitrogen oxide molecule ( N2O, NO, NO2 , etc.) and copper atom. It is preferable to use a conductive material having. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom and an oxygen molecule).
- the conductor 205a By using a conductive material having a function of reducing the diffusion of hydrogen in the conductor 205a, impurities such as hydrogen contained in the conductor 205b can be prevented from diffusing into the oxide 230 via the insulator 224 or the like. Can be prevented. Further, by using a conductive material having a function of suppressing the diffusion of oxygen for the conductor 205a, it is possible to prevent the conductor 205b from being oxidized and the conductivity from being lowered. As the conductive material having a function of suppressing the diffusion of oxygen, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used. Therefore, as the conductor 205a, the above-mentioned conductive material may be a single layer or a laminated material. For example, titanium nitride may be used for the conductor 205a.
- a conductive material containing tungsten, copper, or aluminum as a main component for the conductor 205b.
- tungsten may be used for the conductor 205b.
- the conductor 205 may function as a second gate electrode.
- the threshold voltage (Vth) of the transistor 200 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260 without interlocking with the potential applied to the conductor 260.
- Vth threshold voltage
- by applying a negative potential to the conductor 205 it is possible to increase the Vth of the transistor 200 and reduce the off-current. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0 V can be made smaller than when it is not applied.
- the electrical resistivity of the conductor 205 is designed in consideration of the potential applied to the above-mentioned conductor 205, and the film thickness of the conductor 205 is set according to the electrical resistivity.
- the film thickness of the insulator 216 is substantially the same as that of the conductor 205.
- the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, so that the impurities can be reduced from diffusing into the oxide 230. ..
- the conductor 205 may be provided larger than the size of the region that does not overlap with the conductor 242a and the conductor 242b of the oxide 230.
- the conductor 205 is also stretched in a region outside the ends of the oxides 230a and 230b in the channel width direction. That is, it is preferable that the conductor 205 and the conductor 260 are superimposed via an insulator on the outside of the side surface of the oxide 230 in the channel width direction.
- the channel forming region of the oxide 230 is electrically surrounded by the electric field of the conductor 260 that functions as the first gate electrode and the electric field of the conductor 205 that functions as the second gate electrode. Can be done.
- the structure of the transistor that electrically surrounds the channel forming region by the electric fields of the first gate and the second gate is called a curved channel (S-channel) structure.
- the transistor having an S-channel structure represents the structure of a transistor that electrically surrounds the channel formation region by the electric fields of one and the other of the pair of gate electrodes.
- the S-channel structure disclosed in the present specification and the like is different from the Fin type structure and the planar type structure.
- the conductor 205 is stretched to function as wiring.
- the present invention is not limited to this, and a conductor that functions as wiring may be provided under the conductor 205. Further, it is not always necessary to provide one conductor 205 for each transistor. For example, the conductor 205 may be shared by a plurality of transistors.
- the conductor 205 shows a configuration in which the conductor 205a and the conductor 205b are laminated, but the present invention is not limited to this.
- the conductor 205 may be provided as a single layer or a laminated structure having three or more layers.
- the insulator 222 and the insulator 224 function as a gate insulator.
- the insulator 222 preferably has a function of suppressing the diffusion of hydrogen (for example, at least one hydrogen atom, hydrogen molecule, etc.). Further, it is preferable that the insulator 222 has a function of suppressing the diffusion of oxygen (for example, at least one oxygen atom, oxygen molecule, etc.). For example, the insulator 222 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 224.
- the insulator 222 it is preferable to use an insulator containing oxides of one or both of aluminum and hafnium, which are insulating materials.
- the insulator it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
- an oxide containing hafnium and zirconium for example, hafnium zirconium oxide.
- the insulator 222 impurities such as hydrogen can be suppressed from diffusing into the inside of the transistor 200, and the generation of oxygen deficiency in the oxide 230 can be suppressed. Further, it is possible to suppress the conductor 205 from reacting with the oxygen contained in the insulator 224 and the oxide 230.
- aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, and zirconium oxide may be added to the insulator.
- these insulators may be nitrided.
- the insulator 222 may be used by laminating silicon oxide, silicon oxide or silicon nitride on these insulators.
- an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, and hafnium zirconium oxide may be used in a single layer or in a laminated state.
- a high-k material such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, and hafnium zirconium oxide.
- a substance having a high dielectric constant such as lead zirconate titanate (PZT), strontium titanate (SrTiO 3 ), (Ba, Sr) TiO 3 (BST) may be used.
- silicon oxide, silicon oxynitride, or the like may be appropriately used.
- the heat treatment may be performed, for example, at 100 ° C. or higher and 600 ° C. or lower, more preferably 350 ° C. or higher and 550 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the heat treatment is preferably performed in an oxygen atmosphere.
- oxygen can be supplied to the oxide 230 to reduce oxygen deficiency (VO).
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen after the heat treatment in an atmosphere of nitrogen gas or an inert gas. good.
- the heat treatment may be performed in an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more, and then continuously heat-treated in an atmosphere of nitrogen gas or an inert gas.
- the oxygen deficiency in the oxide 230 can be repaired by the supplied oxygen, in other words, the reaction of "VO + O ⁇ null" can be promoted. .. Further, the oxygen supplied to the hydrogen remaining in the oxide 230 reacts, so that the hydrogen can be removed (dehydrated) as H2O . As a result, it is possible to suppress the hydrogen remaining in the oxide 230 from recombination with the oxygen deficiency to form VOH.
- the insulator 222 and the insulator 224 may have a laminated structure of two or more layers.
- the laminated structure is not limited to the same material, and may be a laminated structure made of different materials.
- the insulator 224 may be formed in an island shape by superimposing on the oxide 230a. In this case, the insulator 275 is in contact with the side surface of the insulator 224 and the upper surface of the insulator 222.
- the conductor 242a and the conductor 242b are provided in contact with the upper surface of the oxide 230b.
- the conductor 242a and the conductor 242b function as a source electrode or a drain electrode of the transistor 200, respectively.
- Examples of the conductor 242 include a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, and the like. It is preferable to use a nitride containing titanium and aluminum. In one aspect of the invention, a nitride containing tantalum is particularly preferred. Further, for example, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like may be used. These materials are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when oxygen is absorbed.
- hydrogen contained in the oxide 230b or the like may diffuse into the conductor 242a or the conductor 242b.
- hydrogen contained in the oxide 230b or the like is likely to diffuse into the conductor 242a or the conductor 242b, and the diffused hydrogen is the conductor. It may bind to the nitrogen contained in the 242a or the conductor 242b. That is, hydrogen contained in the oxide 230b or the like may be absorbed by the conductor 242a or the conductor 242b.
- the conductor 242 it is preferable that no curved surface is formed between the side surface of the conductor 242 and the upper surface of the conductor 242.
- the cross-sectional area of the conductor 242 in the cross section in the channel width direction as shown in FIG. 8D can be increased.
- the conductivity of the conductor 242 can be increased and the on-current of the transistor 200 can be increased.
- the insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is provided in contact with the upper surface of the conductor 242b.
- the insulator 271 preferably functions as a barrier insulating film against at least oxygen. Therefore, it is preferable that the insulator 271 has a function of suppressing the diffusion of oxygen.
- the insulator 271 preferably has a function of suppressing the diffusion of oxygen more than the insulator 280.
- an insulator such as aluminum oxide or magnesium oxide may be used.
- the insulator 275 is provided so as to cover the insulator 224, the oxide 230a, the oxide 230b, the conductor 242, and the insulator 271. It is preferable that the insulator 275 has a function of capturing hydrogen and fixing hydrogen. In that case, the insulator 275 preferably contains an insulator such as silicon nitride or a metal oxide having an amorphous structure, for example, aluminum oxide or magnesium oxide. Further, for example, as the insulator 275, a laminated film of aluminum oxide and silicon nitride on the aluminum oxide may be used.
- the conductor 242 can be wrapped with the insulator having a barrier property against oxygen. That is, it is possible to prevent oxygen contained in the insulator 224 and the insulator 280 from diffusing into the conductor 242. As a result, the conductor 242 is directly oxidized by the oxygen contained in the insulator 224 and the insulator 280 to increase the resistivity and suppress the decrease in the on-current.
- the insulator 252 functions as a part of the gate insulator. As the insulator 252, it is preferable to use a barrier insulating film against oxygen. As the insulator 252, an insulator that can be used for the above-mentioned insulator 282 may be used. As the insulator 252, an insulator containing an oxide of one or both of aluminum and hafnium may be used. As the insulator, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate) and the like can be used. In this embodiment, aluminum oxide is used as the insulator 252. In this case, the insulator 252 is an insulator having at least oxygen and aluminum.
- the insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230b, the side surface of the oxide 230a, the side surface of the insulator 224, and the upper surface of the insulator 222. That is, the region overlapping the oxide 230a, the oxide 230b, and the conductor 260 of the insulator 224 is covered with the insulator 252 in the cross section in the channel width direction. Thereby, when the heat treatment or the like is performed, the desorption of oxygen by the oxide 230a and the oxide 230b can be blocked by the insulator 252 having a barrier property against oxygen.
- oxygen deficiency (VO) oxygen deficiency
- VOH oxygen deficiency
- the electrical characteristics of the transistor 200 can be improved and the reliability can be improved.
- the insulator 280 and the insulator 250 contain an excessive amount of oxygen, it is possible to suppress the excessive supply of the oxygen to the oxide 230a and the oxide 230b. Therefore, it is possible to prevent the region 230ba and the region 230bb from being excessively oxidized through the region 230bc to cause a decrease in the on-current of the transistor 200 or a decrease in the field effect mobility.
- the insulator 252 is provided in contact with the side surfaces of the conductor 242, the insulator 271, the insulator 275, and the insulator 280. Therefore, it is possible to reduce the oxidation of the side surface of the conductor 242 and the formation of an oxide film on the side surface. As a result, it is possible to suppress a decrease in the on-current of the transistor 200 or a decrease in the field effect mobility.
- the insulator 252 needs to be provided in the opening formed in the insulator 280 or the like together with the insulator 254, the insulator 250, and the conductor 260. In order to miniaturize the transistor 200, it is preferable that the film thickness of the insulator 252 is thin.
- the film thickness of the insulator 252 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less.
- the insulator 252 may have a region having the above-mentioned film thickness at least in a part thereof.
- the film thickness of the insulator 252 is preferably thinner than the film thickness of the insulator 250. In this case, the insulator 252 may have a region having a film thickness thinner than that of the insulator 250, at least in part.
- the insulator 252 In order to form the insulator 252 with a thin film thickness as described above, it is preferable to form the insulator by using the ALD method.
- the ALD method include a thermal ALD (Thermal ALD) method in which the reaction of the precursor and the reactor is performed only by thermal energy, and a PEALD (Plasma Enhanced ALD) method using a plasma-excited reactor.
- a thermal ALD Thermal ALD
- PEALD Laser ALD
- the ALD method utilizes the characteristics of atoms, which are self-regulating properties, and can deposit atoms layer by layer, so ultra-thin film formation is possible, film formation into structures with a high aspect ratio is possible, pinholes, etc. It has the effects of being able to form a film with few defects, being able to form a film with excellent coverage, and being able to form a film at a low temperature. Therefore, the insulator 252 can be formed on the side surface of the opening formed in the insulator 280 or the like with good coverage and with a thin film thickness as described above.
- the film provided by the ALD method may contain a large amount of impurities such as carbon as compared with the film provided by other film forming methods.
- impurities such as carbon as compared with the film provided by other film forming methods.
- SIMS Secondary Ion Mass Spectrometry
- XPS X-ray Photoelectron Spectroscopy
- AES Auger electron spectroscopy
- the insulator 250 functions as a part of the gate insulator.
- the insulator 250 is preferably arranged in contact with the upper surface of the insulator 252.
- the insulator 250 includes silicon oxide, silicon nitriding, silicon nitride, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide having holes, and the like. Can be used.
- silicon oxide and silicon nitride nitride are preferable because they are heat-stable.
- the insulator 250 is an insulator having at least oxygen and silicon.
- the insulator 250 preferably has a reduced concentration of impurities such as water and hydrogen in the insulator 250.
- the film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less, and more preferably 0.5 nm or more and 15.0 nm or less. In this case, the insulator 250 may have, at least in part, a region having the above-mentioned film thickness.
- FIGS. 8A to 8D show a configuration in which the insulator 250 is a single layer
- the present invention is not limited to this, and a laminated structure of two or more layers may be used.
- the insulator 250 may have a two-layer laminated structure of the insulator 250a and the insulator 250b on the insulator 250a.
- the lower insulator 250a is formed by using an insulator that easily permeates oxygen
- the upper insulator 250b is a diffusion of oxygen. It is preferable to use an insulator having a function of suppressing the above. With such a configuration, oxygen contained in the insulator 250a can be suppressed from diffusing into the conductor 260. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. Further, it is possible to suppress the oxidation of the conductor 260 by the oxygen contained in the insulator 250a.
- the insulator 250a may be provided by using a material that can be used for the above-mentioned insulator 250, and the insulator 250b may be an insulator containing an oxide of one or both of aluminum and hafnium.
- the insulator aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate) and the like can be used.
- hafnium oxide is used as the insulator 250b.
- the insulator 250b is an insulator having at least oxygen and hafnium.
- the film thickness of the insulator 250b is 0.5 nm or more and 5.0 nm or less, preferably 1.0 nm or more and 5.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less.
- the insulator 250b may have, at least in part, a region having the above-mentioned film thickness.
- an insulating material which is a high-k material having a high relative permittivity may be used for the insulator 250b.
- the gate insulator By forming the gate insulator into a laminated structure of the insulator 250a and the insulator 250b, it is possible to obtain a laminated structure that is stable against heat and has a high relative permittivity. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. Further, it is possible to reduce the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator. Therefore, the withstand voltage of the insulator 250 can be increased.
- EOT equivalent oxide film thickness
- the insulator 254 functions as a part of the gate insulator.
- silicon nitride formed by the PEALD method may be used as the insulator 254.
- the insulator 254 is an insulator having at least nitrogen and silicon.
- the insulator 254 may further have a barrier property against oxygen. As a result, oxygen contained in the insulator 250 can be suppressed from diffusing into the conductor 260.
- the insulator 254 needs to be provided in the opening formed in the insulator 280 or the like together with the insulator 252, the insulator 250, and the conductor 260. In order to miniaturize the transistor 200, it is preferable that the film thickness of the insulator 254 is thin.
- the film thickness of the insulator 254 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less.
- the insulator 254 may have, at least in part, a region having the above-mentioned film thickness.
- the film thickness of the insulator 254 is preferably thinner than the film thickness of the insulator 250. In this case, the insulator 254 may have a region having a film thickness thinner than that of the insulator 250, at least in part.
- the conductor 260 functions as the first gate electrode of the transistor 200.
- the conductor 260 preferably has a conductor 260a and a conductor 260b arranged on the conductor 260a.
- the conductor 260a is preferably arranged so as to wrap the bottom surface and the side surface of the conductor 260b.
- the upper surface of the conductor 260 substantially coincides with the upper surface of the insulator 250.
- the conductor 260 is shown as a two-layer structure of the conductor 260a and the conductor 260b in FIGS. 8B and 8C, it may be a single-layer structure or a laminated structure of three or more layers.
- the conductor 260a it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atom, hydrogen molecule, water molecule, nitrogen atom, nitrogen molecule, nitrogen oxide molecule and copper atom.
- a conductive material having a function of suppressing the diffusion of oxygen for example, at least one such as an oxygen atom and an oxygen molecule.
- the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to suppress that the conductor 260b is oxidized by the oxygen contained in the insulator 250 and the conductivity is lowered.
- the conductive material having a function of suppressing the diffusion of oxygen for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used.
- the conductor 260 also functions as wiring, it is preferable to use a conductor having high conductivity.
- a conductor having high conductivity for example, as the conductor 260b, a conductive material containing tungsten, copper, or aluminum as a main component can be used.
- the conductor 260b may have a laminated structure, for example, titanium or a laminated structure of titanium nitride and the conductive material.
- the conductor 260 is self-aligned so as to fill the opening formed in the insulator 280 or the like.
- the conductor 260 can be reliably arranged in the region between the conductor 242a and the conductor 242b without aligning the conductor 260.
- the height is preferably lower than the height of the bottom surface of the oxide 230b.
- the conductor 260 which functions as a gate electrode, covers the side surface and the upper surface of the channel forming region of the oxide 230b via an insulator 250 or the like, so that the electric field of the conductor 260 can be applied to the channel forming region of the oxide 230b. It becomes easier to act on the whole. Therefore, the on-current of the transistor 200 can be increased and the frequency characteristics can be improved.
- the difference is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, and more preferably 5 nm or more and 20 nm or less.
- the insulator 280 is provided on the insulator 275, and an opening is formed in the region where the insulator 250 and the conductor 260 are provided. Further, the upper surface of the insulator 280 may be flattened.
- the insulator 280 that functions as an interlayer film preferably has a low dielectric constant.
- a material having a low dielectric constant as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings.
- the insulator 280 is provided by using the same material as the insulator 216, for example.
- silicon oxide and silicon nitride nitride are preferable because they are thermally stable.
- materials such as silicon oxide, silicon oxynitride, and silicon oxide having pores are preferable because they can easily form a region containing oxygen desorbed by heating.
- the insulator 280 has a reduced concentration of impurities such as water and hydrogen in the insulator 280.
- the insulator 280 may appropriately use an oxide containing silicon such as silicon oxide and silicon nitride nitride.
- the insulator 282 preferably functions as a barrier insulating film that suppresses impurities such as water and hydrogen from diffusing into the insulator 280 from above, and preferably has a function of capturing impurities such as hydrogen. Further, the insulator 282 preferably functions as a barrier insulating film that suppresses the permeation of oxygen.
- a metal oxide having an amorphous structure for example, an insulator such as aluminum oxide may be used. In this case, the insulator 282 is an insulator having at least oxygen and aluminum.
- the insulator 282 which has a function of capturing impurities such as hydrogen in contact with the insulator 280 in the region sandwiched between the insulator 212 and the insulator 283, hydrogen contained in the insulator 280 and the like can be obtained. Impurities can be captured and the amount of hydrogen in the region can be kept constant. In particular, it is preferable to use aluminum oxide having an amorphous structure as the insulator 282 because hydrogen may be captured or fixed more effectively. This makes it possible to manufacture a transistor 200 having good characteristics and high reliability, and a semiconductor device.
- the insulator 283 functions as a barrier insulating film that suppresses impurities such as water and hydrogen from diffusing into the insulator 280 from above.
- the insulator 283 is placed on top of the insulator 282.
- a nitride containing silicon such as silicon nitride or silicon nitride oxide.
- silicon nitride formed by a sputtering method may be used as the insulator 283.
- a silicon nitride film having a high density can be formed.
- silicon nitride formed by the PEALD method or the CVD method may be further laminated on the silicon nitride formed by the sputtering method.
- the capacitive element 100 is arranged in the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285, and is in contact with the upper surface of the conductor 242b. It has an insulator 110, an insulator 130 on the insulator 283, and a conductor 120 on the insulator 130.
- the conductor 120 has a laminated structure of the conductor 120a on the insulator 130 and the conductor 120b on the conductor 120a.
- the part is arranged.
- the conductor 110 functions as a lower electrode of the capacitive element 100
- the conductor 120 functions as an upper electrode of the capacitive element 100
- the insulator 130 functions as a dielectric of the capacitive element 100.
- the upper electrode and the lower electrode are dielectrics not only on the bottom surface but also on the side surface at the openings of the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285. It is configured to face each other with a., And the capacitance per unit area can be increased. Therefore, the deeper the depth of the opening, the larger the capacitance of the capacitive element 100 can be. By increasing the capacitance per unit area of the capacitive element 100 in this way, it is possible to promote miniaturization or high integration of the semiconductor device.
- the shape of the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285 as viewed from the upper surface may be a quadrangle or a polygonal shape other than the quadrangle. It may be a polygonal shape with curved corners, or a circular shape including an ellipse.
- it is preferable that the area where the opening and the transistor 200 overlap is large in the top view.
- the length of the conductor 110 in the channel width direction is smaller than the length of the conductor 242b in the channel width direction.
- the occupied area of the semiconductor device having the capacitive element 100 and the transistor 200 can be reduced.
- the present invention is not limited to this, and the length of the conductor 110 in the channel width direction may be larger than the length of the conductor 242b in the channel width direction.
- the conductor 110 is arranged along the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285.
- the side surface and the bottom surface of the opening have a shape joined by a curved surface. With such a configuration, the conductor 110 can be formed into a film with good coverage at the opening.
- the height of a part of the upper surface of the conductor 110 substantially coincides with the height of the upper surface of the insulator 285. Further, the upper surface of the conductor 242b is in contact with the lower surface of the conductor 110.
- the conductor 110 is preferably formed into a film by using an ALD method, a CVD method, or the like, and a conductor that can be used for the conductor 205 may be used. For example, as the conductor 110, titanium nitride formed by using the thermal ALD method can be used.
- the insulator 130 is arranged so as to cover a part of the conductor 110, the insulator 245, and the insulator 285.
- the height of the upper surface of the region that overlaps with the insulator 130 may be higher than the height of the upper surface of the region that does not overlap with the insulator 130.
- the insulator 130 is preferably formed into a film by using an ALD method, a CVD method, or the like. It is preferable to use a material capable of having ferroelectricity for the insulator 130.
- Materials that can have strong dielectric properties include hafnium oxide, zirconium oxide, HfZrO x (x is a real number larger than 0), hafnium oxide and element J1 (here, element J1 is zirconium (Zr), silicon. (Si), aluminum (Al), gadrinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.) added to zirconium oxide with element J2 (element J2 here is hafnium) (Hf), silicon (Si), aluminum (Al), gadrinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.) are added to the material.
- PbTIO x barium titanate strontium (BST), barium titanate, lead zirconate titanate (PZT), strontium bismuthate tantanate (SBT), bismuth ferrite (BFO).
- BST barium titanate strontium
- PZT barium titanate
- SBT strontium bismuthate tantanate
- BFO bismuth ferrite
- Barium titanate, and the like, and a piezoelectric ceramic having a perovskite structure may be used.
- the material capable of having ferroelectricity for example, a mixture or compound composed of a plurality of materials selected from the materials listed above can be used.
- the insulator 130 may have a laminated structure composed of a plurality of materials selected from the materials listed above.
- the crystal structure (characteristics) of hafnium oxide, zirconium oxide, HfZrO x , and a material obtained by adding the element J1 to hafnium oxide may change not only depending on the film forming conditions but also depending on various processes.
- a material exhibiting ferroelectricity is not only referred to as a ferroelectric substance, but is also referred to as a material capable of having ferroelectricity.
- hafnium oxide, or a material having hafnium oxide and zirconium oxide as a material capable of having ferroelectricity is preferable because it can have ferroelectricity even when processed into a thin film of several nm.
- the film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, and further preferably 10 nm or less.
- the capacitive element 100 can be combined with the miniaturized transistor 200 to form a semiconductor device.
- a layered material capable of having ferroelectricity may be referred to as a ferroelectric layer or a metal oxide film.
- a non-volatile storage element can be formed by using a capacitive element (hereinafter, may be referred to as a ferroelectric capacitor) using the material as a dielectric.
- a non-volatile storage element using a ferroelectric capacitor may be referred to as a FeRAM (Ferroelectric Random Access Memory), a ferroelectric memory, or the like.
- a ferroelectric memory may have a transistor and a ferroelectric capacitor, and one of the source and drain of the transistor may be electrically connected to one terminal of the ferroelectric capacitor. Therefore, the semiconductor device having the capacitive element 100 and the transistor 200 shown in the present embodiment can function as a ferroelectric memory.
- the insulator 130 may have a laminated structure of the above-mentioned material having ferroelectricity and a material having a large dielectric strength.
- Materials with high dielectric strength include silicon oxide, silicon nitriding, silicon nitride, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, silicon oxide with carbon and nitrogen, and oxidation with pores. There are silicon or resin.
- the conductor 120 is arranged so as to fill the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285.
- the conductor 120 has a region overlapping with the insulator 285 via the insulator 130.
- the conductor 120 can be insulated from the conductor 110 via the insulator 130.
- the portion of the conductor 120 above the insulator 283 may be routed and formed in a wiring shape.
- the conductor 120 preferably has a conductor 120a and a conductor 120b on the conductor 120a.
- the conductor 120a may be provided with a thin conductive film having a good covering property on the insulator 130.
- the conductor 120b may be arranged so as to embed an opening on the conductor 120a.
- the conductor 120a is preferably formed into a film by using an ALD method, a CVD method, or the like, and a conductor that can be used for the conductor 205 may be used.
- the conductor 120a titanium nitride formed by the ALD method can be used.
- the conductor 120b is preferably formed into a film by using an ALD method, a CVD method, a sputtering method, or the like, and a conductor that can be used for the conductor 205 may be used.
- a conductor that can be used for the conductor 205 may be used.
- tungsten formed by a sputtering method can be used.
- the conductor 120 is not limited to the two-layer structure, and may be a single-layer structure or a laminated structure having three or more layers.
- a conductor that functions as wiring may be arranged in contact with the upper surface of the conductor 120.
- the conductor it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component.
- the conductor may have a laminated structure, for example, titanium or titanium nitride may be laminated with the conductive material.
- the conductor may be formed so as to be embedded in an opening provided in the insulator.
- the insulator 245 is arranged in contact with the side surfaces of the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285.
- the conductor 110 is provided in contact with the inner side surface of the insulator 245, the insulator 130 is provided in contact with the inner side surface of the conductor 110, and the conductor 120 is provided in contact with the inner side surface of the insulator 130. ..
- a barrier insulating film that can be used for the insulator 275 or the like may be used.
- an insulator such as silicon nitride, aluminum oxide, or silicon nitride may be used. Since the insulator 245 is provided in contact with the insulator 283, the insulator 282, the insulator 275, and the insulator 271, impurities such as water and hydrogen contained in the insulator 280 or the insulator 285 are contained in the conductor 110. It can be suppressed from being mixed in the oxide 230 through.
- silicon nitride is suitable because it has a high blocking property against hydrogen. Further, it is possible to prevent oxygen contained in the insulator 280 from being absorbed by the conductor 110.
- the first insulator in contact with the inner wall of the opening such as the insulator 280 and the second insulator inside thereof are a barrier insulating film against oxygen.
- a barrier insulating film against hydrogen it is preferable to use a barrier insulating film against hydrogen in combination.
- aluminum oxide formed by the ALD method may be used as the first insulator, and silicon nitride formed by the PEALD method may be used as the second insulator.
- the insulator 2445 the configuration in which the first insulator and the second insulator are laminated is shown, but the present invention is not limited to this.
- the insulator 245 may be provided as a single layer or a laminated structure having three or more layers.
- an insulator substrate for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used.
- the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), a resin substrate, and the like.
- the semiconductor substrate include a semiconductor substrate made of silicon and germanium, and a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide.
- the conductor substrate includes a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate and the like.
- the substrate having a metal nitride there are a substrate having a metal oxide, and the like.
- a substrate in which a conductor or a semiconductor is provided in an insulator substrate a substrate in which a conductor or an insulator is provided in a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided in a conductor substrate, and the like.
- those on which an element is provided may be used.
- Elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light emitting element, a storage element, and the like.
- Insulator examples include oxides having insulating properties, nitrides, nitride oxides, nitride oxides, metal oxides, metal oxide nitrides, metal nitride oxides and the like.
- Examples of the insulator having a high specific dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, nitride oxides having aluminum and hafnium, oxides having silicon and hafnium, silicon and hafnium. There are nitrides having oxides, or nitrides having silicon and hafnium.
- Examples of insulators having a low relative permittivity include silicon oxide, silicon oxide, silicon nitride, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and empty. There are silicon oxide with pores, resin, and the like.
- the transistor using a metal oxide can stabilize the electrical characteristics of the transistor by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen.
- the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen include boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, tantalum, and zirconium. Insulators containing, lanthanum, neodymium, hafnium, or tantalum may be used in single layers or in layers.
- an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen
- Metal oxides such as tantalum oxide, and metal nitrides such as aluminum nitride, silicon nitride, and silicon nitride can be used.
- the insulator that functions as a gate insulator is preferably an insulator having a region containing oxygen that is desorbed by heating.
- the oxygen deficiency of the oxide 230 can be compensated by having the structure in which silicon oxide or silicon oxide having a region containing oxygen desorbed by heating is in contact with the oxide 230.
- Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, indium, ruthenium, iridium, strontium, and lanthanum. It is preferable to use a metal element selected from the above, an alloy containing the above-mentioned metal element as a component, an alloy in which the above-mentioned metal element is combined, or the like.
- tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like are used. Is preferable.
- tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize.
- a plurality of conductive layers formed of the above materials may be laminated and used.
- a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined.
- a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing nitrogen are combined.
- a laminated structure may be formed in which the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined.
- a laminated structure in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined is used for the conductor functioning as a gate electrode.
- a conductive material containing oxygen may be provided on the channel forming region side.
- the conductor that functions as the gate electrode it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed.
- the above-mentioned conductive material containing a metal element and nitrogen may be used.
- a conductive material containing nitrogen such as titanium nitride and tantalum nitride may be used.
- indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon were added.
- Indium tin oxide may be used.
- indium gallium zinc oxide containing nitrogen may be used.
- Metal Oxide As the oxide 230, it is preferable to use a metal oxide (oxide semiconductor) that functions as a semiconductor.
- a metal oxide oxide semiconductor
- the metal oxide applicable to the oxide 230 according to the present invention will be described.
- the metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to them, it is preferable that aluminum, gallium, yttrium, tin and the like are contained. Further, one or more kinds selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and the like may be contained.
- the metal oxide is an In-M-Zn oxide having indium, the element M, and zinc.
- the element M is aluminum, gallium, yttrium, or tin.
- Other elements applicable to the element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and the like.
- the element M a plurality of the above-mentioned elements may be combined in some cases.
- a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, the metal oxide having nitrogen may be referred to as a metal oxide.
- FIG. 10A is a diagram illustrating the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).
- IGZO a metal oxide containing In, Ga, and Zn
- oxide semiconductors are roughly classified into “Amorphous”, “Crystalline”, and “Crystal”.
- Amorphous includes “completable amorphous”.
- Crystalline includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned crystal) (exclusion single crystal).
- single crystal, poly crystal, and single crystal amorphous are excluded from the classification of "Crystalline”.
- “Crystal” includes single crystal and poly crystal.
- the structure in the thick frame shown in FIG. 10A is an intermediate state between "Amorphous” and “Crystal", and belongs to a new boundary region (New crystal line phase). .. That is, the structure can be rephrased as a structure completely different from the energetically unstable "Amorphous” and "Crystal".
- the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD: X-Ray Diffraction) spectrum.
- XRD X-ray diffraction
- the GIXD method is also referred to as a thin film method or a Seemann-Bohlin method.
- the XRD spectrum obtained by the GIXD measurement shown in FIG. 10B may be simply referred to as an XRD spectrum in the present specification.
- the thickness of the CAAC-IGZO film shown in FIG. 10B is 500 nm.
- the horizontal axis is 2 ⁇ [deg. ], And the vertical axis is intensity [a. u. ].
- a peak showing clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film.
- the crystal structure of the film or the substrate can be evaluated by a diffraction pattern (also referred to as a microelectron diffraction pattern) observed by a micro electron diffraction method (NBED: Nano Beam Electron Diffraction).
- the diffraction pattern of the CAAC-IGZO film is shown in FIG. 10C.
- FIG. 10C is a diffraction pattern observed by the NBED in which the electron beam is incident parallel to the substrate.
- electron diffraction is performed with the probe diameter set to 1 nm.
- oxide semiconductors may be classified differently from FIG. 10A.
- oxide semiconductors are divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors.
- the non-single crystal oxide semiconductor include the above-mentioned CAAC-OS and nc-OS.
- the non-single crystal oxide semiconductor includes a polycrystal oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: atomous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.
- CAAC-OS CAAC-OS
- nc-OS nc-OS
- a-like OS the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.
- CAAC-OS is an oxide semiconductor having a plurality of crystal regions, the plurality of crystal regions having the c-axis oriented in a specific direction.
- the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface to be formed of the CAAC-OS film, or the normal direction of the surface of the CAAC-OS film.
- the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region in which the lattice arrangement is aligned. Further, the CAAC-OS has a region in which a plurality of crystal regions are connected in the ab plane direction, and the region may have distortion.
- the strain refers to a region in which a plurality of crystal regions are connected in which the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another grid arrangement is aligned. That is, CAAC-OS is an oxide semiconductor that is c-axis oriented and not clearly oriented in the ab plane direction.
- Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm).
- the maximum diameter of the crystal region is less than 10 nm.
- the size of the crystal region may be about several tens of nm.
- CAAC-OS has indium (In) and oxygen. It tends to have a layered crystal structure (also referred to as a layered structure) in which a layer (hereinafter, In layer) and a layer having elements M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are laminated. There is. Indium and element M can be replaced with each other. Therefore, the (M, Zn) layer may contain indium. In addition, the In layer may contain the element M. The In layer may contain Zn.
- the layered structure is observed as a grid image, for example, in a high-resolution TEM image.
- the position of the peak indicating the c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.
- a plurality of bright spots are observed in the electron diffraction pattern of the CAAC-OS film. Note that a certain spot and another spot are observed at point-symmetrical positions with the spot of the incident electron beam transmitted through the sample (also referred to as a direct spot) as the center of symmetry.
- the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit lattice is not limited to a regular hexagon and may be a non-regular hexagon. Further, in the above strain, it may have a lattice arrangement such as a pentagon or a heptagon.
- a clear grain boundary cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between the atoms changes due to the replacement of metal atoms. it is conceivable that.
- CAAC-OS for which no clear crystal grain boundary is confirmed, is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor.
- a configuration having Zn is preferable.
- In-Zn oxide and In-Ga-Zn oxide are more suitable than In oxide because they can suppress the generation of grain boundaries.
- CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries can be confirmed. Therefore, it can be said that CAAC-OS is unlikely to cause a decrease in electron mobility due to grain boundaries. Further, since the crystallinity of the oxide semiconductor may be deteriorated due to the mixing of impurities, the generation of defects, etc., CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the oxide semiconductor having CAAC-OS has stable physical properties. Therefore, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability. CAAC-OS is also stable against high temperatures (so-called thermal budgets) in the manufacturing process. Therefore, if CAAC-OS is used for the OS transistor, the degree of freedom in the manufacturing process can be expanded.
- nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less).
- nc-OS has tiny crystals. Since the size of the minute crystal is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystal is also referred to as a nanocrystal.
- nc-OS has no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film.
- nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductor depending on the analysis method.
- a peak indicating crystallinity is not detected in the Out-of-plane XRD measurement using a ⁇ / 2 ⁇ scan.
- electron beam diffraction also referred to as selected area electron diffraction
- a diffraction pattern such as a halo pattern is performed. Is observed.
- electron diffraction also referred to as nanobeam electron diffraction
- an electron beam having a probe diameter for example, 1 nm or more and 30 nm or less
- An electron diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be acquired.
- the a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor.
- the a-like OS has a void or low density region. That is, a-like OS has lower crystallinity than nc-OS and CAAC-OS. In addition, a-like OS has a higher hydrogen concentration in the membrane than nc-OS and CAAC-OS.
- CAC-OS relates to the material composition.
- CAC-OS is, for example, a composition of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof.
- the metal oxide one or more metal elements are unevenly distributed, and the region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size in the vicinity thereof.
- the mixed state is also called a mosaic shape or a patch shape.
- the CAC-OS has a structure in which the material is separated into a first region and a second region to form a mosaic, and the first region is distributed in the film (hereinafter, also referred to as a cloud shape). It is said.). That is, the CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.
- the atomic number ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are expressed as [In], [Ga], and [Zn], respectively.
- the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film.
- the second region is a region in which [Ga] is larger than [Ga] in the composition of the CAC-OS film.
- the first region is a region in which [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region.
- the second region is a region in which [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.
- the first region is a region in which indium oxide, indium zinc oxide, or the like is the main component.
- the second region is a region containing gallium oxide, gallium zinc oxide, or the like as a main component. That is, the first region can be rephrased as a region containing In as a main component. Further, the second region can be rephrased as a region containing Ga as a main component.
- a region containing In as a main component (No. 1) by EDX mapping acquired by using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy). It can be confirmed that the region (1 region) and the region containing Ga as a main component (second region) are unevenly distributed and have a mixed structure.
- CAC-OS When CAC-OS is used for a transistor, the conductivity caused by the first region and the insulating property caused by the second region act in a complementary manner to switch the switching function (On / Off function). Can be added to CAC-OS. That is, the CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS for the transistor, high on -current (Ion), high field effect mobility ( ⁇ ), and good switching operation can be realized.
- Ion on -current
- ⁇ high field effect mobility
- Oxide semiconductors have various structures, and each has different characteristics.
- the oxide semiconductor of one aspect of the present invention has two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, CAC-OS, nc-OS, and CAAC-OS. You may.
- the oxide semiconductor as a transistor, a transistor with high field effect mobility can be realized. In addition, a highly reliable transistor can be realized.
- the carrier concentration in the channel formation region of the oxide semiconductor is 1 ⁇ 10 17 cm -3 or less, preferably 1 ⁇ 10 15 cm -3 or less, more preferably 1 ⁇ 10 13 cm -3 or less, and more preferably 1 ⁇ . It is 10 11 cm -3 or less, more preferably 1 ⁇ 10 10 cm -3 or less, and 1 ⁇ 10 -9 cm -3 or more.
- the impurity concentration in the oxide semiconductor film may be lowered to lower the defect level density.
- a low impurity concentration and a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic.
- An oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.
- the trap level density may also be low.
- the charge captured at the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel forming region is formed in an oxide semiconductor having a high trap level density may have unstable electrical characteristics.
- Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon and the like.
- the concentration of silicon and carbon in the channel formation region of the oxide semiconductor and the concentration of silicon or carbon near the interface with the channel formation region of the oxide semiconductor is 2 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
- the oxide semiconductor contains an alkali metal or an alkaline earth metal
- defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is set to 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less. ..
- the nitrogen concentration in the channel formation region of the oxide semiconductor obtained by SIMS is less than 5 ⁇ 10 19 atoms / cm 3 , preferably 5 ⁇ 10 18 atoms / cm 3 or less, more preferably 1 ⁇ 10 18 atoms. / Cm 3 or less, more preferably 5 ⁇ 10 17 atoms / cm 3 or less.
- hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency.
- oxygen deficiency When hydrogen enters the oxygen deficiency, electrons that are carriers may be generated.
- a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable that hydrogen in the channel forming region of the oxide semiconductor is reduced as much as possible.
- the hydrogen concentration obtained by SIMS is less than 1 ⁇ 10 20 atoms / cm 3 , preferably less than 5 ⁇ 10 19 atoms / cm 3 , more preferably 1 ⁇ 10. It should be less than 19 atoms / cm 3 , more preferably less than 5 ⁇ 10 18 atoms / cm 3 , and even more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
- the semiconductor material that can be used for the oxide 230 is not limited to the above-mentioned metal oxide.
- a semiconductor material having a bandgap (a semiconductor material that is not a zero-gap semiconductor) may be used.
- a semiconductor of a simple substance element such as silicon, a compound semiconductor such as gallium arsenide, a layered substance (also referred to as an atomic layer material, a two-dimensional material, etc.) that functions as a semiconductor, and the like as a semiconductor material.
- the layered substance is a general term for a group of materials having a layered crystal structure.
- a layered crystal structure is a structure in which layers formed by covalent or ionic bonds are laminated via bonds that are weaker than covalent or ionic bonds, such as van der Waals forces.
- the layered material has high electrical conductivity in the unit layer, that is, high two-dimensional electrical conductivity.
- Chalcogenides are compounds containing chalcogens. Chalcogen is a general term for elements belonging to Group 16, and includes oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides.
- oxide 230 for example, it is preferable to use a transition metal chalcogenide that functions as a semiconductor.
- Specific transition metal chalcogenides applicable as oxide 230 include molybdenum sulfide (typically MoS 2 ), tungstenized molybdenum (typically MoSe 2 ), and molybdenum tellurium (typically MoTe 2 ).
- Tungsten disulfide typically WS 2
- tungsten serene typically WSe 2
- tungsten tellurium typically WTe 2
- hafnium sulfide typically HfS 2
- hafnium serene typically
- Typical examples include HfSe 2 ), zirconium sulfide (typically ZrS 2 ), and zirconium selenium (typically ZrSe 2 ).
- FIGS. 8A to 8D ⁇ Method of manufacturing semiconductor devices> Next, a method for manufacturing the semiconductor device according to one aspect of the present invention shown in FIGS. 8A to 8D will be described with reference to FIGS. 14A to 25D.
- a in each figure shows a top view.
- B in each figure is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line of A1-A2 shown in A in each figure, and is also a cross-sectional view in the channel length direction of the transistor 200.
- C in each figure is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line in A3 to A4 in each figure, and is also a cross-sectional view in the channel width direction of the transistor 200.
- D in each figure is a cross-sectional view of a portion shown by a dotted chain line of A5-A6 in A in each figure. In the top view of A in each figure, some elements are omitted for the purpose of clarifying the figure.
- the insulating material for forming the insulator, the conductive material for forming the conductor, or the semiconductor material for forming the semiconductor is the sputtering method, the CVD method, the MBE method, the PLD method, and the ALD method. Etc. can be used as appropriate to form a film.
- the sputtering method includes an RF sputtering method that uses a high-frequency power supply as a sputtering power supply, a DC sputtering method that uses a DC power supply, and a pulse DC sputtering method that changes the voltage applied to the electrodes in a pulsed manner.
- the RF sputtering method is mainly used when forming an insulating film
- the DC sputtering method is mainly used when forming a metal conductive film.
- the pulse DC sputtering method is mainly used when a compound such as an oxide, a nitride, or a carbide is formed into a film by the reactive sputtering method.
- the CVD method can be classified into a plasma CVD (PECVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat, an optical CVD (PhotoCVD) method using light, and the like. Further, it can be divided into a metal CVD (MCVD: Metall CVD) method and an organic metal CVD (MOCVD: Metalorganic CVD) method depending on the raw material gas used.
- PECVD plasma CVD
- TCVD Thermal CVD
- PhotoCVD PhotoCVD
- MCVD Metal CVD
- MOCVD Metalorganic CVD
- the plasma CVD method can obtain a high quality film at a relatively low temperature. Further, since the thermal CVD method does not use plasma, it is a film forming method capable of reducing plasma damage to the object to be processed. For example, wiring, electrodes, elements (transistors, capacitive elements, etc.) included in a semiconductor device may be charged up by receiving electric charges from plasma. At this time, the accumulated electric charge may destroy the wiring, electrodes, elements, and the like included in the semiconductor device. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so that the yield of the semiconductor device can be increased. Further, in the thermal CVD method, plasma damage during film formation does not occur, so that a film having few defects can be obtained.
- thermal ALD Thermal ALD
- PEALD plasma-excited reactor
- the CVD method and ALD method are different from the sputtering method in which particles emitted from a target or the like are deposited. Therefore, it is a film forming method that is not easily affected by the shape of the object to be treated and has good step coverage.
- the ALD method has excellent step covering property and excellent thickness uniformity, and is therefore suitable for covering the surface of an opening having a high aspect ratio.
- the ALD method since the ALD method has a relatively slow film forming speed, it may be preferable to use it in combination with another film forming method such as a CVD method having a high film forming speed.
- a film having an arbitrary composition can be formed depending on the flow rate ratio of the raw material gas.
- a film having a continuously changed composition can be formed by changing the flow rate ratio of the raw material gas while forming the film.
- the time required for film formation is shortened because it does not require time for transport or pressure adjustment as compared with the case of forming a film using multiple film forming chambers. can do. Therefore, it may be possible to increase the productivity of the semiconductor device.
- a film having an arbitrary composition can be formed by introducing a plurality of different types of precursors at the same time or by controlling the number of cycles of each precursor by controlling a plurality of different types of precursors.
- a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (see FIGS. 14A to 14D).
- the film formation of the insulator 212 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 212 can be reduced.
- the film formation of the insulator 212 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used.
- silicon nitride is formed as the insulator 212 by a pulse DC sputtering method using a silicon target in an atmosphere containing nitrogen gas.
- a pulse DC sputtering method it is possible to suppress the generation of particles due to the arching of the target surface, so that the film thickness distribution can be made more uniform.
- the pulse voltage it is possible to make the rise and fall of the discharge steeper than the high frequency voltage. As a result, electric power can be supplied to the electrodes more efficiently to improve the sputtering rate and the film quality.
- an insulator such as silicon nitride that is difficult for impurities such as water and hydrogen to permeate it is possible to suppress the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212. Further, by using an insulator such as silicon nitride that is difficult for copper to permeate as the insulator 212, even if a metal such as copper that easily diffuses is used for the conductor in the layer below the insulator 212 (not shown), the metal is used. Can be prevented from diffusing upward through the insulator 212.
- the insulator 214 is formed on the insulator 212 (see FIGS. 14A to 14D).
- the film formation of the insulator 214 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 214 can be reduced.
- the film formation of the insulator 214 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used.
- aluminum oxide is formed as the insulator 214 by a pulse DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.
- the pulse DC sputtering method By using the pulse DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and the film quality can be improved.
- RF (Radio Frequency) power may be applied to the substrate.
- the amount of oxygen injected into the layer below the insulator 214 can be controlled by the magnitude of the RF power applied to the substrate.
- the RF power shall be 0 W / cm 2 or more and 1.86 W / cm 2 or less. That is, the amount of oxygen suitable for the characteristics of the transistor can be changed and injected by the RF power at the time of forming the insulator 214. Therefore, it is possible to inject an amount of oxygen suitable for improving the reliability of the transistor.
- the RF frequency is preferably 10 MHz or higher. Typically, it is 13.56 MHz. The higher the RF frequency, the
- the insulator 214 it is preferable to use a metal oxide having an amorphous structure, for example, aluminum oxide, which has a high function of capturing hydrogen and fixing hydrogen. As a result, hydrogen contained in the insulator 216 or the like can be captured or fixed, and the hydrogen can be prevented from diffusing into the oxide 230.
- a metal oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 214 because hydrogen may be captured or fixed more effectively. This makes it possible to manufacture a transistor 200 having good characteristics and high reliability, and a semiconductor device.
- the insulator 216 is formed on the insulator 214.
- the film formation of the insulator 216 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 216 can be reduced.
- the film formation of the insulator 216 is not limited to the sputtering method, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may be appropriately used.
- silicon oxide is formed as the insulator 216 by a pulse DC sputtering method using a silicon target in an atmosphere containing oxygen gas.
- the pulse DC sputtering method By using the pulse DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and the film quality can be improved.
- the insulator 212, the insulator 214, and the insulator 216 are continuously formed without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used.
- the insulator 212, the insulator 214, and the insulator 216 are formed by reducing the amount of hydrogen in the film, and further, the amount of hydrogen mixed in the film between the film forming steps is reduced. Can be done.
- an opening reaching the insulator 214 is formed in the insulator 216.
- the opening also includes, for example, a groove, a slit, and the like. Further, the area where the opening is formed may be referred to as an opening. Although wet etching may be used to form the openings, it is preferable to use dry etching for microfabrication.
- the insulator 214 it is preferable to select an insulator that functions as an etching stopper film when the insulator 216 is etched to form a groove. For example, when silicon oxide or silicon oxide nitride is used for the insulator 216 forming the groove, silicon nitride, aluminum oxide, or hafnium oxide may be used for the insulator 214.
- a capacitively coupled plasma (CCP: Capacitively Coupled Plasma) etching apparatus having parallel plate type electrodes can be used.
- the capacitive coupling type plasma etching apparatus having a parallel plate type electrode may be configured to apply a high frequency voltage to one of the parallel plate type electrodes. Alternatively, a plurality of different high frequency voltages may be applied to one of the parallel plate type electrodes. Alternatively, a high frequency voltage having the same frequency may be applied to each of the parallel plate type electrodes. Alternatively, a high frequency voltage having a different frequency may be applied to each of the parallel plate type electrodes.
- a dry etching apparatus having a high-density plasma source can be used. As the dry etching apparatus having a high-density plasma source, for example, an inductively coupled plasma (ICP: Inductively Coupled Plasma) etching apparatus or the like can be used.
- ICP Inductively Coupled Plasma
- a conductive film to be a conductor 205a is formed. It is desirable that the conductive film to be the conductor 205a contains a conductor having a function of suppressing the permeation of oxygen.
- a conductor having a function of suppressing the permeation of oxygen For example, tantalum nitride, tungsten nitride, titanium nitride and the like can be used. Alternatively, it can be a laminated film of a conductor having a function of suppressing the permeation of oxygen and a tantalum, tungsten, titanium, molybdenum, aluminum, copper or molybdenum tungsten alloy.
- the film formation of the conductive film to be the conductor 205a can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- titanium nitride is formed as a conductive film to be the conductor 205a.
- a metal nitride in the lower layer of the conductor 205b, it is possible to suppress the oxidation of the conductor 205b by the insulator 216 or the like. Further, even if a metal that easily diffuses such as copper is used as the conductor 205b, it is possible to prevent the metal from diffusing out from the conductor 205a.
- a conductive film to be the conductor 205b is formed.
- the conductive film serving as the conductor 205b tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum-tungsten alloy or the like can be used.
- the film formation of the conductive film can be performed by using a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- tungsten is formed as a conductive film to be the conductor 205b.
- a part of the conductive film to be the conductor 205a and a part of the conductive film to be the conductor 205b is removed, and the insulator 216 is exposed (see FIGS. 14A to 14D).
- the conductor 205a and the conductor 205b remain only in the opening.
- a part of the insulator 216 may be removed by the CMP treatment.
- the insulator 222 is formed on the insulator 216 and the conductor 205 (see FIGS. 15A to 15D).
- the insulator 222 it is preferable to form an insulator containing an oxide of one or both of aluminum and hafnium.
- the insulator containing one or both oxides of aluminum and hafnium it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
- hafnium zirconium oxide Insulators containing oxides of one or both of aluminum and hafnium have barrier properties against oxygen, hydrogen, and water.
- the insulator 222 has a barrier property against hydrogen and water, hydrogen and water contained in the structure provided around the transistor 200 are suppressed from diffusing into the inside of the transistor 200 through the insulator 222. , The formation of oxygen deficiency in the oxide 230 can be suppressed.
- the film formation of the insulator 222 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- hafnium oxide is formed as the insulator 222 by using the ALD method.
- the heat treatment may be performed at 250 ° C. or higher and 650 ° C. or lower, preferably 300 ° C. or higher and 500 ° C. or lower, and more preferably 320 ° C. or higher and 450 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the oxygen gas may be about 20%.
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen. May be.
- the gas used in the above heat treatment is highly purified.
- the amount of water contained in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less.
- the treatment is performed at a temperature of 400 ° C. for 1 hour with the flow rate ratio of nitrogen gas and oxygen gas set to 4 slm: 1 slm.
- impurities such as water and hydrogen contained in the insulator 222 can be removed.
- an oxide containing hafnium is used as the insulator 222, a part of the insulator 222 may be crystallized by the heat treatment.
- the heat treatment can be performed at a timing such as after the film formation of the insulator 224 is performed.
- an insulating film 224A is formed on the insulator 222 (see FIGS. 15A to 15D).
- the insulating film 224A can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- silicon oxide is formed as the insulating film 224A by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulating film 224A can be reduced. Since the insulating film 224A comes into contact with the oxide 230a in a later step, it is preferable that the hydrogen concentration is reduced in this way.
- the oxide film 230A and the oxide film 230B are formed in this order on the insulating film 224A (see FIGS. 15A to 15D). It is preferable that the oxide film 230A and the oxide film 230B are continuously formed without being exposed to the atmospheric environment. By forming the film without opening it to the atmosphere, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the oxide film 230A and the oxide film 230B, and the vicinity of the interface between the oxide film 230A and the oxide film 230B can be prevented. Can be kept clean.
- the oxide film 230A and the oxide film 230B can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the oxide film 230A and the oxide film 230B is preferable because a film having a uniform thickness can be formed even in a groove or an opening having a large aspect ratio by using the ALD method.
- the sputtering method is used to form the oxide film 230A and the oxide film 230B.
- the oxide film 230A and the oxide film 230B are formed by a sputtering method
- oxygen or a mixed gas of oxygen and noble gas is used as the sputtering gas.
- the sputtering gas By increasing the proportion of oxygen contained in the sputtering gas, excess oxygen in the oxide film formed can be increased.
- the above oxide film is formed by a sputtering method, the above In—M—Zn oxide target or the like can be used.
- the proportion of oxygen contained in the sputtering gas may be 70% or more, preferably 80% or more, and more preferably 100%.
- the oxide film 230B is formed by a sputtering method, if the ratio of oxygen contained in the sputtering gas is more than 30% and 100% or less, preferably 70% or more and 100% or less, the oxygen excess type oxidation is performed. A physical semiconductor is formed. Transistors using oxygen-rich oxide semiconductors in the channel formation region can obtain relatively high reliability. However, one aspect of the present invention is not limited to this.
- the oxide film 230B is formed by a sputtering method and the ratio of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less, an oxygen-deficient oxide semiconductor is formed. To. Transistors using oxygen-deficient oxide semiconductors in the channel formation region can obtain relatively high field-effect mobilities. Further, the crystallinity of the oxide film can be improved by forming a film while heating the substrate.
- Each oxide film may be formed according to the characteristics required for the oxide 230a and the oxide 230b by appropriately selecting the film forming conditions and the atomic number ratio.
- the insulating film 224A, the oxide film 230A, and the oxide film 230B are formed by a sputtering method without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used. As a result, it is possible to reduce the mixing of hydrogen into the insulating film 224A, the oxide film 230A, and the oxide film 230B between the film forming steps.
- the heat treatment may be performed in a temperature range in which the oxide film 230A and the oxide film 230B do not crystallize, and may be performed at 250 ° C. or higher and 650 ° C. or lower, preferably 400 ° C. or higher and 600 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the oxygen gas may be about 20%.
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen. May be.
- the gas used in the above heat treatment is highly purified.
- the amount of water contained in the gas used in the heat treatment may be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less.
- the flow rate ratio of nitrogen gas and oxygen gas is set to 4 slm: 1 slm, and the treatment is performed at a temperature of 400 ° C. for 1 hour.
- impurities such as carbon, water, and hydrogen in the oxide film 230A and the oxide film 230B
- the crystallinity of the oxide film 230B can be improved, and a denser and more dense structure can be obtained.
- the crystal region in the oxide film 230A and the oxide film 230B can be increased, and the in-plane variation of the crystal region in the oxide film 230A and the oxide film 230B can be reduced. Therefore, in-plane variation in the electrical characteristics of the transistor 200 can be reduced.
- hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A and the oxide film 230B moves to the insulator 222 and is absorbed into the insulator 222.
- hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B diffuses into the insulator 222. Therefore, the hydrogen concentration of the insulator 222 increases, but the hydrogen concentration in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B decreases.
- the insulating film 224A functions as a gate insulator of the transistor 200, and the oxide film 230A and the oxide film 230B function as a channel forming region of the transistor 200. Therefore, the transistor 200 having the insulating film 224A, the oxide film 230A, and the oxide film 230B having the reduced hydrogen concentration is preferable because it has good reliability.
- a conductive film 242A is formed on the oxide film 230B (see FIGS. 15A to 15D).
- the film formation of the conductive film 242A can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- a sputtering method for example, as the conductive film 242A, tantalum nitride may be formed by using a sputtering method.
- the heat treatment may be performed before the film formation of the conductive film 242A.
- the heat treatment may be performed under reduced pressure to continuously form a conductive film 242A without exposure to the atmosphere.
- the water and hydrogen adsorbed on the surface of the oxide film 230B can be removed, and the water concentration and the hydrogen concentration in the oxide film 230A and the oxide film 230B can be further reduced.
- the temperature of the heat treatment is preferably 100 ° C. or higher and 400 ° C. or lower. In this embodiment, the temperature of the heat treatment is set to 200 ° C.
- an insulating film 271A is formed on the conductive film 242A (see FIGS. 15A to 15D).
- the insulating film 271A can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- As the insulating film 271A it is preferable to use an insulating film having a function of suppressing the permeation of oxygen.
- aluminum oxide or silicon nitride may be formed as the insulating film 271A by a sputtering method.
- the conductive film 242A and the insulating film 271A are formed by a sputtering method without being exposed to the atmosphere.
- a multi-chamber type film forming apparatus may be used.
- the conductive film 242A and the insulating film 271A can be formed by reducing the amount of hydrogen in the film, and further, it is possible to reduce the mixing of hydrogen in the film between each film forming step.
- the film to be the hard mask may be continuously formed without being exposed to the atmosphere.
- the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A are processed into an island shape by using a lithography method to form an insulator 224, an oxide 230a, an oxide 230b, and a conductive film.
- a layer 242B and an insulating layer 271B are formed (see FIGS. 16A to 16D).
- the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B are formed so that at least a part thereof overlaps with the conductor 205.
- a dry etching method or a wet etching method can be used. Processing by the dry etching method is suitable for microfabrication. Further, the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A may be processed under different conditions.
- the resist is first exposed through a mask. Next, the exposed area is removed or left with a developer to form a resist mask. Next, a conductor, a semiconductor, an insulator, or the like can be processed into a desired shape by etching the resist mask.
- a resist mask may be formed by exposing the resist using KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light, or the like. Further, an immersion technique may be used in which a liquid (for example, water) is filled between the substrate and the projection lens for exposure. Further, instead of the above-mentioned light, an electron beam or an ion beam may be used.
- the resist mask can be removed by performing a dry etching process such as ashing, performing a wet etching process, performing a wet etching process after the dry etching process, or performing a dry etching process after the wet etching process.
- a dry etching process such as ashing, performing a wet etching process, performing a wet etching process after the dry etching process, or performing a dry etching process after the wet etching process.
- a hard mask made of an insulator or a conductor may be used under the resist mask.
- a hard mask an insulating film or a conductive film to be a hard mask material is formed on the conductive film 242A, a resist mask is formed on the insulating film or a conductive film, and the hard mask material is etched to form a hard mask having a desired shape. can do.
- Etching of the conductive film 242A or the like may be performed after removing the resist mask, or may be performed while leaving the resist mask. In the latter case, the resist mask may disappear during etching.
- the hard mask may be removed by etching after etching the conductive film 242A or the like.
- the material of the hard mask does not affect the post-process or can be used in the post-process, it is not always necessary to remove the hard mask.
- the insulating layer 271B is used as a hard mask.
- the conductive layer 242B has no curved surface between the side surface and the upper surface as shown in FIGS. 16B to 16D.
- the conductor 242a and the conductor 242b shown in FIGS. 8B and 8D have a square end at the intersection of the side surface and the upper surface. Since the end portion where the side surface and the upper surface of the conductor 242 intersect is angular, the cross-sectional area of the conductor 242 becomes larger than that in the case where the end portion has a curved surface. As a result, the resistance of the conductor 242 is reduced, so that the on-current of the transistor 200 can be increased.
- the cross sections of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may have a tapered shape.
- the tapered shape refers to a shape in which at least a part of the side surface of the structure is provided so as to be inclined with respect to the substrate surface.
- the angle formed by the inclined side surface and the substrate surface (hereinafter, may be referred to as a taper angle) is less than 90 °.
- the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may have, for example, a taper angle of 60 ° or more and less than 90 °.
- the present invention is not limited to the above, and the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be configured to be substantially perpendicular to the upper surface of the insulator 222. With such a configuration, when a plurality of transistors 200 are provided, it is possible to reduce the area and increase the density.
- the by-products generated in the etching step may be formed in layers on the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B.
- the layered by-product will be formed between the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B, and the insulator 275. Therefore, it is preferable to remove the layered by-product formed in contact with the upper surface of the insulator 222.
- an insulator 275 is formed by covering the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B (see FIGS. 17A to 17D).
- the insulator 275 is in close contact with the upper surface of the insulator 222 and the side surface of the insulator 224.
- the film formation of the insulator 275 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- As the insulator 275 it is preferable to use an insulating film having a function of suppressing the permeation of oxygen.
- the insulator 275 aluminum oxide may be formed into a film by a sputtering method, and silicon nitride may be formed on the aluminum oxide by a PEALD method.
- the function of suppressing the diffusion of impurities such as water and hydrogen and oxygen may be improved.
- the oxide 230a, the oxide 230b, and the conductive layer 242B can be covered with the insulator 275 and the insulating layer 271B having a function of suppressing the diffusion of oxygen. This makes it possible to reduce the direct diffusion of oxygen from the insulator 280 or the like into the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B in a later step.
- an insulating film to be the insulator 280 is formed on the insulator 275.
- the insulating film can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- a silicon oxide film may be formed by using a sputtering method.
- the insulator 280 containing excess oxygen can be formed by forming the insulating film to be the insulator 280 in an atmosphere containing oxygen by a sputtering method. Further, by using a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 280 can be reduced.
- heat treatment may be performed before the film formation of the insulating film.
- the heat treatment may be performed under reduced pressure to continuously form the insulating film without exposing it to the atmosphere.
- the water and hydrogen adsorbed on the surface of the insulator 275 and the like are removed, and the water concentration and the hydrogen concentration in the oxide 230a, the oxide 230b, and the insulator 224 are further reduced. be able to.
- the above-mentioned heat treatment conditions can be used for the heat treatment.
- the insulating film to be the insulator 280 is subjected to CMP treatment to form an insulator 280 having a flat upper surface (see FIGS. 17A to 17D).
- silicon nitride may be formed on the insulator 280 by, for example, a sputtering method, and CMP treatment may be performed until the silicon nitride reaches the insulator 280.
- a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B are processed to form an opening reaching the oxide 230b.
- the opening is preferably formed so as to overlap the conductor 205.
- an insulator 271a, an insulator 271b, a conductor 242a, and a conductor 242b are formed (see FIGS. 18A to 18D).
- the side surfaces of the insulator 280, the insulator 275, the insulator 271, and the conductor 242 may have a tapered shape.
- the taper angle of the insulator 280 may be larger than the taper angle of the conductor 242.
- the upper portion of the oxide 230b may be removed when the opening is formed.
- a dry etching method or a wet etching method can be used for processing a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and a part of the conductive layer 242B.
- Processing by the dry etching method is suitable for microfabrication. Further, the processing may be performed under different conditions. For example, a part of the insulator 280 is processed by a dry etching method, a part of the insulator 275 and a part of the insulating layer 271B are processed by a wet etching method, and a part of the conductive layer 242B is processed by a dry etching method. You may.
- impurities may adhere to the side surface of the oxide 230a, the upper surface and the side surface of the oxide 230b, the side surface of the conductor 242, the side surface of the insulator 280, or the diffusion of the impurities into the inside thereof.
- a step of removing such impurities may be performed. Further, the dry etching may form a damaged region on the surface of the oxide 230b. Such damaged areas may be removed.
- the impurities include an insulator 280, an insulator 275, a part of the insulating layer 271B, a component contained in the conductive layer 242B, and a component contained in a member used in an apparatus used for forming the opening. Examples thereof include those caused by components contained in the gas or liquid used for etching.
- the impurities include hafnium, aluminum, silicon, tantalum, fluorine, chlorine and the like.
- impurities such as aluminum or silicon inhibit the conversion of oxide 230b to CAAC-OS. Therefore, it is preferable that impurity elements such as aluminum and silicon that inhibit CAAC-OS formation are reduced or removed.
- the concentration of aluminum atoms in the oxide 230b and its vicinity may be 5.0 atomic% or less, preferably 2.0 atomic% or less, more preferably 1.5 atomic% or less, and 1.0. Atomic% or less is more preferable, and less than 0.3 atom% is further preferable.
- the region of the metal oxide that has become a pseudo-amorphous oxide semiconductor (a-like OS: atomous-like oxide semiconductor) due to the inhibition of CAAC-OS by impurities such as aluminum or silicon is defined as a non-CAAC region. May be called.
- a-like OS atomous-like oxide semiconductor
- impurities such as aluminum or silicon
- the non-CAAC region since the crystal structure is less dense, a large amount of VOH is formed, and the transistor is likely to be normally turned on. Therefore, it is preferable that the non-CAAC region of the oxide 230b is reduced or removed.
- the oxide 230b has a layered CAAC structure.
- the conductor 242a or the conductor 242b and its vicinity function as a drain. That is, it is preferable that the oxide 230b near the lower end of the conductor 242a (conductor 242b) has a CAAC structure.
- the damaged region of the oxide 230b is removed, and by having the CAAC structure, fluctuations in the electrical characteristics of the transistor 200 can be further suppressed. In addition, the reliability of the transistor 200 can be improved.
- a cleaning process is performed in order to remove impurities and the like adhering to the surface of the oxide 230b in the above etching step.
- the cleaning method include wet cleaning using a cleaning liquid (also referred to as wet etching treatment), plasma treatment using plasma, cleaning by heat treatment, and the like, and the above cleaning may be appropriately combined.
- the cleaning process may deepen the groove.
- the cleaning treatment may be performed using carbonated water or an aqueous solution obtained by diluting oxalic acid, phosphoric acid, hydrofluoric acid or the like with pure water, pure water, carbonated water or the like.
- ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water.
- these cleanings may be performed in combination as appropriate.
- an aqueous solution obtained by diluting hydrofluoric acid with pure water may be referred to as diluted hydrofluoric acid
- an aqueous solution obtained by diluting ammonia water with pure water may be referred to as diluted ammonia water.
- concentration, temperature, etc. of the aqueous solution may be appropriately adjusted depending on the impurities to be removed, the configuration of the semiconductor device to be washed, and the like.
- the ammonia concentration of the diluted ammonia water may be 0.01% or more and 5% or less, preferably 0.1% or more and 0.5% or less.
- the hydrogen fluoride concentration of the diluted hydrofluoric acid may be 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 ppm or less.
- the above cleaning treatment may be performed a plurality of times, and the cleaning liquid may be changed for each cleaning treatment.
- a treatment using diluted hydrofluoric acid or diluted aqueous ammonia may be performed as the first cleaning treatment
- a treatment using pure water or carbonated water may be performed as the second cleaning treatment.
- wet cleaning is performed using diluted ammonia water.
- impurities adhering to the surface of the oxide 230a, the oxide 230b, etc. or diffused inside can be removed. Further, the crystallinity of the oxide 230b can be enhanced.
- the heat treatment may be performed after the etching or the cleaning.
- the heat treatment may be performed at 100 ° C. or higher and 450 ° C. or lower, preferably 350 ° C. or higher and 400 ° C. or lower.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more of an oxidizing gas, 1% or more, or 10% or more.
- the heat treatment is preferably performed in an oxygen atmosphere.
- oxygen can be supplied to the oxide 230a and the oxide 230b to reduce the oxygen deficiency.
- the heat treatment may be performed in a reduced pressure state.
- the heat treatment may be continuously performed in a nitrogen atmosphere without being exposed to the atmosphere.
- an insulating film 252A is formed (see FIGS. 19A to 19D).
- the insulating film 252A can be formed into a film by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the insulating film 252A is preferably formed by using the ALD method.
- the insulating film 252A is preferably formed with a thin film thickness, and it is necessary to reduce the variation in film thickness.
- the ALD method is a film-forming method in which a precursor and a reactor (for example, an oxidizing agent) are alternately introduced, and the film thickness can be adjusted by the number of times this cycle is repeated, so that the film thickness is precise.
- the film thickness can be adjusted.
- the insulating film 252A needs to be formed on the bottom surface and the side surface of the opening formed in the insulator 280 or the like with good coverage.
- it is preferable that a film is formed on the upper surface and the side surface of the oxide 230 and the side surface of the conductor 242 with good coverage. Since the atomic layer can be deposited layer by layer on the bottom surface and the side surface of the opening, the insulating film 252A can be formed with good coverage on the opening.
- ozone (O 3 ), oxygen (O 2 ), water (H 2 O) and the like can be used as the oxidizing agent.
- oxygen (O 2 ), etc., which do not contain hydrogen, as an oxidizing agent hydrogen diffused in the oxide 230b can be reduced.
- aluminum oxide is formed as the insulating film 252A by the thermal ALD method.
- microwave processing refers to processing using, for example, a device having a power source for generating high-density plasma using microwaves.
- microwave refers to an electromagnetic wave having a frequency of 300 MHz or more and 300 GHz or less.
- the dotted lines shown in FIGS. 19B to 19D indicate microwaves, high frequencies such as RF, oxygen plasma, oxygen radicals, and the like.
- a microwave processing apparatus having a power source for generating high-density plasma using microwaves.
- the frequency of the microwave processing device may be 300 MHz or more and 300 GHz or less, preferably 2.4 GHz or more and 2.5 GHz or less, for example, 2.45 GHz.
- the electric power of the power source to which the microwave of the microwave processing apparatus is applied may be 1000 W or more and 10000 W or less, preferably 2000 W or more and 5000 W or less.
- the microwave processing device may have a power supply for applying RF to the substrate side. Further, by applying RF to the substrate side, oxygen ions generated by the high-density plasma can be efficiently guided into the oxide 230b.
- the microwave treatment is preferably performed under reduced pressure, and the pressure may be 10 Pa or more and 1000 Pa or less, preferably 300 Pa or more and 700 Pa or less.
- the treatment temperature may be 750 ° C. or lower, preferably 500 ° C. or lower, for example, about 400 ° C.
- the heat treatment may be continuously performed without exposing to the outside air.
- the heat treatment may be performed at 100 ° C. or higher and 750 ° C. or lower, preferably 300 ° C. or higher and 500 ° C. or lower.
- the microwave treatment may be performed using oxygen gas and argon gas.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be larger than 0% and 100% or less.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be larger than 0% and 50% or less.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be 10% or more and 40% or less.
- the oxygen flow rate ratio (O 2 / (O 2 + Ar)) may be 10% or more and 30% or less.
- the carrier concentration in the region 230 bc can be reduced by performing the microwave treatment in an atmosphere containing oxygen. Further, in the microwave treatment, by preventing an excessive amount of oxygen from being introduced into the chamber, it is possible to prevent the carrier concentration from being excessively lowered in the region 230ba and the region 230bb.
- oxygen gas is turned into plasma using a high frequency such as microwave or RF, and the oxygen plasma is converted into a conductor of oxide 230b. It can act on the region between the 242a and the conductor 242b.
- the region 230bc can be irradiated with a high frequency such as microwaves or RF. That is, microwaves, high frequencies such as RF, oxygen plasma, and the like can be applied to the region 230bc shown in FIG. 9A.
- the VOH of the region 230 bc can be divided and the hydrogen H can be removed from the region 230 bc.
- the reaction “VO H ⁇ H + VO” occurs, and the VO H contained in the region 230 bc can be reduced. Therefore, oxygen deficiency and VOH in the region 230bc can be reduced, and the carrier concentration can be lowered. Further, by supplying the oxygen radical generated by the oxygen plasma or the oxygen contained in the insulator 250 to the oxygen deficiency formed in the region 230 bc, the oxygen deficiency in the region 230 bc is further reduced and the carrier concentration is increased. Can be reduced.
- the conductor 242a and the conductor 242b are provided on the region 230ba and the region 230bb shown in FIG. 9A.
- the conductor 242 functions as a shielding film against the action of microwaves, high frequencies such as RF, oxygen plasma, etc. when microwave treatment is performed in an atmosphere containing oxygen. Therefore, it is preferable that the conductor 242 has a function of shielding electromagnetic waves of 300 MHz or more and 300 GHz or less, for example, 2.4 GHz or more and 2.5 GHz or less.
- the conductors 242a and 242b shield the action of microwaves, high frequencies such as RF, oxygen plasma, etc., so that these actions extend to the regions 230ba and 230bb. do not have. Thereby, the microwave treatment does not cause a decrease in VOH and an excessive amount of oxygen supply in the region 230ba and the region 230bb , so that the decrease in the carrier concentration can be prevented.
- an insulator 252 having a barrier property against oxygen is provided in contact with the side surfaces of the conductor 242a and the conductor 242b. As a result, it is possible to suppress the formation of an oxide film on the side surfaces of the conductor 242a and the conductor 242b by microwave treatment.
- oxygen deficiency and VOH can be selectively removed in the region 230 bc of the oxide semiconductor to make the region 230 bc i-type or substantially i-type. Further, it is possible to suppress the supply of excess oxygen to the region 230ba and the region 230bb that function as a source region or a drain region, and maintain n-type formation. As a result, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and suppress variations in the electrical characteristics of the transistor 200 within the substrate surface.
- thermal energy may be directly transferred to the oxide 230b due to the electromagnetic interaction between the microwave and the molecules in the oxide 230b.
- the oxide 230b may be heated by this heat energy.
- Such heat treatment may be called microwave annealing.
- the microwave treatment By performing the microwave treatment in an atmosphere containing oxygen, the same effect as oxygen annealing may be obtained.
- hydrogen is contained in the oxide 230b, it is considered that this thermal energy is transferred to the hydrogen in the oxide 230b, and the activated hydrogen is released from the oxide 230b.
- an insulating film 250A is formed (see FIGS. 20A to 20D).
- the heat treatment may be performed before the film formation of the insulating film 250A, or the heat treatment may be performed under reduced pressure to continuously form the insulating film 250A without exposure to the atmosphere. Further, it is preferable that the heat treatment is performed in an atmosphere containing oxygen. By performing such a treatment, the water and hydrogen adsorbed on the surface of the insulating film 252A and the like can be removed, and the water and hydrogen concentrations in the oxide 230a and the oxide 230b can be further reduced.
- the temperature of the heat treatment is preferably 100 ° C. or higher and 400 ° C. or lower.
- the insulating film 250A can be formed by using a sputtering method, a CVD method, a PECVD method, an MBE method, a PLD method, an ALD method, or the like. Further, it is preferable that the insulating film 250A is formed by a film forming method using a gas in which hydrogen atoms are reduced or removed. Thereby, the hydrogen concentration of the insulating film 250A can be reduced. Since the insulating film 250A becomes the insulator 250 facing the oxide 230b via the insulator 252 having a thin film thickness in a later step, it is preferable that the hydrogen concentration is reduced in this way.
- silicon oxide nitride is formed as the insulating film 250A by the PECVD method.
- an insulating film to be the insulator 250b may be formed after the film formation of the insulating film 250A.
- the insulating film to be the insulator 250b can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the insulating film to be the insulator 250b is preferably formed by using an insulator having a function of suppressing the diffusion of oxygen. With such a configuration, oxygen contained in the insulator 250a can be suppressed from diffusing into the conductor 260.
- the insulating film to be the insulator 250b can be provided by using the same material as the insulator 222.
- hafnium oxide may be formed by a thermal ALD method as an insulating film to be an insulator 250b.
- Microwave treatment may be performed after the insulating film 250A is formed (see FIGS. 20A to 20D).
- the microwave treatment conditions performed after the film formation of the insulating film 252A described above may be used.
- the microwave treatment may be performed after the film formation of the insulating film 250A without performing the microwave treatment performed after the film formation of the insulating film 252A.
- the insulating film to be the insulator 250b is provided as described above, microwave treatment may be performed after the film formation.
- the microwave treatment conditions performed after the film formation of the insulating film 252A described above may be used.
- the microwave treatment may be performed after the film formation of the insulating film to be the insulator 250b without performing the microwave treatment performed after the film formation of the insulating film 252A or the insulating film 250A.
- the heat treatment may be performed while maintaining the reduced pressure state after each microwave treatment.
- hydrogen in the insulating film 252A, the insulating film 250A, the insulating film to be the insulator 250b, the oxide 230b, and the oxide 230a can be efficiently removed.
- a part of hydrogen may be gettered to the conductor 242 (conductor 242a and conductor 242b).
- the step of performing the heat treatment may be repeated a plurality of times while maintaining the reduced pressure state after the microwave treatment.
- the heat treatment temperature is preferably 300 ° C. or higher and 500 ° C. or lower.
- the microwave treatment that is, microwave annealing may also serve as the heat treatment. When the oxide 230b or the like is sufficiently heated by microwave annealing, the heat treatment may not be performed.
- the diffusion of hydrogen, water, impurities, etc. can be suppressed. Therefore, hydrogen, water, impurities, etc. diffuse into the oxide 230b, the oxide 230a, etc. via the insulator 252 by a post-step such as forming a film of the conductive film to be the conductor 260 or a post-treatment such as heat treatment. Can be suppressed.
- an insulating film 254A is formed (see FIGS. 21A to 21D).
- the insulating film 254A can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the insulating film 254A is preferably formed by using the ALD method in the same manner as the insulating film 252A.
- the insulating film 254A can be formed with a thin film thickness and good coverage.
- silicon nitride is formed as the insulating film 254A by the PEALD method.
- a conductive film to be the conductor 260a and a conductive film to be the conductor 260b are formed in order.
- the film formation of the conductive film to be the conductor 260a and the conductive film to be the conductor 260b can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the ALD method is used to form titanium nitride as the conductive film to be the conductor 260a
- the CVD method is used to form tungsten as the conductive film to be the conductor 260b.
- the insulating film 252A, the insulating film 250A, the insulating film 254A, the conductive film to be the conductor 260a, and the conductive film to be the conductor 260b are polished until the insulator 280 is exposed.
- 252, insulator 250, insulator 254, and conductor 260 (conductor 260a and conductor 260b) are formed (see FIGS. 22A to 22D).
- the insulator 252 is arranged so as to cover the opening reaching the oxide 230b.
- the conductor 260 is arranged so as to embed the opening via the insulator 252 and the insulator 250.
- the heat treatment may be performed under the same conditions as the above heat treatment.
- the treatment is carried out in a nitrogen atmosphere at a temperature of 400 ° C. for 1 hour.
- the heat treatment the water concentration and the hydrogen concentration in the insulator 250 and the insulator 280 can be reduced.
- the insulator 282 may be continuously formed without being exposed to the atmosphere.
- the insulator 282 is formed on the insulator 252, the insulator 250, the conductor 260, and the insulator 280 (see FIGS. 22A to 22D).
- the film formation of the insulator 282 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the insulator 282 is preferably performed by using a sputtering method. By using a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 282 can be reduced.
- aluminum oxide is formed as the insulator 282 by a pulse DC sputtering method using an aluminum target in an atmosphere containing oxygen gas.
- the pulse DC sputtering method By using the pulse DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and the film quality can be improved.
- oxygen can be added to the insulator 280 while forming the film. This allows the insulator 280 to contain excess oxygen. At this time, it is preferable to form the insulator 282 while heating the substrate.
- an etching mask is formed on the insulator 282 by a lithography method, and a part of the insulator 282, a part of the insulator 280, a part of the insulator 275, a part of the insulator 222, and the insulator 216 are formed. Is partially processed until the upper surface of the insulator 214 is exposed (see FIGS. 23A to 23D). Although wet etching may be used for the processing, it is preferable to use dry etching for fine processing.
- heat treatment may be performed.
- the heat treatment may be performed at 250 ° C. or higher and 650 ° C. or lower, preferably 350 ° C. or higher and 600 ° C. or lower. Further, the heat treatment is preferably lower than the heat treatment temperature performed after the oxide film 230B is formed.
- the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas. By performing the heat treatment, a part of oxygen added to the insulator 280 diffuses into the oxide 230 via the insulator 250 and the like.
- the insulator 280 is included in the insulator 280 from the side surface of the insulator 280 formed by processing the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216. Oxygen and hydrogen combined with the oxygen can be released to the outside. Hydrogen combined with oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced.
- the insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230. Since the insulator 252 has a barrier property against oxygen, it is possible to reduce the diffusion of an excessive amount of oxygen into the oxide 230. As a result, oxygen can be supplied to the region 230 bc and its vicinity so that an excessive amount of oxygen is not supplied. Thereby, oxygen deficiency and VOH formed in the region 230 bc can be reduced while suppressing the oxidation of the side surface of the conductor 242 by excess oxygen. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be improved.
- the volume of the insulator 280 for one transistor 200 may become excessively small.
- the amount of oxygen diffused in the oxide 230 is significantly reduced. If the oxide 230 is heated in contact with an oxidative insulator (for example, an insulator 250) that does not contain sufficient oxygen, the oxygen constituting the oxide 230 may be desorbed.
- the insulator 252 is provided in contact with the upper surface and the side surface of the oxide 230 in the region overlapping with the conductor 260 of the oxide 230.
- the insulator 252 Since the insulator 252 has a barrier property against oxygen, it is possible to reduce the desorption of oxygen from the oxide 230 even in the above heat treatment. Thereby, oxygen deficiency and VOH formed in the region 230 bc can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved and the reliability can be improved.
- a transistor having good electrical characteristics and good reliability is formed regardless of whether the amount of oxygen supplied from the insulator 280 is large or small. Can be done. Therefore, it is possible to provide a semiconductor device in which the electrical characteristics of the transistor 200 are suppressed from being dispersed in the substrate surface.
- the insulator 283 is formed on the insulator 282 (see FIGS. 24A to 24D).
- the film formation of the insulator 283 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the insulator 283 is preferably performed by using a sputtering method.
- a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 283 can be reduced.
- the insulator 283 may have a multi-layer structure.
- silicon nitride may be formed into a film by a sputtering method, and silicon nitride may be formed on the silicon nitride by an ALD method.
- ALD method By wrapping the transistor 200 with the insulator 283 and the insulator 214 having high barrier properties, it is possible to prevent moisture and hydrogen from entering from the outside.
- the insulator 274 is formed on the insulator 283.
- the film formation of the insulator 274 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- silicon oxide is formed as the insulator 274 by the CVD method.
- the upper surface of the insulator 274 is flattened by polishing the insulator 274 until the insulator 283 is exposed by CMP treatment (see FIGS. 24A to 24D). A part of the upper surface of the insulator 283 may be removed by the CMP treatment.
- the insulator 285 is formed on the insulator 274 and the insulator 283 (see FIGS. 25A to 25D).
- the film formation of the insulator 285 can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the film formation of the insulator 285 is preferably performed by using a sputtering method. By using a sputtering method that does not require the use of hydrogen-containing molecules in the film-forming gas, the hydrogen concentration in the insulator 285 can be reduced.
- silicon oxide is formed as an insulator 285 by a sputtering method.
- the insulator 271b, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285 are formed with an opening 290 reaching the conductor 242b (see FIGS. 25A to 25D).
- the opening 290 may be formed by using a lithography method. Since the opening 290 has a large aspect ratio, it is preferable to perform anisotropic etching, and for example, dry etching may be performed.
- dry etching for example, C 4 F 6 gas, C 5 F 6 gas, C 4 F 8 gas, CF 4 gas, SF 6 gas, CHF 3 gas, Cl 2 gas, BCl 3 gas or SiCl 4 gas, etc.
- etching gases can be appropriately switched and used according to the object to be etched (insulator 271b, insulator 275, insulator 280, insulator 282, insulator 283, and insulator 285).
- the shape of the opening 290 in FIG. 25A is circular in the top view, but the shape is not limited to this.
- the opening 290 may have a substantially circular shape such as an ellipse, a polygonal shape such as a quadrangle, or a polygonal shape such as a quadrangle with rounded corners when viewed from above.
- the side surface and the bottom surface of the opening 290 have a shape joined by a curved surface.
- the conductor 110 can be formed into a film with good coverage at the opening 290.
- an insulating film to be an insulator 245 is formed.
- the insulating film is formed so as to be in contact with at least the side surface of the opening 290.
- the insulating film may be formed along the side surface and the bottom surface of the opening 290.
- the film formation of the insulating film can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.
- the insulating film to be the insulator 245 it is preferable to use an insulating film having a function of suppressing the permeation of impurities such as water and hydrogen or oxygen.
- silicon nitride is preferable because it has a high blocking property against hydrogen.
- the insulating film is anisotropically etched to form an insulator 245 in contact with the side surface of the opening 290 (see FIGS. 25A to 25D).
- at least a part of the insulating film is removed, and at least a part of the upper surface of the conductor 242b is exposed.
- a part of the upper surface of the conductor 242b may be removed.
- Anisotropic etching may be performed by, for example, a dry etching method.
- the conductive film 110A is formed by covering the insulator 285 and the opening 290 (see FIGS. 26A to 26D). At this time, the conductive film 110A is preferably formed in contact with the side surface and the bottom surface of the opening 290 having a large aspect ratio. Therefore, it is preferable that the conductive film 110A is formed by using a film forming method having good covering properties such as an ALD method or a CVD method. For example, titanium nitride may be formed by using the ALD method.
- the filler 135 is formed on the conductive film 110A (see FIGS. 26A to 26D).
- the filler 135 may have an opening 290 embedded to such an extent that the CMP treatment performed in the subsequent step can be performed. Therefore, a cavity or the like may be formed in the opening 290.
- the filler 135 may use an insulator or a conductor.
- silicon oxide may be formed by using the APCVD method.
- CMP treatment is performed to remove the layer above the insulator 285 to form the conductor 110 (see FIGS. 27A to 27D).
- the insulator 285 functions as a stopper for the CMP treatment of the conductive film 110A.
- a part of the insulator 285 may be removed by the CMP treatment.
- an etching process is performed to remove the filler 135 in the opening 290 (see FIGS. 28A to 28D).
- a wet etching method or a dry etching method may be used, but it may be easier to use the wet etching method when removing the filler 135 in the opening 290.
- a hydrofluoric acid-based solution or the like may be used as the etchant.
- an insulating film 130A is formed on the conductor 110 and the insulator 285 (see FIGS. 29A to 29D).
- the insulating film 130A is preferably formed in contact with the conductor 110 provided inside the opening 290 having a large aspect ratio. Therefore, it is preferable that the insulating film 130A is formed by using a film forming method having good covering properties such as an ALD method or a CVD method.
- As the insulating film 130A it is preferable to use the above-mentioned material capable of having ferroelectricity.
- HfZrO x (x is a real number larger than 0) may be formed by using the thermal ALD method.
- the insulating film 130A by using a film forming method such as the ALD method and covering the conductor 110 with good coverage, it is possible to prevent the upper electrode and the lower electrode of the capacitive element 100 from being short-circuited.
- a conductive film 120A is formed on the insulating film 130A (see FIGS. 29A to 29D). At least the conductive film 120A is preferably formed in contact with the insulating film 130A provided inside the opening 290 having a large aspect ratio. Therefore, the conductive film 120A is preferably formed by using a film forming method having good embedding property such as an ALD method or a CVD method, and for example, titanium nitride may be formed by using a thermal ALD method.
- the film formation of the conductive film 120A is preferably a method of forming a film while heating the substrate, as in the thermal ALD method.
- the film may be formed by setting the substrate temperature to room temperature or higher, preferably 300 ° C. or higher, more preferably 325 ° C. or higher, and further preferably 350 ° C. or higher.
- the film may be formed by setting the substrate temperature to 500 ° C. or lower, preferably 450 ° C. or lower.
- the substrate temperature may be set to about 400 ° C.
- the ferroelectricity of the insulator 130 can be enhanced without performing high-temperature baking treatment after the formation of the capacitive element 100. This makes it possible to easily manufacture a ferroelectric capacitor and improve the productivity of the semiconductor device.
- a conductive film 120B is formed on the conductive film 120A (see FIGS. 29A to 29D).
- the conductive film 120B is preferably formed so as to embed the opening 290. Therefore, the conductive film 120B is preferably formed by using a film forming method having good embedding property such as an ALD method or a CVD method, and for example, tungsten may be formed by using a metal CVD method.
- the upper electrode of the capacitive element 100 can be provided with good embedding property in the opening 290, so that the electrostatic capacitance of the capacitive element 100 can be increased. Can be done.
- the conductive film 120A, the conductive film 120B, and the insulating film 130A are processed by a lithography method to form the conductor 120a, the conductor 120b, and the insulator 130 (see FIGS. 8A to 8D).
- the insulating film 130A may not be processed into the insulator 130 and may be left as the insulating film 130A.
- the conductor 120 may be formed so that the portion above the insulator 285 functions as wiring, or the conductor functioning as wiring may be formed in the layer above the conductor 120.
- the height of the upper surface of the region that overlaps with the insulator 130 may be higher than the height of the upper surface of the region that does not overlap with the insulator 130.
- the transistor 200 and the capacitive element 100 can be manufactured by using the method for manufacturing the semiconductor device shown in the present embodiment.
- a film having high purity intrinsic ferroelectricity here high. It is possible to form an intrinsically pure capacitive element. The consistency of the manufacturing process between the capacitive element having high-purity intrinsic ferroelectricity and the high-purity intrinsic oxide semiconductor is very high. Therefore, it is possible to provide a method for manufacturing a semiconductor device having high productivity.
- Microwave processing device a microwave processing device that can be used in the method for manufacturing the semiconductor device will be described.
- FIG. 30 schematically shows a top view of the single-wafer multi-chamber manufacturing apparatus 2700.
- the manufacturing apparatus 2700 has an atmospheric side substrate supply chamber 2701 having a cassette port 2761 for accommodating the substrate and an alignment port 2762 for aligning the substrate, and an atmospheric side substrate transport for transporting the substrate from the atmospheric side substrate supply chamber 2701.
- the load lock chamber 2703a which carries in the chamber 2702 and carries in the substrate and switches the pressure in the room from atmospheric pressure to atmospheric pressure, or switches from reduced pressure to atmospheric pressure, and carries out the substrate and reduces the pressure in the room from reduced pressure to atmospheric pressure, or It has an unload lock chamber 2703b for switching from atmospheric pressure to decompression, a transport chamber 2704 for transporting a substrate in vacuum, a chamber 2706a, a chamber 2706b, a chamber 2706c, and a chamber 2706d.
- the atmospheric board transport chamber 2702 is connected to the load lock chamber 2703a and the unload lock chamber 2703b, the load lock chamber 2703a and the unload lock chamber 2703b are connected to the transport chamber 2704, and the transport chamber 2704 is connected to the chamber 2706a.
- Chamber 2706b, chamber 2706c and chamber 2706d are connected to the atmospheric board transport chamber 2702.
- a gate valve GV is provided at the connection portion of each chamber, and each chamber can be independently held in a vacuum state except for the atmospheric side substrate supply chamber 2701 and the atmospheric side substrate transport chamber 2702. Further, a transfer robot 2763a is provided in the atmospheric side substrate transfer chamber 2702, and a transfer robot 2763b is provided in the transfer chamber 2704. The transfer robot 2763a and the transfer robot 2763b can transfer the substrate in the manufacturing apparatus 2700.
- the back pressure (total pressure) of the transport chamber 2704 and each chamber is, for example, 1 ⁇ 10 -4 Pa or less, preferably 3 ⁇ 10 -5 Pa or less, and more preferably 1 ⁇ 10 -5 Pa or less.
- the partial pressure of the gas molecule (atom) having the mass-to-charge ratio (m / z) of 18 in the transport chamber 2704 and each chamber is, for example, 3 ⁇ 10 -5 Pa or less, preferably 1 ⁇ 10 -5 Pa or less. , More preferably 3 ⁇ 10 -6 Pa or less.
- the partial pressure of the gas molecule (atom) having an m / z of 28 in the transport chamber 2704 and each chamber is, for example, 3 ⁇ 10 -5 Pa or less, preferably 1 ⁇ 10 -5 Pa or less, more preferably 3. ⁇ 10-6 Pa or less.
- the partial pressure of the gas molecule (atom) having m / z of 44 in the transport chamber 2704 and each chamber is, for example, 3 ⁇ 10 -5 Pa or less, preferably 1 ⁇ 10 -5 Pa or less, more preferably 3. ⁇ 10-6 Pa or less.
- the total pressure and partial pressure in the transport chamber 2704 and each chamber can be measured using a mass spectrometer.
- a mass spectrometer for example, a quadrupole mass spectrometer (also referred to as Q-mass) Qulee CGM-051 manufactured by ULVAC, Inc. may be used.
- the transport chamber 2704 and each chamber have a configuration in which there are few external leaks or internal leaks.
- the leak rate of the transport chamber 2704 and each chamber is 3 ⁇ 10 -6 Pa ⁇ m 3 / s or less, preferably 1 ⁇ 10 -6 Pa ⁇ m 3 / s or less.
- the leak rate of the gas molecule (atom) having m / z of 18 is 1 ⁇ 10 -7 Pa ⁇ m 3 / s or less, preferably 3 ⁇ 10 -8 Pa ⁇ m 3 / s or less.
- the leak rate of the gas molecule (atom) having m / z of 28 is 1 ⁇ 10 ⁇ 5 Pa ⁇ m 3 / s or less, preferably 1 ⁇ 10 ⁇ 6 Pa ⁇ m 3 / s or less.
- the leak rate of the gas molecule (atom) having m / z of 44 is 3 ⁇ 10 -6 Pa ⁇ m 3 / s or less, preferably 1 ⁇ 10 -6 Pa ⁇ m 3 / s or less.
- the leak rate may be derived from the total pressure and partial pressure measured using the above-mentioned mass spectrometer.
- the leak rate depends on external and internal leaks.
- An external leak is a gas flowing in from outside the vacuum system due to a minute hole, a defective seal, or the like.
- the internal leak is caused by a leak from a partition such as a valve in the vacuum system or a gas released from an internal member. In order to keep the leak rate below the above value, it is necessary to take measures from both external and internal leaks.
- the transfer chamber 2704 and the opening / closing part of each chamber may be sealed with a metal gasket.
- a metal gasket it is preferable to use a metal coated with iron fluoride, aluminum oxide, or chromium oxide.
- Metal gaskets have higher adhesion than O-rings and can reduce external leaks. Further, by using the passivation of the metal coated with iron fluoride, aluminum oxide, chromium oxide or the like, the emitted gas containing impurities released from the metal gasket can be suppressed and the internal leak can be reduced.
- a member constituting the manufacturing apparatus 2700 aluminum, chromium, titanium, zirconium, nickel or vanadium having a small amount of emission gas containing impurities is used. Further, the above-mentioned metal containing impurities and having a small amount of emitted gas may be used by coating the alloy containing iron, chromium, nickel and the like. Alloys containing iron, chromium, nickel, etc. are rigid, heat resistant and suitable for processing. Here, if the surface unevenness of the member is reduced by polishing or the like in order to reduce the surface area, the released gas can be reduced.
- the member of the above-mentioned manufacturing apparatus 2700 may be coated with iron fluoride, aluminum oxide, chromium oxide or the like.
- the members of the manufacturing apparatus 2700 are preferably made of only metal as much as possible.
- the surface thereof is made of iron fluoride, aluminum oxide, or oxide in order to suppress the emitted gas. It is recommended to cover it thinly with chrome or the like.
- the adsorbents present in the transport chamber 2704 and each chamber do not affect the pressure of the transport chamber 2704 and each chamber because they are adsorbed on the inner wall and the like, but cause gas release when the transport chamber 2704 and each chamber are exhausted. Will be. Therefore, although there is no correlation between the leak rate and the exhaust speed, it is important to use a pump with a high exhaust capacity to remove the adsorbents existing in the transport chamber 2704 and each chamber as much as possible and exhaust them in advance.
- the transport chamber 2704 and each chamber may be baked in order to promote the desorption of adsorbents. By baking, the desorption rate of the adsorbent can be increased by about 10 times. Baking may be performed at 100 ° C. or higher and 450 ° C.
- the desorption rate of water or the like which is difficult to desorb only by exhausting, can be further increased.
- the desorption rate of the adsorbent can be further increased.
- an inert gas such as heated noble gas or oxygen
- the adsorbents in the transport chamber 2704 and each chamber can be desorbed, and the impurities present in the transport chamber 2704 and each chamber can be reduced. It is effective to repeat this treatment 2 times or more and 30 times or less, preferably 5 times or more and 15 times or less.
- an inert gas or oxygen having a temperature of 40 ° C. or higher and 400 ° C. or lower, preferably 50 ° C. or higher and 200 ° C.
- the pressure in the transport chamber 2704 and each chamber is 0.1 Pa or higher and 10 kPa or lower.
- the pressure may be preferably 1 Pa or more and 1 kPa or less, more preferably 5 Pa or more and 100 Pa or less, and the pressure holding period may be 1 minute or more and 300 minutes or less, preferably 5 minutes or more and 120 minutes or less.
- the transfer chamber 2704 and each chamber are exhausted for a period of 5 minutes or more and 300 minutes or less, preferably 10 minutes or more and 120 minutes or less.
- the chamber 2706b and the chamber 2706c are, for example, chambers capable of performing microwave treatment on the object to be processed. It should be noted that the chamber 2706b and the chamber 2706c differ only in the atmosphere when microwave processing is performed. Since other configurations are common, they will be explained together below.
- the chamber 2706b and the chamber 2706c have a slot antenna plate 2808, a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Further, outside the chamber 2706b and the chamber 2706c, there are a gas supply source 2801, a valve 2802, a high frequency generator 2803, a waveguide 2804, a mode converter 2805, a gas tube 2806, and a waveguide 2807. A matching box 2815, a high frequency power supply 2816, a waveguide 2817, and a valve 2818 are provided.
- the high frequency generator 2803 is connected to the mode converter 2805 via a waveguide 2804.
- the mode converter 2805 is connected to the slot antenna plate 2808 via a waveguide 2807.
- the slot antenna plate 2808 is arranged in contact with the dielectric plate 2809.
- the gas supply source 2801 is connected to the mode converter 2805 via a valve 2802. Then, gas is sent to the chamber 2706b and the chamber 2706c by the mode converter 2805, the waveguide 2807, and the gas tube 2806 passing through the dielectric plate 2809.
- the vacuum pump 2817 has a function of exhausting gas or the like from the chamber 2706b and the chamber 2706c via the valve 2818 and the exhaust port 2819.
- the high frequency power supply 2816 is connected to the substrate holder 2812 via the matching box 2815.
- the board holder 2812 has a function of holding the board 2811. For example, it has a function of electrostatically chucking or mechanically chucking the substrate 2811. It also functions as an electrode to which power is supplied from the high frequency power supply 2816. Further, it has a heating mechanism 2813 inside and has a function of heating the substrate 2811.
- the vacuum pump 2817 for example, a dry pump, a mechanical booster pump, an ion pump, a titanium sublimation pump, a cryopump, a turbo molecular pump, or the like can be used. Further, in addition to the vacuum pump 2817, a cryotrap may be used. It is particularly preferable to use a cryopump and a cryotrap because water can be efficiently exhausted.
- the heating mechanism 2813 may be, for example, a heating mechanism that heats using a resistance heating element or the like. Alternatively, it may be a heating mechanism that heats by heat conduction or heat radiation from a medium such as a heated gas.
- RTA Rapid Thermal Annealing
- GRTA Gas Rapid Thermal Annealing
- LRTA Riv Rapid Thermal Annealing
- GRTA heat-treats using a high-temperature gas. As the gas, an inert gas is used.
- the gas supply source 2801 may be connected to the refiner via a mass flow controller.
- the gas it is preferable to use a gas having a dew point of ⁇ 80 ° C. or lower, preferably ⁇ 100 ° C. or lower.
- oxygen gas, nitrogen gas, and noble gas argon gas, etc. may be used.
- the dielectric plate 2809 for example, silicon oxide (quartz), aluminum oxide (alumina), yttrium oxide (itria), or the like may be used. Further, another protective layer may be formed on the surface of the dielectric plate 2809. As the protective layer, magnesium oxide, titanium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, silicon oxide, aluminum oxide, yttrium oxide or the like may be used. Since the dielectric plate 2809 is exposed to a particularly high-density region of the high-density plasma 2810 described later, damage can be mitigated by providing a protective layer. As a result, it is possible to suppress an increase in particles during processing.
- the high frequency generator 2803 has, for example, a function of generating microwaves of 0.3 GHz or more and 3.0 GHz or less, 0.7 GHz or more and 1.1 GHz or less, or 2.2 GHz or more and 2.8 GHz or less.
- the microwave generated by the high frequency generator 2803 is transmitted to the mode converter 2805 via the waveguide 2804.
- the microwave transmitted as the TE mode is converted into the TEM mode.
- the microwave is transmitted to the slot antenna plate 2808 via the waveguide 2807.
- the slot antenna plate 2808 is provided with a plurality of slot holes, and microwaves pass through the slot holes and the dielectric plate 2809. Then, an electric field can be generated below the dielectric plate 2809 to generate high-density plasma 2810.
- ions and radicals corresponding to the gas type supplied from the gas supply source 2801 are present. For example, there are oxygen radicals and the like.
- the substrate 2811 can modify the film and the like on the substrate 2811 by the ions and radicals generated by the high-density plasma 2810. It may be preferable to apply a bias to the substrate 2811 side by using a high frequency power supply 2816.
- a high frequency power supply 2816 for example, an RF (Radio Frequency) power supply having a frequency such as 13.56 MHz or 27.12 MHz may be used.
- the ions in the high-density plasma 2810 can be efficiently reached deep into the openings such as the film on the substrate 2811.
- oxygen radical treatment using high-density plasma 2810 can be performed by introducing oxygen from the gas supply source 2801.
- Chambers 2706a and 2706d are chambers capable of irradiating an object to be processed with electromagnetic waves, for example. It should be noted that the chamber 2706a and the chamber 2706d differ only in the type of electromagnetic wave. Since there are many common parts in other configurations, they will be explained together below.
- Chambers 2706a and 2706d have one or more lamps 2820, a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. Further, outside the chamber 2706a and the chamber 2706d, a gas supply source 2821, a valve 2822, a vacuum pump 2828, and a valve 2829 are provided.
- the gas supply source 2821 is connected to the gas introduction port 2823 via the valve 2822.
- the vacuum pump 2828 is connected to the exhaust port 2830 via a valve 2829.
- the lamp 2820 is arranged to face the substrate holder 2825.
- the board holder 2825 has a function of holding the board 2824. Further, the substrate holder 2825 has a heating mechanism 2826 inside and has a function of heating the substrate 2824.
- a light source having a function of radiating electromagnetic waves such as visible light or ultraviolet light
- a light source having a function of radiating an electromagnetic wave having a peak at a wavelength of 10 nm or more and 2500 nm or less, 500 nm or more and 2000 nm or less, or 40 nm or more and 340 nm or less may be used.
- a light source such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp may be used.
- the electromagnetic wave radiated from the lamp 2820 can be partially or completely absorbed by the substrate 2824 to modify the film or the like on the substrate 2824.
- defects can be created or reduced, or impurities can be removed. If the substrate 2824 is heated while heating, defects can be efficiently generated or reduced, or impurities can be removed.
- the substrate holder 2825 may be heated by an electromagnetic wave radiated from the lamp 2820 to heat the substrate 2824. In that case, it is not necessary to have the heating mechanism 2826 inside the substrate holder 2825.
- the vacuum pump 2828 refers to the description about the vacuum pump 2817.
- the heating mechanism 2826 refers to the description about the heating mechanism 2813.
- the gas supply source 2821 refers to the description about the gas supply source 2801.
- the microwave processing device that can be used in this embodiment is not limited to the above.
- the microwave processing apparatus 2900 shown in FIG. 33 can be used.
- the microwave processing device 2900 includes a quartz tube 2901, an exhaust port 2819, a gas supply source 2801, a valve 2802, a high frequency generator 2803, a waveguide 2804, a gas tube 2806, a vacuum pump 2817, and a valve 2818.
- the microwave processing apparatus 2900 has a substrate holder 2902 that holds a plurality of substrates 2811 (2811_1 to 2811_n, n is an integer of 2 or more) in the quartz tube 2901.
- the microwave processing apparatus 2900 may have the heating means 2903 on the outside of the quartz tube 2901.
- the microwave generated by the high frequency generator 2803 is irradiated to the substrate provided in the quartz tube 2901 via the waveguide 2804.
- the vacuum pump 2817 is connected to the exhaust port 2819 via a valve 2818, and the pressure inside the quartz tube 2901 can be adjusted.
- the gas supply source 2801 is connected to the gas pipe 2806 via a valve 2802, and a desired gas can be introduced into the quartz pipe 2901.
- the substrate 2811 in the quartz tube 2901 can be heated to a desired temperature by the heating means 2903.
- the gas supplied from the gas supply source 2801 may be heated by the heating means 2903.
- the microwave processing apparatus 2900 can simultaneously perform heat treatment and microwave treatment on the substrate 2811. Further, after heating the substrate 2811, microwave treatment can be performed. Further, the substrate 2811 can be heat-treated after being microwave-treated.
- the boards 2811_1 to 2811_n may be all semiconductor devices or processing boards forming a storage device, or some boards may be dummy boards.
- the substrate 2811_1 and the substrate 2811_n may be used as a dummy substrate, and the substrates 2811_2 to 2811_n-1 may be used as a processing substrate.
- the substrate 2811_1, the substrate 2811_2, the substrate 2811_n-1, and the substrate 2811_n may be used as a dummy substrate, and the substrates 2811_3 to the substrate 2811_n-2 may be used as a processing substrate.
- a dummy substrate it is preferable to use a dummy substrate because a plurality of treated substrates can be uniformly treated during microwave treatment or heat treatment, and variations among the treated substrates can be reduced. For example, by arranging the dummy substrate on the processing substrate closest to the high frequency generator 2803 and the waveguide 2804, it is possible to suppress the direct exposure of the processing substrate to microwaves, which is preferable.
- FIG. A shows a top view of the semiconductor device.
- FIG. B is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line of A1-A2 shown in each FIG. A.
- some elements are omitted for the sake of clarity of the figure.
- the same reference numerals are added to the structures having the same functions as the structures constituting the semiconductor devices shown in ⁇ Semiconductor device configuration example>.
- the materials described in detail in ⁇ Semiconductor device configuration example> can be used as the constituent materials of the semiconductor device.
- the semiconductor device shown in FIGS. 11A and 11B is a modification of the semiconductor device shown in FIGS. 8A to 8D.
- the semiconductor device shown in FIGS. 11A and 11B is different from the semiconductor device shown in FIGS. 8A to 8D in that the conductor 240 and the conductor 246 are provided.
- the conductor 240 functions as a plug electrically connected to one of the source and drain of the transistor 200
- the conductor 246 functions as a wiring connected to the plug.
- the conductor 240 is provided so as to embed the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285.
- the lower surface of the conductor 240 is in contact with the upper surface of the conductor 242a.
- the conductor 240 it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component.
- the conductor 240 may have a laminated structure of a first conductor having a thin film thickness provided along the side surface and the bottom surface of the opening and the second conductor on the first conductor.
- a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen is used for the first conductor arranged in the vicinity of the insulator 285 and the insulator 280.
- a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen is used for the first conductor arranged in the vicinity of the insulator 285 and the insulator 280.
- tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide and the like are preferably used.
- the conductive material having a function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or in a laminated manner.
- impurities such as water and hydrogen contained in the layer above the insulator 283 can be suppressed from being mixed into the oxide 230 through the conductor 240.
- the above-mentioned conductive material containing tungsten, copper, or aluminum as a main component may be used.
- the conductor 240 shown in FIG. 11B shows a configuration in which the first conductor and the second conductor are laminated, but the present invention is not limited to this.
- the conductor 240 may be provided as a single layer or a laminated structure having three or more layers.
- the conductor 246 may be arranged in contact with the upper surface of the conductor 240.
- the conductor 246 it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component.
- the conductor 246 may have a laminated structure, for example, titanium or titanium nitride may be laminated with the conductive material.
- the upper surface of the region that overlaps with the conductor 246 may be higher than the upper surface of the region that does not overlap with the conductor 246.
- the conductor 246 may be formed so as to be embedded in an opening provided in the insulator.
- an insulator 241 that functions as a barrier insulating film is provided between the conductor 240 and the insulator 280.
- the insulator 245 is preferably arranged in contact with the side surfaces of the openings formed in the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and the insulator 285.
- the insulator 241 preferably has the same structure as the above-mentioned insulator 245.
- the insulator 286 is provided so as to cover the conductor 246 and the insulator 285.
- the insulator 286 may be formed by using an insulating material that can be used for the insulator 285.
- This modification is a configuration in which the capacitive element 100 is formed after the conductor 240 and the conductor 246 are formed. Therefore, unlike the semiconductor devices shown in FIGS. 8A to 8D, a part of the lower surface of the insulator 130 and a part of the side surface of the insulator 245 are in contact with the insulator 286. That is, the opening in which the capacitive element 100 is embedded is deepened corresponding to the thickness of the insulator 286. As a result, the capacitance of the capacitive element 100 can be increased without increasing the occupied area of the semiconductor device.
- the semiconductor device shown in FIGS. 12A and 12B is a modification of the semiconductor device shown in FIGS. 8A to 8D.
- the semiconductor device shown in FIGS. 12A and 12B has an insulator 241a, a conductor 240a, and a conductor 246a on the conductor 242a, similarly to the semiconductor device shown in FIGS. 13A and 13B. Further, on the conductor 120, the insulator 241b, the conductor 240b and the conductor 246b are provided.
- the conductor 240b functions as a plug electrically connected to one of the terminals of the capacitive element 100, and the conductor 246b functions as a wiring connected to the plug.
- the same conductive material as the above-mentioned insulator 241 can be used.
- the conductor 240a and the conductor 240b the same conductive material as the above-mentioned conductor 240 can be used.
- the conductor 246a and the conductor 246b the same conductive material as the conductor 246 described above can be used.
- the semiconductor devices shown in FIGS. 12A and 12B have a configuration in which the conductor 240a and the conductor 240b are formed after the capacitive element 100 is formed. Therefore, the lower surfaces of the conductor 246a and the conductor 246b come into contact with the upper surface of the insulator 285 formed by covering the conductor 120.
- the semiconductor devices shown in FIGS. 12A and 12B do not have an interlayer insulating film between the insulator 283 and the insulator 130, and the lower surface of the insulator 130 is not provided.
- the upper surface of the insulator 283 is in contact with the insulator 283.
- the semiconductor device shown in FIGS. 13A and 13B is a modification of the semiconductor device shown in FIGS. 12A and 12B.
- the semiconductor device shown in FIGS. 13A and 13B is different from the semiconductor device shown in FIGS. 12A and 12B in that the insulator 283 is in contact with a part of the upper surface of the insulator 212. Therefore, the transistor 200 is arranged in the region sealed by the insulator 283 and the insulator 212. With the above configuration, it is possible to prevent hydrogen contained outside the sealed region from being mixed into the sealed region. Further, in the transistor 200 shown in FIGS.
- the configuration in which the insulator 212 and the insulator 283 are provided as a single layer is shown, but the present invention is not limited thereto.
- the insulator 212 and the insulator 283 may each be provided as a laminated structure having two or more layers.
- FIG. 34A shows a top view of the semiconductor device 500.
- the x-axis shown in FIG. 34A is parallel to the channel length direction of the transistor 200, and the y-axis is perpendicular to the x-axis.
- FIG. 34B is a cross-sectional view corresponding to the portion shown by the alternate long and short dash line of A1-A2 shown in FIG. 34A, and is also a cross-sectional view of the transistor 200 in the channel length direction.
- FIG. 34C is a cross-sectional view corresponding to the portion indicated by the alternate long and short dash line of A3-A4 shown in FIG. 34A, and is also a cross-sectional view of the opening region 400 and its vicinity.
- some elements are omitted for the purpose of clarifying the figure.
- the same reference numerals are added to the structures having the same functions as the structures constituting the semiconductor devices shown in ⁇ Semiconductor device configuration example>.
- the materials described in detail in ⁇ Semiconductor device configuration example> can be used as the constituent materials of the semiconductor device.
- the semiconductor device 500 shown in FIGS. 34A to 34C is a modification of the semiconductor device shown in FIGS. 8A to 8D.
- the semiconductor device 500 shown in FIGS. 34A to 34C is different from the semiconductor device shown in FIGS. 8A to 8D in that the opening region 400 is formed in the insulator 282 and the insulator 280. Further, it differs from the semiconductor device shown in FIGS. 8A to 8D in that the sealing portion 265 is formed so as to surround the plurality of transistors 200 and the capacitive element 100.
- the semiconductor device 500 has a plurality of transistors 200, a plurality of capacitive elements 100, and a plurality of aperture regions 400 arranged in a matrix. Further, a plurality of conductors 260 that function as gate electrodes of the transistor 200 are provided so as to extend in the y-axis direction.
- the opening region 400 is formed in a region that does not overlap with the oxide 230 and the conductor 260. Further, the sealing portion 265 is formed so as to surround the plurality of transistors 200, the plurality of capacitive elements 100, the plurality of conductors 260, and the plurality of opening regions 400.
- the number, arrangement, and size of the transistor 200, the capacitive element 100, the conductor 260, and the opening region 400 are not limited to the structure shown in FIG. 34, and may be appropriately set according to the design of the semiconductor device 500. good.
- the sealing portion 265 is provided so as to surround the plurality of transistors 200, the insulator 216, the insulator 222, the insulator 275, the insulator 280, and the insulator 282.
- the insulator 283 is provided so as to cover the insulator 216, the insulator 222, the insulator 275, the insulator 280, and the insulator 282.
- the insulator 283 is in contact with the upper surface of the insulator 214.
- an insulator 274 is provided between the insulator 283 and the insulator 285.
- the height of the upper surface of the insulator 274 is substantially the same as that of the uppermost surface of the insulator 283.
- the same insulator as the insulator 280 can be used.
- a plurality of transistors 200 can be wrapped with the insulator 283, the insulator 214, and the insulator 212.
- one or more of the insulator 283, the insulator 214, and the insulator 212 preferably functions as a barrier insulating film against hydrogen. As a result, it is possible to prevent hydrogen contained outside the region of the sealing portion 265 from being mixed into the region of the sealing portion 265.
- the insulator 282 has an opening. Further, in the opening region 400, the insulator 280 may overlap with the opening of the insulator 282 and have a groove portion. The depth of the groove portion of the insulator 280 may be set so that the upper surface of the insulator 275 is exposed at the deepest, and may be, for example, about 1/4 or more and 1/2 or less of the maximum film thickness of the insulator 280.
- the insulator 283 is in contact with the side surface of the insulator 282, the side surface of the insulator 280, and the upper surface of the insulator 280 inside the opening region 400. Further, in the opening region 400, a part of the insulator 274 may be formed so as to embed the recess formed in the insulator 283. At this time, the height of the upper surface of the insulator 274 formed in the opening region 400 and the height of the uppermost surface of the insulator 283 may be substantially the same.
- hydrogen contained in the insulator 280 can be combined with oxygen and released to the outside through the opening region 400. Hydrogen combined with oxygen is released as water. Therefore, it is possible to reduce the hydrogen contained in the insulator 280 and reduce the hydrogen contained in the insulator 280 from being mixed in the oxide 230.
- the shape of the opening region 400 in the top view is substantially rectangular, but the present invention is not limited to this.
- the shape of the opening region 400 in the top view may be a rectangle, an ellipse, a circle, a rhombus, or a combination thereof.
- the area of the opening region 400 and the arrangement interval can be appropriately set according to the design of the semiconductor device including the transistor 200. For example, in a region where the density of the transistor 200 is low, the area of the opening region 400 may be increased or the arrangement interval of the opening regions 400 may be narrowed. Further, for example, in a region where the density of the transistor 200 is high, the area of the opening region 400 may be narrowed or the arrangement interval of the opening region 400 may be widened.
- a new transistor can be provided.
- a semiconductor device having little variation in transistor characteristics Alternatively, one aspect of the present invention can provide a semiconductor device having good electrical characteristics. Alternatively, one aspect of the present invention can provide a semiconductor device with good reliability.
- a semiconductor device having low power consumption can be provided.
- a capacitive element containing a material capable of having ferroelectricity it is possible to provide a capacitive element containing a material capable of having ferroelectricity.
- the capacitive element can be provided with good productivity.
- the semiconductor device capable of miniaturization or high integration can be provided.
- FIG. 35 shows an example of a semiconductor device (storage device) according to one aspect of the present invention.
- the transistor 200 is provided above the transistor 300, and the capacitive element 100 is provided above the transistor 300 and the transistor 200.
- the transistor 200 the transistor 200 described in the previous embodiment can be used.
- the capacitive element 100 the capacitive element 100 described in the previous embodiment can be used.
- FIG. 35 shows an example in which the capacitive element 100 and the transistor 200 shown in FIG. 11 are used, the present invention is not limited to this, and the capacitive element 100 and the transistor 200 can be appropriately selected.
- the capacitive element 100 is made of a material capable of having a ferroelectricity, which has a property that polarization is generated inside by applying an electric field from the outside and the polarization remains even if the electric field is set to zero. This makes it possible to form a non-volatile storage element using the capacitive element 100. That is, a 1-transistor 1-capacitor type ferroelectric memory can be formed by using a capacitive element that functions as a ferroelectric capacitor and a transistor 200.
- the transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor.
- the transistor 200 has a characteristic of having a high withstand voltage. Therefore, by using an oxide semiconductor for the transistor 200, a high voltage can be applied to the transistor 200 even if the transistor 200 is miniaturized. By miniaturizing the transistor 200, the occupied area of the semiconductor device can be reduced.
- the wiring 1001 is electrically connected to the source of the transistor 300, and the wiring 1002 is electrically connected to the drain of the transistor 300. Further, the wiring 1003 is electrically connected to one of the source and drain of the transistor 200, the wiring 1004 is electrically connected to one of the first gates of the transistor 200, and the wiring 1005 is electrically connected to one of the electrodes of the capacitive element 100. The wiring 1006 is electrically connected to the second gate of the transistor 200, and the wiring 1007 is electrically connected to the gate of the transistor 300.
- the storage devices shown in FIG. 35 can form a memory cell array by arranging them in a matrix.
- the transistor 300 is provided on the substrate 311 and has a conductor 316 that functions as a gate, an insulator 315 that functions as a gate insulator, a semiconductor region 313 that is a part of the substrate 311 and a low that functions as a source region or a drain region. It has a resistance region 314a and a low resistance region 314b.
- the transistor 300 may be either a p-channel type or an n-channel type.
- the semiconductor region 313 (a part of the substrate 311) in which the channel is formed has a convex shape. Further, the side surface and the upper surface of the semiconductor region 313 are provided so as to be covered by the conductor 316 via the insulator 315.
- the conductor 316 may be made of a material that adjusts the work function. Since such a transistor 300 utilizes a convex portion of a semiconductor substrate, it is also called a FIN type transistor. In addition, it may have an insulator that is in contact with the upper part of the convex portion and functions as a mask for forming the convex portion. Further, although the case where a part of the semiconductor substrate is processed to form a convex portion is shown here, the SOI substrate may be processed to form a semiconductor film having a convex shape.
- the transistor 300 shown in FIG. 35 is an example, and the transistor 300 is not limited to the structure thereof, and an appropriate transistor may be used according to the circuit configuration or the driving method.
- a wiring layer provided with an interlayer film, wiring, a plug, and the like may be provided between the structures. Further, a plurality of wiring layers can be provided according to the design.
- the conductor having a function as a plug or wiring may collectively give a plurality of structures the same reference numeral. Further, in the present specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.
- an insulator 320, an insulator 322, an insulator 324, and an insulator 326 are laminated in this order on the transistor 300 as an interlayer film. Further, the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are embedded with a capacitive element 100, a conductor 328 electrically connected to the transistor 200, a conductor 330, and the like. The conductor 328 and the conductor 330 function as a plug or wiring.
- the insulator that functions as an interlayer film may function as a flattening film that covers the uneven shape below the insulator.
- the upper surface of the insulator 322 may be flattened by a flattening treatment using a chemical mechanical polishing (CMP) method or the like in order to improve the flatness.
- CMP chemical mechanical polishing
- a wiring layer may be provided on the insulator 326 and the conductor 330.
- the insulator 350, the insulator 352, and the insulator 354 are laminated and provided in this order.
- a conductor 356 is formed on the insulator 350, the insulator 352, and the insulator 354. The conductor 356 functions as a plug or wiring.
- the insulator 210, the insulator 212, the insulator 214, and the insulator 216 are embedded with a conductor 218, a conductor (conductor 205) constituting the transistor 200, and the like.
- the conductor 218 has a function as a plug or wiring for electrically connecting to the capacitive element 100 or the transistor 300.
- the insulator 217 is provided in contact with the side surface of the conductor 218 that functions as a plug.
- the insulator 217 is provided in contact with the inner wall of the opening formed in the insulator 210, the insulator 212, the insulator 214, and the insulator 216. That is, the insulator 217 is provided between the conductor 218 and the insulator 210, the insulator 212, the insulator 214, and the insulator 216. Since the conductor 205 can be formed in parallel with the conductor 218, the insulator 217 may be formed in contact with the side surface of the conductor 205.
- an insulator such as silicon nitride, aluminum oxide, or silicon nitride may be used. Since the insulator 217 is provided in contact with the insulator 210, the insulator 212, the insulator 214, and the insulator 222, impurities such as water or hydrogen from the insulator 210 or the insulator 216 or the like are oxidized through the conductor 218. It is possible to suppress mixing with the object 230. In particular, silicon nitride is suitable because it has a high blocking property against hydrogen. Further, it is possible to prevent oxygen contained in the insulator 210 or the insulator 216 from being absorbed by the conductor 218.
- the insulator 217 can be formed in the same manner as the insulator 241.
- silicon nitride may be formed into a film by using the PEALD method, and an opening reaching the conductor 356 may be formed by anisotropic etching.
- the conductor 112 is provided on the insulator 285 and the conductor 240.
- the conductor 112 has a function as a plug or wiring for electrically connecting to the transistor 200 or the transistor 300.
- An insulator 286 is provided so as to cover the insulator 285 and the conductor 112.
- An insulator 150 is provided so as to cover the insulator 286 and the capacitive element 100.
- the insulator 285 and the conductor 112 may be covered with a barrier insulating film against hydrogen.
- a barrier insulating film against hydrogen it is preferable to provide an insulator 152a that covers the insulator 285 and the conductor 112, and an insulator 152b on the insulator 152a.
- a barrier insulating film that can be used for the above-mentioned insulator 283 or the like may be used.
- the film of the insulator 152a may be formed by using a sputtering method.
- a sputtering method silicon nitride formed by a sputtering method can be used. Since the sputtering method does not require the use of molecules containing hydrogen in the film-forming gas, the hydrogen concentration of the insulator 152a can be reduced. By reducing the hydrogen concentration of the insulator 152a in contact with the conductor 112 and the insulator 285 in this way, it is possible to suppress the diffusion of hydrogen from the insulator 152a to the conductor 112 and the insulator 285.
- the insulator 152b is formed by using the ALD method, particularly the PEALD method.
- the insulator 152b silicon nitride formed by the PEALD method can be used.
- the insulator 152b can be formed into a film with good coverage. Therefore, even if pinholes or step breaks are formed in the insulator 152a due to the unevenness of the base, hydrogen can be formed by covering them with the insulator 152b. Can be reduced from diffusing into the conductor 112 and the insulator 285.
- the film forming method of the insulator 152a and the insulator 152b is not limited to the sputtering method and the ALD method, and the CVD method, the MBE method, the PLD method and the like can be appropriately used. Further, although the two-layer structure of the insulator 152a and the insulator 152b is shown above, the present invention is not limited to this, and a single-layer structure or a laminated structure of three or more layers may be used.
- the insulator 283 and the insulator 212 may also be a barrier insulating film having a laminated structure, similarly to the insulator 152a and the insulator 152b.
- the insulator 286 and the capacitive element 100 may be covered with a barrier insulating film against hydrogen.
- a barrier insulating film against hydrogen it is preferable to provide an insulator 154a that covers the insulator 286 and the capacitive element 100, and an insulator 154b on the insulator 154a.
- the insulator 154a can use the same barrier insulating film as the insulator 152a, and the insulator 154b can use the same barrier insulating film as the insulator 152b.
- Examples of the insulator that can be used as the interlayer film include oxides having insulating properties, nitrides, nitride oxides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.
- the material may be selected according to the function of the insulator.
- the insulator 150, the insulator 210, the insulator 352, the insulator 354, and the like have an insulator having a low relative permittivity.
- the insulator preferably has silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having pores, or a resin.
- the insulator may be silicon oxide, silicon oxide, silicon nitride, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, silicon oxide with carbon and nitrogen, or silicon oxide with pores.
- silicon oxide and silicon oxide nitride are thermally stable, they can be combined with a resin to form a laminated structure that is thermally stable and has a low relative permittivity.
- the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, acrylic, and the like.
- a transistor using an oxide semiconductor can stabilize the electrical characteristics of the transistor by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. Therefore, for the insulator 214, the insulator 212, the insulator 350, and the like, an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen may be used.
- Examples of the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen include boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, tantalum, and zirconium. Insulators containing, lanthanum, neodymium, hafnium or tantalum may be used in single layers or in layers.
- an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or Metal oxides such as tantalum oxide, silicon nitride oxide, silicon nitride and the like can be used.
- Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, and indium.
- a material containing one or more metal elements selected from ruthenium and the like can be used.
- a semiconductor having high electrical conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, and a silicide such as nickel silicide may be used.
- the conductor 328, the conductor 330, the conductor 356, the conductor 218, the conductor 112, and the like include a metal material, an alloy material, a metal nitride material, a metal oxide material, and the like formed of the above materials.
- a metal material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten.
- it is preferably formed of a low resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low resistance conductive material.
- the capacitive element 100 is insulated by forming the conductor 120a by a method involving substrate heating such as a thermal ALD method, so that the conductor 120a is not baked at a high temperature after formation.
- the ferroelectricity of the body 130 can be increased. Therefore, since the semiconductor device can be manufactured without baking at a high temperature, a low resistance conductive material such as copper having a low melting point can be used.
- an insulator having an excess oxygen region may be provided in the vicinity of the oxide semiconductor. In that case, it is preferable to provide an insulator having a barrier property between the insulator having the excess oxygen region and the conductor provided in the insulator having the excess oxygen region.
- an insulator 241 between the insulator 224 and the insulator 280 having excess oxygen and the conductor 240 is provided in contact with the insulator 222, the insulator 282, and the insulator 283, so that the insulator 224 and the transistor 200 are sealed by an insulator having a barrier property. Can be done.
- the insulator 241 it is possible to prevent the excess oxygen contained in the insulator 224 and the insulator 280 from being absorbed by the conductor 240. Further, by having the insulator 241, it is possible to suppress the diffusion of hydrogen, which is an impurity, to the transistor 200 via the conductor 240.
- an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen it is preferable to use silicon nitride, silicon nitride oxide, aluminum oxide, hafnium oxide and the like.
- silicon nitride is preferable because it has a high blocking property against hydrogen.
- metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, and tantalum oxide can be used.
- the transistor 200 may be configured to be sealed with an insulator 212, an insulator 214, an insulator 282, and an insulator 283. With such a configuration, it is possible to reduce the mixing of hydrogen contained in the insulator 274, the insulator 285, the insulator 150 and the like into the insulator 280 and the like.
- the conductor 240 penetrates the insulator 283 and the insulator 282, and the conductor 218 penetrates the insulator 214 and the insulator 212.
- the insulator 241 is in contact with the conductor 240.
- the insulator 217 is provided in contact with the conductor 218.
- the transistor 200 is sealed with the insulator 212, the insulator 214, the insulator 282, the insulator 283, the insulator 241 and the insulator 217, and impurities such as hydrogen contained in the insulator 274 and the like are outside. It is possible to reduce contamination from.
- one transistor 200 is shown in the region sealed with the insulator 212 and the insulator 283, but the present invention is not limited to this, and the sealed region is not limited to this.
- a plurality of transistors 200 can be provided.
- a dicing line (sometimes referred to as a scribe line, a division line, or a cutting line) provided when a plurality of semiconductor devices are taken out in the form of chips by dividing a large-area substrate into semiconductor elements will be described. ..
- a dividing method for example, there is a case where a groove (dicing line) for dividing a semiconductor element is first formed on a substrate, then the dicing line is cut, and the semiconductor device is divided (divided) into a plurality of semiconductor devices.
- the region where the insulator 283 and the insulator 214 are in contact overlap with the dicing line it is preferable to design so that the region where the insulator 283 and the insulator 214 are in contact overlap with the dicing line. That is, openings are provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216 in the vicinity of the region serving as the dicing line provided on the outer edge of the memory cell having the plurality of transistors 200.
- the insulator 214 and the insulator 283 come into contact with each other at the openings provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, and the insulator 216.
- openings may be provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, the insulator 216, and the insulator 214.
- the insulator 212 and the insulator 283 come into contact with each other at the openings provided in the insulator 282, the insulator 280, the insulator 275, the insulator 222, the insulator 216, and the insulator 214. ..
- the insulator 212 and the insulator 283 may be formed by using the same material and the same method. By providing the insulator 212 and the insulator 283 with the same material and the same method, the adhesion can be enhanced. For example, it is preferable to use silicon nitride.
- the transistor 200 can be wrapped by the insulator 212, the insulator 214, the insulator 282, and the insulator 283. Since at least one of the insulator 212, the insulator 214, the insulator 282, and the insulator 283 has a function of suppressing the diffusion of oxygen, hydrogen, and water, the semiconductor element shown in the present embodiment is formed. By dividing the substrate for each circuit region, even if it is processed into a plurality of chips, impurities such as hydrogen or water are prevented from being mixed in from the side surface direction of the divided substrate and diffused to the transistor 200. Can be done.
- the structure can prevent the excess oxygen of the insulator 280 and the insulator 224 from diffusing to the outside. Therefore, the excess oxygen of the insulator 280 and the insulator 224 is efficiently supplied to the oxide in which the channel is formed in the transistor 200.
- the oxygen can reduce the oxygen deficiency of the oxide in which the channel is formed in the transistor 200.
- the oxide in which the channel is formed in the transistor 200 can be made into an oxide semiconductor having a low defect level density and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability.
- the capacitive element 100 is formed so as to be embedded in the insulator 285, the insulator 280, or the like, but the present invention is not limited thereto.
- the planar type capacitive element 100 may be provided on the insulator 285.
- the capacitive element 100 has a conductor 110, an insulator 130 that covers the conductor 110, and a conductor 120 (conductor 120a and conductor 120b) that covers the insulator 130.
- the insulator 130 covers the upper surface and the side surface of the conductor 110 to separate the conductor 110 from the conductor 120.
- the conductor 110, the insulator 130, and the conductor 120 [constituent example of the storage device] and the description of the previous embodiment can be referred to.
- the conductor 110 is formed in the same layer as the conductor 112 and is in contact with the upper surface of the conductor 240.
- the conductor 110 is electrically connected to one of the source and drain of the transistor 200 via the conductor 240.
- the insulator 155 is provided so as to cover the conductor 120, the insulator 130, and the conductor 112.
- the insulator 155 it is preferable to use an insulator having a function of capturing and fixing hydrogen, which can be used for the insulator 214, the insulator 282, or the like.
- aluminum oxide or the like it is preferable to use aluminum oxide or the like.
- the insulator 152a and the insulator 152b which function as a barrier insulating film against hydrogen, on the conductor 112 and the conductor 120.
- the insulator 152a and the insulator 152b are provided on the insulator 155.
- an insulator 287 that functions as a barrier insulating film against hydrogen on the insulator 285.
- a conductor 112, a conductor 110, and an insulator 155 are provided in contact with the insulator 287.
- the insulator 287 the same barrier insulating film as the insulator 283 can be used.
- the insulator 155 and the insulator 287 are in contact with each other in a region that does not overlap with the capacitive element 100. That is, the capacitive element 100 is sealed by the insulator 155, the insulator 152a, the insulator 152b, and the insulator 287.
- the insulator 155 is not used, the insulator 287 and the insulator 152a are in contact with each other in a region that does not overlap with the capacitance element 100, and the insulator 152a, the insulator 152b, and the insulator 287 make the capacitance element 100. Is sealed.
- the ferroelectricity of the insulator 130 can be enhanced.
- the transistor 200 is also sealed with an insulator 283, an insulator 214, and an insulator 212, which function as a barrier insulating film against hydrogen.
- an insulator 283, an insulator 214, and an insulator 212 which function as a barrier insulating film against hydrogen.
- the transistor 200 and the capacitive element 100 are individually sealed by a barrier insulating film against hydrogen, but the present invention is not limited to this.
- the transistor 200 and the capacitive element 100 may be collectively sealed with a barrier insulating film (insulator 212, insulator 152a, and insulator 152b) against hydrogen.
- the insulator 214, the insulator 216, the insulator 222, the insulator 275, the insulator 280, the insulator 282, the insulator 283, the insulator 285, and the insulator 155 reach the insulator 212.
- An opening is formed.
- the insulator 152a and the insulator 152b on the insulator 155 are formed along the side surface and the bottom surface of the opening.
- the insulator 152a is in contact with the upper surface of the insulator 212 at the bottom surface of the opening.
- the transistor 200 and the capacitive element 100 can be collectively sealed by the insulator 212, the insulator 152a, and the insulator 152b.
- hydrogen is suppressed from diffusing from the outside of the insulator 212 and the insulator 152b to the capacitive element 100 and the transistor 200, and the hydrogen concentration of the insulator 130 of the capacitive element 100 and the oxide semiconductor film of the transistor 200 is increased.
- the capacitive element 100 is provided on the transistor 200, but the present invention is not limited to this. As shown in FIG. 38, the capacitive element 100 may be provided on the same layer as the transistor 200.
- the conductor 110 that functions as the lower electrode of the capacitive element 100 is preferably formed of a conductor having the same layer as the conductor that functions as the back gate of the transistor 200.
- the insulator 130 is arranged on the conductor 110, and the conductor 120 (conductor 120a and conductor 120b) is arranged on the insulator 130.
- the insulator 130 covers the upper surface of the conductor 110 and separates the conductor 110 from the conductor 120.
- the insulator 130 and the conductor 120 may have the same configuration as that shown in FIG. 36 and the like, and for details, the description of [configuration example of the storage device] and the previous embodiment may be taken into consideration. can.
- the insulator 222 is arranged so as to cover the insulator 130 and the conductor 120.
- the conductor 240 is provided in contact with the upper surface of the conductor 120b, and the conductor 112 is provided in contact with the upper surface of the conductor 240.
- the conductor 112 is in contact with a conductor 240 electrically connected to one of the source and drain of the transistor 200. That is, the conductor 120 that functions as the upper electrode of the capacitive element 100 shown in FIG. 38 is electrically connected to one of the source and drain of the transistor 200. Further, the conductor 110 that functions as the lower electrode of the capacitive element 100 is electrically connected to the wiring 1005.
- the transistor 200 and the capacitive element 100 can be collectively sealed by the insulator 212, the insulator 152a, and the insulator 152b.
- hydrogen is suppressed from diffusing from the outside of the insulator 212 and the insulator 152b to the capacitive element 100 and the transistor 200, and the hydrogen concentration of the insulator 130 of the capacitive element 100 and the oxide semiconductor film of the transistor 200 is increased.
- the storage device shown in FIG. 36 and the like has a configuration in which the transistor 200 is provided on the transistor 300 and the capacitive element 100 is connected to the transistor 200, but the present invention is not limited to this. As shown in FIG. 39A, the capacitive element 100 may be connected to the transistor 300 without providing the transistor 200.
- the insulator 320, the insulator 322, and the insulator 287 are formed with an opening reaching the low resistance region 314a of the transistor 300, and the conductor 357 is formed so as to embed the opening. ..
- the same conductor as the conductor 328 can be used.
- the upper surface of the conductor 357 is in contact with the lower surface of the conductor 110 of the capacitive element 100. In this way, the conductor 110 that functions as the lower electrode of the capacitive element 100 and the low resistance region 314a that functions as one of the source and drain of the transistor 300 are connected via the conductor 357.
- the configurations of the transistor 300, the capacitive element 100, and the layer including them are the same as those shown in FIG. 36, and the description related to the configuration shown in FIG. 36 can be taken into consideration.
- the capacitive element 100 can be sealed with the insulator 287, the insulator 152a, and the insulator 152b, similarly to the storage device shown in FIG. 36.
- the capacitive element 100 it is possible to suppress the diffusion of hydrogen from the outside of the insulator 287 and the insulator 152b to the capacitive element 100, and reduce the hydrogen concentration of the oxide semiconductor film of the insulator 130 of the capacitive element 100. Therefore, the ferroelectricity of the insulator 130 can be enhanced.
- the low resistance region 314a of the transistor 300 and the conductor 110 of the capacitive element 100 are directly connected by the conductor 357, but the present invention is not limited to this.
- a plurality of wiring layers shown in FIG. 36 and the like may be provided between the capacitive element 100 and the transistor 300.
- the conductor 328 is formed on the transistor 300
- the conductor 330 is formed on the conductor 328
- the conductor 356 is formed on the conductor 330
- the conductor 356 is formed.
- a conductor 357 may be formed on the conductor.
- the low resistance region 314a of the transistor 300 and the conductor 110 of the capacitive element 100 are electrically connected by the conductor 328, the conductor 330, the conductor 356, and the conductor 357.
- the description of [Structure example of storage device] can be referred to.
- FIG. 36 and the like the configuration in which the transistor 200 is connected to the capacitive element 100 including a material capable of having ferroelectricity is shown, but the present invention is not limited thereto.
- a material capable of having ferroelectricity may be used as the transistor 200 and the insulator provided around the transistor 200.
- a transistor having such a configuration will be described with reference to FIGS. 40A to 40C.
- the transistor 200 shown in FIGS. 40A to 40C is a transistor 200 shown in FIG. 8, in which the conductor 240a, the conductor 240b, the conductor 246a, the conductor 246b, the insulator 241a, and the insulator are used instead of the capacitive element 100. 241b is provided.
- the transistor 200 shown in FIG. 40A uses an insulator 130a instead of the insulator 222.
- As the insulator 130a a material that can have the same ferroelectricity as that of the insulator 130 can be used. That is, the transistor 200 shown in FIG. 40A uses a material capable of having ferroelectricity for the second gate insulator.
- the transistor 200 shown in FIG. 40B uses an insulator 130b instead of the insulator 252, the insulator 250, and the insulator 254.
- As the insulator 130b a material that can have the same ferroelectricity as that of the insulator 130 can be used. That is, the transistor 200 shown in FIG. 40B uses a material capable of having ferroelectricity for the first gate insulator.
- all the first gate insulators are made of ferroelectric materials, but the present invention is not limited to this.
- one or more of the insulator 252, the insulator 250a, the insulator 250b, and the insulator 254 shown in FIG. 9B may be configured by using a material capable of having ferroelectricity.
- the insulator 130c is provided on the conductor 260, and the conductor 262 is provided on the insulator 130c.
- the insulator 130c a material that can have the same ferroelectricity as that of the insulator 130 can be used.
- the conductor 262 a conductive material that can be used for the conductor 260 can be used.
- An insulator 282 is provided so as to cover the insulator 130c and the conductor 262. In the semiconductor device shown in FIG. 40C, it can be considered that one terminal of the ferroelectric capacitor is provided on the gate electrode of the transistor 200.
- a transistor using an oxide as a semiconductor hereinafter, may be referred to as an OS transistor
- a ferroelectric capacitor according to one aspect of the present invention
- the applied storage device will be described.
- the device according to the present embodiment is a storage device having at least a capacitive element and an OS transistor for controlling charge / discharge of the capacitive element.
- the apparatus according to this embodiment functions as a 1-transistor 1-capacitor type ferroelectric memory using a ferroelectric capacitor.
- FIG. 41A shows an example of the configuration of the storage device.
- the storage device 1400 has a peripheral circuit 1411 and a memory cell array 1470.
- the peripheral circuit 1411 includes a row circuit 1420, a column circuit 1430, an output circuit 1440, and a control logic circuit 1460.
- the column circuit 1430 includes, for example, a column decoder, a bit line driver circuit, a precharge circuit, a sense amplifier, a write circuit, and the like.
- the precharge circuit has a function of precharging the wiring.
- the sense amplifier has a function of amplifying a data signal read from a memory cell.
- the wiring is the wiring connected to the memory cell of the memory cell array 1470, and will be described in detail later.
- the amplified data signal is output to the outside of the storage device 1400 as a data signal RDATA via the output circuit 1440.
- the row circuit 1420 has, for example, a row decoder, a word line driver circuit, and the like, and the row to be accessed can be selected.
- the storage device 1400 is supplied with a low power supply voltage (VSS) as a power supply voltage, a high power supply voltage (SiO) for the peripheral circuit 1411, and a high power supply voltage (VIL) for the memory cell array 1470 from the outside. Further, a control signal (CE, WE, RE), an address signal ADDR, and a data signal WDATA are input to the storage device 1400 from the outside.
- the address signal ADDR is input to the row decoder and column decoder, and the data signal WDATA is input to the write circuit.
- the control logic circuit 1460 processes the control signals (CE, WE, RE) input from the outside to generate the control signals of the row decoder and the column decoder.
- the control signal CE is a chip enable signal
- the control signal WE is a write enable signal
- the control signal RE is a read enable signal.
- the signal processed by the control logic circuit 1460 is not limited to this, and other control signals may be input as needed.
- the memory cell array 1470 has a plurality of memory cells MC arranged in a matrix and a plurality of wirings.
- the number of wires connecting the memory cell array 1470 and the row circuit 1420 is determined by the configuration of the memory cell MC, the number of memory cell MCs in one column, and the like. Further, the number of wirings connecting the memory cell array 1470 and the column circuit 1430 is determined by the configuration of the memory cell MC, the number of memory cell MCs in one row, and the like.
- FIG. 41A shows an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane
- the present embodiment is not limited to this.
- the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411.
- a sense amplifier may be provided so as to overlap under the memory cell array 1470.
- the configurations of the peripheral circuit 1411, the memory cell array 1470, and the like shown in the present embodiment are not limited to the above.
- the arrangement or function of these circuits and the wiring, circuit elements, etc. connected to the circuits may be changed, deleted, or added as necessary.
- the storage device of one aspect of the present invention has a high operating speed and can retain data for a long period of time.
- the circuit diagram shown in FIG. 42A shows a configuration example of the above-mentioned memory cell MC.
- the memory cell MC has a transistor Tr and a capacitance Fe.
- the semiconductor device having the transistor 200 and the capacitive element 100 shown in the previous embodiment can be used.
- the transistor Tr corresponds to the transistor 200
- the capacitance Fe corresponds to the capacitance element 100.
- the transistor Tr may or may not have a back gate in addition to the gate.
- the transistor Tr is an n-channel type transistor, but a p-channel type transistor may be used.
- One of the source and drain of the transistor Tr is electrically connected to the wiring BL.
- the other of the source or drain of the transistor Tr is electrically connected to one electrode of the capacitance Fe.
- the gate of the transistor Tr is electrically connected to the wiring WL.
- the other electrode of the capacitance Fe is electrically connected to the wiring PL.
- the wiring WL has a function as a word line, and the on / off of the transistor Tr can be controlled by controlling the potential of the wiring WL. For example, by setting the potential of the wiring WL to a high potential, the transistor Tr can be turned on, and by setting the potential of the wiring WL to a low potential, the transistor Tr can be turned off.
- the wiring WL is electrically connected to the word line driver circuit included in the row circuit 1420, and the potential of the wiring WL can be controlled by the word line driver circuit.
- the wiring BL has a function as a bit line, and when the transistor Tr is in the ON state, a potential corresponding to the potential of the wiring BL is supplied to one electrode of the capacitance Fe.
- the wiring BL is electrically connected to the bit line driver circuit of the column circuit 1430.
- the bit line driver circuit has a function of generating data to be written to the memory cell MC. Further, the bit line driver circuit has a function of reading the data output from the memory cell MC. Specifically, the bit line driver circuit is provided with a sense amplifier, and the data output from the memory cell MC can be read out by using the sense amplifier.
- the wiring PL has a function as a plate wire, and the potential of the wiring PL can be the potential of the other electrode of the capacitance Fe.
- the OS transistor has a characteristic of having a high withstand voltage. Therefore, by using the transistor Tr as an OS transistor, a high voltage can be applied to the transistor Tr even if the transistor Tr is miniaturized. By miniaturizing the transistor Tr, the occupied area of the memory cell MC can be reduced. For example, the occupied area per memory cell MC shown in FIG. 42A can be 1/3 to 1/6 of the occupied area per SRAM cell. Therefore, the memory cells MC can be arranged at a high density. Thereby, the storage device according to one aspect of the present invention can be a storage device having a large storage capacity.
- the capacitive Fe has a material that can have ferroelectricity as a dielectric layer between the two electrodes.
- the dielectric layer having the capacitance Fe is referred to as a ferroelectric layer.
- a material that can have ferroelectricity a material that can be used for the above-mentioned insulator 130 may be used.
- a material capable of having ferroelectricity hafnium oxide, or a material having hafnium oxide and zirconium oxide is preferable because it can have ferroelectricity even when processed into a thin film of several nm.
- the ferroelectric layer has a hysteresis characteristic.
- FIG. 42B is a graph showing an example of the hysteresis characteristic.
- the horizontal axis represents the voltage applied to the ferroelectric layer.
- the voltage can be, for example, the difference between the potential of one electrode of the capacitance Fe and the potential of the other electrode of the capacitance Fe.
- the vertical axis indicates the amount of polarization of the ferroelectric layer, and when the value is positive, the positive charge is biased to one electrode side of the capacitance Fe, and the negative charge is biased to the other electrode side of the capacitance Fe. Show that it is.
- the amount of polarization is a negative value, it indicates that the positive charge is biased toward the other electrode side of the capacitance Fe and the negative charge is biased toward one electrode side of the capacitance Fe.
- the voltage shown on the horizontal axis of the graph of FIG. 42B may be the difference between the potential of the other electrode of the capacitance Fe and the potential of one electrode of the capacitance Fe. Further, the amount of polarization shown on the vertical axis of the graph of FIG. 42B is set to a positive value when the positive charge is biased toward the other electrode side of the capacitance Fe and the negative charge is biased toward one electrode side of the capacitance Fe. When the charge is biased to one electrode side of the capacitance Fe and the negative charge is biased to the other electrode side of the capacitance Fe, it may be a negative value.
- the hysteresis characteristic of the ferroelectric layer can be represented by the curve 51 and the curve 52.
- VSP and ⁇ VSP can be said to be saturated polarization voltages.
- VSP may be referred to as a first saturated polarization voltage
- ⁇ VSP may be referred to as a second saturation polarization voltage.
- the absolute value of the first saturated polarization voltage and the absolute value of the second saturated polarization voltage are equal to each other, but they may be different.
- the voltage applied to the ferroelectric layer when the polarization amount of the ferroelectric layer changes according to the curve 51 and the polarization amount of the ferroelectric layer is 0 is defined as Vc.
- the voltage applied to the ferroelectric layer when the polarization amount of the ferroelectric layer changes according to the curve 52 and the polarization amount of the ferroelectric layer is 0 is defined as ⁇ Vc.
- Vc and -Vc can be said to be withstand voltage. It can be said that the value of Vc and the value of -Vc are values between -VSP and VSP.
- Vc may be referred to as a first coercive voltage
- ⁇ Vc may be referred to as a second coercive voltage.
- the absolute value of the first coercive voltage and the absolute value of the second coercive voltage are assumed to be equal, but may be different.
- the voltage applied to the ferroelectric layer of the capacitance Fe can be expressed by the difference between the potential of one electrode of the capacitance Fe and the potential of the other electrode of the capacitance Fe. Further, as described above, the other electrode of the capacitance Fe is electrically connected to the wiring PL. Therefore, by controlling the potential of the wiring PL, it is possible to control the voltage applied to the ferroelectric layer having the capacitance Fe.
- the voltage applied to the ferroelectric layer of the capacitance Fe indicates the difference between the potential of one electrode of the capacitance Fe and the potential of the other electrode (wiring PL) of the capacitance Fe. do.
- the transistor Tr is an n-channel type transistor.
- FIG. 42C is a timing chart showing an example of the driving method of the memory cell MC shown in FIG. 42A.
- FIG. 42C shows an example of writing and reading binary digital data to the memory cell MC.
- the data “1” is written to the memory cell MC at time T01 to time T02, read and rewritten at time T03 to time T05, read out at time T11 to time T13, and the memory cell.
- An example of writing data "0" to the MC, reading and rewriting at time T14 to time T16, reading from time T17 to time T19, and writing data "1" to the memory cell MC is shown. ing.
- Vref is supplied as a reference potential to the sense amplifier electrically connected to the wiring BL.
- Vref is supplied as a reference potential to the sense amplifier electrically connected to the wiring BL.
- the potential of the wiring BL is higher than Vref, it is assumed that the data “1” is read by the bit line driver circuit.
- the potential of the wiring BL is lower than Vref, it is assumed that the data "0" is read by the bit line driver circuit.
- the potential of the wiring WL is set to a high potential.
- the transistor Tr is turned on.
- the potential of the wiring BL is Vw.
- the potential of one electrode of the capacitance Fe is Vw.
- the potential of the wiring PL is set to GND. From the above, the voltage applied to the ferroelectric layer of the capacitance Fe becomes "Vw-GND". As a result, the data "1" can be written to the memory cell MC. Therefore, it can be said that the time T01 to the time T02 is a period during which the writing operation is performed.
- Vw is preferably VSP or higher, and is preferably equal to, for example, VSP.
- the GND can be set to, for example, a ground potential, but it does not necessarily have to be a ground potential as long as the memory cell MC can be driven so as to satisfy the gist of one aspect of the present invention.
- GND can be a potential other than ground.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the voltage applied to the ferroelectric layer of the capacitance Fe is 0V
- the voltage "Vw-GND" applied to the ferroelectric layer of the capacitance Fe at time T01 to time T02 is VSP or higher. Therefore, at time T02 to time T03, the amount of polarization of the ferroelectric layer of the capacitive Fe changes according to the curve 52 shown in FIG. 42B. From the above, at time T02 to time T03, the polarization inversion does not occur in the ferroelectric layer having the capacitance Fe.
- the potential of the wiring WL is set to a high potential.
- the transistor Tr is turned on.
- the potential of the wiring PL is Vw.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes “GND-Vw”.
- the voltage applied to the ferroelectric layer of the capacitance Fe at time T01 to time T02 is “Vw-GND”. Therefore, the polarization inversion occurs in the ferroelectric layer having the capacitance Fe.
- a current flows through the wiring BL, and the potential of the wiring BL becomes higher than Vref.
- the bit line driver circuit can read the data "1" held in the memory cell MC. Therefore, it can be said that the time T03 to the time T04 is a period during which the read operation is performed.
- Vref is higher than GND and lower than Vw, it may be higher than Vw, for example.
- the time T04 to the time T05 is a period during which the rewrite operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the potential of the wiring WL is set to a low potential. As a result, the rewrite operation is completed, and the data "1" is held in the memory cell MC.
- the potential of the wiring WL is set to a high potential, and the potential of the wiring PL is set to Vw. Since the data "1" is held in the memory cell MC, the potential of the wiring BL becomes higher than Vref, and the data "1" held in the memory cell MC is read out. Therefore, it can be said that the time T11 to the time T12 is a period during which the read operation is performed.
- the potential of the wiring BL is set to GND. Since the transistor Tr is in the ON state, the potential of one electrode of the capacitance Fe is GND. Further, the potential of the wiring PL is Vw. From the above, the voltage applied to the ferroelectric layer of the capacitance Fe is "GND-Vw". As a result, the data "0" can be written to the memory cell MC. Therefore, it can be said that the time T12 to the time T13 is a period during which the writing operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes 0V. Since the voltage "GND-Vw" applied to the ferroelectric layer of the capacitance Fe at time T12 to T13 can be -VSP or less, the polarization of the ferroelectric layer of the capacitance Fe from time T13 to time T14. The amount varies according to the curve 51 shown in FIG. 42B. From the above, at time T13 to time T14, the polarization inversion does not occur in the ferroelectric layer having the capacitance Fe.
- the potentials of the wiring BL and the wiring PL are such that the polarization inversion does not occur in the ferroelectric layer of the capacitance Fe, that is, the voltage applied to the ferroelectric layer of the capacitance Fe is Vc or less, which is the first coercive voltage. If so, it can be any potential.
- the potential of the wiring WL is set to a high potential.
- the transistor Tr is turned on.
- the potential of the wiring PL is Vw.
- the voltage applied to the ferroelectric layer of the capacitance Fe becomes “GND-Vw”.
- the voltage applied to the ferroelectric layer of the capacitance Fe at time T12 to time T13 is “GND-Vw”. Therefore, the polarization inversion does not occur in the ferroelectric layer having the capacitance Fe. Therefore, the amount of current flowing through the wiring BL is smaller than the case where the polarization inversion occurs in the ferroelectric layer having the capacitance Fe.
- the increase width of the potential of the wiring BL becomes smaller than that in the case where the polarization inversion occurs in the ferroelectric layer of the capacitance Fe, and specifically, the potential of the wiring BL becomes Vref or less. Therefore, the bit line driver circuit can read the data “0” held in the memory cell MC. Therefore, it can be said that the time T14 to the time T15 is a period during which the read operation is performed.
- the potential of the wiring BL is GND, and the potential of the wiring PL is Vw.
- the data "0" is rewritten to the memory cell MC. Therefore, it can be said that the time T15 to the time T16 is a period during which the rewrite operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the potential of the wiring WL is set to a low potential. As a result, the rewrite operation is completed, and the data "0" is held in the memory cell MC.
- the potential of the wiring WL is set to a high potential, and the potential of the wiring PL is set to Vw. Since the data "0" is held in the memory cell MC, the potential of the wiring BL becomes lower than Vref, and the data "0" held in the memory cell MC is read out. Therefore, it can be said that the time T17 to the time T18 is a period during which the read operation is performed.
- the potential of the wiring BL is Vw. Since the transistor Tr is in the ON state, the potential of one electrode of the capacitance Fe is Vw. Further, the potential of the wiring PL is GND. From the above, the voltage applied to the ferroelectric layer of the capacitance Fe becomes "Vw-GND". As a result, the data "1" can be written to the memory cell MC. Therefore, it can be said that the time T18 to the time T19 is a period during which the writing operation is performed.
- the potential of the wiring BL and the potential of the wiring PL are set to GND.
- the potential of the wiring WL is set to a low potential. As a result, the writing operation is completed, and the data "1" is held in the memory cell MC.
- the semiconductor device shown in the above embodiment is, for example, a storage device for various electronic devices (for example, an information terminal, a computer, a smartphone, an electronic book terminal, a digital camera (including a video camera), a recording / playback device, a navigation system, etc.).
- the computer includes a tablet computer, a notebook computer, a desktop computer, and a large computer such as a server system.
- the semiconductor device shown in the above embodiment is applied to various removable storage devices such as a memory card (for example, an SD card), a USB memory, and an SSD (solid state drive).
- 43A to 43E schematically show some configuration examples of the removable storage device.
- the semiconductor device shown in the above embodiment is processed into a packaged memory chip and used for various storage devices and removable memories.
- FIG. 43A is a schematic diagram of the USB memory.
- the USB memory 1100 has a housing 1101, a cap 1102, a USB connector 1103, and a board 1104.
- the board 1104 is housed in the housing 1101.
- a memory chip 1105 and a controller chip 1106 are attached to the substrate 1104.
- the semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1105 or the like. As a result, the storage capacity of the USB memory 1100 can be further increased.
- FIG. 43B is a schematic diagram of the appearance of the SD card
- FIG. 43C is a schematic diagram of the internal structure of the SD card.
- the SD card 1110 has a housing 1111, a connector 1112, and a substrate 1113.
- the board 1113 is housed in the housing 1111.
- a memory chip 1114 and a controller chip 1115 are attached to the substrate 1113.
- a wireless chip having a wireless communication function may be provided on the substrate 1113.
- the data of the memory chip 1114 can be read and written by wireless communication between the host device and the SD card 1110.
- the semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1114 or the like. As a result, the storage capacity of the SD card 1110 can be further increased.
- FIG. 43D is a schematic diagram of the appearance of the SSD
- FIG. 43E is a schematic diagram of the internal structure of the SSD.
- the SSD 1150 has a housing 1151, a connector 1152 and a substrate 1153.
- the substrate 1153 is housed in the housing 1151.
- a memory chip 1154, a memory chip 1155, and a controller chip 1156 are attached to the substrate 1153.
- the memory chip 1155 is a work memory of the controller chip 1156, and for example, a DOSRAM chip may be used.
- the capacity of the SSD 1150 can be increased.
- the semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1154 or the like. As a result, the storage capacity of the SSD 1150 can be further increased.
- the semiconductor device according to one aspect of the present invention can be used for a processor such as a CPU or GPU, or a chip.
- a processor such as a CPU or GPU, or a chip
- these can be miniaturized and the storage capacity can be further increased.
- 44A to 44H show specific examples of electronic devices including a processor such as a CPU, GPU, or a chip according to one aspect of the present invention.
- the GPU or chip according to one aspect of the present invention can be mounted on various electronic devices.
- electronic devices include relatively large screens such as television devices, monitors for desktop or notebook information terminals, digital signage (electronic signage), large game machines such as pachinko machines, and the like.
- digital signage electronic signage
- large game machines such as pachinko machines, and the like.
- digital cameras, digital video cameras, digital photo frames, electronic book readers, mobile phones, portable game machines, personal digital assistants, sound reproduction devices, and the like can be mentioned.
- artificial intelligence can be mounted on the electronic device.
- the electronic device of one aspect of the present invention may have an antenna.
- the display unit can display images, information, and the like.
- the antenna may be used for non-contact power transmission.
- the electronic device of one aspect of the present invention includes sensors (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, It may have the ability to measure voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays).
- the electronic device of one aspect of the present invention can have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar, a function to display a date or time, a function to execute various software (programs), wireless communication. It can have a function, a function of reading a program or data recorded on a recording medium, and the like. 44A to 44H show examples of electronic devices.
- FIG. 44A illustrates a mobile phone (smartphone) which is a kind of information terminal.
- the information terminal 5100 has a housing 5101 and a display unit 5102, and a touch panel is provided in the display unit 5102 and a button is provided in the housing 5101 as an input interface.
- the information terminal 5100 can execute an application using artificial intelligence by applying the chip of one aspect of the present invention.
- Examples of the application using artificial intelligence include an application that recognizes a conversation and displays the conversation content on the display unit 5102, and recognizes characters and figures input by the user on the touch panel provided in the display unit 5102.
- Examples include an application displayed on the display unit 5102, an application for performing biometric authentication such as a fingerprint and a voice print, and the like.
- FIG. 44B illustrates a notebook type information terminal 5200.
- the notebook type information terminal 5200 includes a main body 5201 of the information terminal, a display unit 5202, and a keyboard 5203.
- the note-type information terminal 5200 can execute an application using artificial intelligence by applying the chip of one aspect of the present invention.
- applications using artificial intelligence include design support software, text correction software, menu automatic generation software, and the like. Further, by using the notebook type information terminal 5200, it is possible to develop a new artificial intelligence.
- a smartphone and a notebook-type information terminal are taken as examples as electronic devices, and although they are shown in FIGS. 44A and 44B, respectively, information terminals other than the smartphone and the notebook-type information terminal can be applied.
- Examples of information terminals other than smartphones and notebook-type information terminals include PDAs (Personal Digital Assistants), desktop-type information terminals, workstations, and the like.
- FIG. 44C shows a portable game machine 5300, which is an example of a game machine.
- the portable game machine 5300 has a housing 5301, a housing 5302, a housing 5303, a display unit 5304, a connection unit 5305, an operation key 5306, and the like.
- the housing 5302 and the housing 5303 can be removed from the housing 5301.
- the connection unit 5305 provided in the housing 5301 to another housing (not shown)
- the video output to the display unit 5304 can be output to another video device (not shown). can.
- the housing 5302 and the housing 5303 can each function as an operation unit. This allows multiple players to play the game at the same time.
- the chips shown in the previous embodiment can be incorporated into the chips provided on the substrates of the housing 5301, the housing 5302, and the housing 5303.
- FIG. 44D shows a stationary game machine 5400, which is an example of a game machine.
- a controller 5402 is connected to the stationary game machine 5400 wirelessly or by wire.
- a low power consumption game machine By applying the GPU or chip of one aspect of the present invention to a game machine such as a portable game machine 5300 or a stationary game machine 5400, a low power consumption game machine can be realized. Further, since the heat generation from the circuit can be reduced due to the low power consumption, the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be reduced.
- the portable game machine 5300 having artificial intelligence can be realized.
- expressions such as the progress of the game, the behavior of creatures appearing in the game, and the phenomena that occur in the game are determined by the program that the game has, but by applying artificial intelligence to the handheld game machine 5300.
- Expressions that are not limited to game programs are possible. For example, it is possible to express what the player asks, the progress of the game, the time, and the behavior of the characters appearing in the game.
- the game player can be constructed by artificial intelligence in an anthropomorphic manner. Therefore, by setting the opponent as a game player by artificial intelligence, even one player can play the game. You can play the game.
- FIGS. 44C and 44D a portable game machine and a stationary game machine are illustrated as examples of the game machine, but the game machine to which the GPU or chip of one aspect of the present invention is applied is not limited to this.
- Examples of the game machine to which the GPU or chip of one aspect of the present invention is applied include an arcade game machine installed in an entertainment facility (game center, amusement park, etc.), a pitching machine for batting practice installed in a sports facility, and the like. Can be mentioned.
- the GPU or chip of one aspect of the present invention can be applied to a large computer.
- FIG. 44E is a diagram showing a supercomputer 5500, which is an example of a large computer.
- FIG. 44F is a diagram showing a rack-mounted computer 5502 included in the supercomputer 5500.
- the supercomputer 5500 has a rack 5501 and a plurality of rack mount type computers 5502.
- the plurality of computers 5502 are stored in the rack 5501. Further, the computer 5502 is provided with a plurality of substrates 5504, and the GPU or the chip described in the above embodiment can be mounted on the substrate.
- the supercomputer 5500 is a large computer mainly used for scientific and technological calculations. In scientific and technological calculations, it is necessary to process a huge amount of calculations at high speed, so power consumption is high and the heat generated by the chip is large.
- the GPU or chip of one aspect of the present invention to the supercomputer 5500, a supercomputer having low power consumption can be realized. Further, since the heat generation from the circuit can be reduced due to the low power consumption, the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be reduced.
- a supercomputer is illustrated as an example of a large computer, but the large computer to which the GPU or chip of one aspect of the present invention is applied is not limited to this.
- Examples of the large-scale computer to which the GPU or chip of one aspect of the present invention is applied include a computer (server) for providing a service, a large-scale general-purpose computer (mainframe), and the like.
- the GPU or chip of one aspect of the present invention can be applied to a moving vehicle and around the driver's seat of the vehicle.
- FIG. 44G is a diagram showing the periphery of the windshield in the interior of an automobile, which is an example of a moving body.
- the display panel 5701 attached to the dashboard, the display panel 5702, the display panel 5703, and the display panel 5704 attached to the pillar are illustrated.
- the display panel 5701 to the display panel 5703 can provide various information by displaying a speedometer, a tachometer, a mileage, a fuel gauge, a gear status, an air conditioner setting, and the like.
- the display items, layout, and the like displayed on the display panel can be appropriately changed according to the user's preference, and the design can be improved.
- the display panel 5701 to 5703 can also be used as a lighting device.
- the display panel 5704 can supplement the field of view (blind spot) blocked by the pillars by projecting an image from an image pickup device (not shown) provided in the automobile. That is, by displaying the image from the image pickup device provided on the outside of the automobile, the blind spot can be supplemented and the safety can be enhanced. In addition, by projecting an image that complements the invisible part, it is possible to confirm safety more naturally and without discomfort.
- the display panel 5704 can also be used as a lighting device.
- the GPU or chip of one aspect of the present invention can be applied as a component of artificial intelligence
- the chip can be used, for example, in an automatic driving system of an automobile.
- the chip can be used in a system for performing road guidance, danger prediction, and the like.
- the display panel 5701 to the display panel 5704 may be configured to display information such as road guidance and danger prediction.
- moving objects include trains, monorails, ships, flying objects (helicopters, unmanned aerial vehicles (drones), airplanes, rockets), etc., and the chip of one aspect of the present invention is applied to these moving objects. Therefore, it is possible to provide a system using artificial intelligence.
- FIG. 44H shows an electric freezer / refrigerator 5800 which is an example of an electric appliance.
- the electric freezer / refrigerator 5800 has a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like.
- the electric freezer / refrigerator 5800 has a function to automatically generate a menu based on the foodstuffs stored in the electric freezer / refrigerator 5800, the expiration date of the foodstuffs, etc., and the foodstuffs stored in the electric freezer / refrigerator 5800. It can have a function of automatically adjusting the temperature according to the above.
- electric refrigerators and freezers have been described as an example of electric appliances
- other electric appliances include, for example, vacuum cleaners, microwave ovens, microwave ovens, rice cookers, water heaters, IH cookers, water servers, air conditioners and air conditioners. Examples include washing machines, dryers, and audiovisual equipment.
- the electronic device described in this embodiment the function of the electronic device, the application example of artificial intelligence, its effect, etc. can be appropriately combined with the description of other electronic devices.
- hafnium zirconium oxide (HfZrO x ) is produced as an insulator exhibiting ferroelectricity, and measurement results such as voltage-polarization characteristics and fatigue characteristics of the insulator will be described.
- FIG. 45A is an optical micrograph showing the appearance of the sample 800 used for evaluation.
- FIG. 45B shows a schematic cross-sectional view of the sample 800.
- the sample 800 was formed by using single crystal silicon as the substrate 801. Specifically, a thermal oxide film having a thickness of 100 nm is formed on the substrate 801 as an insulator 802, and a conductor 803 (conductor 803a and a conductor 803b) functioning as a lower electrode is formed on the insulator 802. An insulator 804 was formed on the conductor 803, and a conductor 805 (conductor 805a and a conductor 805b) functioning as an upper electrode was formed on the insulator 804.
- the insulator 806 was formed on the conductor 803, the insulator 804, and the conductor 805. Further, a conductor 807 that is electrically connected to the conductor 803 and a conductor 808 that is electrically connected to the conductor 805 are formed on the insulator 806. The conductor 807 and the conductor 808 function as electrodes to which the measurement signal is input.
- the formation of the conductor 803, the conductor 805, the conductor 807, and the conductor 808, the formation of the contact holes provided in the insulator 806 and the insulator 804, and the like were performed using known photolithography methods and etching methods. ..
- sample 800 three samples (Sample 800A, Sample 800B, and Sample 800C) having different formation conditions of the conductor 805 functioning as the upper electrode and heat treatment conditions after the formation of the upper electrode were prepared.
- Table 1 shows the film forming conditions of the conductor 803a, the conductor 803b, the insulator 804, the conductor 805a, and the conductor 805b provided in each of the sample 800A, the sample 800B, and the sample 800C.
- silicon oxide having a thickness of 200 nm was formed as an insulator 806 by the PECVD method. Further, as the conductor 807 and the conductor 808, a three-layer laminated film of Ti having a thickness of 50 nm, Al having a thickness of 200 nm, and Ti having a thickness of 50 nm was formed by a sputtering (SP) method.
- SP sputtering
- the conductor 805a is formed by a sputtering method, and in the sample 800C, the conductor 805a is formed by a metal CVD (MCVD) method. Further, the sample 800B is heat-treated by the RTA method after the sample is prepared. Table 1 also shows the heat treatment conditions.
- an input voltage V which is a triangular wave
- the current (output current I) flowing between the electrodes is measured (FIG. 46B).
- the horizontal axis of FIGS. 46A and 46B is the elapsed time t.
- the IV characteristic showing the relationship between the input voltage V and the output current I is obtained (FIG. 46C).
- Equation 1 Equation 1
- Equation 1 A is the area where the two electrodes of the capacitive element overlap.
- FIG. 47A shows the measurement results of the PE characteristics of the sample 800A, the sample 800B, and the sample 800C.
- FIG. 47A shows the relationship between the electric field strength E applied to the insulator 804 and the polarization P for each sample.
- FIG. 47B shows the GIXD measurement result.
- FIG. 47B shows the relationship between the incident angle (2 ⁇ ) of X-rays and the detected signal intensity for each sample.
- sample 800A has a smaller amount of polarization (difference between the maximum polarization and the minimum polarization when the electric field strength E is 0 in the PE characteristics) than the sample 800B and the sample 800C, and is close to a normal dielectric.
- the ferroelectric substance has a large amount of polarization (hysteresis characteristic). Comparing the sample 800A in which the conductor 805a is formed by the sputtering method and the sample 800B, it can be seen that a large hysteresis characteristic cannot be obtained in the sample 800A which is not heat-treated after the sample is prepared. On the other hand, in the sample 800C in which the conductor 805a is formed into a film by the metal CVD method, the same amount of polarization (hysteresis characteristic) as that of the sample 800B which has been heat-treated can be obtained without heat treatment after the sample is prepared. By forming the conductor 805a into a film by the metal CVD method, the sample preparation process can be reduced.
- FIGS. 48 to 51 show the SIMS analysis results.
- the horizontal axis of FIGS. 48 to 51 shows the depth from the surface of the conductor 805b
- the vertical axis of FIG. 48 shows the hydrogen concentration in the insulator 804
- the vertical axis of FIG. 49 shows the carbon concentration in the insulator 804.
- the vertical axis of FIG. 50 shows the nitrogen concentration in the insulator 804, and the vertical axis of FIG. 51 shows the chlorine concentration in the insulator 804.
- the positions of the conductor 805b, the conductor 805a, the insulator 804, the conductor 803b, and the conductor 803a in the depth direction specified from the film thickness and the SIMS profile are added.
- the curve 811A shows the SIMS analysis result of the sample 800A
- the curve 811B shows the SIMS analysis result of the sample 800B
- the curve 811C shows the SIMS analysis result of the sample 800C.
- the hydrogen concentration of the insulator 804 was about 4 ⁇ 10 20 atoms / cm 3 for the sample 800A, about 2 ⁇ 10 20 atoms / cm 3 for the sample 800B, and about 9 ⁇ 10 19 atoms / cm 3 for the sample 800C.
- the curve 812A shows the SIMS analysis result of the sample 800A
- the curve 812B shows the SIMS analysis result of the sample 800B
- the curve 812C shows the SIMS analysis result of the sample 800C.
- the carbon concentration of the insulator 804 was about 9 ⁇ 10 18 atoms / cm 3 for the sample 800A, about 1 ⁇ 10 19 atoms / cm 3 for the sample 800B, and about 6 ⁇ 10 18 atoms / cm 3 for the sample 800C.
- curve 813A shows the SIMS analysis result of sample 800A
- curve 813B shows the SIMS analysis result of sample 800B
- curve 813C shows the SIMS analysis result of sample 800C. It is considered that the nitrogen concentration of the insulator 804 of the sample 800A, the sample 800B, and the sample 800C is about 8 ⁇ 10 20 atoms / cm 3 or less.
- curve 814A shows the SIMS analysis result of sample 800A
- curve 814B shows the SIMS analysis result of sample 800B
- curve 814C shows the SIMS analysis result of sample 800C.
- the chlorine concentration of the insulator 804 was about 1 ⁇ 10 21 atoms / cm 3 .
- the sample 800C in which the conductor 805a is formed by the metal CVD (MCVD) method is the least in terms of both the hydrogen concentration of the insulator 804 and the carbon concentration of the insulator 804.
- the nitrogen concentration of the insulator 804 may be affected by the adjacent titanium nitride (TiNx), but is about 8 ⁇ 10 20 atoms / cm 3 or less.
- TiNx adjacent titanium nitride
- FIGS. 51 and 47 it can be seen that even if chlorine is present in the insulator 804 at about 1 ⁇ 10 21 atoms / cm 3 , it does not hinder the development of ferroelectricity.
- the hydrogen concentration in the insulator 804 is preferably 5 ⁇ 10 20 atoms / cm 3 or less, and more preferably 1 ⁇ 10 20 atoms / cm 3 or less.
- the carbon concentration in the insulator 804 is preferably 5 ⁇ 10 19 atoms / cm 3 or less, and more preferably 1 ⁇ 10 19 atoms / cm 3 or less.
- the results of fatigue characteristic measurement performed on the sample 800B and the sample 800C shown in the first embodiment will be described.
- the measurement of fatigue characteristics was performed on two samples 800B (sample 800B_1, sample 800B_2) and three samples 800C (sample 800C_1, sample 800C_2, sample 800C_3).
- the sample 800B_1 and the sample 800B_2 are different elements on the same substrate manufactured under the same conditions as the sample 800B.
- Sample 800C_1, Sample 800C_2, and Sample 800C_3 are different elements on the same substrate manufactured under the same conditions as Sample 800B.
- FIG. 52A shows the measurement results of the fatigue characteristics of the sample 800B_1 and the sample 800B_2.
- FIG. 52B shows the measurement results of the fatigue characteristics of the sample 800C_1 and the sample 800C_2.
- FIG. 53B shows the measurement results of the fatigue characteristics of the sample 800C_3.
- the horizontal axis represents the number of cycles and the vertical axis represents the polarization P.
- one cycle is to apply a rectangular angular wave having a voltage amplitude of 3 V and a frequency of 100 Hz as one cycle, and the PE characteristics are measured using the triangular wave shown in Example 1 every specified number of cycles to measure the electric field.
- the minimum polarization and the maximum polarization when the intensity E was 0 were obtained.
- FIGS. 52A and 52B show the values of the minimum polarization and the maximum polarization when the electric field strength E is 0, which are acquired every specified number of cycles.
- Samples 800B_1 and 800C_1 were discontinued after 1 ⁇ 108 cycles.
- Sample 800B_2 and Sample 800C_2 continued to be measured after 1 ⁇ 108 cycles.
- Sample 800B_2 was destroyed after the end of the 2.1 ⁇ 109 cycle.
- sample 800C_2 was destroyed after the end of 4.6 ⁇ 109 cycles.
- FIG. 53A shows the initial PE characteristics (curve 821) of the sample 800C_3 and the PE characteristics (curve 822) after the end of the 1 ⁇ 10 10 cycle.
- FIG. 6 fatigue characteristics described in Non-Patent Document 2
- the capacitive element of one aspect of the present invention is a capacitive element having good fatigue resistance, which can be expected to realize fatigue characteristics of 1 ⁇ 10 15 cycles or more.
- the measurement result of the PE characteristic in which the voltage amplitude of the triangular wave is changed using the sample 800B shown in the first embodiment is shown.
- FIG. 54 shows the measurement results of the PE characteristics.
- the horizontal axis of FIG. 54 shows the voltage, and the vertical axis shows the polarization P.
- the curve 831 shows the PE characteristic when the voltage amplitude of the triangular wave is 2.0 V
- the curve 832 shows the PE characteristic when the voltage amplitude of the triangular wave is 3.0 V
- the curve 833 is shown. Shows the PE characteristics when the voltage amplitude of the triangular wave is 3.5 V
- curve 834 shows the PE characteristics when the voltage amplitude of the triangular wave is 4.0 V
- curve 835 shows the voltage amplitude of the triangular wave 4.
- the PE characteristic at 5V is shown.
- the hysteresis characteristic becomes more remarkable as the voltage amplitude of the triangular wave becomes larger, and the polarization amount (the difference between the maximum polarization and the minimum polarization when the electric field strength E is 0 in the PE characteristic) becomes large. Recognize. However, when the voltage amplitude was 4.5 V (curve 835), no hysteresis characteristic was observed. It is presumed that the sample was destroyed by setting the voltage amplitude to 4.5V. Therefore, it was found that the capacitive element of one aspect of the present invention can exhibit a hysteresis characteristic at a voltage amplitude of less than 4.5 V, preferably 4.0 V or less.
- Electron holography is a method of obtaining phase information of an electron wave that has passed through a sample by observing a hologram (electron wave interference pattern) and reproducing the hologram.
- the electron wave that has passed through the sample and the electron wave that has passed outside the sample are combined by a biprism to obtain a hologram in the observation region. Since the electron wave transmitted through the sample undergoes a phase change due to the internal potential of the sample, the position of the interference fringes shifts.
- a phase image of the observation area is created from the hologram acquired in the above observation process.
- the reproduction process may be performed by using the Fourier transform method or the phase shift reproduction method.
- the phase shift reproduction method is suitable because it can acquire a phase image with high sensitivity and high spatial resolution as compared with the Fourier transform method.
- phase image created by the above regeneration process represents a phase change, and the phase change is brought about by the internal potential of the sample. Therefore, the distribution of the carrier concentration of the sample can be evaluated from the phase image.
- FIG. 55A and 55B are a schematic top view and a schematic cross-sectional view of the sample 700 used in this embodiment.
- FIG. 55A is a schematic top view of the sample 700.
- FIG. 55B is a schematic cross-sectional view of the sample 700.
- FIG. 55B is a cross-sectional view of the portion shown by the alternate long and short dash line of A1-A2 in FIG. 55A.
- FIG. 55A In the top view of FIG. 55A, some elements are omitted for the purpose of clarifying the figure.
- the sample 700 includes a substrate 701, an insulator 702 on the substrate 701, a metal oxide 703 on the insulator 702, a plurality of conductors 704 on the metal oxide 703, and a plurality of conductors 704 on the metal oxide 703 and a plurality of. It has an insulator 705 on the conductor 704 and.
- a tantalum nitride film having a thickness of 20 nm was formed by a sputtering method.
- the tantalum nitride film was patterned (processed by an etching method) to form a line / space pattern.
- a plurality of linear tantalum nitrides were formed (see FIGS. 55A and 55B).
- the width of each of the plurality of conductors 704 (L1 shown in FIG. 55A) was 60 nm, and the distance between the conductors 704 (L2 shown in FIG. 55A) was 60 nm.
- silicon oxide having a thickness of 10 nm was formed by the CVD method.
- microwave treatment was performed.
- an argon gas of 150 sccm and an oxygen gas of 50 sccm were used as the treatment gas, the electric power was 4000 W, the pressure was 400 Pa, the temperature was 400 ° C., and the treatment time was 600 seconds.
- Electron holography analysis was performed on the sliced sample 700.
- a holography electron microscope "HF-3300EH” manufactured by Hitachi High-Technologies Corporation was used, and the acceleration voltage was set to 300 kV. Further, a phase shift reproduction method was used for the reproduction processing of the hologram.
- FIG. 56 is a phase image obtained by electron holography analysis.
- the phase image shown in FIG. 56 is created by a phase shift reproduction method using 50 holograms. In the phase image shown in FIG. 56, it is determined that the larger the phase value, the higher the carrier concentration, and the smaller the phase value, the lower the carrier concentration.
- the region 711 shown by the dotted line in FIG. 56 is a region in the metal oxide 703 that overlaps with the conductor 704 and is from the vicinity of the interface between the metal oxide 703 and the conductor 704 to a depth of about 30 nm.
- the region 712 shown by the dotted line in FIG. 56 is a region in the metal oxide 703 that does not overlap with the conductor 704 and is from the vicinity of the interface between the metal oxide 703 and the insulator 705 to a depth of about 30 nm. be.
- the carrier concentration is high in the region (region 711) overlapping with the conductor 704 of the metal oxide 703.
- the carrier concentration is low in the region (region 712) that does not overlap with the conductor 704 of the metal oxide 703. Therefore, it was suggested that the n-in junction is formed on the metal oxide 703 by performing microwave treatment on the structure in which the conductor 704 is provided on the metal oxide 703.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Semiconductor Memories (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
図2は、本発明の一態様に係る酸化ハフニウムの結晶構造を説明するモデル図である。
図3は、本発明の一態様に係る金属酸化物膜の成膜シーケンスを示す図である。
図4Aは、本発明の一態様に係る金属酸化物膜の製造装置の断面図である。図4Bは、HfZrOxの結晶構造のモデル図である。
図5Aは、非特許文献1に開示されている、強誘電体の分極を説明する図であり、図5Bは、非特許文献2に開示されている、Hfと、Zrとの組成による分極の大きさ、及び誘電率の変化を説明する図である。
図6は、非特許文献3に開示されている、強誘電体の書き換え耐性を説明する図である。
図7A乃至図7Cは、非特許文献4に開示されている、HfO2の回折強度、分極、及び結晶構造を説明する図である。
図8Aは本発明の一態様である半導体装置の上面図である。図8B乃至図8Dは本発明の一態様である半導体装置の断面図である。
図9Aおよび図9Bは本発明の一態様である半導体装置の断面図である。
図10AはIGZOの結晶構造の分類を説明する図である。図10BはCAAC−IGZO膜のXRDスペクトルを説明する図である。図10CはCAAC−IGZO膜の極微電子線回折パターンを説明する図である。
図11Aは本発明の一態様である半導体装置の上面図である。図11Bは本発明の一態様である半導体装置の断面図である。
図12Aは本発明の一態様である半導体装置の上面図である。図12Bは本発明の一態様である半導体装置の断面図である。
図13Aは本発明の一態様である半導体装置の上面図である。図13Bは本発明の一態様である半導体装置の断面図である。
図14Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図14B乃至図14Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図15Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図15B乃至図15Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図16Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図16B乃至図16Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図17Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図17B乃至図17Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図18Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図18B乃至図18Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図19Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図19B乃至図19Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図20Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図20B乃至図20Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図21Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図21B乃至図21Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図22Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図22B乃至図22Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図23Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図23B乃至図23Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図24Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図24B乃至図24Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図25Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図25B乃至図25Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図26Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図26B乃至図26Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図27Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図27B乃至図27Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図28Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図28B乃至図28Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図29Aは本発明の一態様である半導体装置の作製方法を示す上面図である。図29B乃至図29Dは本発明の一態様である半導体装置の作製方法を示す断面図である。
図30は本発明の一態様に係るマイクロ波処理装置を説明する上面図である。
図31は本発明の一態様に係るマイクロ波処理装置を説明する断面図である。
図32は本発明の一態様に係るマイクロ波処理装置を説明する断面図である。
図33は本発明の一態様に係るマイクロ波処理装置を説明する断面図である。
図34Aは本発明の一態様に係る半導体装置の平面図である。図34Bおよび図34Cは本発明の一態様である半導体装置の断面図である。
図35は本発明の一態様に係る記憶装置の構成を示す断面図である。
図36は本発明の一態様に係る記憶装置の構成を示す断面図である。
図37は本発明の一態様に係る記憶装置の構成を示す断面図である。
図38は本発明の一態様に係る記憶装置の構成を示す断面図である。
図39A、図39Bは本発明の一態様に係る記憶装置の構成を示す断面図である。
図40A乃至図40Cは本発明の一態様である半導体装置の断面図である。
図41Aは本発明の一態様に係る記憶装置の構成例を示すブロック図である。図41Bは本発明の一態様に係る記憶装置の構成例を示す斜視図である。
図42Aは、メモリセルの構成例を示す回路図である。図42Bは、強誘電体層のヒステリシス特性の一例を示すグラフである。図42Cは、メモリセルの駆動方法の一例を示すタイミングチャートである。
図43A乃至図43Eは本発明の一態様に係る記憶装置の模式図である。
図44A乃至図44Hは本発明の一態様に係る電子機器を示す図である。
図45Aは、試料の外観を示す光学式顕微鏡写真である。図45Bは、試料の断面概略図である。
図45Cは、入力電圧波形を示す図である。
図46A乃至図46Fは、三角波を用いたP−E特性の取得方法を説明する図である。
図47Aは、P−E特性の測定結果を示す図である。図47Bは、GIXD測定結果を示す図である。
図48は、SIMS分析結果を示す図である。
図49は、SIMS分析結果を示す図である。
図50は、SIMS分析結果を示す図である。
図51は、SIMS分析結果を示す図である。
図52Aおよび図52Bは、疲労特性の測定結果を示す図である。
図53Aは、P−E特性を示す図である。図53Bは、疲労特性の測定結果を示す図である。
図54は、三角波の電圧振幅毎のP−E特性を示す図である。
図55Aは試料の上面概略図である。図55Bは試料の断面概略図である。
図56は電子線ホログラフィー分析の結果を説明する図である。
本実施の形態では、図1A乃至図1Cを用いて、本発明の一態様に係る、容量素子の作製方法について説明する。
以下では、図3、および図4を用いて、ALD法による絶縁体130の成膜方法、および当該成膜に用いる成膜装置について、説明する。
本実施の形態では、図8A乃至図25Dを用いて、本発明の一態様に係るトランジスタ200および容量素子100を有する半導体装置の一例、およびその作製方法について説明する。ここで、上記半導体装置に用いる容量素子100は、実施の形態1に示す容量素子100に係る記載を参酌することができる。
図8A乃至図8Dは、トランジスタ200および容量素子100を有する半導体装置の上面図および断面図である。図8Aは、当該半導体装置の上面図である。また、図8B乃至図8Dは、当該半導体装置の断面図である。ここで、図8Bは、図8AにA1−A2の一点鎖線で示す部位の断面図であり、トランジスタ200のチャネル長方向の断面図でもある。また、図8Cは、図8AにA3−A4の一点鎖線で示す部位の断面図であり、トランジスタ200のチャネル幅方向の断面図でもある。また、図8Dは、図8AにA5−A6の一点鎖線で示す部位の断面図である。なお、図8Aの上面図では、図の明瞭化のために一部の要素を省いている。
図8A乃至図8Dに示すように、トランジスタ200は、絶縁体214上の絶縁体216と、絶縁体214および/または絶縁体216に埋め込まれるように配置された導電体205(導電体205a、および導電体205b)と、絶縁体216上、および導電体205上の絶縁体222と、絶縁体222上の絶縁体224と、絶縁体224上の酸化物230aと、酸化物230a上の酸化物230bと、酸化物230b上の導電体242aと、導電体242a上の絶縁体271aと、酸化物230b上の導電体242bと、導電体242b上の絶縁体271bと、酸化物230b上の絶縁体252と、絶縁体252上の絶縁体250と、絶縁体250上の絶縁体254と、絶縁体254上に位置し、酸化物230bの一部と重なる導電体260(導電体260a、および導電体260b)と、絶縁体222、絶縁体224、酸化物230a、酸化物230b、導電体242a、導電体242b、絶縁体271a、および絶縁体271b上に配置される絶縁体275と、を有する。ここで、図8Bおよび図8Cに示すように、絶縁体252は、絶縁体222の上面、絶縁体224の側面、酸化物230aの側面、酸化物230bの側面および上面、導電体242の側面、絶縁体271の側面、絶縁体275の側面、絶縁体280の側面、および絶縁体250の下面と接する。また、導電体260の上面は、絶縁体254の最上部、絶縁体250の最上部、絶縁体252の最上部、および絶縁体280の上面と高さが概略一致するように配置される。また、絶縁体282は、導電体260、絶縁体252、絶縁体250、絶縁体254、および絶縁体280のそれぞれの上面の少なくとも一部と接する。
容量素子100は、絶縁体271、絶縁体275、絶縁体280、絶縁体282、絶縁体283、および絶縁体285に形成された開口の中に配置され、導電体242bの上面に接する導電体110と、導電体110および絶縁体283上の絶縁体130と、絶縁体130上の導電体120と、を有する。なお、導電体120は、絶縁体130上の導電体120aと、導電体120a上の導電体120bの積層構造である。ここで、絶縁体271、絶縁体275、絶縁体280、絶縁体282、絶縁体283、および絶縁体285に形成された開口の中に導電体110、絶縁体130、および導電体120の少なくとも一部が配置される。
以下では、半導体装置に用いることができる構成材料について説明する。
トランジスタ200を形成する基板としては、例えば、絶縁体基板、半導体基板、または導電体基板を用いればよい。絶縁体基板としては、例えば、ガラス基板、石英基板、サファイア基板、安定化ジルコニア基板(イットリア安定化ジルコニア基板など)、樹脂基板などがある。また、半導体基板としては、例えば、シリコン、ゲルマニウムを材料とした半導体基板、または炭化シリコン、シリコンゲルマニウム、ヒ化ガリウム、リン化インジウム、酸化亜鉛、酸化ガリウムからなる化合物半導体基板などがある。さらには、前述の半導体基板内部に絶縁体領域を有する半導体基板、例えば、SOI(Silicon On Insulator)基板などがある。導電体基板としては、黒鉛基板、金属基板、合金基板、導電性樹脂基板などがある。または、金属の窒化物を有する基板、金属の酸化物を有する基板などがある。さらには、絶縁体基板に導電体または半導体が設けられた基板、半導体基板に導電体または絶縁体が設けられた基板、導電体基板に半導体または絶縁体が設けられた基板などがある。または、これらの基板に素子が設けられたものを用いてもよい。基板に設けられる素子としては、容量素子、抵抗素子、スイッチ素子、発光素子、記憶素子などがある。
絶縁体としては、絶縁性を有する酸化物、窒化物、酸化窒化物、窒化酸化物、金属酸化物、金属酸化窒化物、金属窒化酸化物などがある。
導電体としては、アルミニウム、クロム、銅、銀、金、白金、タンタル、ニッケル、チタン、モリブデン、タングステン、ハフニウム、バナジウム、ニオブ、マンガン、マグネシウム、ジルコニウム、ベリリウム、インジウム、ルテニウム、イリジウム、ストロンチウム、ランタンなどから選ばれた金属元素、または上述した金属元素を成分とする合金か、上述した金属元素を組み合わせた合金等を用いることが好ましい。例えば、窒化タンタル、窒化チタン、タングステン、チタンとアルミニウムを含む窒化物、タンタルとアルミニウムを含む窒化物、酸化ルテニウム、窒化ルテニウム、ストロンチウムとルテニウムを含む酸化物、ランタンとニッケルを含む酸化物などを用いることが好ましい。また、窒化タンタル、窒化チタン、チタンとアルミニウムを含む窒化物、タンタルとアルミニウムを含む窒化物、酸化ルテニウム、窒化ルテニウム、ストロンチウムとルテニウムを含む酸化物、ランタンとニッケルを含む酸化物は、酸化しにくい導電性材料、または、酸素を吸収しても導電性を維持する材料であるため、好ましい。また、リン等の不純物元素を含有させた多結晶シリコンに代表される、電気伝導度が高い半導体、ニッケルシリサイドなどのシリサイドを用いてもよい。
酸化物230として、半導体として機能する金属酸化物(酸化物半導体)を用いることが好ましい。以下では、本発明に係る酸化物230に適用可能な金属酸化物について説明する。
まず、酸化物半導体における、結晶構造の分類について、図10Aを用いて説明を行う。図10Aは、酸化物半導体、代表的にはIGZO(Inと、Gaと、Znと、を含む金属酸化物)の結晶構造の分類を説明する図である。
なお、酸化物半導体は、結晶構造に着目した場合、図10Aとは異なる分類となる場合がある。例えば、酸化物半導体は、単結晶酸化物半導体と、それ以外の非単結晶酸化物半導体と、に分けられる。非単結晶酸化物半導体としては、例えば、上述のCAAC−OS、及びnc−OSがある。また、非単結晶酸化物半導体には、多結晶酸化物半導体、擬似非晶質酸化物半導体(a−like OS:amorphous−like oxide semiconductor)、非晶質酸化物半導体、などが含まれる。
CAAC−OSは、複数の結晶領域を有し、当該複数の結晶領域はc軸が特定の方向に配向している酸化物半導体である。なお、特定の方向とは、CAAC−OS膜の厚さ方向、CAAC−OS膜の被形成面の法線方向、またはCAAC−OS膜の表面の法線方向である。また、結晶領域とは、原子配列に周期性を有する領域である。なお、原子配列を格子配列とみなすと、結晶領域とは、格子配列の揃った領域でもある。さらに、CAAC−OSは、a−b面方向において複数の結晶領域が連結する領域を有し、当該領域は歪みを有する場合がある。なお、歪みとは、複数の結晶領域が連結する領域において、格子配列の揃った領域と、別の格子配列の揃った領域と、の間で格子配列の向きが変化している箇所を指す。つまり、CAAC−OSは、c軸配向し、a−b面方向には明らかな配向をしていない酸化物半導体である。
nc−OSは、微小な領域(例えば、1nm以上10nm以下の領域、特に1nm以上3nm以下の領域)において原子配列に周期性を有する。別言すると、nc−OSは、微小な結晶を有する。なお、当該微小な結晶の大きさは、例えば、1nm以上10nm以下、特に1nm以上3nm以下であることから、当該微小な結晶をナノ結晶ともいう。また、nc−OSは、異なるナノ結晶間で結晶方位に規則性が見られない。そのため、膜全体で配向性が見られない。したがって、nc−OSは、分析方法によっては、a−like OSまたは非晶質酸化物半導体と区別が付かない場合がある。例えば、nc−OS膜に対し、XRD装置を用いて構造解析を行うと、θ/2θスキャンを用いたOut−of−plane XRD測定では、結晶性を示すピークが検出されない。また、nc−OS膜に対し、ナノ結晶よりも大きいプローブ径(例えば50nm以上)の電子線を用いる電子線回折(制限視野電子線回折ともいう。)を行うと、ハローパターンのような回折パターンが観測される。一方、nc−OS膜に対し、ナノ結晶の大きさと近いかナノ結晶より小さいプローブ径(例えば1nm以上30nm以下)の電子線を用いる電子線回折(ナノビーム電子線回折ともいう。)を行うと、ダイレクトスポットを中心とするリング状の領域内に複数のスポットが観測される電子線回折パターンが取得される場合がある。
a−like OSは、nc−OSと非晶質酸化物半導体との間の構造を有する酸化物半導体である。a−like OSは、鬆又は低密度領域を有する。即ち、a−like OSは、nc−OS及びCAAC−OSと比べて、結晶性が低い。また、a−like OSは、nc−OS及びCAAC−OSと比べて、膜中の水素濃度が高い。
次に、上述のCAC−OSの詳細について、説明を行う。なお、CAC−OSは材料構成に関する。
CAC−OSとは、例えば、金属酸化物を構成する元素が、0.5nm以上10nm以下、好ましくは、1nm以上3nm以下、またはその近傍のサイズで偏在した材料の一構成である。なお、以下では、金属酸化物において、一つまたは複数の金属元素が偏在し、該金属元素を有する領域が、0.5nm以上10nm以下、好ましくは、1nm以上3nm以下、またはその近傍のサイズで混合した状態をモザイク状、またはパッチ状ともいう。
続いて、上記酸化物半導体をトランジスタに用いる場合について説明する。
ここで、酸化物半導体中における各不純物の影響について説明する。
酸化物230に用いることができる半導体材料は、上述の金属酸化物に限られない。酸化物230として、バンドギャップを有する半導体材料(ゼロギャップ半導体ではない半導体材料)を用いてもよい。例えば、シリコンなどの単体元素の半導体、ヒ化ガリウムなどの化合物半導体、半導体として機能する層状物質(原子層物質、2次元材料などともいう。)などを半導体材料に用いることが好ましい。特に、半導体として機能する層状物質を半導体材料に用いると好適である。
次に、図8A乃至図8Dに示す、本発明の一態様である半導体装置の作製方法を、図14A乃至図25Dを用いて説明する。
以下では、上記半導体装置の作製方法に用いることができる、マイクロ波処理装置について説明する。
以下では、図11A乃至図13Bを用いて、本発明の一態様である半導体装置の一例について説明する。
図11Aおよび図11Bに示す半導体装置は、図8A乃至図8Dに示した半導体装置の変形例である。図11Aおよび図11Bに示す半導体装置は、図8A乃至図8Dに示した半導体装置とは、導電体240および導電体246が設けられている点が異なる。ここで、導電体240は、トランジスタ200のソースおよびドレインの一方に電気的に接続されるプラグとして機能し、導電体246は、当該プラグに接続される配線として機能する。
図12Aおよび図12Bに示す半導体装置は、図8A乃至図8Dに示した半導体装置の変形例である。図12Aおよび図12Bに示す半導体装置は、図13Aおよび図13Bに示す半導体装置と同様に、導電体242a上に、絶縁体241a、導電体240aおよび導電体246aを有する。さらに、導電体120上に、絶縁体241b、導電体240bおよび導電体246bを有する。ここで、導電体240bは、容量素子100の端子の一方に電気的に接続されるプラグとして機能し、導電体246bは、当該プラグに接続される配線として機能する。
図13Aおよび図13Bに示す半導体装置は、図12Aおよび図12Bに示した半導体装置の変形例である。図13Aおよび図13Bに示す半導体装置は、図12Aおよび図12Bに示した半導体装置とは、絶縁体283が、絶縁体212の上面の一部と接する構造となっているところが異なる。従って、トランジスタ200は、絶縁体283、および絶縁体212で封止された領域内に配置される。上記構成にすることで、上記封止された領域外に含まれる水素が、上記封止された領域内に混入することを抑制することができる。また、図13Aおよび図13Bに示すトランジスタ200では、絶縁体212、および絶縁体283を、単層として設ける構成について示しているが、本発明はこれに限られるものではない。例えば、絶縁体212、および絶縁体283のそれぞれを2層以上の積層構造として設ける構成にしてもよい。
以下では、図34を用いて、本発明の一態様である半導体装置の一例について説明する。
本実施の形態では、半導体装置の一形態を、図35を用いて説明する。
本発明の一態様に係る半導体装置(記憶装置)の一例を図35に示す。本発明の一態様の半導体装置は、トランジスタ200はトランジスタ300の上方に設けられ、容量素子100はトランジスタ300、およびトランジスタ200の上方に設けられている。なお、トランジスタ200として、先の実施の形態で説明したトランジスタ200を用いることができる。また、容量素子100として、先の実施の形態で説明した容量素子100を用いることができる。なお、図35では、図11に示す容量素子100およびトランジスタ200を用いる例について示しているが、本発明はこれに限られることなく、容量素子100およびトランジスタ200を適宜選択することができる。
トランジスタ300は、基板311上に設けられ、ゲートとして機能する導電体316、ゲート絶縁体として機能する絶縁体315、基板311の一部からなる半導体領域313、およびソース領域またはドレイン領域として機能する低抵抗領域314a、および低抵抗領域314bを有する。トランジスタ300は、pチャネル型、あるいはnチャネル型のいずれでもよい。
各構造体の間には、層間膜、配線、およびプラグ等が設けられた配線層が設けられていてもよい。また、配線層は、設計に応じて複数層設けることができる。ここで、プラグまたは配線としての機能を有する導電体は、複数の構造をまとめて同一の符号を付与する場合がある。また、本明細書等において、配線と、配線と電気的に接続するプラグとが一体物であってもよい。すなわち、導電体の一部が配線として機能する場合、および導電体の一部がプラグとして機能する場合もある。
なお、トランジスタ200に、酸化物半導体を用いる場合、酸化物半導体の近傍に過剰酸素領域を有する絶縁体を設けることがある。その場合、該過剰酸素領域を有する絶縁体と、該過剰酸素領域を有する絶縁体に設ける導電体との間に、バリア性を有する絶縁体を設けることが好ましい。
以下では、大面積基板を半導体素子ごとに分断することによって、複数の半導体装置をチップ状で取り出す場合に設けられるダイシングライン(スクライブライン、分断ライン、又は切断ラインと呼ぶ場合がある)について説明する。分断方法としては、例えば、まず、基板に半導体素子を分断するための溝(ダイシングライン)を形成した後、ダイシングラインにおいて切断し、複数の半導体装置に分断(分割)する場合がある。
図35に示す記憶装置は、絶縁体285および絶縁体280などに埋め込まれるように容量素子100が形成されていたが、本発明はこれに限られるものではない。図36に示すように、プレーナ型の容量素子100が絶縁体285の上に設けられる構成にしてもよい。
図36に示す記憶装置は、トランジスタ200と容量素子100が、水素に対するバリア絶縁膜によって、個別に封止されていたが、本発明はこれに限られるものではない。図37に示すように、トランジスタ200と容量素子100を、水素に対するバリア絶縁膜(絶縁体212、絶縁体152a、および絶縁体152b)によって、一括して封止する構成にしてもよい。
図37に示す記憶装置は、トランジスタ200の上に容量素子100が設けられていたが、本発明はこれに限られるものではない。図38に示すように、トランジスタ200と同じ層に容量素子100を設ける構成にしてもよい。
図36などに示す記憶装置は、トランジスタ300上にトランジスタ200を設け、トランジスタ200に容量素子100を接続する構成であったが、本発明はこれに限られるものではない。図39Aに示すように、トランジスタ200を設けずに、トランジスタ300に容量素子100を接続する構成にしてもよい。
図36などでは、トランジスタ200が、強誘電性を有しうる材料を含む容量素子100と接続する構成について示したが、本発明はこれに限られるものではない。例えば、トランジスタ200、およびその周囲に設けられる絶縁体として、強誘電性を有しうる材料を用いる構成にしてもよい。このような構成のトランジスタについて、図40A乃至図40Cを用いて説明する。なお、図40A乃至図40Cに示すトランジスタ200は、図8に示すトランジスタ200において、容量素子100の代わりに、導電体240a、導電体240b、導電体246a、導電体246b、絶縁体241a、絶縁体241bを設けたものである。
本実施の形態では、図41A、および図41Bを用いて、本発明の一態様に係る、酸化物を半導体に用いたトランジスタ(以下、OSトランジスタと呼ぶ場合がある。)、および強誘電キャパシタが適用されている記憶装置について説明する。本実施の形態に係る装置は、少なくとも容量素子と、容量素子の充放電を制御するOSトランジスタを有する記憶装置である。本実施の形態に係る装置は、強誘電キャパシタを用いた、1トランジスタ1キャパシタ型の強誘電体メモリとして機能する。
図41Aに記憶装置の構成の一例を示す。記憶装置1400は、周辺回路1411、およびメモリセルアレイ1470を有する。周辺回路1411は、行回路1420、列回路1430、出力回路1440、およびコントロールロジック回路1460を有する。
図42Aに示す回路図に、上述のメモリセルMCの構成例を示す。メモリセルMCは、トランジスタTrと、容量Feと、を有する。ここで、メモリセルMCとして、先の実施の形態に示す、トランジスタ200および容量素子100を有する半導体装置などを用いることができる。この場合、トランジスタTrはトランジスタ200に、容量Feは容量素子100に対応する。なお、トランジスタTrは、ゲートの他、バックゲートを有してもよいし、有していなくてもよい。また、図42Aでは、トランジスタTrをnチャネル型トランジスタとしているが、pチャネル型トランジスタとしてもよい。
以下では、図42Aに示すメモリセルMCの駆動方法の一例を説明する。以下の説明において、容量Feの強誘電体層に印加される電圧とは、容量Feの一方の電極の電位と、容量Feの他方の電極(配線PL)の電位と、の差を示すものとする。また、トランジスタTrは、nチャネル型トランジスタとする。
本実施の形態では、先の実施の形態に示す半導体装置を用いた記憶装置の応用例について説明する。先の実施の形態に示す半導体装置は、例えば、各種電子機器(例えば、情報端末、コンピュータ、スマートフォン、電子書籍端末、デジタルカメラ(ビデオカメラも含む)、録画再生装置、ナビゲーションシステムなど)の記憶装置に適用できる。なお、ここで、コンピュータとは、タブレット型のコンピュータ、ノート型のコンピュータ、デスクトップ型のコンピュータの他、サーバシステムのような大型のコンピュータを含むものである。または、先の実施の形態に示す半導体装置は、メモリカード(例えば、SDカード)、USBメモリ、SSD(ソリッド・ステート・ドライブ)等の各種のリムーバブル記憶装置に適用される。図43A乃至図43Eにリムーバブル記憶装置の幾つかの構成例を模式的に示す。例えば、先の実施の形態に示す半導体装置は、パッケージングされたメモリチップに加工され、様々なストレージ装置、リムーバブルメモリに用いられる。
本発明の一態様に係る半導体装置は、CPU、GPUなどのプロセッサ、またはチップに用いることができる。上記実施の形態に示す半導体装置を、CPU、GPUなどのプロセッサ、またはチップに用いることで、これらを小型化し、さらに記憶容量を大きくすることができる。図44A乃至図44Hに、本発明の一態様に係るCPU、GPUなどのプロセッサ、またはチップを備えた電子機器の具体例を示す。
本発明の一態様に係るGPUまたはチップは、様々な電子機器に搭載することができる。電子機器の例としては、例えば、テレビジョン装置、デスクトップ型またはノート型の情報端末用などのモニタ、デジタルサイネージ(Digital Signage:電子看板)、パチンコ機などの大型ゲーム機、などの比較的大きな画面を備える電子機器の他、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、電子ブックリーダー、携帯電話機、携帯型ゲーム機、携帯情報端末、音響再生装置、などが挙げられる。また、本発明の一態様に係るGPUまたはチップを電子機器に設けることにより、電子機器に人工知能を搭載することができる。
図44Aには、情報端末の一種である携帯電話(スマートフォン)が図示されている。情報端末5100は、筐体5101と、表示部5102と、を有しており、入力用インターフェースとして、タッチパネルが表示部5102に備えられ、ボタンが筐体5101に備えられている。
図44Cは、ゲーム機の一例である携帯ゲーム機5300を示している。携帯ゲーム機5300は、筐体5301、筐体5302、筐体5303、表示部5304、接続部5305、操作キー5306等を有する。筐体5302、および筐体5303は、筐体5301から取り外すことが可能である。筐体5301に設けられている接続部5305を別の筐体(図示せず)に取り付けることで、表示部5304に出力される映像を、別の映像機器(図示せず)に出力することができる。このとき、筐体5302、および筐体5303は、それぞれ操作部として機能することができる。これにより、複数のプレイヤーが同時にゲームを行うことができる。筐体5301、筐体5302、および筐体5303の基板に設けられているチップなどに先の実施の形態に示すチップを組み込むことができる。
本発明の一態様のGPUまたはチップは、大型コンピュータに適用することができる。
本発明の一態様のGPUまたはチップは、移動体である自動車、および自動車の運転席周辺に適用することができる。
図44Hは、電化製品の一例である電気冷凍冷蔵庫5800を示している。電気冷凍冷蔵庫5800は、筐体5801、冷蔵室用扉5802、冷凍室用扉5803等を有する。
図45Aは、評価に用いた試料800の外観を示す光学式顕微鏡写真である。図45Bに、試料800の断面概略図を示す。
導電体807と導電体808の間に、電圧振幅3V、周波数100Hzの三角波を印加し、絶縁体804の自発分極の変化(P−E特性)を測定した。図45Cに入力電圧波形を示す。また、試料800A、試料800B、および試料800Cそれぞれの絶縁体804に対応するHfZrOx膜について、XRD分析法の一種である斜入射X線回折法(GIXD:Grazing Incident X−ray Diffraction)を用いて結晶状態を調査した。
はじめに、本実施例で用いる電子線ホログラフィー分析について説明する。
図55Aおよび図55Bは、本実施例で使用する試料700の上面概略図および断面概略図である。図55Aは、試料700の上面概略図である。また、図55Bは、試料700の断面概略図である。ここで、図55Bは、図55AにA1−A2の一点鎖線で示す部位の断面図である。なお、図55Aの上面図では、図の明瞭化のために一部の要素を省いている。
薄片化した試料700に対して、電子線ホログラフィー分析を行った。なお、電子線ホログラフィー分析には、日立ハイテクノロジーズ製ホログラフィー電子顕微鏡「HF−3300EH」を用い、加速電圧を300kVとした。また、ホログラムの再生処理には、位相シフト再生法を用いた。
Claims (12)
- 第1の層と、第2の層と、を有し、
前記第1の層は、第1の酸素と、ハフニウムと、を有し、
前記第2の層は、第2の酸素と、ジルコニウムと、を有し、
前記ハフニウム、および前記ジルコニウムは、前記第1の酸素を介して互いに結合し、
前記第2の酸素は、前記ジルコニウムと、結合する、
金属酸化物膜。 - 複数の第1の層と、複数の第2の層と、を有し、
前記第1の層は、第1の酸素と、ハフニウムと、を有し、
前記第2の層は、第2の酸素と、ジルコニウムと、を有し、
前記複数の第1の層の一に含まれるハフニウム、および前記複数の第2の層の一に含まれるジルコニウムは、前記複数の第1の層の一に含まれる第1の酸素を介して互いに結合し、
前記複数の第2の層の一に含まれるジルコニウム、および前記複数の第1の層の他の一に含まれるハフニウムは、前記複数の第2の層の一に含まれる第2の酸素を介して互いに結合する、
金属酸化物膜。 - 容量素子と、前記容量素子と電気的に接続されるトランジスタと、を有し、
前記容量素子は、第1の導電体と、第2の導電体と、金属酸化物膜と、を有し、
前記金属酸化物膜は、前記第1の導電体と前記第2の導電体との間に設けられ、
前記金属酸化物膜は、第1の層と、第2の層と、を有し、
前記第1の層は、第1の酸素と、ハフニウムと、を有し、
前記第2の層は、第2の酸素と、ジルコニウムと、を有し、
前記ハフニウム、および前記ジルコニウムは、前記第1の酸素を介して互いに結合し、
前記第2の酸素は、前記ジルコニウムと、結合する、
半導体装置。 - 請求項3において、
前記トランジスタは、チャネル形成領域にシリコンを有する、
半導体装置。 - 請求項3において、
前記トランジスタは、チャネル形成領域に酸化物半導体を有する、
半導体装置。 - 請求項3乃至請求項5のいずれか一項において、
前記金属酸化物膜に含まれる、水素、及び炭素の少なくとも一以上の濃度は、SIMS分析において、5×1020atoms/cm3以下である、
半導体装置。 - 請求項3乃至請求項5のいずれか一項において、
前記金属酸化物膜に含まれる、水素、及び炭素の少なくとも一以上の濃度は、SIMS分析において、1×1020atoms/cm3以下である、
半導体装置。 - 請求項3乃至請求項5のいずれか一項において、
前記金属酸化物膜は、塩素を有する、
半導体装置。 - 第1の酸化性ガスを導入する第1の工程と、
第1のプリカーサを導入する第2の工程と、
第2の酸化性ガスを導入する第3の工程と、
第2のプリカーサを導入する第4の工程と、を有し、
前記第1のプリカーサは、HfCl4であり、
前記第2のプリカーサは、ZrCl4であり、
前記第1の工程乃至前記第4の工程を複数回繰り返す、
金属酸化物膜の作製方法。 - 請求項9において、
前記第1の酸化性ガス、および前記第2の酸化性ガスは、それぞれH2O、及びO3のいずれか一方または双方である、
金属酸化物膜の作製方法。 - 請求項9または請求項10において、
前記第1の工程と前記第2の工程の間、前記第2の工程と前記第3の工程の間、前記第3の工程と前記第4の工程の間、および前記第4の工程と前記第1の工程の間に、
パージガスを導入する第5の工程を有し、
前記パージガスは、N2である、
金属酸化物膜の作製方法。 - 請求項9乃至請求項11のいずれか一項において、
前記第1の工程乃至前記第4の工程のいずれか一または複数は、ALD装置によって行われる、
金属酸化物膜の作製方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2022546730A JPWO2022049459A1 (ja) | 2020-09-07 | 2021-08-26 | |
KR1020237008438A KR20230062567A (ko) | 2020-09-07 | 2021-08-26 | 금속 산화물막, 반도체 장치, 및 그 제작 방법 |
US18/043,669 US20230269949A1 (en) | 2020-09-07 | 2021-08-26 | Metal oxide film, semiconductor device, and manufacturing method thereof |
CN202180054530.2A CN116195037A (zh) | 2020-09-07 | 2021-08-26 | 金属氧化物膜、半导体装置以及其制造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020150192 | 2020-09-07 | ||
JP2020-150192 | 2020-09-07 | ||
JP2020-197135 | 2020-11-27 | ||
JP2020197135 | 2020-11-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2022049459A1 true WO2022049459A1 (ja) | 2022-03-10 |
Family
ID=80490700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2021/057803 WO2022049459A1 (ja) | 2020-09-07 | 2021-08-26 | 金属酸化物膜、半導体装置、およびその作製方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US20230269949A1 (ja) |
JP (1) | JPWO2022049459A1 (ja) |
KR (1) | KR20230062567A (ja) |
CN (1) | CN116195037A (ja) |
TW (1) | TW202210653A (ja) |
WO (1) | WO2022049459A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2022111806A (ja) * | 2021-01-20 | 2022-08-01 | キヤノン株式会社 | 光電変換装置および機器 |
CN115016676A (zh) * | 2022-06-30 | 2022-09-06 | 业泓科技(成都)有限公司 | 屏幕下生物辨识模块及屏幕下生物辨识装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001200363A (ja) * | 1999-12-03 | 2001-07-24 | Asm Microchemistry Oy | テクスチャ加工されたキャパシタ電極上のコンフォーマル薄膜 |
JP2002373945A (ja) * | 2001-06-13 | 2002-12-26 | Nec Corp | 半導体装置およびその製造方法 |
JP2006310754A (ja) * | 2005-04-30 | 2006-11-09 | Hynix Semiconductor Inc | ナノ複合体の誘電膜、その誘電膜を有するキャパシタ及びその製造方法 |
US20120146196A1 (en) * | 2010-12-10 | 2012-06-14 | Lee Kee-Jeung | Method for fabricating semiconductor device |
WO2013150920A1 (ja) * | 2012-04-05 | 2013-10-10 | 東京エレクトロン株式会社 | 半導体デバイスの製造方法及び基板処理システム |
-
2021
- 2021-08-16 TW TW110130166A patent/TW202210653A/zh unknown
- 2021-08-26 CN CN202180054530.2A patent/CN116195037A/zh active Pending
- 2021-08-26 JP JP2022546730A patent/JPWO2022049459A1/ja active Pending
- 2021-08-26 KR KR1020237008438A patent/KR20230062567A/ko unknown
- 2021-08-26 US US18/043,669 patent/US20230269949A1/en active Pending
- 2021-08-26 WO PCT/IB2021/057803 patent/WO2022049459A1/ja active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001200363A (ja) * | 1999-12-03 | 2001-07-24 | Asm Microchemistry Oy | テクスチャ加工されたキャパシタ電極上のコンフォーマル薄膜 |
JP2002373945A (ja) * | 2001-06-13 | 2002-12-26 | Nec Corp | 半導体装置およびその製造方法 |
JP2006310754A (ja) * | 2005-04-30 | 2006-11-09 | Hynix Semiconductor Inc | ナノ複合体の誘電膜、その誘電膜を有するキャパシタ及びその製造方法 |
US20120146196A1 (en) * | 2010-12-10 | 2012-06-14 | Lee Kee-Jeung | Method for fabricating semiconductor device |
WO2013150920A1 (ja) * | 2012-04-05 | 2013-10-10 | 東京エレクトロン株式会社 | 半導体デバイスの製造方法及び基板処理システム |
Also Published As
Publication number | Publication date |
---|---|
TW202210653A (zh) | 2022-03-16 |
KR20230062567A (ko) | 2023-05-09 |
JPWO2022049459A1 (ja) | 2022-03-10 |
CN116195037A (zh) | 2023-05-30 |
US20230269949A1 (en) | 2023-08-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2022049459A1 (ja) | 金属酸化物膜、半導体装置、およびその作製方法 | |
WO2022064306A1 (ja) | 強誘電体デバイス、および半導体装置 | |
WO2021198836A1 (ja) | 半導体装置、および半導体装置の作製方法 | |
WO2021171136A1 (ja) | 金属酸化物、金属酸化物の成膜方法、および金属酸化物の成膜装置 | |
WO2021144666A1 (ja) | 半導体装置、および半導体装置の作製方法 | |
WO2021019334A1 (ja) | 半導体装置 | |
WO2020250083A1 (ja) | 半導体装置、および半導体装置の作製方法 | |
WO2022049449A1 (ja) | 半導体装置、容量素子、およびその作製方法 | |
WO2021130600A1 (ja) | 半導体装置、半導体装置の作製方法 | |
WO2021038361A1 (ja) | 半導体装置 | |
WO2022084795A1 (ja) | 強誘電体デバイス、および半導体装置 | |
WO2022084801A1 (ja) | 強誘電体デバイス、半導体装置 | |
WO2022038456A1 (ja) | 半導体装置の作製方法 | |
WO2022038450A1 (ja) | 金属酸化物の製造方法 | |
WO2022043810A1 (ja) | 半導体装置およびその作製方法 | |
WO2022043809A1 (ja) | 半導体装置の作製方法 | |
WO2022043811A1 (ja) | 半導体装置の作製方法 | |
WO2022038453A1 (ja) | 絶縁膜の改質方法、および半導体装置の作製方法 | |
WO2023002290A1 (ja) | 半導体装置 | |
WO2021186297A1 (ja) | 半導体装置、半導体装置の作製方法 | |
WO2021090115A1 (ja) | 半導体装置 | |
WO2021165783A1 (ja) | 金属酸化物、金属酸化物の形成方法、半導体装置 | |
WO2021048696A1 (ja) | 半導体装置 | |
WO2021005432A1 (ja) | 半導体装置、および半導体装置の作製方法 | |
JP2022039096A (ja) | 半導体装置およびその作製方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 21863797 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2022546730 Country of ref document: JP Kind code of ref document: A |
|
ENP | Entry into the national phase |
Ref document number: 20237008438 Country of ref document: KR Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 21863797 Country of ref document: EP Kind code of ref document: A1 |