WO2022022114A1 - 测量电容之间最短距离的方法及评价电容制程的方法 - Google Patents

测量电容之间最短距离的方法及评价电容制程的方法 Download PDF

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WO2022022114A1
WO2022022114A1 PCT/CN2021/099828 CN2021099828W WO2022022114A1 WO 2022022114 A1 WO2022022114 A1 WO 2022022114A1 CN 2021099828 W CN2021099828 W CN 2021099828W WO 2022022114 A1 WO2022022114 A1 WO 2022022114A1
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capacitors
capacitor
distance
adjacent
shortest distance
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PCT/CN2021/099828
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English (en)
French (fr)
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汪韦刚
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长鑫存储技术有限公司
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Priority to US17/392,411 priority Critical patent/US11933863B2/en
Publication of WO2022022114A1 publication Critical patent/WO2022022114A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B21/00—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
    • G01B21/16—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring distance of clearance between spaced objects
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D21/00—Measuring or testing not otherwise provided for
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers

Definitions

  • the present disclosure relates to the field of memory, and in particular, to a method for measuring the shortest distance between capacitors and a method for evaluating a capacitor manufacturing process.
  • Capacitance Capacitance
  • DRAM Dynamic Random Access Memory
  • the horizontal distance between connected capacitors is usually measured by a line width scanning electron microscope (Critical Dimension Scanning Electron Microscope, CD SEM), but this measurement method is inaccurate due to the randomness of the capacitance offset.
  • the technical problem to be solved by the embodiments of the present disclosure is to provide a method for measuring the shortest distance between capacitors and a method for evaluating a capacitor manufacturing process, which can avoid the measurement error caused by the offset of the capacitors relative to the preset arrangement direction, and improve the measurement accuracy Spend.
  • an embodiment of the present disclosure provides a method for measuring the shortest distance between capacitors, including: obtaining the distance between the tangents of the adjacent surfaces of two adjacent capacitors; The distance between the tangent lines is the shortest distance between the two capacitors, wherein the direction of the tangent lines on the adjacent surfaces of two adjacent capacitors is the same, and the direction of the tangent lines is perpendicular to the preset arrangement direction of the capacitors .
  • the distance between the tangents of the adjacent surfaces of two adjacent capacitors along the preset arrangement direction is taken as the shortest distance between the two capacitors.
  • the capacitor is a columnar capacitor, and the tangent is a tangent to a cross-section of the capacitor.
  • the step of obtaining the distance between the tangents of the adjacent surfaces of two adjacent capacitors further includes: obtaining the radii of the two adjacent capacitors; The distance between the straight lines, the extending direction of the straight line is the same as the extending direction of the tangent line; the difference between the distance between the two straight lines and the radius of the two capacitors is taken as the distance between the tangent lines.
  • the step of obtaining the distance between two straight lines passing through the centers of two adjacent capacitor circles further includes: calculating the distance between the projected coordinate points of the two capacitor circle centers in the preset arrangement direction As the distance between two straight lines passing through the centers of two adjacent capacitor circles.
  • the step of obtaining the distance between the tangents of the adjacent surfaces of two adjacent capacitors further includes: obtaining the diameters of the two adjacent capacitors; obtaining the distance of the non-adjacent surfaces of the two adjacent capacitors The distance between the first tangent lines, the extension direction of the first tangent line is the same as the extension direction of the tangent lines of the adjacent surfaces of the two adjacent capacitors; the distance between the first tangent lines is obtained and the two The difference between the diameters of two capacitors, the difference is taken as the shortest distance between two adjacent capacitors.
  • An embodiment of the present disclosure also provides a method for evaluating a capacitor manufacturing process, obtaining the shortest distance between two capacitors and comparing a preset value to evaluate the capacitor manufacturing process, wherein the shortest distance between the two capacitors adopts the above-mentioned method
  • the method obtains that the preset value is the distance between the tangent lines when the capacitors are arranged according to the preset arrangement direction.
  • An embodiment of the present disclosure also provides a method for evaluating a capacitor manufacturing process, including the following steps: setting a plurality of sampling areas; obtaining a plurality of capacitors along a preset arrangement direction in the sampling area, as a capacitor group, and then obtaining a plurality of capacitor groups ; Obtain the difference between the maximum value and the minimum value of the shortest distance between adjacent capacitors in each capacitor group, as an initial parameter, wherein, the shortest distance between adjacent capacitors in each capacitor group is obtained by using the method for the shortest distance between the above-mentioned measurement capacitors ; Obtain the average value of the initial parameters of a plurality of capacitor groups, and the average value is used as a parameter for evaluating the capacitor manufacturing process.
  • the plurality of capacitor banks are arranged in order or out of order.
  • the plurality of capacitor groups are sequentially arranged in a direction at a predetermined angle with respect to the predetermined arrangement direction.
  • the advantages of the embodiments of the present disclosure are that the measurement error caused by the offset of the capacitors relative to the preset arrangement direction can be avoided, and the measurement accuracy is greatly improved.
  • FIG. 1 is a schematic diagram of a method for measuring the shortest distance in a preset arrangement direction between adjacent capacitors in the related art
  • FIG. 2 is another schematic diagram of a method for measuring the shortest distance in a preset arrangement direction between adjacent capacitors in the related art
  • FIG. 3 is a schematic diagram of an embodiment of a method for measuring the shortest distance between capacitors according to an embodiment of the present disclosure
  • FIG. 4 is another schematic diagram of an embodiment of a method for measuring the shortest distance between capacitors according to an embodiment of the present disclosure
  • FIG. 5 is another schematic diagram of an embodiment of a method for measuring the shortest distance between capacitors according to an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of another embodiment of a method for measuring the shortest distance between capacitors according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of an embodiment of a method for evaluating a capacitor manufacturing process according to an embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram of a method for measuring the shortest distance in the theoretical arrangement direction between adjacent capacitors in the prior art. Please refer to Figure 1.
  • Capacitors C1 and C2 are two adjacent capacitors.
  • the distance D1 between the capacitors C1 and C2 in the theoretical arrangement direction (D direction) is measured by a line-width scanning electron microscope.
  • the distance D1 is The shortest distance between the capacitors C1 and C2 in the theoretical arrangement direction is used to evaluate the possibility of a short circuit between the capacitors C1 and C2.
  • the connection line O between the centers of the capacitors C1 and C2 is in the preset arrangement direction (D direction), and the capacitors do not shift relative to the preset arrangement direction, so the distance D1 at this time is the capacitor C1 and the shortest distance of the capacitor C2 in the preset arrangement direction.
  • D direction preset arrangement direction
  • connection line O between the centers of the capacitors C1 and C2 is not in the preset arrangement direction (D direction), and the capacitor C2 is offset relative to the preset arrangement direction, so the distance D1 at this time is not between the capacitor C1 and the capacitor C1.
  • the shortest distance between the capacitors C2, the distance D1 is greater than the shortest distance between the capacitors C1 and C2, the measurement is not accurate, resulting in errors when using this distance to evaluate the possibility of a short circuit between the capacitors.
  • an embodiment of the present disclosure proposes a method for measuring the shortest distance of capacitors in a preset arrangement direction, which can accurately measure the shortest distance between capacitors regardless of whether the capacitors are offset relative to the preset arrangement direction, Improve the accuracy of the assessment.
  • the method for measuring the shortest distance between capacitors in the embodiment of the present disclosure is to obtain the distance between the tangents of the adjacent surfaces of two adjacent capacitors, and take the distance between the tangents of the adjacent surfaces of two adjacent capacitors as two The shortest distance between capacitors, wherein the direction of the tangent lines on the adjacent surfaces of two adjacent capacitors is the same, and the direction of the tangent lines is perpendicular to the preset arrangement direction of the capacitors.
  • the capacitor C1 and the capacitor C2 are disposed adjacent to each other, and the capacitor C1 and the capacitor C2 have a preset arrangement direction.
  • the preset arrangement direction is the theoretical arrangement direction of the capacitors
  • the theoretical arrangement direction refers to the theoretical design direction of the capacitors
  • the theoretical design direction of the capacitors is preset before preparing the semiconductor structure .
  • the preset arrangement direction may be an arbitrarily determined target direction.
  • the distance between the tangent line T1 and the tangent line T2 of the adjacent surface of the capacitor C1 and the capacitor C2 is obtained, and the distance between the tangent line T1 and the tangent line T2 of the adjacent surface of the capacitor C1 and the capacitor C2 is used as the capacitor C1 and the capacitor C2.
  • the shortest distance in the arrangement direction Since the capacitor C1 and the capacitor C2 are cylindrical capacitors, the cross section of the cylindrical capacitor is circular, and the tangent line T1 and the tangent line T2 are the tangent lines of the circular cross section.
  • the extending directions of the tangent line T1 and the tangent line T2 are the same, and both are perpendicular to the predetermined arrangement direction (D direction) of the capacitors C1 and C2.
  • the extension direction of the tangent line T1 and the tangent line T2 is the vertical direction; if the preset arrangement direction is the vertical direction, the tangent line T1 and the tangent line The extending direction of T2 is the horizontal direction.
  • the distance between the tangents of the adjacent surfaces of two adjacent capacitors along the preset arrangement direction is taken as the shortest distance between the two capacitors.
  • the distance S between the tangent line T1 and the tangent line T2 of the capacitor C1 and the capacitor C2 along the preset arrangement direction (D direction) is taken as the shortest distance between the capacitor C1 and the capacitor C2.
  • the shortest distance obtained by using the measurement method of the embodiment of the present disclosure is not affected by whether the capacitance is displaced relative to the preset arrangement, that is, regardless of whether the capacitance is displaced relative to the predetermined arrangement direction, the measurement method of the embodiment of the present disclosure can measure The shortest distance between output capacitors.
  • the center of the capacitor C1 and the capacitor C2 are connected in the preset arrangement direction (D direction), then the tangent line T1 and the tangent line T2
  • the distance S is the shortest distance between the capacitors C1 and C2 in the preset arrangement direction.
  • the capacitors are offset relative to the preset arrangement direction, as shown in FIG.
  • the line O connecting the centers of the capacitors C1 and C2 is not in the preset arrangement direction (D direction), that is, the capacitor C2 is relative to the preset arrangement direction. If the cloth direction is shifted, the distance S between the tangent line T1 and the tangent line T2 is still the shortest distance between the capacitor C1 and the capacitor C2.
  • the shortest distance obtained by the method of the embodiment of the present disclosure can avoid measurement errors caused by the offset of the capacitors relative to the preset arrangement direction, and greatly improve the measurement accuracy.
  • the embodiment of the present disclosure provides two methods that can indirectly measure the adjacent surfaces of the capacitor C1 and the capacitor C2. The method of the distance between the tangent line T1 and the tangent line T2 of the surface.
  • one method of measuring the distance between the tangent line T1 and the tangent line T2 of the adjacent surfaces of the capacitor C1 and the capacitor C2 is as follows:
  • This step can be obtained by measuring with a measuring instrument.
  • the extending directions of the straight lines O1 and O2 are the same as the extending directions of the tangent lines T1 and T2. That is, the straight lines O1 and O2 are parallel to the tangent lines T1 and T2, and the four straight lines are perpendicular to the preset arrangement direction of the capacitors.
  • the predetermined arrangement direction of the capacitors is the horizontal direction
  • the straight lines O1 and O2 and the tangent lines T1 and T2 are the vertical direction.
  • the predetermined arrangement direction of the capacitors is the D direction which forms an angle with the horizontal direction
  • the extending directions of the straight lines O1 and O2 and the tangent lines T1 and T2 are perpendicular to the D direction.
  • the step of obtaining the distance between two straight lines passing through the centers of two adjacent capacitor circles further includes: taking the distance between the projected coordinate points of the two capacitor circle centers in the preset arrangement direction as The distance between two straight lines passing through the centers of two adjacent capacitor circles.
  • the projection coordinates of the center of the capacitor C1 in the preset arrangement direction (D direction) are (x1, y1)
  • the projected coordinates of the center of the capacitor C2 in the preset arrangement direction (D direction) are ( x2, y2)
  • the distance between the projected coordinate points of the center of the capacitor C1 and the capacitor C2 in the preset arrangement direction can be calculated by the Pythagorean theorem.
  • the projection coordinates of the capacitor C1 and the capacitor C2 in the preset arrangement direction are (x1, y1) and The ordinates of (x2, y1) are the same and can be ignored, so the distance between the projected coordinate points is the difference between the abscissas x2 and x1.
  • the distance S is the shortest distance of the capacitors C1 and C2 in the preset arrangement direction.
  • the diameter d1 of the capacitor C1 and the diameter d2 of the capacitor C2 are obtained. This step can be obtained by measuring with a measuring instrument.
  • the distance between the first tangents of the non-adjacent surfaces of the capacitors C1 and C2 is obtained, and the extension direction of the first tangents is the same as the extension direction of the tangents of the adjacent surfaces of the capacitors C1 and C2.
  • the first tangent lines of the non-adjacent surfaces of the capacitor C1 and the capacitor C2 are the tangent line T3 and the tangent line T4, respectively.
  • the tangent lines T3 and T4 extend in the same direction as the tangent lines T1 and T2, that is, the tangent lines T3 and T4 are parallel to the tangent lines T1 and T2.
  • the orientation of the distance S1 between the tangents T3 and T4 is the same as the orientation of the distance S between the tangents T1 and T2.
  • the distance S1 between the tangent line T3 and the tangent line T4 is the distance between the tangent line T3 and the tangent line T4 along the preset arrangement direction (D direction).
  • the difference between the distance S1 between the tangent line T3 and the tangent line T4 and the diameters d1 and d2 of the capacitor C1 and the capacitor C2 is obtained.
  • the embodiments of the present disclosure provide the above two methods for measuring the distance between the tangent line T1 and the tangent line T2 between the adjacent surfaces of the capacitor C1 and the capacitor C2. Those skilled in the art may also use other methods to measure the tangent line between the adjacent surfaces of the capacitor C1 and the capacitor C2. The distance between T1 and the tangent T2.
  • embodiments of the present disclosure also provide a method for evaluating a capacitor manufacturing process.
  • the method for evaluating the capacitor manufacturing process in the embodiment of the present disclosure is to obtain the shortest distance between two capacitors and compare with a preset value, so as to evaluate the capacitor manufacturing process.
  • the preset value is the distance between the tangent lines when the capacitors are arranged according to the preset arrangement direction.
  • the preset value is the design value when designing the semiconductor device. For example, referring to FIG. 3 , the preset value is the distance between the tangent line T1 and the tangent line T2 when the capacitors C1 and C2 are arranged according to the preset arrangement direction and there is no offset.
  • the distance may be a distance along a preset arrangement direction of the capacitors.
  • the evaluating capacitor process includes evaluating the probability of shorting between capacitors and the degree of opening of the capacitors.
  • the shortest distance between the two capacitors When the shortest distance between the two capacitors is less than the preset value, it can be used to evaluate the probability of short circuit between the capacitors, and then judge the quality of the process and the impact on the yield. For example, the deviation of the shortest distance between two capacitors from a preset value is proportional to the probability of a short circuit between the capacitors. The greater the deviation between the shortest distance between the two capacitors and the preset value, the higher the probability of a short circuit between the capacitors.
  • the shortest distance between two capacitors When the shortest distance between two capacitors is greater than a preset value, it can be used for the degree of capacitor opening.
  • the deviation of the shortest distance between two capacitors from a preset value is proportional to the degree of opening of the capacitors. The greater the deviation of the shortest distance between the two capacitors from the preset value, the greater the degree of opening of the capacitors.
  • Embodiments of the present disclosure also provide a method for evaluating a capacitor manufacturing process.
  • the following describes a method for evaluating a capacitor manufacturing process according to an embodiment of the present disclosure with reference to FIG. 7 .
  • the semiconductor device includes a plurality of capacitors C. As shown in FIG. 7
  • Step 1 Set multiple sampling areas, for example, set sampling areas A1, A2, A3, A4 and A5.
  • a plurality of the sampling regions may be arranged in an orderly or disorderly manner.
  • the sampling regions are arranged in an orderly manner.
  • Step 2 In each sampling area, select a plurality of capacitors along a preset arrangement direction (D direction) as a capacitor group. Multiple sampling regions can obtain multiple capacitance groups. Multiple capacitor banks are arranged in order or disorder. In this embodiment, a plurality of capacitor groups are arranged in an orderly manner, and are sequentially arranged in a predetermined angular direction with respect to a predetermined arrangement direction (D direction). In FIG. 7 , the arrangement of capacitors in each capacitor group is the same; in other embodiments, the arrangement of capacitors in each capacitor group may also be different. In FIG. 7 , the arrangement of the capacitors in each capacitor group is ordered; in other embodiments, the arrangement of the capacitors in each capacitor group may also be disordered.
  • five capacitors are selected along the preset arrangement direction (D direction) in the sampling area A1 as the first capacitor group; in the sampling area A2, 5 capacitors are selected along the preset arrangement direction (D direction) 5 capacitors are used as the second capacitor group; 5 capacitors are selected along the preset arrangement direction (D direction) in the sampling area A3 as the third capacitor group; in the sampling area A4 along the preset arrangement direction (D direction) ) select 5 capacitors as the fourth capacitor group; select 5 capacitors along the preset arrangement direction (D direction) in the sampling area A5 as the fifth capacitor group.
  • the number of capacitors in the capacitor group may also be other numbers.
  • Step 3 Obtain the difference between the maximum value and the minimum value of the shortest distance between adjacent capacitors in each capacitor group as an initial parameter. Wherein, the shortest distance between adjacent capacitors in each capacitor group is obtained by the above-mentioned measurement method.
  • Step 4 Obtain the average value of the initial parameters of the plurality of capacitor groups, and the average value is used as a parameter for evaluating the capacitor manufacturing process.
  • the shortest distances between adjacent capacitors in the first capacitor group are respectively S1.1, S1.2, S1.3, S1.4 and S1.5;
  • the shortest distances between adjacent capacitors in the second capacitor group are respectively S2.1, S2.2, S2.3, S2.4 and S2.5;
  • the shortest distances between adjacent capacitors in the third capacitor group are S3.1, S3.2, S3.3, S3.4 and S3.5;
  • the shortest distances between adjacent capacitors in the fourth capacitor group are S4.1, S4.2, S4.3, S4.4 and S4.5 respectively, and the shortest distances between adjacent capacitors in the fifth capacitor group They are S5.1, S5.2, S5.3, S5.4 and S5.5 respectively.
  • the average value P can be used to evaluate the probability of short circuit between adjacent capacitors.
  • the accuracy of the evaluation can be improved by rational selection of sampling areas and calculation methods.

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Abstract

一种测量电容(C)之间最短距离的方法及评价电容(C)制程的方法，测量电容(C1,C2)之间最短距离的方法为，获得相邻两个电容(C1,C2)相邻面的切线(T1,T2)之间的距离，将相邻两个电容(C1,C2)相邻面的切线(T1,T2)之间的距离作为两个电容(C1,C2)之间的最短距离，其中，相邻的两个电容(C1,C2)的相邻面的切线(T1,T2)的方向相同，且切线(T1,T2)的方向与电容(C)的预设排布方向(D)垂直。

Description

测量电容之间最短距离的方法及评价电容制程的方法
相关申请的交叉引用
本公开基于申请号为202010729801.7、申请日为2020年7月27日、申请名称为“测量电容之间最短距离的方法及评价电容制程的方法”的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此以全文引入的方式引入本公开。
技术领域
本公开涉及存储器领域，尤其涉及一种测量电容之间最短距离的方法及评价电容制程的方法。
背景技术
随着半导体集成电路器件特征尺寸的不断缩小，动态随机存取存储器(Dynamic Random Access Memory，DRAM)中电容(Capacitance)的数量不断增加。相邻电容之间发生短路的可能性变得越来越高，相邻电容之间发生短路为DRAM制造过程造成良率损失非常常见的一种原因。准确测量及监控相邻电容在设计方向上的最短距离对制程优化和良率提高具有重要意义。
通常使用线宽扫描式电子显微镜(Critical Dimension Scanning Electron Microscope，CD SEM)测量相连电容之间的水平距离，但是由于电容偏移的随机性，该种测量方法不准确。
发明内容
本公开实施例所要解决的技术问题是，提供一种测量电容之间最短距离的方法及评价电容制程方法，能够避免电容在相对预设排布方向发生偏移带来的测量误差，提高测量准确度。
为了解决上述问题，本公开实施例提供了一种测量电容之间最短距离的方法，包括：获得相邻两个电容相邻面的切线之间的距离，将相邻两个电容相邻面的切线之间的距离作为两个电容之间的最短距离，其中，相邻的两个电容的相邻面的所述切线的方向相同，且所述切线的方向与电容的预设排布方向垂直。
在一种实施例中，将相邻的两个电容相邻面的切线之间沿所述预设排布方向上的距离作为两个电容之间的最短距离。
在一种实施例中，所述电容为柱状电容，所述切线为所述电容的横截面的切线。
在一种实施例中，获得相邻的两个电容相邻面的切线之间的距离的步骤还包括：获得相邻的两个电容的半径；获得分别经过相邻的两个电容圆心的两条直线之间的距离，所述 直线的延伸方向与所述切线的延伸方向相同；将两条直线之间的距离与两个电容的半径之差作为所述切线之间的距离。
在一种实施例中，获得分别经过相邻的两个电容圆心的两条直线之间的距离的步骤还包括：将两个电容圆心在预设排布方向上的投影坐标点之间的距离作为经过相邻的两个电容圆心的两条直线之间的距离。
在一种实施例中，获得相邻的两个电容相邻面的切线之间的距离的步骤还包括：获得相邻的两个电容的直径；获得相邻的两个电容不相邻面的第一切线之间的距离，所述第一切线的延伸方向与所述相邻的两个电容相邻面的切线的延伸方向相同；获得所述第一切线之间的距离与两个电容的直径的差值，所述差值作为相邻的两个电容的最短距离。
本公开实施例还提供一种评价电容制程的方法，获得两个电容之间的最短距离与预设值进行比较，以评价电容制程，其中，两个电容之间的最短距离采用如上所述的方法获得，所述预设值为电容按照预设排布方向进行排布时的所述切线之间的距离。
本公开实施例还提供一种评价电容制程的方法，包括如下步骤：设置多个取样区域；在取样区域，沿预设排布方向获得多个电容，作为一个电容组，进而获得多个电容组；获得每一电容组中的相邻电容最短距离的最大值与最小值之差，作为初始参数，其中，每一电容组中的相邻电容最短距离采用上述测量电容之间最短距离的方法获得；获得多个电容组的初始参数的平均值，所述平均值作为评价电容制程的参数。
在一种实施例中，多个电容组有序或无序设置。
在一种实施例中，多个电容组在与预设排布方向呈预设角度方向上依次排布。
本公开实施例的优点在于，能够避免电容在相对预设排布方向发生偏移带来的测量误差，大大提高了测量准确度。
附图说明
图1是相关技术中测量相邻电容之间预设排布方向上的最短距离的方法的示意图；
图2是相关技术中测量相邻电容之间预设排布方向上的最短距离的方法的另一示意图；
图3是本公开实施例测量电容之间最短距离的方法的一实施例的示意图；
图4是本公开实施例测量电容之间最短距离的方法的一实施例的另一示意图；
图5是本公开实施例测量电容之间最短距离的方法的一实施例的另一示意图；
图6是本公开实施例测量电容之间最短距离的方法的另一实施例的示意图。
图7是本公开实施例评价电容制程的方法的一实施例的示意图。
具体实施方式
下面结合附图对本公开实施例提供的测量电容之间最短距离的方法及评价电容制程方 法的实施例做详细说明。
相邻电容之间预设排布方向上的最短距离能够有效评估电容之间发生短路的可能性的大小，所述预设排布方向可为电容的理论排布方向。目前，测量相邻电容之间理论排布方向上的最短距离的方法是使用线宽扫描式电子显微镜测量相连电容之间的水平距离。图1是现有技术中测量相邻电容之间理论排布方向上的最短距离的方法的示意图。请参阅图1，电容C1及电容C2为相邻的两个电容，采用线宽扫描式电子显微镜测量电容C1及电容C2在理论排布方向(D方向)上的距离D1，该距离D1即为电容C1及电容C2在理论排布方向上的最短距离，以评估电容C1及电容C2之间发生短路的可能性的大小。
但是，发明人发现，在电容相对预设排布方向未发生偏移的情况下，该测量准确度较高，在电容相对预设排布方向发生偏移的情况下，该测量准确度不高。如图1所示，电容C1及电容C2的圆心连线O在预设排布方向(D方向)上，电容相对预设排布方向未发生偏移，则此时的距离D1即为电容C1及电容C2在预设排布方向上的最短距离。如图2所示，电容C1及电容C2的圆心连线O不在预设排布方向(D方向)上，电容C2相对预设排布方向发生偏移，则此时的距离D1不是电容C1与电容C2之间的最短距离，该距离D1大于电容C1与电容C2之间的最短距离，测量不准确，导致采用该距离评估电容之间发生短路的可能性的大小时发生误差。
鉴于上述原因，本公开实施例提出一种测量电容在预设排布方向上的最短距离的方法，不论电容是否相对预设排布方向发生偏移，均能够准确测量电容之间的最短距离，提高评估的准确度。
本公开实施例测量电容之间最短距离的方法为，获得相邻的两个电容相邻面的切线之间的距离，将相邻的两个电容相邻面的切线之间的距离作为两个电容之间的最短距离，其中，相邻的两个电容的相邻面的所述切线的方向相同，且所述切线的方向与电容的预设排布方向垂直。
图3是本公开实施例测量电容之间最短距离的方法的一实施例的示意图，请参阅图3，电容C1与电容C2相邻设置，所述电容C1与电容C2具有预设排布方向，例如图3中的D方向。在本实施例中，所述预设排布方向为所述电容的理论排布方向，所述理论排布方向是指电容的理论设计方向，电容的理论设计方向为制备半导体结构前预先设定。在其他实施例中，所述预设排布方向可为任意确定的目标方向。
获得电容C1与电容C2相邻面的切线T1及切线T2之间的距离，将所述电容C1与电容C2相邻面的切线T1及切线T2之间的距离作为电容C1与电容C2在预设排布方向上的最短距离。由于所述电容C1及电容C2为柱状电容，因此，柱状电容横截面为圆形，则所 述切线T1及切线T2为圆形横截面的切线。所述切线T1与所述切线T2的延伸方向相同，均与电容C1及电容C2的预设排布方向(D方向)垂直。例如，若预设排布方向为水平方向，则所述切线T1及所述切线T2的延伸方向为竖直方向，若预设排布方向为竖直方向，则所述切线T1及所述切线T2的延伸方向为水平方向。
其中，将相邻的两个电容相邻面的切线之间沿所述预设排布方向上的距离作为两个电容之间的最短距离。将电容C1与电容C2的切线T1及切线T2沿所述预设排布方向(D方向)上的距离S作为电容C1与电容C2之间的最短距离。
采用本公开实施例的测量方法获得的最短距离不受电容是否相对预设排布发生偏移的影响，即不论电容是否相对预设排布方向发生偏移，本公开实施例测量方法均能够测量出电容之间的最短距离。在电容相对预设排布方向未发生偏移的情况下，如图3所示，电容C1及电容C2的圆心连线在预设排布方向(D方向)上，则切线T1及切线T2的距离S即为电容C1及电容C2在预设排布方向上的最短距离。在电容相对预设排布方向发生偏移的情况下，如图4所示，电容C1及电容C2的圆心连线O不在预设排布方向(D方向)上，即电容C2相对预设排布方向发生偏移，则此时切线T1及切线T2的距离S依然是电容C1与电容C2之间的最短距离。
采用本公开实施例的方法获得的最短距离能够避免电容在相对预设排布方向发生偏移带来的测量误差，大大提高了测量准确度。
受到测量仪器的影响，直接测量电容C1与电容C2相邻面的切线T1及切线T2之间的距离误差较大，因此，本公开实施例提供了两种能够间接测量电容C1与电容C2相邻面的切线T1及切线T2之间的距离的方法。
请参阅图4，测量电容C1与电容C2相邻面的切线T1及切线T2之间的距离的一种方法如下：
获得电容C1的半径r1及电容C2的半径r2。该步骤可通过测量仪器测量获得。
获得分别经过电容C1及电容C2的圆心的两条直线O1及O2之间的距离H。其中，所述直线O1及O2的延伸方向与所述切线T1及T2的延伸方向相同。即直线O1及O2与切线T1及T2平行，四条直线均垂直电容的预设排布方向。例如，若电容的预设排布方向为水平方向，则所述直线O1及O2与切线T1及T2为竖直方向。在图4中，所述电容的预设排布方向为与水平方向呈一夹角的D方向，则所述直线O1及O2与切线T1及T2的延伸方向垂直D方向。
在本实施例中，获得分别经过相邻的两个电容圆心的两条直线之间的距离的步骤还包括：将两个电容圆心在预设排布方向上的投影坐标点之间的距离作为经过相邻的两个电容 圆心的两条直线之间的距离。请参阅图4，电容C1的圆心在预设排布方向(D方向)上的投影坐标为(x1，y1)，电容C2的圆心在预设排布方向(D方向)上的投影坐标为(x2，y2)，则电容C1与电容C2的圆心在预设排布方向上的投影坐标点之间的距离可通过勾股定理计算。列举一个简单的例子，如图5所示，当预设排布方向为水平方向(X方向)时，电容C1及电容C2在预设排布方向上的投影坐标分别为(x1，y1)及(x2，y1)的纵坐标相同，可忽略不计，则投影坐标点之间的距离为横坐标x2与x1之差。
在获得分别经过电容C1及电容C2的圆心的两条直线O1及O2之间的距离H后，将两条直线O1及O2之间的距离H与两个电容C1及C2的半径r1及r2做差，该差值作为所述切线T1及T2之间的距离S，S＝H-r1-r2。所述距离S即为电容C1及电容C2在预设排布方向上的最短距离。
请参阅图6，本公开实施例提供的测量电容C1与电容C2相邻面的切线T1及切线T2之间的距离的另一种方法如下：
获得电容C1的直径d1及电容C2的直径d2。该步骤可通过测量仪器测量获得。
获得电容C1及电容C2不相邻面的第一切线之间的距离，所述第一切线的延伸方向与电容C1及电容C2相邻面的切线的延伸方向相同。电容C1及电容C2不相邻面的第一切线分别为切线T3及切线T4。切线T3及切线T4与切线T1及切线T2的延伸方向相同，即切线T3及切线T4与切线T1及切线T2平行。可以理解的是，切线T3及切线T4之间的距离S1取向与切线T1及切线T2之间的距离S的取向相同。例如，切线T3及切线T4之间的距离S1为切线T3及切线T4沿预设排布方向(D方向)的距离。
获得切线T3及切线T4之间的距离S1与电容C1及电容C2的直径d1及d2的差值。所述差值为所述切线T1及T2之间的距离S，即所述差值为电容C1及电容C2在预设排布方向上的最短距离，S＝S1-d1-d2。
本公开实施例提供上述两种测量电容C1与电容C2相邻面的切线T1及切线T2之间的距离的方法，本领域技术人员也可采用其他方法测量电容C1与电容C2相邻面的切线T1及切线T2之间的距离。
上述测量方法获得的相邻电容的最短距离通常用于评价电容制程。因此，本公开实施例还提供一种评价电容制程的方法。本公开实施例评价电容制程的方法是获得两个电容之间的最短距离与预设值进行比较，以评价电容制程。
其中，两个电容之间的最短距离采用如上所述的测量方法获得。所述预设值为电容按照预设排布方向进行排布时的所述切线之间的距离。所述预设值即为对半导体装置进行设计时的设计值。例如，请参阅图3，所述预设值即为电容C1及C2按照预设排布方向排布， 且未发生偏移的情况下，切线T1及切线T2之间的距离。该距离可为沿电容的预设排布方向的距离。
在一些实施例中，所述评价电容制程包括评价电容之间短路的概率及电容开口的程度。
当两个电容之间的最短距离小于预设值时，可用于评价电容之间短路的概率，进而判断出制程的好坏以及对良率的影响。例如，两个电容之间的最短距离与预设值的偏差与电容之间发生短路的概率呈正比。两个电容之间的最短距离与预设值的偏差越大，电容之间发生短路的概率越高。
当两个电容之间的最短距离大于预设值时，可用于电容开口的程度。例如，两个电容之间的最短距离与预设值的偏差与电容开口的程度呈正比。两个电容之间的最短距离与预设值的偏差越大，电容开口的程度越大。
本公开实施例还提供一种评价电容制程的方法。下面结合图7描述本公开实施例评价电容制程的方法。请参阅图7，半导体装置包括多个电容C。
步骤一、设置多个取样区域，例如，设置了取样区域A1、A2、A3、A4及A5。多个所述取样区域可有序或者无序排布，在本实施例中，所述取样区域有序排布。
步骤二、在每一取样区域中，沿预设排布方向(D方向)选择多个电容，作为一个电容组。多个取样区域能够获得多个电容组。多个电容组有序或者无序设置。在本实施例中，多个电容组有序设置，且在与预设排布方向(D方向)呈预设角度方向上依次排布。图7中，各电容组内电容的排布方式都是相同的；在其他实施例中，各电容组内电容的排布方式也可以是不同的。图7中，每一电容组内的电容的排布方式是有序的；在其他实施例中，每一电容组内的电容的排布方式也可以是无序的。
例如，在本实施例中，在取样区域A1中沿预设排布方向(D方向)选择5个电容，作为第一电容组；在取样区域A2中沿预设排布方向(D方向)选择5个电容，作为第二电容组；在取样区域A3中沿预设排布方向(D方向)选择5个电容，作为第三电容组；在取样区域A4中沿预设排布方向(D方向)选择5个电容，作为第四电容组；在取样区域A5中沿预设排布方向(D方向)选择5个电容，作为第五电容组。可以理解的是，在其他实施例中，所述电容组中的电容的数量也可为其他数目。
步骤三、获得每一电容组中的相邻电容最短距离的最大值与最小值之差，作为初始参数。其中，每一电容组中的相邻电容最短距离采用上述的测量方法获得。
步骤四、获得多个电容组的初始参数的平均值，所述平均值作为评价电容制程的参数。
例如，第一电容组中相邻的电容的最短距离分别为S1.1、S1.2、S1.3、S1.4及S1.5；第二电容组中相邻的电容的最短距离分别为S2.1、S2.2、S2.3、S2.4及S2.5；第三电容组中相 邻的电容的最短距离分别为S3.1、S3.2、S3.3、S3.4及S3.5；第四电容组中相邻的电容的最短距离分别为S4.1、S4.2、S4.3、S4.4及S4.5，第五电容组中相邻的电容的最短距离分别为S5.1、S5.2、S5.3、S5.4及S5.5。
所述平均值为：P＝Average((Max(S1.1；S1.2；S1.3；S1.4；S1.5)-Min(S1.1；S1.2；S1.3；S1.4；S1.5))+(Max(S2.1；S2.2；S2.3；S2.4；S2.5)-Min(S2.1；S2.2；S2.3；S2.4；S2.5))+(Max(S3.1；S3.2；S3.3；S3.4；S3.5)-Min(S3.1；S3.2；S3.3；S3.3；S3.4；S3.5))+(Max(S4.1；S4.2；S4.3；S4.4；S4.5)-Min(S4.1；S4.2；S4.3；S4.4；S4.5))+(Max(S5.1；S5.2；S5.3；S5.4；S5.5)-Min(S5.1；S5.2；S5.3；S5.4；S5.5)))，其中Max(；；…)表示取最大值的运算，Min(；；…_)表示取最小值的运算，Average(；；…)表示取平均值的运算。
所述平均值P可用于评价相邻电容发生短路的概率。所述平均值P越小，说明电容分布均匀，则制程稳定发生偏移的概率较低，则相邻电容发生短路的概率越低。所述平均值P越大，电容分布混乱，容易发生偏移和短路，减少良率，则制程需要优化。
在一些实施例中，可通过合理选择取样区域和计算方法提高评价的准确性。
以上所述仅是本公开实施例的示例性实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本公开实施例原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本公开实施例的保护范围。

Claims (10)

  1. 一种测量电容之间最短距离的方法，获得相邻两个电容相邻面的切线之间的距离，将所述相邻两个电容相邻面的切线之间的距离作为两个电容之间的最短距离，其中，相邻的两个电容的相邻面的所述切线的方向相同，且所述切线的方向与电容的预设排布方向垂直。
  2. 根据权利要求1所述的测量电容之间最短距离的方法，其中，将相邻的两个电容相邻面的切线之间沿所述预设排布方向上的距离作为两个电容之间的最短距离。
  3. 根据权利要求2所述的测量电容之间最短距离的方法，其中，所述电容为柱状电容，所述切线为所述电容的横截面的切线。
  4. 根据权利要求3所述的测量电容之间最短距离的方法，其中，获得相邻的两个电容相邻面的切线之间的距离的步骤还包括：
    获得相邻的两个电容的半径；
    获得分别经过相邻的两个电容圆心的两条直线之间的距离，所述直线的延伸方向与所述切线的延伸方向相同；
    将两条直线之间的距离与两个电容的半径之差作为所述切线之间的距离。
  5. 根据权利要求3所述的测量电容之间最短距离的方法，其中，获得分别经过相邻的两个电容圆心的两条直线之间的距离的步骤还包括：将两个电容圆心在预设排布方向上的投影坐标点之间的距离作为经过相邻的两个电容圆心的两条直线之间的距离。
  6. 根据权利要求3所述的测量电容之间最短距离的方法，其中，获得相邻的两个电容相邻面的切线之间的距离的步骤还包括：
    获得相邻的两个电容的直径；
    获得相邻的两个电容不相邻面的第一切线之间的距离，所述第一切线的延伸方向与所述相邻的两个电容相邻面的切线的延伸方向相同；
    获得所述第一切线之间的距离与两个电容的直径的差值，所述差值作为相邻的两个电容的最短距离。
  7. 一种评价电容制程的方法，获得两个电容之间的最短距离与预设值进行比较，以评价电容制程，其中，两个电容之间的最短距离采用如权利1～6任意一项所述的方法获得，所述预设值为电容按照预设排布方向进行排布时的所述切线之间的距离。
  8. 一种评价电容制程的方法，包括如下步骤：
    设置多个取样区域；
    在每一所述取样区域，沿预设排布方向得到多个电容，作为一个电容组，进而获得多个电容组；
    获得每一所述电容组中的相邻电容最短距离的最大值与最小值之差，作为初始参数，其中，每一所述电容组中的相邻电容最短距离采用如权利1～6任意一项所述的方法获得；
    获得多个电容组的初始参数的平均值，所述平均值作为评价电容制程的参数。
  9. 根据权利要求8所述的评价电容制程的方法，其中，所述方法还包括：
    以有序或无序方式设置所述多个电容组。
  10. 根据权利要求9所述的评价电容制程的方法，其中，所述以有序或无序方式设置所述多个电容组，包括：
    与预设排布方向呈预设角度方向上依次排布所述多个电容组。
PCT/CN2021/099828 2020-07-27 2021-06-11 测量电容之间最短距离的方法及评价电容制程的方法 WO2022022114A1 (zh)

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