WO2022007150A1 - 显示面板及显示面板的制备方法 - Google Patents

显示面板及显示面板的制备方法 Download PDF

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Publication number
WO2022007150A1
WO2022007150A1 PCT/CN2020/112435 CN2020112435W WO2022007150A1 WO 2022007150 A1 WO2022007150 A1 WO 2022007150A1 CN 2020112435 W CN2020112435 W CN 2020112435W WO 2022007150 A1 WO2022007150 A1 WO 2022007150A1
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Prior art keywords
layer
display panel
display area
film layer
substrate
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PCT/CN2020/112435
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English (en)
French (fr)
Inventor
张乐陶
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US17/056,748 priority Critical patent/US20220310981A1/en
Publication of WO2022007150A1 publication Critical patent/WO2022007150A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/818—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/40—Thermal treatment, e.g. annealing in the presence of a solvent vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the present disclosure relates to the technical field of panel display, and in particular, to a display panel and a method for fabricating the display panel.
  • each display device puts forward higher and higher requirements on the size and performance of the display panel.
  • AMOLED Active-matrix organic light-emitting diode
  • LCD liquid crystal display
  • OLED organic light-emitting diode
  • the most widely used is bottom-emitting WOLED, which is usually prepared by evaporation method when preparing the bottom-emitting device.
  • this preparation process wastes a lot of organic light-emitting materials, and the aperture ratio of the device is also low. It is beneficial to the application of high-resolution display devices.
  • the top emission type OLED device prepared by the existing process in the preparation process, many masks are often used, and the process is complicated. It is not conducive to the improvement of the comprehensive performance of the display panel.
  • the embodiments of the present disclosure provide a display panel and a method for fabricating the display panel, so as to solve the problem of serious waste of organic light-emitting materials, low aperture ratio of the device, and complicated preparation process in the existing display panel. And other issues.
  • a method for fabricating a display panel including the following steps:
  • S100 Provide a substrate, deposit a passivation layer on the display area and the non-display area of the substrate, and perform patterning processing;
  • S101 preparing a planarization layer on the passivation layer shown, and patterning the passivation layer and the planarization layer;
  • S102 Prepare a composite anode film layer on the planarization layer, the composite anode film layer includes a first electrode layer, metallic silver and a second electrode layer arranged in sequence, and perform an etching process on the composite anode film layer , wherein the substrate corresponding to the non-display area is processed by a halftone mask process;
  • S103 Perform heat treatment on the substrate in the non-display area, and perform the heat treatment at a temperature of 100°C to 150°C under the protection of a protective gas, so that the composite anode film layer corresponding to the non-display area is crystalline change;
  • S105 Prepare a pixel definition layer, and obtain the display panel.
  • the step S102 further includes: simultaneously performing photolithography processing on the substrates corresponding to the display area and the non-display area by using a one-step halftone mask process.
  • the mask corresponding to the non-display area is a semi-transmissive mask.
  • the first electrode layer when preparing the composite anode film layer, is disposed on the planarization layer.
  • the first electrode layer is electrically connected to the thin film transistors and metal traces in the display panel through via holes.
  • the film layer on the side of the passivation layer away from the substrate is set as a SiNx film layer, and the thickness of the SiNx film layer is 5nm ⁇ 500nm.
  • a method for manufacturing a display panel including the following steps:
  • S100 Provide a substrate, deposit a passivation layer on the display area and the non-display area of the substrate, and perform patterning processing;
  • S101 preparing a planarization layer on the passivation layer shown, and patterning the passivation layer and the planarization layer;
  • S102 Prepare a composite anode film layer on the planarization layer and perform an etching process, wherein the substrate corresponding to the non-display area is processed by a halftone mask process;
  • S105 Prepare a pixel definition layer, and obtain the display panel.
  • the step S102 further includes: simultaneously performing photolithography processing on the substrates corresponding to the display area and the non-display area by using a one-step halftone mask process.
  • the mask corresponding to the non-display area is a semi-transmissive mask.
  • the heat treatment process includes: performing the heat treatment at 100° C. ⁇ 150° C. under the protection of a protective gas.
  • the composite anode film layer when preparing the composite anode film layer, includes a first electrode layer, metallic silver and a second electrode layer arranged in sequence, and the first electrode layer is arranged on the on the planarization layer.
  • the first electrode layer is electrically connected to the thin film transistors and the metal wires in the display panel through via holes.
  • the film layer on the side of the passivation layer away from the substrate is set as a SiNx film layer, and the thickness of the SiNx film layer is 5nm ⁇ 500nm.
  • a display panel is further provided, wherein the display panel includes:
  • the passivation layer is disposed on the substrate
  • the pixel definition layer is disposed on the planarization layer corresponding to the display area;
  • the display panel further includes a composite anode film layer and a first electrode layer, the composite anode film layer is disposed in the pixel opening area corresponding to the pixel definition layer, and the first electrode layer is disposed in the non-display On the passivation layer corresponding to the region, the composite anode film layer is electrically connected to the thin film transistor through a first via hole, and the first electrode layer is electrically connected to the metal wiring in the substrate through a second via hole.
  • the composite anode film layer includes an indium tin oxide film layer, a metallic silver layer and a second electrode layer, and the metallic silver layer is disposed on the indium tin oxide film layer.
  • the first electrode layer includes a grained indium tin oxide film layer.
  • the material of the passivation layer includes SiO 2 , SiNx, and Al 2 O 3 .
  • the material of the passivation layer is SiNx, and the thickness of the passivation layer is 5 nm ⁇ 500 nm.
  • the display panel further includes a metal wire, and the metal wire is disposed in a non-display area of the display panel.
  • the material of the metal wiring includes Mo, Al, Ti, and Cu.
  • Embodiments of the present disclosure provide a method for fabricating a display panel and a display panel.
  • the display panel includes a display area and a binding area.
  • a halftone mask process is used at the same time.
  • the electrode layers corresponding to the display area and the binding area are prepared to simplify the preparation process of the display panel.
  • the electrode layer in the binding area is heat-treated to make it crystallized, and the excess film layer on the electrode layer is removed.
  • the preparation method in the embodiment of the present disclosure is simpler and more effective, and the bonding effect between the electrode layer and the substrate in the display panel provided in the present embodiment is better, and the comprehensive performance of the display panel is good.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a film layer structure of a display panel according to an embodiment of the disclosure
  • FIG. 3 is a schematic diagram of a manufacturing process flow diagram of a display panel according to an embodiment of the present disclosure
  • 3A to 3C are schematic diagrams of film layer structures corresponding to the method for fabricating the display panel provided by the disclosed embodiment
  • 4A to 4D are schematic diagrams of a process flow diagram for preparing a composite anode film layer according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of crystallization of the first electrode layer provided by the disclosed embodiment.
  • FIG. 6 is a schematic diagram of a film layer structure of yet another display panel according to an embodiment of the present disclosure.
  • Display panels have been widely used in various display devices.
  • the utilization rate of materials is often not high, and in the preparation process, more
  • the multi-pass mask processing has a complicated preparation process, which is not conducive to the improvement of the comprehensive performance of the display panel and the reduction of the cost.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure.
  • the display panel includes a substrate 10 and an array substrate 11 .
  • the array substrate 11 is disposed on the substrate 10, wherein the substrate 10 may include a glass substrate or a flexible substrate, and the array substrate 11 may be a common thin film transistor array substrate.
  • the non-display area 13 is arranged around the display area 12, and at the same time, the non-display area 13 also includes a binding area 14, and a plurality of connection terminals can be arranged in the binding area 14, through a plurality of connections The terminals bind some devices and circuits to the array substrate 11 .
  • FIG. 2 is a schematic diagram of a film layer structure of a display panel according to an embodiment of the present disclosure.
  • the display panel includes a display area AA and a non-display area BB.
  • the display area AA may be adjacent to the non-display area BB, and the non-display area BB is close to the edge of the display panel.
  • the non-display area BB is located at the border of the display panel.
  • the binding area of is described as an example.
  • the display panel further includes a substrate 100 , a passivation layer 101 and an insulating layer 102 .
  • the passivation layer 101 is provided on the substrate 100
  • the insulating layer 102 is provided on the passivation layer 101 .
  • the material of the passivation layer 101 is preferably one or more of SiO2, SiNx, and Al2O3.
  • the passivation layer 101 may be at least one layer of film structure, and the passivation layer 101 may be an insulating film layer prepared by a plasma-enhanced chemical vapor deposition method.
  • the material of the insulating layer 102 is SiNx material, and the thickness of the SiNx film layer is 5 nm ⁇ 500 nm.
  • the passivation layer 101 and the insulating layer 102 can be set as a single film layer.
  • the material on the upper surface of the film layer is set as SiNx material, and the thickness of the SiNx film layer is 5 nm. ⁇ 500nm.
  • the display panel further includes a thin film transistor device layer 109 and a metal wiring layer 110 .
  • the thin film transistor device layer 109 is disposed in the area corresponding to the display area AA of the display panel, and the metal wiring layer 110 is disposed in the area corresponding to the non-display area BB of the display panel.
  • the passivation layer 101 covers the thin film transistor device layer 109 and the metal wiring layer 110 .
  • the material of the metal wiring layer 110 may include one or a combination of metals such as Mo, Al, Ti, and Cu.
  • the display panel provided by the embodiment of the present disclosure further includes a planarization layer 104, the planarization layer 104 is disposed on the insulating layer 102, and the planarization layer 104 is disposed at a position corresponding to the area AA of the display panel.
  • the display panel further includes a composite anode film layer.
  • the composite anode film layer includes a multi-layer film layer, and specifically includes a first electrode layer 105 , a metallic silver layer 106 and a second electrode layer 107 .
  • the first electrode layer 105 is disposed on the planarization layer 104 corresponding to the display area AA of the display panel, and at the same time, the composite anode film layer is disposed on the pixel light-emitting opening area corresponding to the display area AA of the display panel.
  • the metallic silver layer 106 is disposed on the first electrode layer 105
  • the second electrode layer 107 is disposed on the metallic silver layer 106 .
  • the materials of the first electrode layer 105 and the second electrode layer 107 may be the same, and are preferably an indium tin oxide electrode film layer.
  • the third electrode layer 103 is disposed on the film layer corresponding to the non-display area of the display panel. Specifically, the third electrode layer 103 is disposed on the insulating layer 102 .
  • the third electrode layer 103 and the first electrode layer 105 can be prepared from the same electrode film layer, that is, the same film layer forms the first electrodes in different regions under the action of different masks. layer 105 and third electrode layer 103 .
  • the first electrode layer 105 , the second electrode layer 107 and the third electrode layer 103 can be prepared from the same material.
  • the third electrode layer 103 in order to improve the adhesion performance between the third electrode layer 103 and the insulating layer 102 in the non-display area BB, the third electrode layer 103 is also subjected to heat treatment.
  • the material of the third electrode layer 103 is crystallized.
  • the first electrode layer 105 does not need to be subjected to a corresponding heat treatment process.
  • the display panel provided by the embodiment of the present disclosure further includes a first via hole 111 and a second via hole 112 .
  • the first via hole 111 is disposed on a region corresponding to the thin film transistor device layer 109 in the display area AA, and the first via hole 111 penetrates through the passivation layer 101 , the insulating layer 102 and the planarization layer 104 .
  • the second via hole 112 is disposed on the film layer corresponding to the metal wiring layer 110 in the non-display area BB of the display panel. Meanwhile, the second via hole 112 penetrates the passivation layer 101 and the insulating layer 102 .
  • the first electrode layer 105 is electrically connected to the thin film transistor device layer 109 through the first via hole 111
  • the third electrode layer 103 is electrically connected to the metal wiring layer 110 through the second via hole 112 , thereby realizing the display panel data. and control signal transmission.
  • the display panel further includes a pixel definition layer 108.
  • the pixel definition layer 108 is arranged on the film layer corresponding to the display area AA of the display panel.
  • the pixel definition layer 108 is also provided with a plurality of pixel openings, and the composite electrode layer is arranged on the corresponding pixel. in the open area.
  • an embodiment of the present disclosure also provides a method for fabricating a display panel. Specifically, as shown in FIG. 3 , the fabrication method includes the following steps:
  • S100 Provide a substrate, deposit a passivation layer on the display area and the non-display area of the substrate, and perform patterning processing;
  • S101 preparing a planarization layer on the passivation layer shown, and patterning the passivation layer and the planarization layer;
  • FIG. 3A and FIG. 3B are schematic diagrams of film layer structures corresponding to the manufacturing method of the display panel provided by the embodiment of the present disclosure.
  • a substrate 100 is provided, which can be an array substrate, and a thin film transistor device layer 109 is prepared in a display area corresponding to the substrate 100 , and a metal wiring layer 110 is prepared in an area corresponding to the non-display area.
  • a passivation layer 101 is prepared on the substrate 100 , and the passivation layer 101 completely covers the thin film transistor device layer 109 and the metal wiring layer 110 .
  • an insulating layer 102 is prepared on the passivation layer 101, wherein the material of the insulating layer 102 is SiNx, and the preferred thickness of the SiNx film layer is 5 nm ⁇ 500 nm.
  • a planarization layer 104 is prepared on the insulating layer 102, and the planarization layer 104 is disposed on an area corresponding to the display area of the display panel.
  • the corresponding film layers are patterned to form a first via hole and a second via hole structure.
  • a halftone mask can be used to pattern the corresponding film layer to form the required film layer structure.
  • S102 Prepare a composite anode film layer on the planarization layer and perform an etching process, wherein the substrate corresponding to the non-display area is processed by a halftone mask process;
  • a composite anode film layer is disposed on the flat layer of the display panel.
  • the composite anode film layer includes a first electrode layer 105 , a metallic silver layer 106 and a second electrode layer 107 arranged in sequence.
  • the composite anode film layer is treated by a halftone mask process, and the halftone mask plate process is used on the corresponding composite anode film layer in the non-display area of the display panel, and the metal
  • the silver layer 106 and the second electrode layer 107 are etched away, leaving only the first electrode film layer, and the excess photoresist layer is peeled off, wherein the photoresist layer can be polyimide, acrylic, etc. a kind of.
  • FIG. 4A to FIG. 4D are schematic diagrams of the manufacturing process flow of the composite anode film layer provided by the embodiment of the present disclosure.
  • FIG. 4A after the preparation of each film layer of the display panel is completed, the display panel is then subjected to a halftone mask process.
  • the schematic diagrams of the film layers in FIG. 2 and FIG. 3 are combined.
  • the first electrode layer 105 , the metallic silver layer 106 , and the second electrode layer 107 are sequentially disposed on the planarization layer 104 , while the first photoresist layer is disposed on the second electrode layer 107 corresponding to the display area.
  • the thickness of the second electrode layer 107 is 20 nm to 110 nm, and the first electrode layer 105 and the second electrode 107 can both be indium tin oxide film layers, on the second electrode layer 107 corresponding to the non-display area.
  • a second photoresist 114 is provided.
  • the first photoresist layer 113 and the second photoresist layer 114 can be organic photoresist, specifically one of organic photoresist such as polyimide series or acrylic series, and at the same time, the photoresist can have better hydrophobic properties.
  • a halftone mask process is used, that is, a halftone mask process is used in the area corresponding to the second photoresist 114 to etch out the corresponding electrode layer patterns in each area.
  • the first electrode layer 105 on the non-display area is crystallized by low temperature baking to form a crystallized electrode layer 1051 .
  • the heat treatment can be performed at a temperature of 100° C. to 150° C. under the protection of a protective gas.
  • the protective gas may include O2, N2, air, or heat treatment directly in a vacuum environment.
  • the crystal grains in the crystallized electrode layer 1051 after crystallization are finer, so after the insulating layer 102 is bonded, the bonding performance is better and it is not easy to fall off.
  • FIG. 5 is a schematic diagram of the crystallization of the first electrode layer provided by the embodiment of the present disclosure.
  • the film layer includes a metal wiring layer 110 , a first electrode layer 103 , a passivation layer 101 , an insulating layer 102 and a partially unheated indium tin oxide film layer 105 , which are arranged in sequence.
  • the first electrode layer 103 is correspondingly disposed on the metal wiring layer 110 corresponding to the non-display area of the display panel, and is electrically connected to the metal wiring layer 110 through a via structure. After the heat treatment, the internal crystal grains of the material of the first electrode layer 103 are recrystallized and refined, thereby enhancing the adhesion between the first electrode layer 103 and the metal wiring layer 110 , the passivation layer 101 and the insulating layer 102 .
  • S105 Prepare a pixel definition layer, and obtain the display panel.
  • FIG. 6 is a schematic diagram of a film layer structure of still another display panel according to an embodiment of the present disclosure.
  • the pixel definition layer 108 is prepared on the film layer corresponding to the display area, and the electrode layer in this area is arranged in the opening area of the pixel definition layer 108, and finally the display provided by the embodiment of the present disclosure is formed. panel.
  • the patterning of each film layer and the process of the via structure may include processes such as photoresist coating, exposure, and development, but are not limited to the above processes;
  • the preparation method can be applied to the AMOLED panel of the top emission mode type obtained by evaporation or inkjet printing.

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Abstract

本揭示实施例提供一种显示面板的制备方法及显示面板，包括显示区和非显示区，在制备显示面板的电极层时，采用一道次半色调掩膜板工艺对各电极层处理，还对非显示区内的电极层热处理，使其晶粒化，从而增强并改善电极层与基板之间的粘接效果。本揭示实施例中的制备方法更简单有效并且电极层与膜层之间的粘接效果更好。

Description

显示面板及显示面板的制备方法 技术领域
本揭示涉及面板显示技术领域，尤其涉及一种显示面板及显示面板的制备方法。
 背景技术
随着显示技术的不断发展，各显示器件对显示面板的尺寸及性能提出了越来越高的要求。
其中，有源矩阵有机发光二极管（Active-matrix organic light-emitting diode，AMOLED）技术是面板行业的发展趋势，相比液晶显示器（Liquid crystal display，LCD）而言，OLED具有结构简化，色域更广，响应时间更快等优点。目前应用最广的是底发光型WOLED，在制备该底发光型器件时通常采用蒸镀的方法进行制备，但是该制备工艺对有机发光材料浪费极大，并且器件的开口率也较低，不利于高分辨率显示器件的应用。同时，对于现有工艺制备的顶发光型OLED器件而言，在制备过程中，往往采用的光罩次数多，并且工艺复杂。不利于显示面板综合性能的提高。
因此需要对现有技术中的问题提出解决方法。
 技术问题
综上所述，现有的显示面板以及显示面板的制备工艺技术中，存在着有机发光材料的浪费较严重，并且器件的开口率较低，同时，还存在着光刻次数多、制备工艺复杂等问题，不利于显示面板综合性能的提高。
 技术解决方案
为解决上述问题，本揭示实施例提供一种显示面板及显示面板的制备方法，以解决现有的显示面板中，有机发光材料的浪费较严重，并且器件的开口率较低，以及制备工艺复杂等问题。
为解决上述技术问题，本揭示实施例提供的技术方案如下：
根据本揭示实施例的第一方面，提供了一种显示面板的制备方法，包括如下步骤：
S100：提供基板，在所述基板的显示区和非显示区上沉积钝化层并进行图案化处理；
S101：在所示钝化层上制备平坦化层，并对所述钝化层和所述平坦化层图案化处理；
S102：在所述平坦化层上制备复合阳极膜层，所述复合阳极膜层包括依次设置的第一电极层、金属银以及第二电极层，并对所述复合阳极膜层进行蚀刻工艺处理，其中，对所述非显示区对应的基板采用半色调掩膜板工艺进行处理；
S103：对所述非显示区内的基板进行热处理，在100℃~150℃温度下并在保护气体的保护作用下进行所述热处理，使所述非显示区对应的所述复合阳极膜层晶体化；
S104：剥离所述非显示区域对应的所述复合阳极膜层多余的膜层，得到电极膜层；
S105：制备像素定义层，并得到所述显示面板。
根据本揭示一实施例，所述步骤S102中还包括：采用一步半色调掩膜板工艺同时对所述显示区和所述非显示区对应的基板进行光刻处理。
根据本揭示一实施例，所述非显示区对应的掩膜板为半透过掩膜板。
根据本揭示一实施例，制备所述复合阳极膜层时，将所述第一电极层设置在所述平坦化层上。
根据本揭示一实施例，所述第一电极层通过过孔与所述显示面板内的薄膜晶体管和金属走线电连接。
根据本揭示一实施例，所述步骤S100中，在制备所述钝化层时，所述钝化层远离所述基板一侧的膜层设置为SiNx膜层，所述SiNx膜层的厚度为5nm~500nm。
根据本揭示实施例的第二方面，提供了一种显示面板的制备方法，包括如下步骤：
S100：提供基板，在所述基板的显示区和非显示区上沉积钝化层并进行图案化处理；
S101：在所示钝化层上制备平坦化层，并对所述钝化层和所述平坦化层图案化处理；
S102：在所述平坦化层上制备复合阳极膜层并进行蚀刻工艺处理，其中，对所述非显示区对应的基板采用半色调掩膜板工艺进行处理；
S103：对所述非显示区内的基板进行热处理，使所述非显示区对应的所述复合阳极膜层晶体化；
S104：剥离所述非显示区域对应的所述复合阳极膜层多余的膜层，得到电极膜层；
S105：制备像素定义层，并得到所述显示面板。
根据本揭示一实施例，所述步骤S102中还包括：采用一步半色调掩膜板工艺同时对所述显示区和所述非显示区对应的基板进行光刻处理。
根据本揭示一实施例，所述非显示区对应的掩膜板为半透过掩膜板。
根据本揭示一实施例，所述步骤S103中，所述热处理工艺包括：在100℃~150℃下并在保护气体的保护作用下进行所述热处理。
根据本揭示一实施例，制备所述复合阳极膜层时，所述复合阳极膜层包括依次设置的第一电极层、金属银以及第二电极层，且所述第一电极层设置在所述平坦化层上。
根据本揭示一实施例，所述第一电极层通过过孔与所述显示面板内的薄膜晶体管和金属走线电连接。
根据本揭示一实施例，所述步骤S100中，在制备所述钝化层时，所述钝化层远离所述基板一侧的膜层设置为SiNx膜层，所述SiNx膜层的厚度为5nm~500nm。
根据本揭示实施例的第三方面，还提供一种显示面板，其特征在于，所述显示面板包括：
衬底；
钝化层，所述钝化层设置在所述衬底上；
平坦化层，所述平坦化层设置在所述显示区对应的所述钝化层上；以及
像素定义层，所述像素定义层设置在所述显示区对应的所述平坦化层上；
其中，所述显示面板还包括复合阳极膜层和第一电极层，所述复合阳极膜层设置在所述像素定义层对应的像素开口区域内，所述第一电极层设置在所述非显示区对应的钝化层上，且所述复合阳极膜层通过第一过孔与薄膜晶体管电连接，所述第一电极层通过第二过孔与所述衬底内的金属走线电连接。
根据本揭示一实施例，所述复合阳极膜层包括氧化铟锡膜层、金属银层以及第二电极层，所述金属银层设置在所述氧化铟锡膜层上。
根据本揭示一实施例，所述第一电极层包括晶粒化的氧化铟锡膜层。
根据本揭示一实施例，所述钝化层的材料包括SiO 2、SiNx、Al 2O 3。
根据本揭示一实施例，所述钝化层的材料为SiNx，所述钝化层的厚度为5nm~500nm。
根据本揭示一实施例，所述显示面板还包括金属走线，所述金属走线设置在所述显示面板的非显示区域内。
根据本揭示一实施例，所述金属走线的材料包括Mo、Al、Ti、Cu。
 有益效果
综上所述，本揭示实施例的有益效果为：
本揭示实施例提供一种显示面板的制备方法及显示面板，显示面板包括显示区和绑定区，在制备显示面板的电极层或氧化铟锡膜层时，采用一次半色调掩膜板工艺同时制备获得显示区和绑定区内对应的电极层，以简化显示面板的制备工艺。并且还对绑定区内的电极层热处理，使其晶粒化，并去除掉该电极层上的多余膜层。以进一步增强并改善电极层与基板之间的粘接效果。本揭示实施例中的制备方法更加简单有效并且，本实施例中提供的显示面板内的电极层与基板之间的粘接效果更好，显示面板的综合性能良好。
 附图说明
图1为本揭示实施例提供的显示面板的结构示意图；
图2为本揭示实施例提供的显示面板的膜层结构示意图；
图3为本揭示实施例提供的显示面板的制备工艺流程示意图；
图3A~图3C为本揭示实施例提供的显示面板的制备方法对应的膜层结构示意图；
图4A~图4D为本揭示实施例提供的复合阳极膜层制备工艺流程示意图；
图5为本揭示实施例提供的第一电极层结晶示意图；
图6为本揭示实施例提供的又一显示面板的膜层结构示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本揭示可用以实施的特定实施例。
显示面板已被广泛的应用于各种显示设备中，但是，在制备不同类型的显示面板时，尤其是在制备AMOLED面板，往往存在着材料的利用率不高，并且在制备过程中，需要较多道次的光罩处理，制备工艺较复杂，不利于显示面板综合性能的提高以及成本的降低。
本揭示实施例提供一种显示面板及显示面板的制备方法，以解决现有技术中存在的问题，如图1所述，图1为本揭示实施例提供的显示面板的结构示意图。
显示面板包括衬底10以及阵列基板11。阵列基板11设置在衬底10上，其中衬底10可包括玻璃基板或柔性基板，阵列基板11可为常用的薄膜晶体管阵列基板。
以及显示区域12和非显示区域13。本揭示实施例中，非显示区域13围绕所述显示区12设置，同时，在非显示区域13内还包括绑定区14，在绑定区14还可设置多个连接端子，通过多个连接端子将部分器件及线路与阵列基板11相绑定。
具体的，如图2所示，图2为本揭示实施例提供的显示面板的膜层结构示意图。显示面板包括显示区AA以及非显示区BB，显示区AA可与非显示区BB相邻，且非显示区BB靠近显示面板的边缘，本揭示实施例中，非显示区BB以显示面板边界处的绑定区为例进行说明。
显示面板还包括衬底100、钝化层101以及绝缘层102，钝化层101设置在衬底100上，绝缘层102设置在钝化层101上。本揭示实施例中，钝化层101的材料优选为SiO2、SiNx、Al2O3中的一种或者其多种材料。其中，钝化层101可为至少一层膜层结构，钝化层101可通过等离子体增强化学的气相沉积方法制备得到的绝缘膜层。
进一步的，所述绝缘层102的材料为SiNx材料，且SiNx膜层的厚度为5nm~500nm。
本揭示实施例中，钝化层101和绝缘层102可设置为一层膜层，当为一层膜层时，其膜层上表面的材料设置为SiNx材料，且SiNx膜层的厚度为5nm~500nm。
具体的，显示面板还包括薄膜晶体管器件层109和金属走线层110。其中薄膜晶体管器件层109设置在显示面板显示区AA对应的区域内，金属走线层110设置在显示面板非显示区BB对应的区域内。同时，钝化层101覆盖所述薄膜晶体管器件层109和金属走线层110。
金属走线层110的材料可包括Mo、Al、Ti、Cu等金属中的一种或者几种的组合。
优选的，本揭示实施例提供的显示面板还包括平坦化层104，平坦化层104设置在绝缘层102上，且所述平坦化层104设置在显示面板AA区对应的位置上。
进一步的，显示面板还包括复合阳极膜层，本揭示实施例中复合阳极膜层包括多层膜层，具体的包括第一电极层105、金属银层106以及第二电极层107。
第一电极层105设置在显示面板显示区域AA对应的平坦化层104上，同时，复合阳极膜层设置在显示面板显示区域AA对应的像素发光开口区域上。且金属银层106设置在第一电极层105上，第二电极层107设置在金属银层106。
其中，第一电极层105和第二电极层107的材料可相同，优选的为氧化铟锡电极膜层。
以及第三电极层103，第三电极层103设置在显示面板非显示区域对应的膜层上，具体的，第三电极层103设置在绝缘层102上。
本揭示实施例中，第三电极层103和第一电极层105可由同一电极膜层制备而来，即同一膜层在不同的掩膜板的作用下，分别在不同的区域内形成第一电极层105和第三电极层103。
第一电极层105、第二电极层107以及第三电极层103可由相同的材料制备而得到。
进一步的，本揭示实施例中，为了提高非显示区域BB内第三电极层103与绝缘层102之间的粘接性能，还对第三电极层103进行热处理。使第三电极层103的材料发生晶化。
晶化后的第三电极层103由于晶粒变得更细小，因此，有效的提高了第三电极层103与绝缘层102之间的粘着力，进而提高粘结效果。而第一电极层105并不需要进行相应的热处理工艺。
同时，本揭示实施例提供的显示面板还包括第一过孔111和第二过孔112。第一过孔111设置在显示区域AA内的薄膜晶体管器件层109对应的区域上，且第一过孔111贯穿钝化层101、绝缘层102和平坦化层104。
第二过孔112设置在显示面板非显示区域BB内的金属走线层110对应的膜层上。同时，第二过孔112贯穿钝化层101和绝缘层102。
其中，第一电极层105通过第一过孔111与薄膜晶体管器件层109电连接，第三电极层103通过所述第二过孔112与金属走线层110相电连接，进而实现显示面板数据及控制信号的传递。
显示面板还包括像素定义层108，像素定义层108设置在显示面板的显示区域AA对应的膜层上，同时，像素定义层108还设置有多个像素开口，复合电极层设置在相对应的像素开口区域内。
进一步的，本揭示实施例还提供一种显示面板的制备方法，具体的如图3所示，制备方法包括如下步骤：
S100：提供基板，在所述基板的显示区和非显示区上沉积钝化层并进行图案化处理；
S101：在所示钝化层上制备平坦化层，并对所述钝化层和所述平坦化层图案化处理；
如图3A、图3B所示，图3A和图3B为本揭示实施例提供的显示面板的制备方法对应的膜层结构示意图。提供一基板100，基板100可为阵列基板，并在基板100对应的显示区域内制备薄膜晶体管器件层109，在非显示区对应的区域制备金属走线层110。
同时，在基板100上制备钝化层101，所述钝化层101完全覆盖薄膜晶体管器件层109和金属走线层110。
并且在钝化层101上制备一绝缘层102，其中绝缘层102的材料为SiNx，优选的SiNx膜层的厚度为5nm~500nm。
在绝缘层102上制备平坦化层104，所述平坦化层104设置在显示面板显示区域对应的区域上。
上述各膜层制备完成后，对相应的膜层图案化处理，并形成第一过孔和第二过孔结构。
本揭示实施例中，步骤S100和步骤S101，可采用一张半色调掩膜板光罩来对相应的膜层进行图案化处理，以形成所需要的膜层结构。
S102：在所述平坦化层上制备复合阳极膜层并进行蚀刻工艺处理，其中，对所述非显示区对应的基板采用半色调掩膜板工艺进行处理；
继续制备相应的电极层。如图3C所示，在显示面板的平坦层上设置复合阳极膜层，具体的，复合阳极膜层包括依次设置的第一电极层105、金属银层106以及第二电极层107。
复合阳极膜层设置完成后，采用半色调掩膜板工艺对所述复合阳极膜层进行处理，在显示面板的非显示区域内对应的复合阳极膜层上采用半色调掩膜板工艺，将金属银层106以及第二电极层107蚀刻掉，仅留下第一电极膜层，并将多余的光阻层剥离，其中，光阻层可以是聚酰亚胺系、亚克力系等有机光阻中的一种。
S103：对所述非显示区内的基板进行热处理，使所述非显示区对应的所述复合阳极膜层晶体化；
S104：剥离所述非显示区域对应的所述复合阳极膜层多余的膜层，得到电极膜层；
具体的，如图4A~图4D所示，图4A~图4D为本揭示实施例提供的复合阳极膜层制备工艺流程示意图。如图4A中所示，显示面板的各膜层制备完成后，再对显示面板进行半色调掩膜板工艺处理。
同时结合图2及图3中的膜层结构示意图。在本揭示实施例中，依次在平坦化层104上设置第一电极层105、金属银层106、第二电极层107，同时在显示区域对应的第二电极层107上设置第一光阻层113，优选的，第二电极层107的厚度为20nm~110nm，且第一电极层105和第二电极107均可为氧化铟锡膜层，并在非显示区域对应的第二电极层107上设置第二光阻114。
第一光阻层113和第二光阻层114可为有机光阻，具体的为聚酰亚胺系或系亚克力系等有机光阻中的一种，同时，所述光阻可具有较好的疏水性能。
进一步的，在对显示面板蚀刻时，采用半色调掩膜板工艺，即在第二光阻114对应的区域内的采用半色调掩膜板工艺进行处理，蚀刻出各个区域内对应的电极层图案。
蚀刻后得到图4B中所示的结构膜层示意图。继续对非显示区域内对应的各电极层进行处理。
如图4C所示，通过低温烘烤使非显示区域上的第一电极层105晶化，形成晶化电极层1051。其中，在进行热处理时，可在100℃~150℃的温度下，并在保护气体的保护作用下进行所述热处理。
所述保护气体可包括O2、N2、空气，或直接在真空环境下进行热处理。晶化后的晶化电极层1051内的晶粒更细小，因此，在于绝缘层102粘接后，其粘接性能更好，不容易脱落。
热处理完成后，继续对电极层处理，如图4D所示，剥离掉半色调工艺未处理完的电极层，即将非显示区内的第二电极层107和金属银层106剥离去除，并在不同的区域内形成不同的电极层图案。
如图5所示，图5为本揭示实施例提供的第一电极层结晶示意图。在非显示区域内，所述膜层包括依次设置的金属走线层110、第一电极层103、钝化层101、绝缘层102以及部分未热处理完全的氧化铟锡膜层105。
第一电极层103对应的设置在显示面板非显示区对应的金属走线层110上，并通过过孔结构与金属走线层110电连接。经过热处理后，第一电极层103的材料内部晶粒再结晶并细化，进而增强了第一电极层103与金属走线层110和钝化层101以及绝缘层102之间的粘接力。
S105：制备像素定义层，并得到所述显示面板。
如图6所示，图6为本揭示实施例提供的又一显示面板的膜层结构示意图。各电极层制备完成后，在显示区对应的膜层上制备像素定义层108，同时将该区域内的电极层设置在像素定义层108的开口区域内，并最终形成本揭示实施例提供的显示面板。
优选的，在上述制程中，在对各膜层图形化处理和过孔结构制程的方式中可包含涂敷光阻，曝光，显影等工艺，但不限于以上制程；同时本揭示实施例提供的制备方法可应用于顶发光模式型，通过蒸镀或喷墨打印而得到的AMOLED面板中。
以上对本揭示实施例所提供的一种显示面板及显示面板的制备方法进行了详细的介绍，以上实施例的说明只是用于帮助理解本揭示的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，而这些修改或者替换，并不使相应技术方案的本质脱离本揭示各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板的制备方法，包括如下步骤：
    S100：提供基板，在所述基板的显示区和非显示区上沉积钝化层并进行图案化处理；
    S101：在所示钝化层上制备平坦化层，并对所述钝化层和所述平坦化层图案化处理；
    S102：在所述平坦化层上制备复合阳极膜层，所述复合阳极膜层包括依次设置的第一电极层、金属银以及第二电极层，并对所述复合阳极膜层进行蚀刻工艺处理，其中，对所述非显示区对应的基板采用半色调掩膜板工艺进行处理；
    S103：对所述非显示区内的基板进行热处理，在100℃~150℃温度下并在保护气体的保护作用下进行所述热处理，使所述非显示区对应的所述复合阳极膜层晶体化；
    S104：剥离所述非显示区域对应的所述复合阳极膜层多余的膜层，得到电极膜层；
    S105：制备像素定义层，并得到所述显示面板。
  2. 根据权利要求1所述的显示面板的制备方法，其中所述步骤S102中还包括：采用一步半色调掩膜板工艺同时对所述显示区和所述非显示区对应的基板进行光刻处理。
  3. 根据权利要求2所述的显示面板的制备方法，其中所述非显示区对应的掩膜板为半透过掩膜板。
  4. 根据权利要求1所述的显示面板的制备方法，其中制备所述复合阳极膜层时，将所述第一电极层设置在所述平坦化层上。
  5. 根据权利要求4所述的显示面板的制备方法，其中所述第一电极层通过过孔与所述显示面板内的薄膜晶体管和金属走线电连接。
  6. 根据权利要求1所述的显示面板的制备方法，其中所述步骤S100中，在制备所述钝化层时，所述钝化层远离所述基板一侧的膜层设置为SiNx膜层，所述SiNx膜层的厚度为5nm~500nm。
  7. 一种显示面板的制备方法，包括如下步骤：
    S100：提供基板，在所述基板的显示区和非显示区上沉积钝化层并进行图案化处理；
    S101：在所示钝化层上制备平坦化层，并对所述钝化层和所述平坦化层图案化处理；
    S102：在所述平坦化层上制备复合阳极膜层并进行蚀刻工艺处理，其中，对所述非显示区对应的基板采用半色调掩膜板工艺进行处理；
    S103：对所述非显示区内的基板进行热处理，使所述非显示区对应的所述复合阳极膜层晶体化；
    S104：剥离所述非显示区域对应的所述复合阳极膜层多余的膜层，得到电极膜层；
    S105：制备像素定义层，并得到所述显示面板。
  8. 根据权利要求7所述的显示面板的制备方法，其中所述步骤S102中还包括：采用一步半色调掩膜板工艺同时对所述显示区和所述非显示区对应的基板进行光刻处理。
  9. 根据权利要求8所述的显示面板的制备方法，其中所述非显示区对应的掩膜板为半透过掩膜板。
  10. 根据权利要求7所述的显示面板的制备方法，其中所述步骤S103中，所述热处理工艺包括：在100℃~150℃下并在保护气体的保护作用下进行所述热处理。
  11. 根据权利要求7所述的显示面板的制备方法，其中制备所述复合阳极膜层时，所述复合阳极膜层包括依次设置的第一电极层、金属银以及第二电极层，且所述第一电极层设置在所述平坦化层上。
  12. 根据权利要求11所述的显示面板的制备方法，其中所述第一电极层通过过孔与所述显示面板内的薄膜晶体管和金属走线电连接。
  13. 根据权利要求7所述的显示面板的制备方法，其中所述步骤S100中，在制备所述钝化层时，所述钝化层远离所述基板一侧的膜层设置为SiNx膜层，所述SiNx膜层的厚度为5nm~500nm。
  14. 一种显示面板，所述显示面板包括显示区和围绕所述显示区的非显示区，所述显示面板包括：
    衬底；
    钝化层，所述钝化层设置在所述衬底上；
    平坦化层，所述平坦化层设置在所述显示区对应的所述钝化层上；以及
    像素定义层，所述像素定义层设置在所述显示区对应的所述平坦化层上；
    其中，所述显示面板还包括复合阳极膜层和第一电极层，所述复合阳极膜层设置在所述像素定义层对应的像素开口区域内，所述第一电极层设置在所述非显示区对应的钝化层上，且所述复合阳极膜层通过第一过孔与薄膜晶体管电连接，所述第一电极层通过第二过孔与所述衬底内的金属走线电连接。
  15. 根据权利要求14所述的显示面板，其中所述复合阳极膜层包括氧化铟锡膜层、金属银层以及第二电极层，所述金属银层设置在所述氧化铟锡膜层上。
  16. 根据权利要求14所述的显示面板，其中所述第一电极层包括晶粒化的氧化铟锡膜层。
  17. 根据权利要求14所述的显示面板，其中所述钝化层的材料包括SiO 2、SiNx、Al 2O 3。
  18. 根据权利要求17所述的显示面板，其中所述钝化层的材料为SiNx，所述钝化层的厚度为5nm~500nm。
  19. 根据权利要求14所述的显示面板，其中所述显示面板还包括金属走线，所述金属走线设置在所述显示面板的非显示区域内。
  20. 根据权利要求19所述的显示面板，其中所述金属走线的材料包括Mo、Al、Ti、Cu。
PCT/CN2020/112435 2020-07-07 2020-08-31 显示面板及显示面板的制备方法 Ceased WO2022007150A1 (zh)

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