WO2022001391A1 - 阵列基板和显示装置 - Google Patents

阵列基板和显示装置 Download PDF

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Publication number
WO2022001391A1
WO2022001391A1 PCT/CN2021/093322 CN2021093322W WO2022001391A1 WO 2022001391 A1 WO2022001391 A1 WO 2022001391A1 CN 2021093322 W CN2021093322 W CN 2021093322W WO 2022001391 A1 WO2022001391 A1 WO 2022001391A1
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Prior art keywords
array substrate
electrode
layer
base substrate
insulating layer
Prior art date
Application number
PCT/CN2021/093322
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English (en)
French (fr)
Inventor
胡竞勇
李哲
王景余
刘建涛
Original Assignee
京东方科技集团股份有限公司
重庆京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 重庆京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/762,952 priority Critical patent/US20220342266A1/en
Publication of WO2022001391A1 publication Critical patent/WO2022001391A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate

Definitions

  • the present application is based on the CN application number 202010597870.7 and the filing date is June 28, 2020, and claims its priority.
  • the disclosure of the CN application is hereby incorporated into the present application as a whole.
  • the present disclosure relates to the field of display technology, and in particular, to an array substrate and a display device.
  • Fringe Field Switching (FFS) display technology is the mainstream display technology in the current LCD wide viewing angle display.
  • This display technology realizes the deflection of liquid crystal molecules through the fringe electric field between the pixel electrode and the common electrode on the array side, thereby realizing display.
  • a 1P2D structure ie 1Pixel 2Domain
  • a 1P2D structure ie 1Pixel 2Domain
  • an array substrate for a liquid crystal display screen comprising: a base substrate; a gate line extending along a first direction on one side of the base substrate; a cover a first insulating layer of the gate line; a data line on the side of the first insulating layer away from the base substrate, the data line and the gate line define a plurality of pixel regions; covering the a second insulating layer of the data line; a common electrode on the side of the second insulating layer away from the data line, the common electrode includes a plurality of parts corresponding to the plurality of pixel regions, and each part includes a plurality of strip-shaped electrodes, adjacent strip-shaped electrodes among the plurality of strip-shaped electrodes have slits between them, each strip-shaped electrode includes a first main body portion extending along the second direction, and a strip-shaped electrode extending along the third direction.
  • the first connection part is connected with the second connection part, the first connection part is connected with the second connection part, the first connection part and the second connection part form a first angle, and the first main body part including a first corner end; and a metal wire on the same layer as the gate line and extending along the first direction, the orthographic projection of the first corner end on the base substrate exceeds the The orthographic projection of the metal wire on the base substrate.
  • the ratio of the width of the strip electrode to the width of the slit ranges from 0.3 to 0.7.
  • the width W 1 of the strip electrodes is in the range of 2 ⁇ m ⁇ W 1 ⁇ 2.8 ⁇ m.
  • the width W 2 of the slit is in the range of 4 ⁇ m ⁇ W 2 ⁇ 5.8 ⁇ m.
  • the range of the sum H 1 of the projected lengths of the first connecting portion and the second connecting portion in a direction perpendicular to the first direction is 3.9 ⁇ m ⁇ H 1 ⁇ 5.9 ⁇ m.
  • the inner side of the part where the first connection part is connected with the second connection part has a concave pattern
  • the outer side of the part where the first connection part and the second connection part are connected Has a convex pattern
  • the area of the inner concave pattern is equal to the area of the outer convex pattern.
  • the shape of the inner concave pattern is the same as the shape of the outer convex pattern.
  • the array substrate further includes: a gate at the same layer as the gate line, the gate is electrically connected to the gate line, and the first insulating layer further covers the gate an active layer and a pixel electrode on the side of the first insulating layer away from the base substrate, the active layer is isolated from the pixel electrode; and on the side of the active layer away from the The first electrode and the second electrode on one side of the first insulating layer, the first electrode and the second electrode are electrically connected to the active layer, and the second insulating layer also covers the first electrode, the second electrode, the active layer and the pixel electrode; wherein, the second main body portion includes a second corner end portion, and the orthographic projection of the second electrode on the base substrate covers part of a strip shape at least a portion of an orthographic projection of the second corner end of the electrode on the base substrate.
  • the array substrate further includes: a first alignment layer covering the common electrode; a liquid crystal layer on a side of the first alignment layer away from the common electrode; The second alignment layer on the side of the first alignment layer; the black matrix layer on the side of the second alignment layer away from the liquid crystal layer, wherein the orthographic projection of the black matrix layer on the base substrate covers all an orthographic projection of a portion of the first corner end portion and the first body portion adjacent to the first corner end portion on the base substrate; and overlaying the black matrix layer and the second orientation Color filter layer on layer.
  • a length L 0 of the portion of the first body portion adjacent to the first corner end portion along the second direction is in the range of 0 ⁇ L 0 ⁇ 2.5 microns.
  • the angle of the second included angle formed by the first corner end portion and the first direction is 40° to 50°.
  • the angle of the third included angle formed by the second corner end and the first direction is 40° to 50°.
  • a display device including: the aforementioned array substrate.
  • FIG. 1 is a plan view showing the structure of a pixel of an array substrate for a liquid crystal display in the related art
  • FIG. 2 is a top view illustrating an array substrate according to an embodiment of the present disclosure
  • FIG. 3 is a schematic cross-sectional view illustrating a structure of an array substrate taken along the line C-C' shown in FIG. 2 according to an embodiment of the present disclosure
  • FIG. 4 is a schematic cross-sectional view illustrating a structure of an array substrate taken along the line D-D' shown in FIG. 2 according to an embodiment of the present disclosure
  • FIG. 5 is a partial enlarged view illustrating an array substrate according to an embodiment of the present disclosure at block E in FIG. 2 ;
  • FIG. 6 is a partial enlarged view showing an array substrate according to an embodiment of the present disclosure at block F in FIG. 2;
  • FIG. 7 is a partial enlarged view showing an array substrate at block G in FIG. 2 according to one embodiment of the present disclosure.
  • first,” “second,” and similar words do not denote any order, quantity, or importance, but are merely used to distinguish the different parts.
  • “Comprising” or “comprising” and similar words mean that the element preceding the word covers the elements listed after the word, and does not exclude the possibility that other elements are also covered.
  • “Up”, “Down”, “Left”, “Right”, etc. are only used to represent the relative positional relationship, and when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
  • a specific device when a specific device is described as being located between the first device and the second device, there may or may not be an intervening device between the specific device and the first device or the second device.
  • the specific device When it is described that a specific device is connected to other devices, the specific device may be directly connected to the other device without intervening devices, or may not be directly connected to the other device but have intervening devices.
  • FIG. 1 is a plan view showing the structure of a pixel of an array substrate in the related art.
  • the array substrate is an array substrate of a liquid crystal display screen.
  • a dual-domain electrode structure with a 1P2D structure is adopted in the related art.
  • the inventors of the present disclosure found that, in the related art, in order to reduce the problem of Trace mura (uneven traces), a corner design (as shown at position A in FIG. 1 ) is adopted in the edge area of the pixel, but such a design An uneven electric field is formed in this area, thereby forming an uneven dark area, reducing the light efficiency of the liquid crystal, and further reducing the display effect.
  • the embodiments of the present disclosure provide an array substrate for a liquid crystal display screen, so as to reduce the adverse effect of the corner design of the edge region of the pixel on the display effect.
  • FIG. 2 is a top view illustrating an array substrate for a liquid crystal display panel according to an embodiment of the present disclosure.
  • 3 is a schematic cross-sectional view illustrating a structure of an array substrate taken along line C-C' shown in FIG. 2 according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic cross-sectional view illustrating a structure of the array substrate taken along the line D-D' shown in FIG. 2 according to one embodiment of the present disclosure.
  • FIG. 5 is a partial enlarged view illustrating an array substrate at block E in FIG. 2 according to one embodiment of the present disclosure.
  • FIG. 6 is a partial enlarged view showing an array substrate at block F in FIG. 2 according to one embodiment of the present disclosure.
  • FIG. 7 is a partial enlarged view showing an array substrate at block G in FIG. 2 according to one embodiment of the present disclosure.
  • the top views of the embodiments of the present disclosure do not show the structures of all layers. Those skilled in the art can understand the structural relationship of each layer in these top views with reference to the cross-sectional views.
  • the array substrate includes a base substrate 100 .
  • the base substrate may include a glass substrate, a resin substrate, or the like.
  • the array substrate further includes a gate line 110 extending along the first direction X on one side of the base substrate 100 .
  • the gate line 110 (not shown in FIG. 3 ) is in the same layer as the gate electrode 112 of the thin film transistor (to be described later).
  • the gate line 110 may be integrally formed with the gate 112 .
  • the material of the gate line may include metals such as molybdenum, aluminum, or copper.
  • the array substrate further includes a first insulating layer 113 covering the gate lines 110 .
  • the material of the first insulating layer 113 may include silicon oxide or silicon nitride.
  • the array substrate further includes a data line 210 on a side of the first insulating layer 113 away from the base substrate 100 .
  • the data line 210 may be formed through the same patterning process as the first electrode and the second electrode of the thin film transistor (to be described later).
  • the data line 210 generally extends along a direction Y (which may be referred to as a sixth direction) that is perpendicular to the first direction X.
  • a direction Y which may be referred to as a sixth direction
  • the data line 210 may not extend completely along the sixth direction Y.
  • the data line 210 since the data line 210 has a bent portion, the extending direction of the data line 210 may deviate from the direction Y, but the entire data line may be regarded as extending along the sixth direction Y.
  • the data lines 210 and the gate lines 110 define a plurality of pixel regions 190 . Each pixel area corresponds to one pixel.
  • the array substrate further includes a second insulating layer 121 covering the data lines 210 .
  • the material of the second insulating layer 121 may include silicon oxide or silicon nitride.
  • the array substrate further includes the common electrode 3 on the side of the second insulating layer 121 away from the data line 210 .
  • the common electrode 3 includes a plurality of portions 35 corresponding to the plurality of pixel regions 190 .
  • Each portion 35 includes a plurality of strip electrodes 130 .
  • each strip electrode 130 includes a first body portion 131 extending along the second direction, a second body portion 132 extending along the third direction, and a first connecting portion extending along the fourth direction 133, and a second connecting portion 134 extending along the fifth direction.
  • the second, third, fourth and fifth directions are all different.
  • the first main body portion 131 is connected to the first connection portion 133 .
  • the second main body portion 132 is connected to the second connecting portion 134 .
  • the first connection portion 133 is connected to the second connection portion 134 .
  • the first connecting portion 133 and the second connecting portion 134 form a first included angle ⁇ 1 .
  • the first included angle is less than 180°.
  • the first body portion 131 includes a first corner end portion 231 .
  • the array substrate further includes metal wires 103 which are in the same layer as the gate lines 110 and extend along the first direction X. As shown in FIG.
  • the material of the metal wire 103 is the same as that of the gate wire.
  • the orthographic projection of the first corner end portion 231 on the base substrate 100 exceeds the orthographic projection of the metal wire 103 on the base substrate 100 .
  • “exceeding” here means that the orthographic projection of the metal wire on the base substrate does not completely cover the orthographic projection of the end portion of the first corner on the base substrate.
  • the orthographic projection of the metal wire 103 on the base substrate 100 covers a part of the orthographic projection of the portion of the first main body portion 131 connected to the first corner end portion 231 on the base substrate 100 and the first A portion of the orthographic projection of the corner end portion 231 on the base substrate 100 .
  • the remaining portion of the orthographic projection of the first corner end portion 231 on the base substrate 100 does not overlap with the orthographic projection of the metal wire 103 on the base substrate 100 , and the remaining portion is located at the positive portion of the metal wire 103 on the base substrate 100 .
  • the projection is away from the side of the first included angle ⁇ 1 .
  • different first corner end portions 231 may be connected through a third connection portion 252 .
  • the first corner end portion 231 and the third connecting portion 252 are integrally formed.
  • the angle of the second included angle ⁇ 2 formed by the first corner end portion 231 and the first direction X is 40° to 50°.
  • the angle of the second included angle ⁇ 2 may be 45°.
  • the array substrate includes: a base substrate, a gate line, a first insulating layer, a data line, a second insulating layer, a common electrode, and a metal wire.
  • the common electrode includes a plurality of portions corresponding to a plurality of pixel regions. Each section includes a plurality of strip electrodes. There are slits between adjacent strip electrodes among the plurality of strip electrodes.
  • Each of the strip electrodes includes a first body portion extending along the second direction, a second body portion extending along the third direction, a first connecting portion extending along the fourth direction, and a first connecting portion extending along the fifth direction the second connecting part.
  • the first main body part is connected with the first connection part
  • the second main body part is connected with the second connection part
  • the first connection part is connected with the second connection part.
  • the first connecting portion and the second connecting portion form a first included angle.
  • the first body portion includes a first corner end portion.
  • the orthographic projection of the first corner end on the base substrate exceeds the orthographic projection of the metal wire on the base substrate. In this way, the uneven dark area caused by the end of the first corner can be kept away from the pixel area as far as possible. For example, the uneven dark area can be made to enter into the area covered by the black matrix as much as possible. Therefore, the above embodiments can reduce the adverse effect of the corner design of the edge region of the pixel on the display effect, and improve the display effect of the liquid crystal display.
  • the inventors of the present disclosure also found that, since the pixel structure of the 1P2D architecture is adopted in the related art, a corner region (as shown at position B in FIG. 1 ) is formed in the middle region of the pixel. Since the liquid crystal molecules in the corner area are deflected in different directions when subjected to the electric field, a dark area is easily formed, thereby reducing the display effect.
  • the ratio of the width of the strip electrodes 130 to the width of the slits 135 may range from 0.3 to 0.7.
  • the width ratio may be 0.4 or 0.5 or the like.
  • the number of slits can be increased, so that the overall light efficiency (ie, light transmittance) of the array substrate can be improved, thereby reducing the adverse effects of the above-mentioned dark areas on the display effect, thereby improving the display effect.
  • the width W 1 of the strip electrodes 130 is in the range of 2 ⁇ m ⁇ W 1 ⁇ 2.8 ⁇ m.
  • the width of the strip electrodes 130 may be 2.0 microns or the like.
  • the width W 2 of the slit is in the range of 4 ⁇ m ⁇ W 2 ⁇ 5.8 ⁇ m.
  • the width of the slits may be 5.2 microns, 4.4 microns, or 4.0 microns, and the like.
  • the sum H 1 of the projected lengths of the first connecting portion 133 and the second connecting portion 134 in the direction Y perpendicular to the first direction (for example, may be referred to as the first connecting portion 133 and the height of the second connecting portion 134 ) in the range of 3.9 ⁇ m ⁇ H 1 ⁇ 5.9 ⁇ m.
  • the sum of the projected lengths H 1 may be 3.9 microns or 4.8 microns, or the like.
  • the width of the strip electrodes 130 is designed to be 2.0 micrometers, and the width of the slits 135 is designed to be 5.2 micrometers.
  • the intermediate strip electrodes corner dimension H 1 from the related art is adjusted to 3.9 microns 5.9 microns, can enhance the light efficiency pixel at an intermediate position of the corner.
  • the corners at the edge of the pixel eg, the first corner
  • the width of the strip electrodes 130 is designed to be 2.0 micrometers, and the width of the slits 135 is designed to be 4.4 micrometers.
  • the intermediate strip electrodes corner dimension H 1 from the related art is adjusted to 4.8 microns 5.9 microns, can enhance the light efficiency pixel at an intermediate position of the corner.
  • the corners at the edge of the pixel eg, the first corner
  • the width of the strip electrodes 130 is designed to be 2.0 micrometers, and the width of the slits 135 is designed to be 4.0 micrometers.
  • the intermediate strip electrodes corner dimension H 1 from the related art is adjusted to 3.9 microns 5.9 microns, can enhance the light efficiency pixel at an intermediate position of the corner.
  • stretching the corners (such as the first corners) at the edge of the pixel by 2.5 microns and optimizing the inclination angle can improve the light efficiency of the pixel at the edge.
  • the inner side of the part where the first connecting part 133 and the second connecting part 134 are connected has a concave pattern 311
  • the part where the first connecting part 133 and the second connecting part 134 connect The outer side has a convex pattern 312 .
  • the inner side refers to the side where the included angle of the part connecting the first connecting part and the second connecting part is less than 180°
  • the outer side refers to the side where the included angle between the part connecting the first connecting part and the second connecting part is greater than 180° side.
  • the area of the inner concave pattern 311 is equal to that of the outer convex pattern 312 .
  • the shape of the inner concave pattern 311 is the same as that of the outer convex pattern 312 .
  • the area of the inner concave pattern 311 and the area of the outer convex pattern 312 may not be equal, and the shape of the inner concave pattern 311 and the shape of the outer convex pattern 312 may also be different.
  • a compensation design is implemented at the middle corner positions of the electrodes. In this way, the open problem caused by the thinner strip electrodes can be prevented as much as possible, and the sharpness of the corners is optimized to reduce the occurrence of the Trace mura problem.
  • the length of the concave pattern 311 along the first direction X (excluding the tip portion of the concave pattern) L 1 is in the range of 0.5 ⁇ m ⁇ L 1 ⁇ 2 ⁇ m.
  • the range of the length L 2 of the concave pattern 311 along the sixth direction Y is 0.5 ⁇ m ⁇ L 2 ⁇ 2 ⁇ m.
  • the length of the convex pattern 312 along the first direction X (excluding the tip portion of the convex pattern) L 3 is in the range of 0.5 ⁇ m ⁇ L 3 ⁇ 2 ⁇ m.
  • the array substrate may further include: a gate electrode 112 located at the same layer as the gate line 110 .
  • the gate 112 is electrically connected to the gate line 110 .
  • the first insulating layer 113 also covers the gate electrode 112 .
  • the material of the gate 112 may include metals such as molybdenum, aluminum, or copper.
  • the array substrate may further include: an active layer 114 and a pixel electrode 46 on a side of the first insulating layer 113 away from the base substrate 100 .
  • the active layer 114 is isolated from the pixel electrode 46 .
  • the material of the active layer 114 may include semiconductor materials such as polysilicon or amorphous silicon.
  • the array substrate may further include: a first electrode (eg, a source electrode) 115 and a second electrode on a side of the active layer 114 away from the first insulating layer 113 . Electrode (eg drain) 116 . Both the first electrode 115 and the second electrode 116 are electrically connected to the active layer 114 .
  • the second insulating layer 121 also covers the first electrode 115 , the second electrode 116 , the active layer 114 and the pixel electrode 46 .
  • the first electrode 115 may be electrically connected with the data line 210 .
  • the material of the first electrode 115 and the second electrode 116 may include metals such as molybdenum or aluminum.
  • the second body portion 132 may include a second corner end portion 232 .
  • the orthographic projection of the second electrode 116 on the base substrate 100 covers at least a portion of the orthographic projection of the second corner end portion 232 of the partial strip electrode 130 on the base substrate.
  • the orthographic projection of the second electrode 116 on the base substrate 100 overlaps with at least a part of the orthographic projection of the second corner end portion 232 of a portion of the strip electrodes 130 on the base substrate. This is equivalent to the second end of the corner portion of the stretching direction away from the first angle ⁇ 1, thereby reducing the adverse effect on display due to a dark region of a second corner of the end portion of the lead, to enhance the display effect.
  • different second corner end portions 232 may be connected through fourth connection portions 254 .
  • the angle of the third included angle ⁇ 3 formed by the second corner end portion 232 and the first direction X is 40° to 50°.
  • the angle of the third included angle ⁇ 3 may be 45°.
  • the array substrate may further include a first alignment layer 141 covering the common electrode, a liquid crystal layer 150 on the side of the first alignment layer 141 away from the common electrode, and The second alignment layer 142 is on the side of the liquid crystal layer 150 away from the first alignment layer 141 .
  • the array substrate may further include a black matrix layer 160 on the side of the second alignment layer 142 away from the liquid crystal layer 150 .
  • the orthographic projection of the black matrix layer 160 on the base substrate 100 covers the orthographic projection of the first corner end portion 231 and a portion of the first body portion 131 adjacent to the first corner end portion 231 on the base substrate.
  • the orthographic projection of the black matrix layer 160 on the base substrate 100 and the orthographic projection of the first corner end portion 231 and a portion of the first main body portion 131 adjacent to the first corner end portion 231 on the base substrate overlapping.
  • the length L 0 of the portion of the first body portion 131 adjacent to the first corner end portion 231 along the second direction is in the range of 0 ⁇ L 0 ⁇ 2.5 ⁇ m.
  • the first main body portion 131 can be stretched in a direction away from the first included angle, so that the first corner end portion 231 is kept away from the pixel area as far as possible, and the effect of the dark area caused by the first corner end portion on the display effect is reduced. adverse effects.
  • the array substrate may further include a color filter layer 170 covering the black matrix layer 160 and the second alignment layer 142 .
  • a display device includes the aforementioned array substrate.
  • the display device may be any product or component with a display function, such as a display panel, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.

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Abstract

本公开提供了一种阵列基板和显示装置。该阵列基板包括：衬底基板；在衬底基板的一侧的栅极线；覆盖栅极线的第一绝缘层；在第一绝缘层的远离衬底基板一侧的数据线，数据线与栅极线限定多个像素区域；覆盖数据线的第二绝缘层；在第二绝缘层的远离数据线一侧的公共电极，公共电极包括对应于多个像素区域的多个部分，每个部分包括多个条状电极，相邻的条状电极之间具有狭缝，每个条状电极包括第一主体部、第二主体部、第一连接部、和第二连接部，第一主体部包括第一拐角端部；以及与栅极线处于同一层且沿着第一方向延伸的金属导线，第一拐角端部在衬底基板上的正投影超出金属导线在衬底基板上的正投影。

Description

阵列基板和显示装置
相关申请的交叉引用
本申请是以CN申请号为202010597870.7，申请日为2020年6月28日的申请为基础，并主张其优先权，该CN申请的公开内容在此作为整体引入本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种阵列基板和显示装置。
背景技术
边缘场开关(Fringe Field Switching，简称为FFS)显示技术是当前液晶广视角显示中的主流显示技术。这种显示技术是通过阵列侧的像素电极与公共电极之间的边缘电场来实现液晶分子的偏转，从而实现显示。为了改善液晶显示面板的色偏问题，在相关技术中采用1P2D架构(即1Pixel 2Domain)的双畴电极结构。
发明内容
根据本公开实施例的一个方面，提供了一种用于液晶显示屏的阵列基板，包括：衬底基板；在所述衬底基板的一侧且沿着第一方向延伸的栅极线；覆盖所述栅极线的第一绝缘层；在所述第一绝缘层的远离所述衬底基板一侧的数据线，所述数据线与所述栅极线限定多个像素区域；覆盖所述数据线的第二绝缘层；在所述第二绝缘层的远离所述数据线一侧的公共电极，所述公共电极包括对应于所述多个像素区域的多个部分，每个部分包括多个条状电极，所述多个条状电极中相邻的条状电极之间具有狭缝，每个条状电极包括沿着第二方向延伸的第一主体部、沿着第三方向延伸的第二主体部、沿着第四方向延伸的第一连接部、和沿着第五方向延伸的第二连接部，所述第一主体部与所述第一连接部连接，所述第二主体部与所述第二连接部连接，所述第一连接部与所述第二连接部连接，所述第一连接部与所述第二连接部形成第一夹角，所述第一主体部包括第一拐角端部；以及与所述栅极线处于同一层且沿着所述第一方向延伸的金属导线，所述第一拐角端部在所述衬底基板上的正投影超出所述金属导线在所述衬底基板上的正投影。
在一些实施例中，所述条状电极的宽度与所述狭缝的宽度的比例范围为0.3至0.7。
在一些实施例中，所述条状电极的宽度W 1的范围为2微米≤W 1<2.8微米。
在一些实施例中，所述狭缝的宽度W 2的范围为4微米≤W 2<5.8微米。
在一些实施例中，所述第一连接部和所述第二连接部在与所述第一方向相垂直的方向上的投影长度之和H 1的范围为3.9微米≤H 1<5.9微米。
在一些实施例中，所述第一连接部与所述第二连接部连接的部分的内侧具有内凹图案，且所述第一连接部与所述第二连接部连接的所述部分的外侧具有外凸图案。
在一些实施例中，所述内凹图案的面积与所述外凸图案的面积相等。
在一些实施例中，所述内凹图案的形状与所述外凸图案的形状相同。
在一些实施例中，所述阵列基板还包括：与所述栅极线处于同一层的栅极，所述栅极与所述栅极线电连接，所述第一绝缘层还覆盖所述栅极；在所述第一绝缘层的远离所述衬底基板一侧的有源层和像素电极，所述有源层与所述像素电极隔离开；以及在所述有源层的远离所述第一绝缘层一侧的第一电极和第二电极，所述第一电极和所述第二电极与所述有源层电连接，所述第二绝缘层还覆盖所述第一电极、所述第二电极、所述有源层和所述像素电极；其中，所述第二主体部包括第二拐角端部，所述第二电极在所述衬底基板上的正投影覆盖部分条状电极的所述第二拐角端部在所述衬底基板上的正投影的至少一部分。
在一些实施例中，所述阵列基板还包括：覆盖所述公共电极的第一取向层；在所述第一取向层远离所述公共电极一侧的液晶层；在所述液晶层远离所述第一取向层一侧的第二取向层；在所述第二取向层远离所述液晶层一侧的黑色矩阵层，其中，所述黑色矩阵层在所述衬底基板上的正投影覆盖所述第一拐角端部和所述第一主体部的与所述第一拐角端部邻接的一部分在所述衬底基板上的正投影；以及覆盖在所述黑色矩阵层和所述第二取向层上的彩膜层。
在一些实施例中，所述第一主体部的与所述第一拐角端部邻接的所述一部分沿着所述第二方向的长度L 0的范围为0<L 0≤2.5微米。
在一些实施例中，所述第一拐角端部与所述第一方向所形成的第二夹角的角度为40°至50°。
在一些实施例中，所述第二拐角端部与所述第一方向所形成的第三夹角的角度为40°至50°。
根据本公开实施例的一个方面，提供了一种显示装置，包括：如前所述的阵列基板。
通过以下参照附图对本公开的示例性实施例的详细描述，本公开的其它特征及其优点将会变得清楚。
附图说明
构成说明书的一部分的附图描述了本公开的实施例，并且连同说明书一起用于解释本公开的原理。
参照附图，根据下面的详细描述，可以更加清楚地理解本公开，其中：
图1是示出相关技术中的用于液晶显示屏的阵列基板的像素的结构俯视图；
图2是示出根据本公开一个实施例的阵列基板的俯视图；
图3是示出根据本公开一个实施例的阵列基板沿着图2所示的线C-C’截取的结构的截面示意图；
图4是示出根据本公开一个实施例的阵列基板沿着图2所示的线D-D’截取的结构的截面示意图；
图5是示出根据本公开一个实施例的阵列基板在图2中的方框E处的局部放大图；
图6是示出根据本公开一个实施例的阵列基板在图2中的方框F处的局部放大图；
图7是示出根据本公开一个实施例的阵列基板在图2中的方框G处的局部放大图。
应当明白，附图中所示出的各个部分的尺寸并不是按照实际的比例关系绘制的。此外，相同或类似的参考标号表示相同或类似的构件。
具体实施方式
现在将参照附图来详细描述本公开的各种示例性实施例。对示例性实施例的描述仅仅是说明性的，决不作为对本公开及其应用或使用的任何限制。本公开可以以许多不同的形式实现，不限于这里所述的实施例。提供这些实施例是为了使本公开透彻且完整，并且向本领域技术人员充分表达本公开的范围。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、材料的组分、数字表达式和数值应被解释为仅仅是示例性的，而不是作为限制。
本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重 要性，而只是用来区分不同的部分。“包括”或者“包含”等类似的词语意指在该词前的要素涵盖在该词后列举的要素，并不排除也涵盖其他要素的可能。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在本公开中，当描述到特定器件位于第一器件和第二器件之间时，在该特定器件与第一器件或第二器件之间可以存在居间器件，也可以不存在居间器件。当描述到特定器件连接其它器件时，该特定器件可以与所述其它器件直接连接而不具有居间器件，也可以不与所述其它器件直接连接而具有居间器件。
本公开使用的所有术语(包括技术术语或者科学术语)与本公开所属领域的普通技术人员理解的含义相同，除非另外特别定义。还应当理解，在诸如通用字典中定义的术语应当被解释为具有与它们在相关技术的上下文中的含义相一致的含义，而不应用理想化或极度形式化的意义来解释，除非这里明确地这样定义。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为说明书的一部分。
图1是示出相关技术中的阵列基板的像素的结构俯视图。该阵列基板为液晶显示屏的阵列基板。
如图1所示，为了改善液晶显示面板的色偏问题，在相关技术中采用1P2D架构的双畴电极结构。本公开的发明人发现，在相关技术中，为了减小Trace mura(痕迹不均)的问题，在像素的边缘区域采用了拐角设计(如图1的位置A处所示)，但是这样的设计使得该区域形成不均匀电场，从而形成不均匀暗区，降低了液晶光效，进而降低显示效果。
鉴于此，本公开的实施例提供一种用于液晶显示屏的阵列基板，从而降低像素的边缘区域的拐角设计对显示效果的不良影响。
图2是示出根据本公开一个实施例的用于液晶显示屏的阵列基板的俯视图。图3是示出根据本公开一个实施例的阵列基板沿着图2所示的线C-C’截取的结构的截面示意图。图4是示出根据本公开一个实施例的阵列基板沿着图2所示的线D-D’截取的结构的截面示意图。图5是示出根据本公开一个实施例的阵列基板在图2中的方框E处的局部放大图。图6是示出根据本公开一个实施例的阵列基板在图2中的方框F处的局部放大图。图7是示出根据本公开一个实施例的阵列基板在图2中的方框G处的局部放大图。
需要说明的是，为了方便示出本公开实施例的主要特征，本公开实施例的俯视图(例如图2、图5、图6和图7)并没有示出所有层的结构。本领域技术人员结合截面图，能够理解这些俯视图中各个层的结构关系。
下面结合图2至图7详细描述根据本公开一些实施例的阵列基板的结构。
如图2和图3所示，该阵列基板包括衬底基板100。例如，该衬底基板可以包括玻璃衬底或树脂衬底等。
如图2、图3和图6所示，该阵列基板还包括在衬底基板100的一侧且沿着第一方向X延伸的栅极线110。例如，该栅极线110(图3中未示出)与薄膜晶体管的栅极112(后面将描述)处于同一层。在一些实施例中，该栅极线110可以与该栅极112一体形成。例如，该栅极线的材料可以包括诸如钼、铝或铜等金属。
如图3所示，该阵列基板还包括覆盖栅极线110的第一绝缘层113。例如该第一绝缘层113的材料可以包括氧化硅或氮化硅等。
如图2和图4所示，该阵列基板还包括在第一绝缘层113的远离衬底基板100一侧的数据线210。例如，该数据线210可以与薄膜晶体管的第一电极和第二电极(后面将描述)通过同一构图工艺形成。如图2所示，该数据线210大体上沿着与第一方向X相垂直的方向Y(可以称为第六方向)延伸。本领域技术人员可以理解，该数据线210可以不完全沿着第六方向Y延伸。例如，由于该数据线210存在弯折部分，因此，该数据线210的延伸方向可以偏离方向Y，但是可以将数据线整体看作沿着第六方向Y延伸。如图2所示，数据线210与栅极线110限定多个像素区域190。每个像素区域对应一个像素。
如图2和图4所示，该阵列基板还包括覆盖数据线210的第二绝缘层121。例如，该第二绝缘层121的材料可以包括氧化硅或氮化硅等。
如图2和图4所示，该阵列基板还包括在第二绝缘层121的远离数据线210一侧的公共电极3。该公共电极3包括对应于多个像素区域190的多个部分35。每个部分35包括多个条状电极130。该多个条状电极130中相邻的条状电极之间具有狭缝135。
如图7所示，每个条状电极130包括沿着第二方向延伸的第一主体部131、沿着第三方向延伸的第二主体部132、沿着第四方向延伸的第一连接部133、和沿着第五方向延伸的第二连接部134。该第二方向、第三方向、第四方向和第五方向均不相同。第一主体部131与第一连接部133连接。第二主体部132与第二连接部134连接。第一连接部133与第二连接部134连接。第一连接部133与第二连接部134形成第一夹 角θ 1。例如，该第一夹角小于180°。如图2和图5所示，第一主体部131包括第一拐角端部231。
如图2、图3和图5所示，该阵列基板还包括与栅极线110处于同一层且沿着第一方向X延伸的金属导线103。例如，该金属导线103的材料与栅极线的材料相同。第一拐角端部231在衬底基板100上的正投影超出金属导线103在衬底基板100上的正投影。
这里需要说明的是，这里的“超出”是指金属导线在衬底基板上的正投影并没有完全覆盖第一拐角端部在衬底基板上的正投影。如图5所示，金属导线103在衬底基板100上的正投影覆盖了第一主体部131中与第一拐角端部231连接的部分在衬底基板100上的正投影的一部分和第一拐角端部231在衬底基板100上的正投影的一部分。第一拐角端部231在衬底基板100上的正投影的剩余部分与金属导线103在衬底基板100上的正投影没有重叠，而且该剩余部分位于金属导线103在衬底基板100上的正投影远离第一夹角θ 1的一侧。
在一些实施例中，如图5所示，在公共电极中，不同的第一拐角端部231可以通过第三连接部252连接。例如，该第一拐角端部231与该第三连接部252一体形成。
在一些实施例中，如图5所示，第一拐角端部231与第一方向X所形成的第二夹角θ 2的角度为40°至50°。例如，该第二夹角θ 2的角度可以为45°。
至此，提供了根据本公开一些实施例的用于液晶显示屏的阵列基板。在上面的描述中，该阵列基板包括：衬底基板、栅极线、第一绝缘层、数据线、第二绝缘层、公共电极和金属导线。该公共电极包括对应于多个像素区域的多个部分。每个部分包括多个条状电极。所述多个条状电极中相邻的条状电极之间具有狭缝。每个条状电极包括沿着第二方向延伸的第一主体部、沿着第三方向延伸的第二主体部、沿着第四方向延伸的第一连接部、和沿着第五方向延伸的第二连接部。第一主体部与第一连接部连接，第二主体部与第二连接部连接，第一连接部与第二连接部连接。第一连接部与第二连接部形成第一夹角。第一主体部包括第一拐角端部。第一拐角端部在衬底基板上的正投影超出金属导线在衬底基板上的正投影。这样可以使得由第一拐角端部导致的不均匀暗区尽量远离像素区域。例如可以使得该不均匀暗区尽量进入黑色矩阵覆盖的区域以内。因此，上述实施例可以降低像素的边缘区域的拐角设计对显示效果的不良影响，提高了液晶显示器的显示效果。
此外，本公开的发明人还发现，由于在相关技术中采用1P2D架构的像素结构， 这样在像素的中间区域形成一个拐角区域(如图1中的位置B处所示)。由于该拐角区域的液晶分子受到电场作用时会朝向不同方向偏转，从而也容易形成一个暗区，进而降低显示效果。
鉴于此，本公开的发明人提出，在本公开的一些实施例中，条状电极130的宽度与狭缝135的宽度的比例范围可以为0.3至0.7。例如，该宽度比例可以为0.4或0.5等。在这样的宽度比例范围的情况下，可以增加狭缝的数量，从而可以提升阵列基板的整体光效(即光透过率)，从而可以减小上述暗区对显示效果的不良影响，从而提高显示效果。
在一些实施例中，如图7所示，条状电极130的宽度W 1的范围为2微米≤W 1<2.8微米。例如，条状电极130的宽度可以为2.0微等。在一些实施例中，如图7所示，狭缝的宽度W 2的范围为4微米≤W 2<5.8微米。例如，狭缝的宽度可以为5.2微米、4.4微米或4.0微米等。
在一些实施例中，如图7所示，第一连接部133和第二连接部134在与第一方向相垂直的方向Y上的投影长度之和H 1(例如可以称为第一连接部133和第二连接部134的高度之和)的范围为3.9微米≤H 1<5.9微米。例如，该投影长度之和H 1可以为3.9微米或4.8微米等。通过减小第一连接部133和第二连接部134的高度之和，减小了在电极中间区域的暗区，从而提升液晶的光效。
例如，在一些实施例中，条状电极130的宽度被设计为2.0微米，狭缝135的宽度被设计为5.2微米。这样相比相关技术中的每个像素的狭缝数量，这样的设计可以增加一条狭缝，这样可以提升液晶显示屏的整体光效。另外，将条状电极的中间拐角处的尺寸H 1从相关技术中的5.9微米调整为3.9微米，可以提升像素在中间拐角位置处的光效。另外，将像素边缘处的拐角(例如第一拐角)向外拉伸2.5微米，可以提升像素在边缘位置的光效。
又例如，在另一些实施例中，条状电极130的宽度被设计为2.0微米，狭缝135的宽度被设计为4.4微米。相比相关技术中的每个像素的狭缝数量，这样的设计可以增加两条狭缝，这样可以提升液晶显示屏的整体光效。另外，将条状电极的中间拐角处的尺寸H 1从相关技术中的5.9微米调整为4.8微米，可以提升像素在中间拐角位置处的光效。另外，将像素边缘处的拐角(例如第一拐角)向外拉伸2.5微米，可以提升像素在边缘位置的光效。
再例如，在另一些实施例中，条状电极130的宽度被设计为2.0微米，狭缝135 的宽度被设计为4.0微米。相比相关技术中的每个像素的狭缝数量，这样的设计可以增加两条狭缝，这样可以提升液晶显示屏的整体光效。另外，将条状电极的中间拐角处的尺寸H 1从相关技术中的5.9微米调整为3.9微米，可以提升像素在中间拐角位置处的光效。另外，将像素边缘处的拐角(例如第一拐角)向外拉伸2.5微米，并优化倾角，可以提升像素在边缘位置的光效。
在一些实施例中，如图7所示，第一连接部133与第二连接部134连接的部分的内侧具有内凹图案311，且第一连接部133与第二连接部134连接的部分的外侧具有外凸图案312。这里，内侧是指第一连接部与第二连接部连接的部分的夹角小于180°的一侧，外侧是指第一连接部与第二连接部连接的部分的夹角大于180°的一侧。例如，内凹图案311的面积与外凸图案312的面积相等。又例如，内凹图案311的形状与外凸图案312的形状相同。当然，本领域技术人员可以理解，内凹图案311的面积与外凸图案312的面积也可以不相等，内凹图案311的形状与外凸图案312的形状也可以不相同。在该实施例中，在电极的中间拐角位置实现了补偿设计。这样可以尽量防止条状电极较细引起的断开(Open)问题，而且优化了拐角的尖锐度，减小Trace mura问题的发生。
在一些实施例中，如图7所示，内凹图案311沿着第一方向X的长度(不包括内凹图案的尖端部分)L 1的范围为0.5微米<L 1≤2微米。内凹图案311沿着第六方向Y的长度L 2的范围为0.5微米<L 2≤2微米。外凸图案312沿着第一方向X的长度(不包括外凸图案的尖端部分)L 3的范围为0.5微米<L 3≤2微米。
回到图2和图3，在一些实施例中，该阵列基板还可以包括：与栅极线110处于同一层的栅极112。该栅极112与栅极线110电连接。第一绝缘层113还覆盖栅极112。例如，栅极112的材料可以包括诸如钼、铝或铜等金属。
在一些实施例中，如图2、图3和图4所示，该阵列基板还可以包括：在第一绝缘层113的远离衬底基板100一侧的有源层114和像素电极46。该有源层114与像素电极46隔离开。例如，该有源层114的材料可以包括多晶硅或非晶硅等半导体材料。
在一些实施例中，如图2和图3所示，该阵列基板还可以包括：在有源层114的远离第一绝缘层113的一侧的第一电极(例如源极)115和第二电极(例如漏极)116。第一电极115和第二电极116均与有源层114电连接。第二绝缘层121还覆盖第一电极115、第二电极116、有源层114和像素电极46。例如，第一电极115可以与数据线210电连接。在一些实施例中，第一电极115和第二电极116的材料可以包括钼或 铝等金属。
在一些实施例中，如图2和图6所示，第二主体部132可以包括第二拐角端部232。第二电极116在衬底基板100上的正投影覆盖部分条状电极130的第二拐角端部232在衬底基板上的正投影的至少一部分。或者说，第二电极116在衬底基板100上的正投影与部分条状电极130的第二拐角端部232在衬底基板上的正投影的至少一部分重叠。这样相当于将第二拐角端部向远离第一夹角θ 1的方向拉伸，从而减小由于第二拐角端部导致的暗区对显示效果的不良影响，提升显示效果。
在一些实施例中，如图6所示，在公共电极中，不同的第二拐角端部232可以通过第四连接部254连接。
在一些实施例中，如图6所示，第二拐角端部232与第一方向X所形成的第三夹角θ 3的角度为40°至50°。例如，第三夹角θ 3的角度可以为45°。
在一些实施例中，如图2、图3和图4所示，该阵列基板还可以包括覆盖公共电极的第一取向层141、在第一取向层141远离公共电极一侧的液晶层150和在液晶层150远离第一取向层141一侧的第二取向层142。
在一些实施例中，如图2、图3和图4所示，该阵列基板还可以包括在第二取向层142远离液晶层150一侧的黑色矩阵层160。该黑色矩阵层160在衬底基板100上的正投影覆盖第一拐角端部231和第一主体部131的与该第一拐角端部231邻接的一部分在衬底基板上的正投影。或者说，该黑色矩阵层160在衬底基板100上的正投影与第一拐角端部231和第一主体部131的与该第一拐角端部231邻接的一部分在衬底基板上的正投影重叠。
在一些实施例中，如图5所示，第一主体部131的与第一拐角端部231邻接的所述一部分沿着第二方向的长度L 0的范围为0<L 0≤2.5微米。这样可以实现将第一主体部131向远离第一夹角的方向拉伸，从而使得第一拐角端部231尽量远离像素区域，减小由该第一拐角端部导致的暗区对显示效果的不良影响。
在一些实施例中，如图3和图4所示，该阵列基板还可以包括覆盖在黑色矩阵层160和第二取向层142上的彩膜层170。
在本公开的一些实施例中，还提供了一种显示装置。该显示装置包括如前所述的阵列基板。例如，该显示装置可以为：显示面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
至此，已经详细描述了本公开的各实施例。为了避免遮蔽本公开的构思，没有描 述本领域所公知的一些细节。本领域技术人员根据上面的描述，完全可以明白如何实施这里公开的技术方案。
虽然已经通过示例对本公开的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上示例仅是为了进行说明，而不是为了限制本公开的范围。本领域的技术人员应该理解，可在不脱离本公开的范围和精神的情况下，对以上实施例进行修改或者对部分技术特征进行等同替换。本公开的范围由所附权利要求来限定。

Claims (14)

  1. 一种阵列基板，包括：
    衬底基板；
    在所述衬底基板的一侧且沿着第一方向延伸的栅极线；
    覆盖所述栅极线的第一绝缘层；
    在所述第一绝缘层的远离所述衬底基板一侧的数据线，所述数据线与所述栅极线限定多个像素区域；
    覆盖所述数据线的第二绝缘层；
    在所述第二绝缘层的远离所述数据线一侧的公共电极，所述公共电极包括对应于所述多个像素区域的多个部分，每个部分包括多个条状电极，所述多个条状电极中相邻的条状电极之间具有狭缝，每个条状电极包括沿着第二方向延伸的第一主体部、沿着第三方向延伸的第二主体部、沿着第四方向延伸的第一连接部、和沿着第五方向延伸的第二连接部，所述第一主体部与所述第一连接部连接，所述第二主体部与所述第二连接部连接，所述第一连接部与所述第二连接部连接，所述第一连接部与所述第二连接部形成第一夹角，所述第一主体部包括第一拐角端部；以及
    与所述栅极线处于同一层且沿着所述第一方向延伸的金属导线，所述第一拐角端部在所述衬底基板上的正投影超出所述金属导线在所述衬底基板上的正投影。
  2. 根据权利要求1所述的阵列基板，其中，
    所述条状电极的宽度与所述狭缝的宽度的比例范围为0.3至0.7。
  3. 根据权利要求2所述的阵列基板，其中，
    所述条状电极的宽度W 1的范围为2微米≤W 1<2.8微米。
  4. 根据权利要求2或3所述的阵列基板，其中，
    所述狭缝的宽度W 2的范围为4微米≤W 2<5.8微米。
  5. 根据权利要求2所述的阵列基板，其中，
    所述第一连接部和所述第二连接部在与所述第一方向相垂直的方向上的投影长 度之和H 1的范围为3.9微米≤H 1<5.9微米。
  6. 根据权利要求5所述的阵列基板，其中，
    所述第一连接部与所述第二连接部连接的部分的内侧具有内凹图案，且所述第一连接部与所述第二连接部连接的所述部分的外侧具有外凸图案。
  7. 根据权利要求6所述的阵列基板，其中，
    所述内凹图案的面积与所述外凸图案的面积相等。
  8. 根据权利要求6或7所述的阵列基板，其中，
    所述内凹图案的形状与所述外凸图案的形状相同。
  9. 根据权利要求1所述的阵列基板，还包括：
    与所述栅极线处于同一层的栅极，所述栅极与所述栅极线电连接，所述第一绝缘层还覆盖所述栅极；
    在所述第一绝缘层的远离所述衬底基板一侧的有源层和像素电极，所述有源层与所述像素电极隔离开；以及
    在所述有源层的远离所述第一绝缘层一侧的第一电极和第二电极，所述第一电极和所述第二电极与所述有源层电连接，所述第二绝缘层还覆盖所述第一电极、所述第二电极、所述有源层和所述像素电极；
    其中，所述第二主体部包括第二拐角端部，所述第二电极在所述衬底基板上的正投影覆盖部分条状电极的所述第二拐角端部在所述衬底基板上的正投影的至少一部分。
  10. 根据权利要求9所述的阵列基板，还包括：
    覆盖所述公共电极的第一取向层；
    在所述第一取向层远离所述公共电极一侧的液晶层；
    在所述液晶层远离所述第一取向层一侧的第二取向层；
    在所述第二取向层远离所述液晶层一侧的黑色矩阵层，其中，所述黑色矩阵层在所述衬底基板上的正投影覆盖所述第一拐角端部和所述第一主体部的与所述第一拐 角端部邻接的一部分在所述衬底基板上的正投影；以及
    覆盖在所述黑色矩阵层和所述第二取向层上的彩膜层。
  11. 根据权利要求10所述的阵列基板，其中，
    所述第一主体部的与所述第一拐角端部邻接的所述一部分沿着所述第二方向的长度L 0的范围为0<L 0≤2.5微米。
  12. 根据权利要求1所述的阵列基板，其中，所述第一拐角端部与所述第一方向所形成的第二夹角的角度为40°至50°。
  13. 根据权利要求9所述的阵列基板，其中，
    所述第二拐角端部与所述第一方向所形成的第三夹角的角度为40°至50°。
  14. 一种显示装置，包括：如权利要求1至13任意一项所述的阵列基板。
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