WO2022001336A1 - 显示面板及其制作方法、显示装置 - Google Patents

显示面板及其制作方法、显示装置 Download PDF

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Publication number
WO2022001336A1
WO2022001336A1 PCT/CN2021/090707 CN2021090707W WO2022001336A1 WO 2022001336 A1 WO2022001336 A1 WO 2022001336A1 CN 2021090707 W CN2021090707 W CN 2021090707W WO 2022001336 A1 WO2022001336 A1 WO 2022001336A1
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WO
WIPO (PCT)
Prior art keywords
signal line
display area
display panel
away
group
Prior art date
Application number
PCT/CN2021/090707
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English (en)
French (fr)
Inventor
刘权
左亮妹
陶子超
张金方
韩珍珍
Original Assignee
昆山国显光电有限公司
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Filing date
Publication date
Application filed by 昆山国显光电有限公司 filed Critical 昆山国显光电有限公司
Publication of WO2022001336A1 publication Critical patent/WO2022001336A1/zh
Priority to US17/828,647 priority Critical patent/US20220291562A1/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13456—Cell terminals located on one side of the display only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/841—Applying alternating current [AC] during manufacturing or treatment

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a display device.
  • Flat display panels such as Liquid Crystal Display (LCD) panels, Organic Light Emitting Display (OLED) panels, and display panels using Light Emitting Diode (LED) devices have high image quality and low cost. It is widely used in various consumer electronic products such as mobile phones, TVs, personal digital assistants, digital cameras, notebook computers, desktop computers, etc., and has become the mainstream of display panels. At present, the requirements for the frame of the display panel are getting higher and higher. It is hoped that the display panel has an ultra-narrow frame or even no frame. However, the existence of metal traces in the display panel will occupy more space in the non-display area, which is not conducive to the design of a narrow frame.
  • LCD Liquid Crystal Display
  • OLED Organic Light Emitting Display
  • LED Light Emitting Diode
  • Embodiments of the present application provide a display panel and a display device, which can ensure the reliability of the display panel while realizing the narrow frame design of the display panel.
  • an embodiment of the present application provides a display panel, comprising: an array substrate, a first signal line group and a second signal line group disposed on the array substrate, wherein the first signal line The group includes at least AC signal lines, and the second signal line group is all DC signal lines; a cover plate, the cover plate is disposed on the array substrate and covers at least the first signal line group, wherein the parallel On the plane of the cover plate, the projection of the second signal line group does not coincide with the projection of the cover plate.
  • Embodiments of the present application also provide a display device, including the above-mentioned display panel.
  • the cover plate covers the AC signal line, which ensures that the AC signal line is located at the non-cutting part of the display panel, and prevents the AC signal line from being damaged when the cover plate is cut due to weak anti-interference ability , so that the reliability of the display panel can be ensured while realizing the narrow frame design of the display panel.
  • FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 2 is another schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 3 is another schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 4 is another schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 5 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • FIG. 6 is another schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 7 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • FIG. 8 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • FIG. 9 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • FIG. 10 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • FIG. 11 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • FIG. 12 is another schematic structural diagram of the display panel provided by the embodiment of the present application.
  • the embodiment of the present application relates to a display panel 100, the specific structure is shown in FIG. 1, including: an array substrate 1, a first signal line group 21 and a second signal line group 22 disposed on the array substrate 1, and a
  • the cover plate 3 is on the substrate 1 and covers at least the first signal line group 21 .
  • the first signal line group 21 at least includes AC signal lines 211
  • the second signal line group 22 is a DC signal line.
  • the projection of the second signal line group 22 does not coincide with the projection of the cover plate 3 .
  • the array substrate 1 and the cover plate 3 can be glass substrates, or can be made of flexible materials, such as imide (PI), polycarbonate (PC), polyethersulfone (PES), Formed from polymeric materials such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyarylate (PAR) or fiberglass reinforced plastic (FRP).
  • the cover plate 1 may be transparent, translucent or opaque to provide support for the formation of the film layer structure disposed thereon.
  • the materials of the array substrate 1 and the cover plate 3 may be the same or different, and the materials of the array substrate 1 and the cover plate 3 are not specifically limited in this embodiment.
  • the material of the signal line is metal, which can be a single-layer structure made of molybdenum, or a composite structure made of titanium-aluminum-titanium.
  • the thickness of the metal film of the single-layer molybdenum structure is 200 nanometers to 300 nanometers;
  • the metal film thickness of the titanium-aluminum-titanium structure is 700 nm to 800 nm. It can be understood that this embodiment does not specifically limit the material of the signal line.
  • the array substrate 1 includes a display area 11 and a non-display area 12
  • the first signal line group 21 and the second signal line group 22 are both disposed in the non-display area 12
  • the cover plate 3 covers the display area 11 .
  • the signal lines of the first signal line group 21 and the signal lines of the second signal line group 22 are sequentially arranged along the X direction in the non-display area 12 .
  • the cover plate 3 in this embodiment is a cut cover plate.
  • the size of the cover plate 3 is the same as or similar to that of the array substrate 1; And expose part of the signal lines disposed on the array substrate 1 to perform FPC and IC bonding on the exposed signal lines. Due to the requirement for the narrow frame design of the display panel 100, it is easy to make the cutting line of the cover plate 3 located on the AC signal line. 211 is far away from the side of the non-display area 12 , so that the AC signal line 211 is located outside the cut cover 3 , which in turn causes the AC signal line 211 to be disturbed by static electricity when the cover 3 is cut, and the AC signal line 211 is damaged.
  • the AC signal line 211 in the non-display area 12, and the cover plate 3 covering the AC signal line 211, it is ensured that the AC signal line 211 is covered by the cut cover plate 3, and the AC signal line 211 is prevented from being caused by anti-interference.
  • the ability is weak and is damaged when the cover plate 3 is cut, so that the reliability of the display panel 100 can be ensured while realizing the narrow frame design of the display panel 100 .
  • the first signal line group 21 includes a first DC signal line 212, which is a VDD signal line;
  • the second signal line group 22 includes a second DC signal line 221 and a third DC signal line Line 222, the second DC signal line 221 is a VSS signal line, and the third DC signal line 222 is a PVG signal line.
  • the first DC signal line 212 is arranged on the side of the AC signal line 211 close to the display area 11
  • the third DC signal line 222 is arranged adjacent to the AC signal line 211
  • the second DC signal line 221 is arranged on the side of the third DC signal line 221.
  • the line 222 is away from one side of the display area 11 .
  • the VDD signal line is connected to the devices in the display area 11 , by arranging the first DC signal line 212 close to the display area 11 , it is avoided that the first signal line 212 is too long and increases the difficulty of manufacturing the display panel 100 .
  • the first DC signal line 212 shown in FIG. 1 may be a VSS signal line
  • the second DC signal line 221 may be a VDD signal line. That is to say, this embodiment does not specifically limit the types of the first signal line 212 and the second signal line 221 .
  • the display panel 100 further includes an electrostatic protection circuit 4 , and the third DC signal line 222 and the AC signal line 211 are both electrically connected to the electrostatic protection circuit 4 .
  • the third DC signal line 222 shown in FIG. 2 is arranged on the same layer as the second DC signal line 221
  • the electrostatic protection circuit 4 includes a first side adjacent to the cover plate 3 and a first side opposite to the first side. On the two sides, by arranging the third DC signal line 222 and the second DC signal line 221 on the first side and the second side respectively (the third DC signal line 222 shown in FIG.
  • the third DC signal line 222 is arranged on the second side; the third DC signal line 222 may also be arranged on the second side, and the second DC signal line 221 is arranged on the first side), so as to increase the connection between the third DC signal line 222 and the second DC signal
  • the distance between the lines 221 is adjusted, thereby avoiding signal crosstalk between the third DC signal line 222 and the second DC signal line 221 , and further improving the reliability of the display panel 100 .
  • the third DC signal line 222 and the second DC signal line 221 are disposed on different layers, and both the third DC signal line 222 and the second DC signal line 221 are located on the same side of the electrostatic protection circuit 4 . Since the third DC signal line 222 and the second DC signal line 221 are arranged on different layers, it is difficult to generate signal crosstalk between the third DC signal line 222 and the second DC signal line 221 , so the setting of the electrostatic protection circuit 4 may not be limited. Location.
  • the first signal line group 21 includes an AC signal line 211
  • the second signal line group 22 includes a first DC signal line 212 , a second DC signal line 221 and a third DC signal line 212 .
  • Signal line 222 The first DC signal line 212 is a VDD signal line
  • the second DC signal line 221 is a VSS signal line
  • the third DC signal line 222 is a PVG signal line.
  • the first DC signal line 212 is arranged adjacent to the AC signal line 211
  • the second DC signal line 221 is arranged on the side of the first DC signal line 212 away from the display area 11
  • the third DC signal line 222 is arranged on the side of the first DC signal line 212 away from the display area 11 .
  • the two DC signal lines 221 are away from one side of the display area 11 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3 , thereby preventing the AC signal line 211 from being damaged when the cover plate 3 is cut due to weak anti-interference ability.
  • the first DC signal line 212 may also be a VSS signal line
  • the second DC signal line 221 may also be a VDD signal line.
  • the types of the two DC signal lines 221 are specifically limited.
  • the first signal line group 21 includes an AC signal line 211
  • the second signal line group 22 includes a first DC signal line 212 , a second DC signal line 221 and a third DC signal line 222 .
  • the first DC signal line 212 is arranged adjacent to the AC signal line 211
  • the third DC signal line 222 is arranged on the side of the first DC signal line 212 away from the display area 11
  • the second DC signal line 221 is arranged on the third DC signal line 222 is away from the side of the display area 11 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3 , thereby preventing the AC signal line 211 from being damaged when the cover plate 3 is cut due to weak anti-interference ability.
  • the first signal line group 21 includes an AC signal line 211
  • the second signal line group 22 includes a first DC signal line 212 , a second DC signal line 221 and a third DC signal line 222 .
  • the third DC signal line 222 is arranged adjacent to the AC signal line 211
  • the first DC signal line 212 is arranged on the side of the third DC signal line 222 away from the display area 11
  • the second DC signal line 221 is arranged on the first DC signal line 212 is away from the side of the display area 11 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3, so as to prevent the AC signal line 211 from being damaged when the cover plate 3 is cut due to its weak anti-interference ability.
  • the first signal line group 21 includes a first DC signal line 212 , a second DC signal line 221 and an AC signal line 211 , and the first DC signal line 212 is a VDD signal
  • the second DC signal line is a VSS signal line
  • the second signal line group 22 includes a third DC signal line 222
  • the third DC signal line 222 is a PVG signal line.
  • the first DC signal line 212 is arranged adjacent to the third DC signal line 222
  • the second DC signal line 221 is arranged on the side of the first DC signal line 212 away from the non-display area 12
  • the AC signal line 211 is arranged on the side of the first DC signal line 212 away from the non-display area 12.
  • the second DC signal line 221 is away from the side of the non-display area 12 .
  • the AC signal wire 211 is kept as far away from the cutting position of the cover plate 3 as possible, thereby further ensuring that the AC signal wire 211 will not be damaged when the cover plate 3 is cut.
  • the first DC signal line 212 may also be a VSS signal line
  • the second DC signal line 221 may also be a VDD signal line.
  • the type of the two-signal DC signal line 221 is specifically limited.
  • the first signal line group 21 includes a first DC signal line 212 , a second DC signal line 221 and an AC signal line 211
  • the second signal line group 22 includes a third DC signal line 222 .
  • the first DC signal line 212 is arranged adjacent to the third DC signal line 222
  • the AC signal line 211 is arranged on the side of the first DC signal line 212 away from the non-display area 12
  • the second DC signal line 221 is arranged on the AC signal line 211 A side away from the non-display area 12 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3 , thereby preventing the AC signal line 211 from being damaged when the cover plate 3 is cut due to weak anti-interference ability.
  • the first signal line group 21 includes a first DC signal line 212 , a second DC signal line 221 and an AC signal line 211
  • the second signal line group 22 includes a third DC signal line 222 .
  • the AC signal line 211 is arranged adjacent to the third DC signal line 222
  • the first DC signal line 212 is arranged on the side of the AC signal line 211 away from the non-display area 12
  • the second DC signal line 221 is arranged on the first DC signal line 212 A side away from the non-display area 12 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3 , thereby preventing the AC signal line 211 from being damaged when the cover plate 3 is cut due to weak anti-interference ability.
  • the first signal line group 21 includes a first DC signal line 212 , a third DC signal line 222 and an AC signal line 211 , and the first DC signal line 212 is a VDD signal line; the second signal line group 22 includes a second DC signal line 221, and the second DC signal line 221 is a VSS signal line.
  • the AC signal line 211 is arranged adjacent to the second DC signal line 221
  • the first DC signal line 212 is arranged on the side of the AC signal line 211 away from the non-display area 12
  • the third DC signal line 222 is arranged on the side of the first DC signal line 211 .
  • the flow signal line 212 is away from the side of the non-display area 12 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3 , thereby preventing the AC signal line 211 from being damaged when the cover plate 3 is cut due to weak anti-interference ability.
  • the first DC signal line 212 may also be a VSS signal line
  • the second DC signal line 221 may also be a VDD signal line.
  • the types of the two DC signal lines 221 are specifically limited.
  • the arrangement positions of the first DC signal line 212 and the third DC signal line 222 can also be exchanged, which can achieve the same technical effect.
  • the first signal line group 21 includes a first DC signal line 212 , a third DC signal line 222 and an AC signal line 211
  • the second signal line group 22 includes a second DC signal line 221 .
  • the first DC signal line 212 is arranged adjacent to the second DC signal line 221
  • the AC signal line 211 is arranged on the side of the first DC signal line 212 away from the non-display area 12
  • the third DC signal line 222 is arranged on the AC signal line 211 A side away from the non-display area 12 .
  • the arrangement of this structure can ensure that the AC signal line 211 is sandwiched between the array substrate 1 and the cover plate 3, so as to prevent the AC signal line 211 from being damaged when the cover plate 3 is cut due to its weak anti-interference ability. It can be understood that the arrangement positions of the first DC signal line 212 and the third DC signal line 222 can also be exchanged, and the same technical effect can be achieved.
  • the first signal line group 21 includes a first DC signal line 212 , a third DC signal line 222 and an AC signal line 211
  • the second signal line group 22 includes a second DC signal line 221 .
  • the first DC signal line 212 is arranged adjacent to the second DC signal line 221
  • the third DC signal line 222 is arranged on the side of the first DC signal line 212 away from the non-display area 12
  • the AC signal line 211 is arranged on the third DC signal line 221
  • the line 222 is away from the side of the non-display area 12 . It can be understood that the arrangement positions of the first DC signal line 212 and the third DC signal line 222 can also be exchanged, and the same technical effect can be achieved.
  • the distance between adjacent signal lines is 5 micrometers to 10 micrometers.
  • An embodiment of the present invention relates to a display device, including the display panel in the above-mentioned embodiments.
  • the display device can be applied to smart wearable devices (such as smart bracelets, smart watches), and can also be applied to smart phones, tablet computers, displays, and other devices.
  • Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be repeated here, nor should it be regarded as a limitation of the present invention.

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种显示面板（100）及显示装置，显示面板（100）包括：阵列基板（1）、设置在阵列基板（1）的第一信号线组（21）和第二信号线组（22），其中，第一信号线组（21）至少包括交流信号线（211），第二信号线组（22）均为直流信号线；盖板（3），盖板（3）设置在阵列基板（1）上、且至少覆盖第一信号线组（21），其中，在平行于盖板（3）的平面上，第二信号线组（22）的投影与盖板（3）的投影不重合。显示面板（100）及显示装置能够在实现显示面板（100）的窄边框设计的同时，确保显示面板（100）的可靠性。

Description

显示面板及其制作方法、显示装置
交叉引用
本申请引用于2020年06月30日递交的名称为“显示面板及显示装置”的第202010620733.0号中国专利申请，其通过引用被全部并入本申请。
技术领域
本申请涉及显示技术领域，特别涉及一种显示面板及显示装置。
背景技术
液晶显示(Liquid Crystal Display，LCD)面板、有机发光二极管显示(Organic Light Emitting Display，OLED)面板以及利用发光二极管(Light Emitting Diode，LED)器件的显示面板等平面显示面板因具有高画质、省电、机身薄及应用范围广等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示面板中的主流。目前对显示面板的边框要求越来越高，希望显示面板超窄边框甚至是无边框，然而显示面板中金属走线的存在会占用较多的非显示区域的空间，不利于窄边框的设计。
申请内容
本申请实施例提供了一种显示面板及显示装置，其能够在实现显示面板的窄边框设计的同时，确保显示面板的可靠性。
为解决上述技术问题，本申请的实施例提供了一种显示面板，包括：阵列基板、设置在所述阵列基板的第一信号线组和第二信号线组，其中，所述第一信号线组至少包括交流信号线，所述第二信号线组均为直流信号线；盖板，所述盖板设置在所述阵列基板上、且至少覆盖所述第一信号线组，其中，在平行于所述盖板的平面上，所述第二信号线组的投影与所述盖板的投影不重合。
本申请的实施例还提供了一种显示装置，包括如上述的显示面板。
本发明实施例提供的技术方案具有以下优点：盖板覆盖交流信号线，确保了交流信号线位于显示面板的非切割处，避免了交流信号线因抗干扰能力较弱而在切割盖板时损坏，从而能够在实现显示面板的窄边框设计的同时，确保显示面板的可靠性。
附图说明
图1是本申请实施例所提供的显示面板的结构示意图。
图2是本申请实施例所提供的显示面板的另一种结构示意图。
图3是本申请实施例所提供的显示面板的又一种结构示意图。
图4是本申请实施例所提供的显示面板的再一种结构示意图。
图5是本申请实施例所提供的显示面板的还一种结构示意图。
图6是本申请实施例所提供的显示面板的还一种结构示意图。
图7是本申请实施例所提供的显示面板的还一种结构示意图。
图8是本申请实施例所提供的显示面板的还一种结构示意图。
图9是本申请实施例所提供的显示面板的还一种结构示意图。
图10是本申请实施例所提供的显示面板的还一种结构示意图。
图11是本申请实施例所提供的显示面板的还一种结构示意图。
图12是本申请实施例所提供的显示面板的还一种结构示意图。
具体实施例
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请实施例中的附图，对本申请的各实施例进行清楚、完整的描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的其他实施例，都属于本申请保护的范围。
本申请的实施例涉及一种显示面板100，具体结构如图1所示，包括：阵列基板1、设置在阵列基板1上的第一信号线组21和第二信号线组22以及设置在阵列基板1上、且至少覆盖第一信号线组21的盖板3。其中，第一信号线组21至少包括交流信号线211，第二信号线组22均为直流信号线。在平行于盖板3的屏幕上，第二信号线组22的投影与盖板3的投影不重合。
需要说明的是，阵列基板1和盖板3可以为玻璃基板，也可以采用柔性材料制备而成，例如：由酰亚胺(PI)、聚碳酸酯(PC)、聚醚砜(PES)、聚对苯二甲酸乙二醇酯(PET)、聚萘二甲酸乙二醇酯(PEN)、多芳基化合物(PAR)或玻璃纤维增强塑料(FRP)等聚合物材料形成。盖板1可以是透明的、半透明的或不透明的，以对设置在其上的膜层结构的形成提供支撑。阵列基板1和盖板3的材质可以相同，也可以不同，本实施例并不对阵列基板1和盖板3的材质作具体限定。
信号线的材质为金属，可以为以钼为材质的单层结构，也可以为以钛- 铝-钛为材质的复合结构，单层钼结构的金属膜厚度为200纳米至300纳米；叠层钛-铝-钛结构的金属膜厚度为700纳米至800纳米。可以理解的是，本实施例并不对信号线的材质作具体限定。
本实施例中，阵列基板1包括显示区11和非显示区12，第一信号线组21和第二信号线组22均设置在非显示区12，盖板3覆盖显示区11。优选地，第一信号线组21的信号线与第二信号线组22的信号线在非显示区12沿X方向依次排列。
本实施例中的盖板3为切割后的盖板，在未制备显示面板100时，盖板3与阵列基板1的大小相同或相似；在显示面板100的制备过程中，需切割盖板3并暴露设置于阵列基板1上的部分信号线，以在暴露的信号线上做FPC、IC绑定，由于对显示面板100窄边框设计的需求，容易使盖板3的切割线位于交流信号线211远离非显示区12的一侧，导致交流信号线211位于切割后的盖板3外，进而导致交流信号线211在切割盖板3时受到静电干扰，使交流信号线211损坏。本实施例通过将交流信号线211设置在非显示区12，且盖板3覆盖交流信号线211，确保了交流信号线211被切割后的盖板3覆盖，避免了交流信号线211因抗干扰能力较弱而在切割盖板3时损坏，从而能够在实现显示面板100的窄边框设计的同时，确保显示面板100的可靠性。
请参见图1，第一信号线组21包括第一直流信号线212，第一直流信号线212为VDD信号线；第二信号线组22包括第二直流信号线221和第三直流信号线222，第二直流信号线221为VSS信号线，第三直流信号线222为PVG信号线。具体的说，第一直流信号线212设置在交流信号线211靠近显示区11的一侧，第三直流信号线222邻近交流信号线211设置，第二直流信号线221 设置在第三直流信号线222远离显示区11的一侧。由于VDD信号线与显示区11内的器件连接，通过将第一直流信号线212靠近显示区11设置，避免了第一信号线212过长而增加显示面板100的制备难度。可以理解的是，图1所示的第一直流信号线212可以为VSS信号线，第二直流信号线221可以为VDD信号线。也就是说，本实施例并不对第一信号线212和第二信号线221的类型作具体限定。
请参见图2，显示面板100还包括静电防护电路4，第三直流信号线222和交流信号线211均与静电防护电路4电连接。值得一提的是，图2所示的第三直流信号线222与第二直流信号线221同层设置，静电防护电路4包括邻近盖板3的第一侧和与第一侧相对设置的第二侧，通过将第三直流信号线222和第二直流信号线221分别设置在第一侧和第二侧(图2所示的第三直流信号线222设置在第一侧，第二直流信号线221设置在第二侧；也可以是第三直流信号线222设置在第二侧，第二直流信号线221设置在第一侧)，以增大第三直流信号线222与第二直流信号线221的间距，从而避免了第三直流信号线222与第二直流信号线221产生信号串扰，进一步提高了显示面板100的可靠性。
请参见图3，第三直流信号线222与第二直流信号线221设置在不同层，第三直流信号线222与第二直流信号线221均位于静电防护电路4的同一侧。由于第三直流信号线222与第二直流信号线221设置在不同层，因此第三直流信号线222与第二直流信号线221之间难以产生信号串扰，从而可以不限定静电防护电路4的设置位置。
在一个可行的实施例中，请参见图4，第一信号线组21包括交流信号线211，第二信号线组22包括第一直流信号线212、第二直流信号线221和第三 直流信号线222。第一直流信号线212为VDD信号线，第二直流信号线221为VSS信号线，第三直流信号线222为PVG信号线。具体的说，第一直流信号线212邻近交流信号线211设置，第二直流信号线221设置在第一直流信号线212远离显示区11的一侧，第三直流信号线222设置在第二直流信号线221远离显示区11的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而在切割盖板3时损坏。可以理解的是，第一直流信号线212也可以为VSS信号线，第二直流信号线221也可以为VDD信号线，也就是说，本实施例并不对第一直流信号线212和第二直流信号线221的类型作具体限定。
请参见图5，第一信号线组21包括交流信号线211，第二信号线组22包括第一直流信号线212、第二直流信号线221和第三直流信号线222。第一直流信号线212邻近交流信号线211设置，第三直流信号线222设置在第一直流信号线212远离显示区11的一侧，第二直流信号线221设置在第三直流信号线222远离显示区11的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而在切割盖板3时损坏。
请参见图6，第一信号线组21包括交流信号线211，第二信号线组22包括第一直流信号线212、第二直流信号线221和第三直流信号线222。第三直流信号线222邻近交流信号线211设置，第一直流信号线212设置在第三直流信号线222远离显示区11的一侧，第二直流信号线221设置在第一直流信号线212远离显示区11的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而在 切割盖板3时损坏。
在一个可行的实施例中，请参见图7，第一信号线组21包括第一直流信号线212、第二直流信号线221和交流信号线211，第一直流信号线212为VDD信号线，第二直流信号线为VSS信号线；第二信号线组22包括第三直流信号线222，第三直流信号线222为PVG信号线。具体的说，第一直流信号线212邻近第三直流信号线222设置，第二直流信号线221设置在第一直流信号线212远离非显示区12的一侧，交流信号线211设置在第二直流信号线221远离非显示区12的一侧。通过此种结构的设置，使得交流信号线211尽可能的远离盖板3的切割位置，从而进一步确保了交流信号线211不会在切割盖板3时损坏。可以理解的是，第一直流信号线212也可以为VSS信号线，第二直流信号线221也可以为VDD信号线，也就是说，本实施例并不对第一直流信号线212和第二信直流号线221的类型作具体限定。
请参见图8，第一信号线组21包括第一直流信号线212、第二直流信号线221和交流信号线211，第二信号线组22包括第三直流信号线222。第一直流信号线212邻近第三直流信号线222设置，交流信号线211设置在第一直流信号线212远离非显示区12的一侧，第二直流信号线221设置在交流信号线211远离非显示区12的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而在切割盖板3时损坏。
请参见图9，第一信号线组21包括第一直流信号线212、第二直流信号线221和交流信号线211，第二信号线组22包括第三直流信号线222。交流信号线211邻近第三直流信号线222设置，第一直流信号线212设置在交流信号 线211远离非显示区12的一侧，第二直流信号线221设置在第一直流信号线212远离非显示区12的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而在切割盖板3时损坏。
在一个可行的实施例中，请参见图10，第一信号线组21包括第一直流信号线212、第三直流信号线222和交流信号线211，第一直流信号线212为VDD信号线；第二信号线组22包括第二直流信号线221，第二直流信号线221为VSS信号线。具体的说，交流信号线211邻近第二直流信号线221设置，第一直流信号线212设置在交流信号线211远离非显示区12的一侧，第三直流信号线222设置在第一直流信号线212远离非显示区12的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而在切割盖板3时损坏。可以理解的是，第一直流信号线212也可以为VSS信号线，第二直流信号线221也可以为VDD信号线，也就是说，本实施例并不对第一直流信号线212和第二直流信号线221的类型作具体限定。此外，第一直流信号线212和第三直流信号线222也可以交换设置位置，可以达到相同的技术效果。
请参见图11，第一信号线组21包括第一直流信号线212、第三直流信号线222和交流信号线211，第二信号线组22包括第二直流信号线221。第一直流信号线212邻近第二直流信号线221设置，交流信号线211设置在第一直流信号线212远离非显示区12的一侧，第三直流信号线222设置在交流信号线211远离非显示区12的一侧。通过此种结构的设置，能够确保交流信号线211夹设于阵列基板1和盖板3之间，避免了交流信号线211因抗干扰能力较弱而 在切割盖板3时损坏。可以理解的是，第一直流信号线212和第三直流信号线222也可以交换设置位置，可以达到相同的技术效果。
请参见图12，第一信号线组21包括第一直流信号线212、第三直流信号线222和交流信号线211，第二信号线组22包括第二直流信号线221。第一直流信号线212邻近第二直流信号线221设置，第三直流信号线222设置在第一直流信号线212远离非显示区12的一侧，交流信号线211设置在第三直流信号线222远离非显示区12的一侧。可以理解的是，第一直流信号线212和第三直流信号线222也可以交换设置位置，可以达到相同的技术效果。
值得一提的是，本实施例中相邻信号线之间的间距为5微米至10微米。通过此种结构的设置，避免了相邻信号线直接产生信号串扰，从而进一步提高了显示面板100的可靠性。
本发明的一实施例涉及一种显示装置，包括上述实施例中的显示面板。
显示装置可以应用在智能穿戴设备(如智能手环、智能手表)中，也可以应用在智能手机、平板电脑、显示器等设备中。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本发明的限制。
本领域的普通技术人员可以理解，上述各实施例是实现本发明的具体实施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本发明的精神和范围。

Claims (17)

  1. 一种显示面板，其中，包括：
    阵列基板；
    第一信号线组，设置在所述阵列基板上且至少包括一交流信号线；
    第二信号线组，设置在所述阵列基板且均为直流信号线；
    盖板，设置在所述阵列基板上且至少覆盖所述第一信号线组，其中，在平行于所述盖板的平面上，所述第二信号线组的投影与所述盖板的投影不重合。
  2. 根据权利要求1所述的显示面板，其中，所述阵列基板包括显示区和非显示区，所述第一信号线组和所述第二信号线组均设置在所述非显示区，所述盖板覆盖所述显示区。
  3. 根据权利要求2所述的显示面板，其中，位于所述非显示区内的所述第一信号线组和所述第二信号线组沿预设方向依次排列。
  4. 根据权利要求2所述的显示面板，其中，所述第一信号线组包括第一直流信号线，所述第一直流信号线设置在所述交流信号线远离所述显示区的一侧，或所述第一直流信号线设置在所述交流信号线邻近所述显示区的一侧；
    所述第二信号线组包括第二直流信号线和第三直流信号线，所述第二直流信号线或所述第三直流信号线邻近所述交流信号线设置。
  5. 根据权利要求4所述的显示面板，其中，所述显示面板还包括设置在所述非显示区的静电防护电路，所述第三直流信号线和所述交流信号线均与所述静电防护电路电连接。
  6. 根据权利要求5所述的显示面板，其中，所述第三直流信号线与所述第二直流信号线同层设置；
    所述静电防护电路包括邻近所述盖板的第一侧和与所述第一侧相对设置的第二侧，所述第三直流信号线和所述第二直流信号线分别位于所述第一侧和所述第二侧。
  7. 根据权利要求5所述的显示面板，其中，所述第三直流信号线与所述第二直流信号线不同层设置，所述第三直流信号线和所述第二直流信号线均位于所述静电防护电路的同一侧。
  8. 根据权利要求2所述的显示面板，其中，所述第一信号线组包括第一直流信号线和第二直流信号线，所述第二信号线组包括第三直流信号线；
    所述交流信号线设置于所述第一直流信号线和所述第二直流信号线之间，或所述交流信号线邻近所述显示区设置，或所述交流信号线远离所述显示区设置。
  9. 根据权利要求4至8任一项所述的显示面板，其中，所述第一直流信号线和所述第二直流信号线分别为VSS信号线和VDD信号线。
  10. 根据权利要求2所述的显示面板，其中，所述第二信号线组包括第一直流信号线、第二直流信号线和第三直流信号线；所述第一直流信号线为VDD信号线，所述第二直流信号线为VSS信号线，所述第三直流信号线为PVG信号线；
    所述第一直流信号线邻近所述交流信号线设置，所述第二直流信号线设置在所述第一直流信号线远离所述显示区的一侧，所述第三直流信号线设置在所述第二直流信号线远离所述显示区的一侧。
  11. 根据权利要求2所述的显示面板，其中，所述第二信号线组包括第一直流信号线、第二直流信号线和第三直流信号线；所述第一直流信号线为 VDD信号线，所述第二直流信号线为VSS信号线，所述第三直流信号线为PVG信号线；
    所述第一直流信号线邻近所述交流信号线设置，所述第三直流信号线设置在所述第一直流信号线远离所述显示区的一侧，所述第二直流信号线设置在所述第三直流信号线远离所述显示区的一侧。
  12. 根据权利要求2所述的显示面板，其中，所述第二信号线组包括第一直流信号线、第二直流信号线和第三直流信号线；所述第一直流信号线为VDD信号线，所述第二直流信号线为VSS信号线，所述第三直流信号线为PVG信号线；
    所述第三直流信号线邻近所述交流信号线设置，所述第一直流信号线设置在所述第三直流信号线远离所述显示区的一侧，所述第二直流信号线设置在所述第一直流信号线远离所述显示区的一侧。
  13. 根据权利要求2所述的显示面板，其中，所述第一信号线组包括第一直流信号线、第三直流信号线，所述第一直流信号线为VDD信号线；所述第二信号线组包括第二直流信号线，所述第二直流信号线为VSS信号线；
    所述交流信号线邻近所述第二直流信号线设置，所述第一直流信号线设置在所述交流信号线远离所述非显示区的一侧，所述第三直流信号线设置在所述第一直流信号线远离所述非显示区的一侧。
  14. 根据权利要求2所述的显示面板，其中，所述第一信号线组包括第一直流信号线、第三直流信号线，所述第一直流信号线为VDD信号线；所述第二信号线组包括第二直流信号线，所述第二直流信号线为VSS信号线；
    所述第一直流信号线邻近所述第二直流信号线设置，所述交流信号线设 置在所述第一直流信号线远离所述非显示区的一侧，所述第三直流信号线设置在所述交流信号线远离所述非显示区的一侧。
  15. 根据权利要求2所述的显示面板，其中，所述第一信号线组包括第一直流信号线、第三直流信号线，所述第一直流信号线为VDD信号线；所述第二信号线组包括第二直流信号线，所述第二直流信号线为VSS信号线；
    所述第一直流信号线邻近所述第二直流信号线设置，所述第三直流信号线设置在所述第一直流信号线远离所述非显示区的一侧，所述交流信号线设置在所述第三直流信号线远离所述非显示区的一侧。
  16. 根据权利要求1所述的显示面板，其中，相邻的信号线之间的间距为5微米至10微米。
  17. 一种显示装置，包括如权利要求1至16中任一项所述的显示面板。
PCT/CN2021/090707 2020-06-30 2021-04-28 显示面板及其制作方法、显示装置 WO2022001336A1 (zh)

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