WO2021258987A1 - 校准方法、校准装置、时间交织adc、电子设备及可读介质 - Google Patents

校准方法、校准装置、时间交织adc、电子设备及可读介质 Download PDF

Info

Publication number
WO2021258987A1
WO2021258987A1 PCT/CN2021/096555 CN2021096555W WO2021258987A1 WO 2021258987 A1 WO2021258987 A1 WO 2021258987A1 CN 2021096555 W CN2021096555 W CN 2021096555W WO 2021258987 A1 WO2021258987 A1 WO 2021258987A1
Authority
WO
WIPO (PCT)
Prior art keywords
time
channel
offset
matrix
offset adjustment
Prior art date
Application number
PCT/CN2021/096555
Other languages
English (en)
French (fr)
Inventor
罗新
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to EP21828258.0A priority Critical patent/EP4138303A4/en
Priority to US17/998,801 priority patent/US20230231565A1/en
Publication of WO2021258987A1 publication Critical patent/WO2021258987A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10Calibration or testing
    • H03M1/1009Calibration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/1205Multiplexed conversion systems
    • H03M1/121Interleaved, i.e. using multiple converters or converter parts for one channel
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0624Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0836Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/1205Multiplexed conversion systems
    • H03M1/121Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the embodiments of the present disclosure relate to the field of communication equipment, and in particular to a method for calibrating the sampling time deviation between channels of a time-interleaved analog-to-digital converter (ADC, Analog to Digital Converter), a calibration device, a time-interleaved ADC, electronic equipment, and a computer-readable medium.
  • ADC analog-to-digital converter
  • ADC Analog to Digital Converter
  • ADC Analog to Digital Converter
  • Time-Interleaved ADC (TIADC, Time-Interleaved ADC) adopts an architecture in which multiple single-channel ADCs work alternately in order, which can double the ADC conversion rate, but the system performance of the TIADC system is poor.
  • the main purpose of the embodiments of the present disclosure is to provide a calibration method, calibration device, time interleaving ADC, electronic equipment, and computer-readable medium for the sampling time deviation between time-interleaved ADC channels.
  • the embodiments of the present disclosure provide a method for calibrating the sampling time deviation between time-interleaved ADC channels.
  • the method includes the following steps: for every two adjacent channels, according to the output of the two adjacent channels Digital signal, calculate the correlation value between the digital signals of the two adjacent channels; calculate the time offset adjustment corresponding to the sampling time deviation of each channel relative to the reference channel according to the correlation value of each adjacent two channels
  • the reference channel is any designated channel among the multiple channels; according to the time offset adjustment amount corresponding to each channel, the sampling time deviation of each channel relative to the reference channel is calibrated.
  • the embodiments of the present disclosure also propose a calibration device for calibrating the sampling time deviation between time-interleaved ADC channels.
  • the calibration device includes a correlation value calculation unit, a time offset adjustment calculation unit, and a calibration unit;
  • the correlation value calculation unit is used to calculate the correlation value between the digital signals of the two adjacent channels according to the digital signals output by the two adjacent channels for every two adjacent channels;
  • the time offset adjustment calculation The unit is used to calculate the time offset adjustment amount corresponding to the sampling time deviation of each channel relative to the reference channel according to the correlation value corresponding to each two adjacent channels, and the reference channel is any designated channel among the multiple channels;
  • the calibration unit is used to calibrate the sampling time deviation of each channel relative to the reference channel according to the time offset adjustment amount corresponding to each channel.
  • inventions of the present disclosure also provide a time-interleaved ADC.
  • the time-interleaved ADC includes a plurality of ADC channels and the above-mentioned calibration device.
  • an embodiment of the present disclosure also provides an electronic device, which includes: one or more processors; a memory, on which one or more programs are stored, when the one or more programs are One or more processors execute, so that the one or more processors implement the above-mentioned calibration method; one or more I/O interfaces are connected between the processor and the memory, and are configured to implement the processor Information interaction with the storage.
  • the embodiments of the present disclosure also provide a computer-readable medium on which a computer program is stored, wherein the computer program is executed to implement the foregoing calibration method.
  • FIG. 1 is a flowchart of a method for calibrating the sampling time deviation between time-interleaved ADC channels according to Embodiment 1 of the present disclosure
  • FIG. 2 is a flowchart of a method for calibrating the sampling time deviation between time-interleaved ADC channels according to the second embodiment of the disclosure
  • FIG. 3 is a flowchart of a specific implementation of step 22 in FIG. 2;
  • FIG. 4 is a flowchart of a specific implementation of step 23 in FIG. 2;
  • Figure 5 is a flow chart for obtaining the correspondence between correlation values and time-biased feature quantities
  • Figure 6 is a flow chart for calculating the unknown constant R'(T S );
  • FIG. 7 is a schematic diagram of the SNDR curve of the digital signal output by the time-interleaved ADC under different analog signal frequencies
  • FIG. 8 is a schematic diagram of the SNDR curve of the digital signal output by the time-interleaved ADC under different sampling time deviation standard deviations
  • Figure 9 is a schematic diagram of the frequency spectrum of the digital signal output before calibration
  • Figure 10 is a schematic diagram of the frequency spectrum of the digital signal output after calibration
  • Figure 11 is a schematic diagram of the simulation of the convergence of the residual sampling time deviation after calibration
  • FIG. 12 is a block diagram of the composition of a calibration device provided in the third embodiment of the disclosure.
  • FIG. 13 is a schematic structural diagram of a time interleaving ADC provided in the fourth embodiment of the disclosure.
  • the TIADC is affected by the manufacturing process, temperature changes, environmental disturbances, etc., so that the TIADC architecture has the disadvantage of mismatch between channels, mainly including mismatch between channels, gain mismatch, and sampling time mismatch.
  • This kind of error source the error caused by the error source makes the performance of the TIADC system significantly degrade.
  • the performance degradation caused by the sampling time mismatch between channels is strongly related to the signal frequency, and becomes the main factor limiting the performance of TIADC in the high frequency part.
  • the embodiments of the present disclosure provide a calibration method, device, time interleaving ADC, electronic equipment, and computer for calibrating the sampling time deviation between time interleaving ADC channels. Read the medium.
  • the first embodiment of the present disclosure provides a method for calibrating the sampling time deviation between time-interleaved ADC channels, where the time-interleaved ADC includes multiple ADC channels, and the method includes the following steps:
  • Step 11 For every two adjacent channels, calculate the correlation value between the digital signals of the two adjacent channels according to the digital signals output by the two adjacent channels.
  • Step 12 Calculate the time offset adjustment amount corresponding to the sampling time deviation of each channel relative to the reference channel according to the correlation values corresponding to each two adjacent channels, and the reference channel is any designated channel among the multiple channels.
  • Step 13 Calibrate the sampling time deviation of each channel relative to the reference channel according to the time offset adjustment amount corresponding to each channel.
  • the method for calibrating the sampling time deviation between time-interleaved ADC channels provided in this embodiment is applicable to time-interleaved ADCs containing any number of channels.
  • By calculating the correlation value between the digital signals of every two adjacent channels, and calculating the correlation value Obtain the time offset adjustment amount corresponding to the sampling time deviation of each channel relative to the reference channel, and calibrate the sampling time of each channel based on the time offset adjustment amount of each channel. In this way, the sampling time deviation between the channels of the time interleaving ADC is calibrated, and the system performance of the time interleaving ADC is effectively improved.
  • the second embodiment of the present disclosure provides a method for calibrating the sampling time deviation between time-interleaved ADC channels, where the time-interleaved ADC includes multiple ADC channels, and the method includes the following steps:
  • Step 21 Obtain the digital signal output by each channel according to the input analog signal.
  • the time interleaving ADC After receiving the analog signal x(t) at the input of the time interleaving ADC, the time interleaving ADC performs analog-to-digital conversion on the analog signal x(t) and generates the digital output of each channel.
  • the matrix of the relationship between the k-th digital signal output by each channel and the corresponding analog signal x(t i) is expressed as follows:
  • ⁇ h 0.
  • ⁇ 3 0, and so on.
  • Step 22 For every two adjacent channels, calculate the correlation value between the digital signals of the two adjacent channels according to the digital signals output by the two adjacent channels.
  • step 22 includes:
  • Step 221 For every two adjacent channels, the digital signals of the two adjacent channels are multiplied to obtain a multiplication result corresponding to the two adjacent channels.
  • r i,i+1 [k] y i [k]*y i+1 [k]
  • y i [k] represents the k-th digital signal output by the i-th channel
  • y i+1 [k ] Represents the kth digital signal output by the i+1th channel
  • the N+1th channel is the first channel
  • r N, N+1 [k] y N [k]*y 1 [k+1].
  • the matrix of the quadrature result corresponding to each two adjacent channels is expressed as follows:
  • Step 222 Calculate the expected value corresponding to the two adjacent channels according to the multiple integration results corresponding to the two adjacent channels.
  • a weighted average is performed on multiple integration results corresponding to the two adjacent channels, and the weighted average result is used as the expected value corresponding to the two adjacent channels.
  • the weighted average can adopt the method of cumulative sum average or the method of moving average.
  • the cumulative sum average method is to obtain the expected value corresponding to the two adjacent channels by calculating the average value of the multiple integration results corresponding to the two adjacent channels, and the average value is the expected value.
  • the method of the moving average is to calculate the expected value corresponding to the two adjacent channels by using a preset moving average model according to multiple quadrature results corresponding to the two adjacent channels.
  • Step 223 Use the expected value corresponding to the two adjacent channels and the preset autocorrelation function to calculate the correlation value between the digital signals of the two adjacent channels.
  • the analog signal is a stationary process. According to the nature of the autocorrelation function of the stationary process, it can be known that the correlation value between the digital signal of the i-th channel and the i+1-th channel is:
  • R(T S + ⁇ i+1 - ⁇ i ) is the value of the autocorrelation function R at T S + ⁇ i+1 - ⁇ i
  • T S + ⁇ i+1 - ⁇ i is the i-th The difference between the actual sampling time of the +1 channel and the i-th channel.
  • Step 23 Calculate the time offset adjustment amount corresponding to the sampling time deviation of each channel relative to the reference channel according to the correlation values corresponding to each two adjacent channels, and the reference channel is any designated channel among the multiple channels.
  • step 23 includes step 231 and step 232.
  • Step 231 According to the correlation value of each two adjacent channels and the corresponding relationship between the pre-acquired correlation value and the time-offset feature quantity, the first time-offset feature quantity corresponding to the sampling time deviation of each channel with respect to the reference channel is calculated.
  • a correlation value matrix is constructed.
  • the correlation value matrix includes a column vector composed of respective correlation values.
  • the correlation value matrix is: R i,i+1 is the correlation value corresponding to the i-th channel and the i+1-th channel.
  • Step 2302 Perform a first-order Taylor series expansion on each correlation value in the correlation value matrix Rm to obtain a corresponding expansion matrix.
  • Step 2303 Perform matrix decomposition on the expansion matrix Dm to obtain a decomposition matrix, which is the product of the coefficient matrix and the time-biased feature matrix.
  • the time-biased feature matrix is:
  • the coefficient matrix A is a constant matrix with N rows and N columns, and each row of the coefficient matrix A is associated with the time-biased feature matrix
  • the product of is equal to the element corresponding to the row in the expansion matrix Dm.
  • each row in the coefficient matrix A and the time-biased feature matrix The product of is equal to the element of the corresponding row in the expansion matrix Dm, that is, the first-order Taylor series expansion of the corresponding row.
  • Step 2304 According to the correlation value matrix Rm and the decomposition matrix, determine the corresponding relationship between the correlation value and the time-offset feature quantity.
  • the relationship between the correlation value matrix Rm and the decomposition matrix can be obtained:
  • Step 232 Calculate the time offset adjustment amount corresponding to each channel according to the first time offset feature amount corresponding to each channel and the corresponding relationship between the time offset feature amount and the time offset adjustment amount obtained in advance.
  • the corresponding relationship between the time-offset feature quantity and the time-offset adjustment amount can be obtained in the following manner: according to the time-offset feature quantity matrix, the corresponding relationship between the time-offset feature quantity and the time-offset adjustment quantity is determined.
  • known timing offset feature quantity ⁇ j and the actual amount of the deviation of the sampling time ⁇ j is linear, a constant ratio of the two R '(T S), based on this, when constructed Correspondence between the offset feature amount ⁇ i and the time offset adjustment amount.
  • ⁇ j R '(T S) * Dsk j, Dsk j for the partial adjustment amount corresponding to the j-th channel.
  • the value of the unknown constant R'(T S ) can be obtained through the following steps 2321 to 2323:
  • Step 2321 Acquire the second time offset feature ⁇ old corresponding to each channel.
  • the historical digital signal output by each channel is used to calculate the correlation value corresponding to each two adjacent channels using the above-mentioned correlation value calculation method, and then the corresponding relationship between the above-mentioned correlation value and the time-shift feature is used to calculate Obtain the second time-offset feature ⁇ old corresponding to each channel.
  • Step 2322 after adjusting the sampling time of each channel according to the preset time offset adjustment amount ⁇ Dsk, obtain the first time offset feature quantity ⁇ new corresponding to each channel.
  • the sampling time of each channel is adjusted according to the preset time offset adjustment amount ⁇ Dsk, where the reference channel does not have a time offset, so the sampling time of the reference channel does not need to be adjusted.
  • the above-mentioned step 21, step 22, and step 231 are performed to obtain the first time offset feature ⁇ new corresponding to each channel.
  • ⁇ j R'(T S )*Dsk j
  • step 232 includes: for each channel except the reference channel, according to the first time-offset feature quantity corresponding to the channel and the corresponding relationship between the time-offset feature quantity obtained in advance and the time-offset adjustment quantity, adopt The preset adaptive algorithm iteratively calculates the time offset adjustment amount corresponding to the channel, and uses the iterative calculation result as the time offset adjustment amount corresponding to the channel.
  • the adaptive algorithm includes the formula:
  • is the preset adjustment coefficient
  • sign(R'(T S )) is the sign bit of R'(T S )
  • ⁇ j represents the time offset characteristic value corresponding to the j-th channel
  • Dsk j (n) represents The actual sampling time deviation of the j-th channel adjusted at the nth time
  • Dsk j (n+1) represents the actual sampling time deviation of the j-th channel adjusted at the n+1th time;
  • the bias is determined when the first feature amount corresponding to each channel, when the partial characteristic amount and the partial amount of the adjustment and when the correspondence relation in a correspondence relationship unknown constants R '(T S), using a self-
  • the adaptive algorithm makes the time offset adjustment close to the actual sampling time offset, thereby estimating the value of the time offset adjustment.
  • step 232 includes: for each channel other than the reference channel, according to the first time-offset feature quantity corresponding to the channel and the corresponding relationship between the time-offset feature quantity obtained in advance and the time-offset adjustment quantity, pass
  • the preset adaptive algorithm iteratively calculates the time offset adjustment value of the channel, and uses the iterative calculation result as the time offset adjustment value corresponding to the channel; the adaptive algorithm includes the formula:
  • is the preset adjustment coefficient
  • ⁇ j represents the time offset feature corresponding to the j-th channel
  • Dsk j (n) represents the actual sampling time deviation of the j-th channel in the n-th adjustment
  • Dsk j (n +1) represents the actual sampling time deviation adjusted by the jth channel at the n+1th time.
  • the time skew adjustment can be quickly converged to near the optimal value, and on the other hand, the time skew change can be well tracked. At the same time, it can overcome the problem that the unknown constant R'(T S ) is difficult to accurately estimate.
  • Step 24 Calibrate the sampling time deviation of each channel relative to the reference channel according to the time offset adjustment amount corresponding to each channel.
  • the sampling time of each channel (except the reference channel) is adjusted according to the time offset adjustment amount corresponding to each channel in the analog domain to compensate for the sampling time deviation of each channel relative to the reference channel , So as to calibrate the sampling time deviation of each channel relative to the reference channel.
  • the digital output of each channel is interpolated by using a preset interpolation algorithm according to the time offset adjustment amount corresponding to each channel in the digital domain to perform error calibration.
  • the time-interleaved ADC includes two ADC channels (channel 1 and channel 2) as an example to describe the calibration method of this embodiment.
  • ⁇ 2 R'(T S )*Dsk 2 , where Dsk 2 represents the time offset adjustment amount corresponding to channel 2.
  • the time-skew characteristic value corresponding to channel 2 can be calculated from the corresponding relationship between the above-mentioned correlation value and the time-skew feature quantity.
  • the time offset adjustment one way is to calculate the unknown constant R'(T S ), and then use the corresponding relationship between the time offset feature and the time offset adjustment to directly calculate the time offset adjustment.
  • Another way is to adjust the bias when the bias adjustment using an adaptive algorithm so that a predetermined amount of deviation approximate the actual sampling time, or the unknown constants in the calculation of R '(T S) using an adaptive algorithm so that a preset amount Approximation For the actual sampling time deviation, refer to the above description for the example process, which will not be repeated here.
  • the time-interleaved ADC includes 4 ADC channels (channels 1, 2, 3, and 4) as an example to describe the calibration method of this embodiment.
  • the inverse matrix is used to solve the above decomposition matrix, and the corresponding relationship between the correlation value and the time-skew feature quantity can be determined as :
  • the corresponding relationship between the time offset feature amount and the time offset adjustment amount can be determined:
  • Dsk 2 represents the time offset adjustment amount corresponding to channel 2
  • Dsk 3 represents the time offset adjustment amount corresponding to channel 3
  • Dsk 4 represents the time offset adjustment amount corresponding to channel 4.
  • the corresponding relationship between the correlation values and the time-skew feature quantities can be calculated to obtain the time-skew feature quantities corresponding to channel 2, channel 3, and channel 3, respectively.
  • Another way is to adjust the bias when the bias adjustment using an adaptive algorithm so that a predetermined amount of deviation approximate the actual sampling time, or the unknown constants in the calculation of R '(T S) using an adaptive algorithm so that a preset amount Approximation The actual sampling time deviation.
  • a predetermined amount of deviation approximate the actual sampling time, or the unknown constants in the calculation of R '(T S) using an adaptive algorithm so that a preset amount Approximation The actual sampling time deviation.
  • a time-interleaved ADC including 4 channels, a sampling rate of 6 GHz, and a resolution of 13 bits is taken as an example, where the minimum calibration step is set to 10 femtoseconds.
  • Figure 7 shows the SNDR curve of the time-interleaved ADC output signal at different analog signal frequencies when the standard deviation (Timing skew std) of the actual sampling time deviation between channels is fixed at 100 femtoseconds;
  • Figure 8 shows the frequency of the analog signal At 2.6GHz, the relationship between the signal-to-noise-distortion ratio (SNDR) of the digital signal output by the time-interleaved ADC and the variation of the standard deviation of the sampling time between channels.
  • SNDR signal-to-noise-distortion ratio
  • Figure 9 shows the frequency spectrum of the signal before calibration
  • Figure 10 shows the frequency spectrum of the signal after calibration. Comparing Figure 9 and Figure 10, it can be seen that after calibration, the system performance has been significantly improved. Before calibration, the spurs caused by time offset mismatch reach about 50dBc, and after calibration, the time offset mismatch is basically eliminated, and the corresponding spurs and noise floor are at the same level.
  • Figure 11 shows a simulation diagram of the convergence of the residual sampling time deviation after calibration. It can be seen from the figure that the standard deviation of the initial sampling is about 270fs; after the first fixed adjustment, the time skew increases slightly. After a quick adjustment, the system performance has been significantly improved, and the residual time skew is reduced to about 10 fs. Seconds; after several iterations, the performance basically converges. The residual deviation in the figure is limited by the calibration step length of 10 femtoseconds, so the residual deviation oscillates between 2 to 5 femtoseconds.
  • the third embodiment of the present disclosure provides a calibration device for calibrating the sampling time deviation between time-interleaved ADC channels.
  • the calibration device includes a channel signal acquisition unit 301, a correlation value calculation unit 302, and a time offset.
  • the calculation unit 303 and the calibration unit 304 are adjusted.
  • the channel signal acquisition unit 301 is used to acquire the digital signal output by each channel according to the input analog signal.
  • the correlation value calculation unit 302 is configured to, for every two adjacent channels, calculate the correlation value between the digital signals of the two adjacent channels according to the digital signals output by the two adjacent channels.
  • the time offset adjustment calculation unit 303 is used to calculate the time offset adjustment amount corresponding to the sampling time deviation of each channel relative to the reference channel according to the correlation value corresponding to each two adjacent channels.
  • the reference channel is any one of the specified channels.
  • Channel The calibration unit 304 is configured to calibrate the sampling time deviation of each channel relative to the reference channel according to the time offset adjustment amount corresponding to each channel.
  • the calibration device provided in this embodiment, it is used to implement the calibration method provided in the first embodiment or the second embodiment, and the relevant description can refer to the description of the first embodiment or the second embodiment, and will not be repeated here.
  • the fourth embodiment of the present disclosure provides a time-interleaved ADC.
  • the time-interleaved ADC includes a plurality of ADC channels (ADC 1 to ADC N ) and a calibration device 100.
  • the calibration device includes the above-mentioned third embodiment.
  • the description of the calibration device for example, refer to the description of the third embodiment above, which will not be repeated here.
  • the time-interleaved ADC further includes a multiplexer 200, which is used to interleave the output of the N ADC channels, thereby generating a digital output at a sampling rate.
  • each ADC channel is correspondingly provided with a sampling switch
  • the sampling switch is used to control the connection and shutdown of the analog signal input terminal and the input terminal of the corresponding ADC channel
  • each sampling switch is denoted as S/H 1 ⁇ S/ H N
  • each sampling switch is controlled by a corresponding sampling clock
  • each sampling clock is denoted as CLK 1 ⁇ CLK N.
  • the fifth embodiment of the present disclosure provides an electronic device, which includes: one or more processors; a memory, on which one or more programs are stored, and when one or more programs are executed by one or more processors, One or more processors implement the aforementioned calibration method; one or more I/O interfaces are connected between the processor and the memory, and are configured to implement information interaction between the processor and the memory.
  • the sixth embodiment of the present disclosure provides a computer-readable medium on which a computer program is stored, wherein the computer program is executed to implement the above-mentioned calibration method.
  • the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may consist of several physical components.
  • the components are executed cooperatively.
  • Certain physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit .
  • a processor such as a central processing unit, a digital signal processor, or a microprocessor
  • Such software may be distributed on a computer-readable medium, and the computer-readable medium may include a computer storage medium (or non-transitory medium) and a communication medium (or transitory medium).
  • Computer storage medium includes volatile and non-volatile data implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data).
  • Information such as computer-readable instructions, data structures, program modules, or other data.
  • Computer storage media include but are not limited to RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or Any other medium used to store desired information and that can be accessed by a computer.
  • a communication medium usually contains computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium. .

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

本公开提供一种时间交织ADC通道间采样时间偏差的校准方法、装置、时间交织ADC、电子设备及计算机可读介质,属于通信设备领域。其中时间交织ADC包括多个ADC通道,该方法包括:针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值;根据每相邻两个通道对应的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个通道中任一指定的通道;根据各通道对应的时偏调整量,对各通道相对于参考通道的采样时间偏差进行校准。

Description

校准方法、校准装置、时间交织ADC、电子设备及可读介质
相关申请的交叉引用
本申请基于申请号为202010575519.8、申请日为2020年6月22日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的全部内容在此以引入方式并入本申请。
技术领域
本公开实施例涉及通信设备领域,尤其涉及时间交织模数转换器(ADC,Analogto DigitalConverter)通道间采样时间偏差的校准方法、校准装置、时间交织ADC、电子设备及计算机可读介质。
背景技术
近年来,随着信息技术的发展,在无线通信、高精度仪器仪表和有线传输等领域对于高速高精度模数转换器(ADC,Analogto DigitalConverter)的要求越来越高。受集成电路工艺和设计水平的影响,传统的单通道ADC往往难以同时实现高速和高精度的要求。采用时间交织技术,让多个单通道ADC并行工作,是一种提高ADC转换速率的有效方法,在近些年里得到了越来越多的关注和采纳。
时间交织模数转换器(TIADC,Time-Interleaved ADC)采用多个单通道ADC有序交替工作的架构,可以成倍提高ADC的转换速率,但TIADC系统的系统性能不佳。
发明内容
本公开实施例的主要目的在于提出一种时间交织ADC通道间采样时间偏差的校准方法、校准装置、时间交织ADC、电子设备及计算机可读介质。
为实现上述目的,本公开实施例提供了一种时间交织ADC通道间采样时间偏差的校准方法,所述方法包括以下步骤:针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值;根据每相邻两个通道对应的相关值,计算出该各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个所述通道中任一指定的通道;根据各通道对应的时偏调整量,对各通道相对于所述参考通道的采样时间偏差进行校准。
为实现上述目的,本公开实施例还提出了一种校准装置,用于对时间交织ADC通道间采样时间偏差进行校准,该校准装置包括相关值计算单元、时偏调整计算单元和校准单元;所述相关值计算单元用于针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值;所述时偏调整计算单元用于根据每相邻两个通道对应的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个所述通道中任一指定的通道;所述校准单元用于根据各通道对应的时偏调整量,对各通道相对于所述参考通道的采样时间偏差进行校准。
为实现上述目的,本公开实施例还提供了一种时间交织ADC,该时间交织ADC包括多个ADC通道和上述的校准装置。
为实现上述目的,本公开实施例还提供了一种电子设备,其包括:一个或多个处理器;存储器,其上存储有一个或多个程序,当所述一个或多个程序被所述一个或多个处理器执行,使得所述一个或多个处理器实现上述的校准方法;一个或多个I/O接口,连接在所述处理器与存储器之间,配置为实现所述处理器与所述存储器的信息交互。
为实现上述目的,本公开实施例还提供了一种计算机可读介质,其上存储有计算机程序,其中,所述计算机程序被执行时实现上述的校准方法。
附图说明
图1为本公开实施例一提供的一种时间交织ADC通道间采样时间偏差的校准方法的流程图;
图2为本公开实施例二提供的一种时间交织ADC通道间采样时间偏差的校准方法的流程图;
图3为图2中步骤22的一种具体实现方式的流程图;
图4为图2中步骤23的一种具体实现方式的流程图;
图5为一种获取相关值与时偏特征量的对应关系的流程图;
图6为一种计算未知常数R'(T S)的流程图;
图7为不同的模拟信号频率下时间交织ADC输出的数字信号的SNDR曲线的示意图;
图8为不同的采样时偏标准差下时间交织ADC输出的数字信号的SNDR曲线的示意图;
图9为校准前输出的数字信号的频谱示意图;
图10为校准后输出的数字信号的频谱示意图;
图11为经过校准后残留采样时间偏差收敛的仿真示意图;
图12为本公开实施例三提供的一种校准装置的组成框图;
图13为本公开实施例四提供的一种时间交织ADC的结构示意图。
具体实施方式
为使本领域的技术人员更好地理解本公开实施例的技术方案,下面结合附图对本公开实施例提供的时间交织ADC通道间采样时间偏差的校准方法、校准装置、时间交织ADC、电子设备及计算机可读介质进行详细描述。
在本文中,附图用来提供对本公开实施例的进一步理解,并且构成说明书的一部分,与本公开的实施例一起用于解释本公开,并不构成对本公开的限制。
在下文中将参考附图更充分地描述示例实施例,但是所述示例实施例可以以不同形式来体现且不应当被解释为限于本文阐述的实施例。反之,提供这些实施例的目的在于使本公开透彻和完整,并将使本领域技术人员充分理解本公开的范围。在不冲突的情况下,本公开各实施例及实施例中的各特征可相互组合。
本文所使用的术语仅用于描述特定实施例,且不意欲限制本公开。如本文所使用的,“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。同样的,单数形式“一个”和“该”也意欲包括复数形式,除非上下文另外清楚指出。还将理解的是,当本说明书中使用术语“包括”和/或“由……制成”时,指定存在所述特征、整体、步骤、操作、元件和/或组件,但不排除存在或添加一个或多个其他特征、整体、步骤、操作、元件、组件和/或其群组。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
本文所述实施例可借助本公开的理想示意图而参考平面图和/或截面图进行描述。因此,可根据制造技术和/或容限来修改示例图示。因此,实施例不限于附图中所示的实施例,而是包括基于制造工艺而形成的配置的修改。因此,附图中例示的区具有示意性属性,并且图中所示区的形状例示了元件的区的具体形状,但并不旨在是限制性的。
除非另外限定,否则本文所用的所有术语(包括技术和科学术语)的含义与本领域普通技术人员通常理解的含义相同。还将理解,诸如那些在常用字典中限定的那些术语应当被解释为具有与其在相关技术以及本公开的背景下的含义一致的含义,且将不解释为具有理想化或过度形式上的含义,除非本文明确如此限定。
在本公开实施例中,TIADC受制造工艺、温度变化、环境扰动等影响,使得TIADC的架构存在着通道间不匹配的缺点,主要包括通道间失调失配、增益失配以及采样时间失配三 种误差源,该误差源所引起的误差使得TIADC系统的性能显著下降。其中,通道间的采样时间失配造成的性能恶化与信号频率强相关,在高频部分成为限制TIADC性能的主要因素。
因此,为了有效解决采样时间失配造成的TIADC系统的性能下降的问题,本公开实施例提供了一种时间交织ADC通道间采样时间偏差的校准方法、装置、时间交织ADC、电子设备及计算机可读介质。
下面结合实施例和附图,对本公开实施例的技术方案作进一步详细描述。
实施例一
如图1所示,本公开实施例一提供了一种时间交织ADC通道间采样时间偏差的校准方法,其中,时间交织ADC包括多个ADC通道,该方法包括以下步骤:
步骤11、针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值。
步骤12、根据每相邻两个通道对应的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个所述通道中任一指定的通道。
步骤13、根据各通道对应的时偏调整量,对各通道相对于所述参考通道的采样时间偏差进行校准。
本实施例所提供的时间交织ADC通道间采样时间偏差的校准方法,适用于包含任意通道数的时间交织ADC,通过计算每相邻两个通道的数字信号之间的相关值,并从相关值中获取各通道相对于参考通道的采样时间偏差所对应的时偏调整量,基于各通道的时偏调整量对各通道的采样时间进行校准。从而实现对时间交织ADC的通道间的采样时间偏差进行校准,有效提高了时间交织ADC的系统性能。
实施例二
如图2所示,本公开实施例二提供了一种时间交织ADC通道间采样时间偏差的校准方法,其中,时间交织ADC包括多个ADC通道,该方法包括以下步骤:
步骤21、获取各通道根据输入的模拟信号所输出的数字信号。
在本实施例中,时间交织ADC包括N个ADC通道(N≥2),每个通道的采样率为fs/N,fs为时间交织ADC的时钟频率,每个通道的采样时间间隔为NT S,T S为时间交织ADC的采样时钟周期,T S=1/fs,各通道的采样时钟由各通道的采样开关S/H所对应时钟信号CLK提供。
在时间交织ADC的输入端接收到模拟信号为x(t)后,时间交织ADC对模拟信号x(t)进行模数转换,并产生各通道的数字输出,各通道输出的数字信号为Y={y 1[k],y 2[k],…,y i[k],…,y N[k]},其中,y i[k]表示第i个通道输出的第k个数字信号, i=1、2、3、....、N,N为时间交织ADC的通道数,k=0,1,2,...,L,L为单通道采样点数。其中,N个ADC通道以交替的采样时间间隔NT S对输入的模拟信号x(t)进行采样和保持。
在本实施例中,第i个通道输出的第k个数字信号y i[k]与对应的模拟信号x(t i)的关系为:y i[k]=x(NkT S+(i-1)T Si),其中,t i为第i个通道的实际采样时间,t i=NkT S+(i-1)T Si,τ i为第i个通道相对于参考通道的实际采样时间偏差(采样时间失配)量。其中,各通道输出的第k个数字信号与对应的模拟信号x(t i)的关系的矩阵表示如下:
Figure PCTCN2021096555-appb-000001
在本实施例中,设定第h(h=1、2、3、......、N-1或N)个(例如第1个)通道为参考通道,则τ h=0。例如,以第1个通道为参考通道时,则τ 1=τ N+1=0。若以其他通道为参考通道,例如以第2个通道为参考通道时,则τ 2=0,同理,若以第3个通道为参考通道,则τ 3=0,依此类推。以第h个通道为参考通道时,则τ h=0。
步骤22、针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值。
在本实施例中,针对每相邻两个通道,根据该相邻两个通道的数字信号,利用预设的自相关函数,计算得到该相邻两个通道的数字信号之间的相关值。如图3所示,步骤22包括:
步骤221、针对每相邻两个通道,对该相邻两个通道的数字信号进行求积,得到该相邻两个通道对应的求积结果。
其中,r i,i+1[k]=y i[k]*y i+1[k],y i[k]表示第i个通道输出的第k个数字信号,y i+1[k]表示第i+1个通道输出的第k个数字信号,r i,i+1[k]表示第i个通道和第i+1个通道对应的第k个求积结果,i=N时,第N+1个通道为第1个通道,r N,N+1[k]=y N[k]*y 1[k+1]。其中,每相邻两个通道对应的求积结果的矩阵表示如下:
Figure PCTCN2021096555-appb-000002
步骤222、根据该相邻两个通道对应的多个求积结果,计算该相邻两个通道对应的期望值。
在本实施例中,通过对该相邻两个通道对应的多个求积结果进行加权平均,加权平均结果作为该相邻两个通道对应的期望值。其中加权平均可以采用累加求和平均的方式或者采用滑动平均的方式。其中,累加求和平均的方式是通过计算该相邻两个通道对应的多个求积结果的平均值,得到该相邻两个通道对应的期望值,该平均值为该期望值。滑动平均的方式是根据该相邻两个通道对应的多个求积结果,利用预设的滑动平均模型计算得到该相邻两个通道对应的期望值。滑动平均模型包括公式:R[k]=(1-α)*R[k-1]+α*r[k],α为平滑系数,r[k]为第k个时期计算出的求积结果,R[k]为第k个时期计算出的期望值,R[k-1]为第k-1个时期计算出的期望值。
步骤223、利用该相邻两个通道对应的期望值和预设的自相关函数,计算得到该相邻两个通道的数字信号之间的相关值。
其中,自相关函数为:R i,i+1=E(r i,i+1[k])=E(y i[k]*y i+1[k]),R i,i+1表示第i个通道与第i+1个通道的数字信号之间的相关值,E(r i,i+1[k])表示第i个通道与第i+1个通道对应的期望值。
在本实施例中,模拟信号是平稳过程,根据平稳过程的自相关函数的性质,可知,第i个通道与第i+1个通道的数字信号之间的相关值为:
R i,i+1=E(x(NkT S+(i-1)T Si)*x(NkT S+i*T Si+1))=R(T Si+1i)
其中,R(T Si+1i)为所述自相关函数R在T Si+1i处的值,T Si+1i为第i+1个通道与第i个通道的实际采样时间之间的差值。
步骤23、根据每相邻两个通道对应的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个通道中任一指定的通道。
如图4所示,步骤23包括步骤231和步骤232。
步骤231、根据每相邻两个通道的相关值和预先获取的相关值与时偏特征量的对应关系,计算得到各通道相对于参考通道的采样时间偏差所对应的第一时偏特征量。
如图5所示,相关值与时偏特征量的对应关系通过以下步骤2301~步骤2304获取:
步骤2301、构造相关值矩阵,相关值矩阵包括由各相关值构成的列向量。
其中,所述相关值矩阵为:
Figure PCTCN2021096555-appb-000003
R i,i+1为第i个通道与第i+1个通道对应的相关值。
步骤2302、对相关值矩阵Rm中各相关值进行一阶泰勒级数展开,得到对应的展开矩阵。
其中,第i个通道和第i+1个通道对应的相关值R i,i+1的一阶泰勒级数展开式为:R i,i+1=R(T si+1i)≈R(T s)+R'(T s)*(τ i+1i),R'(T S)为自相关函数R在T S处的导数,R'(T S)为未知常数,展开矩阵为:
Figure PCTCN2021096555-appb-000004
步骤2303、对展开矩阵Dm进行矩阵分解,得到分解矩阵,分解矩阵为系数矩阵和时偏特征量矩阵的乘积。
其中,时偏特征量矩阵为:
Figure PCTCN2021096555-appb-000005
系数矩阵A为N行N列的常数矩阵,系数矩阵A的每一行与时偏特征量矩阵
Figure PCTCN2021096555-appb-000006
的乘积等于展开矩阵Dm中对应该行的元素。
可以理解的是,当设定第1个通道为参考通道时,τ 1=0,时偏特征量矩阵为:
Figure PCTCN2021096555-appb-000007
相应的,系数矩阵A为:
Figure PCTCN2021096555-appb-000008
当设定第2个通道为参考通道时,τ 2=0,
Figure PCTCN2021096555-appb-000009
相应的,系数矩阵A为:
Figure PCTCN2021096555-appb-000010
当设定第3个通道为参考通道时,τ 3=0,
Figure PCTCN2021096555-appb-000011
相应的,系数矩阵A为:
Figure PCTCN2021096555-appb-000012
依此类推,系数矩阵A中的每一行与时偏特征量矩阵
Figure PCTCN2021096555-appb-000013
的乘积等于展开矩阵Dm中的相应行的元素,即相应行的一阶泰勒级数展开式。
步骤2304、根据相关值矩阵Rm和分解矩阵,确定相关值与时偏特征量的对应关系。
在一个示例中,根据上述步骤2301至步骤2303,可得相关值矩阵Rm和分解矩阵的关系:
Figure PCTCN2021096555-appb-000014
定义时偏特征量为:φ j=R'(T S)*τ j,可得相关值与时偏特征量的对应关系。其中,相关 值与时偏特征量的对应关系为:
Figure PCTCN2021096555-appb-000015
INV(A)为系数矩阵A的逆矩阵,φ j=R'(T S)*τ j(j=1,2,…,h-1,h+1,…,N),φ j表示第j个通道对应的第一时偏特征量,τ j表示第j个通道对应的实际采样时间偏差量。
步骤232、根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量。
其中,时偏特征量与时偏调整量的对应关系可以通过以下方式获取:根据时偏特征量矩阵,确定出时偏特征量与时偏调整量的对应关系。
在一个示例中,根据时偏特征量矩阵,可知时偏特征量φ j与实际采样时间偏差量τ j呈线性关系,二者的比值为常数R'(T S),基于此,构造出时偏特征量φ i与时偏调整量的对应关系。其中,时偏特征量与时偏调整量的对应关系为:φ j=R'(T S)*Dsk j,Dsk j为第j个通道对应的时偏调整量。
在一些实施例中,通过计算未知常数R'(T S)的值,从而根据时偏特征量与时偏调整量的对应关系计算出时偏调整量。其中,如图6所示,未知常数R'(T S)的值可以通过以下步骤2321~步骤2323获取:
步骤2321、获取各通道对应的第二时偏特征量φ old
在一个示例中,利用各通道输出的历史数字信号,并采用上述相关值的计算方法计算得到每相邻两个通道对应的相关值后,利用上述相关值与时偏特征量的对应关系,计算得到各通道对应的第二时偏特征量φ old
步骤2322、在根据预设时偏调整量ΔDsk调整各通道的采样时间之后,获取各通道对应的第一时偏特征量φ new
在确定各通道对应的第二时偏特征量φ old后,根据预设时偏调整量ΔDsk调整各通道的采样时间,其中,参考通道由于不存在时偏,因此参考通道的采样时间无需调整。在根据预设时偏调整量ΔDsk调整各通道的采样时间之后,执行上述步骤21、步骤22、步骤231,以获取各通道对应的第一时偏特征量φ new
步骤2323、根据第一时偏特征量φ new、第二时偏特征量φ old、预设时偏调整量ΔDsk以及时偏特征量与时偏调整量的对应关系:Δφ=R'(T S)*ΔDsk,计算出未知常数R'(T S),其中,Δφ=φ newold
根据上述时偏特征量与时偏调整量的对应关系:φ j=R'(T S)*Dsk j,可知时偏特征量与时偏调整量呈线性关系,时偏特征量的变化量与时偏调整量的变化量同样满足Δφ=R'(T S)*ΔDsk,由此可得未知常数
Figure PCTCN2021096555-appb-000016
因此根据第一时偏特征量φ new、第二时偏特征量φ old、预设时偏调整量ΔDsk和时偏特征量与时偏调整量的对应关系:Δφ=R'(T S)*ΔDsk即可计算出未知常数R'(T S)。
在确定出未知未知常数R'(T S)的值的情形下,步骤232可以包括:根据第一时偏特征量φ new和时偏特征量与时偏调整量的对应关系:φ j=R'(T S)*Dsk j,计算得到各通道的采样时间对应的时偏调整量;其中,φ j表示第j个通道对应的第一时偏特征量,Dsk j表示第j个通道对应的时偏调整量。
在一些实施例中,在确定出各通道对应的第一时偏特征量以及时偏特征量与时偏调整量的对应关系后,利用自适应算法使得时偏调整量逼近实际采样时间偏差量,从而估计出时偏调整量的值。此种情形下,步骤232包括:针对除所述参考通道以外的每个通道,根据该通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,采用预设的自适应算法对该通道对应的时偏调整量进行迭代计算,并将迭代计算结果作为该通道对应的时偏调整量。其中,自适应算法包括公式:
Dsk j(n+1)=Dsk j(n)-μ*φ j*sign(R'(T S))
其中,μ为预设的调整系数,sign(R'(T S))为R'(T S)的符号位,φ j表示第j个通道对应的时偏特征量,Dsk j(n)表示第j个通道在第n次调整的实际采样时间偏差量,Dsk j(n+1)表示第j个通道在第n+1次调整的实际采样时间偏差量;当模拟信号的频谱位于第偶数个奈奎斯特(Nyquist)区域时,sign(R'(T S))=1,当模拟信号的频谱位于第奇数个奈奎斯特区域时,sign(R'(T S))=-1。
在一个示例中,针对除参考通道以外的每个通道,初始(n=1)时,给定Dsk j(1)的值,在计算出该通道的第1个时偏特征量,通过上述公式,计算得到Dsk j(2)的值,在计算出该通道的第2个时偏特征量后,再次通过上述公式,计算得到Dsk j(3)的值,依此类推,直至迭 代收敛,并将迭代最终的收敛值即迭代计算结果,作为该通道对应的时偏调整量。
在一些实施例中,在确定出各通道对应的第一时偏特征量、时偏特征量与时偏调整量的对应关系以及该对应关系中的未知常数R'(T S)后,利用自适应算法使得时偏调整量逼近实际采样时间偏差量,从而估计出时偏调整量的值。此种情形下,步骤232包括:针对除所述参考通道以外的每个通道,根据该通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,通过预设的自适应算法对该通道的时偏调整量进行迭代计算,并将迭代计算结果作为该通道对应的时偏调整量;其中,自适应算法包括公式:
Dsk j(n+1)=Dsk j(n)-μ*φ j/R'(T S)
其中,μ为预设的调整系数,φ j表示第j个通道对应的时偏特征量,Dsk j(n)表示第j个通道在第n次调整的实际采样时间偏差量,Dsk j(n+1)表示第j个通道在第n+1次调整的实际采样时间偏差量。
通过确定未知常数R'(T S)结合自适应算法的方式计算时偏调整量,一方面可以将时偏调整量快速收敛到最优值附近,另一方面可以很好地跟踪时偏的变化,同时可以克服未知常数R'(T S)难以精确估计的问题。
步骤24、根据各通道对应的时偏调整量,对各通道相对于所述参考通道的采样时间偏差进行校准。
在一些实施例中,通过在模拟域,根据各通道对应的时偏调整量,对各通道(除参考通道外)的采样时间进行调整,以补偿各通道相对于所述参考通道的采样时间偏差,从而对各通道相对于所述参考通道的采样时间偏差进行校准。
在一些实施例中,通过在数字域,根据各通道对应的时偏调整量,采用预设的插值算法,对各通道的数字输出进行插值,以进行误差校准。
下面以时间交织ADC包括2个ADC通道(通道1和通道2)为例,对本实施例的校准方法进行说明。
以通道1为参考通道,则参考通道(通道1)的延迟失配(实际采样时间偏差量)τ 1=0,记通道2相对于通道1的延迟失配(实际采样时间偏差量)为τ 2,则该2个通道的数字信号表示如下:
Figure PCTCN2021096555-appb-000017
其中,x(t i)(t i=2KT S+(i-1)T Si)是第i(i=1、2)个通道在实际采样时间t i的采样值。通过上述相关值的计算方法,可得该2个通道中相邻两个通道对应的相关值为:
Figure PCTCN2021096555-appb-000018
采用一阶泰勒级数展开近似,则相邻两个通道(通道1、2)对应的相关值可以表示为:
Figure PCTCN2021096555-appb-000019
进一步进行矩阵分解,得到分解矩阵:
Figure PCTCN2021096555-appb-000020
定义通道2相对于参考通道(通道1)的时偏特征量为φ 2=R'(T S)*τ 2,利用逆矩阵对上述分解矩阵进行求解,可以确定出相关值与通道2的时偏特征量的对应关系为:
Figure PCTCN2021096555-appb-000021
由此可得,通道2的时偏特征量为:φ 2=R'(T S)*τ 2=0.5*R 1,2-0.5*R 2,1。利用时偏调整量用来表征实际采样时间偏差量,则可以确定出通道2的时偏特征量与时偏调整量的对应关系:φ 2=R'(T S)*Dsk 2,其中,Dsk 2表示通道2对应的时偏调整量。
在计算出相邻两个通道(通道1、2)对应的相关值后,由上述相关值与时偏特征量的对应关系即可计算得到通道2对应的时偏特征量。而对于时偏调整量,一种方式是通过计算出未知常数R'(T S),继而利用上述时偏特征量与时偏调整量的对应关系,即可直接计算出时偏调整量,此种情形的示例计算方式可以参见上述的描述,此处不再赘述。
另一种方式是利用预设的自适应算法使时偏调整量逼近实际采样时间偏差量,或者在计算出未知常数R'(T S)后利用预设的自适应算法使时偏调整量逼近实际采样时间偏差量,示例过程可参见上述的描述,此处不再赘述。
下面再以时间交织ADC包括4个ADC通道(通道1、2、3、4)为例,对本实施例的校准方法进行说明。
以通道1为参考通道,其他通道2~4对齐通道1,则参考通道(通道1)的延迟失配(实际采样时间偏差量)τ 1=0,记通道2~4相对于通道1的延迟失配(实际采样时间偏差量)分别为τ 2~τ 4。则该4个通道的数字信号表示如下:
Figure PCTCN2021096555-appb-000022
其中,x(t i)(t i=4KT S+(i-1)T Si)是第i(i=1、2、3、4)个通道在实际采样时间t i 的采样值。通过上述相关值的计算方法,可得该4个通道中每相邻两个通道对应的相关值为:
Figure PCTCN2021096555-appb-000023
采用一阶泰勒级数展开近似,则每相邻两个通道的相关值可以表示为:
Figure PCTCN2021096555-appb-000024
进一步进行矩阵分解,得到分解矩阵:
Figure PCTCN2021096555-appb-000025
定义通道2相对于参考通道的时偏特征量为φ 2=R'(T S)*τ 2,通道3相对于参考通道的时偏特征量为φ 3=R'(T S)*τ 3,通道4相对于参考通道的时偏特征量为φ 4=R'(T S)*τ 4,利用逆矩阵对上述分解矩阵进行求解,可以确定出相关值与时偏特征量的对应关系为:
Figure PCTCN2021096555-appb-000026
利用时偏调整量用来表征实际采样时间偏差量,则可以确定出时偏特征量与时偏调整量的对应关系:
Figure PCTCN2021096555-appb-000027
其中,Dsk 2表示通道2对应的时偏调整量,Dsk 3表示通道3对应的时偏调整量,Dsk 4表示通道4对应的时偏调整量。
在计算出每相邻两个通道对应的相关值后,由上述相关值与时偏特征量的对应关系即可计算得到通道2、通道3和通道3分别对应的时偏特征量。
而对于时偏调整量,一种方式是通过计算出未知常数R'(T S),继而利用上述时偏特征量与时偏调整量的对应关系,即可直接计算出时偏调整量。此种情形的计算方式例如可以参见 上述的描述,此处不再赘述。
另一种方式是利用预设的自适应算法使时偏调整量逼近实际采样时间偏差量,或者在计算出未知常数R'(T S)后利用预设的自适应算法使时偏调整量逼近实际采样时间偏差量。示例过程可参见上述的描述,此处不再赘述。
为说明本实施例的校准方法的校准效果,以包括4个通道、采样速率为6GHz、分辨率为13bit的时间交织ADC为例,其中,最小校准步长设为10飞秒。图7示出了通道间实际采样时偏的标准差(Timing skew std)固定为100飞秒时,不同的模拟信号频率下时间交织ADC输出信号的SNDR曲线;图8示出了模拟信号的频率为2.6GHz时,时间交织ADC输出的数字信号的信号噪声失真比(SNDR)随通道间采样时偏标准差变化的关系。从图7中可见,模拟信号频率越高,采样时偏造成的SNDR性能损失越大;从图8中可见,采样时偏越大造成的SNDR性能损失越大。
进一步以宽带射频信号为例说明校准效果,输入的模拟信号位于两个频段(band),其中心频点分别为1.8GHz和2.6GHz,带宽均为200MHz,初始采样时偏的标准差为270飞秒,图9示出了校准前信号的频谱,图10示出了校准后信号的频谱。对比图9和图10可见,经过校准后,系统性能有了明显的提升。校准前由于时偏失配导致的杂散达到约50dBc,校准后时偏失配基本消除,相应的杂散和底噪处于同一水平。
图11示出了经过校准后残留采样时间偏差收敛的仿真图。从图中可见,初始采样时偏标准差约为270fs;第一次固定调整后时偏略有增加,在经过一次快速调整后系统性能已经有了明显的提升,残留时偏降低到约10飞秒;之后经过几次迭代后性能基本收敛,图中的残留偏差受限于校准步长10飞秒,因此残留偏差在2~5飞秒之间振荡。
实施例三
如图12所示,本公开实施例三提供了一种校准装置,用于对时间交织ADC通道间采样时间偏差进行校准,该校准装置包括通道信号获取单元301、相关值计算单元302、时偏调整计算单元303和校准单元304。
其中,通道信号获取单元301用于获取各通道根据输入的模拟信号所输出的数字信号。相关值计算单元302用于针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值。时偏调整计算单元303用于根据每相邻两个通道对应的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个通道中任一指定的通道。校准单元304用于根据各通道对应的时偏调整量,对各通道相对于参考通道的采样时间偏差进行校准。
此外,关于本实施例提供的校准装置,用于实现上述实施例一或实施例二提供的校准方 法,相关描述可参加上述实施例一或实施例二的描述,此处不再赘述。
实施例四
如图13所示,本公开实施例四提供了一种时间交织ADC,该时间交织ADC包括多个ADC通道(ADC 1~ADC N)和校准装置100,其中,校准装置包括上述实施例三所提供的校准装置,关于该校准装置的描述例如可参见上述实施例三的描述,此处不再赘述。
此外,在本实施例中,时间交织ADC还包括多路复用器200,多路复用器用于使N个ADC通道的输出交错,从而按采样率产生数字输出。
在本实施例中,每个ADC通道对应设置有一采样开关,采样开关用于控制模拟信号输入端和对应的ADC通道的输入端的连通和关断,各采样开关记为S/H 1~S/H N,每一采样开关通过对应的采样时钟控制,各采样时钟记为CLK 1~CLK N
实施例五
本公开实施例五提供了一种电子设备,其包括:一个或多个处理器;存储器,其上存储有一个或多个程序,当一个或多个程序被一个或多个处理器执行,使得一个或多个处理器实现上述的校准方法;一个或多个I/O接口,连接在处理器与存储器之间,配置为实现处理器与存储器的信息交互。
实施例六
本公开实施例六提供了一种计算机可读介质,其上存储有计算机程序,其中,计算机程序被执行时实现上述的校准方法。
本领域普通技术人员可以理解,上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。
在硬件实施方式中,在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分;例如,一个物理组件可以具有多个功能,或者一个功能或步骤可以由若干物理组件合作执行。某些物理组件或所有物理组件可以被实施为由处理器,如中央处理器、数字信号处理器或微处理器执行的软件,或者被实施为硬件,或者被实施为集成电路,如专用集成电路。这样的软件可以分布在计算机可读介质上,计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的,术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外,本领域普通技术人员公知的是,通信介质 通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据,并且可包括任何信息递送介质。
本文已经公开了示例实施例,并且虽然采用了具体术语,但它们仅用于并仅应当被解释为一般说明性含义,并且不用于限制的目的。在一些实例中,对本领域技术人员显而易见的是,除非另外明确指出,否则可单独使用与特定实施例相结合描述的特征、特性和/或元素,或可与其他实施例相结合描述的特征、特性和/或元件组合使用。因此,本领域技术人员将理解,在不脱离由所附的权利要求阐明的本公开的范围的情况下,可进行各种形式和细节上的改变。

Claims (13)

  1. 一种时间交织模数转换器通道间采样时间偏差的校准方法,所述时间交织模数转换器包括多个ADC通道,其中,所述校准方法包括:
    针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值;
    根据每相邻两个通道对应的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个所述通道中任一指定的通道;
    根据各通道对应的时偏调整量,对各通道相对于所述参考通道的采样时间偏差进行校准。
  2. 根据权利要求1所述的校准方法,其中,所述针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值,包括:
    针对每相邻两个通道,对该相邻两个通道的数字信号进行求积,得到该相邻两个通道对应的求积结果;其中,r i,i+1[k]=y i[k]*y i+1[k],y i[k]表示第i个通道输出的第k个数字信号,y i+1[k]表示第i+1个通道输出的第k个数字信号,r i,i+1[k]表示第i个通道和第i+1个通道对应的第k个求积结果,i=1、2、3、....、N,N为时间交织ADC的通道数,k=0,1,2,...,L,L为单通道采样点数,i=N时,第N+1个通道为第1个通道,r N,N+1[k]=y N[k]*y 1[k+1];
    根据该相邻两个通道对应的多个求积结果,计算该相邻两个通道对应的期望值;
    利用该相邻两个通道对应的期望值和预设的自相关函数,计算得到该相邻两个通道的数字信号之间的相关值;其中,自相关函数为:R i,i+1=E(r i,i+1[k]),R i,i+1表示第i个通道与第i+1个通道的数字信号之间的相关值,E(r i,i+1[k])表示第i个通道与第i+1个通道对应的期望值。
  3. 根据权利要求1所述的校准方法,其中,所述根据每相邻两个通道的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,包括:
    根据每相邻两个通道的相关值和预先获取的相关值与时偏特征量的对应关系,计算得到各通道相对于参考通道的采样时间偏差所对应的第一时偏特征量;
    根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量。
  4. 根据权利要求3所述的校准方法,其中,第i个通道输出的第k个数字信号y i[k]与时间交织模数转换器输入的模拟信号x(t i)的关系为:y i[k]=x(t i),其中,t i为第i个通道的实际采样时间,t i=NkT S+(i-1)T Si,T s为时间交织ADC的采样时钟周期,NT s表示每个通道的采样时间间隔,τ i为第i个通道相对于参考通道的实际采样时间偏差量,设定第h(h=1、2、...、N-1或N)个通道为参考通道,则τ h=0;
    第i个通道与第i+1个通道的数字信号之间的相关值为:R i,i+1=E(y i[k]*y i+1[k])=R(T Si+1i),其中,R(T Si+1i)为所述自相关函数在T Si+1i处的值,T Si+1i为第i+1个通道与第i个通道的实际采样时间之间的差值。
  5. 根据权利要求4所述的校准方法,其中,所述相关值与时偏特征量的对应关系通过以下步骤获取:
    构造相关值矩阵,所述相关值矩阵包括由各相关值构成的列向量;其中,所述相关值矩阵为:
    Figure PCTCN2021096555-appb-100001
    R i,i+1为第i个通道与第i+1个通道对应的相关值;
    对所述相关值矩阵Rm中各相关值进行一阶泰勒级数展开,得到对应的展开矩阵;其中,所述展开矩阵为:
    Figure PCTCN2021096555-appb-100002
    R'(T S)为所述自相关函数R在T S处的导数,R'(T S)为未知常数;
    对所述展开矩阵Dm进行矩阵分解,得到分解矩阵,所述分解矩阵为系数矩阵和 时偏特征量矩阵的乘积;其中,时偏特征量矩阵为:
    Figure PCTCN2021096555-appb-100003
    系数矩阵A为N行N列的常数矩阵,系数矩阵A中的每一行与时偏特征量矩阵
    Figure PCTCN2021096555-appb-100004
    的乘积等于展开矩阵Dm中对应该行的元素;
    根据所述相关值矩阵Rm和所述分解矩阵,确定相关值与时偏特征量的对应关系;其中,相关值与时偏特征量的对应关系为:
    Figure PCTCN2021096555-appb-100005
    INV(A)为所述系数矩阵A的逆矩阵,φ j=R'(T S)*τ j(j=1,2,…,h-1,h+1,…,N),φ j表示第j个通道对应的第一时偏特征量,τ j表示第j个通道对应的实际采样时间偏差量。
  6. 根据权利要求5所述的校准方法,其中,所述时偏特征量与时偏调整量的对应关系通过以下方式获取:
    根据所述时偏特征量矩阵,确定出所述时偏特征量与时偏调整量的对应关系;时偏特征量与时偏调整量的对应关系为:φ j=R'(T S)*Dsk j,Dsk j为第j个通道对应的时偏调整量。
  7. 根据权利要求6所述的校准方法,其中,所述根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量之前,还包括:
    获取各通道对应的第二时偏特征量φ old
    在根据预设时偏调整量ΔDsk调整各通道的采样时间之后,获取各通道对应的所述第一时偏特征量φ new
    根据第一时偏特征量φ new、第二时偏特征量φ old、预设时偏调整量ΔDsk以及时偏 特征量与时偏调整量的对应关系:Δφ=R'(T S)*ΔDsk,计算出所述未知常数R'(T S),其中,Δφ=φ newold
    所述根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量,包括:根据第一时偏特征量φ new和时偏特征量与时偏调整量的对应关系:φ j=R'(T S)*Dsk j,计算得到各通道的采样时间对应的时偏调整量;其中,φ j表示第j个通道对应的第一时偏特征量,Dsk j表示第j个通道对应的时偏调整量。
  8. 根据权利要求6所述的校准方法,其中,所述根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量,包括:
    针对除所述参考通道以外的每个通道,根据该通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,采用预设的自适应算法对该通道对应的时偏调整量进行迭代计算,并将迭代计算结果作为该通道对应的时偏调整量;
    自适应算法包括公式:
    Dsk j(n+1)=Dsk j(n)-μ*φ j*sign(R'(T S))
    其中,μ为预设的调整系数,sign(R'(T S))为R'(T S)的符号位,φ j表示第j个通道对应的时偏特征量,Dsk j(n)表示第j个通道在第n次调整的实际采样时间偏差量,Dsk j(n+1)表示第j个通道在第n+1次调整的实际采样时间偏差量;当所述模拟信号的频谱位于第偶数个奈奎斯特区域时,sign(R'(T S))=1,当所述模拟信号的频谱位于第奇数个奈奎斯特区域时,sign(R'(T S))=-1。
  9. 根据权利要求6所述的校准方法,其中,所述根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量之前,还包括:
    获取各通道对应的第二时偏特征量φ old
    在根据预设时偏调整量ΔDsk调整各通道的采样时间之后,获取各通道对应的所述第一时偏特征量φ new
    根据第一时偏特征量φ new、第二时偏特征量φ old、预设时偏调整量ΔDsk以及时偏 特征量与时偏调整量的对应关系:Δφ=R'(T S)*ΔDsk,计算出所述未知常数R'(T S),其中,Δφ=φ newold
    所述根据各通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,计算得到各通道对应的时偏调整量,包括:针对除所述参考通道以外的每个通道,根据该通道对应的第一时偏特征量和预先获取的时偏特征量与时偏调整量的对应关系,通过预设的自适应算法对该通道的时偏调整量进行迭代计算,并将迭代计算结果作为该通道对应的时偏调整量;
    自适应算法包括公式:
    Dsk j(n+1)=Dsk j(n)-μ*φ j/R'(T S)
    其中,μ为预设的调整系数,φ j表示第j个通道对应的时偏特征量,Dsk j(n)表示第j个通道在第n次调整的实际采样时间偏差量,Dsk j(n+1)表示第j个通道在第n+1次调整的实际采样时间偏差量。
  10. 一种校准装置,用于对时间交织ADC通道间采样时间偏差进行校准,其中,该校准装置包括相关值计算单元、时偏调整计算单元和校准单元;
    所述相关值计算单元用于针对每相邻两个通道,根据该相邻两个通道所输出的数字信号,计算该相邻两个通道的数字信号之间的相关值;
    所述时偏调整计算单元用于根据每相邻两个通道对应的的相关值,计算出各通道相对于参考通道的采样时间偏差所对应的时偏调整量,参考通道为多个所述通道中任一指定的通道;
    所述校准单元用于根据各通道对应的时偏调整量,对各通道相对于所述参考通道的采样时间偏差进行校准。
  11. 一种时间交织ADC,包括多个ADC通道和权利要求10所述的校准装置。
  12. 一种电子设备,其包括:
    一个或多个处理器;
    存储器,其上存储有一个或多个程序,当所述一个或多个程序被所述一个或多个处理器执行,使得所述一个或多个处理器实现如权利要求1-9中任一项所述的校准方法;
    一个或多个I/O接口,连接在所述处理器与存储器之间,配置为实现所述处理器与所述存储器的信息交互。
  13. 一种计算机可读介质,其上存储有计算机程序,其中,所述计算机程序被执行时实现如权利要求1-9中任一所述的校准方法。
PCT/CN2021/096555 2020-06-22 2021-05-27 校准方法、校准装置、时间交织adc、电子设备及可读介质 WO2021258987A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP21828258.0A EP4138303A4 (en) 2020-06-22 2021-05-27 CALIBRATION METHOD, CALIBRATION APPARATUS, TIME INTERLEAVE ADC, ELECTRONIC DEVICE AND READABLE MEDIUM
US17/998,801 US20230231565A1 (en) 2020-06-22 2021-05-27 Calibration method, calibration apparatus, time-interleaved adc, electronic device, and readable medium

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010575519.8 2020-06-22
CN202010575519.8A CN113904683A (zh) 2020-06-22 2020-06-22 校准方法、校准装置、时间交织adc、电子设备及可读介质

Publications (1)

Publication Number Publication Date
WO2021258987A1 true WO2021258987A1 (zh) 2021-12-30

Family

ID=79186373

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/096555 WO2021258987A1 (zh) 2020-06-22 2021-05-27 校准方法、校准装置、时间交织adc、电子设备及可读介质

Country Status (4)

Country Link
US (1) US20230231565A1 (zh)
EP (1) EP4138303A4 (zh)
CN (1) CN113904683A (zh)
WO (1) WO2021258987A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115632657A (zh) * 2022-11-04 2023-01-20 南京金阵微电子技术有限公司 校准方法、模数转换器电路、介质及设备

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114584144B (zh) * 2022-01-26 2023-03-24 苏州迅芯微电子有限公司 时间交织adc采样时间偏差提取方法、系统及装置
CN115001494A (zh) * 2022-05-31 2022-09-02 江苏信息职业技术学院 一种交织采样的后台自适应自校准方法
CN115425974B (zh) * 2022-09-01 2023-09-26 重庆邮电大学 时域交织型模数转换器时间偏差的数字校准系统及方法
CN115932351B (zh) * 2023-03-09 2023-07-04 深圳市鼎阳科技股份有限公司 一种示波器级联的延时校正方法、示波器、终端及介质

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102739252A (zh) * 2011-04-12 2012-10-17 美信集成产品公司 用于时间交织模数转换器的后台校准的系统和方法
CN103312329A (zh) * 2013-05-23 2013-09-18 电子科技大学 用于时间交织adc采样时间失配的校正方法及校正器
CN104993828A (zh) * 2015-08-13 2015-10-21 无锡比迅科技有限公司 时间交织模数转换器采样时间偏移校准方法
CN111064469A (zh) * 2019-12-13 2020-04-24 北京工业大学 一种基于相邻通道自相关函数的tiadc采样时间失配误差的校正方法
US10804919B1 (en) * 2019-09-24 2020-10-13 Microsoft Technology Licensing, Llc Dynamic sequential approximation register (SAR) analog-to-digital converter (ADC) (SAR-ADC) clock delay calibration systems and methods

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102739252A (zh) * 2011-04-12 2012-10-17 美信集成产品公司 用于时间交织模数转换器的后台校准的系统和方法
CN103312329A (zh) * 2013-05-23 2013-09-18 电子科技大学 用于时间交织adc采样时间失配的校正方法及校正器
CN104993828A (zh) * 2015-08-13 2015-10-21 无锡比迅科技有限公司 时间交织模数转换器采样时间偏移校准方法
US10804919B1 (en) * 2019-09-24 2020-10-13 Microsoft Technology Licensing, Llc Dynamic sequential approximation register (SAR) analog-to-digital converter (ADC) (SAR-ADC) clock delay calibration systems and methods
CN111064469A (zh) * 2019-12-13 2020-04-24 北京工业大学 一种基于相邻通道自相关函数的tiadc采样时间失配误差的校正方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115632657A (zh) * 2022-11-04 2023-01-20 南京金阵微电子技术有限公司 校准方法、模数转换器电路、介质及设备
CN115632657B (zh) * 2022-11-04 2023-09-05 南京金阵微电子技术有限公司 校准方法、模数转换器电路、介质及设备

Also Published As

Publication number Publication date
EP4138303A1 (en) 2023-02-22
CN113904683A (zh) 2022-01-07
EP4138303A4 (en) 2023-10-25
US20230231565A1 (en) 2023-07-20

Similar Documents

Publication Publication Date Title
WO2021258987A1 (zh) 校准方法、校准装置、时间交织adc、电子设备及可读介质
CN108471313B (zh) 一种基于数模混合信号的tiadc系统校准方法
US8519875B2 (en) System and method for background calibration of time interleaved analog to digital converters
CN104901695B (zh) 一种用于tiadc采样时间误差的校准模块及其校准方法
US8159377B2 (en) System, method, and circuitry for blind timing mismatch estimation of interleaved analog-to-digital converters
US7312734B2 (en) Calibratable analog-to-digital converter system
US7330140B2 (en) Interleaved analog to digital converter with compensation for parameter mismatch among individual converters
US7084793B2 (en) Method and device for estimating time errors in time interleaved A/D converter system
CN108494402B (zh) 一种基于正弦拟合的tiadc系统误差估计和补偿方法
US7227479B1 (en) Digital background calibration for time-interlaced analog-to-digital converters
US8890728B2 (en) Method and device for use with analog to digital converter
JP2014023164A (ja) 時間インタリーブadcの不整合補正方法
KR20100080391A (ko) 2채널의 타임 인터리빙 아날로그 디지털 변환기 및 그의 오차 측정 및 정정 방법
CN109361390B (zh) 用于时间交织adc通道间采样时间误差校正模块及方法
Schmidt et al. Efficient estimation and correction of mismatch errors in time-interleaved ADCs
JP2013500662A (ja) 特にマルチスタンダードなソフトウェア無線、および/またはコグニティブ無線の使用のための並列アナログ−デジタル変換器中のアナログ欠陥の訂正方法
CN113258930B (zh) 一种数字示波器及时间交织模数转换器的校正方法
Liu et al. A novel all-digital calibration method for timing mismatch in time-interleaved ADC based on modulation matrix
WO2008002214A1 (en) Time- interleaved analog-to-digital converter system
CN111917413B (zh) 一种ti-adc通道间时序偏差校准方法
CN113063978B (zh) 一种数字示波器及采样时刻失配的校正方法
CN110034759A (zh) 前馈式全数字tiadc系统的采样时间误差校准模块及其方法
CN113114243B (zh) 一种tiadc系统失配误差校正方法及系统
US20170041011A1 (en) Continuous tracking of mismatch correction in both analog and digital domains in an interleaved adc
CN107276591B (zh) 一种并行采样系统的失配误差估计方法及系统

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21828258

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2021828258

Country of ref document: EP

Effective date: 20221116

NENP Non-entry into the national phase

Ref country code: DE