WO2021238570A1 - 连接基板及制备方法、拼接屏、显示装置 - Google Patents

连接基板及制备方法、拼接屏、显示装置 Download PDF

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Publication number
WO2021238570A1
WO2021238570A1 PCT/CN2021/091003 CN2021091003W WO2021238570A1 WO 2021238570 A1 WO2021238570 A1 WO 2021238570A1 CN 2021091003 W CN2021091003 W CN 2021091003W WO 2021238570 A1 WO2021238570 A1 WO 2021238570A1
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WIPO (PCT)
Prior art keywords
connection
display panel
area
substrate
display
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PCT/CN2021/091003
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English (en)
French (fr)
Inventor
梁爽
狄沐昕
梁志伟
王珂
曹占锋
刘英伟
Original Assignee
京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/630,631 priority Critical patent/US20220262891A1/en
Publication of WO2021238570A1 publication Critical patent/WO2021238570A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/18—Tiled displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13336—Combining plural substrates to produce large-area displays, e.g. tiled displays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/02—Composition of display devices
    • G09G2300/026—Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present disclosure belongs to the field of display technology, and specifically relates to a connecting substrate and a preparation method, a splicing screen, and a display device.
  • connection substrate having a plurality of panel areas and a connection area connecting two adjacent panel areas of the plurality of panel areas, and the panel area includes a display surrounded by the connection area Area.
  • the connection substrate includes in the connection area: a base; a plurality of connection traces located on the base; an insulating layer, which covers the plurality of connection traces and defines a display panel to be spliced A plurality of via holes, which pass through the insulating layer; a plurality of connection electrodes, which are respectively arranged in the plurality of via holes, and are connected in a one-to-one correspondence with the plurality of connection wires.
  • the connection electrodes are connected to the first pads of the light-emitting surface of the display panel to be spliced in a one-to-one correspondence.
  • the depth of the groove is equal to the thickness of the display panel to be spliced.
  • the insulating layer includes a polyimide layer and a silicon nitride layer that are stacked;
  • the polyimide layer is closer to the substrate than the silicon nitride layer; the groove penetrates the silicon nitride layer and is located in the polyimide layer.
  • the material of the connection electrode includes copper.
  • the substrate includes a flexible substrate.
  • the connection substrate in the connection area, includes two columns of connection electrodes, one column of connection electrodes is electrically connected to the first pads on the light-emitting surface of the display panel to be spliced, and the other column of connection electrodes The first pad of the light-emitting surface of another display panel to be spliced adjacent to the display panel to be spliced is electrically connected.
  • the plurality of connection traces include two columns of connection traces, and each of the two columns of connection traces extends in a direction perpendicular to the column direction.
  • the present disclosure provides a splicing screen, including a connection substrate according to an embodiment of the present disclosure.
  • the splicing screen further includes a plurality of display panels; wherein, each of the plurality of display panels is located in the groove; the first light emitting surface of each of the plurality of display panels is The bonding pads are connected to the connection electrodes in the connection substrate in a one-to-one correspondence; the first bonding pads on the light-emitting surface of each of the plurality of display panels are electrically connected to the display devices in the display panel; and The multiple connecting wires are electrically connected with a driving chip for driving the display panel.
  • the size of the display panel in the first direction parallel to the front surface of the display panel is 2 to 10 times the size of the groove in the first direction.
  • the display panel includes an active matrix organic light emitting diode display panel or a passive matrix organic light emitting diode display panel.
  • the present disclosure provides a display device including a splicing screen according to an embodiment of the present disclosure.
  • the present disclosure provides a method for preparing a connection substrate, the connection substrate having a plurality of panel regions and a connection region connecting two adjacent panel regions among the plurality of panel regions, and the panel region includes In the display area surrounded by the connection area, the connection substrate includes a base in the connection area; a plurality of connection wires located on the base; an insulating layer that covers the plurality of connection wires, And define a groove for accommodating the display panel to be spliced; a plurality of via holes, which pass through the insulating layer; a plurality of connection electrodes, which are respectively disposed in the plurality of via holes and are connected to the plurality of The connection traces are connected in a one-to-one correspondence; wherein the connection electrodes are connected to the first pads of the light-emitting surface of the display panel to be spliced in a one-to-one correspondence, and the preparation method of the connection substrate includes:
  • connection electrodes in the via holes; the connection electrodes are connected to the connection wires in a one-to-one correspondence through the via holes;
  • the insulating layer is patterned to form grooves in the display area.
  • the forming an insulating layer covering a plurality of the connecting wires includes:
  • a silicon nitride layer is formed on the polyimide layer.
  • the step of patterning the insulating layer to form a plurality of via holes in the connection area includes:
  • the polyimide layer is processed by an oxygen ashing process, and a plurality of the via holes are formed in the connection area.
  • FIG. 1 is a schematic diagram of a planar structure of a connecting substrate provided by an embodiment of the disclosure
  • FIG. 2 is a schematic diagram of a partial planar structure of a connecting substrate provided by an embodiment of the disclosure
  • FIG. 3 is a schematic diagram of a partial cross-sectional structure of a connecting substrate provided by an embodiment of the disclosure
  • FIG. 4 is a schematic structural diagram of a splicing screen provided by an embodiment of the disclosure.
  • FIG. 5 is a schematic flowchart of a method for preparing a connecting substrate provided by an embodiment of the disclosure
  • FIG. 6a is a schematic structural diagram corresponding to step S501 in a method for preparing a connecting substrate according to an embodiment of the disclosure
  • FIG. 6b is a schematic structural diagram corresponding to step S502 in a method for preparing a connecting substrate according to an embodiment of the disclosure
  • FIG. 6c is a schematic structural diagram corresponding to step S503 in a method for preparing a connecting substrate according to an embodiment of the disclosure.
  • 6d, 6e, and 6f are schematic structural diagrams corresponding to step S504 in a method for preparing a connecting substrate according to an embodiment of the disclosure
  • FIG. 7 is a schematic diagram of a partial cross-sectional structure of a connecting substrate provided by an embodiment of the disclosure.
  • FIG. 1 is a schematic diagram of a planar structure of a connecting substrate provided by an embodiment of the disclosure.
  • the connecting substrate is used to splice a plurality of display panels to form a large-size display panel.
  • the connection substrate has a plurality of panel areas 10; each panel area 10 includes a display area 20 and a connection area 30 around the display area 20.
  • FIG. 2 is a schematic partial plan view of a connecting substrate provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic partial cross-sectional structure view of a connecting substrate provided by an embodiment of the disclosure. As shown in FIGS.
  • the connecting substrate includes: a base 101, a plurality of connecting wires 102, an insulating layer 103, and a plurality of connecting electrodes 104; the plurality of connecting wires 102 are arranged on the base 101, and the connecting wires 102 is located in the connection area 30; the insulating layer 103 covers multiple connection traces 102; the insulating layer 103 is provided with multiple vias 105 and multiple grooves 106; multiple vias 105 are located in the connection area 30, and the grooves 106 are located on the panel District 10.
  • FIG. 1 referring to FIG.
  • connection electrodes 104 in one connection area 30, two columns of connection electrodes 104 may be provided, and one column of connection electrodes 104 is electrically connected to the display panel 107 on one display area 20 (for example, through the first pad P1)
  • the connection electrode 104 in another column is electrically connected to the display panel 107 on another display area 20 adjacent to the display area 20 (for example, through the first pad P1).
  • two rows of connection traces 102 may be provided, each connection trace 102 extends in a first direction D1 parallel to the surface of the substrate 101, and the connection trace 102 of each column extends along It is arranged in a second direction perpendicular to the first direction D1.
  • connection electrode 104 is disposed in the via hole 105, and the connection electrode 104 passes through the via hole 105 and is connected to the connection trace 102 in a one-to-one correspondence.
  • connection electrode 104 is connected to the first pad P1 on the light-emitting surface (ie, the front surface) of the display panel to be spliced in a one-to-one correspondence.
  • the first pad P1 is electrically connected to the display device in the display area 20.
  • each display panel 107 to be spliced can be placed in the panel area 10 of the connecting substrate, and adjacent display panels 107 are spliced to form a large-area splicing through the connecting substrate. Screen to achieve a large area display.
  • the driving chip may be provided on the back of the display panel 107.
  • the driving chip may be disposed between the connecting wire 102 and the display panel 107 and electrically connected to the connecting wire 102. In this way, the driving chip can be electrically connected to the display device in the display panel 107 via the connection trace 102, the connection electrode 104, and the first pad P1, so as to drive the display device in the display panel for display.
  • the display panel may be fixedly supported by the groove 106 formed on the insulating layer 103, and the first pad P1 on the front surface of the display panel 107 may be electrically connected to the connection electrode 104 by tinting or wire connection.
  • the display panel 107 may extend beyond the groove 106 in the first direction D1 parallel to the front surface of the display panel.
  • the size of the display panel in the first direction D1 is larger than the size of the groove 106 in the first direction D1.
  • the size of the display panel 107 in the first direction D1 is 2 to 10 times the size of the groove 106 in the first direction D1. In this way, a space for accommodating the driving chip can be formed under the display panel 107.
  • the driving chip that communicates with the display panel is electrically connected to the first pad P1 on the display panel 107. Since the first pad P1 on the display panel 107 is connected to the connection trace 102 through the connection electrode 104, The driving chip for the display panel 107 can be arranged above the connecting wires 102 without being arranged in the peripheral area (ie, fan-out area) of the display panel, so the size of the frame of the display panel 10 can be reduced. Thus, the gap between adjacent display panels in the splicing screen is reduced.
  • connection wires 102 and the connection electrodes 105 in the connection substrate can be connected to the signal wires in the display panel, so that there is no need to reserve a large space for the signal wires between adjacent display panels, which can further reduce The gap between adjacent display panels in the splicing screen.
  • the distance between adjacent display panels can be controlled by controlling the distance between adjacent connecting electrodes 104, so as to reduce the gap between adjacent display panels in the splicing screen, so as to finally achieve Small gaps or seamless splicing can reduce the appearance of dark lines at the splicing of adjacent display panels, thereby improving the display effect.
  • the groove 106 formed on the insulating layer 103 of the connecting substrate can only fix and support the edge of the display panel to be spliced, and it is not necessary to form a support for the entire back of the display panel. All the connection areas 30 and part of the display areas close to the splicing are provided with a substrate 101, and other film layers and structures (for example, driving chips) are formed on the substrate 101 to realize the splicing of the display panel, which can save the preparation materials. Thus, the preparation cost can be saved.
  • the area of the formed groove 106 may be approximately equal to the area of the fan-out area of the display panel to be spliced.
  • the connection trace 102 may be electrically connected to the driving chip through a signal line. Since the power of the driving chip is relatively large, two or more flexible circuit boards may be used to connect the driving chip and the display panel.
  • the depth of the groove 106 is equal to the thickness of the display panel to be spliced.
  • the depth of the groove 106 may be equal to the thickness of the display panel to be spliced, so that the display panel to be spliced can be exactly placed in the space formed by the groove 106. At the same time, it can be ensured that the light-emitting surfaces of adjacent display panels to be spliced are located on the same plane, so that the surface of the spliced screen formed can be made higher, and the display effect can be improved.
  • the insulating layer 103 includes a polyimide layer 1031 and a silicon nitride layer 1032 that are stacked; the polyimide layer 1031 is closer to the substrate 101 than the silicon nitride layer 1032; and the groove 106 penetrates the silicon nitride layer.
  • the layer 1032 is located in the polyimide layer 1031.
  • the depth of the groove 106 is greater than the thickness of the silicon nitride layer 1032 and less than the thickness of the insulating layer 103 (that is, less than the sum of the thickness of the polyimide layer 1031 and the silicon nitride layer 1032).
  • the polyimide layer 1031 is made of polyimide material
  • the silicon nitride layer 1032 is made of silicon nitride material.
  • the insulating layer 103 in the connecting substrate provided by the embodiment of the present disclosure may be formed in a multilayer structure, such as a polyimide layer 1031 and a silicon nitride layer 1032 that are stacked.
  • the thickness of the polyimide layer 1031 is thicker than the thickness of the silicon nitride layer 1032.
  • the polyimide layer 1031 has good insulation properties and flexibility, and can be used in the connection between the wiring 102 and the display panel to be spliced.
  • the signal lines have a good insulation effect, and the groove 106 formed thereon can play a good role in fixing and supporting the display panel to be spliced, and at the same time, it can be beneficial to form a flexible connecting substrate to realize flexible splicing of the display panel.
  • the performance of the silicon nitride layer 1032 is stable, and the covering polyimide layer 1031 can be well protected during the entire preparation process of the insulating layer 103, thereby forming the insulating layer 103 with a desired thickness. It is understandable that the insulating layer 103 can also be configured as a single-layer structure with only one material, or a multi-layer structure with multiple other materials, and its functions and implementation principles are similar, and will not be repeated here.
  • the material of the connection electrode 104 includes copper.
  • the connecting electrode 104 can be formed by evaporating copper on the seed layer. Since copper has good conductivity and the preparation cost is low, the use of copper electrodes can save the preparation cost. It is understandable that the connecting electrode 104 can also be made of other metal materials or metal oxide materials with good conductivity, which will not be listed here.
  • the substrate 101 includes a flexible substrate.
  • the base 101 may be made of a flexible material such as polyimide, so as to realize flexible connection of the substrate, thereby realizing the flexible connection of the display panel. It is understandable that the base 101 can also be made of rigid materials such as glass, so that the strength of the connection substrate can be improved, and the cost of the glass base can be lower, which can reduce the preparation cost of the connection substrate. In practical applications, the material of the substrate 101 can be selected according to actual needs, which will not be described in detail here.
  • FIG. 4 is a schematic structural diagram of a splicing screen provided by an embodiment of the disclosure.
  • the splicing screen includes the connecting substrate provided in the above-mentioned embodiment.
  • the splicing screen also includes: a plurality of display panels 107 arranged in a matrix; the first pads P1 on the light emitting surface (that is, the front surface) of the display panel are connected to the connecting electrodes 104 in the connecting substrate in a one-to-one correspondence.
  • the driving chip is arranged on the back of the display panel, and the first pad P1 connected to the display device may be arranged on the front of the display panel 107, and the driving chip is used to provide driving signals to the display device for display.
  • the display panel 107 can be fixedly supported by the groove 106 formed on the insulating layer 103, and the first pad P1 on the front of the display panel 107 can be connected to the connection electrode 104 by tin or wire connection.
  • each display panel does not have to reserve a large fan-out area for the binding of the display panel and the driving chip, so that the frame of each display panel can be reduced, thereby reducing the adjacent splicing screen.
  • the gap between the display panels is not limited to
  • connection wires 102 and the connection electrodes 105 in the connection substrate can be connected to the signal wires in the display panel, so that there is no need to reserve a large space for the signal wires between adjacent display panels, which can further reduce The gap between adjacent display panels in the splicing screen.
  • the distance between adjacent display panels can be controlled by controlling the distance between adjacent connecting electrodes 105, so as to reduce the gap between adjacent display panels in the splicing screen, so as to finally achieve Small gaps or seamless splicing can reduce the appearance of dark lines at the splicing of adjacent display panels, thereby improving the display effect.
  • the display panel 107 includes an active matrix organic light emitting diode display panel or a passive matrix organic light emitting diode display panel.
  • the type of the display panel 107 can be an active matrix organic light emitting diode display panel or a passive matrix organic light emitting diode display panel.
  • the splicing screen provided by the embodiment of the present disclosure can be an active matrix organic light emitting diode display panel and an active matrix organic light emitting diode display panel.
  • the splicing screen formed by splicing matrix organic light-emitting diode display panels can also be a splicing screen formed by splicing an active matrix organic light-emitting diode display panel and a passive matrix organic light-emitting diode display panel, or a passive matrix organic light-emitting diode display panel and a passive matrix organic A splicing screen formed by splicing LED display panels.
  • the type of the display panel 107 can be selected according to actual needs, which will not be repeated here.
  • embodiments of the present disclosure provide a display device, which includes the splicing screen provided in the above-mentioned embodiments.
  • the display device can be used in conference rooms, theaters, multi-functions, and other indoor scenes that require large-screen display.
  • the implementation principle is similar to that of the splicing screen and the connecting substrate provided in the foregoing embodiment, and will not be repeated here.
  • FIG. 5 is a schematic flowchart of the method for preparing a connecting substrate provided by the embodiment of the present disclosure.
  • the connecting substrate has a plurality of panel areas, and the panel area includes a display area and a periphery of the display area
  • the method for preparing the connecting substrate includes the following steps S501 to S504.
  • a metal layer can be deposited on the substrate to form a seed layer on the entire surface. According to the number and width of the connection traces, the entire seed layer is etched to form multiple connection traces in the connection area.
  • an insulating layer may be formed on a plurality of connecting traces, and the insulating layer may have a double-layer structure.
  • the following steps may be included: step S5021, coating a polyimide layer on a plurality of connecting wires.
  • step S5022 a silicon nitride layer is formed on the polyimide layer.
  • step S502 may include the following steps: step S5023, patterning the silicon nitride layer, and forming a plurality of etching holes in the connection area.
  • step S5024 using the patterned silicon nitride layer as a mask, the polyimide layer is processed by an oxygen ashing process to form a plurality of via holes in the connection area.
  • the performance of the silicon nitride layer is stable, and the patterned silicon nitride layer can be used as a mask of the polyimide layer to shield the polyimide layer to form via holes at predetermined positions.
  • connection electrodes are connected to the connection wires in a one-to-one correspondence through the via holes.
  • copper can be injected into the vias by electroplating, and copper electrodes, that is, connection electrodes, are formed in the vias, and the connection electrodes and the connection traces through the vias correspond one-to-one. connect.
  • S504 Perform a patterning process on the insulating layer to form a groove in the display area.
  • photoresist can be used to shield the connecting electrodes.
  • the silicon nitride layer in the display area is etched to expose the polyimide layer.
  • the imine layer undergoes oxygen ashing, so that the polyimide layer forms grooves.
  • the photoresist covering the connection electrode is removed, and the oxide layer of the connection electrode is washed with an acid solution to form a connection substrate.
  • the display panel to be spliced can be fixedly supported by the groove formed on the insulating layer. Since the first pad on the display panel is connected to the connection trace through the connection electrode, Therefore, the driving chip for the display panel can be arranged above the connecting wires, instead of being arranged in the peripheral area (ie, the fan-out area) of the display panel, so the size of the frame of the display panel can be reduced. Thus, the gap between adjacent display panels in the splicing screen is reduced.
  • connection traces and connection electrodes in the connection substrate can be connected to the signal lines in the display panel, so that there is no need to reserve a large space for signal lines between adjacent display panels, which can further reduce the splicing screen.
  • the gap between adjacent display panels In practical applications, the distance between adjacent display panels can be controlled by controlling the distance between adjacent connecting electrodes, so as to reduce the gap between adjacent display panels in the splicing screen.
  • small gaps or seamless splicing are realized, which can reduce the appearance of dark lines at the splicing of adjacent display panels, thereby improving the display effect.

Abstract

一种连接基板及制备方法、拼接屏、显示装置。连接基板，具有多个面板区（10）以及连接多个面板区（10）中的两个相邻面板区（10）的连接区（30），并且面板区（10）包括由连接区（30）围绕的显示区（20）；其中，连接基板在连接区（30）中包括：基底（101）；多条连接走线（102），其位于基底（101）上；绝缘层（103），其覆盖多条连接走线（102），并限定用于容纳待拼接的显示面板（107）的凹槽（106）；多个过孔（105），其穿过绝缘层（103）；多个连接电极（104），其分别设置于多个过孔（105）中，并与多条连接走线（102）一一对应地连接；其中，连接电极（104）与待拼接的显示面板（107）的出光面的第一焊盘（P1）一一对应连接。

Description

连接基板及制备方法、拼接屏、显示装置
相关申请的交叉引用
本申请要求于2020年5月26日提交的中国专利申请NO.202010456460.0的优先权，其公开内容以引用方式并入本文中。
技术领域
本公开属于显示技术领域，具体涉及一种连接基板及制备方法、拼接屏、显示装置。
背景技术
随着显示技术的不断发展，室内大尺寸的显示面板得到广泛的应用。目前，为了实现大尺寸显示面板的显示，一般将多个小尺寸的显示面板进行拼接，从而形成一个大尺寸的拼接屏。
发明内容
一方面，本公开提供一种连接基板，具有多个面板区以及连接所述多个面板区中的两个相邻面板区的连接区，并且所述面板区包括由所述连接区围绕的显示区。所述连接基板在所述连接区中包括：基底；多条连接走线，其位于所述基底上；绝缘层，其覆盖所述多条连接走线，并限定用于容纳待拼接的显示面板的凹槽；多个过孔，其穿过所述绝缘层；多个连接电极，其分别设置于所述多个过孔中，并与所述多条连接走线一一对应地连接。所述所述连接电极与所述待拼接的显示面板的出光面的第一焊盘一一对应连接。
在实施例中，所述凹槽的深度与所述待拼接的显示面板的厚度相等。
在实施例中，所述绝缘层包括叠层设置的聚酰亚胺层和氮化硅层；
所述聚酰亚胺层较所述氮化硅层靠近所述基底；所述凹槽贯穿所述氮化硅层，且位于所述聚酰亚胺层中。
在实施例中，所述连接电极的材料包括铜。
在实施例中，所述基底包括柔性基底。
在实施例中，在所述连接区中，所述连接基板包括两列连接电极，一列的连接电极与所述待拼接的显示面板的出光面的第一焊盘电连接，另一列的连接电极与所述待拼接的显示面板相邻的另一待拼接的显示面板的出光面的第一焊盘电连接。
在实施例中，在所述连接区中，所述多条连接走线包括两列连接走线，所述两列连接走线中的每一条连接走线沿与列方向垂直的方向延伸。
另一方面，本公开提供一种拼接屏，包括根据本公开实施例的连接基板。
在实施例中，拼接屏还包括多个显示面板；其中，所述多个显示面板中的每一个位于所述凹槽中；所述多个显示面板中的每一个的出光面上的第一焊盘与所述连接基板中的所述连接电极一一对应连接；所述多个显示面板中的每一个的出光面上的第一焊盘与该显示面板中的显示器件电连接；并且所述多条连接走线与用于驱动所述显示面板的驱动芯片电连接。
在实施例中，所述显示面板在与所述显示面板的正面平行的第一方向上的尺寸为所述凹槽在所述第一方向上的尺寸的2至10倍。
在实施例中，所述显示面板包括主动矩阵有机发光二极管显示面板或被动矩阵有机发光二极管显示面板。
另一方面，本公开提供一种显示装置，包括根据本公开实施例的拼接屏。
另一方面，本公开提供一种连接基板的制备方法，所述连接基板具有多个面板区以及连接所述多个面板区中的两个相邻面板区的连接区，并且所述面板区包括由所述连接区围绕的显示区，所述连接基板在所述连接区中包括：基底；多条连接走线，其位于所述基底上；绝缘层，其覆盖所述多条连接走线，并限定用于容纳待拼接的显示面板的凹槽；多个过孔，其穿过所述绝缘层；多个连 接电极，其分别设置于所述多个过孔中，并与所述多条连接走线一一对应地连接；其中，所述所述连接电极与所述待拼接的显示面板的出光面的第一焊盘一一对应连接，所述连接基板的制备方法包括：
在所述基底上形成种子层，并对所述种子层进行图案化处理形成所述多条连接走线；
形成覆盖多条所述连接走线的绝缘层，并对所述绝缘层进行图案化处理，在所述连接区形成多个过孔；
在所述过孔中形成连接电极；所述连接电极通过所述过孔与所述连接走线一一对应连接；
对所述绝缘层进行图案化处理，在所述显示区形成凹槽。
在实施例中，所述形成覆盖多条所述连接走线的绝缘层，包括：
在多条所述连接走线上形成聚酰亚胺层；
在所述聚酰亚胺层上形成氮化硅层。
在实施例中，所述对所述绝缘层进行图案化处理，在所述连接区形成多个过孔，包括：
对所述氮化硅层进行图案化处理，在所述连接区形成多个刻蚀孔；
以图案化的所述氮化硅层为掩膜板，利用氧气灰化工艺对所述聚酰亚胺层进行处理，在所述连接区形成多个所述过孔。
附图说明
图1为本公开实施例提供的一种连接基板的平面结构示意图；
图2为本公开实施例提供的一种连接基板的局部平面结构示意图；
图3为本公开实施例提供的一种连接基板的局部剖面结构示意图；
图4为本公开实施例提供的一种拼接屏的结构示意图；
图5为本公开实施例提供的连接基板的制备方法的流程示意图；
图6a为本公开实施例提供的一种连接基板的制备方法中步骤S501对应的结构示意图；
图6b为本公开实施例提供的一种连接基板的制备方法中步骤S502对应的结构示意图；
图6c为本公开实施例提供的一种连接基板的制备方法中步骤S503对应的结构示意图；
图6d、图6e和图6f为本公开实施例提供的一种连接基板的制备方法中步骤S504对应的结构示意图；
图7为本公开实施例提供的一种连接基板的局部剖面结构示意图。
具体实施方式
为使本领域技术人员更好地理解本公开的技术方案，下面结合附图和具体实施方式对本公开作进一步详细描述。
在传统技术中至少存在如下问题：在将多个小尺寸显示面板拼接过程中，一般不采用任何的连接结构，并且需要在相邻的小尺寸显示面板之间预留一定的空间形成信号走线，以至于相邻的小尺寸显示面板之间形成的间距较大，从而容易在拼接处形成暗纹，降低拼接成的大尺寸拼接屏的显示效果，进而影响用户使用体验。
图1为本公开实施例提供的一种连接基板的平面结构示意图。在实施例中，连接基板用于将多个显示面板进行拼接，以形成大尺寸的显示面板。如图1所示，该连接基板具有多个面板区10；每个面板区10包括显示区20和显示区20周边的连接区30。图2为本公开实施例提供的一种连接基板的局部平面结构示意图，图3为本公开实施例提供的一种连接基板的局部剖面结构示意图。如图2和图3所示，该连接基板包括：基底101、多条连接走线102、绝缘层103和多个连接电极104；多条连接走线102设置于基底101上，且连接走线102位于连 接区30；绝缘层103覆盖多条连接走线102；绝缘层上103设置有多个过孔105和多个凹槽106；多个过孔105位于连接区30，凹槽106位于面板区10。在实施例中，参见图2，在一个连接区30中，可以设置两列连接电极104，一列的连接电极104与一个显示区20上的显示面板107(例如通过第一焊盘P1)电连接，另一列的连接电极104与该显示区20相邻的另一个显示区20上的显示面板107(例如通过第一焊盘P1)电连接。在实施例中，在一个连接区中，可以设置两列连接走线102，每条连接走线102在平行于基底101的表面的第一方向D1上延伸，每一列的的连接走线102沿与第一方向D1垂直的第二方向布置。
在实施例中，连接电极104设置于过孔105中，且连接电极104穿过过孔105与连接走线102一一对应连接。
在实施例中，连接电极104与待拼接的显示面板出光面(即，正面)上的第一焊盘P1一一对应连接。
在实施例中，第一焊盘P1与显示区20中的显示器件电连接。
本公开实施例提供的连接基板中，每个待拼接的显示面板107(参见图7)可以放置于连接基板的面板区10中，相邻的显示面板107通过该连接基板拼接形成大面积的拼接屏，以实现大面积显示。在实施例中，驱动芯片可以设置在显示面板107的背面。在实施例中，驱动芯片可以设置在连接走线102与显示面板107之间，并且与连接走线102电连接。以这种方式，驱动芯片可以经由连接走线102、连接电极104、第一焊盘P1与显示面板107中的显示器件电连接，以驱动显示面板中的显示器件进行显示。
在拼接过程中，显示面板可以由绝缘层103上形成的凹槽106固定支撑，显示面板107正面的第一焊盘P1可以通过点锡或者引线连接的方式电连接至连接电极104。在实施例中，显示面板107可以在平行于显示面板的正面的第一方向D1上延伸超过凹槽106。换句话说，显示面板在第一方向D1上的尺寸大于凹槽106在第一方向D1上的尺寸。在实施例中，显示面板107在第一方向D1上的尺寸为凹槽106在第一方向D1上的尺寸的2至10倍。这样，可以在显示面板107的下方形成容纳驱动芯片的空间。
在实施例中，与显示面板进行通信的驱动芯片电连接至显示面板107上的第一焊盘P1，由于显示面板107上的第一焊盘P1经过连接电极104连接至连接走线102，因此，可以将用于显示面板107的驱动芯片设置在连接走线102上方，而无需设置在显示面板的周边区域(即，扇出区)，因此可以减小显示面板10的边框的大小。从而减小拼接屏中相邻的显示面板之间的间隙。
再者，连接基板中的连接走线102和连接电极105可以与显示面板中的信号线连接，这样可以不必在相邻的显示面板之间为信号线预留较大空间，从而可以进一步减小拼接屏中相邻的显示面板之间的间隙。在实际应用中，可以通过控制相邻的连接电极104之间的距离，来控制相邻的显示面板之间的距离，从而减小拼接屏中相邻的显示面板之间的间隙，以最终实现小缝隙或无缝拼接，这样可以减少相邻的显示面板拼接处暗纹的出现，从而可以提高显示效果。
可以理解的是，在连接基板的绝缘层103上形成的凹槽106可以仅固定支撑待拼接的显示面板的边缘即可，不必对显示面板的整个背面形成支撑，在制备过程中，可以仅在全部的连接区30以及靠近拼接处的部分显示区设置有基底101，并在基底101上形成其他的膜层及结构(例如，驱动芯片)，以实现显示面板的拼接，这样可以节省制备原料，从而可以节约制备成本。在实施例中，形成的凹槽106的面积可以与待拼接的显示面板的扇出区的面积大致相等。连接走线102可以通过信号线与驱动芯片电连接，由于驱动芯片的功率较大，可以采用两个或者多个柔性线路板将驱动芯片与显示面板之间进行连接。
在一些实施例中，凹槽106的深度与待拼接的显示面板的厚度相等。
需要说明的是，凹槽106的深度可以与待拼接的显示面板的厚度相等，使得待拼接的显示面板可以恰好放置在凹槽106形成的空间内。同时，可以保证相邻的待拼接的显示面板的出光面位于同一平面上，从而可以使得形成的拼接屏表面平整度较高，进而可以提高显示效果。
在一些实施例中，绝缘层103包括叠层设置的聚酰亚胺层1031和氮化硅层1032；聚酰亚胺层1031较氮化硅层1032靠近基底101；凹槽106贯穿氮化硅层1032，且位于聚酰亚胺层1031中。换句话说，凹槽106的深度大于所述氮化硅 层1032的厚度且小于绝缘层103的厚度(即，小于聚酰亚胺层1031和氮化硅层1032的厚度之和)。在实施例中，聚酰亚胺层1031由聚酰亚胺材料制成，氮化硅层1032由氮化硅材料制成。
需要说明的是，本公开实施例提供的连接基板中的绝缘层103可以采用多层结构形成，例如叠层设置的聚酰亚胺层1031和氮化硅层1032。其中，聚酰亚胺层1031的厚度较氮化硅层1032的厚度较厚，聚酰亚胺层1031具有良好的绝缘性能和柔韧性能，可以在连接走线102与待拼接的显示面板中其他信号线之间起到良好的绝缘作用，并且其上形成的凹槽106可以对待拼接的显示面板起到良好的固定支撑作用，同时可以利于形成柔性的连接基板，实现显示面板的柔性拼接。氮化硅层1032性能稳定，在整个绝缘层103的制备过程中可以对覆盖的聚酰亚胺层1031起到良好的保护作用，从而形成预期厚度的绝缘层103。可以理解的是，绝缘层103还可以设置为只有一种材料的单层结构，或者其他多种材料的多层结构，其功能和实现原理类似，在此不再赘述。
在一些实施例中，连接电极104的材料包括铜。
需要说明的是，可以采用通过在种子层上蒸镀铜的方式形成连接电极104，由于铜具有良好的导电性，且制备成本较低，因此采用铜电极可以节约制备成本。可以理解的是，连接电极104也可以采用其他具有良好导电性的金属材料或者金属氧化物材料制成，在此不再一一列举。
在一些实施例中，基底101包括柔性基底。
需要说明的是，基底101可以采用聚酰亚胺等柔性材料制成，以实现柔性连接基板，从而实现显示面板的柔性连接。可以理解的是，基底101也可以采用玻璃等刚性材料制成，从而可以提高连接基板的强度，同时玻璃基底的成本较低，可以降低连接基板的制备成本。在实际应用中，可以根据实际需要选择基底101的材料，在此不在详细描述。
本公开实施例提供了一种拼接屏，图4为本公开实施例提供的一种拼接屏的结构示意图，如图4所示，该拼接屏包括如上述实施例提供的连接基板。该拼接屏还包括：以矩阵方式布置的多个显示面板107；显示面板出光面(即，正 面)的第一焊盘P1与连接基板中的连接电极104一一对应连接。
需要说明的是，驱动芯片设置在显示面板的背面，在显示面板107的正面可以设置有与显示器件连接的第一焊盘P1，利用驱动芯片向显示器件提供驱动信号，以进行显示。在实际应用中，显示面板107可以由绝缘层103上形成的凹槽106固定支撑，显示面板107正面的第一焊盘P1可以通过点锡或者引线连接的方式连接至连接电极104，由于连接电极104和连接走线102通过过孔105一一对应连接，这样显示面板107背面的驱动芯片可以通过连接基板中的连接走线102和连接电极104一一对应连接至显示面板107正面的第一焊盘P1上，因此每个显示面板可以不必为显示面板与驱动芯片的绑定预留较大面积的扇出区，从而可以减小每个显示面板的边框，从而减小拼接屏中相邻的显示面板之间的间隙。再者，连接基板中的连接走线102和连接电极105可以与显示面板中的信号线连接，这样可以不必在相邻的显示面板之间为信号线预留较大空间，从而可以进一步减小拼接屏中相邻的显示面板之间的间隙。在实际应用中，可以通过控制相邻的连接电极105之间的距离，来控制相邻的显示面板之间的距离，以减小拼接屏中相邻的显示面板之间的间隙，以最终实现小缝隙或无缝拼接，这样可以减少相邻的显示面板拼接处暗纹的出现，从而可以提高显示效果。
在一些实施例中，显示面板107包括主动矩阵有机发光二极管显示面板或被动矩阵有机发光二极管显示面板。
需要说明的是，显示面板107的类型可以为主动矩阵有机发光二极管显示面板或被动矩阵有机发光二极管显示面板，这样，采用本公开实施例提供的拼接屏可以为主动矩阵有机发光二极管显示面板与主动矩阵有机发光二极管显示面板拼接形成的拼接屏，也可以为主动矩阵有机发光二极管显示面板与被动矩阵有机发光二极管显示面板拼接形成的拼接屏，还可以为被动矩阵有机发光二极管显示面板与被动矩阵有机发光二极管显示面板拼接形成的拼接屏。在实际应用中，可以根据实际需要，选择显示面板107的类型，在此不再赘述。
基于同一发明构思，本公开实施例提供了一种显示装置，该显示装置包括如上述实施例提供的拼接屏。该显示装置可以应用于会议室、影剧院、多功能等室内需要大屏幕显示的场景中，其实现原理与上述实施例提供的拼接屏及连接基板的实现原理类似，在此不再赘述。
本公开实施例提供了一种连接基板的制备方法，图5为本公开实施例提供的连接基板的制备方法的流程示意图，该连接基板具有多个面板区，面板区包括显示区和显示区周边的连接区，如图5所示，该连接基板的制备方法包括如下步骤S501至S504。
S501，在基底上形成种子层，并对种子层进行图案化处理形成位于基底上且位于连接区的多条连接走线。
需要说明的是，如图6a所示，可以在基底上沉积金属层以形成一整面的种子层。根据连接走线数量和宽度，对整面的种子层进行刻蚀，可以在连接区形成多条连接走线。
S502，形成覆盖多条连接走线的绝缘层，并对绝缘层进行图案化处理，在连接区形成多个过孔。
如图6b所示，可以在多条连接走线上形成绝缘层，该绝缘层可以为双层结构。在实施例中，可以包括如下步骤：步骤S5021，在多条连接走线上涂附形成聚酰亚胺层。步骤S5022，在聚酰亚胺层上形成氮化硅层。之后再对由聚酰亚胺层和氮化硅层形成的双层结构的绝缘层进行图案化处理。例如，步骤S502可以包括如下步骤：步骤S5023，对氮化硅层进行图案化处理，在连接区形成多个刻蚀孔。步骤S5024，以图案化的氮化硅层为掩膜板，利用氧气灰化工艺对聚酰亚胺层进行处理，在连接区形成多个过孔。其中，氮化硅层性能稳定，图案化的氮化硅层可以作为聚酰亚胺层的掩膜板，对聚酰亚胺层进行遮挡，以在预定位置形成过孔。
S503，在过孔中形成连接电极；连接电极通过过孔与连接走线一一对应连接。
需要说明的是，如图6c所示，可以采用电镀的方式，将铜注入过孔中，在 过孔中形成铜电极，即连接电极，并使得连接电极与连接走线通过过孔一一对应连接。
S504，对绝缘层进行图案化处理，在显示区形成凹槽。
需要说明的是，如图6d、6e和6f所示，可以采用光刻胶对连接电极进行遮挡，首先对显示区的氮化硅层进行刻蚀，露出聚酰亚胺层，在对聚酰亚胺层进行氧气灰化，使得聚酰亚胺层形成凹槽。最后将覆盖连接电极的光刻胶去除，并用酸性溶液将连接电极的氧化层洗净，从而形成连接基板。
本公开实施例提供的制备方法形成的连接基板中，待拼接的显示面板可以由绝缘层上形成的凹槽固定支撑，由于显示面板上的第一焊盘经过连接电极连接至连接走线，因此，可以将用于显示面板的驱动芯片设置在连接走线上方，而无需设置在显示面板的周边区域(即，扇出区)，因此可以减小显示面板的边框的大小。从而减小拼接屏中相邻的显示面板之间的间隙。
再者，连接基板中的连接走线和连接电极可以与显示面板中的信号线连接，这样可以不必在相邻的显示面板之间为信号线预留较大空间，从而可以进一步减小拼接屏中相邻的显示面板之间的间隙。在实际应用中，可以通过控制相邻的连接电极之间的距离，来控制相邻的显示面板之间的距离，以减小从而减小拼接屏中相邻的显示面板之间的间隙，以最终实现小缝隙或无缝拼接，这样可以减少相邻的显示面板拼接处暗纹的出现，从而可以提高显示效果。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (15)

  1. 一种连接基板，具有多个面板区以及连接所述多个面板区中的两个相邻面板区的连接区，并且所述面板区包括由所述连接区围绕的显示区；
    其中，所述连接基板在所述连接区中包括：
    基底；
    多条连接走线，其位于所述基底上；
    绝缘层，其覆盖所述多条连接走线，并限定用于容纳待拼接的显示面板的凹槽；
    多个过孔，其穿过所述绝缘层；
    多个连接电极，其分别设置于所述多个过孔中，并与所述多条连接走线一一对应地连接；
    其中，所述所述连接电极与所述待拼接的显示面板的出光面的第一焊盘一一对应连接。
  2. 根据权利要求1所述的连接基板，其中，所述凹槽的深度与所述待拼接的显示面板的厚度相等。
  3. 根据权利要求1所述的连接基板，其中，所述绝缘层包括叠层设置的聚酰亚胺层和氮化硅层；
    所述聚酰亚胺层较所述氮化硅层靠近所述基底；所述凹槽贯穿所述氮化硅层，且位于所述聚酰亚胺层中。
  4. 根据权利要求1所述的连接基板，其中，所述连接电极的材料包括铜。
  5. 根据权利要求1所述的连接基板，其中，所述基底包括柔性基底。
  6. 根据权利要求1所述的连接基板，其中，在所述连接区中，
    所述连接基板包括两列连接电极，一列的连接电极与所述待拼接的显示面板的出光面的第一焊盘电连接，另一列的连接电极与所述待拼接的显示面板相邻的另一待拼接的显示面板的出光面的第一焊盘电连接。
  7. 根据权利要求6所述的连接基板，其中，在所述连接区中，
    所述多条连接走线包括两列连接走线，所述两列连接走线中的每一条连接走线沿与列方向垂直的方向延伸。
  8. 一种拼接屏，包括如权利要求1-7任一项所述的连接基板。
  9. 根据权利要求8所述的拼接屏，还包括多个显示面板；
    其中，所述多个显示面板中的每一个位于所述凹槽中；
    所述多个显示面板中的每一个的出光面上的第一焊盘与所述连接基板中的所述连接电极一一对应连接；
    所述多个显示面板中的每一个的出光面上的第一焊盘与该显示面板中的显示器件电连接；并且
    所述多条连接走线与用于驱动所述显示面板的驱动芯片电连接。
  10. 根据权利要求9所述的拼接屏，其中，
    所述显示面板在与所述显示面板的正面平行的第一方向上的尺寸为所述凹槽在所述第一方向上的尺寸的2至10倍。
  11. 根据权利要求9所述的拼接屏，其中，所述显示面板包括主动矩阵有机发光二极管显示面板或被动矩阵有机发光二极管显示面板。
  12. 一种显示装置，包括如权利要求8-11任一项所述的拼接屏。
  13. 一种连接基板的制备方法，所述连接基板具有多个面板区以及连接所述多个面板区中的两个相邻面板区的连接区，并且所述面板区包括由所述连接区围绕的显示区，所述连接基板在所述连接区中包括：基底；多条连接走线，其位于所述基底上；绝缘层，其覆盖所述多条连接走线，并限定用于容纳待拼接的显示面板的凹槽；多个过孔，其穿过所述绝缘层；多个连接电极，其分别设置于所述多个过孔中，并与所述多条连接走线一一对应地连接；其中，所述所述连接电极与所述待拼接的显示面板的出光面的第一焊盘一一对应连接，
    所述连接基板的制备方法包括：
    在所述基底上形成种子层，并对所述种子层进行图案化处理形成所述多条连接走线；
    形成覆盖多条所述连接走线的绝缘层，并对所述绝缘层进行图案化处理，在所述连接区形成多个过孔；
    在所述过孔中形成连接电极；所述连接电极通过所述过孔与所述连接走线 一一对应连接；
    对所述绝缘层进行图案化处理，在所述显示区形成凹槽。
  14. 根据权利要求13所述的连接基板的制备方法，其中，所述形成覆盖多条所述连接走线的绝缘层，包括：
    在多条所述连接走线上形成聚酰亚胺层；
    在所述聚酰亚胺层上形成氮化硅层。
  15. 根据权利要求14所述的连接基板的制备方法，其中，所述对所述绝缘层进行图案化处理，在所述连接区形成多个过孔，包括：
    对所述氮化硅层进行图案化处理，在所述连接区形成多个刻蚀孔；
    以图案化的所述氮化硅层为掩膜板，利用氧气灰化工艺对所述聚酰亚胺层进行处理，在所述连接区形成多个所述过孔。
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