WO2021238431A1 - 阵列基板、制备方法、显示面板及显示装置 - Google Patents

阵列基板、制备方法、显示面板及显示装置 Download PDF

Info

Publication number
WO2021238431A1
WO2021238431A1 PCT/CN2021/086117 CN2021086117W WO2021238431A1 WO 2021238431 A1 WO2021238431 A1 WO 2021238431A1 CN 2021086117 W CN2021086117 W CN 2021086117W WO 2021238431 A1 WO2021238431 A1 WO 2021238431A1
Authority
WO
WIPO (PCT)
Prior art keywords
sub
layer
pixel
light
emitting
Prior art date
Application number
PCT/CN2021/086117
Other languages
English (en)
French (fr)
Inventor
崔颖
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/597,758 priority Critical patent/US20220262879A1/en
Priority to JP2022530200A priority patent/JP2023528107A/ja
Priority to EP21814086.1A priority patent/EP4033539A4/en
Priority to KR1020227017519A priority patent/KR20230035212A/ko
Publication of WO2021238431A1 publication Critical patent/WO2021238431A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness

Definitions

  • the present disclosure relates to the field of display technology, and in particular to an array substrate, a manufacturing method, a display panel, and a display device.
  • OLED Organic Light Emitting Diode
  • OLED has the advantages of self-luminescence, fast response, wide viewing angle, high luminous efficiency, bright colors, and thinness. Therefore, display technology using organic light emitting diodes has become an important display technology.
  • the first electrode layer is located on the base substrate, and the first electrode layer includes a plurality of first electrodes spaced apart from each other;
  • the pixel defining layer is located on the side of the first electrode layer away from the base substrate, and the pixel defining layer includes: a first sub-defining layer and a second sub-defining layer that are in contact with each other; wherein, the first sub-definition layer
  • the defining layer and the second sub-defining layer define a plurality of pixel openings, and an orthographic projection of one pixel opening on the base substrate is located in an orthographic projection of the first electrode on the base substrate;
  • the light-emitting functional layer is located on the side of the pixel defining layer away from the base substrate, and the light-emitting functional layer includes multiple light-emitting layers with different colors; wherein, the light-emitting layer is located in the pixel opening;
  • the colors of the light-emitting layers in at least two pixel openings adjacent in one direction are the same, and the colors of the light-emitting layers in at least two pixel openings adjacent in the second direction are different; the first direction is different from the second direction ;
  • the first sub-limiting layer is located between two adjacent pixel openings provided with different color light-emitting layers, and the first sub-limiting layer has a first height in a direction perpendicular to the plane of the base substrate;
  • the second sub-limiting layer is located between two adjacent pixel openings provided with the same color light-emitting layer, and the second sub-limiting layer has a second height in a direction perpendicular to the plane of the base substrate;
  • the first height is greater than the second height.
  • the pixel opening has a long side and a short side
  • the orthographic projection of the second sub-limiting layer on the base substrate is close to two adjacent ones provided with light-emitting layers of the same color.
  • the orthographic projection of the first sub-limiting layer on the base substrate is substantially bent and extended along the first direction, and the first sub-limiting layer is a continuous fold line structure;
  • a plurality of second sub-defining layers are arranged between two adjacent first sub-defining layers, and a plurality of second sub-defining layers are located between two adjacent first sub-defining layers.
  • the second sub-limiting layers are arranged at intervals.
  • the orthographic projection of the first sub-limiting layer on the base substrate extends substantially along the first direction, and the first sub-limiting layer is a continuous linear structure;
  • a plurality of second sub-defining layers are arranged between two adjacent first sub-defining layers, and a plurality of second sub-defining layers are located between two adjacent first sub-defining layers.
  • the second sub-limiting layers are arranged at intervals.
  • the array substrate includes a plurality of repeating units, the plurality of repeating units are arranged in a second direction into a plurality of repeating unit groups, and the plurality of repeating unit groups are arranged along the first direction. Arranged in one direction;
  • Each of the repeating units includes a plurality of pixel openings sequentially arranged along the second direction; wherein the color of the light-emitting layer of the same repeating unit group is different.
  • the angle between the extending direction of the long side of the pixel opening and the second direction is greater than 0 degrees and less than 90 degrees.
  • each of the pixel openings has a first short side and a second short side opposite to each other; A pixel opening, the first short side of the first pixel opening, the second short side of the second pixel opening, and the second sub-side provided between the two pixel openings
  • the defining layer has an overlapping area in the first direction.
  • the first short side of the first pixel opening is located at one end of the second sub-limiting layer provided between the two pixel openings, and the second pixel The second short side of the opening is located at the other end of the second sub-limiting layer arranged between the two pixel openings.
  • the extending direction of the long side of the pixel opening is substantially the same as the first direction
  • the orthographic projection of the second sub-defining layer on the base substrate is located between the short sides of two adjacent pixel openings provided with the same color light-emitting layer and the orthographic projection of the base substrate.
  • the width of the second sub-limiting layer in the second direction is approximately equal to the width of the orthographic projection of the adjacent short side of the pixel opening on the base substrate. same.
  • the light-emitting function layer includes a first-color light-emitting layer, a second-color light-emitting layer, and a third-color light-emitting layer;
  • the plurality of pixel openings include a first pixel opening, a second pixel opening, and a third pixel opening; wherein, the first color light-emitting layer is located in the first pixel opening, and the second color light-emitting layer is located in the first pixel opening. Two pixel openings, the third color light-emitting layer is located in the third pixel opening;
  • Each of the repeating units includes a first pixel opening, a second pixel opening, and a third pixel opening that are sequentially arranged along the second direction.
  • the embodiment of the present disclosure also provides a preparation method of the array substrate, including:
  • first sub-limiting layer Forming the first sub-limiting layer on a base substrate on which the second sub-limiting layer is formed; wherein the first sub-limiting layer has a first height in a direction perpendicular to the plane of the base substrate, And the first height is greater than the second height; the first sub-limiting layer and the second sub-limiting layer are in contact with each other to define a plurality of pixel openings, and one pixel opening is in the substrate
  • the orthographic projection of the substrate is located in an orthographic projection of the first electrode on the base substrate;
  • An inkjet printing process is used to form a light-emitting functional layer in each of the pixel openings; wherein, the light-emitting functional layer includes multiple light-emitting layers with different colors; wherein, the light-emitting layer is located in the pixel opening and is located along the first
  • the colors of the light-emitting layers in at least two pixel openings adjacent in directions are the same, and the colors of the light-emitting layers in at least two pixel openings adjacent in the second direction are different; the first direction is different from the second direction;
  • the second sub-limiting layer is located between two adjacent pixel openings provided with light-emitting layers of the same color
  • the first sub-limiting layer is located between two adjacent pixel openings provided with light-emitting layers of different colors.
  • the embodiment of the present disclosure also provides a display panel including the above-mentioned array substrate.
  • the embodiment of the present disclosure also provides a display device including the above-mentioned display panel.
  • FIG. 1 is a schematic top view of some array substrates in the embodiments of the disclosure.
  • Fig. 2a is a schematic cross-sectional view of the array substrate shown in Fig. 1 in the AA' direction;
  • FIG. 2b is a schematic top view of the structure of still other array substrates in the embodiments of the disclosure.
  • FIG. 3 is a schematic diagram of a top view structure of other array substrates in the embodiments of the disclosure.
  • FIG. 4 is a schematic cross-sectional view of the array substrate shown in FIG. 3 in the AA' direction;
  • FIG. 5 is a flowchart of some manufacturing methods of array substrates in the embodiments of the disclosure.
  • 6a is a schematic diagram of some cross-sectional structures of the array substrate in the embodiment of the disclosure during preparation
  • FIG. 6b is another schematic cross-sectional structure diagram of the array substrate in the embodiment of the disclosure during preparation
  • FIG. 6c is another schematic cross-sectional structure diagram of the array substrate in the embodiment of the disclosure during preparation
  • FIG. 6d is another schematic cross-sectional structure diagram of the array substrate in the embodiment of the disclosure during preparation
  • FIG. 6e is another schematic cross-sectional structure diagram of the array substrate in the embodiment of the disclosure during preparation.
  • the light-emitting layer formation methods include: 1.
  • the vacuum evaporation method is suitable for organic small molecules. Its characteristic is that the formation of the light-emitting layer does not require solvents and the film thickness is uniform, but the equipment investment is large and the material utilization rate is large. Low, not suitable for the production of large-size products.
  • the light-emitting layer is formed by inkjet printing
  • the above-mentioned pixel defining layer has a plurality of openings.
  • the solution is precisely inkjet printed into the openings of the pixel defining layer to form a light-emitting layer.
  • the ink of inkjet printing may spread unevenly in the opening, which will make the thickness of the light-emitting layer formed at different positions of the opening uneven.
  • the opening has a long side and a short side. Since the width of the short side is smaller than that of the long side, the light-emitting layer spreads on the short side compared to the long side. The uniformity of the diffusion is reduced. As a result, the pixel brightness of the display device is uneven when it emits light, which seriously affects the display effect of the display device.
  • an array substrate as shown in FIGS. 1 to 2b, including:
  • the first electrode 110 layer is located on the base substrate 100, and the first electrode 110 layer includes a plurality of first electrodes 110 spaced apart from each other;
  • the pixel defining layer is located on the side of the first electrode 110 away from the base substrate 100, and the pixel defining layer includes: a first sub-defining layer 120 and a second sub-defining layer 130 that are in contact with each other; wherein, the first sub-defining layer 120 and The second sub-defining layer 130 defines a plurality of pixel openings, and the orthographic projection of one pixel opening on the base substrate 100 is located in the orthographic projection of the first electrode 110 on the base substrate 100;
  • the light-emitting functional layer 140 is located on the side of the pixel defining layer away from the base substrate 100, and the light-emitting functional layer 140 includes multiple light-emitting layers of different colors; wherein, the light-emitting layer is located in the pixel opening;
  • the colors of the light-emitting layers in the two pixel openings are the same, and the colors of the light-emitting layers in at least two pixel openings adjacent to each other along the second direction F2 are different; the first direction F1 is different from the second direction F2;
  • the first sub-limiting layer 120 is located between two adjacent pixel openings provided with light-emitting layers of different colors, and the first sub-limiting layer 120 has a first height H1 in a direction perpendicular to the plane of the base substrate 100;
  • the second sub-defining layer 130 is located between two adjacent pixel openings provided with the same color light-emitting layer, and the second sub-defining layer 130 has a second height H2 in a direction perpendicular to the plane of the base substrate 100;
  • the first height H1 is greater than the second height H2.
  • the pixel defining layer includes a first sub-defining layer and a second sub-defining layer that are in contact with each other, and the first sub-defining layer is positioned on the first sub-limiting layer in a direction perpendicular to the plane of the base substrate.
  • a height is greater than the second height of the second sub-limiting layer in a direction perpendicular to the plane where the base substrate is located.
  • the material of the light-emitting layer of the same color can flow between adjacent pixel openings, which is equivalent to increasing the diffusion range of the light-emitting material, thereby improving the film formation of the light-emitting layer Uniformity, thereby improving the display effect of the display device.
  • the pixel opening has a long side and a short side.
  • the shape of the pixel opening is a rectangle
  • the long side of the rectangle can be used as the long side of the pixel opening
  • the short side of the rectangle can be used as the short side of the pixel opening.
  • the pixel openings can also have other shapes, which can be designed and determined according to the actual application environment, which is not limited here.
  • a second electrode layer 150 is further provided on the side of the light-emitting function layer 140 away from the base substrate 100, so that the first electrode 110, the light-emitting layer and The second electrode layer forms a laminated structure, thereby forming an electroluminescent diode.
  • the material of the light-emitting layer can be an organic electroluminescent material, so that the electroluminescent diode can be an organic light-emitting diode.
  • the material of the light-emitting layer can also be a quantum dot electroluminescent material, so that the electroluminescent diode can be a quantum dot light-emitting diode.
  • the area where the pixel opening of the pixel defining layer is located is the light-emitting area of the sub-pixel where the electroluminescent diode is located.
  • a transistor array layer is further provided on the first electrode 110 layer and the base substrate 100.
  • the transistor array layer may include a plurality of pixel circuits.
  • One first electrode 110 is electrically connected to one pixel circuit to input a driving current to the first electrode 110 through the pixel circuit and apply a corresponding voltage to the second electrode layer to drive the light-emitting layer.
  • the pixel circuit may include a storage capacitor and a transistor electrically connected to the storage capacitor.
  • the pixel circuit may include at least a 2T1C pixel circuit, a 3T1C pixel circuit, and a 7T1C pixel circuit.
  • the structure of the pixel circuit can be basically the same as that in the related art, and will not be repeated here.
  • the orthographic projection of the second sub-limiting layer 130 on the base substrate 100 is close to the short sides of two adjacent pixel openings provided with the same color light-emitting layer.
  • the orthographic projection of the base substrate 100 is close to the short sides of two adjacent pixel openings provided with the same color light-emitting layer.
  • the orthographic projection of the base substrate 100 can be enlarged by the second sub-limiting layer 130, so that the range of the short sides of the pixel opening to diffuse the light-emitting material can be increased.
  • the first sub-defining layer 120 has a continuous broken line structure, and the orthographic projection of the first sub-defining layer 120 on the base substrate 100 is substantially along the first direction. F1 bends and extends. In this way, each of the first sub-defining layers 120 is arranged in a broken line-shaped integrated structure.
  • a plurality of second sub-limiting layers 130 are provided between two adjacent first sub-limiting layers 120, and are located
  • the plurality of second sub-defining layers 130 between two adjacent first sub-defining layers 120 are arranged at intervals.
  • the second sub-limiting layer 130 can be configured as a non-continuous structure.
  • the array substrate may include a plurality of repeating units PX, and the plurality of repeating units PX are arranged in a plurality of repeating unit PX groups along the second direction F2.
  • the groups of units PX are arranged along the first direction F1; wherein each repeating unit PX includes a plurality of pixel openings arranged in sequence along the second direction F2; wherein the color of the light-emitting layer of the same repeating unit PX is different.
  • the repeating unit PX may include a plurality of sub-pixels, and one sub-pixel includes one pixel opening. In this way, the light-emitting layers of different sub-pixels in the repeating unit PX can emit light for color mixing, thereby realizing the display function.
  • the first direction may be perpendicular to the second direction.
  • the first direction may be the pixel row direction
  • the second direction may be the pixel column direction.
  • the first direction may be a pixel column direction
  • the second direction may be a pixel row direction.
  • the light-emitting function layer 140 may include a first-color light-emitting layer 141, a second-color light-emitting layer 142, and a third-color light-emitting layer 143.
  • the first color, the second color, and the third color can be selected from red, green, and blue.
  • the first color is red
  • the second color is green
  • the third color is blue.
  • the embodiments of the present disclosure include but are not limited to this.
  • the aforementioned first color, second color, and third color may also be other colors.
  • the plurality of pixel openings include a first pixel opening KK1, a second pixel opening KK2, and a third pixel opening KK3; wherein the first color emits light
  • the layer 141 is located in the first pixel opening KK1, the second color light emitting layer 142 is located in the second pixel opening KK2, and the third color light emitting layer 143 is located in the third pixel opening KK3.
  • each repeating unit PX includes a first pixel opening KK1, a second pixel opening KK2, and a third pixel opening KK3 that are sequentially arranged along the second direction F2. That is, the repeating unit PX includes the first color sub-pixels, the second color sub-pixels, and the third color sub-pixels sequentially arranged along the second direction F2.
  • the angle ⁇ between the extending direction F3 of the long side of the pixel opening and the second direction F2 may be greater than 0 degrees and less than 90 degrees.
  • the angle ⁇ between the extending direction F3 of the long side of the pixel opening and the second direction F2 is an acute angle.
  • each pixel opening has a first short side and a second short side opposite to each other; wherein, the first short side and the second short side
  • the edges are respectively close to the light-emitting layers of different colors.
  • the first pixel opening KK1 has a first short side DS1-1 and a second short side DS2-1 opposite to each other.
  • the first short side DS1-1 is close to the third color light-emitting layer 143
  • the second short side DS2-1 is close to the first short side DS2-1.
  • Two-color light-emitting layer 142 Two-color light-emitting layer 142.
  • the second pixel opening KK2 has a first short side DS1-2 and a second short side DS2-2 opposite to each other.
  • the first short side DS1-2 is close to the first color light-emitting layer 141
  • the second short side DS2-2 is close to the third color Luminescent layer 143.
  • the third pixel opening KK3 has a first short side DS1-3 and a second short side DS2-3 opposite to each other.
  • the first short side DS1-3 is close to the second color light emitting layer 142
  • the second short side DS2-3 is close to the first color.
  • Luminescent layer 141 is a first short side DS1-2 and a second short side DS2-2 opposite to each other.
  • the first short side and the first short side of the first pixel opening of the two pixel openings have an overlapping area in the first direction F1.
  • the short sides of the pixel openings adjacent in the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height, which is equivalent to expanding the short sides of the pixel openings adjacent in the first direction F1.
  • the fluidity at the short side of the pixel opening can be improved, and the light-emitting material can be diffused uniformly at the short side of the pixel opening, thereby improving the uniformity of the formed light-emitting layer sex.
  • the first short side of the first pixel opening is located at one end of the second sub-limiting layer 130 arranged between the two pixel openings, and the second pixel The second short side of the opening is located at the other end of the second sub-defining layer 130 disposed between the two pixel openings.
  • the short sides of the pixel openings adjacent to each other along the first direction F1 can be expanded as much as possible.
  • the fluidity at the short side of the pixel opening can be further improved, and the light-emitting material can be diffused uniformly at the short side of the pixel opening, thereby further improving the formed light-emitting layer.
  • the first short side DS1-1 and the second short side DS1-1 of the first first pixel opening KK1 have an overlapping area in the first direction F1.
  • the first short side DS1-1 of the first first pixel opening KK1 is located at one end of the second sub-limiting layer 130
  • the second short side DS2-1 of the second first pixel opening KK1 is located at the second sub-limiting layer 130.
  • the other end of the layer 130 is defined.
  • the first sub-defining layer 120 is disposed adjacent to the first short side DS1-1 and the first short side DS2-1 of the first pixel opening KK1.
  • the short sides of the first pixel opening KK1 adjacent in the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height.
  • the first short side DS1-2 and the second short side DS1-2 of the first second pixel opening KK2 have an overlapping area in the first direction F1.
  • the first short side DS1-2 of the first second pixel opening KK2 is located at one end of the second sub-limiting layer 130
  • the second short side DS2-2 of the second second pixel opening KK2 is located at the second sub-limiting layer 130.
  • the other end of the layer 130 is defined.
  • the first sub-defining layer 120 is disposed adjacent to the first short side DS1-2 and the first short side DS2-2 of the second pixel opening KK2.
  • the short sides of the second pixel opening KK2 adjacent in the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height.
  • the first short side DS1-3 and the second short side DS1-3 of the first third pixel opening KK3 have an overlapping area in the first direction F1.
  • the first short side DS1-3 of the first third pixel opening KK3 is located at one end of the second sub-limiting layer 130
  • the second short side DS2-3 of the second third pixel opening KK3 is located at the second sub-limiting layer 130.
  • the other end of the layer 130 is defined.
  • the first sub-defining layer 120 is disposed adjacent to the first short side DS1-3 and the first short side DS2-3 of the third pixel opening KK3.
  • the short sides of the third pixel opening KK3 adjacent in the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height.
  • the orthographic projection of the second sub-limiting layer 130 on the base substrate 100 is close to the short sides of the two adjacent pixel openings provided with the same color light-emitting layer on the front of the base substrate 100.
  • Projection may mean that the second sub-limiting layer 130 shown in FIG. 1 is disposed between the long sides of two adjacent pixel openings along the first direction F1, and the second sub-limiting layer 130 is simultaneously close to the adjacent One short side of the opening of these two pixels.
  • the second sub-limiting layer 130 is simultaneously close to the first short side DS1-1 of the first first pixel opening KK1 and the second short side of the second first pixel opening KK1. DS1-2.
  • the embodiments of the present disclosure provide further display panels, the schematic diagram of the structure of which is shown in FIG. Only the differences between this embodiment and the above-mentioned embodiments are described below, and the similarities are not repeated here.
  • the extension direction of the long side of the pixel opening is approximately the same as the first direction F1; wherein, the second sub-limiting layer 130 is on the base substrate 100
  • the orthographic projection of is located between the orthographic projections of the base substrate 100 on the short sides of the two adjacent pixel openings provided with the same color light-emitting layer.
  • the width of the second sub-defining layer 130 in the second direction F2 is approximately the same as the width of the orthographic projection of the short side of the adjacent pixel opening on the base substrate 100.
  • the short sides of the first pixel opening KK1 that are adjacent in the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height, which is equivalent to canceling the short sides, so that the luminescent material can be diffused evenly, and then Improve the uniformity of the formed light-emitting layer.
  • the first sub-defining layer 120 is a continuous linear structure, and the orthographic projection of the first sub-defining layer 120 on the base substrate 100 is substantially along the first direction. F1 extension. In this way, each of the first sub-defining layers 120 is arranged in a linear integral structure.
  • a plurality of second sub-limiting layers 130 are provided between two adjacent first sub-limiting layers 120, and are located in The plurality of second sub-defining layers 130 between two adjacent first sub-defining layers 120 are arranged at intervals. In this way, the second sub-limiting layer 130 can be configured as a non-continuous structure.
  • the colors of the light-emitting layers in one column are the same.
  • a second sub-limiting layer 130 is provided.
  • the short sides of the first pixel opening KK1 adjacent to the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height, which is equivalent to canceling the short sides.
  • the fluidity at the short side of the first pixel opening KK1 can be improved, so that the light-emitting material can be uniformly diffused at the short side of the first pixel opening KK1, thereby improving Uniformity of the formed light-emitting layer.
  • the first short side DS1-2 of the first second pixel opening KK2 and the second second pixel opening KK2 A second sub-defining layer 130 is provided between the first short sides DS2-2 of the pixel opening KK2.
  • the short sides of the second pixel opening KK2 adjacent to the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height, which is equivalent to canceling the short sides.
  • the fluidity at the short side of the second pixel opening KK2 can be improved, so that the light-emitting material can be evenly diffused at the short side of the second pixel opening KK2, thereby improving Uniformity of the formed light-emitting layer.
  • the first short side DS1-3 of the first third pixel opening KK3 and the second third pixel opening KK3 A second sub-defining layer 130 is provided between the first short sides DS2-3 of the pixel opening KK3.
  • the short sides of the third pixel opening KK3 adjacent in the first direction F1 can be connected through the second sub-limiting layer 130 with a lower height, which is equivalent to canceling the short sides.
  • the fluidity at the short side of the third pixel opening KK3 can be improved, so that the light-emitting material can be evenly diffused at the short side of the third pixel opening KK3, thereby improving Uniformity of the formed light-emitting layer.
  • the orthographic projection of the second sub-limiting layer 130 on the base substrate 100 is close to the short sides of the two adjacent pixel openings provided with the same color light-emitting layer on the front of the base substrate 100.
  • Projection may mean that the second sub-limiting layer 130 shown in FIG. 3 is disposed between the short sides of two adjacent pixel openings along the first direction F1.
  • the second sub-limiting layer 130 is simultaneously adjacent to the first short side DS1-1 of the first first pixel opening KK1 and the second short side of the second first pixel opening KK1. DS1-2.
  • the above-mentioned features may not be completely the same, and there may be some deviations. Therefore, the same relationship between the above-mentioned features as long as the above-mentioned conditions are roughly met. That is, all belong to the protection scope of the present disclosure.
  • the above-mentioned sameness may be the same as allowed within the allowable error range.
  • the embodiment of the present disclosure also provides a method for preparing the above-mentioned array substrate, as shown in FIG. 5, which may include the following steps:
  • first sub-limiting layer 120 has a first height H1 in a direction perpendicular to the plane of the base substrate 100, and the first The height H1 is greater than the second height H2; the first sub-defining layer 120 and the second sub-defining layer 130 are in contact with each other to define a plurality of pixel openings, and the orthographic projection of one pixel opening on the base substrate 100 is located on a first electrode 110 In the orthographic projection of the base substrate 100;
  • the colors of the light-emitting layers in at least two pixel openings are the same, and the colors of the light-emitting layers in at least two pixel openings adjacent in the second direction F2 are different; the first direction F1 is different from the second direction F2; and the second sub
  • the defining layer 130 is located between two adjacent pixel openings provided with light-emitting layers of the same color, and the first sub-limiting layer 120 is located between two adjacent pixel openings provided with light-emitting layers of different colors.
  • the method before step S510, further includes: forming a transistor array layer on the base substrate 100.
  • a transistor array layer is formed on the base substrate 100.
  • the film layers that need to be patterned in the manufacturing process of the transistor array layer are: active layer ⁇ gate metal layer ⁇ interlayer insulating layer ⁇ source and drain metal layer ⁇ flat layer.
  • a patterning process is used to form a plurality of patterns of the first electrodes 110 spaced apart on the side of the planarization layer away from the base substrate 100; as shown in FIG. 6a.
  • the first sub-defining layer 120 is formed on the base substrate 100 on which the second sub-defining layer 130 is formed; as shown in FIG. 6c.
  • the second sub-limiting layer 130 has a second height H2 in a direction perpendicular to the plane of the base substrate 100
  • the first sub-limiting layer 120 has a first height H1 in a direction perpendicular to the plane of the base substrate 100
  • the first The height H1 is greater than the second height H2.
  • the first sub-defining layer 120 and the second sub-defining layer 130 are in contact with each other to define a plurality of pixel openings.
  • the luminescent material is sprayed into each pixel opening to form a luminescent layer of different colors, and then a luminescent functional layer 140 is formed; as shown in FIG. 6d.
  • a second electrode layer is formed on the side of the light-emitting function layer 140 away from the base substrate 100; as shown in FIG. 6e.
  • the second electrode layer may have a structure covering the entire surface of the base substrate 100.
  • the embodiments of the present disclosure also provide a display panel.
  • the principle of solving the problems of the display panel is similar to that of the aforementioned array substrate. Therefore, the implementation of the display panel can refer to the implementation of the aforementioned array substrate, and the repetitive parts will not be repeated here.
  • the embodiment of the present disclosure also provides a display device, including the above-mentioned display panel provided by the embodiment of the present disclosure.
  • the principle of the display device to solve the problem is similar to that of the aforementioned display panel. Therefore, the implementation of the display device can refer to the implementation of the aforementioned display panel, and the repetitions will not be repeated here.
  • the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • Other indispensable components of the display device are understood by those of ordinary skill in the art, and will not be repeated here, and should not be used as a limitation to the present disclosure.
  • the pixel defining layer includes a first sub-defining layer and a second sub-defining layer that are in contact with each other, and the first sub-defining layer is perpendicular to The first height in the direction of the plane where the base substrate is located is greater than the second height of the second sub-limiting layer in the direction perpendicular to the plane where the base substrate is located.
  • the material of the light-emitting layer of the same color can flow between adjacent pixel openings, which is equivalent to increasing the diffusion range of the light-emitting material, thereby improving the film formation of the light-emitting layer Uniformity, thereby improving the display effect of the display device.

Abstract

本公开公开了阵列基板、制备方法、显示面板及显示装置，通过使像素限定层包括相互接触的第一子限定层和第二子限定层，并且使第一子限定层在垂直于衬底基板所在平面方向上的第一高度大于第二子限定层在垂直于衬底基板所在平面方向上的第二高度。这样在采用喷墨打印工艺在像素开口中形成发光层时，可以通过第一子限定层将不同颜色发光层间隔开。由于第二子限定层的第二高度较低，可以使相同颜色发光层的材料在相邻像素开口之间进行流动，相当于增大了发光材料的扩散范围，从而可以提高发光层的成膜均匀性，进而提高显示装置的显示效果。

Description

阵列基板、制备方法、显示面板及显示装置
相关申请的交叉引用
本申请要求在2020年05月29日提交中国专利局、申请号为202010471555.X、申请名称为“阵列基板、制备方法、显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，特别涉及阵列基板、制备方法、显示面板及显示装置。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)具有自发光、反应快、视角广、发光效率高、色彩艳、轻薄等优点，因此，利用有机发光二极管的显示技术已成为重要的显示技术。
发明内容
本公开实施例提供的阵列基板，包括：
衬底基板；
第一电极层，位于所述衬底基板上，且所述第一电极层包括相互间隔设置的多个第一电极；
像素限定层，位于所述第一电极层背离所述衬底基板一侧，且所述像素限定层包括：相互接触的第一子限定层和第二子限定层；其中，所述第一子限定层和所述第二子限定层限定出多个像素开口，一个所述像素开口在所述衬底基板的正投影位于一个所述第一电极在所述衬底基板的正投影内；
发光功能层，位于所述像素限定层背离所述衬底基板一侧，且所述发光功能层包括多种颜色不同的发光层；其中，所述发光层位于所述像素开口内； 且沿第一方向相邻的至少两个像素开口内的发光层的颜色相同，沿第二方向相邻的至少两个像素开口内的发光层的颜色不同；所述第一方向与所述第二方向不同；
所述第一子限定层位于设置有不同颜色发光层的相邻两个像素开口之间，且所述第一子限定层在垂直于所述衬底基板所在平面方向上具有第一高度；
所述第二子限定层位于设置有相同颜色发光层的相邻两个像素开口之间，所述第二子限定层在垂直于所述衬底基板所在平面方向上具有第二高度；
所述第一高度大于所述第二高度。
可选地，在本公开实施例中，所述像素开口具有长边和短边，所述第二子限定层在所述衬底基板的正投影靠近设置有相同颜色发光层的相邻两个像素开口的短边在所述衬底基板的正投影。
可选地，在本公开实施例中，所述第一子限定层在所述衬底基板的正投影大致沿所述第一方向弯折延伸，且所述第一子限定层为连续的折线结构；
在所述第二方向上，相邻两个所述第一子限定层之间设置有多个所述第二子限定层，且位于相邻两个所述第一子限定层之间的多个所述第二子限定层间隔排列。
可选地，在本公开实施例中，所述第一子限定层在所述衬底基板的正投影大致沿所述第一方向延伸，且所述第一子限定层为连续的直线结构；
在所述第二方向上，相邻两个所述第一子限定层之间设置有多个所述第二子限定层，且位于相邻两个所述第一子限定层之间的多个所述第二子限定层间隔排列。
可选地，在本公开实施例中，所述阵列基板包括多个重复单元，所述多个重复单元沿第二方向排列为多个重复单元组，所述多个重复单元组沿所述第一方向排列；
各所述重复单元包括沿所述第二方向依次排列的多个像素开口；其中，同一所述重复单元组的发光层的颜色不同。
可选地，在本公开实施例中，所述像素开口的长边的延伸方向与所述第 二方向之间的夹角大于0度小于90度。
可选地，在本公开实施例中，同一所述重复单元中，各所述像素开口具有相对的第一短边与第二短边；针对沿所述第一方向依次排列的两个所述像素开口，所述两个所述像素开口中的第一个像素开口的第一短边、第二个像素开口的第二短边以及所述两个像素开口之间设置的所述第二子限定层在所述第一方向上具有交叠区域。
可选地，在本公开实施例中，所述第一个像素开口的第一短边位于所述两个像素开口之间设置的所述第二子限定层的一端，所述第二个像素开口的第二短边位于所述两个像素开口之间设置的所述第二子限定层的另一端。
可选地，在本公开实施例中，所述像素开口的长边的延伸方向与所述第一方向大致相同；
所述第二子限定层在所述衬底基板的正投影位于设置有相同颜色发光层的相邻两个像素开口的短边在所述衬底基板的正投影之间。
可选地，在本公开实施例中，所述第二子限定层在所述第二方向上的宽度与相邻的所述像素开口的短边在所述衬底基板的正投影的宽度大致相同。
可选地，在本公开实施例中，所述发光功能层包括第一颜色发光层、第二颜色发光层以及第三颜色发光层；
所述多个像素开口包括第一像素开口、第二像素开口以及第三像素开口；其中，所述第一颜色发光层位于所述第一像素开口，所述第二颜色发光层位于所述第二像素开口，所述第三颜色发光层位于所述第三像素开口；
各所述重复单元包括沿所述第二方向依次排列的第一像素开口、第二像素开口以及第三像素开口。
本公开实施例还提供了阵列基板的制备方法，包括：
在衬底基板上形成第一电极层中的相互间隔设置的多个第一电极的图案；
在形成有所述第一电极层的衬底基板上形成所述第二子限定层；其中，所述第二子限定层在垂直于所述衬底基板所在平面方向上具有第二高度；
在形成有所述第二子限定层的衬底基板上形成所述第一子限定层；其中， 所述第一子限定层在垂直于所述衬底基板所在平面方向上具有第一高度，且所述第一高度大于所述第二高度；所述第一子限定层和所述第二子限定层相互接触，以限定出多个像素开口，以及一个所述像素开口在所述衬底基板的正投影位于一个所述第一电极在所述衬底基板的正投影内；
采用喷墨打印工艺在各所述像素开口内形成发光功能层；其中，所述发光功能层包括多种颜色不同的发光层；其中，所述发光层位于所述像素开口内，且沿第一方向相邻的至少两个像素开口内的发光层的颜色相同，沿第二方向相邻的至少两个像素开口内的发光层的颜色不同；所述第一方向与所述第二方向不同；
其中，所述第二子限定层位于设置有相同颜色发光层的相邻两个像素开口之间，所述第一子限定层位于设置有不同颜色发光层的相邻两个像素开口之间。
本公开实施例还提供了显示面板，包括上述阵列基板。
本公开实施例还提供了显示装置，包括上述显示面板。
附图说明
图1为本公开实施例中的一些阵列基板的俯视结构示意图；
图2a为图1所示的阵列基板在AA’方向上的剖视结构示意图；
图2b为本公开实施例中的又一些阵列基板的俯视结构示意图；
图3为本公开实施例中的另一些阵列基板的俯视结构示意图；
图4为图3所示的阵列基板在AA’方向上的剖视结构示意图；
图5为本公开实施例中的一些阵列基板的制备方法的流程图；
图6a为本公开实施例中的阵列基板在制备时的一些剖视结构示意图；
图6b为本公开实施例中的阵列基板在制备时的另一些剖视结构示意图；
图6c为本公开实施例中的阵列基板在制备时的又一些剖视结构示意图；
图6d为本公开实施例中的阵列基板在制备时的又一些剖视结构示意图；
图6e为本公开实施例中的阵列基板在制备时的又一些剖视结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。并且在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
在制备有机发光二极管时，其发光层形成方法有：一、真空蒸镀方法，适用于有机小分子，其特点是发光层的形成不需要溶剂，薄膜厚度均一，但是设备投资大、材料利用率低、不适用于大尺寸产品的生产。二、采用有机发光材料的溶液制成发光层，包括旋涂、喷墨打印等，适用于聚合物材料和可溶性小分子，其特点是设备成本低，在大规模、大尺寸生产上优势突出。其中，采用喷墨打印的方式形成发光层时，需要预先在衬底基板100上制作像素界定层，以限定墨滴精确的喷入指定的像素的发光区域内。通常，上述像素界定层具有多个开口，在喷墨打印的过程中，将溶液精准的喷墨打印到像素限定层的开口中以形成发光层。然而，喷墨打印的墨水在该开口中的扩散可能不均匀，这将使得在开口的不同位置形成的发光层的厚度不均匀。尤其 在开口的边长不均等时，例如，开口具有长边和短边，由于短边的宽度相比长边的宽短较小，因此导致发光层在短边处的扩散相比在长边处的扩散的均匀性降低。由此导致显示装置在发光时其像素亮度不均匀，严重影响显示装置的显示效果。
有鉴于此，本公开实施例提供了阵列基板，如图1至图2b所示，包括：
衬底基板100；
第一电极110层，位于衬底基板100上，且第一电极110层包括相互间隔设置的多个第一电极110；
像素限定层，位于第一电极110层背离衬底基板100一侧，且像素限定层包括：相互接触的第一子限定层120和第二子限定层130；其中，第一子限定层120和第二子限定层130限定出多个像素开口，一个像素开口在衬底基板100的正投影位于一个第一电极110在衬底基板100的正投影内；
发光功能层140，位于像素限定层背离衬底基板100一侧，且发光功能层140包括多种颜色不同的发光层；其中，发光层位于像素开口内；且沿第一方向F1相邻的至少两个像素开口内的发光层的颜色相同，沿第二方向F2相邻的至少两个像素开口内的发光层的颜色不同；第一方向F1与第二方向F2不同；
其中，第一子限定层120位于设置有不同颜色发光层的相邻两个像素开口之间，且第一子限定层120在垂直于衬底基板100所在平面方向上具有第一高度H1；
第二子限定层130位于设置有相同颜色发光层的相邻两个像素开口之间，第二子限定层130在垂直于衬底基板100所在平面方向上具有第二高度H2；
第一高度H1大于第二高度H2。
本公开实施例提供的上述阵列基板，通过使像素限定层包括相互接触的第一子限定层和第二子限定层，并且使第一子限定层在垂直于衬底基板所在平面方向上的第一高度大于第二子限定层在垂直于衬底基板所在平面方向上的第二高度。这样在采用喷墨打印工艺在像素开口中形成发光层时，可以通 过第一子限定层将不同颜色发光层间隔开。由于第二子限定层的第二高度较低，可以使相同颜色发光层的材料在相邻像素开口之间进行流动，相当于增大了发光材料的扩散范围，从而可以提高发光层的成膜均匀性，进而提高显示装置的显示效果。
在具体实施时，在本公开实施例中，如图1所示，像素开口具有长边和短边。示例性地，像素开口的形状为长方形，则该长方形的长边可以作为像素开口的长边，该长方形的短边可以作为像素开口的短边。当然，在实际应用中，像素开口还可以具有其他形状，这可以根据实际应用环境来设计确定，在此不作限定。
在具体实施时，在本公开实施例中，如图2a所示，在发光功能层140背离衬底基板100一侧还设置有第二电极层150，这样可以使第一电极110、发光层以及第二电极层形成层叠结构，进而形成电致发光二极管。示例性地，可以使发光层的材料为有机电致发光材料，这样可以使电致发光二极管为有机发光二极管。也可以使发光层的材料为量子点电致发光材料，这样可以使电致发光二极管为量子点发光二极管。需要说明的是，像素限定层的像素开口所在的区域为电致发光二极管所在的子像素的发光区域。
在具体实施时，在本公开实施例中，在第一电极110层与衬底基板100还设置有晶体管阵列层。晶体管阵列层可以包括多个像素电路，一个第一电极110与一个像素电路电连接，以通过像素电路向第一电极110输入驱动电流，并对第二电极层施加相应的电压，从而驱动发光层发光。示例性地，像素电路可以包括存储电容、以及与存储电容电连接的晶体管。例如，像素电路可以包括2T1C像素电路、3T1C像素电路、7T1C像素电路中的至少。在实际应用中，像素电路的结构可以与相关技术中的基本相同，在此不作赘述。
在具体实施时，在本公开实施例中，如图1所示，第二子限定层130在衬底基板100的正投影靠近设置有相同颜色发光层的相邻两个像素开口的短边在衬底基板100的正投影。这样可以使设置有相同颜色发光层的相邻两个像素开口的短边的范围，通过第二子限定层130进行扩大，从而可以提高像 素开口的短边使发光材料扩散的范围。
在具体实施时，在本公开实施例中，如图1所示，第一子限定层120为连续的折线结构，且第一子限定层120在衬底基板100的正投影大致沿第一方向F1弯折延伸。这样使得每一个第一子限定层120设置为折线形的一体结构。
在具体实施时，在本公开实施例中，如图1所示，在第二方向F2上，相邻两个第一子限定层120之间设置有多个第二子限定层130，且位于相邻两个第一子限定层120之间的多个第二子限定层130间隔排列。这样可以使第二子限定层130设置为非连续性的结构。
在具体实施时，在本公开实施例中，如图1所示，阵列基板可以包括多个重复单元PX，多个重复单元PX沿第二方向F2排列为多个重复单元PX组，多个重复单元PX组沿第一方向F1排列；其中，各重复单元PX包括沿第二方向F2依次排列的多个像素开口；其中，同一重复单元PX种的发光层的颜色不同。也就是说，重复单元PX可以包括多个子像素，一个子像素包括一个像素开口。这样可以通过重复单元PX中不同子像素的发光层发光以进行混色，从而实现显示功能。
示例性地，第一方向可以与第二方向垂直。例如，第一方向可以为像素行方向，第二方向可以为像素列方向。或者，第一方向可以为像素列方向，第二方向可以为像素行方向。这些可以根据实际应用的需求进行设计确定，在此不作限定。
示例性地，如图1至图2b所示，发光功能层140可以包括第一颜色发光层141、第二颜色发光层142以及第三颜色发光层143。在一些示例中，第一颜色、第二颜色以及第三颜色可以从红色、绿色以及蓝色中进行选取。例如，第一颜色为红色、第二颜色为绿色、第三颜色为蓝色。当然，本公开实施例包括但不限于此。上述的第一颜色、第二颜色和第三颜色还可为其他颜色。
在具体实施时，在本公开实施例中，如图1至图2b所示，多个像素开口包括第一像素开口KK1、第二像素开口KK2以及第三像素开口KK3；其中， 第一颜色发光层141位于第一像素开口KK1，第二颜色发光层142位于第二像素开口KK2，第三颜色发光层143位于第三像素开口KK3。示例性地，各重复单元PX包括沿第二方向F2依次排列的第一像素开口KK1、第二像素开口KK2以及第三像素开口KK3。也就是说，重复单元PX包括沿第二方向F2依次排列的第一颜色子像素、第二颜色子像素以及第三颜色子像素。
在具体实施时，在本公开实施例中，如图1所示，像素开口的长边的延伸方向F3与第二方向F2之间的夹角β可以大于0度小于90度。示例性地，像素开口的长边的延伸方向F3与第二方向F2之间的夹角β为锐角。
在具体实施时，在本公开实施例中，如图1所示，同一重复单元PX中，各像素开口具有相对的第一短边与第二短边；其中，第一短边和第二短边分别靠近不同颜色发光层。例如，第一像素开口KK1具有相对的第一短边DS1-1与第二短边DS2-1，第一短边DS1-1靠近第三颜色发光层143，第二短边DS2-1靠近第二颜色发光层142。第二像素开口KK2具有相对的第一短边DS1-2与第二短边DS2-2，第一短边DS1-2靠近第一颜色发光层141，第二短边DS2-2靠近第三颜色发光层143。第三像素开口KK3具有相对的第一短边DS1-3与第二短边DS2-3，第一短边DS1-3靠近第二颜色发光层142，第二短边DS2-3靠近第一颜色发光层141。
在具体实施时，在本公开实施例中，如图1所示，针对沿第一方向F1依次排列的两个像素开口，两个像素开口中的第一个像素开口的第一短边、第二个像素开口的第二短边以及两个像素开口之间设置的第二子限定层130在第一方向F1上具有交叠区域。这样可以使沿第一方向F1相邻的像素开口的短边可以通过高度较低的第二子限定层130进行连通，相当于将沿第一方向F1相邻的像素开口的短边进行扩充。从而在采用喷墨打印工艺在像素开口中形成发光层时，可以提高像素开口短边处的流动性，以及使发光材料在像素开口的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
在具体实施时，在本公开实施例中，如图1所示，第一个像素开口的第一短边位于两个像素开口之间设置的第二子限定层130的一端，第二个像素 开口的第二短边位于两个像素开口之间设置的第二子限定层130的另一端。这样可以使沿第一方向F1相邻的像素开口的短边尽可能被扩充。从而在采用喷墨打印工艺在像素开口中形成发光层时，可以进一步提高像素开口短边处的流动性，进一步使发光材料在像素开口的短边处可以扩散均匀，进而进一步提高形成的发光层的均匀性。
示例性地，如图1与图2b所示，针对沿第一方向F1相邻的两个第一像素开口KK1，第一个第一像素开口KK1的第一短边DS1-1、第二个第一像素开口KK1的第二短边DS2-1、以及这两个第一像素开口KK1之间设置的第二子限定层130，在第一方向F1上具有交叠区域。其中，第一个第一像素开口KK1的第一短边DS1-1位于该第二子限定层130的一端，第二个第一像素开口KK1的第二短边DS2-1位于该第二子限定层130的另一端。并且，第一子限定层120与第一像素开口KK1的第一短边DS1-1和第一短边DS2-1毗邻设置。这样可以使沿第一方向F1相邻的第一像素开口KK1的短边可以通过高度较低的第二子限定层130进行连通，在采用喷墨打印工艺在像素开口中形成发光层时，可以提高第一像素开口KK1的短边处的流动性，从而可以使发光材料在第一像素开口KK1的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
示例性地，如图1与图2b所示，针对沿第一方向F1相邻的两个第二像素开口KK2，第一个第二像素开口KK2的第一短边DS1-2、第二个第二像素开口KK2的第二短边DS2-2、以及这两个第二像素开口KK2之间设置的第二子限定层130，在第一方向F1上具有交叠区域。其中，第一个第二像素开口KK2的第一短边DS1-2位于该第二子限定层130的一端，第二个第二像素开口KK2的第二短边DS2-2位于该第二子限定层130的另一端。并且，第一子限定层120与第二像素开口KK2的第一短边DS1-2和第一短边DS2-2毗邻设置。这样可以使沿第一方向F1相邻的第二像素开口KK2的短边可以通过高度较低的第二子限定层130进行连通，在采用喷墨打印工艺在像素开口中形成发光层时，可以提高第二像素开口KK2的短边处的流动性，从而可以使发 光材料在第二像素开口KK2的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
示例性地，如图1与图2b所示，针对沿第一方向F1相邻的两个第三像素开口KK3，第一个第三像素开口KK3的第一短边DS1-3、第二个第三像素开口KK3的第二短边DS2-3、以及这两个第三像素开口KK3之间设置的第二子限定层130，在第一方向F1上具有交叠区域。其中，第一个第三像素开口KK3的第一短边DS1-3位于该第二子限定层130的一端，第二个第三像素开口KK3的第二短边DS2-3位于该第二子限定层130的另一端。并且，第一子限定层120与第三像素开口KK3的第一短边DS1-3和第一短边DS2-3毗邻设置。这样可以使沿第一方向F1相邻的第三像素开口KK3的短边可以通过高度较低的第二子限定层130进行连通，在采用喷墨打印工艺在像素开口中形成发光层时，可以提高第三像素开口KK3的短边处的流动性，从而可以使发光材料在第三像素开口KK3的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
需要说明的是，在本公开实施例中，第二子限定层130在衬底基板100的正投影靠近设置有相同颜色发光层的相邻两个像素开口的短边在衬底基板100的正投影，指的可以是：图1所示的第二子限定层130设置于沿第一方向F1相邻的两个像素开口的长边之间，并且该第二子限定层130同时靠近相邻的这两个像素开口的一个短边。例如，以第一像素开口KK1为例，该第二子限定层130同时靠近第一个第一像素开口KK1的第一短边DS1-1和第二个第一像素开口KK1的第二短边DS1-2。
本公开实施例提供了又一些显示面板，其结构示意图如图3所示，其针对上述实施例的实施方式进行了变形。下面仅说明本实施例与上述实施例的区别之处，其相同之处在此不作赘述。
在具体实施时，在本公开实施例中，如图3与图4所示，像素开口的长边的延伸方向与第一方向F1大致相同；其中，第二子限定层130在衬底基板100的正投影位于设置有相同颜色发光层的相邻两个像素开口的短边在衬底 基板100的正投影之间。进一步地，第二子限定层130在第二方向F2上的宽度与相邻的像素开口的短边在衬底基板100的正投影的宽度大致相同。这样可以使沿第一方向F1相邻的第一像素开口KK1的短边可以通过高度较低的第二子限定层130进行连通，相当于将短边取消，进一步使发光材料可以扩散均匀，进而提高形成的发光层的均匀性。
在具体实施时，在本公开实施例中，如图3所示，第一子限定层120为连续的直线结构，且第一子限定层120在衬底基板100的正投影大致沿第一方向F1延伸。这样使得每一个第一子限定层120设置为直线形的一体结构。
在具体实施时，在本公开实施例中，如图3所示，在第二方向F2上，相邻两个第一子限定层120之间设置有多个第二子限定层130，且位于相邻两个第一子限定层120之间的多个第二子限定层130间隔排列。这样可以使第二子限定层130设置为非连续性的结构。
示例性地，如图3与图4所示，一列中的发光层的颜色相同。针对同一列中相邻的两个第一像素开口KK1，第一个第一像素开口KK1的第一短边DS1-1与第二个第一像素开口KK1的第一短边DS2-1之间设置有第二子限定层130。这样可以使沿第一方向F1相邻的第一像素开口KK1的短边可以通过高度较低的第二子限定层130进行连通，相当于将短边取消。从而在采用喷墨打印工艺在像素开口中形成发光层时，可以提高第一像素开口KK1的短边处的流动性，使发光材料在第一像素开口KK1的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
示例性地，如图3与图4所示，针对同一列中相邻的两个第二像素开口KK2，第一个第二像素开口KK2的第一短边DS1-2与第二个第二像素开口KK2的第一短边DS2-2之间设置有第二子限定层130。这样可以使沿第一方向F1相邻的第二像素开口KK2的短边可以通过高度较低的第二子限定层130进行连通，相当于将短边取消。从而在采用喷墨打印工艺在像素开口中形成发光层时，可以提高第二像素开口KK2的短边处的流动性，使发光材料在第二像素开口KK2的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
示例性地，如图3与图4所示，针对同一列中相邻的两个第三像素开口KK3，第一个第三像素开口KK3的第一短边DS1-3与第二个第三像素开口KK3的第一短边DS2-3之间设置有第二子限定层130。这样可以使沿第一方向F1相邻的第三像素开口KK3的短边可以通过高度较低的第二子限定层130进行连通，相当于将短边取消。从而在采用喷墨打印工艺在像素开口中形成发光层时，可以提高第三像素开口KK3的短边处的流动性，使发光材料在第三像素开口KK3的短边处可以扩散均匀，进而提高形成的发光层的均匀性。
需要说明的是，在本公开实施例中，第二子限定层130在衬底基板100的正投影靠近设置有相同颜色发光层的相邻两个像素开口的短边在衬底基板100的正投影，指的可以是：图3所示的第二子限定层130设置于沿第一方向F1相邻的两个像素开口的短边之间。例如，以第一像素开口KK1为例，该第二子限定层130同时紧邻第一个第一像素开口KK1的第一短边DS1-1和第二个第一像素开口KK1的第二短边DS1-2。
需要说明的是，在实际工艺中，由于工艺条件的限制或其他因素，上述各特征中的相同并不能完全相同，可能会有一些偏差，因此上述各特征之间的相同关系只要大致满足上述条件即可，均属于本公开的保护范围。例如，上述相同可以是在误差允许范围之内所允许的相同。
本公开实施例还提供了上述阵列基板的制备方法，如图5所示，可以包括如下步骤：
S510、在衬底基板上形成第一电极层中的相互间隔设置的多个第一电极的图案；
S520、在形成有第一电极层的衬底基板上形成第二子限定层；其中，第二子限定层130在垂直于衬底基板100所在平面方向上具有第二高度H2；
S530、在形成有第二子限定层的衬底基板上形成第一子限定层；其中，第一子限定层120在垂直于衬底基板100所在平面方向上具有第一高度H1，且第一高度H1大于第二高度H2；第一子限定层120和第二子限定层130相互接触，以限定出多个像素开口，以及一个像素开口在衬底基板100的正投 影位于一个第一电极110在衬底基板100的正投影内；
S540、采用喷墨打印工艺在各像素开口内形成发光功能层；其中，发光功能层140包括多种颜色不同的发光层；其中，发光层位于像素开口内，且沿第一方向F1相邻的至少两个像素开口内的发光层的颜色相同，沿第二方向F2相邻的至少两个像素开口内的发光层的颜色不同；第一方向F1与第二方向F2不同；并且，第二子限定层130位于设置有相同颜色发光层的相邻两个像素开口之间，第一子限定层120位于设置有不同颜色发光层的相邻两个像素开口之间。
S550、在发光功能层背离衬底基板一侧形成第二电极层。
在具体实施时，在本公开实施例中，在步骤S510之前，还包括：在衬底基板100上形成晶体管阵列层。
下面采用具体实施例，结合图6a至图6e所示，对本公开实施例提供的阵列基板的制备方法进行解释说明。
本公开实施例提供的阵列基板的制备方法，可以包括如下步骤：
(1)在衬底基板100上形成晶体管阵列层。例如，晶体管阵列层的制作工序需要构图的膜层依次为：有源层→栅金属层→层间绝缘层→源漏金属层→平坦层。
(2)采用一次构图工艺，在平坦化层背离衬底基板100一侧形成相互间隔设置的多个第一电极110的图案；如图6a所示。
(3)采用一次构图工艺，在形成有第一电极110层的衬底基板100上形成第二子限定层130；如图6b所示。
(4)采用一次构图工艺，在形成有第二子限定层130的衬底基板100上形成第一子限定层120；如图6c所示。其中，第二子限定层130在垂直于衬底基板100所在平面方向上具有第二高度H2，第一子限定层120在垂直于衬底基板100所在平面方向上具有第一高度H1，第一高度H1大于第二高度H2。并且，第一子限定层120和第二子限定层130相互接触，以限定出多个像素开口。
(5)采用喷墨打印工艺，将发光材料喷涂到各个像素开口内，从而形成不同颜色的发光层，进而形成发光功能层140；如图6d所示。
(6)在发光功能层140背离衬底基板100一侧形成第二电极层；如图6e所示。第二电极层可以为覆盖衬底基板100的整面结构。
基于同一发明构思，本公开实施例还提供了显示面板。该显示面板解决问题的原理与前述阵列基板相似，因此该显示面板的实施可以参见前述阵列基板的实施，重复之处在此不再赘述。
基于同一发明构思，本公开实施例还提供了显示装置，包括本公开实施例提供的上述显示面板。该显示装置解决问题的原理与前述显示面板相似，因此该显示装置的实施可以参见前述显示面板的实施，重复之处在此不再赘述。
在具体实施时，在本公开实施例中，显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。
本公开实施例提供的上述阵列基板、制备方法、显示面板及显示装置，通过使像素限定层包括相互接触的第一子限定层和第二子限定层，并且使第一子限定层在垂直于衬底基板所在平面方向上的第一高度大于第二子限定层在垂直于衬底基板所在平面方向上的第二高度。这样在采用喷墨打印工艺在像素开口中形成发光层时，可以通过第一子限定层将不同颜色发光层间隔开。由于第二子限定层的第二高度较低，可以使相同颜色发光层的材料在相邻像素开口之间进行流动，相当于增大了发光材料的扩散范围，从而可以提高发光层的成膜均匀性，进而提高显示装置的显示效果。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (14)

  1. 一种阵列基板，其中，包括：
    衬底基板；
    第一电极层，位于所述衬底基板上，且所述第一电极层包括相互间隔设置的多个第一电极；
    像素限定层，位于所述第一电极层背离所述衬底基板一侧，且所述像素限定层包括：相互接触的第一子限定层和第二子限定层；其中，所述第一子限定层和所述第二子限定层限定出多个像素开口，一个所述像素开口在所述衬底基板的正投影位于一个所述第一电极在所述衬底基板的正投影内；
    发光功能层，位于所述像素限定层背离所述衬底基板一侧，且所述发光功能层包括多种颜色不同的发光层；其中，所述发光层位于所述像素开口内；且沿第一方向相邻的至少两个像素开口内的发光层的颜色相同，沿第二方向相邻的至少两个像素开口内的发光层的颜色不同；所述第一方向与所述第二方向不同；
    所述第一子限定层位于设置有不同颜色发光层的相邻两个像素开口之间，且所述第一子限定层在垂直于所述衬底基板所在平面方向上具有第一高度；
    所述第二子限定层位于设置有相同颜色发光层的相邻两个像素开口之间，所述第二子限定层在垂直于所述衬底基板所在平面方向上具有第二高度；
    所述第一高度大于所述第二高度。
  2. 如权利要求1所述的阵列基板，其中，所述像素开口具有长边和短边，所述第二子限定层在所述衬底基板的正投影靠近设置有相同颜色发光层的相邻两个像素开口的短边在所述衬底基板的正投影。
  3. 如权利要求2所述的阵列基板，其中，所述第一子限定层为连续的折线结构，且所述第一子限定层在所述衬底基板的正投影大致沿所述第一方向弯折延伸；
    在所述第二方向上，相邻两个所述第一子限定层之间设置有多个所述第 二子限定层，且位于相邻两个所述第一子限定层之间的多个所述第二子限定层间隔排列。
  4. 如权利要求2所述的阵列基板，其中，所述第一子限定层为连续的直线结构，且所述第一子限定层在所述衬底基板的正投影大致沿所述第一方向延伸；
    在所述第二方向上，相邻两个所述第一子限定层之间设置有多个所述第二子限定层，且位于相邻两个所述第一子限定层之间的多个所述第二子限定层间隔排列。
  5. 如权利要求2-4任一项所述的阵列基板，其中，所述阵列基板包括多个重复单元，所述多个重复单元沿第二方向排列为多个重复单元组，所述多个重复单元组沿所述第一方向排列；
    各所述重复单元包括沿所述第二方向依次排列的多个像素开口；其中，同一所述重复单元组的发光层的颜色不同。
  6. 如权利要求5所述的阵列基板，其中，所述像素开口的长边的延伸方向与所述第二方向之间的夹角大于0度小于90度。
  7. 如权利要求6所述的阵列基板，其中，同一所述重复单元中，各所述像素开口具有相对的第一短边与第二短边；针对沿所述第一方向依次排列的两个所述像素开口，所述两个所述像素开口中的第一个像素开口的第一短边、第二个像素开口的第二短边以及所述两个像素开口之间设置的所述第二子限定层在所述第一方向上具有交叠区域。
  8. 如权利要求6所述的阵列基板，其中，所述第一个像素开口的第一短边位于所述两个像素开口之间设置的所述第二子限定层的一端，所述第二个像素开口的第二短边位于所述两个像素开口之间设置的所述第二子限定层的另一端。
  9. 如权利要求5所述的阵列基板，其中，所述像素开口的长边的延伸方向与所述第一方向大致相同；
    所述第二子限定层在所述衬底基板的正投影位于设置有相同颜色发光层 的相邻两个像素开口的短边在所述衬底基板的正投影之间。
  10. 如权利要求9所述的阵列基板，其中，所述第二子限定层在所述第二方向上的宽度与相邻的所述像素开口的短边在所述衬底基板的正投影的宽度大致相同。
  11. 如权利要求5所述的阵列基板，其中，所述发光功能层包括第一颜色发光层、第二颜色发光层以及第三颜色发光层；
    所述多个像素开口包括第一像素开口、第二像素开口以及第三像素开口；其中，所述第一颜色发光层位于所述第一像素开口，所述第二颜色发光层位于所述第二像素开口，所述第三颜色发光层位于所述第三像素开口；
    各所述重复单元包括沿所述第二方向依次排列的第一像素开口、第二像素开口以及第三像素开口。
  12. 一种如权利要求1-11任一项所述的阵列基板的制备方法，其中，包括：
    在衬底基板上形成第一电极层中的相互间隔设置的多个第一电极的图案；
    在形成有所述第一电极层的衬底基板上形成所述第二子限定层；其中，所述第二子限定层在垂直于所述衬底基板所在平面方向上具有第二高度；
    在形成有所述第二子限定层的衬底基板上形成所述第一子限定层；其中，所述第一子限定层在垂直于所述衬底基板所在平面方向上具有第一高度，且所述第一高度大于所述第二高度；所述第一子限定层和所述第二子限定层相互接触，以限定出多个像素开口，以及一个所述像素开口在所述衬底基板的正投影位于一个所述第一电极在所述衬底基板的正投影内；
    采用喷墨打印工艺在各所述像素开口内形成发光功能层；其中，所述发光功能层包括多种颜色不同的发光层；其中，所述发光层位于所述像素开口内，且沿第一方向相邻的至少两个像素开口内的发光层的颜色相同，沿第二方向相邻的至少两个像素开口内的发光层的颜色不同；所述第一方向与所述第二方向不同；
    其中，所述第二子限定层位于设置有相同颜色发光层的相邻两个像素开 口之间，所述第一子限定层位于设置有不同颜色发光层的相邻两个像素开口之间。
  13. 一种显示面板，其中，包括如权利要求1-11任一项所述的阵列基板。
  14. 一种显示装置，其中，包括如权利要求13所述的显示面板。
PCT/CN2021/086117 2020-05-29 2021-04-09 阵列基板、制备方法、显示面板及显示装置 WO2021238431A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US17/597,758 US20220262879A1 (en) 2020-05-29 2021-04-09 Array substrate, preparation method, display panel, and display device
JP2022530200A JP2023528107A (ja) 2020-05-29 2021-04-09 アレイ基板、製造方法、ディスプレイパネルおよびディスプレイデバイス
EP21814086.1A EP4033539A4 (en) 2020-05-29 2021-04-09 ARRAY SUBSTRATE, METHOD OF MANUFACTURE, DISPLAY PANEL AND DISPLAY DEVICE
KR1020227017519A KR20230035212A (ko) 2020-05-29 2021-04-09 어레이 기판, 제조 방법, 디스플레이 패널 및 디스플레이 장치

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010471555.X 2020-05-29
CN202010471555.XA CN111584605B (zh) 2020-05-29 2020-05-29 阵列基板、制备方法、显示面板及显示装置

Publications (1)

Publication Number Publication Date
WO2021238431A1 true WO2021238431A1 (zh) 2021-12-02

Family

ID=72123651

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/086117 WO2021238431A1 (zh) 2020-05-29 2021-04-09 阵列基板、制备方法、显示面板及显示装置

Country Status (6)

Country Link
US (1) US20220262879A1 (zh)
EP (1) EP4033539A4 (zh)
JP (1) JP2023528107A (zh)
KR (1) KR20230035212A (zh)
CN (1) CN111584605B (zh)
WO (1) WO2021238431A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114447094A (zh) * 2022-04-11 2022-05-06 北京京东方技术开发有限公司 显示基板以及显示装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111584605B (zh) * 2020-05-29 2023-04-07 京东方科技集团股份有限公司 阵列基板、制备方法、显示面板及显示装置
CN115996612A (zh) * 2020-09-01 2023-04-21 京东方科技集团股份有限公司 显示面板以及显示装置
CN112234085B (zh) * 2020-10-15 2022-07-08 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板、显示装置
CN116828916A (zh) * 2022-03-21 2023-09-29 京东方科技集团股份有限公司 显示基板及其制备方法、显示装置
CN117795692A (zh) * 2022-07-29 2024-03-29 京东方科技集团股份有限公司 显示面板及显示装置

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070200488A1 (en) * 2006-02-27 2007-08-30 Naoyuki Ito Display device
CN101689559A (zh) * 2008-06-06 2010-03-31 松下电器产业株式会社 有机电致发光显示屏及其制造方法
CN103779380A (zh) * 2012-10-22 2014-05-07 三星显示有限公司 有机发光装置及其制造方法
KR20150075135A (ko) * 2013-12-24 2015-07-03 엘지디스플레이 주식회사 유기전계발광 표시장치 및 그 제조 방법
CN107665904A (zh) * 2016-07-29 2018-02-06 乐金显示有限公司 电致发光显示装置
CN109801939A (zh) * 2017-11-17 2019-05-24 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置
CN109830507A (zh) * 2019-01-09 2019-05-31 昆山国显光电有限公司 Oled显示基板及制备方法、显示面板及显示装置
CN111584605A (zh) * 2020-05-29 2020-08-25 京东方科技集团股份有限公司 阵列基板、制备方法、显示面板及显示装置
CN111599849A (zh) * 2020-05-29 2020-08-28 京东方科技集团股份有限公司 阵列基板、显示面板及显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7923919B2 (en) * 2004-10-28 2011-04-12 Sharp Kabushiki Kaisha Organic electroluminescent panel and production method thereof, and color filter substrate and production method thereof
CN107731871B (zh) * 2017-09-29 2020-05-08 上海天马微电子有限公司 显示面板及其制作方法和显示装置
CN108922469B (zh) * 2018-06-29 2021-04-02 武汉天马微电子有限公司 一种显示面板及显示装置
CN111312791B (zh) * 2020-03-02 2022-12-09 京东方科技集团股份有限公司 显示面板、其制作方法及显示装置

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070200488A1 (en) * 2006-02-27 2007-08-30 Naoyuki Ito Display device
CN101689559A (zh) * 2008-06-06 2010-03-31 松下电器产业株式会社 有机电致发光显示屏及其制造方法
CN103779380A (zh) * 2012-10-22 2014-05-07 三星显示有限公司 有机发光装置及其制造方法
KR20150075135A (ko) * 2013-12-24 2015-07-03 엘지디스플레이 주식회사 유기전계발광 표시장치 및 그 제조 방법
CN107665904A (zh) * 2016-07-29 2018-02-06 乐金显示有限公司 电致发光显示装置
CN109801939A (zh) * 2017-11-17 2019-05-24 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置
CN109830507A (zh) * 2019-01-09 2019-05-31 昆山国显光电有限公司 Oled显示基板及制备方法、显示面板及显示装置
CN111584605A (zh) * 2020-05-29 2020-08-25 京东方科技集团股份有限公司 阵列基板、制备方法、显示面板及显示装置
CN111599849A (zh) * 2020-05-29 2020-08-28 京东方科技集团股份有限公司 阵列基板、显示面板及显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4033539A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114447094A (zh) * 2022-04-11 2022-05-06 北京京东方技术开发有限公司 显示基板以及显示装置
CN114447094B (zh) * 2022-04-11 2022-09-02 北京京东方技术开发有限公司 显示基板以及显示装置

Also Published As

Publication number Publication date
EP4033539A4 (en) 2023-05-10
CN111584605A (zh) 2020-08-25
JP2023528107A (ja) 2023-07-04
US20220262879A1 (en) 2022-08-18
CN111584605B (zh) 2023-04-07
EP4033539A1 (en) 2022-07-27
KR20230035212A (ko) 2023-03-13

Similar Documents

Publication Publication Date Title
WO2021238431A1 (zh) 阵列基板、制备方法、显示面板及显示装置
JP3628997B2 (ja) 有機エレクトロルミネッセンス装置の製造方法
US8115216B2 (en) Optoelectronic display and method of manufacturing the same
CN109585490B (zh) 像素界定层、喷墨打印方法、显示基板及其制造方法、显示装置
TW201431050A (zh) 高解析度有機發光二極體裝置、顯示器及相關方法
CN206584932U (zh) 有机发光二极管显示装置
CN104465671A (zh) 一种显示基板及其制作方法、显示装置
JP5282564B2 (ja) 有機エレクトロルミネッセンス装置
JP2001313172A (ja) 有機エレクトロルミネッセンス白色光源、及びその製造方法
WO2021233070A1 (zh) 显示基板及其制作方法、显示面板及显示装置
JP4042409B2 (ja) 有機エレクトロルミネッセンス装置
WO2021249158A1 (zh) 显示基板、其制作方法及显示装置
JP2017120786A (ja) 有機発光ダイオード表示装置
WO2021227153A1 (zh) 显示面板
WO2019196798A1 (zh) 像素界定层、像素结构、显示面板及显示装置
WO2024022056A1 (zh) 显示面板及制作方法、显示装置
CN207966997U (zh) 像素界定层、显示面板和显示装置
JP4042763B2 (ja) 有機エレクトロルミネッセンス装置及び電子機器
JP4042691B2 (ja) 有機エレクトロルミネッセンス装置の製造方法
CN211654826U (zh) 一种显示基板、显示面板及显示装置
JP4241669B2 (ja) 有機エレクトロルミネッセンス装置
US11937461B2 (en) Array substrate, method of manufacturing the same, display panel and display device
WO2024000290A1 (zh) 一种阵列基板及其制作方法、显示装置
US11398529B2 (en) Display panel and manufacturing method thereof
JP2004087509A (ja) 有機エレクトロルミネッセンス装置及び電子機器

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21814086

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2021814086

Country of ref document: EP

Effective date: 20220422

ENP Entry into the national phase

Ref document number: 2022530200

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE