WO2021233070A1 - 显示基板及其制作方法、显示面板及显示装置 - Google Patents

显示基板及其制作方法、显示面板及显示装置 Download PDF

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Publication number
WO2021233070A1
WO2021233070A1 PCT/CN2021/089327 CN2021089327W WO2021233070A1 WO 2021233070 A1 WO2021233070 A1 WO 2021233070A1 CN 2021089327 W CN2021089327 W CN 2021089327W WO 2021233070 A1 WO2021233070 A1 WO 2021233070A1
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Prior art keywords
pixel
pixel defining
curved surface
layer
defining layer
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PCT/CN2021/089327
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English (en)
French (fr)
Inventor
尤娟娟
崔颖
张月
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京东方科技集团股份有限公司
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Priority to US17/629,026 priority Critical patent/US20220320205A1/en
Publication of WO2021233070A1 publication Critical patent/WO2021233070A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, a display panel and a display device.
  • electroluminescent diodes Compared with Liquid Crystal Display (LCD), electroluminescent diodes (Organic Light-Emitting Diode, OLED) have the advantages of self-luminescence, fast response, wide viewing angle, high brightness, bright colors, light and thin, etc., and are considered to be the next generation display.
  • OLED thin film deposition methods mainly include vacuum evaporation and solution process.
  • the inkjet printing process in the solution process is considered to be an important way for large-size OLEDs to achieve mass production due to its high utilization rate and large size.
  • the present disclosure provides a display substrate and a manufacturing method thereof, a display panel and a display device.
  • the present disclosure discloses a display substrate including: a base substrate, a first electrode layer formed on the base substrate, and a first pixel defining layer and a second pixel defining layer formed on the first electrode layer Floor;
  • the first pixel defining layer divides the base substrate into a plurality of pixel regions, each of the pixel regions includes a plurality of sub-pixel regions distributed along a first direction, and two adjacent sub-pixel regions pass through all the sub-pixel regions.
  • the second pixel defines the layer separation;
  • the surface of each pixel area in contact with the first pixel defining layer includes a plurality of first curved surfaces and a plurality of second curved surfaces, and the plurality of first curved surfaces are connected to each other, so The plurality of second curved surfaces are connected to each other, and both the first curved surface and the second curved surface are arranged protrudingly away from the pixel area to which they belong.
  • the second pixel defining layer includes a first pixel defining structure and a second pixel defining structure arranged in each of the pixel regions;
  • the first pixel defining structure is disposed between the first curved surface and the second curved surface, and is located at the largest distance between the first curved surface and the second curved surface in the second direction, and the second The direction is perpendicular to the first direction;
  • One end of the second pixel defining structure is located at the connecting position of two adjacent first curved surfaces, the other end of the second pixel defining structure is located at the connecting position of two adjacent second curved surfaces, and The line connecting the two ends of the second pixel defining structure is located in the second direction.
  • any two adjacent first curved surfaces are directly connected, and any two adjacent second curved surfaces are directly connected;
  • Two ends of the second pixel defining structure are in contact with the first curved surface and the second curved surface respectively, and are located at the smallest distance between the first curved surface and the second curved surface in the second direction.
  • any two adjacent first curved surfaces are connected by a first connecting portion, and any two adjacent second curved surfaces are connected by a second connecting portion; the second pixel defining structure The two ends of are respectively in contact with the first connecting portion and the second connecting portion;
  • the orthographic projection of the first connecting portion and the second connecting portion on the base substrate is a straight line segment distributed along the first direction.
  • the width of the second pixel defining structure is greater than or equal to the widths of the first connecting portion and the second connecting portion.
  • the thickness of the second pixel defining layer is smaller than the thickness of the first pixel defining layer.
  • the thickness of the first pixel defining layer is 1.5 ⁇ m to 3 ⁇ m, and the thickness of the second pixel defining layer is less than or equal to 1 ⁇ m.
  • the number of the first curved surface and the second curved surface in contact with the first pixel defining layer in each of the pixel regions is greater than or equal to two.
  • the first curved surface and the second curved surface are arranged opposite to each other, and the orthographic projection of the first curved surface and the second curved surface on the base substrate is a circular arc shape.
  • the number of the first curved surface and the second curved surface are equal, and the curvature corresponding to the orthographic projection of the first curved surface and the second curved surface on the base substrate The radii are equal.
  • the present disclosure also discloses a display panel including the above-mentioned display substrate.
  • the display panel further includes an organic functional layer formed in each sub-pixel area, a cathode covering the organic functional layer, the first pixel defining layer and the second pixel defining layer, and an encapsulation layer.
  • the present disclosure also discloses a display device including the above-mentioned display panel.
  • the present disclosure also discloses a manufacturing method of the display substrate, including:
  • the first pixel defining layer divides the base substrate into a plurality of pixel regions, each of the pixel regions includes a plurality of sub-pixel regions distributed along a first direction, and two adjacent sub-pixel regions are adjacent to each other.
  • the surface of each pixel area in contact with the first pixel defining layer includes a plurality of first curved surfaces and a plurality of second curved surfaces, so The plurality of first curved surfaces are connected to each other, the plurality of second curved surfaces are connected to each other, and both the first curved surface and the second curved surface are arranged protrudingly away from the pixel area to which they belong.
  • the first pixel defining layer and the second pixel defining layer are formed at one time using a halftone mask process.
  • the first pixel defining layer and the second pixel defining layer are arranged in the same layer.
  • FIG. 1 shows a schematic structural diagram of a first display substrate according to an embodiment of the present disclosure
  • Fig. 2 shows a schematic structural diagram of a second display substrate according to an embodiment of the present disclosure
  • FIG. 3 shows a schematic structural diagram of a third display substrate according to an embodiment of the present disclosure
  • Fig. 4 shows a partial cross-sectional view of the display substrate shown in Fig. 1 along section A-A';
  • Fig. 5 shows a partial cross-sectional view of the display substrate shown in Fig. 1 along section B-B';
  • Fig. 6 shows a partial cross-sectional view of the display substrate shown in Fig. 1 along the section C-C';
  • FIG. 7 shows a structural comparison diagram of a sub-pixel area of an embodiment of the present disclosure and a sub-pixel area of the related art.
  • FIG. 8 shows a flowchart of a manufacturing method of a display substrate according to an embodiment of the present disclosure.
  • FIG. 1 there is shown a schematic structural diagram of a first display substrate of an embodiment of the present disclosure
  • FIG. 2 shows a schematic structural diagram of a second display substrate of an embodiment of the present disclosure
  • FIG. 4 shows a partial cross-sectional view of the display substrate shown in FIG. 1 along the section AA'
  • FIG. 5 shows the display substrate shown in FIG. Partial cross-sectional view
  • FIG. 6 shows a partial cross-sectional view of the display substrate shown in FIG. 1 along the section CC′.
  • the embodiment of the present disclosure provides a display substrate, including a base substrate 101, a first electrode layer 102 formed on the base substrate 101, and a first pixel defining layer 103 and a second pixel defining layer 103 formed on the first electrode layer 102.
  • Pixel defining layer 104 the first pixel defining layer 103 divides the base substrate 101 into a plurality of pixel regions 105, each pixel region 105 includes a plurality of sub-pixel regions 1050 distributed along a first direction, and two adjacent sub-pixel regions 1050 It is separated by the second pixel defining layer 104; in the first direction, the surface of each pixel area 105 in contact with the first pixel defining layer 103 includes a plurality of first curved surfaces 1061 and a plurality of second curved surfaces 1062.
  • the curved surfaces 1061 are connected to each other, a plurality of second curved surfaces 1062 are connected to each other, and both the first curved surface 1061 and the second curved surface 1062 are arranged protruding away from the pixel area 105 to which they belong.
  • the base substrate 101 actually includes a first substrate, a driving transistor formed on the first substrate, and a flat layer covering the driving transistor.
  • the first substrate may be a glass substrate, a quartz substrate, a metal substrate, a resin substrate, etc.;
  • the driving transistor includes a gate electrode formed on the first substrate, a gate insulating layer covering the gate electrode and the first substrate, and a gate insulating layer formed on the gate insulating layer.
  • Active layer, partly covering the gate insulating layer and the source and drain electrode layers of the active layer, and the passivation layer covering the source and drain electrode layers, the active layer and the gate insulating layer, the source and drain electrode layers include source and drain; flat The layer actually covers the passivation layer in the drive transistor.
  • the drive transistor of the embodiment of the present disclosure may not be limited to the above-mentioned structure, and other structures can also be applied to this solution, such as a double-gate structure drive transistor or a top-gate structure drive transistor; in addition, the material of the flat layer It can be a resin material.
  • the first electrode layer 102 is formed on the base substrate 101.
  • the cross-sectional views shown in FIGS. 4 to 6 show the first electrode layer 102 as a whole.
  • the first electrode layer 102 in the embodiment of the present disclosure actually includes a plurality of first electrodes insulated from each other and distributed in an array. The drain of the driving transistor is connected, and the first electrode is actually the anode of a sub-pixel for driving the corresponding sub-pixel to emit light.
  • the material of the first electrode layer 102 is a transparent conductive material, such as indium tin oxide (Indium Tin Oxide, ITO), etc., and the shape of the plurality of first electrodes included in the first electrode layer 102 and the sub-pixel regions formed subsequently The shape is consistent.
  • ITO Indium Tin Oxide
  • the first pixel defining layer 103 divides the base substrate 101 into a plurality of pixel regions 105.
  • Each pixel region 105 includes a plurality of sub-pixel regions 1050 distributed along a first direction. In the first direction, each pixel region 105 is connected to
  • the contact surface of the first pixel defining layer 103 is configured as a plurality of first curved surfaces 1061 and a plurality of second curved surfaces 1062.
  • the first curved surfaces 1061 are connected to each other, the second curved surfaces 1062 are connected to each other, and the first curved surfaces 1061 and 1062 are connected to each other.
  • the second curved surfaces 1062 all protrude away from the pixel area 105 to which they belong, so that on a plane parallel to the base substrate 101, the width of the sub-pixel area 105 in the second direction perpendicular to the first direction increases.
  • the corresponding first curved surface 1061 and the second curved surface 1062 are arranged protruding away from the pixel area 105, and the pixel area 105 corresponds to the first curved surface 1061 and the second curved surface 1062, It is arranged protrudingly toward the pixel area 105 adjacent to the pixel area 105 in the second direction.
  • the corresponding first curved surface 1061 and the second curved surface 1062 are arranged protruding away from the pixel area 105 in the first row and second column, and the first The first curved surface 1061 corresponding to the pixel area 105 in the second row and the second column protrudes toward the pixel area 105 in the first row and the first column, and the second curved surface 1062 corresponding to the pixel area 105 in the first row and the second column is facing The pixel area 105 in the first row and the third column is protrudingly arranged.
  • the display substrate can be divided into multiple isolated sub-pixel areas by a pixel defining layer.
  • one nozzle corresponds to inkjet printing in one sub-pixel area; related display substrates It is also possible to divide the display substrate into a plurality of linearly distributed pixel regions by the first pixel defining layer, and then divide the pixel region into a plurality of sub-pixel regions by the second pixel defining layer in the pixel region (i.e., line bank structure)
  • one nozzle corresponds to one pixel area, and multiple sub-pixel areas in the pixel area are simultaneously inkjet printed.
  • the corresponding sub-pixel area 20 has a rectangular shape as shown in FIG.
  • the width of the region 1050 in the second direction is d1.
  • the width of each sub-pixel region 1050 in the embodiment of the present disclosure increases in the second direction. , That is, the width d1 is greater than the width d2.
  • each pixel region 105 includes a plurality of sub-pixel regions 1050 distributed along the first direction, and then in the pixel region 105 subsequently
  • the organic functional material flows into each sub-pixel area 1050 along the first direction, and the organic functional material will be evenly distributed in each sub-pixel area 1050 along the first direction.
  • the organic functional material dries, there is only the first direction.
  • the organic functional material at the middle position is uniformly formed into a film. Therefore, in the embodiment of the present disclosure, the composition in each sub-pixel region 1050 distributed linearly along the first direction Film uniformity is also improved.
  • the first direction is the column direction of the base substrate 101
  • the second direction is the row direction of the base substrate 101; of course, the first direction can also be the row direction of the base substrate 101, Then the second direction is the column direction of the base substrate 101.
  • the first curved surface 1061 and the second curved surface 1062 are arranged oppositely, and the orthographic projection of the first curved surface 1061 and the second curved surface 1062 on the base substrate 101 is an arc shape.
  • the corresponding first curved surface The numbers of the second curved surfaces 1061 and 1062 are equal, and the radii of curvature corresponding to the orthographic projections of the first curved surfaces 1061 and the second curved surfaces 1062 on the base substrate 101 are the same.
  • the number of the first curved surface 1061 and the second curved surface 1062 in contact with the first pixel defining layer 103 in each pixel area 105 is greater than or equal to two.
  • the number of the first curved surface 1061 and the second curved surface 1062 in contact with the first pixel defining layer 103 for each pixel area 105 is three.
  • each pixel area 105 is connected to the first curved surface 1062.
  • the number of the first curved surface 1061 and the second curved surface 1062 in contact with the pixel defining layer 103 may also be 2, 4, 5, and so on.
  • the second pixel defining layer 104 includes a first pixel defining structure 1041 and a second pixel defining structure 1042 disposed in each pixel area 105;
  • the structure 1041 is arranged between the first curved surface 1061 and the second curved surface 1062, and is located at the maximum distance between the first curved surface 1061 and the second curved surface 1062 in the second direction, where the second direction is perpendicular to the first direction;
  • One end of the pixel defining structure 1042 is located at the connecting position of two adjacent first curved surfaces 1061, the other end of the second pixel defining structure 1042 is located at the connecting position of two adjacent second curved surfaces 1062, and two of the second pixel defining structure 1042 The connection of the end is located in the second direction.
  • Each pixel area 105 is divided into a plurality of sub-pixel areas 1050 by the first pixel defining structure 1041 and the second pixel defining structure 1042, so that in the same area, compared to only providing the first pixel defining structure 1041 or the pixel area 105 in the same area
  • the display substrate of the second pixel defining structure 1042, the display substrate of the embodiment of the present disclosure has a higher PPI (Pixels Per Inch, the number of pixels per inch).
  • first pixel defining structure 1041 is arranged at the maximum distance between the first curved surface 1061 and the second curved surface 1062 in the second direction
  • second pixel defining structure 1042 is arranged at the connection position of the first curved surface 1061 and the first curved surface 1062.
  • the connecting position of the two curved surfaces 1062 (that is, the smallest distance between the first curved surfaces 1061 and the second curved surfaces 1062 in the second direction), so that when the nozzle of the inkjet printing device is used, the pixel area 105 follows the first direction
  • the distance between the inkjet printing position and each edge position of the sub-pixel area 1050 is substantially the same, which further improves the uniformity of film formation in each sub-pixel area 1050.
  • the second pixel defining structure 1042 is arranged at the connecting position of the two first curved surfaces 1061 and the connecting position of the two second curved surfaces 1062, so that the width of the connecting portion of the sub-pixel area 1050 is narrowed, and the organic function can be adjusted.
  • the flow rate of the material between each sub-pixel area 1050 so as to further improve the uniformity of film formation in each sub-pixel area 1050; for the related line bank structure, when printing organic functional materials, the organic functional material is in each sub-pixel area When there are particles in the sub-pixel area, the organic functional material tends to accumulate around the particles, resulting in uneven film formation.
  • connection part of the sub-pixel area 1050 The width is narrowed, and the flow speed of the organic functional material between the sub-pixel regions 1050 can be adjusted, which can also improve the aggregation problem of the organic functional material caused by particles, and further improve the uniformity of film formation.
  • any two adjacent first curved surfaces 1061 are directly connected, and any two adjacent second curved surfaces 1062 are directly connected; the second pixel defining structure 1042 is respectively connected to the first curved surfaces 1061 and the first curved surfaces 1061 and 1062.
  • the two curved surfaces 1062 are in contact and are located at the smallest distance between the first curved surface 1061 and the second curved surface 1062 in the second direction.
  • the orthographic projection of the second pixel defining structure 1042 on the base substrate 101 includes mutual The first straight line segment and the second straight line segment arranged in parallel, and the first connecting line and the second connecting line arranged between the first straight line segment and the second straight line segment and connected to the first straight line segment and the second straight line segment respectively , Both the first connection line and the second connection line include two arc line segments connected to each other, and the first connection line and the second connection line are recessed in a direction toward the pixel area 105 to which they belong.
  • any two adjacent first curved surfaces 1061 are connected by a first connecting portion 1063, and any two adjacent second curved surfaces 1062 are connected by a second connecting portion 1064;
  • the two-pixel defining structure 1042 is in contact with the first connecting portion 1063 and the second connecting portion 1064 respectively;
  • the orthographic projection of the first connecting portion 1063 and the second connecting portion 1064 on the base substrate 101 is a straight line segment distributed along the first direction .
  • any pixel area 105 when any two adjacent first curved surfaces 1061 are connected by the first connecting portion 1063, and any two adjacent second curved surfaces 1062 are connected by the second connecting portion 1064, the second pixel defining structure 1042 is
  • the orthographic projection on the base substrate 101 is rectangular.
  • the aperture ratio of the sub-pixel area 1050 of the display substrate shown in FIG. 1 is greater than the aperture ratio of the sub-pixel area 1050 of the display substrate shown in FIGS. 2 and 3.
  • the width of the second pixel defining structure 1042 is greater than or equal to the widths of the first connecting portion 1063 and the second connecting portion 1064. As shown in FIG. 2, the width of the second pixel defining structure 1042 is equal to the widths of the first connecting portion 1063 and the second connecting portion 1064. As shown in FIG. 3, the width of the second pixel defining structure 1042 is larger than that of the first connecting portion 1063 and The width of the second connecting portion 1064.
  • the thickness h1 of the second pixel defining layer 104 is smaller than the thickness h2 of the first pixel defining layer 103.
  • the thickness h2 of the first pixel defining layer 103 is 1.5 ⁇ m to 3 ⁇ m, and the thickness h1 of the second pixel defining layer 104 is less than or equal to 1 ⁇ m.
  • the thickness h1 of the second pixel defining layer 104 By controlling the thickness h1 of the second pixel defining layer 104 to be smaller than the thickness h2 of the first pixel defining layer 103, when the organic functional material is printed in the pixel area 105 defined by the first pixel defining layer 103, the organic functional material can be removed from the second pixel.
  • the boundary layer 104 flows over, thereby flowing into each sub-pixel area 1050, and it is ensured that the organic functional material does not flow up from the first pixel boundary layer 103 to other adjacent pixel areas.
  • the organic functional material includes a luminescent material.
  • a luminescent material For each pixel area 105 distributed along the first direction, it can print the same color of luminescent material, and each pixel area 105 distributed along the second direction can print The color of the luminescent material is different.
  • the first column of pixel area 105 in Figures 1 to 3 it can print red luminescent material
  • the second column of pixel area 105 in Figures 1 to 3 it can print The green luminescent material
  • the third column of pixel area 105 in FIGS. 1 to 3 can print blue luminescent material.
  • the color of the luminescent material printed in each sub-pixel area 1050 in each pixel area 105 is the same color.
  • the surface of the pixel area in contact with the first pixel defining layer is set into a plurality of first curved surfaces and a plurality of second curved surfaces, and the first curved surfaces and the second curved surfaces are both facing away from the pixel to which they belong.
  • the area is protrudingly arranged, so that on a plane parallel to the base substrate, the width of the sub-pixel area along the second direction perpendicular to the first direction increases.
  • An embodiment of the present disclosure also provides a display panel, which includes the above-mentioned display substrate.
  • the display panel further includes an organic functional layer formed in each sub-pixel area 1050, a cathode covering the organic functional layer, the first pixel defining layer 103 and the second pixel defining layer 104, and an encapsulation layer.
  • the organic functional layer only includes the light-emitting layer.
  • the light-emitting material is printed in each pixel area 105, and the light-emitting material flows into each sub-pixel area 1050. After drying and baking, To form a light-emitting layer.
  • the organic functional layer includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer.
  • the voids are sequentially printed in each pixel area 105.
  • Hole injection materials, hole transport materials, luminescent materials, electron transport materials, and electron injection materials are dried and baked to sequentially form a hole injection layer and a hole in each sub-pixel area 1050 in the pixel area 105.
  • Hole transport layer, light emitting layer, electron transport layer and electron injection layer are used to sequentially form a hole injection layer and a hole in each sub-pixel area 1050 in the pixel area 105.
  • a second electrode layer is formed.
  • the second electrode is a cathode, and finally , Encapsulating the display substrate with the cathode formed thereon to obtain a display panel.
  • the embodiment of the present disclosure also provides a display device including the above-mentioned display panel.
  • the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a navigator, and so on.
  • the surface of the pixel area in contact with the first pixel defining layer is set into a plurality of first curved surfaces and a plurality of second curved surfaces, and the first curved surfaces and the second curved surfaces are both facing away from the pixel to which they belong.
  • the area is protrudingly arranged, so that on a plane parallel to the base substrate, the width of the sub-pixel area along the second direction perpendicular to the first direction increases.
  • FIG. 8 a flow chart of a manufacturing method of a display substrate according to an embodiment of the present disclosure is shown, which may specifically include the following steps:
  • step 801 a base substrate is provided.
  • the base substrate 101 is first produced. Specifically, a first substrate is provided first, a gate electrode is formed on the first substrate by a patterning process, then a gate insulating layer covering the gate electrode and the first substrate is formed, an active layer is formed on the gate insulating layer through a patterning process, and then , A patterning process is used to form a source and drain electrode layer that partially covers the gate insulating layer and the active layer.
  • the source and drain electrode layer includes a source and a drain.
  • a passivation covering the source and drain electrode layer, the active layer and the gate insulating layer is formed.
  • a flat layer is formed on the passivation layer to obtain the base substrate 101.
  • Step 802 forming a first electrode layer on the base substrate.
  • the first electrode layer 102 is formed on the base substrate 101 by using a patterning process. Specifically, a first electrode film is deposited on the base substrate 101, photoresist is coated on the first electrode film, and the photoresist on the first electrode film is exposed and developed using a mask, and then etched The first electrode film that is not covered with photoresist is removed, and finally, the remaining photoresist on the first electrode film is removed to obtain the first electrode layer 102.
  • Step 803 forming a first pixel defining layer and a second pixel defining layer on the first electrode layer.
  • the first pixel defining layer 103 and the second pixel defining layer 104 are formed on the first electrode layer 102 by a patterning process, and the first pixel defining layer
  • the material of the layer 103 and the second pixel defining layer 104 may be polyimide.
  • the first pixel defining layer 103 and the second pixel defining layer 104 can be obtained at the same time, namely The first pixel defining layer 103 and the second pixel defining layer 104 are formed at one time using a halftone mask process.
  • the areas corresponding to the first pixel defining layer 103 and the second pixel defining layer 104 have different light transmittances. Therefore, the first pixel defining layer 103 and the second pixel defining layer 103 and the second pixel defining layer with different heights can be obtained. Pixel defining layer 104.
  • the first pixel defining layer 103 divides the base substrate 101 into a plurality of pixel regions 105, each pixel region 105 includes a plurality of sub-pixel regions 1050 distributed along a first direction, and two adjacent sub-pixel regions 1050 pass through the second
  • the pixel defining layer 104 is separated; in the first direction, the surface of each pixel area 105 in contact with the first pixel defining layer 103 includes a plurality of first curved surfaces 1061 and a plurality of second curved surfaces 1062, and the plurality of first curved surfaces 1061 are mutually Connected, a plurality of second curved surfaces 1062 are connected to each other, and both the first curved surface 1061 and the second curved surface 1062 are arranged protruding away from the pixel area 105 to which they belong.
  • the surface of the pixel area in contact with the first pixel defining layer is set into a plurality of first curved surfaces and a plurality of second curved surfaces, and the first curved surfaces and the second curved surfaces are both facing away from the pixel to which they belong.
  • the area is protrudingly arranged, so that on a plane parallel to the base substrate, the width of the sub-pixel area along the second direction perpendicular to the first direction increases.

Abstract

显示基板及其制作方法、显示面板及显示装置，涉及显示技术领域。该显示基板包括：衬底基板(101)、形成在衬底基板(101)上的第一电极层(102)，以及形成在第一电极层(102)上的第一像素界定层(103)和第二像素界定层(104)；第一像素界定层(103)将衬底基板(101)划分为多个像素区域(105)，每个像素区域(105)包括沿第一方向分布的多个子像素区域(1050)，且相邻两个子像素区域(1050)通过第二像素界定层(104)分隔；在第一方向上，每个像素区域(105)与第一像素界定层(103)相接触的表面包括多个第一曲面(1061)和多个第二曲面(1062)，且第一曲面(1061)和第二曲面(1062)均背向所属的像素区域(105)凸出设置。

Description

显示基板及其制作方法、显示面板及显示装置
相关申请的交叉引用
本公开要求在2020年05月22日提交中国专利局、申请号为202010441530.5、名称为“一种显示基板及其制作方法、显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及显示技术领域，特别是涉及一种显示基板及其制作方法、显示面板及显示装置。
背景技术
电致发光二极管(Organic Light-Emitting Diode，OLED)相对于液晶显示器(Liquid Crystal Display，LCD)具有自发光、反应快、视角广、亮度高、色彩艳、轻薄等优点，被认为是下一代显示技术。OLED的薄膜沉积方法主要有真空蒸镀和溶液制程两种，溶液制程中的喷墨打印工艺由于其利用率高、可实现大尺寸化，被认为是大尺寸OLED实现量产的重要方式。
概述
本公开提供一种显示基板及其制作方法、显示面板及显示装置。
本公开公开了一种显示基板，包括：衬底基板、形成在所述衬底基板上的第一电极层，以及形成在所述第一电极层上的第一像素界定层和第二像素界定层；
所述第一像素界定层将所述衬底基板划分为多个像素区域，每个所述像素区域包括沿第一方向分布的多个子像素区域，且相邻两个所述子像素区域通过所述第二像素界定层分隔；
在所述第一方向上，每个所述像素区域与所述第一像素界定层相接触的表面包括多个第一曲面和多个第二曲面，所述多个第一曲面相互连接，所述多个第二曲面相互连接，且所述第一曲面和所述第二曲面均背向所属的所述像素区域凸出设置。
可选地，所述第二像素界定层包括设置在每个所述像素区域内的第一像素界定结构和第二像素界定结构；
所述第一像素界定结构设置在所述第一曲面和所述第二曲面之间，且位于所述第一曲面和所述第二曲面沿第二方向上的最大间距处，所述第二方向与所述第一方向垂直；
所述第二像素界定结构的一端位于相邻两个所述第一曲面的连接位置，所述第二像素界定结构的另一端位于相邻两个所述第二曲面的连接位置，且所述第二像素界定结构的两端的连线位于所述第二方向上。
可选地，针对同一像素区域，任意相邻两个所述第一曲面直接连接，任意相邻两个所述第二曲面直接连接；
所述第二像素界定结构的两端分别与所述第一曲面和所述第二曲面接触，且位于所述第一曲面和所述第二曲面沿第二方向上的最小间距处。
可选地，针对同一像素区域，任意相邻两个所述第一曲面通过第一连接部连接，任意相邻两个所述第二曲面通过第二连接部连接；所述第二像素界定结构的两端分别与所述第一连接部和所述第二连接部接触；
其中，所述第一连接部和所述第二连接部在所述衬底基板上的正投影为沿着所述第一方向分布的直线段。
可选地，在所述第一方向上，所述第二像素界定结构的宽度大于或等于所述第一连接部和所述第二连接部的宽度。
可选地，在垂直于所述衬底基板的方向上，所述第二像素界定层的厚度小于所述第一像素界定层的厚度。
可选地，所述第一像素界定层的厚度为1.5μm至3μm，所述第二像素界定层的厚度小于或等于1μm。
可选地，每个所述像素区域与所述第一像素界定层相接触的所述第一曲面和所述第二曲面的个数大于或等于2。
可选地，所述第一曲面和所述第二曲面相对设置，且所述第一曲面和所述第二曲面在所述衬底基板上的正投影为圆弧形。
可选地，针对同一像素区域，所述第一曲面和所述第二曲面的个数相等，且所述第一曲面和所述第二曲面在所述衬底基板上的正投影对应的曲率半径相等。
本公开还公开了一种显示面板，包括上述的显示基板。
可选地，所述显示面板还包括形成在每个子像素区域内的有机功能层，覆盖所述有机功能层、第一像素界定层和第二像素界定层的阴极，以及封装层。
本公开还公开了一种显示装置，包括上述的显示面板。
本公开还公开了一种显示基板的制作方法，包括：
提供衬底基板；
在所述衬底基板上形成第一电极层；
在所述第一电极层上形成第一像素界定层和第二像素界定层；
其中，所述第一像素界定层将所述衬底基板划分为多个像素区域，每个所述像素区域包括沿第一方向分布的多个子像素区域，且相邻两个所述子像素区域通过所述第二像素界定层分隔；在所述第一方向上，每个所述像素区域与所述第一像素界定层相接触的表面包括多个第一曲面和多个第二曲面，所述多个第一曲面相互连接，所述多个第二曲面相互连接，且所述第一曲面和所述第二曲面均背向所属的所述像素区域凸出设置。
可选地，所述第一像素界定层和所述第二像素界定层采用半色调掩膜工艺一次形成。
可选地，所述第一像素界定层和所述第二像素界定层同层设置。
上述说明仅是本公开技术方案的概述，为了能够更清楚了解本公开的技术手段，而可依照说明书的内容予以实施，并且为了让本公开的上述和其它目的、特征和优点能够更明显易懂，以下特举本公开的具体实施方式。
附图简述
为了更清楚地说明本公开实施例或相关技术中的技术方案，下面将对实施例或相关技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1示出了本公开实施例的第一种显示基板的结构示意图；
图2示出了本公开实施例的第二种显示基板的结构示意图；
图3示出了本公开实施例的第三种显示基板的结构示意图；
图4示出了图1所示的显示基板沿截面A-A’的局部剖视图；
图5示出了图1所示的显示基板沿截面B-B’的局部剖视图；
图6示出了图1所示的显示基板沿截面C-C’的局部剖视图；
图7示出了本公开实施例的子像素区域与相关技术的子像素区域的结构对比图；并且
图8示出了本公开实施例的一种显示基板的制作方法的流程图。
详细描述
为使本公开的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本公开作进一步详细的说明。显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
参照图1，示出了本公开实施例的第一种显示基板的结构示意图，图2示出了本公开实施例的第二种显示基板的结构示意图，图3示出了本公开实施例的第三种显示基板的结构示意图，图4示出了图1所示的显示基板沿截面A-A’的局部剖视图，图5示出了图1所示的显示基板沿截面B-B’的局部剖视图，图6示出了图1所示的显示基板沿截面C-C’的局部剖视图。
本公开实施例提供了一种显示基板，包括衬底基板101、形成在衬底基板101上的第一电极层102，以及形成在第一电极层102上的第一像素界定层103和第二像素界定层104；第一像素界定层103将衬底基板101划分为多个像素区域105，每个像素区域105包括沿第一方向分布的多个子像素区域1050，且相邻两个子像素区域1050通过第二像素界定层104分隔；在第一方向上，每个像素区域105与第一像素界定层103相接触的表面包括多个第一曲面1061和多个第二曲面1062，多个第一曲面1061相互连接，多个第二曲面1062相互连接，且第一曲面1061和第二曲面1062均背向所属的像素区域105凸出设置。
在本公开实施例中，衬底基板101实际上是包括第一基板、形成在第一基板上的驱动晶体管和覆盖驱动晶体管的平坦层的结构。第一基板可以为玻璃基板、石英基板、金属基板、树脂基板等；驱动晶体管包括形成在第一基 板上的栅极，覆盖栅极和第一基板的栅绝缘层，形成在栅绝缘层上的有源层，部分覆盖栅绝缘层和有源层的源漏电极层，以及覆盖源漏电极层、有源层和栅绝缘层的钝化层，源漏电极层包括源极和漏极；平坦层实际上是覆盖驱动晶体管中的钝化层。
需要说明的是，本公开实施例的驱动晶体管可以不局限于上述的结构，其他结构也可适用于本方案，如双栅结构的驱动晶体管或者顶栅结构的驱动晶体管；此外，平坦层的材料可以为树脂材料。
在形成衬底基板101之后，在衬底基板101上形成第一电极层102，为了简化第一电极层102的绘制，图4至图6所示的剖视图是将第一电极层102绘制成整面的电极，可以理解的是，本公开实施例中的第一电极层102实际上包括多个相互绝缘且阵列分布的第一电极，第一电极通过贯穿平坦层和钝化层的过孔与驱动晶体管的漏极连接，第一电极实际上为一个子像素的阳极，用于驱动对应的子像素发光。具体地，第一电极层102的材料为透明导电材料，如氧化铟锡(Indium Tin Oxide，ITO)等，且第一电极层102包括的多个第一电极的形状与后续形成的子像素区域的形状一致。
在衬底基板101上形成第一电极层102之后，在第一电极层102上形成第一像素界定层103和第二像素界定层104，第一像素界定层103和第二像素界定层104同层设置。第一像素界定层103将衬底基板101划分为多个像素区域105，每个像素区域105包括沿第一方向分布的多个子像素区域1050，在第一方向上，将每个像素区域105与第一像素界定层103相接触的表面设置成多个第一曲面1061和多个第二曲面1062，多个第一曲面1061相互连接，多个第二曲面1062相互连接，且第一曲面1061和第二曲面1062均背向所属的像素区域105凸出设置，则使得在与衬底基板101平行的平面上，子像素区域105沿与第一方向垂直的第二方向上的宽度增加。
也就是说，针对同一像素区域105，其对应的第一曲面1061和第二曲面1062均背向该像素区域105凸出设置，而该像素区域105对应的第一曲面1061和第二曲面1062，是朝向与该像素区域105在第二方向上相邻的像素区域105凸出设置的。
例如，针对图1中的第一行第二列的像素区域105，其对应的第一曲面1061和第二曲面1062均背向第一行第二列的像素区域105凸出设置，而第一 行第二列的像素区域105对应的第一曲面1061是朝向第一行第一列的像素区域105凸出设置的，且第一行第二列的像素区域105对应的第二曲面1062是朝向第一行第三列的像素区域105凸出设置的。
针对相关的显示基板，其可以是通过像素界定层将显示基板划分为孤立的多个子像素区域，在打印有机功能材料时，一个喷嘴对应在一个子像素区域内进行喷墨打印；相关的显示基板也可以是通过第一像素界定层将显示基板划分为多个呈线型分布的像素区域，再通过像素区域内的第二像素界定层将像素区域划分为多个子像素区域(即line bank结构)，在打印有机功能材料时，一个喷嘴对应一个像素区域，对该像素区域内的多个子像素区域同时进行喷墨打印。但是，无论是哪种相关的显示基板，其对应的子像素区域20的形状如图7所示，均为矩形，其沿第二方向上的宽度为d2，而本公开实施例的每个子像素区域1050沿第二方向上的宽度为d1，则在子像素区域面积相等的情况下，相对于相关的子像素区域20，本公开实施例的每个子像素区域1050沿第二方向上的宽度增加，即宽度d1大于宽度d2，后续在像素区域105内进行喷墨打印时，每个子像素区域1050内沿第二方向上的成膜均匀性得到提高。
此外，本公开实施例是通过第二像素界定层104将相邻两个子像素区域1050分隔，且每个像素区域105包括沿第一方向分布的多个子像素区域1050，则后续在像素区域105内进行喷墨打印时，有机功能材料沿着第一方向流入各个子像素区域1050，则有机功能材料会沿第一方向会均匀分布在各个子像素区域1050内，有机功能材料干燥后只有第一方向最边缘位置处会在第一像素界定层103上有攀爬，中间位置处的有机功能材料均匀成膜，则本公开实施例沿第一方向呈线型分布的各个子像素区域1050内的成膜均匀性均也得到提高。
如图1至图3所示，第一方向为衬底基板101的列方向，则第二方向为衬底基板101的行方向；当然，第一方向也可以为衬底基板101的行方向，则第二方向为衬底基板101的列方向。
其中，第一曲面1061和第二曲面1062相对设置，第一曲面1061和第二曲面1062在衬底基板101上的正投影为圆弧形，针对任一个像素区域105，其对应的第一曲面1061和第二曲面1062的个数相等，且第一曲面1061和第 二曲面1062在衬底基板101上的正投影对应的曲率半径相等。
进一步地，每个像素区域105与第一像素界定层103相接触的第一曲面1061和第二曲面1062的个数大于或等于2。
如图1至图3所示，每个像素区域105与第一像素界定层103相接触的第一曲面1061和第二曲面1062的个数为3个，当然，每个像素区域105与第一像素界定层103相接触的第一曲面1061和第二曲面1062的个数也可以为2个、4个、5个等。
在本公开实施例中，如图1至图3所示，第二像素界定层104包括设置在每个像素区域105内的第一像素界定结构1041和第二像素界定结构1042；第一像素界定结构1041设置在第一曲面1061和第二曲面1062之间，且位于第一曲面1061和第二曲面1062沿第二方向上的最大间距处，其中，第二方向与第一方向垂直；第二像素界定结构1042的一端位于相邻两个第一曲面1061的连接位置，第二像素界定结构1042的另一端位于相邻两个第二曲面1062的连接位置，且第二像素界定结构1042的两端的连线位于第二方向上。
通过第一像素界定结构1041和第二像素界定结构1042将每个像素区域105分隔成多个子像素区域1050，使得在同一面积下，相对于仅在像素区域105内设置第一像素界定结构1041或第二像素界定结构1042的显示基板，本公开实施例的显示基板具有更高的PPI(Pixels Per Inch，每英寸像素数目)。
并且，将第一像素界定结构1041设置在第一曲面1061和第二曲面1062之间沿第二方向上的最大间距处，而第二像素界定结构1042设置在第一曲面1061的连接位置和第二曲面1062的连接位置处(即第一曲面1061的第二曲面1062之间沿第二方向上的最小间距处)，使得在采用喷墨打印设备的喷嘴，在像素区域105内沿第一方向的中轴线打印有机功能材料时，喷墨打印的位置与子像素区域1050的各个边缘位置的距离基本上相等，则进一步提高各个子像素区域1050内的成膜均匀性。
此外，将第二像素界定结构1042设置在两个第一曲面1061的连接位置和两个第二曲面1062的连接位置处，使得子像素区域1050的连接部分的宽度变窄，则可调整有机功能材料在各个子像素区域1050之间的流动速度，从而进一步改善各个子像素区域1050内的成膜均匀性；针对相关的line bank结构，在打印有机功能材料时，有机功能材料在各个子像素区域之间的流动速 度较大，当子像素区域内存在杂质颗粒(particles)时，有机功能材料容易在particles周围聚集，导致成膜不均匀，而本公开实施例通过将子像素区域1050的连接部分的宽度变窄，调整有机功能材料在各个子像素区域1050之间的流动速度，从而也可改善particles引起的有机功能材料的聚集问题，进一步提高成膜均匀性。
如图1所示，针对同一像素区域105，任意相邻两个第一曲面1061直接连接，任意相邻两个第二曲面1062直接连接；第二像素界定结构1042分别与第一曲面1061和第二曲面1062接触，且位于第一曲面1061和第二曲面1062沿第二方向上的最小间距处。
在任一个像素区域105中，当任意相邻两个第一曲面1061直接连接，任意相邻两个第二曲面1062直接连接时，第二像素界定结构1042在衬底基板101上的正投影包括相互平行设置的第一直线段和第二直线段，以及设置在第一直线段和第二直线段之间且与第一直线段和第二直线段分别连接的第一连接线和第二连接线，第一连接线和第二连接线均包括两个相互连接的弧线段，且第一连接线和第二连接线在朝向所属的像素区域105的方向凹陷设置。
如图2和图3所示，针对同一像素区域105，任意相邻两个第一曲面1061通过第一连接部1063连接，任意相邻两个第二曲面1062通过第二连接部1064连接；第二像素界定结构1042分别与第一连接部1063和第二连接部1064接触；第一连接部1063和第二连接部1064在衬底基板101上的正投影为沿着第一方向分布的直线段。
在任一个像素区域105中，当任意相邻两个第一曲面1061通过第一连接部1063连接，任意相邻两个第二曲面1062通过第二连接部1064连接时，第二像素界定结构1042在衬底基板101上的正投影为矩形。
需要说明的是，针对相同PPI的显示基板，图1所示的显示基板的子像素区域1050的开口率会大于图2和图3所示的显示基板的子像素区域1050的开口率。
其中，在第一方向上，第二像素界定结构1042的宽度大于或等于第一连接部1063和第二连接部1064的宽度。如图2所示，第二像素界定结构1042的宽度等于第一连接部1063和第二连接部1064的宽度，如图3所示，第二像素界定结构1042的宽度大于第一连接部1063和第二连接部1064的宽度。
在本公开实施例中，在垂直于衬底基板101的方向上，第二像素界定层104的厚度h1小于第一像素界定层103的厚度h2。
具体地，第一像素界定层103的厚度h2为1.5μm至3μm，第二像素界定层104的厚度h1小于或等于1μm。
通过控制第二像素界定层104的厚度h1小于第一像素界定层103的厚度h2，使得在第一像素界定层103限定的像素区域105内打印有机功能材料时，有机功能材料可以从第二像素界定层104上流过，从而流入各个子像素区域1050内，且保证有机功能材料不会从第一像素界定层103上流到相邻的其他的像素区域内。
在本公开实施例中，有机功能材料包括发光材料，针对沿第一方向分布的各个像素区域105，其可打印同一种颜色的发光材料，而沿第二方向分布的各个像素区域105，其打印的发光材料的颜色有所不同，如针对图1至图3中的第一列像素区域105，其可以打印红色发光材料，针对图1至图3中的第二列像素区域105，其可以打印绿色发光材料，针对图1至图3中的第三列像素区域105，其可以打印蓝色发光材料。而每个像素区域105内的各个子像素区域1050内打印的发光材料的颜色为同一种颜色。
在本公开实施例中，通过将像素区域与第一像素界定层相接触的表面设置成多个第一曲面和多个第二曲面，且该第一曲面和第二曲面均背向所属的像素区域凸出设置，使得在与衬底基板平行的平面上，子像素区域沿与第一方向垂直的第二方向上的宽度增加，则在像素区域内进行喷墨打印时，有机功能材料沿着第一方向流入各个子像素区域，使得子像素区域内沿第一方向和第二方向上的成膜均匀性均得到提高，从而提高了发光器件的亮度均匀性。
本公开实施例还提供了一种显示面板，该显示面板包括上述的显示基板。
关于显示基板的具体描述可以参照上文实施例的描述，本公开实施例对此不再赘述。
在本公开实施例中，显示面板还包括形成在各个子像素区域1050内的有机功能层，覆盖有机功能层、第一像素界定层103和第二像素界定层104的阴极，以及封装层。
在本公开一种实施例方式中，有机功能层仅包括发光层，通过喷墨打印，在各个像素区域105内打印发光材料，发光材料流入各个子像素区域1050内， 干燥、烘烤处理后，以形成发光层。
在本公开另一种实施例方式中，有机功能层包括空穴注入层、空穴传输层、发光层、电子传输层和电子注入层，通过喷墨打印，在各个像素区域105内依次打印空穴注入材料、空穴传输材料、发光材料、电子传输材料和电子注入材料，并进行干燥、烘烤处理后，以在像素区域105内的各个子像素区域1050内依次形成空穴注入层、空穴传输层、发光层、电子传输层和电子注入层。
在像素区域105内的各个子像素区域1050内依次形成空穴注入层、空穴传输层、发光层、电子传输层和电子注入层之后，形成第二电极层，该第二电极为阴极，最后，对形成有阴极的显示基板进行封装，得到显示面板。
本公开实施例还提供了一种显示装置，包括上述的显示面板。
在实际应用中，该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、导航仪等任何具有显示功能的产品或部件。
在本公开实施例中，通过将像素区域与第一像素界定层相接触的表面设置成多个第一曲面和多个第二曲面，且该第一曲面和第二曲面均背向所属的像素区域凸出设置，使得在与衬底基板平行的平面上，子像素区域沿与第一方向垂直的第二方向上的宽度增加，则在像素区域内进行喷墨打印时，有机功能材料沿着第一方向流入各个子像素区域，使得子像素区域内沿第一方向和第二方向上的成膜均匀性均得到提高，从而提高了发光器件的亮度均匀性。
参照图8，示出了本公开实施例的一种显示基板的制作方法的流程图，具体可以包括以下步骤：
步骤801，提供衬底基板。
在本公开实施例中，首先制作衬底基板101。具体地，先提供第一基板，在第一基板上采用构图工艺形成栅极，接着，形成覆盖栅极和第一基板的栅绝缘层，在栅绝缘层上通过构图工艺形成有源层，然后，采用构图工艺形成部分覆盖栅绝缘层和有源层的源漏电极层，该源漏电极层包括源极和漏极，接着，形成盖源漏电极层、有源层和栅绝缘层的钝化层，最后，在钝化层上形成平坦层，得到衬底基板101。
步骤802，在所述衬底基板上形成第一电极层。
在本公开实施例中，在制作得到衬底基板101之后，采用构图工艺在衬 底基板101上形成第一电极层102。具体地，在衬底基板101上沉积第一电极薄膜，在第一电极薄膜上涂覆光刻胶，采用掩膜板对第一电极薄膜上的光刻胶进行曝光、显影，然后，刻蚀掉未覆盖有光刻胶的第一电极薄膜，最后，去除第一电极薄膜上剩余的光刻胶，得到第一电极层102。
步骤803，在所述第一电极层上形成第一像素界定层和第二像素界定层。
在本公开实施例中，在衬底基板101上形成第一电极层102之后，采用构图工艺在第一电极层102上形成第一像素界定层103和第二像素界定层104，第一像素界定层103和第二像素界定层104的材料可以为聚酰亚胺。
具体地，在第一电极层102上涂覆像素界定薄膜，采用半色调掩膜板对像素界定薄膜进行曝光、显影，则可同时得到第一像素界定层103和第二像素界定层104，即第一像素界定层103和第二像素界定层104采用半色调掩膜工艺一次形成。
在半色调掩膜板中，与第一像素界定层103和第二像素界定层104对应的区域，其光线的透过率不同，因此，可得到高度不一致的第一像素界定层103和第二像素界定层104。
其中，第一像素界定层103将衬底基板101划分为多个像素区域105，每个像素区域105包括沿第一方向分布的多个子像素区域1050，且相邻两个子像素区域1050通过第二像素界定层104分隔；在第一方向上，每个像素区域105与第一像素界定层103相接触的表面包括多个第一曲面1061和多个第二曲面1062，多个第一曲面1061相互连接，多个第二曲面1062相互连接，且第一曲面1061和第二曲面1062均背向所属的像素区域105凸出设置。
在本公开实施例中，通过将像素区域与第一像素界定层相接触的表面设置成多个第一曲面和多个第二曲面，且该第一曲面和第二曲面均背向所属的像素区域凸出设置，使得在与衬底基板平行的平面上，子像素区域沿与第一方向垂直的第二方向上的宽度增加，则在像素区域内进行喷墨打印时，有机功能材料沿着第一方向流入各个子像素区域，使得子像素区域内沿第一方向和第二方向上的成膜均匀性均得到提高，从而提高了发光器件的亮度均匀性。
对于前述的方法实施例，为了简单描述，故将其都表述为一系列的动作组合，但是本领域技术人员应该知悉，本公开并不受所描述的动作顺序的限制，因为依据本公开，某些步骤可以采用其他顺序或者同时进行。其次，本 领域技术人员也应该知悉，说明书中所描述的实施例均属于优选实施例，所涉及的动作和模块并不一定是本公开所必须的。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
以上对本公开所提供的一种显示基板及其制作方法、显示面板及显示装置，进行了详细介绍，本文中应用了具体个例对本公开的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本公开的方法及其核心思想；同时，对于本领域的一般技术人员，依据本公开的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本公开的限制。

Claims (16)

  1. 一种显示基板，其中，包括：衬底基板、形成在所述衬底基板上的第一电极层，以及形成在所述第一电极层上的第一像素界定层和第二像素界定层；
    所述第一像素界定层将所述衬底基板划分为多个像素区域，每个所述像素区域包括沿第一方向分布的多个子像素区域，且相邻两个所述子像素区域通过所述第二像素界定层分隔；
    在所述第一方向上，每个所述像素区域与所述第一像素界定层相接触的表面包括多个第一曲面和多个第二曲面，所述多个第一曲面相互连接，所述多个第二曲面相互连接，且所述第一曲面和所述第二曲面均背向所属的所述像素区域凸出设置。
  2. 根据权利要求1所述的显示基板，其中，所述第二像素界定层包括设置在每个所述像素区域内的第一像素界定结构和第二像素界定结构；
    所述第一像素界定结构设置在所述第一曲面和所述第二曲面之间，且位于所述第一曲面和所述第二曲面沿第二方向上的最大间距处，所述第二方向与所述第一方向垂直；
    所述第二像素界定结构的一端位于相邻两个所述第一曲面的连接位置，所述第二像素界定结构的另一端位于相邻两个所述第二曲面的连接位置，且所述第二像素界定结构的两端的连线位于所述第二方向上。
  3. 根据权利要求2所述的显示基板，其中，针对同一像素区域，任意相邻两个所述第一曲面直接连接，任意相邻两个所述第二曲面直接连接；
    所述第二像素界定结构的两端分别与所述第一曲面和所述第二曲面接触，且位于所述第一曲面和所述第二曲面沿第二方向上的最小间距处。
  4. 根据权利要求2所述的显示基板，其中，针对同一像素区域，任意相邻两个所述第一曲面通过第一连接部连接，任意相邻两个所述第二曲面通过第二连接部连接；所述第二像素界定结构的两端分别与所述第一连接部和所述第二连接部接触；
    其中，所述第一连接部和所述第二连接部在所述衬底基板上的正投影为沿着所述第一方向分布的直线段。
  5. 根据权利要求4所述的显示基板，其中，在所述第一方向上，所述第 二像素界定结构的宽度大于或等于所述第一连接部和所述第二连接部的宽度。
  6. 根据权利要求1至5中任一项所述的显示基板，其中，在垂直于所述衬底基板的方向上，所述第二像素界定层的厚度小于所述第一像素界定层的厚度。
  7. 根据权利要求6所述的显示基板，其中，所述第一像素界定层的厚度为1.5μm至3μm，所述第二像素界定层的厚度小于或等于1μm。
  8. 根据权利要求1所述的显示基板，其中，每个所述像素区域与所述第一像素界定层相接触的所述第一曲面和所述第二曲面的个数大于或等于2。
  9. 根据权利要求1所述的显示基板，其中，所述第一曲面和所述第二曲面相对设置，且所述第一曲面和所述第二曲面在所述衬底基板上的正投影为圆弧形。
  10. 根据权利要求9所述的显示基板，其中，针对同一像素区域，所述第一曲面和所述第二曲面的个数相等，且所述第一曲面和所述第二曲面在所述衬底基板上的正投影对应的曲率半径相等。
  11. 一种显示面板，其中，包括如权利要求1至10中任一项所述的显示基板。
  12. 根据权利要求11所述的显示面板，其中，所述显示面板还包括形成在每个子像素区域内的有机功能层，覆盖所述有机功能层、第一像素界定层和第二像素界定层的阴极，以及封装层。
  13. 一种显示装置，其中，包括如权利要求11或12所述的显示面板。
  14. 一种显示基板的制作方法，其中，包括：
    提供衬底基板；
    在所述衬底基板上形成第一电极层；
    在所述第一电极层上形成第一像素界定层和第二像素界定层；
    其中，所述第一像素界定层将所述衬底基板划分为多个像素区域，每个所述像素区域包括沿第一方向分布的多个子像素区域，且相邻两个所述子像素区域通过所述第二像素界定层分隔；在所述第一方向上，每个所述像素区域与所述第一像素界定层相接触的表面包括多个第一曲面和多个第二曲面，所述多个第一曲面相互连接，所述多个第二曲面相互连接，且所述第一曲面和所述第二曲面均背向所属的所述像素区域凸出设置。
  15. 根据权利要求14所述的方法，其中，所述第一像素界定层和所述第二像素界定层采用半色调掩膜工艺一次形成。
  16. 根据权利要求14所述的方法，其中，所述第一像素界定层和所述第二像素界定层同层设置。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928497A (zh) * 2014-04-01 2014-07-16 京东方科技集团股份有限公司 Oled显示器件及其制作方法、显示装置
CN106449717A (zh) * 2016-11-14 2017-02-22 京东方科技集团股份有限公司 有机电致发光器件基板、显示装置及制造方法
CN107068722A (zh) * 2017-04-20 2017-08-18 京东方科技集团股份有限公司 一种阵列基板、显示面板及显示装置
CN108807419A (zh) * 2017-05-03 2018-11-13 群创光电股份有限公司 显示装置
US10345639B1 (en) * 2018-03-27 2019-07-09 Panasonic Liquid Crystal Display Co., Ltd. Curved display
CN111463256A (zh) * 2020-05-22 2020-07-28 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示面板及显示装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108807457B (zh) * 2017-04-27 2020-04-21 京东方科技集团股份有限公司 阵列基板以及制作方法、oled器件及其制作方法、显示装置
CN106935632B (zh) * 2017-04-28 2019-08-13 深圳市华星光电半导体显示技术有限公司 一种oled显示面板的像素结构及其制程
CN113380956A (zh) * 2017-11-02 2021-09-10 京东方科技集团股份有限公司 一种显示基板及显示装置
CN110767672B (zh) * 2018-08-06 2020-11-17 云谷（固安）科技有限公司 显示面板、显示屏及显示终端
CN211654826U (zh) * 2020-05-22 2020-10-09 京东方科技集团股份有限公司 一种显示基板、显示面板及显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928497A (zh) * 2014-04-01 2014-07-16 京东方科技集团股份有限公司 Oled显示器件及其制作方法、显示装置
CN106449717A (zh) * 2016-11-14 2017-02-22 京东方科技集团股份有限公司 有机电致发光器件基板、显示装置及制造方法
CN107068722A (zh) * 2017-04-20 2017-08-18 京东方科技集团股份有限公司 一种阵列基板、显示面板及显示装置
CN108807419A (zh) * 2017-05-03 2018-11-13 群创光电股份有限公司 显示装置
US10345639B1 (en) * 2018-03-27 2019-07-09 Panasonic Liquid Crystal Display Co., Ltd. Curved display
CN111463256A (zh) * 2020-05-22 2020-07-28 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示面板及显示装置

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