WO2021227888A1 - 量子点发光二极管及其制备方法、显示面板及显示装置 - Google Patents

量子点发光二极管及其制备方法、显示面板及显示装置 Download PDF

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WO2021227888A1
WO2021227888A1 PCT/CN2021/091119 CN2021091119W WO2021227888A1 WO 2021227888 A1 WO2021227888 A1 WO 2021227888A1 CN 2021091119 W CN2021091119 W CN 2021091119W WO 2021227888 A1 WO2021227888 A1 WO 2021227888A1
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quantum dot
layer
metal oxide
hole transport
oxide
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PCT/CN2021/091119
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English (en)
French (fr)
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冯靖雯
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京东方科技集团股份有限公司
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Priority to US17/766,838 priority Critical patent/US20240088325A1/en
Publication of WO2021227888A1 publication Critical patent/WO2021227888A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/15—Hole transporting layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots

Definitions

  • This application relates to the field of display technology, and in particular to a quantum dot light-emitting diode, a manufacturing method thereof, a display panel, and a display device.
  • quantum dot light emitting diode (QLED) displays will surpass photoluminescent quantum dot brightness enhancement films and Quantum dot color filters are expected to become the next-generation mainstream display technology.
  • the application provides a quantum dot light-emitting diode, a manufacturing method thereof, a display panel, and a display device.
  • a quantum dot light emitting diode which includes: an anode layer, a hole injection layer, a hole transport layer, and a quantum dot layer that are stacked;
  • the film material of the hole transport layer includes a mixture of nickel oxide and a target metal oxide, and the target metal oxide includes at least one metal oxide other than the nickel oxide.
  • the lattice mismatch between the target metal oxide and the nickel oxide is less than a preset value.
  • the preset value is not greater than 1%.
  • the valence band energy level of the target metal oxide is lower than the valence band energy level of the nickel oxide.
  • the target metal oxide includes at least one of magnesium oxide, cesium oxide, and lithium oxide.
  • the target metal oxide is uniformly distributed in the hole transport layer.
  • the doping ratio of the target metal oxide in the hole transport layer ranges from 1% to 50%.
  • the target metal oxide is magnesium oxide, and the doping ratio of the magnesium oxide in the hole transport layer is 3%.
  • a display panel including the quantum dot light-emitting diode according to any one of the aspects.
  • a display device including a power supply component, and the quantum dot light-emitting diode according to any one of the aspects or the display panel according to the other aspect; the power supply component is used for power supply.
  • a method for manufacturing a quantum dot light-emitting diode includes:
  • a layered anode layer, a hole injection layer, a hole transport layer and a quantum dot layer are formed on the base substrate; wherein the film material of the hole transport layer includes a mixture of nickel oxide and a target metal oxide, so The target metal oxide includes at least one metal oxide other than the nickel oxide.
  • forming the hole transport layer includes:
  • Co-sputtering nickel and target metal oxide is used to form a mixed layer including nickel oxide and target metal oxide.
  • the method of co-sputtering nickel and target metal oxide to form a mixed layer including nickel oxide and target metal oxide includes:
  • the nickel target and the target metal oxide target are used for co-sputtering to form a mixed layer including nickel oxide and the target metal oxide; wherein, the first environmental condition includes: the ambient gas includes argon and For oxygen, the ambient temperature is in the first temperature range.
  • the first temperature range is 0°C to 55°C.
  • the method further includes:
  • the mixed layer including nickel oxide and the target metal oxide is annealed; wherein, the second environmental condition includes: the ambient gas is air, and the ambient temperature is in the second temperature range.
  • the second temperature range is 100°C to 500°C.
  • forming the anode layer, the hole injection layer, the hole transport layer, and the quantum dot layer stacked on the base substrate includes:
  • the quantum dot layer is formed on the side of the hole transport layer away from the base substrate.
  • the formation of a stacked anode layer, a hole injection layer, a hole transport layer and a quantum dot layer on the base substrate includes:
  • the anode layer is formed on the side of the hole injection layer away from the base substrate.
  • the valence band energy level of the target metal oxide is lower than the valence band energy level of the nickel oxide.
  • the lattice mismatch between the target metal oxide and the nickel oxide is less than a preset value.
  • FIG. 1 is a schematic structural diagram of a QLED provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of another QLED structure provided by an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of another QLED provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of the energy level comparison between the hole transport layer in the QLED provided by the related art and the hole transport layer in the QLED provided by the embodiments of the present application;
  • FIG. 5 is a schematic flow chart of a method for manufacturing a QLED according to an embodiment of the present application.
  • Fig. 6 is a schematic flow chart of another QLED manufacturing method provided by an embodiment of the present application.
  • the QLED includes an anode layer, a hole injection layer, a hole transport layer, a quantum dot layer, an electron transport layer, and a cathode layer that are stacked.
  • the film material of the quantum dot layer includes quantum dot material.
  • Quantum dots are semiconductor nanostructures that bind conduction band electrons, valence band holes and excitons in three spatial directions.
  • the hole transport layer (HTL) in the QLED is usually formed of nickel oxide (NiOx) (x is an integer greater than 1).
  • the hole transport layer formed of nickel oxide has surface defects and internal defects (hereinafter referred to as surface/bulk defects).
  • surface defects include the presence of vacancies on the surface.
  • internal defects include internal gaps.
  • the embodiment of the application provides a QLED.
  • the surface/bulk defects of the hole transport layer can be passivated, thereby reducing exciton quenching and improving QLED The luminous intensity.
  • Fig. 1 is a schematic structural diagram of a QLED provided by an embodiment of the present application.
  • the QLED includes: an anode layer 2, a hole injection layer 3, a hole transport layer 4 and a quantum dot layer 5 arranged in a stack.
  • the film material of the hole transport layer includes a mixture of nickel oxide and target metal oxide. That is, the hole transport layer is a mixed layer of nickel oxide and target metal oxide.
  • the target metal oxide includes at least one metal oxide other than nickel oxide.
  • FIG. 2 is a schematic structural diagram of another QLED provided by an embodiment of the present application.
  • Fig. 3 is a schematic structural diagram of another QLED provided by an embodiment of the present application.
  • the QLED further includes an electron transport layer 6 and a cathode layer 7.
  • the QLED includes an anode layer 2, a hole injection layer 3, a hole transport layer 4, a quantum dot layer 5, and an electron transport layer 6 stacked on the base substrate 1 in a direction away from the base substrate 1.
  • cathode layer 7. Or, referring to FIG.
  • the QLED includes a cathode layer 7, an electron transport layer 6, a quantum dot layer 5, a hole transport layer 4, and a hole injection layer which are sequentially stacked on the base substrate 1 along a direction away from the base substrate 1.
  • the hole transport layer of the QLED is a mixed layer of nickel oxide and target metal oxide.
  • the hole transport layer is formed by doping the target metal oxide in the nickel oxide, and the target metal oxide is used as the modifier of the nickel oxide.
  • the hole transport layer can be passivated. Surface/bulk defects.
  • the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer can be improved, and the luminous intensity of the QLED can be improved.
  • the service life of the quantum dots and the photoluminescence quantum yield (PLQY) can be increased, and the performance of the QLED can be optimized.
  • the lattice mismatch between the target metal oxide and the nickel oxide is less than a preset value.
  • the preset value is not more than 1%.
  • a metal oxide whose lattice mismatch with nickel oxide is less than a preset value is selected to prepare a hole transport layer together with nickel oxide, which can make the nickel oxide and the metal oxide have a better doping effect .
  • the metal oxide can be better used as a modifier of nickel oxide, by means of bulk doping and surface modification, to passivate the surface/bulk defects of the hole transport layer. Furthermore, the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer is improved, and the luminous intensity and photoluminescence quantum yield of the QLED are improved.
  • the valence band energy level of the target metal oxide is lower than the valence band energy level of nickel oxide.
  • the valence band energy level of the target metal oxide is lower than that of nickel oxide, that is, the valence band energy level of the target metal oxide is deeper than that of nickel oxide. The lower (or deeper) the valence band energy level, the greater the absolute value of the valence band energy level.
  • a metal oxide with a lower valence band energy level than that of nickel oxide is used to prepare a hole transport layer together with nickel oxide, which is compared with a hole transport layer formed of nickel oxide in the related art
  • the hole transport layer provided by the embodiments of the present application has a lower valence band energy level, which can reduce the hole injection barrier of the hole transport layer.
  • reducing the number of holes accumulated between the hole transport layer and the quantum dot layer that is, reducing the accumulation of holes
  • allowing more holes to enter the quantum dot layer and electrons to form excitons to emit light which further improves the luminescence of the QLED Intensity and photoluminescence quantum yield.
  • the carrier balance in the quantum dot layer can also be achieved.
  • the target metal oxide includes at least one of magnesium oxide (MgO), cesium oxide (Cs 2 O), and lithium oxide (Li 2 O). That is, the target metal oxide may be magnesium oxide, cesium oxide, or lithium oxide; or it may be a mixture of at least two of magnesium oxide, cesium oxide, and lithium oxide.
  • Magnesium oxide, cesium oxide and lithium oxide all have a lattice mismatch with nickel oxide of less than 1%. Among them, the lattice mismatch between magnesium oxide and nickel oxide is 0.8%.
  • the valence band energy levels of magnesium oxide, cesium oxide and lithium oxide are also lower than the valence band energy levels of nickel oxide. Among them, the valence band energy level of magnesium oxide is 0.9 electron volts (eV) lower than the valence band energy level of nickel oxide.
  • a metal oxide whose lattice mismatch degree with nickel oxide is less than a preset value and whose valence band energy level is lower than that of nickel oxide is selected to form a hole transport layer together with nickel oxide.
  • the doping effect of nickel oxide and the metal oxide can be better, and the surface/bulk defects of the hole transport layer can be better passivated.
  • the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer is improved, and the luminous intensity and photoluminescence quantum yield of the QLED are improved.
  • the valence band energy level of the hole transport layer can be lowered, and the hole injection barrier of the hole transport layer can be reduced.
  • the carrier balance in the quantum dot layer can also be achieved.
  • the lattice mismatch with nickel oxide can be selected to be less than a preset value, and/or the valence band energy level is lower than that of nickel oxide Of metal oxides.
  • the lattice mismatch with nickel oxide can be selected to be less than a preset value, and/or the valence band energy level is lower than that of nickel oxide Of metal oxides.
  • other metal oxides that meet the requirements can be used to prepare the hole transport layer together with nickel oxide, and the specific types of metal oxides selected are not limited in the embodiments of the present application.
  • the target metal oxide is uniformly distributed in the hole transport layer. That is, the target metal oxide and nickel oxide are uniformly mixed. A better doping effect can be achieved to passivate the surface/bulk defects of the hole transport layer.
  • the doping ratio of the target metal oxide in the hole transport layer is 1%-50%. A better doping effect can be achieved.
  • the doping ratio of the target metal oxide in the hole transport layer can be 3%.
  • FIG. 4 is a schematic diagram of the energy level comparison of the hole transport layer in the QLED provided by the related technology and the hole transport layer in the QLED provided by the embodiments of the present application.
  • the ordinate represents the energy level, and the unit is eV.
  • the hole transport layer in the related art is a nickel oxide layer.
  • the hole transport layer in the embodiment of the present application is a mixed layer of nickel oxide and magnesium oxide.
  • the bottom of the rectangular box in the figure represents the size of the valence band energy level.
  • the valence band energy level of the nickel oxide layer is -5.2eV.
  • the valence band energy of the mixed layer of nickel oxide and magnesium oxide is lower than that of nickel oxide, so the valence band energy level of the mixed layer of nickel oxide and magnesium oxide is lower than -5.2 eV. Since the valence band energy level of the mixed layer of nickel oxide and magnesium oxide is lower than that of the nickel oxide layer, the hole injection barrier of the mixed layer of nickel oxide and magnesium oxide is smaller than that of the nickel oxide layer .
  • the hole injection barrier of the hole transport layer in the embodiment of the present application is small, more holes can enter the quantum dot layer to form excitons with electrons to emit light. , Improve the luminous intensity and photoluminescence quantum yield of QLED.
  • the QLED provided in the embodiment of the present application may be a QLED containing cadmium (Cd), or may also be a QLED containing no cadmium.
  • the QLED provided by the embodiments of the present application forms a hole transport layer by doping a target metal oxide in nickel oxide, and uses the target metal oxide as a modifier of nickel oxide, with the help of bulk doping and surface modification.
  • the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer can be improved, and the luminous intensity of the QLED can be improved.
  • the service life of quantum dots and photoluminescence quantum yield can be increased, and the performance of QLEDs can be optimized.
  • a metal oxide whose lattice mismatch with nickel oxide is less than a preset value is selected to prepare the hole transport layer together with nickel oxide, which can make the nickel oxide and the metal oxide have a better doping effect. good.
  • the metal oxide can be better used as a modifier of nickel oxide, by means of bulk doping and surface modification, to passivate the surface/bulk defects of the hole transport layer. Furthermore, the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer is improved, and the luminous intensity and photoluminescence quantum yield of the QLED are improved.
  • a metal oxide with a lower valence band energy level than that of nickel oxide is used to prepare the hole transport layer together with nickel oxide, which is comparable to the hole transport layer formed by nickel oxide in the related art.
  • the valence band energy level is lower, which can reduce the hole injection barrier of the hole transport layer.
  • an embodiment of the present application also provides a display panel, including the QLED provided by the embodiment of the present application.
  • the display panel may be any product or component with a display function, such as electronic paper, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc.
  • an embodiment of the present application further provides a display device, including a power supply component, and the QLED provided in the embodiment of the present application or the display panel provided in the embodiment of the present application; the power supply component is used for power supply.
  • the power supply component may be a power source.
  • the display device may be any product or component with a display function, such as electronic paper, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator, etc.
  • the embodiment of the present application further provides a method for manufacturing a QLED.
  • the method includes the following steps: forming a stacked anode layer, a hole injection layer, a hole transport layer and a quantum dot layer on a base substrate.
  • the film material of the hole transport layer includes a mixture of nickel oxide and target metal oxide.
  • the target metal oxide includes at least one metal oxide other than nickel oxide.
  • Fig. 5 is a schematic flow chart of a method for manufacturing a QLED provided by an embodiment of the present application. As shown in Figure 5, the method includes the following working processes:
  • step 501 an anode layer is formed on the base substrate.
  • the material of the base substrate is glass.
  • the base substrate is cleaned first, and then indium tin oxide (ITO) is used to form the anode layer on the base substrate by evaporation.
  • ITO indium tin oxide
  • step 502 a hole injection layer is formed on the side of the anode layer away from the base substrate.
  • the hole injection material is PEDOT:PSS.
  • PEDOT: PSS is an aqueous solution of high molecular polymer with high conductivity. According to different formulations, aqueous solutions with different conductivity can be obtained.
  • PEDOT: PSS is composed of PEDOT and PSS.
  • PEDOT is a polymer of EDOT (3,4-ethylenedioxythiophene monomer), and PSS is polystyrene sulfonate.
  • a hole injection material is used to deposit a hole injection layer on the side of the anode layer away from the base substrate by spin coating.
  • step 503 a hole transport layer is formed on the side of the hole injection layer away from the base substrate.
  • nickel and the target metal oxide are co-sputtered to form a mixed layer including nickel oxide and the target metal oxide.
  • co-sputtering refers to co-sputtering, and usually means that two or more target materials are sputtered at the same time.
  • the hole transport layer is formed by co-sputtering nickel and the target metal oxide, which can make the doping depth of the target metal oxide equal to the sputtering thickness of the nickel oxide.
  • the target metal oxide can be doped at the same time as the nickel oxide is formed, so that the target metal oxide can be uniformly doped in the nickel oxide.
  • the doping of magnesium oxide and the formation of nickel oxide are carried out simultaneously, and the sputtered magnesium oxide can be uniformly doped in the nickel oxide.
  • a nickel target and a target metal oxide target may be used for co-sputtering under the first environmental condition to form a mixed layer including nickel oxide and the target metal oxide.
  • the first environmental condition includes: the environmental gas includes argon (Ar) and oxygen (O 2 ), and the environmental temperature is in the first temperature range.
  • the first temperature range is 0°C to 55°C.
  • nickel and target metal oxide are co-sputtered on the side of the hole injection layer away from the base substrate, and the target is completed during the reaction of nickel and oxygen to form nickel oxide
  • the doping of the metal oxide can ensure the doping depth and doping uniformity of the target metal oxide.
  • the mixed layer including nickel oxide and the target metal oxide can also be treated under the second environmental condition.
  • the layer is annealed.
  • the second environmental condition includes: the ambient gas is air, and the ambient temperature is in the second temperature range.
  • the second temperature range is 100°C to 500°C.
  • annealing the mixed layer including nickel oxide and the target metal oxide can improve the crystallinity of the mixed layer, and further improve the structural stability of the prepared hole transport layer.
  • step 504 a quantum dot layer is formed on the side of the hole transport layer away from the base substrate.
  • the quantum dot material is deposited on the side of the hole transport layer away from the base substrate by spin coating to form a quantum dot layer.
  • step 504 the following steps may be performed:
  • step 505 an electron transport layer is formed on the side of the quantum dot layer away from the base substrate.
  • the preparation material of the electron transport layer includes zinc oxide (ZnO) nanoparticles.
  • an electron transport layer is deposited on the side of the quantum dot layer away from the base substrate by spin coating.
  • a cathode layer is formed on the side of the electron transport layer away from the base substrate.
  • the preparation material of the cathode layer includes aluminum (Al).
  • a cathode layer is formed on the side of the electron transport layer away from the base substrate by evaporation.
  • the cathode layer is a thin metal layer.
  • the thickness of the cathode layer ranges from 500 to 1000 nanometers.
  • the QLED can be further packaged to complete the preparation of the QLED, and the QLED as shown in FIG. 2 can be obtained.
  • the hole injection layer, the quantum dot layer, the electron transport layer, and the cathode layer can also be prepared by inkjet printing, which is not limited in the embodiments of the present application.
  • Fig. 6 is a schematic flow chart of another QLED manufacturing method provided by an embodiment of the present application. As shown in Figure 6, the method includes the following working processes:
  • step 601 a cathode layer is formed on a base substrate.
  • step 602 an electron transport layer is formed on the side of the cathode layer away from the base substrate.
  • step 603 a quantum dot layer is formed on the side of the electron transport layer away from the base substrate.
  • step 604 a hole transport layer is formed on the side of the quantum dot layer away from the base substrate.
  • step 605 a hole injection layer is formed on the side of the hole transport layer away from the base substrate.
  • step 606 an anode is formed on the side of the hole injection layer away from the base substrate.
  • the QLED can be further packaged to complete the preparation of the QLED, and the QLED as shown in FIG. 3 is obtained.
  • the method for preparing the QLED forms a hole transport layer by doping a target metal oxide in nickel oxide, and uses the target metal oxide as a modifier of the nickel oxide by means of bulk doping. Both methods and surface modification can passivate the surface/bulk defects of the hole transport layer. Furthermore, the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer can be improved, and the luminous intensity of the QLED can be improved. In addition, the service life of quantum dots and photoluminescence quantum yield can be increased, and the performance of QLEDs can be optimized.
  • a metal oxide whose lattice mismatch with nickel oxide is less than a preset value is used to prepare the hole transport layer together with nickel oxide, which can make the nickel oxide and the metal oxide have a better doping effect. good.
  • the metal oxide can be better used as a modifier of nickel oxide, by means of bulk doping and surface modification, to passivate the surface/bulk defects of the hole transport layer. Furthermore, the problem of exciton quenching caused by the quantum dots in the quantum dot layer directly contacting the hole transport layer is improved, and the luminous intensity and photoluminescence quantum yield of the QLED are improved.
  • a metal oxide with a lower valence band energy level than that of nickel oxide is used to prepare the hole transport layer together with nickel oxide, which is comparable to the hole transport layer formed by nickel oxide in the related art.
  • the valence band energy level is lower, which can reduce the hole injection barrier of the hole transport layer.

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Abstract

公开了一种量子点发光二极管及其制备方法、显示面板及显示装置。属于显示技术领域。该量子点发光二极管包括：层叠设置的阳极层(2)、空穴注入层(3)、空穴传输层(4)和量子点层(5)；其中，空穴传输层(4)的膜层材料包括氧化镍和目标金属氧化物的混合物，目标金属氧化物包括除氧化镍以外的至少一种金属氧化物。通过在氧化镍中掺入目标金属氧化物，钝化空穴传输层的表面/体缺陷。

Description

量子点发光二极管及其制备方法、显示面板及显示装置
本申请要求于2020年05月13日提交的申请号为202010402249.0、发明名称为“量子点发光二极管及其制备方法、显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别涉及一种量子点发光二极管及其制备方法、显示面板及显示装置。
背景技术
随着量子点材料的发展、器件结构的不断优化和电荷有效输运等研究的持续深入，量子点发光二极管(Quantum Dot Light Emitting Diode，QLED)显示将超越光致发光的量子点增亮膜和量子点彩色滤光片，有望成为下一代主流显示技术。
发明内容
本申请提供了一种量子点发光二极管及其制备方法、显示面板及显示装置。
一方面，提供了一种量子点发光二极管，包括：层叠设置的阳极层、空穴注入层、空穴传输层和量子点层；
其中，所述空穴传输层的膜层材料包括氧化镍和目标金属氧化物的混合物，所述目标金属氧化物包括除所述氧化镍以外的至少一种金属氧化物。
可选地，所述目标金属氧化物与所述氧化镍的晶格失配度小于预设值。
可选地，所述预设值不大于1％。
可选地，所述目标金属氧化物的价带能级比所述氧化镍的价带能级低。
可选地，所述目标金属氧化物包括氧化镁、氧化铯和氧化锂中的至少一种。
可选地，所述目标金属氧化物均匀分布在所述空穴传输层中。
可选地，所述目标金属氧化物在所述空穴传输层中的掺杂比例范围为1％至50％。
可选地，所述目标金属氧化物为氧化镁，所述氧化镁在所述空穴传输层中 的掺杂比例为3％。
另一方面，提供了一种显示面板，包括如一方面任一所述的量子点发光二极管。
又一方面，提供了一种显示装置，包括供电组件，以及如一方面任一所述的量子点发光二极管或如另一方面所述的显示面板；所述供电组件用于供电。
再一方面，提供了一种量子点发光二极管的制备方法，所述方法包括：
在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传输层和量子点层；其中，所述空穴传输层的膜层材料包括氧化镍和目标金属氧化物的混合物，所述目标金属氧化物包括除所述氧化镍以外的至少一种金属氧化物。
可选地，形成所述空穴传输层，包括：
采用共溅射镍与目标金属氧化物的方式，形成包括氧化镍和目标金属氧化物的混合层。
可选地，所述采用共溅射镍与目标金属氧化物的方式，形成包括氧化镍和目标金属氧化物的混合层，包括：
在第一环境条件下，采用镍靶和目标金属氧化物靶进行共溅射，形成包括氧化镍和目标金属氧化物的混合层；其中，所述第一环境条件包括：环境气体包括氩气和氧气，环境温度处于第一温度范围。
可选地，所述第一温度范围为0℃至55℃。
可选地，在形成包括氧化镍和目标金属氧化物的混合层之后，所述方法还包括：
在第二环境条件下，对所述包括氧化镍和目标金属氧化物的混合层进行退火处理；其中，所述第二环境条件包括：环境气体为空气，环境温度处于第二温度范围。
可选地，所述第二温度范围为100℃至500℃。
可选地，所述在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传输层和量子点层，包括：
在所述衬底基板上形成所述阳极层；
在所述阳极层远离所述衬底基板的一侧形成所述空穴注入层；
在所述空穴注入层远离所述衬底基板的一侧形成所述空穴传输层；
在所述空穴传输层远离所述衬底基板的一侧形成所述量子点层。
可选地，所述在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传 输层和量子点层，包括：
在所述衬底基板上形成所述量子点层；
在所述量子点层远离所述衬底基板的一侧形成所述空穴传输层；
在所述空穴传输层远离所述衬底基板的一侧形成所述空穴注入层；
在所述空穴注入层远离所述衬底基板的一侧形成所述阳极层。
可选地，所述目标金属氧化物的价带能级比所述氧化镍的价带能级低。
可选地，所述目标金属氧化物与所述氧化镍的晶格失配度小于预设值。
附图说明
图1是本申请实施例提供的一种QLED的结构示意图；
图2是本申请实施例提供的另一种QLED的结构示意图；
图3是本申请实施例提供的又一种QLED的结构示意图；
图4是相关技术提供的QLED中空穴传输层与本申请实施例提供的QLED中空穴传输层的能级对比示意图；
图5是本申请实施例提供的一种QLED的制备方法的流程示意图；
图6是本申请实施例提供的另一种QLED的制备方法的流程示意图。
具体实施方式
下面详细描述本申请，本申请的实施例的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的部件。此外，如果已知技术的详细描述对于示出的本申请的特征是不必要的，则将其省略。下面通过参考附图描述的实施例是示例性的，仅用于解释本申请，而不能解释为对本申请的限制。
本技术领域技术人员可以理解，除非另外定义，这里使用的所有术语(包括技术术语和科学术语)，具有与本申请所属领域中的普通技术人员的一般理解相同的意义。还应该理解的是，诸如通用字典中定义的那些术语，应该被理解为具有与现有技术的上下文中的意义一致的意义，并且除非像这里一样被特定定义，否则不会用理想化或过于正式的含义来解释。
本技术领域技术人员可以理解，除非特意声明，这里使用的单数形式“一”、“一个”、“所述”和“该”也可包括复数形式。应该进一步理解的是，本申请的说明书中使用的措辞“包括”是指存在所述特征、整数、步骤、操作、元件和/或组件，但是并不排除存在或添加一个或多个其他特征、整数、步骤、操作、 元件、组件和/或它们的组。这里使用的措辞“和/或”包括一个或更多个相关联的列出项的全部或任一单元和全部组合。
QLED包括层叠设置的阳极层、空穴注入层、空穴传输层、量子点层、电子传输层和阴极层。其中，量子点层的膜层材料包括量子点材料。量子点是把导带电子、价带空穴及激子在三个空间方向上束缚住的半导体纳米结构。
相关技术中，QLED中的空穴传输层(hole transport layer，HTL)通常由氧化镍(NiOx)(x为大于1的整数)形成。氧化镍形成的空穴传输层具有表面缺陷和内部缺陷(以下简称为：表面/体缺陷)。例如，表面缺陷包括表面存在空位。例如，内部缺陷包括内部存在间隙。当量子点直接接触由氧化镍形成的空穴传输层时，由于该空穴传输层的表面/体缺陷会导致激子被捕获，进而导致激子猝灭，影响量子点的正常发光，因此会出现QLED发光强度降低的问题。
本申请实施例提供了一种QLED，通过在氧化镍中掺入其它金属氧化物形成空穴传输层，可以钝化空穴传输层的表面/体缺陷，进而可以减少激子猝灭，提高QLED的发光强度。
下面以具体地实施例对本申请的技术方案以及本申请的技术方案如何解决上述技术问题进行详细说明。
图1是本申请实施例提供的一种QLED的结构示意图。如图1所示，该QLED包括：层叠设置的阳极层2、空穴注入层3、空穴传输层4和量子点层5。
其中，空穴传输层的膜层材料包括氧化镍和目标金属氧化物的混合物。也即是，空穴传输层是氧化镍和目标金属氧化物的混合层。目标金属氧化物包括除氧化镍以外的至少一种金属氧化物。
可选地，图2是本申请实施例提供的另一种QLED的结构示意图。图3是本申请实施例提供的又一种QLED的结构示意图。如图2或图3所示，该QLED还包括电子传输层6和阴极层7。参见图2，该QLED包括沿远离衬底基板1的方向依次层叠设置在衬底基板1上的阳极层2、空穴注入层3、空穴传输层4、量子点层5、电子传输层6和阴极层7。或者，参见图3，该QLED包括沿远离衬底基板1的方向依次层叠设置在衬底基板1上的阴极层7、电子传输层6、量子点层5、空穴传输层4、空穴注入层3和阳极层2。
本申请实施例中，QLED的空穴传输层是氧化镍和目标金属氧化物的混合层。通过在氧化镍中掺入目标金属氧化物形成空穴传输层，将目标金属氧化物作为氧化镍的修饰剂，借助于体掺杂和表面改性两种方式，可以钝化空穴传输 层的表面/体缺陷。进而可以改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度。另外，还可以提高量子点的使用寿命和光致发光量子产率(photoluminescence quantum yield，PLQY)，优化了QLED的性能。
可选地，目标金属氧化物与氧化镍的晶格失配度小于预设值。例如，该预设值不大于1％。
本申请实施例中，选用与氧化镍的晶格失配度小于预设值的金属氧化物来和氧化镍共同制备空穴传输层，可以使氧化镍与该金属氧化物的掺杂效果较好。该金属氧化物可以更好地作为氧化镍的修饰剂，借助于体掺杂和表面改性两种方式，钝化空穴传输层的表面/体缺陷。进而改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度和光致发光量子产率。
可选地，目标金属氧化物的价带能级比氧化镍的价带能级低。目标金属氧化物的价带能级比氧化镍的价带能级低，也即是，目标金属氧化物的价带能级比氧化镍的价带能级深。价带能级越低(或越深)，则该价带能级的绝对值越大。
本申请实施例中，选用价带能级比氧化镍的价带能级低的金属氧化物来和氧化镍共同制备空穴传输层，与相关技术中由氧化镍形成的空穴传输层相比，本申请实施例提供的空穴传输层的价带能级更低，可以减小空穴传输层的空穴注入势垒。从而减少聚集在空穴传输层与量子点层之间的空穴的数量(即减少空穴积累)，使更多的空穴进入量子点层与电子形成激子进而发光，进一步提高QLED的发光强度和光致发光量子产率。另外，在量子点层中的电子数量较多的场景下，还可以实现量子点层中的载流子均衡。
可选地，目标金属氧化物包括氧化镁(MgO)、氧化铯(Cs 2O)和氧化锂(Li 2O)中的至少一种。也即是，目标金属氧化物可以是氧化镁、氧化铯或氧化锂；或者也可以是氧化镁、氧化铯和氧化锂中的至少两种的混合。氧化镁、氧化铯和氧化锂均与氧化镍的晶格失配度小于1％。其中，氧化镁与氧化镍的晶格失配度为0.8％。氧化镁、氧化铯和氧化锂的价带能级也均比氧化镍的价带能级低。其中，氧化镁的价带能级比氧化镍的价带能级低0.9电子伏特(eV)。
本申请实施例中，选用与氧化镍的晶格失配度小于预设值且价带能级比氧化镍的价带能级低的金属氧化物来和氧化镍共同制备空穴传输层。一方面，能使氧化镍与该金属氧化物的掺杂效果较好，更好地钝化空穴传输层的表面/体缺 陷。进而改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度和光致发光量子产率。另一方面，可以降低空穴传输层的价带能级，减小空穴传输层的空穴注入势垒。从而减少聚集在空穴传输层与量子点层之间的空穴的数量，使更多的空穴进入量子点层与电子形成激子进而发光，进一步提高QLED的发光强度和光致发光量子产率。另外，在量子点层中的电子数量较多的场景下，还可以实现量子点层中的载流子均衡。
值得说明的是，本申请实施例在选用目标金属氧化物时，可以选择与氧化镍的晶格失配度小于预设值，和/或，价带能级比氧化镍的价带能级低的金属氧化物。除了上述氧化镁、氧化铯和氧化锂以外，其它满足条件的金属氧化物均可用来和氧化镍共同制备空穴传输层，本申请实施例对所选用的金属氧化物的具体种类不做限定。
可选地，目标金属氧化物均匀分布在空穴传输层中。也即是，目标金属氧化物与氧化镍均匀混合。可以达到较好的掺杂效果，以钝化空穴传输层的表面/体缺陷。
可选地，目标金属氧化物在空穴传输层中的掺杂比例为1％-50％。可以达到更好的掺杂效果。例如，目标金属氧化物在空穴传输层中的掺杂比例可以选用3％。
下面以在氧化镍中掺杂氧化镁为例，对本申请实施例提升QLED的性能的原理进行说明。
例如，图4是相关技术提供的QLED中空穴传输层与本申请实施例提供的QLED中空穴传输层的能级对比示意图。其中，纵坐标表示能级，单位是eV。相关技术中的空穴传输层为氧化镍层。本申请实施例中的空穴传输层为氧化镍和氧化镁的混合层。图中长方形框的底部表示价带能级的大小。如图4所示，氧化镍层的价带能级为-5.2eV，由于氧化镁的价带能级比氧化镍的价带能级低，因此氧化镍和氧化镁的混合层的价带能级比氧化镍层的价带能级低，因此氧化镍和氧化镁的混合层的价带能级低于-5.2eV。由于氧化镍和氧化镁的混合层的价带能级比氧化镍层的价带能级低，因此氧化镍和氧化镁的混合层的空穴注入势垒小于氧化镍层的空穴注入势垒。与相关技术中的空穴传输层相比，由于本申请实施例中的空穴传输层的空穴注入势垒小，从而能够使更多的空穴进入量子点层与电子形成激子进而发光，提高QLED的发光强度和光致发光量子产率。
可选地，本申请实施例提供的QLED可以是含镉(Cd)的QLED，或者， 也可以是不含镉的QLED。
综上所述，本申请实施例提供的QLED，通过在氧化镍中掺入目标金属氧化物形成空穴传输层，将目标金属氧化物作为氧化镍的修饰剂，借助于体掺杂和表面改性两种方式，可以钝化空穴传输层的表面/体缺陷。进而可以改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度。另外，还可以提高量子点的使用寿命和光致发光量子产率，优化了QLED的性能。
在可选实现方式中，选用与氧化镍的晶格失配度小于预设值的金属氧化物来和氧化镍共同制备空穴传输层，可以使氧化镍与该金属氧化物的掺杂效果较好。该金属氧化物可以更好地作为氧化镍的修饰剂，借助于体掺杂和表面改性两种方式，钝化空穴传输层的表面/体缺陷。进而改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度和光致发光量子产率。
在可选实现方式中，选用价带能级比氧化镍的价带能级低的金属氧化物来和氧化镍共同制备空穴传输层，与相关技术中由氧化镍形成的空穴传输层相比，本申请实施例提供的空穴传输层的价带能级更低，可以减小空穴传输层的空穴注入势垒。从而减少聚集在空穴传输层与量子点层之间的空穴的数量(即减少空穴积累)，使更多的空穴进入量子点层与电子形成激子进而发光，进一步提高QLED的发光强度和光致发光量子产率。另外，在量子点层中的电子数量较多的场景下，还可以实现量子点层中的载流子均衡。
基于同一发明构思，本申请实施例还提供了一种显示面板，包括本申请实施例提供的QLED。
可选地，该显示面板可以是电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
基于同一发明构思，本申请实施例又提供了一种显示装置，包括供电组件，以及本申请实施例提供的QLED或本申请实施例提供的显示面板；该供电组件用于供电。该供电组件可以是电源。
可选地，该显示装置可以是电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
基于同一发明构思，本申请实施例再提供了一种QLED的制备方法。该方法包括如下步骤：在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传输层和量子点层。其中，空穴传输层的膜层材料包括氧化镍和目标金属氧化物的混合物。目标金属氧化物包括除氧化镍以外的至少一种金属氧化物。通过该方法可以制备得到如图1所示的QLED。
在本申请的一个可选实施例中，采用本申请实施例提供的QLED的制备方法可以制备得到如图2所示的QLED。图5是本申请实施例提供的一种QLED的制备方法的流程示意图。如图5所示，该方法包括以下工作过程：
在步骤501中，在衬底基板上形成阳极层。
可选地，衬底基板的材质为玻璃。在衬底基板上形成阳极层之前，先将衬底基板进行清洗，再采用氧化铟锡(indium tin oxide，ITO)通过蒸镀的方式在衬底基板上形成阳极层。
在步骤502中，在阳极层远离衬底基板的一侧形成空穴注入层。
可选地，空穴注入材料为PEDOT：PSS。其中，PEDOT：PSS是一种高分子聚合物的水溶液，具有高导电率。根据不同的配方，可以得到导电率不同的水溶液。PEDOT：PSS是由PEDOT和PSS两种物质构成。PEDOT是EDOT(3，4-乙烯二氧噻吩单体)的聚合物，PSS是聚苯乙烯磺酸盐。
可选地，采用空穴注入材料通过旋涂的方式在阳极层远离衬底基板的一侧沉积形成空穴注入层。
在步骤503中，在空穴注入层远离衬底基板的一侧形成空穴传输层。
可选地，在空穴注入层远离衬底基板的一侧，采用共溅射镍与目标金属氧化物的方式，形成包括氧化镍和目标金属氧化物的混合层。其中，共溅射(co-sputtering)是指共同溅射，通常表示将两种或两种以上靶材同时进行溅射。
本申请实施例中，采用共溅射镍与目标金属氧化物的方式形成空穴传输层，可以使得目标金属氧化物的掺杂深度等于氧化镍的溅射厚度。该方式可以在形成氧化镍的同时进行目标金属氧化物的掺杂，使得目标金属氧化物可以均匀掺杂在氧化镍中。例如，氧化镁的掺杂与氧化镍的形成是同时进行的，溅射出的氧化镁可以均匀掺杂在氧化镍中。
例如，可以在第一环境条件下，采用镍靶和目标金属氧化物靶进行共溅射，形成包括氧化镍和目标金属氧化物的混合层。其中，第一环境条件包括：环境 气体包括氩气(Ar)和氧气(O 2)，环境温度处于第一温度范围。可选地，该第一温度范围为0℃至55℃。
本申请实施例中，在氩气和氧气的环境中，在空穴注入层远离衬底基板的一侧共溅射镍和目标金属氧化物，在镍和氧气反应形成氧化镍的过程中完成目标金属氧化物的掺杂，可以保证目标金属氧化物的掺杂深度和掺杂均匀性。
可选地，在空穴注入成远离衬底基板的一侧形成包括氧化镍和目标金属氧化物的混合层之后，还可以在第二环境条件下，对包括氧化镍和目标金属氧化物的混合层进行退火处理。其中，第二环境条件包括：环境气体为空气，环境温度处于第二温度范围。可选地，第二温度范围为100℃至500℃。
本申请实施例中，对包括氧化镍和目标金属氧化物的混合层进行退火处理，可以提高该混合层的结晶性，进而提高制备得到的空穴传输层的结构稳定性。
在步骤504中，在空穴传输层远离衬底基板的一侧形成量子点层。
可选地，采用量子点材料通过旋涂的方式在空穴传输层远离衬底基板的一侧沉积形成量子点层。
可选地，在步骤504之后，还可以执行如下步骤：
在步骤505中，在量子点层远离衬底基板的一侧形成电子传输层。
可选地，电子传输层的制备材料包括氧化锌(ZnO)纳米颗粒。可选地，通过旋涂的方式在量子点层远离衬底基板的一侧沉积形成电子传输层。
在步骤506中，在电子传输层远离衬底基板的一侧形成阴极层。
可选地，阴极层的制备材料包括铝(Al)。可选地，通过蒸镀的方式在电子传输层远离衬底基板的一侧形成阴极层。
可选地，阴极层为金属薄层。阴极层的厚度范围为500至1000纳米。
在形成阴极层之后，可以进一步封装完成QLED的制备，得到如图2所示的QLED。
上述工作过程中，空穴注入层、量子点层、电子传输层和阴极层也可通过喷墨打印的方式制备得到，本申请实施例对此不做限定。
在本申请的另一个可选实施例中，采用本申请实施例提供的QLED的制备方法可以制备得到如图3所示的QLED。图6是本申请实施例提供的另一种QLED的制备方法的流程示意图。如图6所示，该方法包括以下工作过程：
在步骤601中，在衬底基板上形成阴极层。
在步骤602中，在阴极层远离衬底基板的一侧形成电子传输层。
在步骤603中，在电子传输层远离衬底基板的一侧形成量子点层。
在步骤604中，在量子点层远离衬底基板的一侧形成空穴传输层。
在步骤605中，在空穴传输层远离衬底基板的一侧形成空穴注入层。
在步骤606中，在空穴注入层远离衬底基板的一侧形成阳极。
在形成阳极层之后，可以进一步封装完成QLED的制备，得到如图3所示的QLED。
上述步骤601至步骤606中各个膜层的制备方式可分别对应参考上述步骤501至步骤506，本申请实施例在此不再赘述。
值得说明的是，本申请的方法实施例中涉及的各个膜层的结构和作用可参考上述结构实施例的相关描述，本申请实施例在此不再一一赘述。
综上所述，本申请实施例提供的QLED的制备方法，通过在氧化镍中掺入目标金属氧化物形成空穴传输层，将目标金属氧化物作为氧化镍的修饰剂，借助于体掺杂和表面改性两种方式，可以钝化空穴传输层的表面/体缺陷。进而可以改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度。另外，还可以提高量子点的使用寿命和光致发光量子产率，优化了QLED的性能。
在可选实现方式中，选用与氧化镍的晶格失配度小于预设值的金属氧化物来和氧化镍共同制备空穴传输层，可以使氧化镍与该金属氧化物的掺杂效果较好。该金属氧化物可以更好地作为氧化镍的修饰剂，借助于体掺杂和表面改性两种方式，钝化空穴传输层的表面/体缺陷。进而改善量子点层中的量子点直接接触空穴传输层时导致激子猝灭的问题，提高QLED的发光强度和光致发光量子产率。
在可选实现方式中，选用价带能级比氧化镍的价带能级低的金属氧化物来和氧化镍共同制备空穴传输层，与相关技术中由氧化镍形成的空穴传输层相比，本申请实施例提供的空穴传输层的价带能级更低，可以减小空穴传输层的空穴注入势垒。从而减少聚集在空穴传输层与量子点层之间的空穴的数量(即减少空穴积累)，使更多的空穴进入量子点层与电子形成激子进而发光，进一步提高QLED的发光强度和光致发光量子产率。另外，在量子点层中的电子数量较多的场景下，还可以实现量子点层中的载流子均衡。
本技术领域技术人员可以理解，本申请中已经讨论过的各种操作、方法、 流程中的步骤、措施、方案可以被交替、更改、组合或删除。进一步地，具有本申请中已经讨论过的各种操作、方法、流程中的其他步骤、措施、方案也可以被交替、更改、重排、分解、组合或删除。进一步地，现有技术中的具有与本申请中公开的各种操作、方法、流程中的步骤、措施、方案也可以被交替、更改、重排、分解、组合或删除。
在本申请的描述中，需要理解的是，术语“中心”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
在本申请的描述中，除非另有说明，“至少一个”的含义是一个或多个。“多个”的含义是两个或两个以上。
在本说明书的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
应该理解的是，虽然附图的流程图中的各个步骤按照箭头的指示依次显示，但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明，这些步骤的执行并没有严格的顺序限制，其可以以其他的顺序执行。而且，附图的流程图中的至少一部分步骤可以包括多个子步骤或者多个阶段，这些子步骤或者阶段并不必然是在同一时刻执行完成，而是可以在不同的时刻执行，其执行顺序也不必然是依次进行，而是可以与其他步骤或者其他步骤的子步骤或者阶段的至少一部分轮流或者交替地执行。
以上所述仅是本申请的部分实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (20)

  1. 一种量子点发光二极管，包括：层叠设置的阳极层(2)、空穴注入层(3)、空穴传输层(4)和量子点层(5)；
    其中，所述空穴传输层(4)的膜层材料包括氧化镍和目标金属氧化物的混合物，所述目标金属氧化物包括除所述氧化镍以外的至少一种金属氧化物。
  2. 根据权利要求1所述的量子点发光二极管，所述目标金属氧化物与所述氧化镍的晶格失配度小于预设值。
  3. 根据权利要求2所述的量子点发光二极管，所述预设值不大于1％。
  4. 根据权利要求1至3任一所述的量子点发光二极管，所述目标金属氧化物的价带能级比所述氧化镍的价带能级低。
  5. 根据权利要求1至4任一所述的量子点发光二极管，所述目标金属氧化物包括氧化镁、氧化铯和氧化锂中的至少一种。
  6. 根据权利要求1至5任一所述的量子点发光二极管，所述目标金属氧化物均匀分布在所述空穴传输层(4)中。
  7. 根据权利要求1至6任一所述的量子点发光二极管，所述目标金属氧化物在所述空穴传输层(4)中的掺杂比例范围为1％至50％。
  8. 根据权利要求7所述的量子点发光二极管，所述目标金属氧化物为氧化镁，所述氧化镁在所述空穴传输层(4)中的掺杂比例为3％。
  9. 一种显示面板，包括如权利要求1至8任一所述的量子点发光二极管。
  10. 一种显示装置，包括供电组件，以及如权利要求1至8中任一所述的量子点发光二极管或如权利要求9所述的显示面板；所述供电组件用于供电。
  11. 一种量子点发光二极管的制备方法，所述方法包括：
    在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传输层和量子点层；其中，所述空穴传输层的膜层材料包括氧化镍和目标金属氧化物的混合物，所述目标金属氧化物包括除所述氧化镍以外的至少一种金属氧化物。
  12. 根据权利要求11所述的量子点发光二极管的制备方法，形成所述空穴传输层，包括：
    采用共溅射镍与目标金属氧化物的方式，形成包括氧化镍和目标金属氧化物的混合层。
  13. 根据权利要求12所述的量子点发光二极管的制备方法，所述采用共溅射镍与目标金属氧化物的方式，形成包括氧化镍和目标金属氧化物的混合层，包括：
    在第一环境条件下，采用镍靶和目标金属氧化物靶进行共溅射，形成包括氧化镍和目标金属氧化物的混合层；其中，所述第一环境条件包括：环境气体包括氩气和氧气，环境温度处于第一温度范围。
  14. 根据权利要求13所述的量子点发光二极管的制备方法，所述第一温度范围为0℃至55℃。
  15. 根据权利要求12至14任一所述的量子点发光二极管的制备方法，在形成包括氧化镍和目标金属氧化物的混合层之后，所述方法还包括：
    在第二环境条件下，对所述包括氧化镍和目标金属氧化物的混合层进行退火处理；其中，所述第二环境条件包括：环境气体为空气，环境温度处于第二温度范围。
  16. 根据权利要求15所述的量子点发光二极管的制备方法，所述第二温度范围为100℃至500℃。
  17. 根据权利要求11至16任一所述的量子点发光二极管的制备方法，所述在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传输层和量子点层，包括：
    在所述衬底基板上形成所述阳极层；
    在所述阳极层远离所述衬底基板的一侧形成所述空穴注入层；
    在所述空穴注入层远离所述衬底基板的一侧形成所述空穴传输层；
    在所述空穴传输层远离所述衬底基板的一侧形成所述量子点层。
  18. 根据权利要求11至16任一所述的量子点发光二极管的制备方法，所述在衬底基板上形成层叠设置的阳极层、空穴注入层、空穴传输层和量子点层，包括：
    在所述衬底基板上形成所述量子点层；
    在所述量子点层远离所述衬底基板的一侧形成所述空穴传输层；
    在所述空穴传输层远离所述衬底基板的一侧形成所述空穴注入层；
    在所述空穴注入层远离所述衬底基板的一侧形成所述阳极层。
  19. 根据权利要求11至18任一所述的量子点发光二极管的制备方法，所述目标金属氧化物的价带能级比所述氧化镍的价带能级低。
  20. 根据权利要求11至19任一所述的量子点发光二极管的制备方法，所述目标金属氧化物与所述氧化镍的晶格失配度小于预设值。
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