WO2021208217A1 - 显示面板及其制作方法 - Google Patents

显示面板及其制作方法 Download PDF

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Publication number
WO2021208217A1
WO2021208217A1 PCT/CN2020/094846 CN2020094846W WO2021208217A1 WO 2021208217 A1 WO2021208217 A1 WO 2021208217A1 CN 2020094846 W CN2020094846 W CN 2020094846W WO 2021208217 A1 WO2021208217 A1 WO 2021208217A1
Authority
WO
WIPO (PCT)
Prior art keywords
hollow
layer
width
sealant
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2020/094846
Other languages
English (en)
French (fr)
Inventor
彭邦银
金一坤
白柏
宋彦君
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
TCL China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TCL China Star Optoelectronics Technology Co Ltd filed Critical TCL China Star Optoelectronics Technology Co Ltd
Priority to US17/047,646 priority Critical patent/US12085816B2/en
Publication of WO2021208217A1 publication Critical patent/WO2021208217A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/28—Adhesive materials or arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • This application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof.
  • 8K 120HZ needs to design more traces such as clock signal line (CK) and smaller resistance impedance in driving circuits such as GOA to reduce trace heating caused by high frequency operation (WOA; Wire on array), which requires wider GOA circuits and wider CK traces, resulting in the inability to meet the needs of narrow bezels.
  • CK clock signal line
  • WOA Wire on array
  • the embodiment of the present application provides a display panel and a manufacturing method thereof, so as to solve the problem that the existing sealant is disposed on the CK trace (on In the structure design of the bus line), because the line spacing is too small, the sealant for sealing the liquid crystal is incompletely cured during UV curing, which leads to technical problems such as liquid crystal contamination or insufficient overall adhesion of the sealant.
  • the present application provides a display panel, including an encapsulation area and a sealant area adjacent to the encapsulation area, and the display panel includes:
  • a first substrate and a second substrate disposed opposite to each other;
  • the driving circuit layer is arranged on the side of the first substrate close to the second substrate, and the driving circuit layer includes a driving unit sublayer located in the packaging area, and connected to and extending from the driving unit sublayer To the wiring sub-layer in the frame rubber area;
  • the liquid crystal layer is disposed between the first substrate and the second substrate and corresponds to the packaging area;
  • the sealant layer is disposed between the wiring sublayer and the second substrate and is adjacent to the packaging area
  • the wiring sublayer includes a plurality of metal wirings parallel to each other, and any two adjacent metal wirings are provided with a hollow part, and each hollow part is close to the sealant layer and The width of the hollow portion at the junction of the liquid crystal layer is greater than or equal to the width of any other hollow portion.
  • each of the hollow parts is divided into at least two hollow groups, and each hollow group includes at least one hollow part.
  • each hollow group includes at least one hollow part.
  • any two groups of the hollow groups one The width of any one of the hollow parts in the hollow group close to the junction of the sealant layer and the liquid crystal layer is larger than that of the other hollow part far from the junction of the sealant layer and the liquid crystal layer The width of any of the hollow parts.
  • the width of each hollow portion is equal.
  • the number of the hollowed-out groups is two groups, one of which is close to the width of the hollowed-out part in the hollowed-out group at the junction of the sealant layer and the liquid crystal layer Equal to the width of the metal trace.
  • the hollow set near the junction of the sealant layer and the liquid crystal layer includes one hollow portion, and two holes on both sides of the hollow portion
  • the metal traces are respectively located in the packaging area and the seal area.
  • the number of the hollowed-out groups is four groups, wherein the width of the hollowed-out part in the hollowed-out group near the junction of the sealant layer and the liquid crystal layer It is greater than or equal to 40% of the width of the metal trace.
  • the width of one of the hollow portions near the junction of the sealant layer and the liquid crystal layer is greater than the width of the other hollow portion away from each other. The width of the hollow part at the junction of the sealant layer and the liquid crystal layer.
  • the width of any of the hollow portions is greater than or equal to 10% of the width of the metal trace.
  • the present application also provides another display panel, including an encapsulation area and a sealant area adjacent to the encapsulation area, and the display panel includes:
  • a first substrate and a second substrate disposed opposite to each other;
  • the driving circuit layer is arranged on the side of the first substrate close to the second substrate, and the driving circuit layer includes a driving unit sublayer located in the packaging area, and connected to and extending from the driving unit sublayer To the wiring sub-layer in the frame rubber area;
  • the liquid crystal layer is disposed between the first substrate and the second substrate and corresponds to the packaging area;
  • the sealant layer is disposed between the wiring sublayer and the second substrate and is adjacent to the packaging area
  • the wiring sublayer includes a plurality of metal wirings parallel to each other, and any two adjacent metal wirings are provided with a hollow part, and each hollow part is close to the sealant layer and
  • the width of the hollow portion at the junction of the liquid crystal layer is greater than or equal to the width of any other hollow portion, and the width of any hollow portion is greater than or equal to 10% of the width of the metal trace.
  • each of the hollow parts is divided into at least two hollow groups, and each hollow group includes at least one hollow part.
  • each hollow group includes at least one hollow part.
  • any two groups of the hollow groups one The width of any one of the hollow parts in the hollow group close to the junction of the sealant layer and the liquid crystal layer is larger than that of the other hollow part far from the junction of the sealant layer and the liquid crystal layer The width of any of the hollow parts.
  • the width of each hollow portion is equal.
  • the number of the hollowed-out groups is two groups, one of which is close to the width of the hollowed-out part in the hollowed-out group at the junction of the sealant layer and the liquid crystal layer Equal to the width of the metal trace.
  • the hollow set near the junction of the sealant layer and the liquid crystal layer includes one hollow portion, and two holes on both sides of the hollow portion
  • the metal traces are respectively located in the packaging area and the seal area.
  • the number of the hollowed-out groups is four groups, wherein the width of the hollowed-out part in the hollowed-out group near the junction of the sealant layer and the liquid crystal layer It is greater than or equal to 40% of the width of the metal trace.
  • the width of one of the hollow portions near the junction of the sealant layer and the liquid crystal layer is greater than the width of the other hollow portion away from each other. The width of the hollow part at the junction of the sealant layer and the liquid crystal layer.
  • the present application also provides a method for manufacturing a display panel.
  • the display panel includes an encapsulation area and a sealant area adjacent to the encapsulation area.
  • the method for manufacturing the display panel includes the following steps:
  • a first substrate is provided, and a driving circuit layer is formed on the substrate.
  • the driving circuit layer includes a driving unit sublayer formed in the packaging area, and a driving unit sublayer connected to the driving unit sublayer and extending to the frame
  • a second substrate is provided, a sealant layer adjacent to the encapsulation area is formed on the wiring sublayer, and the second substrate and the first substrate are paired and fixedly connected by the sealant layer , A liquid crystal layer corresponding to the encapsulation area is formed between the first substrate and the second substrate; wherein, in each of the hollow portions, the one near the junction of the sealant layer and the liquid crystal layer The width of the hollow part is greater than or equal to the width of any other hollow part.
  • the forming a sealant layer corresponding to the sealant area on the wiring sublayer includes:
  • a heating step is adopted for the sealant to completely cure the sealant, so as to form a sealant layer corresponding to the sealant area on the wiring sub-layer.
  • the beneficial effect of the present application is: by setting the width of the hollow portion near the junction of the sealant layer and the liquid crystal layer to be greater than or equal to the width of any other hollow portion;
  • the hollowing rate of the layer at the junction of the sealant layer and the liquid crystal layer makes the part of the sealant layer close to the liquid crystal layer completely cured, and the sealing liquid layer is well sealed to avoid Contamination of the liquid crystal layer; and the overall structure has little influence on the original manufacturing process in the manufacturing process, and is suitable for mass production.
  • FIG. 1 is a schematic diagram of a structure of a display panel in an embodiment of the application
  • FIG. 2 is a schematic structural diagram of another display panel in an embodiment of the application.
  • FIG. 3 is a schematic block diagram of a process flow of a method for manufacturing a display panel in an embodiment of the application.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present application, “multiple” means two or more than two, unless otherwise specifically defined.
  • connection should be understood in a broad sense, unless otherwise clearly specified and limited.
  • it can be a fixed connection or a detachable connection.
  • Connected or integrally connected it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two components or the interaction of two components relation.
  • an intermediate medium it can be the internal communication of two components or the interaction of two components relation.
  • the "on" or “under” of the first feature of the second feature may include direct contact between the first and second features, or may include the first and second features Not in direct contact but through other features between them.
  • the "above”, “above” and “above” of the first feature on the second feature include the first feature directly above and obliquely above the second feature, or it simply means that the first feature is higher in level than the second feature.
  • the “below”, “below” and “below” of the second feature of the first feature include the first feature directly below and obliquely below the second feature, or it simply means that the level of the first feature is smaller than the second feature.
  • the present application provides a display panel, as shown in FIG. 1 to FIG. 2, which includes an encapsulation area 2 and a sealant area 1 adjacent to the encapsulation area 2.
  • the display panel includes:
  • the driving circuit layer 300 is disposed on the side of the first substrate 100 close to the second substrate 200.
  • the driving circuit layer 300 includes a driving unit sub-layer 310 located in the packaging area 2 and the driving The unit sub-layer 310 is connected and extends to the wiring sub-layer 320 in the sealant area 1;
  • the liquid crystal layer 400 is disposed between the first substrate 100 and the second substrate 200 and corresponds to the packaging area 2;
  • the sealant layer 500 is disposed between the wiring sub-layer 320 and the second substrate 200 and is adjacent to the packaging area 2;
  • the wiring sublayer 320 includes a plurality of metal wirings 321 parallel to each other, and any two adjacent metal wirings 321 are provided with a hollow portion 322, and each of the hollow portions 322 is close to each other.
  • the width of the hollow portion 322 at the junction of the sealant layer 500 and the liquid crystal layer 400 is greater than or equal to the width of any other hollow portion 322.
  • the width of the hollow portion 322 near the junction of the sealant layer 500 and the liquid crystal layer 400 is set to be greater than or equal to the width of any other hollow portion 322; that is, The hollow part 322 with the largest width among the hollow parts 322 is correspondingly disposed at a position close to the junction of the sealant layer 500 and the liquid crystal layer 400, thereby improving the wiring sublayer 320 in the frame.
  • the hollow rate at the junction of the adhesive layer 500 and the liquid crystal layer 400 is convenient to ensure that the sealant layer 500 is completely closed when the sealant layer 500 is cured by ultraviolet light. Curing to achieve a certain encapsulation effect on the liquid crystal layer 400.
  • the hollow rate of the wiring sublayer 320 at the junction of the sealant layer 500 and the liquid crystal layer 400 is greater than or equal to 40%, that is, The width of the hollow portion 322 with the largest width in the hollow portion 322 is greater than or equal to 40% of the width of the metal trace 321.
  • the driving circuit layer 300 may specifically be a GOA driving circuit
  • the first substrate 100 is provided with a TFT array layer connected to the driving circuit layer 300 and located in the packaging area 2 (Not shown in the figure), in order to ensure the narrow frame design of the display panel, the sealant layer 500 is disposed on the wiring sublayer 320, which reduces the requirement on the frame width of the display panel.
  • the metal traces 321 are arranged at non-equal intervals, and the width of the hollow portion 322 at different positions is adjusted so that different positions on the trace sublayer 320 have Different hollow ratios, and the hollow portion 322 with the largest width is correspondingly arranged at a position close to the junction of the sealant layer 500 and the liquid crystal layer 400, which is convenient for the production process to fully ensure that the UV light
  • the part of the sealant layer 500 that is close to the liquid crystal layer 400 is completely cured.
  • a heating step can be subsequently used to gradually cure it.
  • each of the hollow parts 322 is divided into at least two hollow groups 30, and each hollow group 30 includes at least one hollow part 322.
  • any two groups of the hollow groups 30, one of them is close to
  • the width of any one of the hollow portions 322 in the hollow group 30 at the junction of the sealant layer 500 and the liquid crystal layer 400 is greater than the other one that is far away from the junction between the sealant layer 500 and the liquid crystal layer 400
  • the width of any one of the hollow parts 322 in the hollow group 30 Obviously, in this arrangement of grouping the hollow portions 322, different hollowing groups 30 have different hollowing rates. It is understandable that in any two groups of hollowing groups 30, one of them is close to the hollowing group 30.
  • the width of any one of the hollow portions 322 in the hollow group 30 at the junction of the sealant layer 500 and the liquid crystal layer 400 is larger than the other one that is far away from the junction between the sealant layer 500 and the liquid crystal layer 400
  • the width of any one of the hollow portions 322 in the hollow group 30, that is, the width of the hollow portions 322 in each of the hollow groups 30 is based on the hollow group 30, the sealant layer 500 and the liquid crystal layer
  • the distance of the position of the junction 400 is set. Specifically, the closer to the junction of the sealant layer 500 and the liquid crystal layer 400, the greater the width of the hollow portion 322 in the hollow group 30.
  • the width of each hollow part 322 is equal, which can ensure that the metal traces 321 in one hollow group 30 are equal. Spaced evenly.
  • the number of the hollow groups 30 is two groups, one of which is close to the junction of the sealant layer 500 and the liquid crystal layer 400 in the hollow group 30
  • the width of the hollow portion 322 is equal to the width of the metal trace 321; obviously, each hollow portion 322 is divided into two hollow groups 30, so that the hollow rate of the two hollow groups 30 is greatly different.
  • One of the hollowed-out groups 30 far away from the junction of the frame glue layer 500 and the liquid crystal layer 400 has a lower hollowing rate, that is, the metal wires 321 in the hollowed-out group 30 are arranged closely to facilitate Space is reserved for another hollow group 30 near the junction of the frame glue layer 500 and the liquid crystal layer 400, so that the width of the hollow portion 322 in the hollow group 30 is equal to the width of the metal The width of the line 321. At this time, the hollowing rate of the hollowed-out group 30 is 100%.
  • the width of the hollowed-out portion 322 in the hollowed-out group 30 may also be greater than the width of the metal trace 321;
  • the hollow group 30 near the junction of the frame glue layer 500 and the liquid crystal layer 400 includes only one hollow portion 322, and the two metal portions on both sides of the hollow portion 322 are removed.
  • the wires 321 are located in the encapsulation area 2 and the sealant area 1 respectively; when the sealant layer 500 is cured by ultraviolet light, the sealant layer 500 on the side close to the liquid crystal layer 400 can be Part of it is sufficiently irradiated with ultraviolet light, so that the curing is completed faster, and the liquid crystal layer 400 is easily encapsulated.
  • the number of the hollow groups 30 is four groups, wherein the hollow group 30 near the junction of the sealant layer 500 and the liquid crystal layer 400
  • the width of the hollow portion 322 is greater than or equal to 40% of the width of the metal trace 321, that is, the hollow rate of the hollow group 30 near the junction of the sealant layer 500 and the liquid crystal layer 400 is greater than or equal to 40%, specifically Yes, the hollowing rate of the four hollowing groups 30 can be 10%, 20%, 30%, and 40% in order from small to large.
  • each of the 30 hollowing groups only contains one With regard to the hollow portion 322, it can be understood that when the sealant layer 500 is cured by ultraviolet light, the ultraviolet light passes through the hollow portion 322 and irradiates the sealant layer 500 to make the sealant layer 500 During the curing process, in order to ensure that the sealant layer 500 is fully irradiated, it is necessary to ensure that the hollowing rate of the wiring sublayer 320 reaches at least 40%.
  • the sealant layer 500 is arranged close to the sealant layer.
  • the hollowing rate of the hollowing group 30 at the junction of 500 and the liquid crystal layer 400 is greater than or equal to 40%, so that the part of the sealant layer 500 close to the liquid crystal layer 400 is completely cured during the UV curing process .
  • each of the hollowed-out groups 30 may include a plurality of hollowed-out parts 322, which will not be repeated here.
  • one of the hollow portions 322 near the junction of the sealant layer 500 and the liquid crystal layer 400 has a width greater than The other is far away from the width of the hollow portion 322 at the junction of the sealant layer 500 and the liquid crystal layer 400;
  • the distance between the junction of the liquid crystal layer 400 is positively correlated, that is, the closer the hollow portion 322 is to the junction of the sealant layer 500 and the liquid crystal layer 400, the wider the width, so that the wiring sub-layer 320 goes up and down.
  • the place closer to the junction of the sealant layer 500 and the liquid crystal layer 400 has a greater hollow rate, thereby ensuring that the closer the sealant layer 500 is to the junction of the sealant layer 500 and the liquid crystal layer 400 Part, the more complete the curing by UV light.
  • the width of any of the hollow portions 322 is greater than or equal to 10% of the width of the metal trace 321, that is, the hollow rate of each portion of the trace sublayer 320 is at least greater than or equal to 10%. It is understandable that, as described above, when the sealant layer 500 is cured by ultraviolet light, the ultraviolet light passes through the hollow portion 322 and irradiates the sealant layer 500 to make the sealant layer 500 During this process, in order to ensure that the sealant layer 500 at least produces a certain curing effect, it is necessary to ensure that the hollow rate of the wiring sublayer 320 is at least greater than or equal to 10% to ensure that the ultraviolet light passes through After each of the hollow portions 322, the sealant layer 500 can produce a certain curing effect, and it is also convenient for the subsequent heating process to perform further curing operations on the incompletely cured part of the sealant layer 500.
  • the width of the hollow portion 322 near the junction of the sealant layer 500 and the liquid crystal layer 400 is set to be greater than or equal to the width of any other hollow portion 322;
  • the hollow rate of the wiring sub-layer 320 at the junction of the sealant layer 500 and the liquid crystal layer 400 makes the part of the sealant layer 500 close to the liquid crystal layer 400 completely cured, which is a good match
  • the liquid sealing layer is sealed to avoid contamination of the liquid crystal layer 400.
  • the present application also provides a manufacturing method of a display panel.
  • the display panel includes an encapsulation area 2 and a sealant area 1 adjacent to the encapsulation area 2; the manufacturing method of the display panel includes the following step:
  • Step S10 Provide a first substrate 100, and form a driving circuit layer 300 on the substrate.
  • the driving circuit layer 300 includes a driving unit sublayer 310 formed in the packaging area 2 and the driving unit sublayer 310.
  • the layer 310 is connected and extends to the wiring sub-layer 320 in the sealant area 1;
  • the wiring sub-layer 320 includes a plurality of mutually parallel metal wirings 321, and any one of two adjacent metal wirings 321 Each room is provided with a hollow part 322; and
  • Step S20 Provide a second substrate 200, form a sealant layer 500 adjacent to the packaging area 2 on the wiring sublayer 320, and align the second substrate 200 with the first substrate 100
  • the liquid crystal layer 400 corresponding to the encapsulation area 2 is formed between the first substrate 100 and the second substrate 200 by the sealant layer 500 and fixed connection; wherein, in each of the hollow portions 322
  • the width of the hollow portion 322 near the junction of the sealant layer 500 and the liquid crystal layer 400 is greater than or equal to the width of any other hollow portion 322.
  • the wiring sub-layer 320 may be formed by forming a metal layer on the first substrate 100, and then etching the wiring sub-layer 320 to form a metal layer.
  • Each of the hollow portions 322 is controlled to be etched so that the width of the hollow portion 322 near the junction of the sealant layer 500 and the liquid crystal layer 400 is greater than or equal to any other hollow portion 322.
  • the width of the hollow portion 322 facilitates the subsequent full curing of the part of the sealant layer 500 close to the liquid crystal layer 400 by ultraviolet light.
  • the overall production process adopts a relatively mature process without adding additional processes, and is suitable for mass production.
  • the forming a sealant layer 500 corresponding to the sealant area 1 on the wiring sub-layer 320 includes:
  • a heating step is applied to the sealant to completely cure the sealant, so as to form a sealant layer 500 corresponding to the sealant area 1 on the wiring sub-layer 320.
  • the hollowing rate of the wiring sub-layer 320 near the junction of the sealant layer 500 and the liquid crystal layer 400 is relatively high. It is convenient to completely cure the part of the sealant layer 500 that is close to the liquid crystal layer 400. At this time, the part of the sealant layer 500 that is not close to the liquid crystal layer 400 is due to the corresponding wiring The position of the sub-layer 320 with a low hollow rate makes the part of the sealant layer 500 not close to the liquid crystal layer 400 not fully cured.
  • the present application may also add an additional heating step, such as baking, to make the The sealant layer 500 is completely cured as a whole, so as to meet the requirement of a narrow frame of a display panel with extremely high resolution and high refresh rate such as 8K 120HZ, and at the same time ensure that the sealant layer 500 encapsulates the liquid crystal layer 400. The problem of abnormal display caused by contamination of the liquid crystal layer 400 is avoided.
  • an additional heating step such as baking
  • the beneficial effect of the present application is: by setting the width of the hollow portion 322 near the junction of the sealant layer 500 and the liquid crystal layer 400 to be greater than or equal to the width of any other hollow portion 322;
  • the hollow rate of the wiring sub-layer 320 at the junction of the sealant layer 500 and the liquid crystal layer 400 makes the part of the sealant layer 500 close to the liquid crystal layer 400 completely cured, which is a good match
  • the liquid sealing layer is sealed to avoid contamination of the liquid crystal layer 400; and the overall structure has little influence on the original manufacturing process in the manufacturing process, and is suitable for mass production.

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Abstract

本申请公开了一种显示面板及其制作方法，所述显示面板包括驱动电路层、液晶层和框胶层，所述驱动电路层包括驱动单元子层和走线子层；走线子层包括多条相互平行的金属走线，任一相邻两金属走线之间均设有镂空部，各镂空部中，靠近框胶层与液晶层交界处的镂空部的宽度大于等于任一其它镂空部的宽度。

Description

显示面板及其制作方法 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制作方法。
 背景技术
随着人们生活水平的提高和显示技术的发展，大尺寸液晶电视愈来愈受到消费者的喜爱，同时高分辨率、高对比度、高刷新速率、超窄边框等也成为各电视厂商所追求的亮点和卖点，特别是目前大尺寸液晶面板市场已经全面由4K 60HZ向8K 120HZ转变，要在极高分辨率、高刷新频率情况下，又要保持窄边框的特色，对TFT LCD面板的设计和制造，以及材料需求，均提出了较高的难度和挑战。
8K 120HZ 较4K 60HZ在诸如GOA等驱动电路中需要将诸如时钟信号线（CK）等走线设计更多的数量以及更小的电阻阻抗，以减小高频率工作造成的走线发热（WOA；Wire on array），这就需要更宽的GOA电路和更宽的CK走线，导致无法满足窄边框的需求。
 技术问题
现有设计中，为了减小CK走线的阻抗，通常是增加CK走线的线宽和/或减小CK走线之间的线距，同时采用框胶设置于所述CK走线上（on bus line）的结构设计，此种结构因线距过小即金属镂空率较小，使得密封液晶的框胶在紫外光固化时固化不完全，导致液晶污染或是框胶整体粘着力不足，导致产品品味或性能问题。
 技术解决方案
本申请实施例提供一种显示面板及其制作方法，以解决现有框胶设置于CK走线上（on bus line）的结构设计中，因线距过小使得密封液晶的框胶在紫外光固化时固化不完全，导致液晶污染或是框胶整体粘着力不足的技术问题。
为解决上述问题，本发明提供的技术方案如下：
本申请提供一种显示面板，包括封装区和与所述封装区相邻的框胶区，所述显示面板包括：
相对设置的第一基板和第二基板；
驱动电路层，设置于所述第一基板靠近所述第二基板的一侧，所述驱动电路层包括位于所述封装区内的驱动单元子层、及与所述驱动单元子层相连并延伸至所述框胶区内的走线子层；
液晶层，设置于所述第一基板与所述第二基板之间且与所述封装区相对应；及
框胶层，设置于所述走线子层与所述第二基板之间且与所述封装区相邻接，
其中，所述走线子层包括多条相互平行的金属走线，任一相邻两所述金属走线之间均设有镂空部，各所述镂空部中，靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于等于任一其它所述镂空部的宽度。
在本申请实施例所提供的显示面板中，各所述镂空部至少划分为两镂空组，每一所述镂空组至少包括一所述镂空部，任一两组所述镂空组中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度。
在本申请实施例所提供的显示面板中，任一至少包括两所述镂空部的所述镂空组中，各所述镂空部的宽度均相等。
在本申请实施例所提供的显示面板中，所述镂空组的数量为两组，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度等于所述金属走线的宽度。
在本申请实施例所提供的显示面板中，所述靠近所述框胶层与所述液晶层交界处的所述镂空组包含一个所述镂空部，且该所述镂空部两侧的两所述金属走线分别位于所述封装区内和所述框胶区内。
在本申请实施例所提供的显示面板中，所述镂空组的数量为四组，其中，靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度大于等于所述金属走线宽度的40%。
在本申请实施例所提供的显示面板中，任一相邻两所述镂空部中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空部的宽度。
在本申请实施例所提供的显示面板中，任一所述镂空部的宽度均大于等于所述金属走线宽度的10%。
本申请还提供另一种显示面板，包括封装区和与所述封装区相邻的框胶区，所述显示面板包括：
相对设置的第一基板和第二基板；
驱动电路层，设置于所述第一基板靠近所述第二基板的一侧，所述驱动电路层包括位于所述封装区内的驱动单元子层、及与所述驱动单元子层相连并延伸至所述框胶区内的走线子层；
液晶层，设置于所述第一基板与所述第二基板之间且与所述封装区相对应；及
框胶层，设置于所述走线子层与所述第二基板之间且与所述封装区相邻接，
其中，所述走线子层包括多条相互平行的金属走线，任一相邻两所述金属走线之间均设有镂空部，各所述镂空部中，靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于等于任一其它所述镂空部的宽度，任一所述镂空部的宽度均大于等于所述金属走线宽度的10%。
在本申请实施例所提供的显示面板中，各所述镂空部至少划分为两镂空组，每一所述镂空组至少包括一所述镂空部，任一两组所述镂空组中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度。
在本申请实施例所提供的显示面板中，任一至少包括两所述镂空部的所述镂空组中，各所述镂空部的宽度均相等。
在本申请实施例所提供的显示面板中，所述镂空组的数量为两组，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度等于所述金属走线的宽度。
在本申请实施例所提供的显示面板中，所述靠近所述框胶层与所述液晶层交界处的所述镂空组包含一个所述镂空部，且该所述镂空部两侧的两所述金属走线分别位于所述封装区内和所述框胶区内。
在本申请实施例所提供的显示面板中，所述镂空组的数量为四组，其中，靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度大于等于所述金属走线宽度的40%。
在本申请实施例所提供的显示面板中，任一相邻两所述镂空部中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空部的宽度。
本申请还提供一种显示面板的制作方法，所述显示面板包括封装区和与所述封装区相邻的框胶区；所述显示面板的制作方法包括以下步骤：
提供一第一基板，在所述基板上形成驱动电路层，所述驱动电路层包括形成于所述封装区内的驱动单元子层、及与所述驱动单元子层相连并延伸至所述框胶区内的走线子层；所述走线子层包括多条相互平行的金属走线，任一相邻两所述金属走线之间均设有镂空部；
提供一第二基板，在所述走线子层上形成与所述封装区相邻接的框胶层，将所述第二基板与所述第一基板对合并通过所述框胶层固定连接，在所述第一基板与所述第二基板之间形成与所述封装区相对应的液晶层；其中，各所述镂空部中，靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于等于任一其它所述镂空部的宽度。
在本申请实施例所提供显示面板的制作方法中，所述在所述走线子层上形成与所述框胶区相对应的框胶层，包括：
在所述走线子层上涂布与所述框胶区相对应的框胶，采用紫外光穿过各所述镂空部对所述框胶进行照射，至少使靠近所述封装区一侧的部分所述框胶固化；
对所述框胶采用一加热步骤，使所述框胶完全固化，以在所述走线子层上形成与所述框胶区相对应的框胶层。
 有益效果
本申请的有益效果为：通过将靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度设置为大于等于任一其它所述镂空部的宽度；以保证所述走线子层在所述框胶层与所述液晶层交界处的镂空率，使得所述框胶层中靠近所述液晶层一侧的部分固化完全，很好的对所述封液层进行密封，避免液晶层的污染；并且，整体结构在制作工艺上对原有制作工艺工序影响较小，适于批量生产。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一实施例中一种显示面板的结构示意图；
图2为本申请一实施例中另一种显示面板的结构示意图；及
图3为本申请一实施例中显示面板制作方法的流程示意框图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
现结合具体实施例对本申请的技术方案进行描述。
本申请提供一种显示面板，如图1-图2所示，包括封装区2和与所述封装区2相邻的框胶区1，所述显示面板包括：
相对设置的第一基板100和第二基板200；
驱动电路层300，设置于所述第一基板100靠近所述第二基板200的一侧，所述驱动电路层300包括位于所述封装区2内的驱动单元子层310、及与所述驱动单元子层310相连并延伸至所述框胶区1内的走线子层320；
液晶层400，设置于所述第一基板100与所述第二基板200之间且与所述封装区2相对应；及
框胶层500，设置于所述走线子层320与所述第二基板200之间且与所述封装区2相邻接，
其中，所述走线子层320包括多条相互平行的金属走线321，任一相邻两所述金属走线321之间均设有镂空部322，各所述镂空部322中，靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度大于等于任一其它所述镂空部322的宽度。
可以理解的是，目前，诸如8K 120HZ等极高分辨率、高刷新频率的显示面板中，既需要将GOA驱动电路中诸如时钟信号线（CK）等走线设计更多的数量以及更小的电阻阻抗，以减小高频率工作造成的走线发热，又需要满足窄边框的要求，使得时钟信号线（CK）等走线的排布更为紧密，此种结构因线距过小即金属镂空率低至15%，使得密封液晶的框胶在紫外光固化时无法充足照射从而固化不完全，导致液晶污染或是框胶整体粘着力不足。显然，本申请中，通过将靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度设置为大于等于任一其它所述镂空部322的宽度；也即是将各所述镂空部322中宽度最大的一所述镂空部322对应设置于靠近所述框胶层500与所述液晶层400交界处的位置，从而提高所述走线子层320在所述框胶层500与所述液晶层400交界处的镂空率，便于在通过紫外光对所述框胶层500固化时，充分保证所述框胶层500中靠近所述液晶层400一侧部分的完全固化，实现对所述液晶层400一定的封装效果，具体的，所述走线子层320在所述框胶层500与所述液晶层400交界处的镂空率大于等于40%，也即是所述镂空部322中宽度最大的一所述镂空部322的宽度值大于等于所述金属走线321宽度的40%。
承上，本申请中，所述驱动电路层300具体可以为GOA驱动电路，并且，所述第一基板100设有与所述驱动电路层300连接且位于所述封装区2内的TFT阵列层（图中未出示），为保证所述显示面板的窄边框设计，将所述框胶层500设置于所述走线子层320上，减少了对于所述显示面板边框宽度的要求。
值得注意的是，本申请中是将各所述金属走线321做非等间距的排布，通过调整不同位置的所述镂空部322的宽度，使得所述走线子层320上不同位置具备不同的镂空率，并将宽度最大的所述镂空部322设对应设置于靠近所述框胶层500与所述液晶层400交界处的位置，便于在制作过程中，充分保证通过紫外光对所述框胶层500中靠近所述液晶层400一侧部分的完全固化，此外，对于所述框胶层500中未能完全固化的部分，后续可采用一加热步骤使其逐步固化。
在一实施例中，各所述镂空部322至少划分为两镂空组30，每一所述镂空组30至少包括一所述镂空部322，任一两组所述镂空组30中，其中一靠近所述框胶层500与所述液晶层400交界处的所述镂空组30中的任一所述镂空部322的宽度大于另一远离所述框胶层500与所述液晶层400交界处的所述镂空组30中的任一所述镂空部322的宽度。显然，此种将各所述镂空部322分组的设置方式，不同所述镂空组30中具有不同的镂空率，可以理解的是，任一两组所述镂空组30中，其中一靠近所述框胶层500与所述液晶层400交界处的所述镂空组30中的任一所述镂空部322的宽度大于另一远离所述框胶层500与所述液晶层400交界处的所述镂空组30中的任一所述镂空部322的宽度，也即是各所述镂空组30中所述镂空部322的宽度根据所述镂空组30与所述框胶层500与所述液晶层400交界处的位置的距离进行设置，具体的，越靠近所述框胶层500与所述液晶层400交界处的所述镂空组30中所述镂空部322的宽度越大。此外，在任一至少包括两所述镂空部322的所述镂空组30中，各所述镂空部322的宽度均相等，可以保证在一所述镂空组30中各所述金属走线321呈等间隔均匀分布。
在一实施例中，如图1所示，所述镂空组30的数量为两组，其中一靠近所述框胶层500与所述液晶层400交界处的所述镂空组30中的所述镂空部322的宽度等于所述金属走线321的宽度；显然，将各所述镂空部322划分为两所述镂空组30，使该两所述镂空组30的镂空率具有较大差异化，其中一远离所述框胶层500与所述液晶层400交界处的所述镂空组30的镂空率较低，即将该所述镂空组30中各所述金属走线321进行紧密排布，便于为另一靠近所述框胶层500与所述液晶层400交界处的所述镂空组30预留空间，以使得该所述镂空组30中的所述镂空部322的宽度等于所述金属走线321的宽度，此时，该所述镂空组30的镂空率为100%，当然，该所述镂空组30中的所述镂空部322的宽度也可以大于所述金属走线321的宽度；具体的，该靠近所述框胶层500与所述液晶层400交界处的所述镂空组30中只包含一个所述镂空部322，且该所述镂空部322两侧的两所述金属走线321分别位于所述封装区2内和所述框胶区1内；在通过紫外光固化所述框胶层500时，可以使得所述框胶层500中靠近所述液晶层400一侧的部分受到紫外光充足的照射，从而更快的固化完全，便于对所述液晶层400封装。
在一实施例中，如图2所示，所述镂空组30的数量为四组，其中，靠近所述框胶层500与所述液晶层400交界处的所述镂空组30中的所述镂空部322的宽度大于等于所述金属走线321宽度的40%，即该靠近所述框胶层500与所述液晶层400交界处的所述镂空组30的镂空率大于等于40%，具体的，四组所述所述镂空组30的镂空率从小到大依次可以是10%、20%、30%和40%，如图2所示，各所述镂空组30种均只包含一所述镂空部322，可以理解的是，在采用紫外光固化所述框胶层500时，所述紫外光穿过所述镂空部322照射到所述框胶层500以使所述框胶层500固化，在此过程中，为保证所述框胶层500受到充分照射，需要保证所述走线子层320各处的镂空率至少达到40%，本实施例中，设置靠近所述框胶层500与所述液晶层400交界处的所述镂空组30的镂空率大于等于40%，以便于所述框胶层500中靠近所述液晶层400一侧的部分在紫外光固化过程中完全固化。此外，各所述镂空组30中均可包括多个所述镂空部322，在此不再赘述。
在一实施例中，如图2所示，任一相邻两所述镂空部322中，其中一靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度大于另一远离所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度；可以理解的是，各所述镂空部322的宽度与离所述框胶层500与所述液晶层400交界处的距离呈正相关，即离所述框胶层500与所述液晶层400交界处越近的所述镂空部322，其宽度越宽，从而使得所述走线子层320上越靠近所述框胶层500与所述液晶层400交界处的地方具备的镂空率越大，从而保证了所述框胶层500中越靠近所述框胶层500与所述液晶层400交界处的部分，通过紫外光固化的越完全。
在一实施例中，任一所述镂空部322的宽度均大于等于所述金属走线321宽度的10%，即所述走线子层320各处的镂空率至少大于等于10%。可以理解的是，如前所述，在采用紫外光固化所述框胶层500时，所述紫外光穿过所述镂空部322照射到所述框胶层500以使所述框胶层500固化，在此过程中，为保证所述框胶层500至少产生一定的固化效果，需要保证所述走线子层320各处的镂空率至少大于等于10%，以保证所述紫外光穿过各所述镂空部322后，均能使所述框胶层500产生一定的固化效果，也便于后续采用加热工艺对所述框胶层500中固化不完全的部分进行进一步固化操作。
综上，本申请显示面板通过将靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度设置为大于等于任一其它所述镂空部322的宽度；以保证所述走线子层320在所述框胶层500与所述液晶层400交界处的镂空率，使得所述框胶层500中靠近所述液晶层400一侧的部分固化完全，很好的对所述封液层进行密封，避免液晶层400的污染。
本申请还提供一种显示面板的制作方法，如图3所示，所述显示面板包括封装区2和与所述封装区2相邻的框胶区1；所述显示面板的制作方法包括以下步骤：
步骤S10：提供一第一基板100，在所述基板上形成驱动电路层300，所述驱动电路层300包括形成于所述封装区2内的驱动单元子层310、及与所述驱动单元子层310相连并延伸至所述框胶区1内的走线子层320；所述走线子层320包括多条相互平行的金属走线321，任一相邻两所述金属走线321之间均设有镂空部322；及
步骤S20：提供一第二基板200，在所述走线子层320上形成与所述封装区2相邻接的框胶层500，将所述第二基板200与所述第一基板100对合并通过所述框胶层500固定连接，在所述第一基板100与所述第二基板200之间形成与所述封装区2相对应的液晶层400；其中，各所述镂空部322中，靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度大于等于任一其它所述镂空部322的宽度。
可以理解的是，在一实施例中，所述走线子层320可以是通过在所述第一基板100上形成一金属层，然后通过蚀刻的方式使得所述走线子层320上形成多个所述镂空部322，通过控制蚀刻的位置使得各所述镂空部322中，靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度大于等于任一其它所述镂空部322的宽度，从而便于后续所述框胶层500中靠近所述液晶层400一侧的部分通过紫外光照完全固化。显然，整体的制作工艺流程均采用较为成熟的工艺，没有增加额外的工序，适于批量化的制作。
在一实施例中，所述步骤S20中，所述在所述走线子层320上形成与所述框胶区1相对应的框胶层500，包括：
在所述走线子层320上涂布与所述框胶区1相对应的框胶，采用紫外光穿过各所述镂空部322对所述框胶进行照射，至少使靠近所述封装区2一侧的部分所述框胶固化；及
对所述框胶采用一加热步骤，使所述框胶完全固化，以在所述走线子层320上形成与所述框胶区1相对应的框胶层500。
可以理解的是，在采用紫外光照的方式将所述框胶固化的过程中，由于所述走线子层320在靠近所述框胶层500与所述液晶层400交界处位置的镂空率较高，便于使所述框胶层500中靠近所述液晶层400一侧的部分完全固化，此时，所述框胶层500中未靠近所述液晶层400的部分由于所对应所述走线子层320镂空率较低的位置，使得所述框胶层500中未靠近所述液晶层400的部分未完全固化，本申请还可以通过额外增加一加热步骤，如烘烤等方式以使得所述框胶层500整体完全固化，从而实现诸如8K 120HZ等极高分辨率、高刷新频率的显示面板窄边框的需求，同时也保证了所述框胶层500对所述液晶层400的封装，避免了所述液晶层400被污染而造成显示异常的问题。
本申请的有益效果为：通过将靠近所述框胶层500与所述液晶层400交界处的所述镂空部322的宽度设置为大于等于任一其它所述镂空部322的宽度；以保证所述走线子层320在所述框胶层500与所述液晶层400交界处的镂空率，使得所述框胶层500中靠近所述液晶层400一侧的部分固化完全，很好的对所述封液层进行密封，避免液晶层400的污染；并且，整体结构在制作工艺上对原有制作工艺工序影响较小，适于批量生产。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (17)

  1. 一种显示面板，包括封装区和与所述封装区相邻的框胶区，所述显示面板包括：
    相对设置的第一基板和第二基板；
    驱动电路层，设置于所述第一基板靠近所述第二基板的一侧，所述驱动电路层包括位于所述封装区内的驱动单元子层、及与所述驱动单元子层相连并延伸至所述框胶区内的走线子层；
    液晶层，设置于所述第一基板与所述第二基板之间且与所述封装区相对应；及
    框胶层，设置于所述走线子层与所述第二基板之间且与所述封装区相邻接，
    其中，所述走线子层包括多条相互平行的金属走线，任一相邻两所述金属走线之间均设有镂空部，各所述镂空部中，靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于等于任一其它所述镂空部的宽度。
  2. 根据权利要求1所述显示面板，其中，各所述镂空部至少划分为两镂空组，每一所述镂空组至少包括一所述镂空部，任一两组所述镂空组中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度。
  3. 根据权利要求2所述显示面板，其中，任一至少包括两所述镂空部的所述镂空组中，各所述镂空部的宽度均相等。
  4. 根据权利要求3所述显示面板，其中，所述镂空组的数量为两组，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度等于所述金属走线的宽度。
  5. 根据权利要求4所述显示面板，其中，所述靠近所述框胶层与所述液晶层交界处的所述镂空组包含一个所述镂空部，且该所述镂空部两侧的两所述金属走线分别位于所述封装区内和所述框胶区内。
  6. 根据权利要求3所述显示面板，其中，所述镂空组的数量为四组，其中，靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度大于等于所述金属走线宽度的40%。
  7. 根据权利要求1所述显示面板，其中，任一相邻两所述镂空部中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空部的宽度。
  8. 根据权利要求1所述显示面板，其中，任一所述镂空部的宽度均大于等于所述金属走线宽度的10%。
  9. 一种显示面板，包括封装区和与所述封装区相邻的框胶区，所述显示面板包括：
    相对设置的第一基板和第二基板；
    驱动电路层，设置于所述第一基板靠近所述第二基板的一侧，所述驱动电路层包括位于所述封装区内的驱动单元子层、及与所述驱动单元子层相连并延伸至所述框胶区内的走线子层；
    液晶层，设置于所述第一基板与所述第二基板之间且与所述封装区相对应；及
    框胶层，设置于所述走线子层与所述第二基板之间且与所述封装区相邻接，
    其中，所述走线子层包括多条相互平行的金属走线，任一相邻两所述金属走线之间均设有镂空部，各所述镂空部中，靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于等于任一其它所述镂空部的宽度，任一所述镂空部的宽度均大于等于所述金属走线宽度的10%。
  10. 根据权利要求9所述显示面板，其中，各所述镂空部至少划分为两镂空组，每一所述镂空组至少包括一所述镂空部，任一两组所述镂空组中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空组中的任一所述镂空部的宽度。
  11. 根据权利要求10所述显示面板，其中，任一至少包括两所述镂空部的所述镂空组中，各所述镂空部的宽度均相等。
  12. 根据权利要求11所述显示面板，其中，所述镂空组的数量为两组，其中一靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度等于所述金属走线的宽度。
  13. 根据权利要求12所述显示面板，其中，所述靠近所述框胶层与所述液晶层交界处的所述镂空组包含一个所述镂空部，且该所述镂空部两侧的两所述金属走线分别位于所述封装区内和所述框胶区内。
  14. 根据权利要求11所述显示面板，其中，所述镂空组的数量为四组，其中，靠近所述框胶层与所述液晶层交界处的所述镂空组中的所述镂空部的宽度大于等于所述金属走线宽度的40%。
  15. 根据权利要求9所述显示面板，其中，任一相邻两所述镂空部中，其中一靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于另一远离所述框胶层与所述液晶层交界处的所述镂空部的宽度。
  16. 一种显示面板的制作方法，所述显示面板包括封装区和与所述封装区相邻的框胶区；所述显示面板的制作方法包括以下步骤：
    提供一第一基板，在所述基板上形成驱动电路层，所述驱动电路层包括形成于所述封装区内的驱动单元子层、及与所述驱动单元子层相连并延伸至所述框胶区内的走线子层；所述走线子层包括多条相互平行的金属走线，任一相邻两所述金属走线之间均设有镂空部；
    提供一第二基板，在所述走线子层上形成与所述封装区相邻接的框胶层，将所述第二基板与所述第一基板对合并通过所述框胶层固定连接，在所述第一基板与所述第二基板之间形成与所述封装区相对应的液晶层；其中，各所述镂空部中，靠近所述框胶层与所述液晶层交界处的所述镂空部的宽度大于等于任一其它所述镂空部的宽度。
  17. 根据权利要求16所述显示面板的制作方法，其中，所述在所述走线子层上形成与所述框胶区相对应的框胶层，包括：
    在所述走线子层上涂布与所述框胶区相对应的框胶，采用紫外光穿过各所述镂空部对所述框胶进行照射，至少使靠近所述封装区一侧的部分所述框胶固化；
    对所述框胶采用一加热步骤，使所述框胶完全固化，以在所述走线子层上形成与所述框胶区相对应的框胶层。
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