WO2021196272A1 - 栅极驱动阵列型显示面板 - Google Patents

栅极驱动阵列型显示面板 Download PDF

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Publication number
WO2021196272A1
WO2021196272A1 PCT/CN2020/084615 CN2020084615W WO2021196272A1 WO 2021196272 A1 WO2021196272 A1 WO 2021196272A1 CN 2020084615 W CN2020084615 W CN 2020084615W WO 2021196272 A1 WO2021196272 A1 WO 2021196272A1
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WO
WIPO (PCT)
Prior art keywords
goa
display panel
gate drive
array type
type display
Prior art date
Application number
PCT/CN2020/084615
Other languages
English (en)
French (fr)
Inventor
朱静
邵伟
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/764,747 priority Critical patent/US11361695B2/en
Publication of WO2021196272A1 publication Critical patent/WO2021196272A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current

Definitions

  • the present application relates to the field of display technology, and in particular to a gate drive array type display panel.
  • the gate driver on array (GOA) technology is a technology in which gate driver ICs (gate driver ICs) are directly fabricated on an array substrate to replace driver chips made by external silicon chips.
  • the GOA circuit can be directly arranged around the panel, reducing the production process, thereby facilitating the realization of a narrow frame design on the side of the display screen where the GOA circuit is arranged, and also reducing the production cost, so it has been widely used and researched.
  • the 8K resolution display screen (7680*RGB & 2160 resolution)
  • the pixel size is very small
  • the GOA circuit is designed in the display area, which will make
  • the aperture ratio (AR%) of the display screen is reduced, and the penetration rate (TR%) is seriously insufficient, which further affects the display effect of the display screen.
  • the GOA circuit when the GOA circuit is arranged in the display area, the aperture ratio of the display screen will be reduced, and the transmittance will be seriously insufficient, which further affects the display effect of the display screen.
  • the embodiment of the present application provides a gate drive array type display panel, which can effectively increase the aperture ratio of the pixels while realizing a very narrow frame design, so as to solve the problem of the prior art gate drive array type display panel.
  • the GOA circuit is arranged in In the display area, the aperture ratio of the display screen will be reduced, and the penetration rate will be seriously insufficient, which further affects the technical problems of the display effect of the display screen.
  • an embodiment of the present application provides a gate drive array type display panel, the gate drive array type display panel has a display area, and the gate drive array type display panel further includes a plurality of pixel units and a GOA circuit ;
  • a plurality of the pixel units are arranged in the display area in an array form, and the GOA circuit is arranged in the display area;
  • the GOA circuit includes a GOA unit group and a GOA wiring group, the GOA unit group The GOA wiring group and the GOA wiring group are separately arranged in two adjacent rows of the pixel units, and the GOA wiring group is electrically connected to both ends of the GOA unit group via a first signal connection wiring;
  • the GOA The circuit is arranged along the extending direction of the long side of the gate drive array type display panel.
  • the GOA cell group includes a plurality of cascaded GOA cells.
  • each GOA unit includes a plurality of thin film transistors and a first internal connection wire electrically connected to the thin film transistors.
  • the gate drive array type display panel further has scan signal wiring and data signal wiring, and the scan signal wiring is electrically connected to the thin film transistor.
  • the arrangement direction of the data signal wires is perpendicular to the arrangement direction of the scan signal wires.
  • each data signal wiring is correspondingly provided with one first signal connection wiring, and the arrangement of the first signal connection wiring The direction is parallel to the arrangement direction of the data signal wiring.
  • the first internal connection trace penetrates the data signal trace and the GOA cell group and the first signal connection trace are electrically connected to each other. connect.
  • the scan signal wiring and the first internal connection wiring are both formed in a first metal layer, and the data signal wiring and the The first signal connection traces are all formed in the second metal layer.
  • the material of the first metal layer is any one of Ti, Mo, Ta, W, and Nb; the material of the second metal layer is Any of Cu, Al, Ag, and Au.
  • the GOA wiring group includes a GOA bus line and a common electrode line.
  • the GOA circuit is arranged along the extending direction of the long side of the gate drive array type display panel.
  • the embodiments of the present application also provide a gate drive array type display panel, the gate drive array type display panel has a display area, and the gate drive array type display panel further includes a plurality of pixel units and GOA Circuit
  • a plurality of the pixel units are arranged in the display area in an array form, and the GOA circuit is arranged in the display area;
  • the GOA circuit includes a GOA unit group and a GOA wiring group, the GOA unit group
  • the GOA wiring group and the GOA wiring group are separately arranged in two adjacent rows of the pixel units, and the GOA wiring group is electrically connected to both ends of the GOA unit group via a first signal connection wiring.
  • the GOA cell group includes a plurality of cascaded GOA cells.
  • each GOA unit includes a plurality of thin film transistors and a first internal connection wire electrically connected to the thin film transistors.
  • the gate drive array type display panel further has scan signal wiring and data signal wiring, and the scan signal wiring is electrically connected to the thin film transistor.
  • the arrangement direction of the data signal wires is perpendicular to the arrangement direction of the scan signal wires.
  • each data signal wiring is correspondingly provided with one first signal connection wiring, and the arrangement of the first signal connection wiring The direction is parallel to the arrangement direction of the data signal wiring.
  • the first internal connection trace penetrates the data signal trace and the GOA cell group and the first signal connection trace are electrically connected to each other. connect.
  • the scan signal wiring and the first internal connection wiring are both formed in a first metal layer, and the data signal wiring and the The first signal connection traces are all formed in the second metal layer.
  • the material of the first metal layer is any one of Ti, Mo, Ta, W, and Nb; the material of the second metal layer is Any of Cu, Al, Ag, and Au.
  • the GOA wiring group includes a GOA bus line and a common electrode line.
  • the gate drive array type display panel provided by the embodiments of the present application, when the GOA circuit is arranged in the display area, the GOA unit group and the GOA wiring group are separately arranged in two adjacent rows.
  • the pixel unit is electrically connected through signal connection traces, which effectively reduces the actual space height of the GOA circuit while realizing a very narrow frame design, further improves the pixel aperture ratio, and further improves the gate drive array type display The display effect of the panel.
  • FIG. 1 is a schematic structural diagram of a gate drive array type display panel located in a display area according to an embodiment of the application.
  • FIG. 2 is a layout design diagram of GOA circuits in a gate drive array type display panel provided by an embodiment of the application.
  • the embodiment of the application is directed to the technical problem of the existing gate drive array type display panel, when the GOA circuit is arranged in the display area, the aperture ratio of the display screen will be reduced, the penetration rate will be seriously insufficient, and the display effect of the display screen will be further affected. , This embodiment can solve this defect.
  • the gate drive array type display panel is a display panel in which a gate drive circuit (GOA circuit) is fabricated on an array substrate instead of a drive chip fabricated by an external silicon chip.
  • the gate drive array type display panel has a display area and a frame area, wherein the display area is an active area of the display panel (active area) is used to display a picture, and the frame area surrounds the outer periphery of the display area as a layout space for circuits and related wiring.
  • FIG. 1 it is a schematic structural diagram of a gate drive array type display panel in a display area provided by an embodiment of the application.
  • the display area 10 is provided with a plurality of pixel units 11 and GOA circuits 12, and a plurality of the pixel units 11 are arranged in the display area 10 in an array form;
  • the GOA circuit 12 includes a GOA unit group 121 and The GOA wiring group 122, the GOA unit group 121 and the GOA wiring group 122 are separately arranged in the pixel units 11 in two adjacent rows, and the GOA wiring group is connected via the first signal connection wiring 13 It is electrically connected to the two ends of the GOA unit group 121.
  • the GOA unit group 121 includes multiple cascaded GOA units. That is, each GOA unit group 23 includes multiple GOA units, such as GOA(1), GOA(2), GOA(M-1), GOA(M), etc., where M is a positive integer greater than one.
  • the GOA unit group 121 is connected to the GOA bus (busline) through signal leads drawn by itself.
  • the drive signal of the gate drive array type display panel is input from each signal input terminal, and is transmitted to the signal lead of each GOA unit of the GOA unit group 121 connected thereto through the GOA bus (busline), and then reaches
  • the clock signal input terminal of each GOA unit is used to drive the signal of each GOA unit.
  • each GOA unit 121 includes a plurality of thin film transistors (TFT) and a first internal connection trace 1211 electrically connected to the thin film transistor (TFT).
  • TFT thin film transistors
  • the gate drive array type display panel further has a scan signal wiring 14 (Gate) and a data signal wiring 15 (Data), the scan signal wiring 14 (Gate) and the thin film transistor (TFT) Electrically connected, the arrangement direction of the data signal wires 15 (Data) is perpendicular to the arrangement direction of the scan signal wires 14 (Gate).
  • each data signal wiring 15 (Data) is correspondingly provided with one first signal connection wiring 13, and the arrangement direction of the first signal connection wiring 13 is the same as that of the data signal wiring 15
  • the arrangement direction of (Data) is parallel; the first internal connection trace 1211 penetrates the data signal trace 15 (Data) and connects the GOA unit group 121 to the first signal connection trace 13 on one side. Sexual connection.
  • the first signal connection trace 13 further includes a second internal connection trace 131, and the second internal connection trace 131 connects the GOA unit group 121 with the first signal on the opposite side.
  • the wiring 13 is electrically connected.
  • the scan signal wiring 14 (Gate) and the first internal connection wiring 1211 are both formed in the first metal layer (M1), and the data signal wiring 15 (Data) and the first The signal connection wires 13 are all formed in the second metal layer (M2).
  • the material of the first metal layer (M1) is any one of Ti, Mo, Ta, W, and Nb; the material of the second metal layer (M2) is Cu, Al, Ag, and Au Any of them.
  • the GOA wiring group 122 includes a GOA bus (busline) and a common electrode line (com).
  • FIG. 2 it is a layout design diagram of GOA circuits in a gate drive array type display panel provided by an embodiment of this application.
  • the outline of the gate drive array display panel is roughly rectangular, including two opposite long sides and two opposite short sides, wherein the long side and the short side are adjacent to each other.
  • the GOA circuit 12 is arranged along the extending direction of the long side of the gate drive array type display panel.
  • the GOA unit group 121 and the GOA wiring group 122 are separately arranged in the adjacent two rows of the pixel units and are electrically connected through the signal connection wiring 13, which can effectively reduce the cost of the GOA circuit 12.
  • the actual space height H is a layout design diagram of GOA circuits in a gate drive array type display panel provided by an embodiment of this application.
  • the outline of the gate drive array display panel is roughly rectangular, including two opposite long sides and two opposite short sides, wherein the long side and the short side are adjacent to each other.
  • the GOA circuit 12 is arranged along the extending direction of the long side of the gate drive
  • the GOA unit group 121 is arranged along the extending direction of the long side of the gate drive array display panel, and the GOA wiring group 122 is arranged in parallel with the GOA unit group 121.
  • the GOA unit group and the GOA wiring group are separately arranged in two adjacent rows.
  • the pixel unit is electrically connected through signal connection traces, which effectively reduces the actual space height of the GOA circuit while achieving a very narrow frame design, further improves the pixel aperture ratio, and further improves the gate drive array display panel. display effect.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)

Abstract

一种栅极驱动阵列型显示面板，包括多个像素单元（11）以及GOA电路（12）。多个像素单元（11）以及GOA电路（12）均设置在显示面板的显示区（10）内；GOA电路（12）包括GOA单元组（121）以及GOA走线组（122），GOA单元组（121）与GOA走线组（122）分别独立设置于相邻两行像素单元（11）内，且GOA走线组（122）经由第一信号连接走线（13）与GOA单元组（121）两端电性连接。

Description

栅极驱动阵列型显示面板 技术领域
本申请涉及显示技术领域，尤其涉及一种栅极驱动阵列型显示面板。
 背景技术
栅极驱动阵列(gate driver on array，GOA)技术是直接将栅极驱动电路(gate driver ICs)制作在阵列(array)基板上，来代替由外接硅芯片制作的驱动芯片的一种技术。GOA电路可直接设置在面板的周围，减少制作程序，进而有利于显示屏的在设置GOA电路的一侧实现窄边框的设计，并且还能够降低生产成本，因此得到广泛地应用和研究。
因应消费者的需求，大尺寸、高解析度、且具有极窄边框(Super Narrow Border，SNB)设计的显示屏成为市场的趋势。并且，拼接显示屏对于设计窄边宽的要求更是必然。然而，随着解析度变高和像素尺寸缩小，使得GOA布局(layout)空间随之变大。对于大尺寸和高解析度的显示屏，信号传输过程中的阻容负载(RC loading)较大，故需要搭配较宽的GOA总线（busline）的设计，导致显示屏的边框区的宽度较大。目前通过GOA In AA（GOA电路设置于显示区）技术来实现极窄边框设计。然而，随着显示装置解析度变高，像素的尺寸缩小，例如8K 分辨率的显示屏（7680*RGB & 2160 的解析度），像素的尺寸很小，将GOA 电路设计在显示区，会使得显示屏的开口率（AR%）降低，穿透率（TR%）严重不足，进一步影响显示屏的显示效果。
综上所述，现有的栅极驱动阵列型显示面板，将GOA电路设置在显示区时，会导致显示屏的开口率降低，穿透率严重不足，进一步影响显示屏的显示效果。
 技术问题
现有的栅极驱动阵列型显示面板，将GOA电路设置在显示区时，会导致显示屏的开口率降低，穿透率严重不足，进一步影响显示屏的显示效果。
 技术解决方案
本申请实施例提供一种栅极驱动阵列型显示面板，能够在实现极窄边框设计的同时有效提升像素的开口率，以解决现有技术的栅极驱动阵列型显示面板，将GOA电路设置在显示区时，会导致显示屏的开口率降低，穿透率严重不足，进一步影响显示屏的显示效果的技术问题。
第一方面，本申请实施例提供一种栅极驱动阵列型显示面板，所述栅极驱动阵列型显示面板具有显示区，所述栅极驱动阵列型显示面板还包括多个像素单元以及GOA电路；
其中，多个所述像素单元通过阵列形式设置在所述显示区内，所述GOA电路设置在所述显示区内；所述GOA电路包括GOA单元组以及GOA走线组，所述GOA单元组与所述GOA走线组分别独立设置于相邻两行所述像素单元内，且所述GOA走线组经由第一信号连接走线与所述GOA单元组两端电性连接；所述GOA电路沿着所述栅极驱动阵列型显示面板的长边的延伸方向设置。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述GOA单元组包含多个级联的GOA单元。
在本申请实施例所提供的栅极驱动阵列型显示面板中，每一所述GOA单元包括多个薄膜晶体管和与所述薄膜晶体管电性连接的第一内部连接走线。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述栅极驱动阵列型显示面板还具有扫描信号走线以及数据信号走线，所述扫描信号走线与所述薄膜晶体管电性连接，所述数据信号走线的排列方向与所述扫描信号走线的排列方向垂直。
在本申请实施例所提供的栅极驱动阵列型显示面板中，每一所述数据信号走线的一侧对应设置一条所述第一信号连接走线，所述第一信号连接走线的排列方向与所述数据信号走线的排列方向平行。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述第一内部连接走线穿插所述数据信号走线并将所述GOA单元组与所述第一信号连接走线电性连接。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述扫描信号走线以及所述第一内部连接走线均形成于第一金属层中，所述数据信号走线以及所述第一信号连接走线均形成于第二金属层中。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述第一金属层的材料为Ti、Mo、Ta、W及Nb中的任一种；所述第二金属层的材料为Cu、Al、Ag及Au中的任一种。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述GOA走线组包括GOA总线以及公共电极线。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述GOA电路沿着所述栅极驱动阵列型显示面板的长边的延伸方向设置。
第二方面，本申请实施例还提供一种栅极驱动阵列型显示面板，所述栅极驱动阵列型显示面板具有显示区，所述栅极驱动阵列型显示面板还包括多个像素单元以及GOA电路；
其中，多个所述像素单元通过阵列形式设置在所述显示区内，所述GOA电路设置在所述显示区内；所述GOA电路包括GOA单元组以及GOA走线组，所述GOA单元组与所述GOA走线组分别独立设置于相邻两行所述像素单元内，且所述GOA走线组经由第一信号连接走线与所述GOA单元组两端电性连接。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述GOA单元组包含多个级联的GOA单元。
在本申请实施例所提供的栅极驱动阵列型显示面板中，每一所述GOA单元包括多个薄膜晶体管和与所述薄膜晶体管电性连接的第一内部连接走线。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述栅极驱动阵列型显示面板还具有扫描信号走线以及数据信号走线，所述扫描信号走线与所述薄膜晶体管电性连接，所述数据信号走线的排列方向与所述扫描信号走线的排列方向垂直。
在本申请实施例所提供的栅极驱动阵列型显示面板中，每一所述数据信号走线的一侧对应设置一条所述第一信号连接走线，所述第一信号连接走线的排列方向与所述数据信号走线的排列方向平行。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述第一内部连接走线穿插所述数据信号走线并将所述GOA单元组与所述第一信号连接走线电性连接。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述扫描信号走线以及所述第一内部连接走线均形成于第一金属层中，所述数据信号走线以及所述第一信号连接走线均形成于第二金属层中。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述第一金属层的材料为Ti、Mo、Ta、W及Nb中的任一种；所述第二金属层的材料为Cu、Al、Ag及Au中的任一种。
在本申请实施例所提供的栅极驱动阵列型显示面板中，所述GOA走线组包括GOA总线以及公共电极线。
 有益效果
相较于现有技术，本申请实施例所提供的栅极驱动阵列型显示面板，在将GOA电路设置在显示区时，通过将GOA单元组与GOA走线组分别独立设置于相邻两行所述像素单元内并通过信号连接走线电性连接，在实现极窄边框设计的同时有效降低了GOA电路的实际空间高度，进一步提高了像素开口率，更进一步提高了栅极驱动阵列型显示面板的显示效果。
 附图说明
图1为本申请实施例提供的栅极驱动阵列型显示面板位于显示区的结构示意图。
图2为本申请实施例提供的栅极驱动阵列型显示面板中GOA电路的排布设计图。
 本发明的实施方式
本申请实施例针对现有的栅极驱动阵列型显示面板，将GOA电路设置在显示区时，会导致显示屏的开口率降低，穿透率严重不足，进一步影响显示屏的显示效果的技术问题，本实施例能够解决该缺陷。
所述栅极驱动阵列型显示面板是将栅极驱动电路（GOA电路）制作在阵列基板上，来代替由外接硅芯片制作的驱动芯片的一种显示面板。栅极驱动阵列型显示面板具有显示区和边框区，其中所述显示区为显示面板的有效区(active area)用于显示画面，所述边框区围绕在所述显示区的外周围，作为电路和相关走线的布局空间。
如图1所示，为本申请实施例提供的栅极驱动阵列型显示面板位于显示区的结构示意图。其中，所述显示区10中设置有多个像素单元11以及GOA电路12，多个所述像素单元11通过阵列形式设置在所述显示区10内；所述GOA电路12包括GOA单元组121以及GOA走线组122，所述GOA单元组121与所述GOA走线组122分别独立设置于相邻两行所述像素单元11内，且所述GOA走线组经由第一信号连接走线13与所述GOA单元组121两端电性连接。
具体地，所述GOA单元组121包含多个级联的     GOA单元。即每一GOA单元组23包含多个GOA单元，如GOA(1)、GOA(2)、GOA(M-1)、GOA(M)等，其中M为大于1的正整数。所述GOA单元组121通过自身引出的信号引线连接到GOA总线（busline）上。所述栅极驱动阵列型显示面板的驱动信号从各信号输入端输入，并且通过所述GOA总线（busline）传输到与其连接的所述GOA单元组121的各GOA单元的信号引线上，进而到达各GOA单元的时钟信号输入端，以实现对各GOA单元的信号驱动。
进一步地，每一所述GOA单元121包括多个薄膜晶体管（TFT）和与所述薄膜晶体管（TFT）电性连接的第一内部连接走线1211。
具体地，所述栅极驱动阵列型显示面板还具有扫描信号走线14（Gate）以及数据信号走线15(Data)，所述扫描信号走线14（Gate）与所述薄膜晶体管（TFT）电性连接，所述数据信号走线15(Data)的排列方向与所述扫描信号走线14（Gate）的排列方向垂直。
其中，每一所述数据信号走线15(Data)的一侧对应设置一条所述第一信号连接走线13，所述第一信号连接走线13的排列方向与所述数据信号走线15(Data)的排列方向平行；所述第一内部连接走线1211穿插所述数据信号走线15(Data)并将所述GOA单元组121与一侧的所述第一信号连接走线13电性连接。
具体地，所述第一信号连接走线13还包括第二内部连接走线131，所述第二内部连接走线131将所述GOA单元组121与相对另一侧的所述第一信号连接走线13电性连接。
具体地，所述扫描信号走线14（Gate）以及所述第一内部连接走线1211均形成于第一金属层（M1）中，所述数据信号走线15(Data)以及所述第一信号连接走线13均形成于第二金属层（M2）中。
更进一步地，所述第一金属层（M1）的材料为Ti、Mo、Ta、W及Nb中的任一种；所述第二金属层（M2）的材料为Cu、Al、Ag及Au中的任一种。
具体地，所述GOA走线组122包括GOA总线(busline)以及公共电极线(com)。
如图2所示，为本申请实施例提供的栅极驱动阵列型显示面板中GOA电路的排布设计图。其中，所述栅极驱动阵列型显示面板的外廓大致为矩形，包含两条相对的长边和两条相对的短边，其中长边与短边邻接。所述GOA电路12沿着所述栅极驱动阵列型显示面板的长边的延伸方向设置。所述GOA单元组121与所述GOA走线组122分别独立设置于相邻两行所述像素单元内并通过所述信号连接走线13电性连接，这样能够有效降低所述GOA电路12的实际空间高度H。
具体地，所述GOA单元组121沿着所述栅极驱动阵列型显示面板的长边的延伸方向设置，以及所述GOA走线组122与所述所述GOA单元组121平行设置。
以上各个操作的具体实施可参见前面的实施例，在此不再赘述。
综上所述，本申请实施例所提供的栅极驱动阵列型显示面板，在将GOA电路设置在显示区时，通过将GOA单元组与GOA走线组分别独立设置于相邻两行所述像素单元内并通过信号连接走线电性连接，在实现极窄边框设计的同时有效降低了GOA电路的实际空间高度，进一步提高了像素开口率，更进一步提高了栅极驱动阵列型显示面板的显示效果。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (18)

  1. 一种栅极驱动阵列型显示面板，所述栅极驱动阵列型显示面板具有显示区，其中，所述栅极驱动阵列型显示面板还包括：
    多个像素单元，多个所述像素单元通过阵列形式设置在所述显示区内；
    GOA电路，所述GOA电路设置在所述显示区内；
    其中，所述GOA电路包括GOA单元组以及GOA走线组，所述GOA单元组与所述GOA走线组分别独立设置于相邻两行所述像素单元内，且所述GOA走线组经由第一信号连接走线与所述GOA单元组两端电性连接；所述GOA电路沿着所述栅极驱动阵列型显示面板的长边的延伸方向设置。
  2. 根据权利要求1所述的栅极驱动阵列型显示面板，其中，所述GOA单元组包含多个级联的    GOA单元。
  3. 根据权利要求2所述的栅极驱动阵列型显示面板，其中，每一所述GOA单元包括多个薄膜晶体管和与所述薄膜晶体管电性连接的第一内部连接走线。
  4. 根据权利要求3所述的栅极驱动阵列型显示面板，其中，所述栅极驱动阵列型显示面板还具有扫描信号走线以及数据信号走线，所述扫描信号走线与所述薄膜晶体管电性连接，所述数据信号走线的排列方向与所述扫描信号走线的排列方向垂直。
  5. 根据权利要求4所述的栅极驱动阵列型显示面板，其中，每一所述数据信号走线的一侧对应设置一条所述第一信号连接走线，所述第一信号连接走线的排列方向与所述数据信号走线的排列方向平行。
  6. 根据权利要求4所述的栅极驱动阵列型显示面板，其中，所述第一内部连接走线穿插所述数据信号走线并将所述GOA单元组与所述第一信号连接走线电性连接。
  7. 根据权利要求4所述的栅极驱动阵列型显示面板，其中，所述扫描信号走线以及所述第一内部连接走线均形成于第一金属层中，所述数据信号走线以及所述第一信号连接走线均形成于第二金属层中。
  8. 根据权利要求7所述的栅极驱动阵列型显示面板，其中，所述第一金属层的材料为Ti、Mo、Ta、W及Nb中的任一种；所述第二金属层的材料为Cu、Al、Ag及Au中的任一种。
  9. 根据权利要求1所述的栅极驱动阵列型显示面板，其中，所述GOA走线组包括GOA总线以及公共电极线。
  10. 一种栅极驱动阵列型显示面板，所述栅极驱动阵列型显示面板具有显示区，其中，所述栅极驱动阵列型显示面板还包括：
    多个像素单元，多个所述像素单元通过阵列形式设置在所述显示区内；
    GOA电路，所述GOA电路设置在所述显示区内；
    其中，所述GOA电路包括GOA单元组以及GOA走线组，所述GOA单元组与所述GOA走线组分别独立设置于相邻两行所述像素单元内，且所述GOA走线组经由第一信号连接走线与所述GOA单元组两端电性连接。
  11. 根据权利要求10所述的栅极驱动阵列型显示面板，其中，所述GOA单元组包含多个级联的GOA单元。
  12. 根据权利要求11所述的栅极驱动阵列型显示面板，其中，每一所述GOA单元包括多个薄膜晶体管和与所述薄膜晶体管电性连接的第一内部连接走线。
  13. 根据权利要求12所述的栅极驱动阵列型显示面板，其中，所述栅极驱动阵列型显示面板还具有扫描信号走线以及数据信号走线，所述扫描信号走线与所述薄膜晶体管电性连接，所述数据信号走线的排列方向与所述扫描信号走线的排列方向垂直。
  14. 根据权利要求13所述的栅极驱动阵列型显示面板，其中，每一所述数据信号走线的一侧对应设置一条所述第一信号连接走线，所述第一信号连接走线的排列方向与所述数据信号走线的排列方向平行。
  15. 根据权利要求13所述的栅极驱动阵列型显示面板，其中，所述第一内部连接走线穿插所述数据信号走线并将所述GOA单元组与所述第一信号连接走线电性连接。
  16. 根据权利要求13所述的栅极驱动阵列型显示面板，其中，所述扫描信号走线以及所述第一内部连接走线均形成于第一金属层中，所述数据信号走线以及所述第一信号连接走线均形成于第二金属层中。
  17. 根据权利要求16所述的栅极驱动阵列型显示面板，其中，所述第一金属层的材料为Ti、Mo、Ta、W及Nb中的任一种；所述第二金属层的材料为Cu、Al、Ag及Au中的任一种。
  18. 根据权利要求10所述的栅极驱动阵列型显示面板，其中，所述GOA走线组包括GOA总线以及公共电极线。
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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021253345A1 (zh) * 2020-06-18 2021-12-23 京东方科技集团股份有限公司 显示面板及其制造方法、显示装置
EP4044168A4 (en) 2020-06-18 2023-03-15 BOE Technology Group Co., Ltd. DISPLAY PANEL AND METHOD OF MANUFACTURING THEREOF, AND DISPLAY DEVICE
EP4044163B1 (en) * 2020-06-18 2023-10-25 BOE Technology Group Co., Ltd. Display panel and display apparatus
CN113838398B (zh) * 2020-06-24 2023-07-18 京东方科技集团股份有限公司 显示面板、显示装置
CN111883066B (zh) * 2020-07-09 2022-02-22 深圳市华星光电半导体显示技术有限公司 栅电极驱动设计方法、装置及电子设备
CN113362779A (zh) * 2021-06-28 2021-09-07 武汉华星光电技术有限公司 显示面板及显示装置
CN113936584A (zh) * 2021-10-28 2022-01-14 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
CN114664250B (zh) * 2022-04-08 2023-08-22 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104537993A (zh) * 2014-12-29 2015-04-22 厦门天马微电子有限公司 阵列基板、液晶显示面板和有机发光显示面板
CN104934005A (zh) * 2015-07-01 2015-09-23 京东方科技集团股份有限公司 显示面板及显示装置
CN105139806A (zh) * 2015-10-21 2015-12-09 京东方科技集团股份有限公司 阵列基板、显示面板和显示装置
US20160267831A1 (en) * 2015-03-13 2016-09-15 Samsung Display Co., Ltd. Display Device
CN106098698A (zh) * 2016-06-21 2016-11-09 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN107045850A (zh) * 2017-04-05 2017-08-15 京东方科技集团股份有限公司 阵列基板、显示面板以及显示装置
US20170345373A1 (en) * 2016-05-25 2017-11-30 Samsung Display Co., Ltd. Display device
CN110599898A (zh) * 2019-08-20 2019-12-20 深圳市华星光电技术有限公司 栅极驱动阵列型显示面板

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103730093B (zh) * 2013-12-26 2017-02-01 深圳市华星光电技术有限公司 一种阵列基板驱动电路、阵列基板及相应的液晶显示器
CN103744206B (zh) * 2013-12-27 2016-08-17 深圳市华星光电技术有限公司 一种阵列基板驱动电路、阵列基板及相应的液晶显示器
CN104793417B (zh) 2015-04-16 2019-04-05 上海中航光电子有限公司 一种tft阵列基板、显示面板及显示装置
US9858880B2 (en) * 2015-06-01 2018-01-02 Shenzhen China Star Optoelectronics Technology Co., Ltd. GOA circuit based on oxide semiconductor thin film transistor
CN106057818B (zh) * 2016-05-26 2019-05-07 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN106707648B (zh) * 2017-02-21 2019-12-03 京东方科技集团股份有限公司 一种显示基板、显示装置及其驱动方法
CN106898324B (zh) * 2017-04-25 2019-09-17 京东方科技集团股份有限公司 一种显示面板及显示装置
CN115425052A (zh) 2017-06-29 2022-12-02 京东方科技集团股份有限公司 显示面板及显示装置
CN107505789B (zh) * 2017-09-19 2019-08-02 武汉华星光电技术有限公司 阵列基板及显示面板
CN108320693B (zh) * 2018-02-27 2022-04-19 京东方科技集团股份有限公司 一种栅极驱动电路及其驱动方法、阵列基板及显示装置
JP2019191235A (ja) * 2018-04-19 2019-10-31 シャープ株式会社 表示装置
CN109994069A (zh) * 2019-03-20 2019-07-09 深圳市华星光电半导体显示技术有限公司 Goa驱动电路及阵列基板

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104537993A (zh) * 2014-12-29 2015-04-22 厦门天马微电子有限公司 阵列基板、液晶显示面板和有机发光显示面板
US20160267831A1 (en) * 2015-03-13 2016-09-15 Samsung Display Co., Ltd. Display Device
CN104934005A (zh) * 2015-07-01 2015-09-23 京东方科技集团股份有限公司 显示面板及显示装置
CN105139806A (zh) * 2015-10-21 2015-12-09 京东方科技集团股份有限公司 阵列基板、显示面板和显示装置
US20170345373A1 (en) * 2016-05-25 2017-11-30 Samsung Display Co., Ltd. Display device
CN106098698A (zh) * 2016-06-21 2016-11-09 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
CN107045850A (zh) * 2017-04-05 2017-08-15 京东方科技集团股份有限公司 阵列基板、显示面板以及显示装置
CN110599898A (zh) * 2019-08-20 2019-12-20 深圳市华星光电技术有限公司 栅极驱动阵列型显示面板

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