WO2021174488A1 - 一种显示背板及其制备方法、显示母板和显示面板 - Google Patents

一种显示背板及其制备方法、显示母板和显示面板 Download PDF

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Publication number
WO2021174488A1
WO2021174488A1 PCT/CN2020/078002 CN2020078002W WO2021174488A1 WO 2021174488 A1 WO2021174488 A1 WO 2021174488A1 CN 2020078002 W CN2020078002 W CN 2020078002W WO 2021174488 A1 WO2021174488 A1 WO 2021174488A1
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Prior art keywords
electrode
layer
insulating layer
substrate
area
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PCT/CN2020/078002
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English (en)
French (fr)
Inventor
王珂
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京东方科技集团股份有限公司
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Priority to US16/973,162 priority Critical patent/US11380662B2/en
Priority to PCT/CN2020/078002 priority patent/WO2021174488A1/zh
Priority to CN202080000232.0A priority patent/CN113811997A/zh
Publication of WO2021174488A1 publication Critical patent/WO2021174488A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133305—Flexible substrates, e.g. plastics, organic film
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133603—Direct backlight with LEDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133612—Electrical details
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate

Definitions

  • the embodiments of the present disclosure belong to the field of display technology, and specifically relate to a display backplane and a preparation method thereof, a display motherboard and a display panel.
  • LED Light Emitting Diode, light-emitting diode
  • LCD Liquid Crystal Display
  • the embodiments of the present disclosure provide a display backplane and a preparation method thereof, a display motherboard and a display panel.
  • a display backplane including:
  • a substrate having a first side panel surface and a second side panel surface opposite to each other;
  • the backlight source circuit on the second side board surface, the pixel driving circuit is located on the side of the flexible layer away from the first side board surface, and the backlight source circuit is located at the back of the flexible layer. Said one side of the second side board surface.
  • the pixel driving circuit includes a transistor, a second inorganic insulating layer, and a pixel electrode that are sequentially disposed away from the flexible layer;
  • the transistor includes a gate electrode, a first inorganic insulating layer, an active layer, a first electrode, and a second electrode that are sequentially arranged away from the flexible layer.
  • the first electrode and the second electrode are arranged in the same layer and are separately arranged at Both ends of the active layer are connected to the active layer respectively;
  • the first electrode is connected to the pixel electrode through a via hole opened in the second inorganic insulating layer.
  • the backlight circuit includes a first electrode, a first insulating layer, a second electrode, a second insulating layer, and an LED that are sequentially disposed away from the flexible layer;
  • the first electrode is connected to the anode of the LED through a via hole opened in the first insulating layer and the second insulating layer; the second electrode is connected to the anode of the LED through a via hole opened in the second insulating layer Connect the negative pole of the LED.
  • the backlight circuit includes a first electrode, a first insulating layer, a second electrode, and a second insulating layer that are sequentially disposed away from the flexible layer;
  • the first electrode is exposed through the via holes opened in the first inorganic insulating layer and the second inorganic insulating layer, and is configured to be connected to the anode of the LED to be bound; the second electrode is opened in the The via hole in the second inorganic insulating layer is exposed and is configured to connect the negative electrode of the LED to be bound.
  • the first electrode and the gate are formed of the same film layer; the first insulating layer and the first inorganic insulating layer are formed of the same film layer; the second electrode and the gate The first electrode and the second electrode are formed of the same film layer; the second insulating layer and the second inorganic insulating layer are formed of the same film layer.
  • the display backplane further includes a buffer layer, the buffer layer includes a first part and a second part, the first part is disposed above the first side surface of the substrate and sandwiches Set between the flexible layer and the pixel drive circuit, the second sub-section is set above the second side plate surface of the substrate, and sandwiched between the flexible layer and the backlight circuit .
  • the thickness of the flexible layer that wraps the first side surface of the substrate is equal to the thickness of the flexible layer that covers the second side surface of the substrate.
  • the thickness of the flexible layer is greater than the thickness of the flexible layer wrapping the first side plate surface of the substrate.
  • a chamfer is formed at the boundary between the edge end surface of the substrate wrapped with the flexible layer and the first side surface and the second side surface of the substrate.
  • an embodiment of the present disclosure provides a display motherboard, including a plurality of sub-boards, the sub-boards are arranged in an array, the sub-boards include a substrate, and the substrate has a first area, a second area, and a third area. Zone, the first zone, the second zone and the third zone are arranged in sequence along the first direction and adjacent to each other, the substrate is provided with a flexible layer, and the flexible layer extends from the first zone To and cover the second zone and the third zone;
  • a pixel drive circuit is formed in the first area, and the pixel drive circuit is located on the side of the flexible layer away from the substrate; a backlight circuit is formed in the third area; the backlight circuit is located in the The side of the flexible layer facing away from the substrate.
  • the pixel driving circuit includes a transistor, a second inorganic insulating layer, and a pixel electrode that are sequentially disposed away from the flexible layer;
  • the transistor includes a gate, a first inorganic insulating layer, an active layer, a first electrode, and a second electrode that are sequentially disposed away from the flexible layer, and the first inorganic insulating layer is located between the gate and the active layer. Between the layers, the first electrode and the second electrode are arranged in the same layer and separately arranged at two ends of the active layer, and are respectively connected to the active layer;
  • the first electrode is connected to the pixel electrode through a via hole opened in the second inorganic insulating layer;
  • the second inorganic insulating layer and the first inorganic insulating layer also extend to and cover the second region and the third region.
  • the backlight circuit includes a first electrode, a second electrode, and an LED that are sequentially disposed away from the flexible layer; the first inorganic insulating layer is located between the first electrode and the second electrode. Between; the second inorganic insulating layer is located between the second electrode and the LED;
  • the first electrode is connected to the anode of the LED through a via hole opened in the first inorganic insulating layer and the second inorganic insulating layer; the second electrode is opened in the second inorganic insulating layer
  • the via hole is connected to the negative electrode of the LED.
  • the backlight circuit includes a first electrode and a second electrode that are sequentially disposed away from the flexible layer; the first inorganic insulating layer is located between the first electrode and the second electrode; The second inorganic insulating layer is located on a side of the second electrode away from the flexible layer;
  • the first electrode is exposed through the via holes opened in the first inorganic insulating layer and the second inorganic insulating layer, and is configured to be connected to the anode of the LED to be bound; the second electrode is opened in the The via hole in the second inorganic insulating layer is exposed and is configured to connect the negative electrode of the LED to be bound.
  • the first electrode and the gate are made of the same material and arranged in the same layer; the second electrode and the first electrode and the second electrode are made of the same material and arranged in the same layer.
  • the display motherboard further includes a buffer layer that extends from the first area to and covers the second area and the third area;
  • the buffer layer is sandwiched between the flexible layer and the pixel driving circuit; in the third area, the buffer layer is sandwiched between the flexible layer and the backlight Between circuits.
  • embodiments of the present disclosure provide a display panel, including the above-mentioned display backplane, and further including an opposite substrate, and the opposite substrate and the first side plate of the display backplane face the box.
  • embodiments of the present disclosure provide a method for manufacturing a display backplane, the display backplane includes a substrate having a first area, a second area, and a third area, the first area, the The second zone and the third zone are arranged in sequence along the first direction and are adjacent to each other,
  • the preparation method includes:
  • a pixel drive circuit is formed in the first area and a backlight circuit is formed in the third area; wherein a part of the film layer of the pixel drive circuit extends from the first area to and covers the second area and the second area.
  • the third area ;
  • the film layer of the third zone is bent to the side of the substrate of the first zone away from the flexible layer.
  • cutting and splitting the substrate in the second zone and the third zone cutting and splitting the substrate in the second zone and the third zone
  • the orthographic projection of the cut-off line of the separation between the substrate and the flexible layer on the substrate is located in the first zone, and the cutting line for cutting the substrate is the boundary line of the first zone and the second zone;
  • the distance between the separation cut-off line and the cutting line ranges from 20 to 50 ⁇ m.
  • the substrate is cut from the side of the substrate away from the flexible layer; the cutting depth of the substrate ranges from 3/5 to 4/5 of the thickness of the substrate.
  • chamfering is performed on the cut and split section of the substrate.
  • the substrate in the second zone and the third zone is combined with the flexible layer Before layer separation, it also includes:
  • a flexible filling layer is formed on the substrate; the flexible filling layer is distributed in the second area.
  • the method further includes: the flexible layer in the second zone The side facing away from the substrate forms a flexible filling layer.
  • forming the pixel driving circuit in the first region includes sequentially forming a transistor, a second inorganic insulating layer, and a pixel electrode;
  • Forming a transistor includes sequentially forming a gate, a first inorganic insulating layer, an active layer, a first electrode, and a second electrode;
  • the first inorganic insulating layer and the second inorganic insulating layer extend to and cover the second area and the third area; the first electrode and the second electrode are arranged in the same layer and are separately arranged in Two ends of the active layer are respectively connected to the active layer; the first electrode is connected to the pixel electrode through a via hole opened in the second inorganic insulating layer.
  • forming the backlight circuit in the third region includes sequentially forming a first electrode, a first insulating layer, a second electrode, a second insulating layer, and bonding LEDs; wherein, the patterning process is used to form the The first electrode and the gate; extend from the first inorganic insulating layer in the first region to the third region to form the first insulating layer; use a patterning process to form the second electrode, the The first pole and the second pole; extend from the second inorganic insulating layer in the first region to the third region to form the second insulating layer; by opening in the first insulating layer and The via hole in the second insulating layer connects the first electrode and the positive electrode of the LED; and the second electrode and the negative electrode of the LED are connected through a via hole opened in the second insulating layer.
  • forming the backlight circuit in the third region includes sequentially forming a first electrode, a first insulating layer, a second electrode, and a second insulating layer; wherein, the first electrode and the second insulating layer are formed by one patterning process.
  • the gate extend from the first inorganic insulating layer in the first region to the third region to form the first insulating layer; use a patterning process to form the second electrode, the first electrode And the second electrode; extend from the second inorganic insulating layer in the first region to the third region to form the second insulating layer; insert the first electrode on the first insulating layer
  • the via holes in the second insulating layer and the second insulating layer are exposed, and are configured to connect to the anode of the LED to be bound, and the second electrode is exposed through the via hole opened in the second insulating layer, and is configured to connect The negative pole of the LED to be bound.
  • the method before forming the pixel driving circuit in the first area and forming the backlight circuit in the third area, and after forming the flexible layer on the substrate, the method further includes:
  • a buffer layer is formed; the buffer layer extends from the first area to and covers the second area and the third area.
  • FIG. 1 is a cross-sectional view of a structure of a display backplane in an exemplary embodiment of the present disclosure
  • FIG. 2 is a cross-sectional view of another display backplane structure in an exemplary embodiment of the present disclosure
  • FIG. 3 is a cross-sectional view of the structure of the display backplane after completing step S1 in the manufacturing method of the display backplane in an exemplary embodiment of the present disclosure
  • step S2 is a cross-sectional view of the structure of the display backplane after completing step S2 in the method for preparing the display backplane according to an exemplary embodiment of the present disclosure
  • FIG. 5 is a structural cross-sectional view of the display backplane after completing step S3 in the manufacturing method of the display backplane in an exemplary embodiment of the present disclosure
  • FIG. 6 is a structural cross-sectional view of the display backplane after completing step S3' in the manufacturing method of the display backplane according to an exemplary embodiment of the present disclosure
  • FIG. 7 is a structural cross-sectional view of the display backplane after completing step S5 in the method for preparing the display backplane according to an exemplary embodiment of the present disclosure
  • FIG. 8 is a schematic diagram showing the positions of the cut-off line and the cutting line of the separation between the substrate and the flexible layer in the manufacturing method of the backplane in an exemplary embodiment of the present disclosure.
  • FIG. 9 is a schematic diagram showing the cutting depth of the substrate in the method for preparing the backplane in an exemplary embodiment of the present disclosure.
  • FIG. 10 is a structural cross-sectional view of the display backplane after completing step S5' in the manufacturing method of the display backplane in an exemplary embodiment of the present disclosure
  • step S6 is a cross-sectional view of the structure of the display backplane after completing step S6 in the method for preparing the display backplane according to an exemplary embodiment of the present disclosure
  • FIG. 12 is a schematic top view of a partition of a display motherboard in an exemplary embodiment of the present disclosure.
  • FIG. 13 is a cross-sectional view of the structure of the motherboard shown in FIG. 12 along the AA section line;
  • FIG. 14 is a cross-sectional view showing another structure of the motherboard along the section line AA in FIG. 12 in an exemplary embodiment of the present disclosure.
  • Substrate; 101 first side plate surface; 102, second side plate surface; 103, edge end surface; 2. flexible layer; 3. pixel drive circuit; 31, transistor; 310, gate; 311, first inorganic Insulating layer; 312, active layer; 313, first pole; 314, second pole; 32, second inorganic insulating layer; 33, pixel electrode; 4. backlight circuit, 41, first electrode, 42, first Insulation layer; 43. Second electrode; 44. Second insulation layer; 45. LED; 5. Buffer layer; 51. First division; 52. Second division; 10. First zone; 11. Second zone 12, the third zone; L, the first direction; 6, the flexible filling layer; P, the separation cut-off line; T, the cutting line; 7, the daughter board.
  • LED Light Emitting Diode, light-emitting diode
  • LCD Liquid Crystal Display
  • the traditional LED backlight board needs to be manufactured separately, and then the LCD panel undergoes a module process to integrate the LED backlight.
  • the source board is integrated with the LCD panel. Due to the high cost of the LED backlight board itself, and the separate production of the LED backlight board and the LCD panel, and then integration of the two, the production cost and device cost of the LCD display using the LED backlight are greatly increased, which is not conducive to its market Promotion and application.
  • exemplary embodiments of the present invention provide a display backplane and a manufacturing method thereof, a display substrate, and a display panel.
  • An exemplary embodiment of the present invention provides a display backplane, as shown in FIG. 1, comprising: a substrate 1.
  • the substrate 1 has a first side plate surface 101 and a second side plate surface 102 opposite to each other.
  • Flexible layer 2 which wraps the first side panel surface 101 and extends to cover the second side panel surface 102; the pixel driving circuit 3 on the first side panel surface 101; the backlight circuit on the second side panel surface 102 4.
  • the pixel driving circuit 3 is located on the side of the flexible layer 2 away from the first side plate surface 101, and the backlight circuit 4 is located on the side of the flexible layer 2 away from the second side plate surface 102.
  • the substrate 1 can be a glass substrate.
  • the flexible layer 2 is made of an organic resin material, such as polyimide.
  • the flexible layer 2 has a certain degree of flexibility and can assist in bending the backlight circuit 4 prepared on the flat flexible layer 2 to the substrate 1 during the preparation process.
  • the second side plate surface 102 side of the second side panel, compared with the current backlight source plate and LCD panel need to be manufactured separately and then integrated, the solution in this embodiment does not need to separately manufacture the backlight source plate containing the backlight source circuit 4 and
  • the display substrate of the pixel driving circuit 3 does not require an additional integration process for the display substrate including the pixel driving circuit 3 and the backlight source board including the backlight source circuit 4, thereby greatly reducing the device cost and manufacturing cost of the display backplane. This is further conducive to the market promotion and application of the display backplane.
  • the pixel driving circuit 3 includes a transistor 31, a second inorganic insulating layer 32, and a pixel electrode 33 that are sequentially disposed away from the flexible layer 2;
  • the transistor 31 includes a gate 310 and a first inorganic insulating layer 311 that are sequentially disposed away from the flexible layer 2 ,
  • the active layer 312, the first electrode 313 and the second electrode 314, the first electrode 313 and the second electrode 314 are arranged in the same layer and are separately arranged at two ends of the active layer 312, and are respectively connected to the active layer 312;
  • the pole 313 is connected to the pixel electrode 33 through a via hole opened in the second inorganic insulating layer 32. That is, the transistor 31 is a bottom-gate transistor.
  • the backlight source circuit 4 includes a first electrode 41, a first insulating layer 42, a second electrode 43, a second insulating layer 44, and an LED 45 that are sequentially disposed away from the flexible layer 2;
  • the via hole in the layer 42 and the second insulating layer 44 is connected to the anode of the LED 45;
  • the second electrode 43 is connected to the cathode of the LED 45 through the via hole opened in the second insulating layer 44.
  • LED45 can be Mini LED or Micro LED.
  • the first electrode 41 and the gate 310 are formed of the same film layer; the first insulating layer 42 and the first inorganic insulating layer 311 are formed of the same film layer; the second electrode 43 is formed with the first electrode 313 and the second electrode The diode 314 is formed of the same film layer; the second insulating layer 44 and the second inorganic insulating layer 32 are formed of the same film layer.
  • the first electrode 41 and the gate 310 can be prepared and formed by a single process; the first insulating layer 42 and the first inorganic insulating layer 311 can be prepared and formed by a single process; the second electrode 43 and the first electrode 313 and the second electrode 314 can be prepared and formed by a single process; the second insulating layer 44 and the second inorganic insulating layer 32 can be prepared and formed by a single process, thereby greatly simplifying the manufacturing process of the pixel driving circuit 3 and the backlight circuit 4, Compared with the current solution that the backlight source plate and the LCD panel need to be manufactured separately and then integrated, the manufacturing cost of the display backplane is further reduced.
  • the display backplane further includes a buffer layer 5.
  • the buffer layer 5 includes a first part 51 and a second part 52.
  • the first part 51 is disposed above the first side surface 101 of the substrate 1 and sandwiches Set between the flexible layer 2 and the pixel driving circuit 3, the second sub-portion 52 is set above the second side surface 102 of the substrate 1 and sandwiched between the flexible layer 2 and the backlight circuit 4.
  • the buffer layer 5 is made of inorganic insulating materials, such as silicon oxide.
  • the arrangement of the buffer layer 5 can improve the adhesion between the metal conductive film layer prepared thereon and the flexible layer 2 on the one hand. Protection to prevent external water vapor from invading the flexible layer 2 and causing damage to it.
  • the thickness H1 of the flexible layer 2 covering the first side panel surface 101 of the substrate 1 is equal to the thickness H1 of the flexible layer 2 covering the second side panel surface 102 of the substrate 1, and the flexibility of the edge end surface 103 of the wrapping substrate 1
  • the thickness H2 of the layer 2 is greater than the thickness H1 of the flexible layer 2 wrapping the first side surface 101 of the substrate 1.
  • the edge end surface 103 of the base 1 refers to the side end surface of the base 1 located between the first side plate surface 101 and the second side plate surface 102.
  • the edge end surface of the base 1 has Four, in this embodiment, one of the edge end faces is wrapped by the flexible layer 2.
  • the thickness of part of the edge end surface 103 of the flexible layer 2 wrapping the substrate 1 can be thickened, so that on the one hand, the part of the flexible layer 2 wrapping the edge end surface 103 of the substrate 1 is not easily broken, and on the other hand, it can prevent external water vapor from passing through the flexible layer. 2 Penetrate into the display backplane to avoid damage to the internal circuits of the display backplane.
  • a chamfer is formed at the boundary between the edge end surface 103 of the substrate 1 wrapped with the flexible layer 2 and the first side surface 101 and the second side surface 102 of the substrate 1. In this way, the edge of the substrate 1 can be no longer so sharp, thereby preventing the edge of the substrate 1 from causing scratching and damage to the flexible layer 2 wrapping it.
  • the first electrode and the second electrode of the backlight circuit can also be arranged in the same layer, and the first electrode is connected to the anode of the LED through the via hole opened in the first insulating layer and the second insulating layer; The two electrodes are connected to the negative electrode of the LED through the via holes opened in the first insulating layer and the second insulating layer.
  • the first electrode and the second electrode are formed of the same film layer as the gate electrode.
  • the transistor in the pixel driving circuit may also be a top-gate transistor, that is, the gate is located on the side of the active layer away from the substrate.
  • the first electrode and the active layer are formed of the same film layer.
  • the first electrode and the second electrode of the backlight circuit can also be formed with other conductive film layers in the pixel driving circuit through a single process, which is not limited here. All of this can greatly simplify the manufacturing process of the pixel driving circuit and the backlight circuit. Compared with the current backlight plate and the LCD panel that need to be manufactured separately and then integrated, the manufacturing cost of the display backplane can be further reduced.
  • the driving chip of the pixel driving circuit and the driving chip of the backlight circuit can be arranged at any side edge of the display backplane, and the binding of the driving chip and the peripheral printed circuit board is also bound according to the conventional binding method. That is, the structural design of the display backplane described above will not affect the setting of the driving chips and the binding with the peripheral printed circuit board.
  • each driving chip can also be arranged on any edge of the second side surface of the substrate.
  • An exemplary embodiment of the present invention provides a display backplane.
  • the difference from the above-mentioned embodiment is that, as shown in FIG. 42.
  • the first electrode 41 is exposed through the via holes opened in the first insulating layer 42 and the second insulating layer 44, and is configured to connect to the anode of the LED to be bound;
  • the two electrodes 43 are exposed through the via holes opened in the second insulating layer 44, and are configured to connect to the negative electrode of the LED to be bound.
  • the backlight circuit 4 does not include LEDs.
  • the LED is manufactured after the display backplane is prepared.
  • the display backplane provided in the above exemplary embodiment is provided with a flexible layer, the flexible layer wraps the first side plate surface and extends to cover the second side plate surface, and the pixel drive circuit is arranged above the flexible layer that wraps the first side plate surface,
  • the backlight circuit is arranged above the flexible layer that wraps the second side board surface, which can assist in bending the backlight source circuit prepared on the flat flexible layer to the second side board surface side of the substrate during the preparation process, which is compared with the current backlight source board.
  • the LCD panel and LCD panel need to be manufactured separately and then integrated.
  • the solution in this embodiment does not need to separately manufacture the backlight plate containing the backlight circuit and the display substrate containing the pixel drive circuit, and there is no need to separately produce the pixel drive circuit.
  • the display substrate and the backlight source board containing the backlight source circuit are integrated, thereby greatly reducing the device cost and the manufacturing cost of the display backplane, which is more conducive to the market promotion and application of the display backplane.
  • an exemplary embodiment of the present invention provides a method for manufacturing a display backplane.
  • the display backplane includes a substrate 1, and the substrate 1 has a first region 10, The second zone 11 and the third zone 12, and the first zone 10, the second zone 11 and the third zone 12 are arranged in sequence along the first direction L and adjacent to each other.
  • the preparation method includes:
  • Step S1 forming a flexible layer 2 on the substrate 1.
  • the flexible layer 2 extends from the first area 10 to and covers the second area 11 and the third area 12, as shown in FIG. 3.
  • the flexible layer 2 on the substrate 1 further includes: forming a buffer layer 5; the buffer layer 5 extends from the first region 10 to and covers the second region 11 and the third region 12.
  • the buffer layer 5 is made of an inorganic insulating material, such as silicon oxide.
  • the buffer layer 5 is prepared by a traditional patterning process. The preparation of the buffer layer 5, on the one hand, can improve the adhesion strength of the metal conductive film layer prepared thereon to it, and on the other hand, it can also protect the flexible layer 2 from intrusion of external water vapor into the flexible layer 2 and damage it.
  • Step S2 forming the pixel driving circuit 3 in the first area 10 and forming the backlight source circuit 4 in the third area 12. Wherein, part of the film layer of the pixel driving circuit 3 extends from the first area 10 to and covers the second area 11 and the third area 12, as shown in FIG. 4.
  • Step S3 removing the film layer of the second region 11 on the side of the flexible layer 2 away from the substrate 1. As shown in Figure 5.
  • the preparation method further includes step S3′: forming a flexible filling layer 6 on the substrate 1.
  • the flexible filling layer 6 is distributed in the second region 11. As shown in Figure 6.
  • the flexible filling layer 6 uses the same organic resin material as the flexible layer 2, such as polyimide.
  • the formation of the flexible filling layer 6 can increase the thickness of the flexible layer 2 of the second zone 11, and the flexible layer 2 part of the second zone 11 will subsequently wrap the edge end surface of the substrate 1, so that on the one hand, the flexible layer 2 can be wrapped
  • the part of the edge end surface of the substrate 1 is not easy to be broken, and on the other hand, it can prevent external water vapor from penetrating into the interior of the display backplane through the flexible layer 2, so as to avoid damage to the internal circuits of the display backplane.
  • Step S4 Separate the substrate 1 from the flexible layer 2 in the second zone 11 and the third zone 12.
  • Step S5 Remove the substrate 1 in the second area 11 and the third area 12. As shown in Figure 7.
  • Step S5 is specifically: cutting and splitting the substrate 1 in the second zone 11 and the third zone 12.
  • the orthographic projection of the cutoff line P between the substrate 1 and the flexible layer 2 on the substrate 1 is located in the first zone 10, and the cutting line T for cutting the substrate 1 is the first zone 10 and The boundary line of the second region 11; the distance m between the cut-off line P and the cutting line T ranges from 20 to 50 ⁇ m.
  • the distance m between the cut-off line P and the cutting line T is 30 ⁇ m. That is, the separation cut-off line P exceeds the cutting line T by a certain distance in the direction close to the first zone 10.
  • This setting can not only avoid the situation that the substrate 1 and the flexible layer 2 are not separated at the cutting line T under the relatively limited separation accuracy.
  • the substrate 1 is cut from the side of the substrate 1 away from the flexible layer 2; the cutting depth n of the substrate 1 ranges from 3/5 to 4/5 of the thickness of the substrate 1 .
  • Such cutting can not only avoid defective splitting caused by too shallow cutting depth, but also avoid cutting damage to the flexible layer 2 caused by too deep cutting depth.
  • the preparation method further includes step S5': chamfering the cut and split section of the substrate 1. As shown in Figure 10.
  • a mechanical grinding method is used to chamfer the cut fracture section of the substrate 1.
  • a grinding wheel or other grinding wheel is used to chamfer the cut fracture section of the substrate 1, so that the edge and corner of the cutting fracture section of the substrate 1 tends to be smooth and avoid The sharp edges and corners cause scratch damage to the flexible layer 2.
  • Step S6 bending the film layer of the third region 12 to the side of the substrate 1 of the first region 10 away from the flexible layer 2. As shown in Figure 11.
  • the flexible layer in the second area may be formed on the side facing away from the substrate. Filling layer. This is also to increase the thickness of the flexible layer in the second zone.
  • the flexible layer in the second zone wraps the edge end surface of the substrate, so that on the one hand, the part of the flexible layer that wraps the edge end surface of the substrate is not easily broken, and the other On the one hand, it can also prevent external water vapor from penetrating into the display backplane through the flexible layer, so as to avoid damage to the internal circuits of the display backplane.
  • forming the pixel driving circuit 3 in the first region 10 includes sequentially forming a transistor 31, a second inorganic insulating layer 32, and a pixel electrode 33; forming the transistor 31 includes sequentially forming a gate 310 and a first inorganic insulating layer.
  • each film layer of the pixel driving circuit 3 adopts a traditional mature process, such as a patterning process, including all or part of the steps of film formation, photoresist coating, exposure, development, etching, cleaning, etc. I won't repeat it here.
  • forming the backlight circuit 4 in the third region 12 includes sequentially forming the first electrode 41, the first insulating layer, the second electrode 43, the second insulating layer, and the bonding LED 45;
  • the patterning process forms the first electrode 41 and the gate 310;
  • the first inorganic insulating layer 311 in the first region 10 extends to the third region 12 to form the first insulating layer;
  • the second electrode 43 and the first electrode 313 are formed by one patterning process And the second electrode 314; extend from the second inorganic insulating layer 32 of the first region 10 to the third region 12 to form a second insulating layer; connect the first electrode through vias opened in the first insulating layer and the second insulating layer 41 and the anode of the LED 45; and the second electrode 43 and the cathode of the LED 45 are connected through a via hole opened in the second insulating layer.
  • the manufacturing process of the pixel drive circuit 3 and the backlight circuit 4 can be greatly simplified, compared with the current backlight plate
  • the LCD panel and LCD panel need to be manufactured separately and then integrated, which further reduces the manufacturing cost of the display backplane.
  • the preparation of the LED on the substrate is achieved by SMT (Surface Mounted Technology) process method.
  • SMT Surface Mounted Technology
  • a single robotic arm is used to pick up the LED chip and then directly place it on the third area of the substrate and make it
  • the positive and negative electrodes are respectively connected to the first electrode and the second electrode.
  • the specific process is: a. Chip expansion, that is, the tightly arranged LED chips on the blue film are expanded to a suitable spacing for grasping; b. Solder paste printing, that is, the solder paste is printed on the drive substrate (ie the base of the base) by screen printing. The third zone); c. Solid crystal, that is, the LED chips are transferred from the blue film to the drive substrate one by one, and temporarily fixed on the electrode pads; d.
  • the SMT process method is suitable for transferring Mini LEDs and preparing them on a substrate, and also suitable for transferring larger-sized Micro LEDs and preparing them on a substrate. In the case of a large number of LEDs, the method of Mass Transfer (MT) can also be used to transfer them to the substrate.
  • MT Mass Transfer
  • the process of transferring the LED to the substrate is not limited to the above-mentioned methods. There are still many more mature process methods, which will not be repeated here.
  • the order of preparation of some of the film layers is adjusted. For example, the gate is formed after the active layer is formed, and the first electrode and the active layer are patterned once. The process is formed, and the preparation method of each film layer remains unchanged.
  • the first electrode and the second electrode of the backlight circuit can also be formed simultaneously in one patterning process.
  • the first electrode and the second electrode of the backlight circuit can also be formed with other conductive film layers in the pixel driving circuit through a single process, which is not limited here.
  • Such preparation can greatly simplify the manufacturing process of the pixel driving circuit and the backlight circuit. Compared with the current backlight plate and LCD panel that need to be manufactured separately and then integrated, both can further reduce the manufacturing cost of the display backplane. .
  • An exemplary embodiment of the present invention provides a method for manufacturing a display backplane.
  • forming a backlight circuit in the third region includes sequentially forming a first electrode, a first insulating layer, and The second electrode and the second insulating layer; wherein, a patterning process is used to form the first electrode and the gate; the first inorganic insulating layer in the first region extends to the third region to form the first insulating layer; the patterning process is used to form the first insulating layer Two electrodes and the first electrode and the second electrode; extend from the second inorganic insulating layer in the first area to the third area to form a second insulating layer; pass the first electrode through the openings in the first insulating layer and the second insulating layer
  • the via hole is exposed and is configured to connect to the anode of the LED to be bound; the second electrode is exposed through the via hole opened in the second insulating layer and is configured to connect to the cathode
  • the LED is prepared after the film layer of the third zone is bent to the back of the first zone.
  • the preparation of LEDs can be achieved by SMT (Surface Mounted Technology) process method. It should be noted that before the LED is prepared by the SMT process method, a protective layer is formed on the side of the pixel driving circuit in the first area away from the substrate.
  • the protective layer is made of resin material or optical transparent glue material. One area is covered to protect the pixel driving circuit in the first area.
  • the protective layer can be prepared by coating or printing. After the LED is prepared, the protective layer is removed by exposure, development or ashing.
  • the flexible layer extends from the first area to and covers the second and third areas, and the flexible layer in the first area
  • the pixel driving circuit is formed above, and the backlight circuit is formed above the flexible layer in the third area.
  • the backlight circuit prepared on the flat flexible layer can be bent to the back of the first area. Compared with the current needs of backlight boards and LCD panels Separately manufactured and then integrated solutions.
  • the solution in this embodiment no longer needs to separately manufacture a backlight plate containing a backlight circuit and a display substrate containing a pixel drive circuit, and there is no need to separately manufacture a display substrate containing a pixel drive circuit and a display substrate containing a pixel drive circuit.
  • the backlight source board including the backlight source circuit undergoes an integration process, thereby greatly reducing the device cost and the manufacturing cost of the display backplane, which is more conducive to the market promotion and application of the display backplane.
  • FIG. 12 and FIG. A zone 10, a second zone 11 and a third zone 12.
  • the first zone 10, the second zone 11 and the third zone 12 are arranged in sequence along the first direction L and are adjacent to each other.
  • the substrate 1 is provided with a flexible layer 2 which is flexible The layer 2 extends from the first area 10 to and covers the second area 11 and the third area 12; a pixel driving circuit 3 is formed in the first area 10, and the pixel driving circuit 3 is located on the side of the flexible layer 2 away from the substrate 1;
  • a backlight source circuit 4 is formed in the third zone 12; the backlight source circuit 4 is located on the side of the flexible layer 2 away from the substrate 1.
  • the substrate 1 can be a glass substrate.
  • the flexible layer 2 is made of organic resin material, such as polyimide, etc.
  • the flexible layer 2 has a certain degree of flexibility and can assist in the preparation of the flat flexible layer during the preparation process of the display panel using the daughter board of the display mother board.
  • the backlight circuit 4 on 2 is bent to the back side of the substrate 1 away from the pixel driving circuit 3.
  • the solution in this embodiment does not need to be Separately fabricate the backlight plate containing the backlight circuit 4 and the display substrate containing the pixel drive circuit 3, and there is no need to separately integrate the display substrate containing the pixel drive circuit 3 and the backlight plate containing the backlight circuit 4, thus greatly
  • the device cost and manufacturing cost of the display panel using the daughter board 7 in the display mother board are reduced, which is more beneficial to the market promotion and application of the display panel using the daughter board 7 in the display mother board.
  • the pixel driving circuit 3 includes a transistor 31, a second inorganic insulating layer 32, and a pixel electrode 33 that are sequentially disposed away from the flexible layer 2;
  • the transistor 31 includes a gate 310 and a first inorganic insulating layer 311 that are sequentially disposed away from the flexible layer 2 ,
  • the active layer 312, the first electrode 313 and the second electrode 314, the first inorganic insulating layer 311 is located between the gate 310 and the active layer 312, the first electrode 313 and the second electrode 314 are arranged in the same layer and are arranged separately Both ends of the source layer 312 are respectively connected to the active layer 312;
  • the first electrode 313 is connected to the pixel electrode 33 through the via hole opened in the second inorganic insulating layer 32;
  • the second inorganic insulating layer 32 and the first inorganic insulating layer 311 also extends to and covers the second zone 11 and the third zone 12.
  • the backlight circuit 4 includes a first electrode 41, a second electrode 43, and an LED 45 that are sequentially disposed away from the flexible layer 2; the first inorganic insulating layer 311 is located between the first electrode 41 and the second electrode 43; The insulating layer 32 is located between the second electrode 43 and the LED 45; the first electrode 41 is connected to the anode of the LED 45 through the via holes opened in the first inorganic insulating layer 311 and the second inorganic insulating layer 32; The via hole in the two inorganic insulating layer 32 is connected to the negative electrode of the LED 45.
  • the preparation of the LED on the substrate is realized by the SMT (Surface Mounted Technology) process method described in the foregoing embodiment.
  • SMT Surface Mounted Technology
  • LEDs can also be realized by other process methods, so I won't repeat them here.
  • the first electrode 41 and the gate 310 are made of the same material and arranged in the same layer; the second electrode 43 and the first electrode 313 and the second electrode 314 are made of the same material and arranged in the same layer. That is, in the preparation of the display mother board, the first electrode 41 and the gate 310 can be prepared and formed by a single process; the second electrode 43 and the first electrode 313 and the second electrode 314 can be prepared and formed by a single process, so that the pixel driving circuit 3 The preparation process of the backlight circuit 4 and the backlight source circuit 4 are greatly simplified. Compared with the current backlight source board and the LCD panel that need to be manufactured separately and then integrated, the preparation cost of the display panel using the display mother board neutron board 7 is further reduced. .
  • the display motherboard in this embodiment further includes a buffer layer 5, which extends from the first region 10 to and covers the second region 11 and the third region 12; in the first region 10, the buffer layer 5 sandwiches It is arranged between the flexible layer 2 and the pixel driving circuit 3; in the third area 12, the buffer layer 5 is sandwiched between the flexible layer 2 and the backlight circuit 4.
  • the buffer layer 5 is made of inorganic insulating materials, such as silicon oxide. The arrangement of the buffer layer 5 can improve the adhesion between the metal conductive film layer prepared thereon and the flexible layer 2 on the one hand. Protection to prevent external water vapor from invading the flexible layer 2 and causing damage to it.
  • the first electrode and the second electrode of the backlight circuit can also be arranged in the same layer, and the first electrode is connected to the anode of the LED through the via hole opened in the first inorganic insulating layer and the second inorganic insulating layer. ; The second electrode is connected to the negative electrode of the LED through a via hole opened in the first inorganic insulating layer and the second inorganic insulating layer.
  • the first electrode and the second electrode and the gate are made of the same material and arranged in the same layer.
  • the transistor in the pixel driving circuit may also be a top-gate transistor, that is, the gate is located on the side of the active layer away from the substrate.
  • the first electrode and the active layer are made of the same material and arranged in the same layer.
  • the first electrode and the second electrode of the backlight circuit can also be formed with other conductive film layers in the pixel driving circuit through a single process, which is not limited here. All of this can greatly simplify the manufacturing process of the pixel driving circuit and the backlight circuit. Compared with the current backlight plate and LCD panel that need to be manufactured separately and then integrated, it can further reduce the use of the daughter board of the display mother board. The manufacturing cost of the display panel.
  • the backlight circuit 4 includes a first electrode 41 and a second electrode 43 that are sequentially disposed away from the flexible layer 2.
  • the first inorganic insulating layer 311 is located between the first electrode 41 and the second electrode 43; the second inorganic insulating layer 32 is located on the side of the second electrode 43 away from the flexible layer 2; the first electrode 41 is opened in the first inorganic insulating layer
  • the via holes in the layer 311 and the second inorganic insulating layer 32 are exposed and are configured to connect to the anode of the LED to be bound; the second electrode 43 is exposed through the via holes opened in the second inorganic insulating layer 32 and is configured to connect The negative pole of the LED to be bound.
  • the bonding process of the LEDs in the display motherboard is not yet completed.
  • the LEDs are then bound during the preparation of the display panel using the daughter board of the display mother board.
  • the flexible layer extends from the first area to and covers the second area and the third area.
  • the first area is formed with the pixel driving circuit
  • the third area is formed with the backlight source.
  • the circuit can assist in bending the backlight circuit prepared on the flat flexible layer to the back side of the substrate away from the pixel driving circuit during the preparation process of the display panel using the daughter board of the display mother board.
  • LCD panels need to be manufactured separately and then integrated. There is no need to separately manufacture the backlight plate containing the backlight circuit and the display substrate containing the pixel drive circuit, and there is no need to separately make the display substrate containing the pixel drive circuit and the display substrate containing the backlight.
  • the backlight source board of the source circuit is integrated, thereby greatly reducing the device cost and manufacturing cost of the display panel using the daughter board in the display mother board, which is more conducive to the display panel using the daughter board in the display mother board. Marketing and application.
  • An exemplary embodiment of the present invention provides a display panel, including the display backplane in the foregoing embodiment, and further including an opposite substrate, and the opposite substrate faces the box with the first side plate of the display backplane.
  • the opposite substrate may be a color filter substrate.
  • the color film substrate and the display backplane are boxed to form a display panel integrated with a backlight source plate.
  • the device cost and manufacturing cost of the display panel are greatly reduced, which is more conducive to the market promotion and application of the display panel.
  • the display panel provided by the exemplary embodiment of the present invention may be any product or component with a display function, such as an LCD panel, an LCD TV, a display, a mobile phone, and a navigator.

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Abstract

一种显示背板的制备方法，显示背板包括基底(1)，基底(1)具有第一区(10)、第二区(11)和第三区(12)，第一区(10)、第二区(11)和第三区(12)沿第一方向(L)依次排布且彼此邻接，制备方法包括：在基底(1)上形成柔性层(2)；其中，柔性层(2)由第一区(10)延伸至并覆盖第二区(11)和第三区(12)；在第一区(10)形成像素驱动电路(3)和在第三区(12)形成背光源电路(4)；其中，像素驱动电路(3)的部分膜层由第一区(10)延伸至并覆盖第二区(11)和第三区(12)；去除第二区(11)的位于柔性层(2)远离基底(1)一侧的膜层；将第二区(11)和第三区(12)的基底(1)与柔性层(2)分离；去除第二区(11)和第三区(12)的基底(1)；将第三区(12)的膜层弯折至第一区(10)的基底(1)远离柔性层(2)的一侧。

Description

一种显示背板及其制备方法、显示母板和显示面板 技术领域
本公开实施例属于显示技术领域，具体涉及一种显示背板及其制备方法、显示母板和显示面板。
背景技术
目前使用LED(Light Emitting Diode，发光二极管)光源作为LCD(Liquid Crystal Display)显示器背光源成为LCD显示器的主流，传统的LED背光源板需要单独制作，然后与LCD面板进行模组工艺，将LED背光源板与LCD面板整合在一起。
发明内容
本公开实施例提供一种显示背板及其制备方法、显示母板和显示面板。
第一方面，本公开实施例提供一种显示背板，包括：
基底，所述基底具有相对的第一侧板面和第二侧板面；
位于基底上的柔性层，所述柔性层包裹所述第一侧板面并延伸覆盖所述第二侧板面；
在所述第一侧板面上的像素驱动电路；
在所述第二侧板面上的背光源电路，所述像素驱动电路位于所述柔性层的背离所述第一侧板面的一侧，所述背光源电路位于所述柔性层的背离所述第二侧板面的一侧。
在一些实施例中，所述像素驱动电路包括依次远离所述柔性层设置的晶体管、第二无机绝缘层和像素电极；
所述晶体管包括依次远离所述柔性层设置的栅极、第一无机绝缘层、有源层、第一极和第二极，所述第一极和所述第二极同层设置且分设于所述有源层的两端，并分别与所述有源层连接；
所述第一极通过开设在所述第二无机绝缘层中的过孔连接所述像素电极。
在一些实施例中，所述背光源电路包括依次远离所述柔性层设置的第一电极、第一绝缘层、第二电极、第二绝缘层和LED；
所述第一电极通过开设在所述第一绝缘层和所述第二绝缘层中的过孔连接所述LED的正极；所述第二电极通过开设在所述第二绝缘层中的过孔连接所述LED的负极。
在一些实施例中，所述背光源电路包括依次远离所述柔性层设置的第一电极、第一绝缘层、第二电极和第二绝缘层；
所述第一电极通过开设在所述第一无机绝缘层和所述第二无机绝缘层中的过孔暴露，被配置为连接待绑定的LED的正极；所述第二电极通过开设在所述第二无机绝缘层中的过孔暴露，被配置为连接待绑定的LED的负极。
在一些实施例中，所述第一电极与所述栅极由同一膜层形成；所述第一绝缘层与所述第一无机绝缘层由同一膜层形成；所述第二电极与所述第一极和所述第二极由同一膜层形成；所述第二绝缘层与所述第二无机绝缘层由同一膜层形成。
在一些实施例中，显示背板还包括缓冲层，所述缓冲层包括第一分部和第二分部，所述第一分部设置于所述基底的第一侧板面上方，且夹设于所述柔性层与所述像素驱动电路之间，所述第二分部设置于所述基底的第二侧板面上方，且夹设于所述柔性层与所述背光源电路之间。
在一些实施例中，包裹所述基底的第一侧板面的所述柔性层的厚度等于覆盖所述基底的第二侧板面的所述柔性层的厚度，包裹所述基底的边缘端面的所述柔性层的厚度大于包裹所述基底的第一侧板面的所述柔性层的厚度。
在一些实施例中，包裹有所述柔性层的所述基底的边缘端面与所述基 底的第一侧板面和所述第二侧板面的交界处形成有倒角。
第二方面，本公开实施例提供一种显示母板，包括多个子板，所述子板排布呈阵列，所述子板包括基底，所述基底具有第一区、第二区和第三区，所述第一区、所述第二区和所述第三区沿第一方向依次排布且彼此邻接，所述基底上设置有柔性层，所述柔性层由所述第一区延伸至并覆盖所述第二区和所述第三区；
所述第一区内形成有像素驱动电路，所述像素驱动电路位于所述柔性层的背离所述基底的一侧；所述第三区内形成有背光源电路；所述背光源电路位于所述柔性层的背离所述基底的一侧。
在一些实施例中，所述像素驱动电路包括依次远离所述柔性层设置的晶体管、第二无机绝缘层和像素电极；
所述晶体管包括依次远离所述柔性层设置的栅极、第一无机绝缘层、有源层、第一极和第二极，所述第一无机绝缘层位于所述栅极和所述有源层之间，所述第一极和所述第二极同层设置且分设于所述有源层的两端，并分别与所述有源层连接；
所述第一极通过开设在所述第二无机绝缘层中的过孔连接所述像素电极；
所述第二无机绝缘层和所述第一无机绝缘层还延伸至并覆盖所述第二区和所述第三区。
在一些实施例中，所述背光源电路包括依次远离所述柔性层设置的第一电极、第二电极和LED；所述第一无机绝缘层位于所述第一电极和所述第二电极之间；所述第二无机绝缘层位于所述第二电极和所述LED之间；
所述第一电极通过开设在所述第一无机绝缘层和所述第二无机绝缘层中的过孔连接所述LED的正极；所述第二电极通过开设在所述第二无机绝缘层中的过孔连接所述LED的负极。
在一些实施例中，所述背光源电路包括依次远离所述柔性层设置的第一电极和第二电极；所述第一无机绝缘层位于所述第一电极和所述第二电极之间；所述第二无机绝缘层位于所述第二电极背离所述柔性层的一侧；
所述第一电极通过开设在所述第一无机绝缘层和所述第二无机绝缘层中的过孔暴露，被配置为连接待绑定的LED的正极；所述第二电极通过开设在所述第二无机绝缘层中的过孔暴露，被配置为连接待绑定的LED的负极。
在一些实施例中，所述第一电极与所述栅极采用相同材料且同层设置；所述第二电极与所述第一极和所述第二极采用相同材料且同层设置。
在一些实施例中，显示母板还包括缓冲层，所述缓冲层由所述第一区延伸至并覆盖所述第二区和所述第三区；
在所述第一区，所述缓冲层夹设于所述柔性层与所述像素驱动电路之间；在所述第三区，所述缓冲层夹设于所述柔性层与所述背光源电路之间。
第三方面，本公开实施例提供一种显示面板，包括上述显示背板，还包括对向基板，所述对向基板与所述显示背板的第一侧板面对盒。
第四方面，本公开实施例提供一种显示背板的制备方法，所述显示背板包括基底，所述基底具有第一区、第二区和第三区，所述第一区、所述第二区和所述第三区沿第一方向依次排布且彼此邻接，
所述制备方法包括：
在基底上形成柔性层；其中，所述柔性层由所述第一区延伸至并覆盖所述第二区和所述第三区；
在所述第一区形成像素驱动电路和在所述第三区形成背光源电路；其中，所述像素驱动电路的部分膜层由所述第一区延伸至并覆盖所述第二区和所述第三区；
去除所述第二区的位于所述柔性层远离所述基底一侧的膜层；
将所述第二区和所述第三区的所述基底与所述柔性层分离；
去除所述第二区和所述第三区的所述基底；
将所述第三区的膜层弯折至所述第一区的所述基底远离所述柔性层的一侧。
在一些实施例中，切割并裂片去除所述第二区和所述第三区的所述基底；
所述基底与所述柔性层的分离截止线在所述基底上的正投影位于所述第一区，切割所述基底的切割线为所述第一区与所述第二区的交界线；
所述分离截止线与所述切割线之间的间距范围为20～50μm。
在一些实施例中，从所述基底的背离所述柔性层的一侧对所述基底进行切割；对所述基底的切割深度范围为所述基底厚度的3/5～4/5。
在一些实施例中，切割并裂片去除所述第二区和所述第三区的所述基底之后，对所述基底的切割裂片断面进行倒角处理。
在一些实施例中，去除所述第二区的位于所述柔性层远离所述基底一侧的膜层之后，且将所述第二区和所述第三区的所述基底与所述柔性层分离之前还包括：
在所述基底上形成柔性填充层；所述柔性填充层分布于所述第二区。
在一些实施例中，将所述第三区的膜层弯折至所述第一区的所述基底远离所述柔性层的一侧之后还包括：在所述第二区的所述柔性层的背离所述基底的一侧形成柔性填充层。
在一些实施例中，在所述第一区形成像素驱动电路包括依次形成晶体管、第二无机绝缘层和像素电极；
形成晶体管包括依次形成栅极、第一无机绝缘层、有源层、第一极和第二极；
其中，所述第一无机绝缘层和所述第二无机绝缘层延伸至并覆盖所述 第二区和所述第三区；所述第一极和所述第二极同层设置且分设于所述有源层的两端，并分别与所述有源层连接；所述第一极通过开设在所述第二无机绝缘层中的过孔连接所述像素电极。
在一些实施例中，在所述第三区形成背光源电路包括依次形成第一电极、第一绝缘层、第二电极、第二绝缘层和绑定LED；其中，采用一次构图工艺形成所述第一电极与所述栅极；由所述第一区的所述第一无机绝缘层延伸至所述第三区形成所述第一绝缘层；采用一次构图工艺形成所述第二电极、所述第一极和所述第二极；由所述第一区的所述第二无机绝缘层延伸至所述第三区形成所述第二绝缘层；通过开设在所述第一绝缘层和所述第二绝缘层中的过孔连接所述第一电极和所述LED的正极；和通过开设在所述第二绝缘层中的过孔连接所述第二电极和所述LED的负极。
在一些实施例中，在所述第三区形成背光源电路包括依次形成第一电极、第一绝缘层、第二电极和第二绝缘层；其中，采用一次构图工艺形成所述第一电极与所述栅极；由所述第一区的所述第一无机绝缘层延伸至所述第三区形成所述第一绝缘层；采用一次构图工艺形成所述第二电极、所述第一极和所述第二极；由所述第一区的所述第二无机绝缘层延伸至所述第三区形成所述第二绝缘层；将所述第一电极通过开设在所述第一绝缘层和所述第二绝缘层中的过孔暴露，被配置为连接待绑定LED的正极，将所述第二电极通过开设在所述第二绝缘层中的过孔暴露，被配置为连接待绑定LED的负极。
在一些实施例中，在所述第一区形成像素驱动电路和在所述第三区形成背光源电路之前，且在基底上形成柔性层之后还包括：
形成缓冲层；所述缓冲层由所述第一区延伸至并覆盖所述第二区和所述第三区。
附图说明
附图用来提供对本公开实施例的进一步理解，并且构成说明书的一部分，与本公开实施例一起用于解释本公开，并不构成对本公开的限制。通过参考附图对详细示例实施例进行描述，以上和其它特征和优点对本领域技术人员将变得更加显而易见，在附图中：
图1为本公开示意性实施例中一种显示背板的结构剖视图；
图2为本公开示意性实施例中另一种显示背板的结构剖视图；
图3为本公开示意性实施例显示背板制备方法中完成步骤S1的显示背板的结构剖视图；
图4为本公开示意性实施例显示背板制备方法中完成步骤S2的显示背板的结构剖视图；
图5为本公开示意性实施例显示背板制备方法中完成步骤S3的显示背板的结构剖视图；
图6为本公开示意性实施例显示背板制备方法中完成步骤S3'的显示背板的结构剖视图；
图7为本公开示意性实施例显示背板制备方法中完成步骤S5的显示背板的结构剖视图；
图8为本公开示意性实施例显示背板制备方法中基底与柔性层的分离截止线与切割线的位置示意图。
图9为本公开示意性实施例显示背板制备方法中基底的切割深度的示意图；
图10为本公开示意性实施例显示背板制备方法中完成步骤S5'的显示背板的结构剖视图；
图11为本公开示意性实施例显示背板制备方法中完成步骤S6的显示背板的结构剖视图；
图12为本公开示意性实施例中一种显示母板的分区俯视示意图；
图13为图12中显示母板沿AA剖切线的结构剖视图；
图14为本公开示意性实施例中另一种显示母板沿图12中AA剖切线的结构剖视图。
其中附图标记为：
1、基底；101、第一侧板面；102、第二侧板面；103、边缘端面；2、柔性层；3、像素驱动电路；31、晶体管；310、栅极；311、第一无机绝缘层；312、有源层；313、第一极；314、第二极；32、第二无机绝缘层；33、像素电极；4、背光源电路；41、第一电极；42、第一绝缘层；43、第二电极；44、第二绝缘层；45、LED；5、缓冲层；51、第一分部；52、第二分部；10、第一区；11、第二区；12、第三区；L、第一方向；6、柔性填充层；P、分离截止线；T、切割线；7、子板。
具体实施方式
为使本领域技术人员更好地理解本公开实施例的技术方案，下面结合附图和具体实施方式对本公开实施例提供的一种显示背板及其制备方法、显示母板和显示面板作进一步详细描述。
在下文中将参考附图更充分地描述本公开实施例，但是所示的实施例可以以不同形式来体现，且不应当被解释为限于本公开阐述的实施例。反之，提供这些实施例的目的在于使本公开透彻和完整，并将使本领域技术人员充分理解本公开的范围。
本公开实施例不限于附图中所示的实施例，而是包括基于制造工艺而形成的配置的修改。因此，附图中例示的区具有示意性属性，并且图中所示区的形状例示了区的具体形状，但并不是旨在限制性的。
目前使用LED(Light Emitting Diode，发光二极管)光源作为LCD(Liquid Crystal Display)显示器背光源成为LCD显示器的主流，传统的LED背光源板需要单独制作，然后与LCD面板进行模组工艺，将LED背 光源板与LCD面板整合在一起。由于LED背光源板本身成本较高，且单独制作LED背光源板和LCD面板，再将二者整合在一起，导致采用LED背光源的LCD显示器制备成本和器件成本都大大提高，不利于其市场推广和应用。
针对上述采用LED背光源的LCD显示器制备成本和器件成本都比较高的问题，本发明的示意性实施例提供一种显示背板及其制备方法、显示基板和显示面板。
本发明的一示意性实施例提供一种显示背板，如图1所示，包括：基底1，基底1具有相对的第一侧板面101和第二侧板面102，位于基底1上的柔性层2，柔性层2包裹第一侧板面101并延伸覆盖第二侧板面102；在第一侧板面101上的像素驱动电路3；在第二侧板面102上的背光源电路4，像素驱动电路3位于柔性层2的背离第一侧板面101的一侧，背光源电路4位于柔性层2的背离第二侧板面102的一侧。
其中，基底1可以采用玻璃基底。柔性层2采用有机树脂材料制成，如聚酰亚胺等，柔性层2具有一定的柔韧性，能够在制备过程中辅助将制备在平面柔性层2上的背光源电路4弯折至基底1的第二侧板面102侧，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，本实施例中的方案无需再单独制作包含背光源电路4的背光源板和包含像素驱动电路3的显示基板，也无需再另外对包含像素驱动电路3的显示基板与包含背光源电路4的背光源板进行整合工艺，从而大大降低了该显示背板的器件成本和制备成本，进而更加有利于该显示背板的市场推广和应用。
可选的，像素驱动电路3包括依次远离柔性层2设置的晶体管31、第二无机绝缘层32和像素电极33；晶体管31包括依次远离柔性层2设置的栅极310、第一无机绝缘层311、有源层312、第一极313和第二极314， 第一极313和第二极314同层设置且分设于有源层312的两端，并分别与有源层312连接；第一极313通过开设在第二无机绝缘层32中的过孔连接像素电极33。即其中的晶体管31为底栅型晶体管。
可选的，背光源电路4包括依次远离柔性层2设置的第一电极41、第一绝缘层42、第二电极43、第二绝缘层44和LED45；第一电极41通过开设在第一绝缘层42和第二绝缘层44中的过孔连接LED45的正极；第二电极43通过开设在第二绝缘层44中的过孔连接LED45的负极。其中，LED45可以是Mini LED，也可以是Micro LED。
其中，进一步可选的，第一电极41与栅极310由同一膜层形成；第一绝缘层42与第一无机绝缘层311由同一膜层形成；第二电极43与第一极313和第二极314由同一膜层形成；第二绝缘层44与第二无机绝缘层32由同一膜层形成。即显示背板的制备中，第一电极41与栅极310可以通过一次工艺制备形成；第一绝缘层42与第一无机绝缘层311可以通过一次工艺制备形成；第二电极43与第一极313和第二极314可以通过一次工艺制备形成；第二绝缘层44与第二无机绝缘层32可以通过一次工艺制备形成，从而使像素驱动电路3和背光源电路4的制备工艺过程大大简化，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，进一步降低了该显示背板的制备成本。
进一步可选的，显示背板还包括缓冲层5，缓冲层5包括第一分部51和第二分部52，第一分部51设置于基底1的第一侧板面101上方，且夹设于柔性层2与像素驱动电路3之间，第二分部52设置于基底1的第二侧板面102上方，且夹设于柔性层2与背光源电路4之间。其中，缓冲层5采用无机绝缘材料，如氧化硅，缓冲层5的设置，一方面能够提升制备在其上的金属导电膜层与其的粘附牢固性，另一方面还能对柔性层2形成保护，防止外界水汽侵入柔性层2对其造成损坏。
进一步可选的，包裹基底1的第一侧板面101的柔性层2的厚度H1等 于覆盖基底1的第二侧板面102的柔性层2的厚度H1，包裹基底1的边缘端面103的柔性层2的厚度H2大于包裹基底1的第一侧板面101的柔性层2的厚度H1。其中，基底1的边缘端面103指的是位于第一侧板面101和第二侧板面102之间的基底1的侧边端面，在基底1是矩形的情况下，基底1的边缘端面有四个，本实施例中，其中一个边缘端面被柔性层2包裹。如此能使柔性层2的包裹基底1边缘端面103的部分厚度加厚，从而一方面能使柔性层2的包裹基底1边缘端面103的部分不易折断，另一方面还能防止外界水汽通过柔性层2渗入显示背板内部，以免对显示背板内部电路造成损坏。
进一步可选的，包裹有柔性层2的基底1的边缘端面103与基底1的第一侧板面101和第二侧板面102的交界处形成有倒角。如此能够使基底1的边缘不再那么锋利，从而防止基底1的边缘对包裹其的柔性层2造成划破损伤。
此外，在一些实施例中，背光源电路的第一电极和第二电极也可以同层设置，第一电极通过开设在第一绝缘层和第二绝缘层中的过孔连接LED的正极；第二电极通过开设在第一绝缘层和第二绝缘层中的过孔连接LED的负极。相应地，第一电极和第二电极与栅极由同一膜层形成。
在一些实施例中，像素驱动电路中的晶体管也可以是顶栅型晶体管，即栅极位于有源层的背离基底的一侧。相应地，第一电极与有源层由同一膜层形成。
在一些实施例中，背光源电路的第一电极和第二电极也可以分别与像素驱动电路中其他导电膜层通过一次工艺形成，这里不做限定。如此均能使像素驱动电路和背光源电路的制备工艺过程大大简化，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，均能进一步降低该显示背板的制备成本。
在一些实施例中，像素驱动电路的驱动芯片和背光源电路的驱动芯片 可以设置在显示背板的任意一侧边缘处，驱动芯片与外围印刷电路板的绑定也按照常规绑定方法绑定即可，即，上述显示背板的结构设计不会影响各驱动芯片的设置和与外围印刷电路板的绑定。另外，各驱动芯片也可以设置在基底的第二侧板面上的任意一边缘处。
本发明的一示意性实施例提供一种显示背板，与上述实施例不同的是，如图2所示，背光源电路4包括依次远离柔性层2设置的第一电极41、第一绝缘层42、第二电极43和第二绝缘层44；第一电极41通过开设在第一绝缘层42和第二绝缘层44中的过孔暴露，被配置为连接待绑定的LED的正极；第二电极43通过开设在第二绝缘层44中的过孔暴露，被配置为连接待绑定的LED的负极。
在该实施例中，背光源电路4不包括LED。LED在显示背板制备完成后，再进行制作。
本实施例中显示背板的其他结构与上述实施例中相同，这里不再赘述。
上述示意性实施例中所提供的显示背板，通过设置柔性层，柔性层包裹第一侧板面并延伸覆盖第二侧板面，包裹第一侧板面的柔性层上方设置像素驱动电路，包裹第二侧板面的柔性层上方设置背光源电路，能够在制备过程中辅助将制备在平面柔性层上的背光源电路弯折至基底的第二侧板面侧，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，本实施例中的方案无需再单独制作包含背光源电路的背光源板和包含像素驱动电路的显示基板，也无需再另外对包含像素驱动电路的显示基板与包含背光源电路的背光源板进行整合工艺，从而大大降低了该显示背板的器件成本和制备成本，进而更加有利于该显示背板的市场推广和应用。
基于显示背板的上述结构，本发明的一示意性实施例提供一种显示背板的制备方法，如图3-图11所示，显示背板包括基底1，基底1具有第一 区10、第二区11和第三区12，第一区10、第二区11和第三区12沿第一方向L依次排布且彼此邻接，该制备方法包括：
步骤S1：在基底1上形成柔性层2。其中，柔性层2由第一区10延伸至并覆盖第二区11和第三区12，如图3所示。
可选地，在基底1上形成柔性层2之后还包括：形成缓冲层5；缓冲层5由第一区10延伸至并覆盖第二区11和第三区12。其中，缓冲层5采用无机绝缘材料，如氧化硅。缓冲层5采用传统构图工艺制备形成。缓冲层5的制备，一方面能够提升制备在其上的金属导电膜层与其的粘附牢固性，另一方面还能对柔性层2形成保护，防止外界水汽侵入柔性层2对其造成损坏。
步骤S2：在第一区10形成像素驱动电路3和在第三区12形成背光源电路4。其中，像素驱动电路3的部分膜层由第一区10延伸至并覆盖第二区11和第三区12，如图4所示。
步骤S3：去除第二区11的位于柔性层2远离基底1一侧的膜层。如图5所示。
该制备方法还包括步骤S3'：在基底1上形成柔性填充层6。柔性填充层6分布于第二区11。如图6所示。
其中，柔性填充层6采用与柔性层2相同的有机树脂材料，如聚酰亚胺等。柔性填充层6的形成能使第二区11的柔性层2的厚度加厚，第二区11的柔性层2部分后续对基底1的边缘端面进行包裹，从而一方面能使柔性层2的包裹基底1边缘端面的部分不易折断，另一方面还能防止外界水汽通过柔性层2渗入显示背板内部，以免对显示背板内部电路造成损坏。
步骤S4：将第二区11和第三区12的基底1与柔性层2分离。
步骤S5：去除第二区11和第三区12的基底1。如图7所示。
步骤S5具体为：切割并裂片去除第二区11和第三区12的基底1。
如图8所示，步骤S4和步骤S5中，基底1与柔性层2的分离截止线P 在基底1上的正投影位于第一区10，切割基底1的切割线T为第一区10与第二区11的交界线；分离截止线P与切割线T之间的间距m的范围为20～50μm。如，本实施例中，分离截止线P与切割线T之间的间距m为30μm。即分离截止线P向靠近第一区10的方向超出切割线T一段距离，如此设置，在相对有限的分离精度下，不仅能够避免出现在切割线T处基底1与柔性层2未分离的情况，而且能够避免出现第一区10的基底1与柔性层2也发生分离的情况，从而确保后续工艺中柔性层2的弯折效果。
其中，可选地，如图9所示，从基底1的背离柔性层2的一侧对基底1进行切割；对基底1的切割深度n的范围为基底1厚度的3/5～4/5。如此切割，既能避免切割深度太浅可能导致的裂片不良，又能避免切割深度太深可能导致的对柔性层2的切割损伤。
该制备方法在切割并裂片去除第二区11和第三区12的基底1之后，还包括步骤S5'：对基底1的切割裂片断面进行倒角处理。如图10所示。
该步骤中，采用机械研磨的方法对基底1的切割裂片断面进行倒角，如采用砂轮或其他磨轮对基底1的切割裂片断面进行倒角，使基底1的切割裂片断面棱角趋于平缓，避免锋利的棱角对柔性层2造成划破损伤。
步骤S6：将第三区12的膜层弯折至第一区10的基底1远离柔性层2的一侧。如图11所示。
可选的，在一些实施例中，也可以在将第三区弯折至第一区的基底1远离柔性层2的一侧之后，在第二区的柔性层的背离基底的一侧形成柔性填充层。如此同样是为了使第二区的柔性层的厚度加厚，第二区的柔性层部分对基底的边缘端面进行包裹，从而一方面能使柔性层的包裹基底边缘端面的部分不易折断，另一方面还能防止外界水汽通过柔性层渗入显示背板内部，以免对显示背板内部电路造成损坏。
可选地，本实施例中，在第一区10形成像素驱动电路3包括依次形成晶体管31、第二无机绝缘层32和像素电极33；形成晶体管31包括依次形 成栅极310、第一无机绝缘层311、有源层312、第一极313和第二极314；其中，第一无机绝缘层311和第二无机绝缘层32延伸至并覆盖第二区11和第三区12；第一极313和第二极314同层设置且分设于有源层312的两端，并分别与有源层312连接；第一极313通过开设在第二无机绝缘层32中的过孔连接像素电极33。
其中，像素驱动电路3各膜层的制备均采用传统的比较成熟的工艺，如采用构图工艺，包括成膜、光刻胶涂覆、曝光、显影、刻蚀、清洗等的全部或部分步骤，这里不再赘述。
可选地，本实施例中，在第三区12形成背光源电路4包括依次形成第一电极41、第一绝缘层、第二电极43、第二绝缘层和绑定LED45；其中，采用一次构图工艺形成第一电极41与栅极310；由第一区10的第一无机绝缘层311延伸至第三区12形成第一绝缘层；采用一次构图工艺形成第二电极43与第一极313和第二极314；由第一区10的第二无机绝缘层32延伸至第三区12形成第二绝缘层；通过开设在第一绝缘层和第二绝缘层中的过孔连接第一电极41和LED45的正极；和通过开设在第二绝缘层中的过孔连接第二电极43和LED45的负极。
通过使背光源电路4各膜层的制备与像素驱动电路3部分膜层的制备通过一次工艺完成，能够使像素驱动电路3和背光源电路4的制备工艺过程大大简化，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，进一步降低了该显示背板的制备成本。
可选的，本实施例中，LED在基底上的制备采用SMT(Surface Mounted Technology)工艺方法实现，典型的是采用单个机械手臂拾取LED芯片，然后直接放置于基底的第三区，并使其正负极分别与第一电极和第二电极连接。具体流程为：a.芯片扩晶，即将蓝膜上排列紧密的LED芯片扩充至适合抓取的间距；b.锡膏印刷，即将锡膏通过丝网印刷的方式印刷到驱动基板(即基底的第三区)；c.固晶，即将LED芯片逐一的从蓝膜上转移到驱 动基板上，暂时固定在电极焊盘；d.回流焊，即进入回流焊炉，焊锡熔化后冷却，LED芯片正负极与电极焊盘达到完美结合。SMT工艺方法适合对Mini LED进行转移，使其制备于基底上，还适合对尺寸较大的Micro LED进行转移，使其制备于基底上。在LED数量较大的情况下，也可以采用巨量转移MT(Mass Transfer)的方法将其转移到基底上。将LED转移到基底上的工艺并不局限于上述方法，目前还有好多比较成熟的工艺方法，这里不再赘述。
在一些实施例中，当像素驱动电路中的晶体管是顶栅型晶体管时，部分膜层的制备顺序进行调整，如栅极在有源层形成之后形成，第一电极与有源层采用一次构图工艺形成，各膜层的制备方法不变。
在一些实施例中，背光源电路的第一电极和第二电极也可以在一次构图工艺中同时形成。另外，背光源电路的第一电极和第二电极也可以分别与像素驱动电路中其他导电膜层通过一次工艺形成，这里不做限定。如此制备均能使像素驱动电路和背光源电路的制备工艺过程大大简化，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，均能进一步降低该显示背板的制备成本。
本发明的一示意性实施例提供一种显示背板的制备方法，与上述显示背板的制备方法不同的是，在第三区形成背光源电路包括依次形成第一电极、第一绝缘层、第二电极和第二绝缘层；其中，采用一次构图工艺形成第一电极与栅极；由第一区的第一无机绝缘层延伸至第三区形成第一绝缘层；采用一次构图工艺形成第二电极与第一极和第二极；由第一区的第二无机绝缘层延伸至第三区形成第二绝缘层；将第一电极通过开设在第一绝缘层和第二绝缘层中的过孔暴露，被配置为连接待绑定LED的正极；将第二电极通过开设在第二绝缘层中的过孔暴露，被配置为连接待绑定LED的负极。
在本实施例中，LED在第三区的膜层弯折至第一区的背面之后制备。LED的制备可以采用SMT(Surface Mounted Technology)工艺方法实现。需要说明的是，在采用SMT工艺方法制备LED之前，先在第一区的像素驱动电路的背离基底的一侧形成保护层，保护层采用如树脂材料或光学透明胶材料，保护层将整个第一区覆盖，以对第一区的像素驱动电路形成保护。保护层可以通过涂覆或印刷的方法制备，待LED制备完成后，通过曝光、显影或灰化的工艺去除该保护层。
本实施例中显示背板的制备方法的其他步骤与上述实施例中相同，此处不再赘述。
上述示意性实施例中所提供的显示背板的制备方法，通过在基底上形成柔性层，柔性层由第一区延伸至并覆盖第二区和第三区，并在第一区的柔性层上方形成像素驱动电路，在第三区的柔性层上方形成背光源电路，能够将制备在平面柔性层上的背光源电路弯折至第一区的背面，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，本实施例中的方案无需再单独制作包含背光源电路的背光源板和包含像素驱动电路的显示基板，也无需再另外对包含像素驱动电路的显示基板与包含背光源电路的背光源板进行整合工艺，从而大大降低了该显示背板的器件成本和制备成本，进而更加有利于该显示背板的市场推广和应用。
本发明的另一示意性实施例提供一种显示母板，如图12和图13所示，包括多个子板7，子板7排布呈阵列，子板7包括基底1，基底1具有第一区10、第二区11和第三区12，第一区10、第二区11和第三区12沿第一方向L依次排布且彼此邻接，基底1上设置有柔性层2，柔性层2由第一区10延伸至并覆盖第二区11和第三区12；第一区10内形成有像素驱动电路3，像素驱动电路3位于柔性层2的背离基底1的一侧；第三区12内形成有背光源电路4；背光源电路4位于柔性层2的背离基底1的一侧。
其中，基底1可以采用玻璃基底。柔性层2采用有机树脂材料制成，如聚酰亚胺等，柔性层2具有一定的柔韧性，能够在采用该显示母板的子板的显示面板的制备过程中辅助将制备在平面柔性层2上的背光源电路4弯折至基底1的背离像素驱动电路3的背侧，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，本实施例中的方案无需再单独制作包含背光源电路4的背光源板和包含像素驱动电路3的显示基板，也无需再另外对包含像素驱动电路3的显示基板与包含背光源电路4的背光源板进行整合工艺，从而大大降低了采用该显示母板中的子板7的显示面板的器件成本和制备成本，进而更加有利于采用该显示母板中的子板7的显示面板的市场推广和应用。
可选的，像素驱动电路3包括依次远离柔性层2设置的晶体管31、第二无机绝缘层32和像素电极33；晶体管31包括依次远离柔性层2设置的栅极310、第一无机绝缘层311、有源层312、第一极313和第二极314，第一无机绝缘层311位于栅极310和有源层312之间，第一极313和第二极314同层设置且分设于有源层312的两端，并分别与有源层312连接；第一极313通过开设在第二无机绝缘层32中的过孔连接像素电极33；第二无机绝缘层32和第一无机绝缘层311还延伸至并覆盖第二区11和第三区12。
可选的，背光源电路4包括依次远离柔性层2设置的第一电极41、第二电极43和LED45；第一无机绝缘层311位于第一电极41和第二电极43之间；第二无机绝缘层32位于第二电极43和LED45之间；第一电极41通过开设在第一无机绝缘层311和第二无机绝缘层32中的过孔连接LED45的正极；第二电极43通过开设在第二无机绝缘层32中的过孔连接LED45的负极。
可选的，本实施例中，LED在基底上的制备采用上述实施例中所述的SMT(Surface Mounted Technology)工艺方法实现。当然，LED也可以通 过其他工艺方法实现，这里不再赘述。
进一步可选的，第一电极41与栅极310采用相同材料且同层设置；第二电极43与第一极313和第二极314采用相同材料且同层设置。即显示母板的制备中，第一电极41与栅极310可以通过一次工艺制备形成；第二电极43与第一极313和第二极314可以通过一次工艺制备形成，从而使像素驱动电路3和背光源电路4的制备工艺过程大大简化，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，进一步降低了采用该显示母板中子板7的显示面板的制备成本。
可选的，本实施例中的显示母板还包括缓冲层5，缓冲层5由第一区10延伸至并覆盖第二区11和第三区12；在第一区10，缓冲层5夹设于柔性层2与像素驱动电路3之间；在第三区12，缓冲层5夹设于柔性层2与背光源电路4之间。其中，缓冲层5采用无机绝缘材料，如氧化硅，缓冲层5的设置，一方面能够提升制备在其上的金属导电膜层与其的粘附牢固性，另一方面还能对柔性层2形成保护，防止外界水汽侵入柔性层2对其造成损坏。
此外，在一些实施例中，背光源电路的第一电极和第二电极也可以同层设置，第一电极通过开设在第一无机绝缘层和第二无机绝缘层中的过孔连接LED的正极；第二电极通过开设在第一无机绝缘层和第二无机绝缘层中的过孔连接LED的负极。相应地，第一电极和第二电极与栅极采用相同材料且同层设置。
在一些实施例中，像素驱动电路中的晶体管也可以是顶栅型晶体管，即栅极位于有源层的背离基底的一侧。相应地，第一电极与有源层采用相同材料且同层设置。
在一些实施例中，背光源电路的第一电极和第二电极也可以分别与像素驱动电路中其他导电膜层通过一次工艺形成，这里不做限定。如此均能使像素驱动电路和背光源电路的制备工艺过程大大简化，相对于目前背光 源板和LCD面板需要单独制作，然后再进行整合的方案，均能进一步降低采用该显示母板的子板的显示面板的制备成本。
本发明的一示意性实施例提供一种显示母板，与上述实施例不同的是，如图14所示，背光源电路4包括依次远离柔性层2设置的第一电极41和第二电极43；第一无机绝缘层311位于第一电极41和第二电极43之间；第二无机绝缘层32位于第二电极43背离柔性层2的一侧；第一电极41通过开设在第一无机绝缘层311和第二无机绝缘层32中的过孔暴露，被配置为连接待绑定的LED的正极；第二电极43通过开设在第二无机绝缘层32中的过孔暴露，被配置为连接待绑定的LED的负极。
在该实施例中，显示母板中暂不完成LED的绑定工艺。LED在采用该显示母板的子板的显示面板的制备中再进行绑定。
本实施例中显示母板的其他结构与上述实施例中相同，这里不再赘述。
上述实施例中所提供的显示母板，通过设置柔性层，柔性层由第一区延伸至并覆盖第二区和第三区，第一区形成有像素驱动电路，第三区形成有背光源电路，能够在采用该显示母板的子板的显示面板的制备过程中辅助将制备在平面柔性层上的背光源电路弯折至基底的背离像素驱动电路的背侧，相对于目前背光源板和LCD面板需要单独制作，然后再进行整合的方案，无需再单独制作包含背光源电路的背光源板和包含像素驱动电路的显示基板，也无需再另外对包含像素驱动电路的显示基板与包含背光源电路的背光源板进行整合工艺，从而大大降低了采用该显示母板中的子板的显示面板的器件成本和制备成本，进而更加有利于采用该显示母板中的子板的显示面板的市场推广和应用。
本发明的一示意性实施例提供一种显示面板，包括上述实施例中的显示背板，还包括对向基板，对向基板与显示背板的第一侧板面对盒。
其中，对向基板可以是彩膜基板。彩膜基板与显示背板对盒形成一集成有背光源板的显示面板。
通过采用上述实施例中的显示背板，大大降低了该显示面板的器件成本和制备成本，从而更加有利于该显示面板的市场推广和应用。
本发明示意性实施例所提供的显示面板可以为LCD面板、LCD电视、显示器、手机、导航仪等任何具有显示功能的产品或部件。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (25)

  1. 一种显示背板，其中，包括：
    基底，所述基底具有相对的第一侧板面和第二侧板面；
    位于基底上的柔性层，所述柔性层包裹所述第一侧板面并延伸覆盖所述第二侧板面；
    在所述第一侧板面上的像素驱动电路；
    在所述第二侧板面上的背光源电路，所述像素驱动电路位于所述柔性层的背离所述第一侧板面的一侧，所述背光源电路位于所述柔性层的背离所述第二侧板面的一侧。
  2. 根据权利要求1所述的显示背板，其中，所述像素驱动电路包括依次远离所述柔性层设置的晶体管、第二无机绝缘层和像素电极；
    所述晶体管包括依次远离所述柔性层设置的栅极、第一无机绝缘层、有源层、第一极和第二极，所述第一极和所述第二极同层设置且分设于所述有源层的两端，并分别与所述有源层连接；
    所述第一极通过开设在所述第二无机绝缘层中的过孔连接所述像素电极。
  3. 根据权利要求2所述的显示背板，其中，所述背光源电路包括依次远离所述柔性层设置的第一电极、第一绝缘层、第二电极、第二绝缘层和LED；
    所述第一电极通过开设在所述第一绝缘层和所述第二绝缘层中的过孔连接所述LED的正极；所述第二电极通过开设在所述第二绝缘层中的过孔连接所述LED的负极。
  4. 根据权利要求2所述的显示背板，其中，所述背光源电路包括依次远离所述柔性层设置的第一电极、第一绝缘层、第二电极和第二绝缘层；
    所述第一电极通过开设在所述第一绝缘层和所述第二绝缘层中的过孔暴露，被配置为连接待绑定的LED的正极；所述第二电极通过开设在所述第二绝缘层中的过孔暴露，被配置为连接待绑定的LED的负极。
  5. 根据权利要求3或4所述的显示背板，其中，所述第一电极与所述栅极由同一膜层形成；所述第一绝缘层与所述第一无机绝缘层由同一膜层形成；所述第二电极与所述第一极和所述第二极由同一膜层形成；所述第二绝缘层与所述第二无机绝缘层由同一膜层形成。
  6. 根据权利要求1所述的显示背板，其中，还包括缓冲层，所述缓冲层包括第一分部和第二分部，所述第一分部设置于所述基底的第一侧板面上方，且夹设于所述柔性层与所述像素驱动电路之间，所述第二分部设置于所述基底的第二侧板面上方，且夹设于所述柔性层与所述背光源电路之间。
  7. 根据权利要求1所述的显示背板，其中，包裹所述基底的第一侧板面的所述柔性层的厚度等于覆盖所述基底的第二侧板面的所述柔性层的厚度，包裹所述基底的边缘端面的所述柔性层的厚度大于包裹所述基底的第一侧板面的所述柔性层的厚度。
  8. 根据权利要求7所述的显示背板，其中，包裹有所述柔性层的所述基底的边缘端面与所述基底的第一侧板面和所述第二侧板面的交界处形成有倒角。
  9. 一种显示母板，包括多个子板，所述子板排布呈阵列，其中，所述子板包括基底，所述基底具有第一区、第二区和第三区，所述第一区、所述第二区和所述第三区沿第一方向依次排布且彼此邻接，所述基底上设置有柔性层，所述柔性层由所述第一区延伸至并覆盖所述第二区和所述第三区；
    所述第一区内形成有像素驱动电路，所述像素驱动电路位于所述柔性层的背离所述基底的一侧；所述第三区内形成有背光源电路；所述背光源电路位于所述柔性层的背离所述基底的一侧。
  10. 根据权利要求9所述的显示母板，其中，所述像素驱动电路包括依次远离所述柔性层设置的晶体管、第二无机绝缘层和像素电极；
    所述晶体管包括依次远离所述柔性层设置的栅极、第一无机绝缘层、有源层、第一极和第二极，所述第一无机绝缘层位于所述栅极和所述有源层之间，所述第一极和所述第二极同层设置且分设于所述有源层的两端，并分别与所述有源层连接；
    所述第一极通过开设在所述第二无机绝缘层中的过孔连接所述像素电极；
    所述第二无机绝缘层和所述第一无机绝缘层还延伸至并覆盖所述第二区和所述第三区。
  11. 根据权利要求10所述的显示母板，其中，所述背光源电路包括依次远离所述柔性层设置的第一电极、第二电极和LED；所述第一无机绝缘层位于所述第一电极和所述第二电极之间；所述第二无机绝缘层位于所述第二电极和所述LED之间；
    所述第一电极通过开设在所述第一无机绝缘层和所述第二无机绝缘层 中的过孔连接所述LED的正极；所述第二电极通过开设在所述第二无机绝缘层中的过孔连接所述LED的负极。
  12. 根据权利要求10所述的显示母板，其中，所述背光源电路包括依次远离所述柔性层设置的第一电极和第二电极；所述第一无机绝缘层位于所述第一电极和所述第二电极之间；所述第二无机绝缘层位于所述第二电极背离所述柔性层的一侧；
    所述第一电极通过开设在所述第一无机绝缘层和所述第二无机绝缘层中的过孔暴露，被配置为连接待绑定的LED的正极；所述第二电极通过开设在所述第二无机绝缘层中的过孔暴露，被配置为连接待绑定的LED的负极。
  13. 根据权利要求11或12所述的显示母板，其中，所述第一电极与所述栅极采用相同材料且同层设置；所述第二电极与所述第一极和所述第二极采用相同材料且同层设置。
  14. 根据权利要求9所述的显示母板，其中，还包括缓冲层，所述缓冲层由所述第一区延伸至并覆盖所述第二区和所述第三区；
    在所述第一区，所述缓冲层夹设于所述柔性层与所述像素驱动电路之间；在所述第三区，所述缓冲层夹设于所述柔性层与所述背光源电路之间。
  15. 一种显示面板，其中，包括权利要求1-8任意一项所述的显示背板，还包括对向基板，所述对向基板与所述显示背板的第一侧板面对盒。
  16. 一种显示背板的制备方法，所述显示背板包括基底，所述基底具有第一区、第二区和第三区，所述第一区、所述第二区和所述第三区沿第 一方向依次排布且彼此邻接，其中，所述制备方法包括：
    在基底上形成柔性层，所述柔性层由所述第一区延伸至并覆盖所述第二区和所述第三区；
    在所述第一区形成像素驱动电路和在所述第三区形成背光源电路；其中，所述像素驱动电路的部分膜层由所述第一区延伸至并覆盖所述第二区和所述第三区；
    去除所述第二区的位于所述柔性层远离所述基底一侧的膜层；
    将所述第二区和所述第三区的所述基底与所述柔性层分离；
    去除所述第二区和所述第三区的所述基底；
    将所述第三区的膜层弯折至所述第一区的所述基底远离所述柔性层的一侧。
  17. 根据权利要求16所述的显示背板的制备方法，其中，切割并裂片去除所述第二区和所述第三区的所述基底；
    所述基底与所述柔性层的分离截止线在所述基底上的正投影位于所述第一区，切割所述基底的切割线为所述第一区与所述第二区的交界线；
    所述分离截止线与所述切割线之间的间距范围为20～50μm。
  18. 根据权利要求16所述的显示背板的制备方法，其中，从所述基底的背离所述柔性层的一侧对所述基底进行切割；对所述基底的切割深度范围为所述基底厚度的3/5～4/5。
  19. 根据权利要求17所述的显示背板的制备方法，其中，切割并裂片去除所述第二区和所述第三区的所述基底之后，对所述基底的切割裂片断面进行倒角处理。
  20. 根据权利要求16所述的显示背板的制备方法，其中，去除所述第二区的位于所述柔性层远离所述基底一侧的膜层之后，且将所述第二区和所述第三区的所述基底与所述柔性层分离之前还包括：
    在所述基底上形成柔性填充层；所述柔性填充层分布于所述第二区。
  21. 根据权利要求16所述的显示背板的制备方法，其中，将所述第三区的膜层弯折至所述第一区的所述基底远离所述柔性层的一侧之后还包括：
    在所述第二区的所述柔性层的背离所述基底的一侧形成柔性填充层。
  22. 根据权利要求16所述的显示背板的制备方法，其中，在所述第一区形成像素驱动电路包括依次形成晶体管、第二无机绝缘层和像素电极；
    形成晶体管包括依次形成栅极、第一无机绝缘层、有源层、第一极和第二极；
    其中，所述第一无机绝缘层和所述第二无机绝缘层延伸至并覆盖所述第二区和所述第三区；所述第一极和所述第二极同层设置且分设于所述有源层的两端，并分别与所述有源层连接；所述第一极通过开设在所述第二无机绝缘层中的过孔连接所述像素电极。
  23. 根据权利要求22所述的显示背板的制备方法，其中，在所述第三区形成背光源电路包括依次形成第一电极、第一绝缘层、第二电极、第二绝缘层和绑定LED，其中：
    采用一次构图工艺形成所述第一电极与所述栅极；
    由所述第一区的所述第一无机绝缘层延伸至所述第三区形成所述第一绝缘层；
    采用一次构图工艺形成所述第二电极、所述第一极和所述第二极；
    由所述第一区的所述第二无机绝缘层延伸至所述第三区形成所述第二绝缘层；
    通过开设在所述第一绝缘层和所述第二绝缘层中的过孔连接所述第一电极和所述LED的正极；和通过开设在所述第二绝缘层中的过孔连接所述第二电极和所述LED的负极。
  24. 根据权利要求22所述的显示背板的制备方法，其中，在所述第三区形成背光源电路包括依次形成第一电极、第一绝缘层、第二电极和第二绝缘层，其中：
    采用一次构图工艺形成所述第一电极与所述栅极；
    由所述第一区的所述第一无机绝缘层延伸至所述第三区形成所述第一绝缘层；
    采用一次构图工艺形成所述第二电极、所述第一极和所述第二极；
    由所述第一区的所述第二无机绝缘层延伸至所述第三区形成所述第二绝缘层；
    将所述第一电极通过开设在所述第一绝缘层和所述第二绝缘层中的过孔暴露，被配置为连接待绑定LED的正极，将所述第二电极通过开设在所述第二绝缘层中的过孔暴露，被配置为连接待绑定LED的负极。
  25. 根据权利要求16所述的显示背板的制备方法，其中，在所述第一区形成像素驱动电路和在所述第三区形成背光源电路之前，且在基底上形成柔性层之后还包括：
    形成缓冲层；所述缓冲层由所述第一区延伸至并覆盖所述第二区和所述第三区。
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