CN114093902A - 一种显示面板及其制作方法 - Google Patents
一种显示面板及其制作方法 Download PDFInfo
- Publication number
- CN114093902A CN114093902A CN202010863186.9A CN202010863186A CN114093902A CN 114093902 A CN114093902 A CN 114093902A CN 202010863186 A CN202010863186 A CN 202010863186A CN 114093902 A CN114093902 A CN 114093902A
- Authority
- CN
- China
- Prior art keywords
- insulating layer
- electrode
- emitting element
- light
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 117
- 239000000463 material Substances 0.000 claims abstract description 41
- 238000003825 pressing Methods 0.000 claims abstract description 12
- 239000010410 layer Substances 0.000 claims description 204
- 239000011229 interlayer Substances 0.000 claims description 38
- 238000000034 method Methods 0.000 claims description 32
- 230000000149 penetrating effect Effects 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 13
- 239000000853 adhesive Substances 0.000 claims description 12
- 230000001070 adhesive effect Effects 0.000 claims description 12
- 238000002161 passivation Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 6
- 239000011368 organic material Substances 0.000 claims description 5
- 229910010272 inorganic material Inorganic materials 0.000 claims description 4
- 239000011147 inorganic material Substances 0.000 claims description 4
- 239000003086 colorant Substances 0.000 claims description 3
- 238000004806 packaging method and process Methods 0.000 claims description 2
- 238000005979 thermal decomposition reaction Methods 0.000 claims description 2
- 239000011347 resin Substances 0.000 abstract description 32
- 229920005989 resin Polymers 0.000 abstract description 32
- 238000012546 transfer Methods 0.000 abstract description 17
- 238000005516 engineering process Methods 0.000 abstract description 16
- 230000005496 eutectics Effects 0.000 abstract description 15
- 238000003466 welding Methods 0.000 abstract description 9
- 239000002245 particle Substances 0.000 abstract description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229920000297 Rayon Polymers 0.000 description 2
- 239000011324 bead Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004132 cross linking Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000000197 pyrolysis Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/98—Methods for disconnecting semiconductor or solid-state bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/82005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82009—Pre-treatment of the connector or the bonding area
- H01L2224/8203—Reshaping, e.g. forming vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本发明公开了一种显示面板及其制作方法,由于有机绝缘层的材料一般为树脂材料,树脂材料在完全固化前具有流动性,因此可以将树脂材料进行预固化以防止其流动并且保证其具有一定的柔韧性,从而可以采用对位设备将发光元件通过对位压合的方式内嵌在有机绝缘层内,因此无需采用现有技术中的共晶焊接技术,就可以实现将发光元件裸芯片颗粒从原生基板转移到驱动基板上,因此本发明提供了一种简单实用、经济性好、效率高、良品率高、转移精度高的发光元件巨量转移技术。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种显示面板及其制作方法。
背景技术
小尺寸发光元件技术目前面临相当多的技术挑战,其中巨量转移技术是目前最困难的关键制程。发光元件在光刻步骤后,需要将发光元件裸芯片颗粒从原生基板转移到驱动基板上,将灯珠电极直接与基板相连;且每次转移灯珠量非常大,对转移工艺的稳定性和精确度要求非常高。
目前发光元件微元件转移技术应用较多的是共晶焊接技术,它有空洞率低、散热性好等优点,尤其适用于对温度要求高的高频元器件。共晶焊接一般在真空或惰性气体环境中进行,其目的是防止焊接时被空气氧化。共晶炉就是基于共晶原理开发的专用设备,它在真空或惰性保护气体环境中,按照不同焊接合金材料的共晶工艺曲线要求,来完成芯片的封装。现有共晶炉在共晶焊接时能够提供真空环境或可控的气氛(氮气、氮气和甲酸的混合气体等),无需使用助焊剂,并能够根据焊接对象的共晶特点,设定工艺曲线,精确控制炉体内的共晶环境,包括温度和时间,真空度、充气气体流量和时间。
但是,共晶焊接过程较复杂,且需要大量的电镀焊材工艺,焊接过程常伴有焊接缝等不良影响芯片电性。因此如何设计一种简单实用、经济性好、效率高、良品率高、转移精度高的巨量转移技术是目前研究的主要方向。
发明内容
本发明实施例提供的一种显示面板及其制作方法,用以提供一种简单实用、经济性好、效率高、良品率高、转移精度高的巨量转移技术。
因此,本发明实施例提供了一种显示面板,包括:
衬底基板,所述衬底基板具有电路区域和发光区域;
驱动电路,位于所述衬底基板的电路区域;
有机绝缘层,覆盖所述衬底基板的发光区域;
发光元件,内嵌于所述有机绝缘层内,所述发光元件在所述衬底基板上的正投影与所述驱动电路在所述衬底基板上的正投影不交叠;
第一搭接电极,位于所述发光元件背离所述衬底基板的一侧,所述发光元件通过所述第一搭接电极与所述驱动电路电连接。
可选地,在本发明实施例提供的上述显示面板中,所述有机绝缘层还覆盖所述电路区域,所述显示面板还包括位于所述第一搭接电极所在膜层和所述发光元件之间的层间绝缘层;
所述驱动电路包括位于所述衬底基板上依次层叠设置的有源层、栅绝缘层和栅极,所述发光元件通过贯穿所述层间绝缘层的过孔与所述第一搭接电极电连接,所述第一搭接电极通过贯穿所述层间绝缘层和所述有机绝缘层的过孔与所述有源层电连接。
可选地,在本发明实施例提供的上述显示面板中,还包括:位于所述衬底基板和所述驱动电路之间的缓冲层,位于所述缓冲层和所述衬底基板之间的公共电极层,以及位于所述公共电极层和所述衬底基板之间的遮光金属层;
还包括:与所述第一搭接电极同层设置的第二搭接电极;
所述发光元件背向所述衬底基板的一侧包括第一电极和第二电极,所述第一电极与所述第一搭接电极电连接,所述第二电极通过贯穿所述层间绝缘层的过孔与所述第二搭接电极电连接,所述第二搭接电极通过依次贯穿所述层间绝缘层、所述有机绝缘层和所述缓冲层的过孔与所述公共电极层电连接。
可选地,在本发明实施例提供的上述显示面板中,还包括:位于所述第一搭接电极背离所述衬底基板一侧的钝化层,位于所述钝化层背离所述衬底基板一侧的像素电极,以及位于所述像素电极背离所述衬底基板一侧的封装结构;所述像素电极通过贯穿所述钝化层的过孔与所述第二搭接电极电连接。
可选地,在本发明实施例提供的上述显示面板中,所述有机绝缘层的厚度大于所述发光元件厚度的一半。
可选地,在本发明实施例提供的上述显示面板中,所述层间绝缘层的材料为无机材料或有机材料。
可选地,在本发明实施例提供的上述显示面板中,所述发光元件的发光颜色包括红色、绿色和蓝色。
相应地,本发明实施例还提供了一种显示面板的制作方法,包括:
在衬底基板的电路区域形成驱动电路;
在所述衬底基板上形成覆盖发光区域的有机绝缘层;
将发光元件通过热解粘胶粘附在对盒基板上;
通过对位设备将具有所述发光元件的对盒基板和形成有所述有机绝缘层的衬底基板对位压合,使所述发光元件内嵌在所述有机绝缘层内;其中,所述发光元件在所述衬底基板上的正投影与所述驱动电路在所述衬底基板上的正投影不交叠;
剥离所述热解粘胶;
在所述发光元件背离所述衬底基板一侧形成第一搭接电极;所述发光元件通过所述第一搭接电极与所述驱动电路电连接。
可选地,在本发明实施例提供的上述制作方法中,在形成所述有机绝缘层之后,还包括:对所述有机绝缘层进行预固化处理;所述预固化处理的温度为100℃~120℃,时间为90s~150s。
可选地,在本发明实施例提供的上述制作方法中,所述剥离所述热解粘胶,具体包括:
对所述有机绝缘层进行固化处理,所述热解粘胶失去粘性,与所述发光元件脱离;其中,所述固化处理的温度为220℃~250℃,时间为30min~60min。
可选地,在本发明实施例提供的上述制作方法中,所述在所述发光元件背离所述衬底基板一侧形成第一搭接电极之前,还包括:
在所述发光元件背离所述衬底基板一侧形成层间绝缘层;
对所述层间绝缘层和所述有机绝缘层进行刻蚀,使所述发光元件通过贯穿所述层间绝缘层的过孔与所述第一搭接电极电连接,以及使所述第一搭接电极通过贯穿所述层间绝缘层和所述有机绝缘层的过孔与所述驱动电路的有源层电连接。
本发明实施例的有益效果:
本发明实施例提供的一种显示面板及其制作方法,该显示面板包括:衬底基板,衬底基板具有电路区域和发光区域;驱动电路,位于衬底基板的电路区域;有机绝缘层,覆盖衬底基板的发光区域;发光元件,内嵌于有机绝缘层内,发光元件在衬底基板上的正投影与驱动电路在衬底基板上的正投影不交叠;第一搭接电极,位于发光元件背离衬底基板的一侧,发光元件通过第一搭接电极与驱动电路电连接。本发明中提供的显示面板,由于有机绝缘层的材料一般为树脂材料,树脂材料在完全固化前具有流动性,因此可以将树脂材料进行预固化以防止其流动并且保证其具有一定的柔韧性,从而可以采用对位设备将发光元件通过对位压合的方式内嵌在有机绝缘层内,因此无需采用现有技术中的共晶焊接技术,就可以实现将发光元件裸芯片颗粒从原生基板转移到驱动基板上,因此本发明提供了一种简单实用、经济性好、效率高、良品率高、转移精度高的发光元件巨量转移技术。
附图说明
图1为本发明实施例提供的一种显示面板的剖面结构示意图;
图2为本发明实施例提供的一种显示面板的制作方法流程示意图之一;
图3A-图3H为本发明实施例提供的显示面板的制作方法在执行每一步骤之后的结构示意图;
图4为本发明实施例提供的一种显示面板的制作方法流程示意图之二。
具体实施方式
为了使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明作进一步地详细描述,显然,所描述的实施例仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
附图中各部件的形状和大小不反映真实比例,目的只是示意说明本发明内容。
本发明实施例提供了一种显示面板,如图1所示,包括:
衬底基板1,衬底基板1具有电路区域11和发光区域12;具体地,显示面板一般包括多个子像素,图1仅示意出其中一个子像素的截面示意图;
驱动电路2,位于衬底基板1的电路区域11;
有机绝缘层3,覆盖衬底基板1的发光区域12;
发光元件4,内嵌于有机绝缘层3内,发光元件4在衬底基板1上的正投影与驱动电路2在衬底基板1上的正投影不交叠;
第一搭接电极51,位于发光元件4背离衬底基板1的一侧,发光元件4通过第一搭接电极51与驱动电路2电连接。
本发明实施例提供的上述显示面板中,由于有机绝缘层的材料一般为树脂材料,树脂材料在完全固化前具有流动性,因此可以将树脂材料进行预固化以防止其流动并且保证其具有一定的柔韧性,从而可以采用对位设备将发光元件通过对位压合的方式内嵌在有机绝缘层内,因此无需采用现有技术中的共晶焊接技术,就可以实现将发光元件裸芯片颗粒从原生基板转移到驱动基板上,因此本发明提供了一种简单实用、经济性好、效率高、良品率高、转移精度高的发光元件巨量转移技术。
需要说明的是,发光元件4包括第一电极41和第二电极42(后续介绍),上述所说的发光元件4内嵌于有机绝缘层3内,是指发光元件4的部分厚度内嵌于有机绝缘层3内,且第一电极41和第二电极42裸露在有机绝缘层3外部,以实现后续的电极搭接。
在具体实施时,在本发明实施例提供的上述显示面板中,发光元件可以为MicroLED,由于Micro LED的尺寸较小,可以提高显示面板的像素分辨率。具体地,Micro LED的尺寸一般小于100μm。当然,发光元件也可以为Mini LED等其它发光元件,本发明对此不作限制。具体地,当发光元件为Mini LED时,Mini LED的尺寸为100μm-200μm。
需要说明的是,本发明实施例中以发光元件为Micro LED为例进行说明,下面均以Micro LED代表发光元件。
具体地,有机绝缘层的材料可以为硅基树脂材料,该硅基树脂材料属于平坦型非感光树脂材料,有机绝缘层采用硅基树脂材料可以达到平坦底结构变化对Micro LED的影响。有机绝缘层的材料也可以为感光树脂材料,用于覆盖保护Micro LED并开孔裸露芯片电极。具体地,有机绝缘层的厚度可以大于发光元件(Micro LED)厚度的一半,这样可以确保后续压合Micro LED时,可以有效的将Micro LED固定于有机绝缘层内。具体地,在MicroLED内嵌于有机绝缘层之前,仅需对有机绝缘层进行预固化处理,目的是确保Micro LED基板通过对盒设备对位时,Micro LED容易压入驱动背板的有机绝缘层内。
需要说明的是,发光元件4的第一电极41和第二电极42的尺寸相对于发光元件4本身的尺寸是可以忽略的,因此发光元件4的厚度可以是不包括电极时从衬底基板1指向有机绝缘层3方向的厚度,也可以是包括电极时从衬底基板1指向有机绝缘层3方向的厚度。
在具体实施时,有机绝缘层的厚度可以根据发光元件的尺寸来确定,例如当发光元件的厚度为6um-8um时,有机绝缘层的厚度可以为3um-5um。
在具体实施时,在本发明实施例提供的上述显示面板中,如图1所示,有机绝缘层3还覆盖电路区域11,具体地,有机绝缘层3是整面形成在驱动电路2背离衬底基板1一侧的;
一般常规Micro LED的厚度为6um-8um,需要增加层间绝缘层6覆盖并保护发光元件4,层间绝缘层6的厚度不宜过厚,满足与有机绝缘层3的厚度配合覆盖发光元件4及发光元件4的电极(第一电极41和第二电极42,后续介绍)即可,以便后续刻蚀时减少刻蚀时间,提升工艺效率;因此该显示面板还包括位于第一搭接电极51所在膜层和发光元件4之间的层间绝缘层6;
驱动电路2包括位于衬底基板1上依次层叠设置的有源层21、栅绝缘层22和栅极23,发光元件4通过贯穿层间绝缘层6的过孔与第一搭接电极5电连接,第一搭接电极51通过贯穿层间绝缘层6和有机绝缘层3的过孔与有源层21电连接。
需要说明的是,本发明实施例是以驱动电路为顶栅型晶体管为例进行说明的,当然也可以为底栅型,区别在于顶栅型的栅绝缘层的形状与栅极的形状相同(为了后续形成的源漏金属层与有源层搭接),而底栅型的结构中有源层位于栅绝缘层上方,因此栅绝缘层不需要刻蚀,可以为一整面的结构。
在具体实施时,在本发明实施例提供的上述显示面板中,层间绝缘层的材料可以为无机材料,也可以为有机材料。由于无机层的厚度一般较薄,当发光元件裸露在有机绝缘层外部的部分较薄时,可以选择无机材料制作层间绝缘层。当发光元件裸露在有机绝缘层外部的部分较厚时,可以选择有机材料制作层间绝缘层,有机材料可以选择平坦性较好的硅基树脂材料,这样还可以增强层间绝缘层和有机绝缘层直接的附着力,提高显示面板的性能。
具体地,第一搭接电极51所在膜层为源漏金属层5,该源漏金属层5还包括第三搭接电极53和第四搭接电极54,第一搭接电极51和第三搭接电极53分别与有源层21电连接,有源层21中与第一搭接电极51和第三搭接电极53相对应的部分相对于源极和漏极,第四搭接电极54和栅极23电连接。
在具体实施时,在本发明实施例提供的上述显示面板中,如图1所示,还包括:位于衬底基板1和驱动电路2之间的缓冲层7,位于缓冲层7和衬底基板1之间的公共电极层8,以及位于公共电极层8和衬底基板1之间的遮光金属层9;具体地,遮光金属层9在衬底基板1上的正投影覆盖有源层21在衬底基板1上的正投影,遮光金属层9是为了避免有源层21被外界环境光照射而破坏其性能;
还包括:与第一搭接电极51同层设置的第二搭接电极52;
发光元件4背向衬底基板1的一侧包括第一电极41和第二电极42,第一电极41与第一搭接电极51电连接,第二电极42通过贯穿层间绝缘层6的过孔与第二搭接电极52电连接,第二搭接电极52通过依次贯穿层间绝缘层6、有机绝缘层3和缓冲层7的过孔与公共电极层8电连接。
具体地,在发光元件4发光时,通过驱动电路2向发光元件4的第一电极41输入驱动电压,通过公共电极层8向发光元件4的第二电极42输入公共电压,以驱动发光元件4发光,具体的发光原理与现有技术相同,在此不做详述。
具体地,公共电极层8的材料为透明导电材料,如ITO。
在具体实施时,在本发明实施例提供的上述显示面板中,如图1所示,还包括:位于第一搭接电极51背离衬底基板1一侧的钝化层10,位于钝化层10背离衬底基板1一侧的像素电极13,以及位于像素电极13背离衬底基板1一侧的封装结构(未示出);像素电极13通过贯穿钝化层10的过孔与第二搭接电极52电连接。
具体地,像素电极13的材料为透明导电材料,如ITO等。
在具体实施时,本发明实施例提供的上述显示面板还可以包括本领域技术人员熟知的其它功能性膜层,在此不做详述。
在具体实施时,在本发明实施例提供的上述显示面板中,发光元件的发光颜色可以包括红色、绿色和蓝色,即发光元件包括红色发光元件、绿色发光元件和蓝色发光元件,从而实现全彩化显示。
基于同一发明构思,本发明实施例还提供了一种上述显示面板的制作方法,如图2所示,包括:
S201、在衬底基板的电路区域形成驱动电路;
具体地,如图3A所示,在衬底基板1上依次形成层叠设置的遮光金属层9、公共电极层8、缓冲层7、栅极21、栅绝缘层22和栅极23。
S202、在衬底基板上形成覆盖发光区域的有机绝缘层;
具体地,如图3B所示,在形成有栅极23的衬底基板1上形成有机绝缘层3,该步骤形成的有机绝缘层首先涂覆树脂材料,由于树脂材料具有流动性,因此首先对树脂材料进行预固化处理,就是对树脂材料进行涂胶后的前烘烤处理,处理后树脂材料不发生流动,便于后续曝光等工艺不污染设备,涂覆近液态的树脂材料之后,进行预固化处理,其中的基团没有完全交联,整体膜层不致密,便于后续发光元件4压合内嵌至有机绝缘层3中。
S203、将发光元件通过热解粘胶粘附在对盒基板上;
具体地,如图3C所示,发光元件4通过热解粘胶02粘附在对盒基板01上,其中热解粘胶02在一定高的温度下会逐渐失去粘性,与发光元件4分离。
S204、通过对位设备将具有发光元件的对盒基板和形成有有机绝缘层的衬底基板对位压合,使发光元件内嵌在有机绝缘层内;其中,发光元件在衬底基板上的正投影与驱动电路在衬底基板上的正投影不交叠;
具体地,如图3D所示,通过对位设备将具有发光元件4的对盒基板01和形成有有机绝缘层3的衬底基板1对位压合,使发光元件4内嵌在有机绝缘层3内;对位设备可以为ODF(One drop Filling)对位设备,该对位设备上下均具有吸盘,通过上吸盘吸住对盒基板01,通过下吸盘吸住衬底基板1,然后通过Camera对准各自基板上的对位标记,通过ODF压合实现将发光元件4内嵌在有机绝缘层3内。因为现有ODF设备压力固定,发光元件4压入有机绝缘层3的深度可通过有机绝缘层3的厚度控制。
S205、剥离热解粘胶;
具体地,如图3E所示,对有机绝缘层3进行固化处理,可以在N2或Ar气氛中进行,固化处理的温度为220℃~250℃,时间为30min~60min,相比上述前烘烤预固化处理工艺,固化(后烘)温度更高,时间更长,目的是为了使树脂材料的基团间发生交联固化反应,排出气体反应物(outgas、H2O等),最终实现完全固化的过程。并且在220℃~250℃的温度下热解粘胶02失去粘性,与发光元件4脱离,从而剥离热解粘胶02和对盒基板01。
S206、在发光元件背离衬底基板一侧形成第一搭接电极;发光元件通过第一搭接电极与驱动电路电连接;
具体地,如图3F所示,在发光元件4背离衬底基板1一侧形成层间绝缘层6;如图3G所示,对有机绝缘层3和层间绝缘层6进行构图,以实现电极裸露,为后续电连接做通孔准备;如图3H所示,在层间绝缘层6背离衬底基板1一侧形成源漏金属层5,具体的,采用溅射工艺沉积源漏金属层5,溅射工艺在低温下进行,避免高温工艺对发光元件4的损伤,该源漏金属层5包括第一搭接电极51、第二搭接电极52、第三搭接电极53和第四搭接电极54,发光元件4的第一电极41通过第一搭接电极51与驱动电路2的有源层21电连接,发光元件4的第二电极42通过第二搭接电极52与公共电极层8电连接,第三搭接电极53与有源层21电连接,第四搭接电极54与栅极23电连接;如图1所示,在源漏金属层5背离衬底基板1一侧形成钝化层10,并对钝化层10进行构图形成过孔,以及在钝化层10背离衬底基板1一侧形成像素电极13,像素电极13通过过孔与第二搭接电极52电连接。
具体地,在图1之后,还需要对发光元件4进行封装,即芯片的封装结构,以保护发光元件,该封装工艺与现有技术相同,在此不做详述。
本发明实施例提供的上述显示面板的制作方法,由于有机绝缘层的材料一般为树脂材料,树脂材料在完全固化前具有流动性,因此可以将树脂材料进行预固化以防止其流动并且保证其具有一定的柔韧性,从而可以采用对位设备将发光元件通过对位压合的方式内嵌在有机绝缘层内,因此无需采用现有技术中的共晶焊接技术,就可以实现将发光元件裸芯片颗粒从原生基板转移到驱动基板上,因此本发明提供了一种简单实用、经济性好、效率高、良品率高、转移精度高的发光元件巨量转移技术;另外,发光元件内嵌于显示面板中的有机绝缘层内,相比于现有技术中在驱动背板制作完之后再焊接发光元件,本发明可以降低从衬底基板到发光元件模组部分的厚度。
在具体实施时,在本发明实施例提供的上述制作方法中,在步骤S202形成有机绝缘层之后,还包括:对有机绝缘层进行预固化处理;预固化处理的温度为100℃~120℃,时间为90s~150s。具体参见步骤S202中的描述过程。
在具体实施时,在本发明实施例提供的上述制作方法中,步骤S205剥离热解粘胶,具体可以包括:
对有机绝缘层进行固化处理,热解粘胶失去粘性,与发光元件脱离;其中,固化处理的温度为220℃~250℃,时间为30min~60min。具体参见步骤S205中的描述过程。
在具体实施时,在本发明实施例提供的上述制作方法中,在发光元件背离衬底基板一侧形成第一搭接电极之前,如图4所示,还包括:
S401、在发光元件背离衬底基板一侧形成层间绝缘层;
S402、对层间绝缘层和有机绝缘层进行刻蚀,使发光元件通过贯穿层间绝缘层的过孔与第一搭接电极电连接,以及使第一搭接电极通过贯穿层间绝缘层和有机绝缘层的过孔与驱动电路的有源层电连接。
具体地,上述步骤S401和S402的详细制作过程可以参见上述步骤S206的描述。
需要说明的是,在本发明实施例提供的上述显示面板的制作方法中,构图工艺可只包括光刻工艺,或,可以包括光刻工艺以及刻蚀步骤,同时还可以包括打印、喷墨等其他用于形成预定图形的工艺;光刻工艺是指包括成膜、曝光、显影等工艺过程的利用光刻胶、掩模板、曝光机等形成图形的工艺。在具体实施时,可根据本发明中所形成的结构选择相应的构图工艺。
具体地,本发明实施例提供的上述显示面板可以应用于显示装置,该显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成均为本领域的普通技术人员应该理解具有的,在此不做赘述,也不应作为对本发明的限制。该显示装置的实施可以参见上述显示面板的实施例,重复之处不再赘述。
本发明实施例提供的一种显示面板及其制作方法,该显示面板包括:衬底基板,衬底基板具有电路区域和发光区域;驱动电路,位于衬底基板的电路区域;有机绝缘层,覆盖衬底基板的发光区域;发光元件,内嵌于有机绝缘层内,发光元件在衬底基板上的正投影与驱动电路在衬底基板上的正投影不交叠;第一搭接电极,位于发光元件背离衬底基板的一侧,发光元件通过第一搭接电极与驱动电路电连接。本发明中提供的显示面板中,由于有机绝缘层的材料一般为树脂材料,树脂材料在完全固化前具有流动性,因此可以将树脂材料进行预固化以防止其流动并且保证其具有一定的柔韧性,从而可以采用对位设备将发光元件通过对位压合的方式内嵌在有机绝缘层内,因此无需采用现有技术中的共晶焊接技术,就可以实现将发光元件裸芯片颗粒从原生基板转移到驱动基板上,因此本发明提供了一种简单实用、经济性好、效率高、良品率高、转移精度高的发光元件巨量转移技术。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (11)
1.一种显示面板,其特征在于,包括:
衬底基板,所述衬底基板具有电路区域和发光区域;
驱动电路,位于所述衬底基板的电路区域;
有机绝缘层,覆盖所述衬底基板的发光区域;
发光元件,内嵌于所述有机绝缘层内,所述发光元件在所述衬底基板上的正投影与所述驱动电路在所述衬底基板上的正投影不交叠;
第一搭接电极,位于所述发光元件背离所述衬底基板的一侧,所述发光元件通过所述第一搭接电极与所述驱动电路电连接。
2.如权利要求1所述的显示面板,其特征在于,所述有机绝缘层还覆盖所述电路区域,所述显示面板还包括位于所述第一搭接电极所在膜层和所述发光元件之间的层间绝缘层;
所述驱动电路包括位于所述衬底基板上依次层叠设置的有源层、栅绝缘层和栅极,所述发光元件通过贯穿所述层间绝缘层的过孔与所述第一搭接电极电连接,所述第一搭接电极通过贯穿所述层间绝缘层和所述有机绝缘层的过孔与所述有源层电连接。
3.如权利要求2所述的显示面板,其特征在于,还包括:位于所述衬底基板和所述驱动电路之间的缓冲层,位于所述缓冲层和所述衬底基板之间的公共电极层,以及位于所述公共电极层和所述衬底基板之间的遮光金属层;
还包括:与所述第一搭接电极同层设置的第二搭接电极;
所述发光元件背向所述衬底基板的一侧包括第一电极和第二电极,所述第一电极与所述第一搭接电极电连接,所述第二电极通过贯穿所述层间绝缘层的过孔与所述第二搭接电极电连接,所述第二搭接电极通过依次贯穿所述层间绝缘层、所述有机绝缘层和所述缓冲层的过孔与所述公共电极层电连接。
4.如权利要求3所述的显示面板,其特征在于,还包括:位于所述第一搭接电极背离所述衬底基板一侧的钝化层,位于所述钝化层背离所述衬底基板一侧的像素电极,以及位于所述像素电极背离所述衬底基板一侧的封装结构;所述像素电极通过贯穿所述钝化层的过孔与所述第二搭接电极电连接。
5.如权利要求1所述的显示面板,其特征在于,所述有机绝缘层的厚度大于所述发光元件厚度的一半。
6.如权利要求2所述的显示面板,其特征在于,所述层间绝缘层的材料为无机材料或有机材料。
7.如权利要求1所述的显示面板,其特征在于,所述发光元件的发光颜色包括红色、绿色和蓝色。
8.一种如权利要求1-7任一项所述的显示面板的制作方法,其特征在于,包括:
在衬底基板的电路区域形成驱动电路;
在所述衬底基板上形成覆盖发光区域的有机绝缘层;
将发光元件通过热解粘胶粘附在对盒基板上;
通过对位设备将具有所述发光元件的对盒基板和形成有所述有机绝缘层的衬底基板对位压合,使所述发光元件内嵌在所述有机绝缘层内;其中,所述发光元件在所述衬底基板上的正投影与所述驱动电路在所述衬底基板上的正投影不交叠;
剥离所述热解粘胶;
在所述发光元件背离所述衬底基板一侧形成第一搭接电极;所述发光元件通过所述第一搭接电极与所述驱动电路电连接。
9.如权利要求8所述的制作方法,其特征在于,在形成所述有机绝缘层之后,还包括:对所述有机绝缘层进行预固化处理;所述预固化处理的温度为100℃~120℃,时间为90s~150s。
10.如权利要求8所述的制作方法,其特征在于,所述剥离所述热解粘胶,具体包括:
对所述有机绝缘层进行固化处理,所述热解粘胶失去粘性,与所述发光元件脱离;其中,所述固化处理的温度为220℃~250℃,时间为30min~60min。
11.如权利要求8所述的制作方法,其特征在于,所述在所述发光元件背离所述衬底基板一侧形成第一搭接电极之前,还包括:
在所述发光元件背离所述衬底基板一侧形成层间绝缘层;
对所述层间绝缘层和所述有机绝缘层进行刻蚀,使所述发光元件通过贯穿所述层间绝缘层的过孔与所述第一搭接电极电连接,以及使所述第一搭接电极通过贯穿所述层间绝缘层和所述有机绝缘层的过孔与所述驱动电路的有源层电连接。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010863186.9A CN114093902A (zh) | 2020-08-25 | 2020-08-25 | 一种显示面板及其制作方法 |
US17/204,562 US12033994B2 (en) | 2020-08-25 | 2021-03-17 | Display panel and preparation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010863186.9A CN114093902A (zh) | 2020-08-25 | 2020-08-25 | 一种显示面板及其制作方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN114093902A true CN114093902A (zh) | 2022-02-25 |
Family
ID=80295814
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010863186.9A Pending CN114093902A (zh) | 2020-08-25 | 2020-08-25 | 一种显示面板及其制作方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US12033994B2 (zh) |
CN (1) | CN114093902A (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI841239B (zh) * | 2023-02-14 | 2024-05-01 | 友達光電股份有限公司 | 顯示裝置及顯示面板的製造方法 |
US12119433B2 (en) | 2020-12-14 | 2024-10-15 | Nichia Corporation | Method of manufacturing light emitting device and method of manufacturing light emitting module |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114975751B (zh) * | 2022-05-25 | 2024-08-02 | 厦门天马显示科技有限公司 | 一种发光面板、显示装置和背光模组 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10381335B2 (en) * | 2014-10-31 | 2019-08-13 | ehux, Inc. | Hybrid display using inorganic micro light emitting diodes (uLEDs) and organic LEDs (OLEDs) |
KR102651097B1 (ko) * | 2016-10-28 | 2024-03-22 | 엘지디스플레이 주식회사 | 발광 다이오드 디스플레이 장치 |
KR102633079B1 (ko) * | 2016-10-28 | 2024-02-01 | 엘지디스플레이 주식회사 | 발광 다이오드 디스플레이 장치 |
KR102422091B1 (ko) * | 2017-12-07 | 2022-07-18 | 엘지디스플레이 주식회사 | 발광 소자 및 이를 이용한 표시 장치 |
CN111129270B (zh) * | 2018-10-31 | 2024-02-06 | 乐金显示有限公司 | 微型led显示装置 |
KR102706518B1 (ko) * | 2018-12-21 | 2024-09-11 | 엘지디스플레이 주식회사 | 스트레쳐블 표시장치 |
CN112216803A (zh) * | 2019-07-09 | 2021-01-12 | 群创光电股份有限公司 | 发光装置及其制作方法 |
JP7289744B2 (ja) * | 2019-07-11 | 2023-06-12 | 株式会社ジャパンディスプレイ | 表示装置、及びその製造方法 |
KR20210054323A (ko) * | 2019-11-05 | 2021-05-13 | 엘지디스플레이 주식회사 | 스트레쳐블 표시 장치 |
-
2020
- 2020-08-25 CN CN202010863186.9A patent/CN114093902A/zh active Pending
-
2021
- 2021-03-17 US US17/204,562 patent/US12033994B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US12119433B2 (en) | 2020-12-14 | 2024-10-15 | Nichia Corporation | Method of manufacturing light emitting device and method of manufacturing light emitting module |
TWI841239B (zh) * | 2023-02-14 | 2024-05-01 | 友達光電股份有限公司 | 顯示裝置及顯示面板的製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US20220068899A1 (en) | 2022-03-03 |
US12033994B2 (en) | 2024-07-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2020211537A1 (zh) | 阵列基板、显示面板及其制造方法、显示装置 | |
WO2020221120A1 (zh) | 阵列基板、显示面板及微型led的转移方法 | |
US12033994B2 (en) | Display panel and preparation method thereof | |
US11177425B2 (en) | Driving backplane, method for manufacturing the same, and display device | |
US9698160B2 (en) | Method for transferring micro devices and method for manufacturing display panel | |
JP6879639B2 (ja) | 表示装置、及び電子機器 | |
JP6882061B2 (ja) | 表示装置 | |
US11239214B2 (en) | Display panel and manufacturing method thereof, and display device | |
JP5341982B2 (ja) | 有機elモジュールおよびその製造方法 | |
CN106980256A (zh) | 一种手表及其制造方法 | |
US20060121184A1 (en) | Photocurable-resin application method and bonding method | |
JP6113633B2 (ja) | 有機el表示装置及びその製造方法 | |
US20160036004A1 (en) | Electroluminescence display device and fabrication method thereof | |
TW201601022A (zh) | 觸控螢幕及其製造方法 | |
KR20180120527A (ko) | 반도체 발광 소자를 이용한 디스플레이 장치의 제조 방법 | |
CN111146215A (zh) | 一种阵列基板、其制作方法及显示装置 | |
WO2015039493A1 (zh) | 电致发光装置及其制备方法 | |
CN113659058A (zh) | 一种发光器件及其制备方法、显示装置 | |
TWI662594B (zh) | 軟性基板及線路結構及其製造方法 | |
KR20160066463A (ko) | 유기 발광 표시 장치 및 유기 발광 표시 장치 제조 방법 | |
CN203456466U (zh) | 电致发光装置 | |
TWI841405B (zh) | 顯示裝置及其製造方法 | |
JP2013157328A (ja) | 有機電界発光素子 | |
TWI796261B (zh) | 顯示裝置及其製造方法 | |
WO2024040447A1 (zh) | 显示面板及其制造方法、显示装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |