WO2021161498A1 - Module de composant - Google Patents

Module de composant Download PDF

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Publication number
WO2021161498A1
WO2021161498A1 PCT/JP2020/005736 JP2020005736W WO2021161498A1 WO 2021161498 A1 WO2021161498 A1 WO 2021161498A1 JP 2020005736 W JP2020005736 W JP 2020005736W WO 2021161498 A1 WO2021161498 A1 WO 2021161498A1
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WO
WIPO (PCT)
Prior art keywords
insulating layer
metal layer
layer
adhesive
metal
Prior art date
Application number
PCT/JP2020/005736
Other languages
English (en)
Japanese (ja)
Inventor
川島由
Original Assignee
太陽誘電株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 太陽誘電株式会社 filed Critical 太陽誘電株式会社
Priority to PCT/JP2020/005736 priority Critical patent/WO2021161498A1/fr
Publication of WO2021161498A1 publication Critical patent/WO2021161498A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present invention relates to a component module, for example, a component module on which an electronic component is mounted.
  • Patent Document 1 It is known that electronic components are joined on an insulating layer such as a polyimide layer using an adhesive, and a metal layer is provided from under the insulating layer to connect to the electrodes of the electronic components through the insulating layer and through holes penetrating the adhesive.
  • the component module becomes large.
  • the present invention has been made in view of the above problems, and an object of the present invention is to reduce the size.
  • the insulating layer is bonded to the insulating layer via a first adhesive, a first electronic component having a first electrode is provided, and at least one first metal layer is provided under the insulating layer.
  • a first metal layer electrically connected to the first electrode and a second electronic component having a second electrode mounted under the insulating layer and bonded to the first metal layer via a bonding layer are provided.
  • At least a part of the first electronic component is a component module that overlaps with at least a part of the second electronic component in a plan view.
  • the insulating layer may include a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive.
  • the at least one first metal layer can be configured to be provided under the second insulating layer.
  • a second metal layer provided under the first insulating layer and connected to the first electrode via at least one of the first insulating layer and the first through hole penetrating the first adhesive is provided.
  • the second insulating layer may be configured to be adhered to the first insulating layer and the second metal layer via the second adhesive.
  • the configuration includes a metal terminal that is adhered to the insulating layer via the first adhesive and is electrically connected to at least one of the first electrode and the second electrode via the second metal layer. Can be.
  • the first insulating layer, the second insulating layer, the first adhesive, and the second adhesive may have a resin as a main material.
  • the insulating layer is bonded to the first metal layer via a bonding layer, and is electrically connected to at least one of the first electrode and the second electrode via the first metal layer. It can be configured to include a metal terminal.
  • a heat radiating member that is adhered to the insulating layer via the first adhesive and electrically separated from the first electrode and the second electrode can be provided.
  • the insulating layer is composed of a third insulating layer bonded to the second insulating layer and the second metal layer under the second metal layer via a third adhesive, and the second insulating layer and the third insulating layer. It is configured to include a third metal layer provided between the first electrode and the second electrode, which is electrically separated from the first electrode and at least a part thereof overlaps with at least a part of the second metal layer in a plan view. be able to.
  • a heat radiating member provided on the insulating layer, connected to the third metal layer, and electrically separated from the first electrode and the second electrode can be provided.
  • the first electronic component may be a power transistor, and the second electronic component may be a discrete passive element.
  • the present invention controls an insulating layer, a power transistor bonded on the insulating layer via a first adhesive, and the power transistor, and is mounted under the insulating layer, and is mounted in the power transistor and the insulating layer.
  • An integrated circuit electrically connected via an provided wiring and a heat dissipation member electrically separated from the power transistor and the integrated circuit by being bonded to the insulating layer via the first adhesive.
  • the power transistor and the integrated circuit do not overlap in a plan view, and at least a part of the integrated circuit is a component module that overlaps with at least a part of the heat radiation member in a plan view.
  • a first metal layer provided in the insulating layer and connected to the heat radiating member is provided, and at least a part of the first metal layer overlaps with at least a part of the integrated circuit in a plan view. be able to.
  • At least a part of the first metal layer can overlap with at least a part of the power transistor.
  • the insulating layer includes a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive, and the first metal layer is the first. It can be configured to be provided under the insulating layer and on the second insulating layer, and to be connected to the heat radiating member through at least one of the first through hole penetrating the first insulating layer and the first adhesive. ..
  • the insulating layer is provided with a third insulating layer bonded under the second insulating layer via a third adhesive, and below the second insulating layer and on the third insulating layer.
  • the two insulating layers and the second metal layer connected to the first metal layer through at least one of the second through holes penetrating the second adhesive are provided, and at least a part of the second metal layer is said.
  • At least a part of the integrated circuit may be overlapped with at least a part of the second metal layer in a plan view, and at least a part of the second metal layer may be overlapped with at least a part of the power transistor in a plan view.
  • the size can be reduced.
  • FIG. 1 is a cross-sectional view of the component module according to the first embodiment.
  • 2 (a) and 2 (b) are plan views of the component module according to the first embodiment.
  • 3 (a) and 3 (b) are plan views of the component module according to the first embodiment.
  • 4 (a) to 4 (e) are cross-sectional views (No. 1) showing a method of manufacturing the component module according to the first embodiment.
  • 5 (a) to 5 (c) are cross-sectional views (No. 2) showing a method of manufacturing the component module according to the first embodiment.
  • FIG. 6 is a cross-sectional view of the component module according to Comparative Example 1.
  • FIG. 7 is a plan view of the component module according to Comparative Example 1.
  • FIG. 8 is a cross-sectional view of the component module according to the first modification of the first embodiment.
  • 9 (a) and 9 (b) are plan views of the component module according to the first modification of the first embodiment.
  • 10 (a) and 10 (b) are plan views of the component module according to the first modification of the first embodiment.
  • FIG. 11 is a cross-sectional view of the component module according to the second modification of the first embodiment.
  • 12 (a) and 12 (b) are plan views of the component module according to the second modification of the first embodiment.
  • FIG. 13 is a cross-sectional view of the component module according to the third modification of the first embodiment.
  • FIG. 14 is a plan view of the component module according to the third modification of the first embodiment.
  • FIG. 15 (a) and 15 (b) are cross-sectional views showing a method of manufacturing a component module according to a modification 4 of the first embodiment.
  • FIG. 16 is a cross-sectional view of the component module according to the second embodiment.
  • 17 (a) and 17 (b) are plan views of the component module according to the second embodiment.
  • 18 (a) and 18 (b) are plan views of the component module according to the second embodiment.
  • FIG. 19 is a cross-sectional view of the component module according to the first modification of the second embodiment.
  • FIG. 20 is a plan view of the component module according to the first modification of the second embodiment.
  • FIG. 21 is a cross-sectional view of the component module according to the second modification of the second embodiment.
  • FIG. 1 is a cross-sectional view of the component module according to the first embodiment.
  • 2 (a) to 3 (b) are plan views of the component module according to the first embodiment.
  • the metal layers 14a to 14e are shown as the metal layer 14 without distinction
  • the electronic components 40a and 40b are shown as the electronic component 40 without distinction
  • the metal terminals 46a to 46c are shown as the metal terminal 46 without distinction. Shown.
  • the adhesive 12 is provided on the upper surface of the insulating layer 10.
  • the insulating layer 10 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility.
  • the thickness of the insulating layer 10 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 12 is a resin adhesive such as an epoxy resin adhesive.
  • the thickness of the adhesive 12 is, for example, 5 ⁇ m to 50 ⁇ m after curing.
  • the adhesive 12 is thinner than, for example, the insulating layer 10.
  • the adhesive 12 is preferably a resin material having excellent heat resistance and low dielectric properties.
  • the electronic component 40 is adhered to the insulating layer 10 via the adhesive 12.
  • the electronic component 40 is provided with an electrode 41 on the lower surface thereof.
  • the electronic component 40 is, for example, a power transistor such as an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or a FET (Field Effect Transistor).
  • a semiconductor material such as Si, GaN or SiC is used for the transistor.
  • the electronic component 40 is, for example, a bare chip or a package in which a bare chip is sealed and mounted.
  • the package on which the bare chip is mounted is a package such as WLP (Wafer Level Package) or SIP (Single Inline Package). In the first embodiment, a bare chip is used.
  • the electronic component 40 is, for example, a horizontal transistor, and the electrodes 41 are, for example, a gate electrode, a source electrode, and a drain electrode, respectively.
  • the electrodes 41 are, for example, a gate electrode, a source electrode, and a drain electrode, respectively.
  • a gate electrode and a source electrode are provided on the lower surface (front surface) of the electronic component 40
  • a drain electrode is provided on the upper surface (back surface) of the electronic component 40.
  • the electrode 41 is a metal layer whose main material is Cu (copper), Au (gold), Ag (silver), Al (aluminum), or the like.
  • a through hole 16 penetrating the insulating layer 10 and the adhesive 12 is provided, and a metal layer 14 is provided on the inner surface of the through hole 16 and under the insulating layer 10.
  • the metal layer 14 is electrically connected to the electrode 41 of the electronic component 40 via the through hole 16.
  • the metal layer 14 uses, for example, copper as a main material.
  • the thickness of the metal layer 14 is, for example, several ⁇ m to 125 ⁇ m, which is the thickness at which the through hole 16 (via) is embedded.
  • the metal layer 14 is thicker than the insulating layer 10.
  • the metal layer 14 may be thinner than the insulating layer 10.
  • the size of the through hole 16 is, for example, 30 ⁇ m to 500 ⁇ m.
  • the insulating layer 20 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility.
  • the thickness of the insulating layer 20 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 22 is a resin adhesive such as an epoxy resin adhesive.
  • the thickness of the adhesive 22 is, for example, from 5 ⁇ m to more than the thickness of the metal layer 14 after curing.
  • the insulating layers 10 and 20 and the adhesive 22 form the insulating layer 11.
  • a through hole 26 (second through hole) penetrating the insulating layer 20 and the adhesive 32 is provided, and a metal layer 24 is provided on the inner surface of the through hole 26 and under the insulating layer 20.
  • the metal layer 24 is electrically connected to the metal layer 14 through the through hole 26.
  • the metal layer 24 uses, for example, copper as a main material.
  • the thickness of the metal layer 24 is, for example, several ⁇ m to 125 ⁇ m, which is the thickness at which the through hole 26 is embedded.
  • a solder resist 28 is provided under the insulating layer 20 so as to cover the metal layer 24.
  • the solder resist 28 is provided with an opening 29 in which the lower surface of the metal layer 24 is exposed.
  • the solder resist 28 is a resin insulating layer such as an epoxy resin.
  • a bonding layer 38 is provided in the opening 29.
  • the bonding layer 38 is a sintered metal layer obtained by sintering a brazing material such as solder or a conductive paste such as silver paste.
  • the electronic component 42 is an integrated circuit that controls transistors such as the electronic component 40, and has a silicon substrate.
  • Electronic components 44 are discrete passive components such as chip resistors, chip capacitors and chip inductors.
  • An electrode 43 is provided on the upper surface of the electronic component 42.
  • External electrodes 45 are provided at both ends of the electronic component 44.
  • the electrodes 43 and 45 are metal layers mainly made of, for example, copper, gold, silver or aluminum.
  • the electrodes 43 and 45 are bonded to the metal layer 24 via the bonding layer 38.
  • the metal terminal 46 is a terminal for electrically connecting to the outside, and for example, copper, gold, silver or aluminum is used as a main material.
  • the metal terminal 46 is joined to the metal layer 24 via the joining layer 38.
  • FIG. 2A illustrates the insulating layer 10, the through hole 16, the electronic components 40a and 40b, and the electrodes 41a and 41b.
  • the electronic components 40a and 40b are horizontal transistors, and source electrodes SE, drain electrodes DE, and gate electrodes GE are provided on the lower surfaces thereof as electrodes 41a and 41b. Through holes 16 are connected to the electrodes 41a and 41b.
  • FIG. 2B illustrates the insulating layer 10, the metal layers 14a to 14e, and the through hole 16.
  • Metal layers 14a to 14e are provided on the lower surface of the insulating layer 10.
  • the metal layer 14a is electrically connected to the source electrode SE of the electronic component 40a via the through hole 16.
  • the metal layer 14b is electrically connected to the drain electrode DE of the electronic component 40a and the source electrode SE of the electronic component 40b via the through hole 16.
  • the metal layer 14c is electrically connected to the drain electrode DE of the electronic component 40b via the through hole 16. In this way, the metal layers 14a to 14c rewire the source electrodes SE and drain electrodes DE of the electronic components 40a and 40b.
  • the metal layers 14d and 14e are electrically connected to the gate electrodes GE of the electronic components 40a and 40b, respectively, through the through holes 16.
  • FIG. 3A illustrates the metal layers 14a to 14e, the insulating layer 20, the metal layer 24, and the through hole 26.
  • a metal layer 24 is provided on the lower surface of the insulating layer 20. The metal layer 24 is electrically connected to the metal layers 14a to 14e via the through hole 26.
  • FIG. 3B illustrates the insulating layer 20, the metal layer 24, the electronic components 42 and 44, the electrodes 43 and 45, and the metal terminals 46a to 46c.
  • Electronic components 42, 44 and metal terminals 46 are mounted on the lower surface of the metal layer 24.
  • the metal layer 24, the electrodes 43, 45, and the metal terminal 46 are joined by a joining layer.
  • the metal terminal 46a is electrically connected to the source electrode SE of the electronic component 40a via the metal layer 24 and the metal layer 14a.
  • the metal terminal 46b is electrically connected to the drain electrode DE of the electronic component 40a and the source electrode SE of the electronic component 40b via the metal layer 24 and the metal layer 14b.
  • the metal terminal 46c is electrically connected to the drain electrode DE of the electronic component 40b via the metal layer 24 and the metal layer 14c.
  • the transistors of the electronic components 40a and 40b are connected in series between the metal terminals 46a and 46c, and the nodes between the transistors of the electronic components 40a and 40b are connected to the metal terminals 46b.
  • the gate electrodes GE of the electronic components 40a and 40b are electrically connected to the electronic component 42 via the metal layers 14d and 14e, the metal layer 24, the electronic component 44 and the metal layer 24.
  • the adhesive 12 is applied to the upper surface of the insulating layer 10.
  • a spin coating method, a spray coating method, an inkjet method or a screen printing method is used for the application of the adhesive 12.
  • the insulating layer 10 on which the adhesive 12 is formed in advance may be prepared.
  • the adhesive 12 may be selectively applied corresponding to the region where the electronic component 40 is arranged.
  • the electronic component 40 is provided on the adhesive 12 and arranged so that the lower surface of the electrode 41 is in contact with the adhesive 12.
  • the heat treatment cures the adhesive 12 and joins the electronic component 40 and the insulating layer 10.
  • the heat treatment is carried out at a temperature of, for example, 100 ° C to 300 ° C.
  • a through hole 16 is formed through the insulating layer 10 and the adhesive 12.
  • the through hole 16 is formed by, for example, irradiating a laser beam. As a result, the lower surface of the electrode 41 is exposed from the through hole 16.
  • a metal layer 14 is formed on the lower surface of the insulating layer 10 and the inner surface of the through hole 16.
  • the metal layer 14 is formed by, for example, the following method.
  • a seed layer is formed on the lower surface of the insulating layer 10 and the inner surface of the through hole 16.
  • the seed layer is formed by, for example, a sputtering method or an electroless plating method. This seed layer is used as an electrode, and a plating layer is formed on the upper surface thereof by an electrolytic plating method.
  • the metal layer 14 is patterned using a photolithography method and an etching method.
  • the metal layer 14 forms a wiring, a pad electrode, and a wiring integrally formed with the pad electrode.
  • the adhesive 22 is applied to the lower surfaces of the insulating layer 10 and the metal layer 14.
  • the adhesive 22 is applied in the same manner as in FIG. 4 (a).
  • the insulating layer 20 is arranged under the adhesive 22 and heat-treated to bond the insulating layer 20 to the metal layer 14 and the insulating layer 10. Adhesion is performed in the same manner as in FIG. 4 (b).
  • the insulating layer 11 is formed by the insulating layers 10 and 20 and the adhesive 22.
  • a through hole 26 penetrating the insulating layer 20 and the adhesive 22 is formed.
  • the through hole 26 is formed in the same manner as in FIG. 4 (b).
  • a metal layer 14 is formed on the lower surface of the insulating layer 20 and the inner surface of the through hole 26.
  • the metal layer 24 is formed by the same method as in FIG. 4 (c).
  • a solder resist 28 is formed under the insulating layer 20 so as to cover the metal layer 24.
  • An opening 29 is formed in the solder resist 28 so that the lower surface of the metal layer 24 is exposed.
  • a bonding layer 38 is provided in the opening 29.
  • Electronic components 42, 44 and metal terminals 46 are mounted on the metal layer 24 via the bonding layer 38.
  • the bonding layer 38 is, for example, solder or a conductive paste
  • the electronic components 42, 44 and the metal terminals 46 are bonded to the metal layer 24 by heating to 200 ° C. to 300 ° C.
  • the component module according to the first embodiment is manufactured.
  • FIG. 6 is a cross-sectional view of the component module according to Comparative Example 1.
  • FIG. 7 is a plan view of the component module according to Comparative Example 1.
  • the electronic components 40, 42, and 44 are mounted on the upper surface of the insulating layer 10.
  • a metal layer 14 is connected to the electrode 41 of the electronic component 40 and the electrode 43 of the electronic component 42 via a through hole 16.
  • the electrode 45 of the electronic component 44 is, for example, tin, and when the metal layer 14 is a copper layer, the metal layer 14 cannot be directly connected to the electrode 45. Therefore, the metal layer 15 is provided on the insulating layer 10, and the metal layer 14 and the electrode 45 are connected by using the bonding layer 38.
  • the metal layer 14 electrically connects the electronic components 40a, 40b, 42 and 44.
  • the electronic components 40a, 40b, 42 and 44 are mounted so as not to overlap, and the metal layer 14 is used to connect them. Therefore, the area of the insulating layer 10 becomes large.
  • the sizes X1 and Y1 of the insulating layer 10 are, for example, 5 mm and 7 mm, respectively.
  • the electronic component 40 (first electronic component) is adhered to the insulating layer 11 via an adhesive 12 (first adhesive).
  • the metal layer 24 (first metal layer) is provided under the insulating layer 11, and at least one metal layer 14 is electrically connected to the electrode 41 (first electrode).
  • the electronic components 42 and 44 (second electronic components) are mounted under the insulating layer 11, and the electrodes 41 and 43 (second electrodes) are bonded to the metal layer 24 via the bonding layer 38.
  • the component module can be miniaturized.
  • the sizes X1 and Y1 of the insulating layer 10 shown in FIG. 2A can be set to 5 mm ⁇ 4.4 mm, respectively, as an example.
  • the wiring of the metal layer 14 shown by arrows 51 to 54 can be replaced by the through hole 26 in the thick lines 56 to 59 in FIG. 3 (a). Therefore, the wiring by the metal layer 14 can be shortened.
  • the metal layer 14 is easily bonded directly to the electrode 41.
  • the electrodes 43 and 45 are metal layers whose main material is a metal other than copper (for example, tin or a metal such as solder containing tin), it is difficult for the metal layer 14 to be directly connected to the electrodes 43 and 45. Therefore, as shown in FIG. 6, a metal layer 15 is provided on the insulating layer 10. In order to provide the solder or the conductive paste as the bonding layer 38 on the metal layer 15, a part of the adhesive 12 is removed, which complicates the manufacturing process. Further, if a part of the adhesive 12 remains, the bonding becomes poor.
  • the wiring between the electronic components 40 and 44 is to reduce the parasitic inductance between the electronic components 40 and 44. It is preferable to shorten the distance between the two. Therefore, it is preferable to superimpose the electronic components 40 and 44 in a plan view.
  • the insulating layer 11 includes an insulating layer 10 (first insulating layer) and an insulating layer 20 (second insulating layer) bonded under the insulating layer 10 via an adhesive 22.
  • the metal layer 14 is provided in the through hole 16 penetrating the insulating layer 10 and the adhesive 12 (first adhesive) and under the insulating layer 10, and is connected to the electrode 41 of the electronic component 40.
  • the insulating layer 20 is adhered to the insulating layer 10 and the metal layer 14 via an adhesive 22.
  • the metal layer 14 can be used as the rewiring layer or the like, so that the component module can be further miniaturized.
  • the insulating layers 10 and 20 are resin insulating layers mainly made of resin, and the adhesives 12 and 22 are insulating resin adhesives whose main material is shown in the figure. As a result, the electronic component 40 can be easily mounted on the insulating layer 11 by using the adhesive 12.
  • the resin as the main material means that the resin is contained in an amount of 50% by weight or more, for example, the resin is contained in an amount of 80% by weight or more.
  • the metal terminal 46 is provided under the insulating layer 11, is bonded to the metal layer 24 via the bonding layer 38, and is electrically connected to at least one of the electrodes 41, 43, and 45 via the metal layer 24.
  • the bottom of the insulating layer 11 can be mounted on a mounting board or the like.
  • the metal terminal 46 is preferably higher than the electronic components 42 and 44. As a result, when the component module is flip-chip mounted on the mounting board, it is possible to prevent the electronic components 42 and 44 from coming into contact with the mounting board.
  • FIG. 8 is a cross-sectional view of the component module according to the first modification of the first embodiment.
  • 9 (a) to 10 (b) are plan views of the component module according to the first modification of the first embodiment.
  • the metal terminal 46 is adhered to the insulating layer 10 via the adhesive 12.
  • the metal layer 14 is connected to the metal terminal 46 via a through hole 16a that penetrates the insulating layer 10 and the adhesive 12.
  • Other configurations are the same as those in FIG. 1 of the first embodiment, and the description thereof will be omitted.
  • metal terminals 46a to 46c are provided on the insulating layer 10. Through holes 16a are connected to the metal terminals 46a to 46c.
  • Other configurations are the same as those in FIG. 2A of the first embodiment, and the description thereof will be omitted.
  • the metal layers 14a to 14c are connected to the metal terminals 46a to 46c, respectively, via the through holes 16.
  • Other configurations are the same as those in FIG. 2B of the first embodiment, and the description thereof will be omitted.
  • the metal terminals 46a to 46c are not provided under the insulating layer 20, and the metal layer 24 is not connected to the metal terminals 46a to 46b.
  • Other configurations are the same as those in FIGS. 3 (a) and 3 (b) of the first embodiment, and the description thereof will be omitted.
  • the metal terminal 46 is adhered to the insulating layer 11 via the adhesive 12 and electrically connected to at least one of the electrodes 41, 43 and 45 via the metal layer 14. ing.
  • the component module can be mounted on the mounting board.
  • the metal terminal 46 is preferably higher than the electronic component 40. As a result, when the component module is flip-chip mounted on the mounting board, it is possible to prevent the electronic component 40 from coming into contact with the mounting board.
  • FIG. 11 is a cross-sectional view of the component module according to the second modification of the first embodiment.
  • 12 (a) and 12 (b) are plan views of the component module according to the second modification of the first embodiment.
  • the heat radiating member 48 is adhered to the insulating layer 10 via the adhesive 12.
  • the metal layer 14f is connected to the heat radiating member 48 via a through hole 16b that penetrates the insulating layer 10 and the adhesive 12.
  • the heat radiating member 48 is a member for releasing the heat generated in the electronic components 40, 42 and 44 to the outside, and is made of, for example, copper, gold, silver or aluminum as a main material.
  • Other configurations are the same as those in FIG. 8 of the first modification of the first embodiment, and the description thereof will be omitted.
  • a metal terminal 46 is provided on the insulating layer 10.
  • a through hole 16b is connected to the metal terminal 46.
  • the through hole 16b is larger than the through hole 16 and 16a.
  • Other configurations are the same as those in FIG. 9A of the first modification of the first embodiment, and the description thereof will be omitted.
  • the metal layer 14f is connected to the heat radiating member 48 via the through hole 16b.
  • the metal layer 14f is provided in a region where the metal layers 14a to 14e are not provided, and is adjacent to the metal layers 14a to 14c.
  • Other configurations are the same as those in FIG. 2B of the first embodiment, and the description thereof will be omitted.
  • Other planar structures are the same as those in FIGS. 10 (a) and 10 (b) of the first modification of the first embodiment, and the description thereof will be omitted.
  • the heat radiating member 48 is adhered to the insulating layer 11 via the adhesive 12 and is electrically separated from the electrodes 41, 43 and 45.
  • the heat generated in the electronic components 40, 42 and 44 (particularly the electronic component 40) is conducted to the adjacent metal layers 14f via the metal layers 14a to 14c.
  • the generated heat is conducted from the metal layer 14f to the heat radiating member 48. Therefore, it is possible to suppress an increase in the temperature of the electronic components 40, 42 and 44.
  • FIG. 13 is a cross-sectional view of the component module according to the third modification of the first embodiment.
  • FIG. 14 is a plan view of the component module according to the third modification of the first embodiment.
  • the insulating layer 30 is provided under the insulating layer 10, the metal layer 14 and 14f.
  • An adhesive 32 for adhering the insulating layer 10, the metal layers 14 and 14f, and the insulating layer 30 is provided.
  • the insulating layer 30 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility.
  • the thickness of the insulating layer 30 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 32 is a resin adhesive such as an epoxy resin adhesive.
  • the thickness of the adhesive 32 is, for example, from 5 ⁇ m to more than the thickness of the metal layer 14 after curing.
  • a metal layer 34 is provided under the insulating layer 30, and the metal layer 34 is connected to the metal layer 14f via an adhesive 32 and a through hole 36 penetrating the insulating layer 30.
  • the insulating layer 30 and the metal layer 34 are adhered to the insulating layer 20 via an adhesive 32.
  • the metal layer 34 has an opening 35, and the through hole 26 penetrates the insulating layer 20, the adhesive 22, the insulating layer 30, and the adhesive 32 in the opening 35.
  • the insulating layer 11 has insulating layers 10, 20, 30, and adhesives 22 and 32. Other configurations are the same as those in FIG. 11 of the second modification of the first embodiment, and the description thereof will be omitted.
  • FIG. 14 illustrates the metal layer 14f, the insulating layer 30, the metal layer 34, and the through hole 36.
  • the metal layer 34 is provided on substantially the entire lower surface of the insulating layer 30, and is connected to the metal layer 14f via a through hole 36.
  • An opening 35 is provided in the metal layer 34, and a through hole 26 is provided in the opening 35.
  • Other planar structures are the same as those of FIG. 10 (a) and FIG. 10 (b) of the first modification of the first embodiment and FIGS. 12 (a) and 12 (b) of the second modification of the first embodiment. The description is omitted.
  • the insulating layer 30 (second insulating layer) is adhered to the insulating layer 10 via the adhesive 32 (second adhesive), and the insulating layer 20 (third insulating layer) is formed.
  • the metal layer 34 (third metal layer) is provided between the insulating layers 10 and 30, and is electrically separated from the electrodes 41, 43, and 45, and at least a part thereof is viewed in plan with at least a part of the metal layer 14. Overlap in.
  • the metal layer 34 can be used as a shield layer between the electronic components 40 and 42 and 44.
  • the metal layer 34 is connected to the heat radiating member 48 via the metal layer 14f. As a result, the heat generated in the electronic components 40, 42 and 44 (particularly the electronic component 40) can be released from the metal layer 14 to the heat radiating member 48 via the metal layer 34.
  • the metal layer 34 is provided with an opening 35, and the metal layer 24 is connected to the metal layer 14 through a through hole 26 that does not come into contact with the metal layer 34 in the opening 35.
  • the metal layer 34 can be provided on almost the entire lower surface of the insulating layer 30. Therefore, the effect of shielding by the metal layer 34 and the effect of heat dissipation can be enhanced.
  • the electronic component 40 is a power transistor and the electronic component 42 is an integrated circuit that controls the electronic component 40, noise due to switching of the power transistor tends to affect the electronic component 42. Therefore, it is preferable to provide the metal layer 34 between the electronic components 40 and 42.
  • [Modified Example 4 of Example 1] 15 (a) and 15 (b) are cross-sectional views showing a method of manufacturing a component module according to a modification 4 of the first embodiment.
  • a resin layer 47 for sealing the component module of the modification 3 of the first embodiment is formed.
  • the resin layer 47 is a thermosetting resin such as an epoxy resin or a thermoplastic resin.
  • the resin layer 47 may contain an inorganic filler or the like.
  • the resin layer 47 is formed by using, for example, a potting method, a vacuum printing method, a transfer molding method, an injection molding method, or a compression molding method.
  • the upper surface of the resin layer 47 is polished to expose the upper surfaces of the metal terminal 46 and the heat radiating member 48. Since the metal terminal 46 and the heat radiating member 48 are thicker than the electronic component 40, the upper surface of the electronic component 40 is not exposed from the resin layer 47.
  • the component modules of the first embodiment and the modified examples 1 to 3 may be sealed with the resin layer 47.
  • a power transistor is mounted on the insulating layer 11 as an electronic component 40, an integrated circuit as an electronic component 42, and a discrete passive component as an electronic component 44 are mounted under the insulating layer 11
  • the power transistor and the integrated circuit may be mounted on the insulating layer 11, and the discrete passive component may be mounted under the insulating layer 11.
  • the power transistor and the discrete passive component may be mounted on the insulating layer 11, and the integrated circuit may be mounted under the insulating layer 11.
  • a part of the power transistor and the discrete passive component may be mounted on the insulating layer 11, and a part of the integrated circuit and the discrete passive component may be mounted under the insulating layer 11.
  • FIG. 16 is a cross-sectional view of the component module according to the second embodiment.
  • 17 (a) to 18 (b) are plan views of the component module according to the second embodiment.
  • the electronic components 40 and 42 do not overlap in a plan view.
  • the electronic component 42 and the heat radiating member 48 overlap each other in a plan view.
  • the electronic components 40 and 42 are electrically connected via metal layers 14 and 24 (wiring).
  • Other configurations are the same as those in FIG. 11 of the second modification of the first embodiment, and the description thereof will be omitted.
  • the heat radiating member 48 and the through hole 16b are larger than the heat radiating member 48 and the through hole 16b of FIG. 12 (a) of the modification 2 of the first embodiment.
  • Other configurations are the same as those in FIG. 12A of Modification 2 of Example 1, and the description thereof will be omitted.
  • the metal layer 14f and the through hole 16b are larger than the metal layer 14f and the through hole 16b of FIG. 12 (b) of the modification 2 of the first embodiment.
  • Other configurations are the same as those in FIG. 12B of the second modification of the first embodiment, and the description thereof will be omitted.
  • the metal layer 24 connecting the electronic components 40a and 40b and the electronic component 42 extends in the vertical direction in the drawing as compared with FIG. 10A of the modification 1 of the first embodiment. There is. Other configurations are the same as those in FIG. 10 (a) of the first modification of the first embodiment, and the description thereof will be omitted.
  • the electronic component 42 is provided in the lower direction in the figure as compared with FIG. 10 (b) of the modified example 1 of the first embodiment.
  • Other configurations are the same as those in FIG. 10 (b) of the first modification of the first embodiment, and the description thereof will be omitted.
  • the electronic components 40a and 40b, which are power transistors, and the electronic components 42, which are integrated circuits that control the power transistors do not overlap in a plan view.
  • the electronic components 42 which are integrated circuits that control the power transistors
  • At least a part of the electronic component 42 which is an integrated circuit overlaps with at least a part of the heat radiating member 48 in a plan view.
  • the heat generated in the electronic component 42 can be dissipated from the heat radiating member 48.
  • the heat generated in the electronic component 42 can be conducted to the heat radiating member 48 through the metal layer 14f and the through hole 16b (first through hole).
  • 50% or more of the plane area of the electronic component 42 preferably overlaps with the metal layer 14f, and more preferably 80% or more overlaps with the metal layer 14f.
  • FIG. 19 is a cross-sectional view of the component module according to the first modification of the second embodiment.
  • FIG. 20 is a plan view of the component module according to the first modification of the second embodiment.
  • the electronic components 40 and 42 do not overlap in a plan view.
  • the electronic component 42 and the heat radiating member 48 overlap each other in a plan view.
  • Other configurations are the same as those in FIG. 13 of the third modification of the first embodiment, and the description thereof will be omitted.
  • the metal layer 34 and the through hole 36 extend downward in the drawing from the metal layer 34 and the through hole 36 in FIG. 14 of the modified example 3 of the first embodiment.
  • Other configurations are the same as those in FIG. 14 of the third modification of the first embodiment, and the description thereof will be omitted.
  • At least a part of the metal layer 34 overlaps with at least a part of the electronic components 40a and 40b which are power transistors in a plan view, and at least one of the metal layers 34.
  • the portion overlaps at least a part of the electronic component 42 which is an integrated circuit in a plan view.
  • the heat generated in the power transistor and the integrated circuit can be conducted to the heat radiating member 48 through the metal layer 34, the through hole 36 (second through hole), the metal layer 14f and the through hole 16b.
  • 50% or more of the plane areas of the electronic components 40a and 40b preferably overlap with the metal layer 34, and more preferably 80% or more.
  • 50% or more of the plane area of the electronic component 42 preferably overlaps with the metal layer 34, and more preferably 80% or more overlaps with the metal layer 34.
  • the metal layer 34 in a region other than the opening 35 through which the through hole 26 passes, the rigidity of the insulating layer 11 can be increased. Further, the amount of the adhesive 22 to be filled between the insulating layers 20 and 30 can be reduced. Thereby, the bending of the insulating layer 11 due to the adhesive 22 can be suppressed.
  • the metal layer 34 may supply a ground potential. This makes it possible to prevent the metal layer 34 from affecting the electronic components 40a, 40b and 42.
  • the plane area of the metal layer 34 is preferably 50% or more, more preferably 80% or more of the plane area of the insulating layer 11.
  • FIG. 21 is a cross-sectional view of the component module according to the second modification of the second embodiment.
  • the electronic components 40 and 42 do not overlap in a plan view.
  • the electronic component 42 and the heat radiating member 48 overlap each other in a plan view.
  • Other configurations are the same as those in FIG. 15 (b) of the modified example 4 of the first embodiment, and the description thereof will be omitted.
  • the electronic components 40, 42 and 44 may be sealed in the resin layer 47. By exposing the upper surface of the heat radiating member 48 from the upper surface of the resin layer 47, heat can be efficiently radiated from the heat radiating member 48.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

L'invention concerne un module de composant qui est pourvu : d'une couche isolante 11 ; d'un premier composant électronique 40 qui est collé sur la couche isolante, un premier adhésif 12 étant intercalé entre ceux-ci, tout en ayant une première électrode 41 ; au moins une première couche métallique 24 qui est disposée au-dessous de la couche isolante, tout en étant électriquement connectée à la première électrode ; et des seconds composants électroniques 42, 44 qui sont montés au-dessous de la couche isolante et ont respectivement des secondes électrodes 43, 45 qui sont liées à la première couche métallique, une couche de liaison 38 étant interposée entre celles-ci. Par rapport à ce module de composant, au moins une partie du premier composant électronique chevauche au moins une partie des seconds composants électroniques lorsqu'elle est vue en plan.　
PCT/JP2020/005736 2020-02-14 2020-02-14 Module de composant WO2021161498A1 (fr)

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PCT/JP2020/005736 WO2021161498A1 (fr) 2020-02-14 2020-02-14 Module de composant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/005736 WO2021161498A1 (fr) 2020-02-14 2020-02-14 Module de composant

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WO2021161498A1 true WO2021161498A1 (fr) 2021-08-19

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077134A (ja) * 1993-02-08 1995-01-10 General Electric Co <Ge> 集積回路モジュール
JP2003243604A (ja) * 2002-02-13 2003-08-29 Sony Corp 電子部品及び電子部品の製造方法
JP2019036723A (ja) * 2017-08-10 2019-03-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 半導体パッケージ及びその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077134A (ja) * 1993-02-08 1995-01-10 General Electric Co <Ge> 集積回路モジュール
JP2003243604A (ja) * 2002-02-13 2003-08-29 Sony Corp 電子部品及び電子部品の製造方法
JP2019036723A (ja) * 2017-08-10 2019-03-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 半導体パッケージ及びその製造方法

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