WO2021161498A1 - Component module - Google Patents

Component module Download PDF

Info

Publication number
WO2021161498A1
WO2021161498A1 PCT/JP2020/005736 JP2020005736W WO2021161498A1 WO 2021161498 A1 WO2021161498 A1 WO 2021161498A1 JP 2020005736 W JP2020005736 W JP 2020005736W WO 2021161498 A1 WO2021161498 A1 WO 2021161498A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulating layer
metal layer
layer
adhesive
metal
Prior art date
Application number
PCT/JP2020/005736
Other languages
French (fr)
Japanese (ja)
Inventor
川島由
Original Assignee
太陽誘電株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 太陽誘電株式会社 filed Critical 太陽誘電株式会社
Priority to PCT/JP2020/005736 priority Critical patent/WO2021161498A1/en
Publication of WO2021161498A1 publication Critical patent/WO2021161498A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present invention relates to a component module, for example, a component module on which an electronic component is mounted.
  • Patent Document 1 It is known that electronic components are joined on an insulating layer such as a polyimide layer using an adhesive, and a metal layer is provided from under the insulating layer to connect to the electrodes of the electronic components through the insulating layer and through holes penetrating the adhesive.
  • the component module becomes large.
  • the present invention has been made in view of the above problems, and an object of the present invention is to reduce the size.
  • the insulating layer is bonded to the insulating layer via a first adhesive, a first electronic component having a first electrode is provided, and at least one first metal layer is provided under the insulating layer.
  • a first metal layer electrically connected to the first electrode and a second electronic component having a second electrode mounted under the insulating layer and bonded to the first metal layer via a bonding layer are provided.
  • At least a part of the first electronic component is a component module that overlaps with at least a part of the second electronic component in a plan view.
  • the insulating layer may include a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive.
  • the at least one first metal layer can be configured to be provided under the second insulating layer.
  • a second metal layer provided under the first insulating layer and connected to the first electrode via at least one of the first insulating layer and the first through hole penetrating the first adhesive is provided.
  • the second insulating layer may be configured to be adhered to the first insulating layer and the second metal layer via the second adhesive.
  • the configuration includes a metal terminal that is adhered to the insulating layer via the first adhesive and is electrically connected to at least one of the first electrode and the second electrode via the second metal layer. Can be.
  • the first insulating layer, the second insulating layer, the first adhesive, and the second adhesive may have a resin as a main material.
  • the insulating layer is bonded to the first metal layer via a bonding layer, and is electrically connected to at least one of the first electrode and the second electrode via the first metal layer. It can be configured to include a metal terminal.
  • a heat radiating member that is adhered to the insulating layer via the first adhesive and electrically separated from the first electrode and the second electrode can be provided.
  • the insulating layer is composed of a third insulating layer bonded to the second insulating layer and the second metal layer under the second metal layer via a third adhesive, and the second insulating layer and the third insulating layer. It is configured to include a third metal layer provided between the first electrode and the second electrode, which is electrically separated from the first electrode and at least a part thereof overlaps with at least a part of the second metal layer in a plan view. be able to.
  • a heat radiating member provided on the insulating layer, connected to the third metal layer, and electrically separated from the first electrode and the second electrode can be provided.
  • the first electronic component may be a power transistor, and the second electronic component may be a discrete passive element.
  • the present invention controls an insulating layer, a power transistor bonded on the insulating layer via a first adhesive, and the power transistor, and is mounted under the insulating layer, and is mounted in the power transistor and the insulating layer.
  • An integrated circuit electrically connected via an provided wiring and a heat dissipation member electrically separated from the power transistor and the integrated circuit by being bonded to the insulating layer via the first adhesive.
  • the power transistor and the integrated circuit do not overlap in a plan view, and at least a part of the integrated circuit is a component module that overlaps with at least a part of the heat radiation member in a plan view.
  • a first metal layer provided in the insulating layer and connected to the heat radiating member is provided, and at least a part of the first metal layer overlaps with at least a part of the integrated circuit in a plan view. be able to.
  • At least a part of the first metal layer can overlap with at least a part of the power transistor.
  • the insulating layer includes a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive, and the first metal layer is the first. It can be configured to be provided under the insulating layer and on the second insulating layer, and to be connected to the heat radiating member through at least one of the first through hole penetrating the first insulating layer and the first adhesive. ..
  • the insulating layer is provided with a third insulating layer bonded under the second insulating layer via a third adhesive, and below the second insulating layer and on the third insulating layer.
  • the two insulating layers and the second metal layer connected to the first metal layer through at least one of the second through holes penetrating the second adhesive are provided, and at least a part of the second metal layer is said.
  • At least a part of the integrated circuit may be overlapped with at least a part of the second metal layer in a plan view, and at least a part of the second metal layer may be overlapped with at least a part of the power transistor in a plan view.
  • the size can be reduced.
  • FIG. 1 is a cross-sectional view of the component module according to the first embodiment.
  • 2 (a) and 2 (b) are plan views of the component module according to the first embodiment.
  • 3 (a) and 3 (b) are plan views of the component module according to the first embodiment.
  • 4 (a) to 4 (e) are cross-sectional views (No. 1) showing a method of manufacturing the component module according to the first embodiment.
  • 5 (a) to 5 (c) are cross-sectional views (No. 2) showing a method of manufacturing the component module according to the first embodiment.
  • FIG. 6 is a cross-sectional view of the component module according to Comparative Example 1.
  • FIG. 7 is a plan view of the component module according to Comparative Example 1.
  • FIG. 8 is a cross-sectional view of the component module according to the first modification of the first embodiment.
  • 9 (a) and 9 (b) are plan views of the component module according to the first modification of the first embodiment.
  • 10 (a) and 10 (b) are plan views of the component module according to the first modification of the first embodiment.
  • FIG. 11 is a cross-sectional view of the component module according to the second modification of the first embodiment.
  • 12 (a) and 12 (b) are plan views of the component module according to the second modification of the first embodiment.
  • FIG. 13 is a cross-sectional view of the component module according to the third modification of the first embodiment.
  • FIG. 14 is a plan view of the component module according to the third modification of the first embodiment.
  • FIG. 15 (a) and 15 (b) are cross-sectional views showing a method of manufacturing a component module according to a modification 4 of the first embodiment.
  • FIG. 16 is a cross-sectional view of the component module according to the second embodiment.
  • 17 (a) and 17 (b) are plan views of the component module according to the second embodiment.
  • 18 (a) and 18 (b) are plan views of the component module according to the second embodiment.
  • FIG. 19 is a cross-sectional view of the component module according to the first modification of the second embodiment.
  • FIG. 20 is a plan view of the component module according to the first modification of the second embodiment.
  • FIG. 21 is a cross-sectional view of the component module according to the second modification of the second embodiment.
  • FIG. 1 is a cross-sectional view of the component module according to the first embodiment.
  • 2 (a) to 3 (b) are plan views of the component module according to the first embodiment.
  • the metal layers 14a to 14e are shown as the metal layer 14 without distinction
  • the electronic components 40a and 40b are shown as the electronic component 40 without distinction
  • the metal terminals 46a to 46c are shown as the metal terminal 46 without distinction. Shown.
  • the adhesive 12 is provided on the upper surface of the insulating layer 10.
  • the insulating layer 10 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility.
  • the thickness of the insulating layer 10 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 12 is a resin adhesive such as an epoxy resin adhesive.
  • the thickness of the adhesive 12 is, for example, 5 ⁇ m to 50 ⁇ m after curing.
  • the adhesive 12 is thinner than, for example, the insulating layer 10.
  • the adhesive 12 is preferably a resin material having excellent heat resistance and low dielectric properties.
  • the electronic component 40 is adhered to the insulating layer 10 via the adhesive 12.
  • the electronic component 40 is provided with an electrode 41 on the lower surface thereof.
  • the electronic component 40 is, for example, a power transistor such as an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or a FET (Field Effect Transistor).
  • a semiconductor material such as Si, GaN or SiC is used for the transistor.
  • the electronic component 40 is, for example, a bare chip or a package in which a bare chip is sealed and mounted.
  • the package on which the bare chip is mounted is a package such as WLP (Wafer Level Package) or SIP (Single Inline Package). In the first embodiment, a bare chip is used.
  • the electronic component 40 is, for example, a horizontal transistor, and the electrodes 41 are, for example, a gate electrode, a source electrode, and a drain electrode, respectively.
  • the electrodes 41 are, for example, a gate electrode, a source electrode, and a drain electrode, respectively.
  • a gate electrode and a source electrode are provided on the lower surface (front surface) of the electronic component 40
  • a drain electrode is provided on the upper surface (back surface) of the electronic component 40.
  • the electrode 41 is a metal layer whose main material is Cu (copper), Au (gold), Ag (silver), Al (aluminum), or the like.
  • a through hole 16 penetrating the insulating layer 10 and the adhesive 12 is provided, and a metal layer 14 is provided on the inner surface of the through hole 16 and under the insulating layer 10.
  • the metal layer 14 is electrically connected to the electrode 41 of the electronic component 40 via the through hole 16.
  • the metal layer 14 uses, for example, copper as a main material.
  • the thickness of the metal layer 14 is, for example, several ⁇ m to 125 ⁇ m, which is the thickness at which the through hole 16 (via) is embedded.
  • the metal layer 14 is thicker than the insulating layer 10.
  • the metal layer 14 may be thinner than the insulating layer 10.
  • the size of the through hole 16 is, for example, 30 ⁇ m to 500 ⁇ m.
  • the insulating layer 20 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility.
  • the thickness of the insulating layer 20 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 22 is a resin adhesive such as an epoxy resin adhesive.
  • the thickness of the adhesive 22 is, for example, from 5 ⁇ m to more than the thickness of the metal layer 14 after curing.
  • the insulating layers 10 and 20 and the adhesive 22 form the insulating layer 11.
  • a through hole 26 (second through hole) penetrating the insulating layer 20 and the adhesive 32 is provided, and a metal layer 24 is provided on the inner surface of the through hole 26 and under the insulating layer 20.
  • the metal layer 24 is electrically connected to the metal layer 14 through the through hole 26.
  • the metal layer 24 uses, for example, copper as a main material.
  • the thickness of the metal layer 24 is, for example, several ⁇ m to 125 ⁇ m, which is the thickness at which the through hole 26 is embedded.
  • a solder resist 28 is provided under the insulating layer 20 so as to cover the metal layer 24.
  • the solder resist 28 is provided with an opening 29 in which the lower surface of the metal layer 24 is exposed.
  • the solder resist 28 is a resin insulating layer such as an epoxy resin.
  • a bonding layer 38 is provided in the opening 29.
  • the bonding layer 38 is a sintered metal layer obtained by sintering a brazing material such as solder or a conductive paste such as silver paste.
  • the electronic component 42 is an integrated circuit that controls transistors such as the electronic component 40, and has a silicon substrate.
  • Electronic components 44 are discrete passive components such as chip resistors, chip capacitors and chip inductors.
  • An electrode 43 is provided on the upper surface of the electronic component 42.
  • External electrodes 45 are provided at both ends of the electronic component 44.
  • the electrodes 43 and 45 are metal layers mainly made of, for example, copper, gold, silver or aluminum.
  • the electrodes 43 and 45 are bonded to the metal layer 24 via the bonding layer 38.
  • the metal terminal 46 is a terminal for electrically connecting to the outside, and for example, copper, gold, silver or aluminum is used as a main material.
  • the metal terminal 46 is joined to the metal layer 24 via the joining layer 38.
  • FIG. 2A illustrates the insulating layer 10, the through hole 16, the electronic components 40a and 40b, and the electrodes 41a and 41b.
  • the electronic components 40a and 40b are horizontal transistors, and source electrodes SE, drain electrodes DE, and gate electrodes GE are provided on the lower surfaces thereof as electrodes 41a and 41b. Through holes 16 are connected to the electrodes 41a and 41b.
  • FIG. 2B illustrates the insulating layer 10, the metal layers 14a to 14e, and the through hole 16.
  • Metal layers 14a to 14e are provided on the lower surface of the insulating layer 10.
  • the metal layer 14a is electrically connected to the source electrode SE of the electronic component 40a via the through hole 16.
  • the metal layer 14b is electrically connected to the drain electrode DE of the electronic component 40a and the source electrode SE of the electronic component 40b via the through hole 16.
  • the metal layer 14c is electrically connected to the drain electrode DE of the electronic component 40b via the through hole 16. In this way, the metal layers 14a to 14c rewire the source electrodes SE and drain electrodes DE of the electronic components 40a and 40b.
  • the metal layers 14d and 14e are electrically connected to the gate electrodes GE of the electronic components 40a and 40b, respectively, through the through holes 16.
  • FIG. 3A illustrates the metal layers 14a to 14e, the insulating layer 20, the metal layer 24, and the through hole 26.
  • a metal layer 24 is provided on the lower surface of the insulating layer 20. The metal layer 24 is electrically connected to the metal layers 14a to 14e via the through hole 26.
  • FIG. 3B illustrates the insulating layer 20, the metal layer 24, the electronic components 42 and 44, the electrodes 43 and 45, and the metal terminals 46a to 46c.
  • Electronic components 42, 44 and metal terminals 46 are mounted on the lower surface of the metal layer 24.
  • the metal layer 24, the electrodes 43, 45, and the metal terminal 46 are joined by a joining layer.
  • the metal terminal 46a is electrically connected to the source electrode SE of the electronic component 40a via the metal layer 24 and the metal layer 14a.
  • the metal terminal 46b is electrically connected to the drain electrode DE of the electronic component 40a and the source electrode SE of the electronic component 40b via the metal layer 24 and the metal layer 14b.
  • the metal terminal 46c is electrically connected to the drain electrode DE of the electronic component 40b via the metal layer 24 and the metal layer 14c.
  • the transistors of the electronic components 40a and 40b are connected in series between the metal terminals 46a and 46c, and the nodes between the transistors of the electronic components 40a and 40b are connected to the metal terminals 46b.
  • the gate electrodes GE of the electronic components 40a and 40b are electrically connected to the electronic component 42 via the metal layers 14d and 14e, the metal layer 24, the electronic component 44 and the metal layer 24.
  • the adhesive 12 is applied to the upper surface of the insulating layer 10.
  • a spin coating method, a spray coating method, an inkjet method or a screen printing method is used for the application of the adhesive 12.
  • the insulating layer 10 on which the adhesive 12 is formed in advance may be prepared.
  • the adhesive 12 may be selectively applied corresponding to the region where the electronic component 40 is arranged.
  • the electronic component 40 is provided on the adhesive 12 and arranged so that the lower surface of the electrode 41 is in contact with the adhesive 12.
  • the heat treatment cures the adhesive 12 and joins the electronic component 40 and the insulating layer 10.
  • the heat treatment is carried out at a temperature of, for example, 100 ° C to 300 ° C.
  • a through hole 16 is formed through the insulating layer 10 and the adhesive 12.
  • the through hole 16 is formed by, for example, irradiating a laser beam. As a result, the lower surface of the electrode 41 is exposed from the through hole 16.
  • a metal layer 14 is formed on the lower surface of the insulating layer 10 and the inner surface of the through hole 16.
  • the metal layer 14 is formed by, for example, the following method.
  • a seed layer is formed on the lower surface of the insulating layer 10 and the inner surface of the through hole 16.
  • the seed layer is formed by, for example, a sputtering method or an electroless plating method. This seed layer is used as an electrode, and a plating layer is formed on the upper surface thereof by an electrolytic plating method.
  • the metal layer 14 is patterned using a photolithography method and an etching method.
  • the metal layer 14 forms a wiring, a pad electrode, and a wiring integrally formed with the pad electrode.
  • the adhesive 22 is applied to the lower surfaces of the insulating layer 10 and the metal layer 14.
  • the adhesive 22 is applied in the same manner as in FIG. 4 (a).
  • the insulating layer 20 is arranged under the adhesive 22 and heat-treated to bond the insulating layer 20 to the metal layer 14 and the insulating layer 10. Adhesion is performed in the same manner as in FIG. 4 (b).
  • the insulating layer 11 is formed by the insulating layers 10 and 20 and the adhesive 22.
  • a through hole 26 penetrating the insulating layer 20 and the adhesive 22 is formed.
  • the through hole 26 is formed in the same manner as in FIG. 4 (b).
  • a metal layer 14 is formed on the lower surface of the insulating layer 20 and the inner surface of the through hole 26.
  • the metal layer 24 is formed by the same method as in FIG. 4 (c).
  • a solder resist 28 is formed under the insulating layer 20 so as to cover the metal layer 24.
  • An opening 29 is formed in the solder resist 28 so that the lower surface of the metal layer 24 is exposed.
  • a bonding layer 38 is provided in the opening 29.
  • Electronic components 42, 44 and metal terminals 46 are mounted on the metal layer 24 via the bonding layer 38.
  • the bonding layer 38 is, for example, solder or a conductive paste
  • the electronic components 42, 44 and the metal terminals 46 are bonded to the metal layer 24 by heating to 200 ° C. to 300 ° C.
  • the component module according to the first embodiment is manufactured.
  • FIG. 6 is a cross-sectional view of the component module according to Comparative Example 1.
  • FIG. 7 is a plan view of the component module according to Comparative Example 1.
  • the electronic components 40, 42, and 44 are mounted on the upper surface of the insulating layer 10.
  • a metal layer 14 is connected to the electrode 41 of the electronic component 40 and the electrode 43 of the electronic component 42 via a through hole 16.
  • the electrode 45 of the electronic component 44 is, for example, tin, and when the metal layer 14 is a copper layer, the metal layer 14 cannot be directly connected to the electrode 45. Therefore, the metal layer 15 is provided on the insulating layer 10, and the metal layer 14 and the electrode 45 are connected by using the bonding layer 38.
  • the metal layer 14 electrically connects the electronic components 40a, 40b, 42 and 44.
  • the electronic components 40a, 40b, 42 and 44 are mounted so as not to overlap, and the metal layer 14 is used to connect them. Therefore, the area of the insulating layer 10 becomes large.
  • the sizes X1 and Y1 of the insulating layer 10 are, for example, 5 mm and 7 mm, respectively.
  • the electronic component 40 (first electronic component) is adhered to the insulating layer 11 via an adhesive 12 (first adhesive).
  • the metal layer 24 (first metal layer) is provided under the insulating layer 11, and at least one metal layer 14 is electrically connected to the electrode 41 (first electrode).
  • the electronic components 42 and 44 (second electronic components) are mounted under the insulating layer 11, and the electrodes 41 and 43 (second electrodes) are bonded to the metal layer 24 via the bonding layer 38.
  • the component module can be miniaturized.
  • the sizes X1 and Y1 of the insulating layer 10 shown in FIG. 2A can be set to 5 mm ⁇ 4.4 mm, respectively, as an example.
  • the wiring of the metal layer 14 shown by arrows 51 to 54 can be replaced by the through hole 26 in the thick lines 56 to 59 in FIG. 3 (a). Therefore, the wiring by the metal layer 14 can be shortened.
  • the metal layer 14 is easily bonded directly to the electrode 41.
  • the electrodes 43 and 45 are metal layers whose main material is a metal other than copper (for example, tin or a metal such as solder containing tin), it is difficult for the metal layer 14 to be directly connected to the electrodes 43 and 45. Therefore, as shown in FIG. 6, a metal layer 15 is provided on the insulating layer 10. In order to provide the solder or the conductive paste as the bonding layer 38 on the metal layer 15, a part of the adhesive 12 is removed, which complicates the manufacturing process. Further, if a part of the adhesive 12 remains, the bonding becomes poor.
  • the wiring between the electronic components 40 and 44 is to reduce the parasitic inductance between the electronic components 40 and 44. It is preferable to shorten the distance between the two. Therefore, it is preferable to superimpose the electronic components 40 and 44 in a plan view.
  • the insulating layer 11 includes an insulating layer 10 (first insulating layer) and an insulating layer 20 (second insulating layer) bonded under the insulating layer 10 via an adhesive 22.
  • the metal layer 14 is provided in the through hole 16 penetrating the insulating layer 10 and the adhesive 12 (first adhesive) and under the insulating layer 10, and is connected to the electrode 41 of the electronic component 40.
  • the insulating layer 20 is adhered to the insulating layer 10 and the metal layer 14 via an adhesive 22.
  • the metal layer 14 can be used as the rewiring layer or the like, so that the component module can be further miniaturized.
  • the insulating layers 10 and 20 are resin insulating layers mainly made of resin, and the adhesives 12 and 22 are insulating resin adhesives whose main material is shown in the figure. As a result, the electronic component 40 can be easily mounted on the insulating layer 11 by using the adhesive 12.
  • the resin as the main material means that the resin is contained in an amount of 50% by weight or more, for example, the resin is contained in an amount of 80% by weight or more.
  • the metal terminal 46 is provided under the insulating layer 11, is bonded to the metal layer 24 via the bonding layer 38, and is electrically connected to at least one of the electrodes 41, 43, and 45 via the metal layer 24.
  • the bottom of the insulating layer 11 can be mounted on a mounting board or the like.
  • the metal terminal 46 is preferably higher than the electronic components 42 and 44. As a result, when the component module is flip-chip mounted on the mounting board, it is possible to prevent the electronic components 42 and 44 from coming into contact with the mounting board.
  • FIG. 8 is a cross-sectional view of the component module according to the first modification of the first embodiment.
  • 9 (a) to 10 (b) are plan views of the component module according to the first modification of the first embodiment.
  • the metal terminal 46 is adhered to the insulating layer 10 via the adhesive 12.
  • the metal layer 14 is connected to the metal terminal 46 via a through hole 16a that penetrates the insulating layer 10 and the adhesive 12.
  • Other configurations are the same as those in FIG. 1 of the first embodiment, and the description thereof will be omitted.
  • metal terminals 46a to 46c are provided on the insulating layer 10. Through holes 16a are connected to the metal terminals 46a to 46c.
  • Other configurations are the same as those in FIG. 2A of the first embodiment, and the description thereof will be omitted.
  • the metal layers 14a to 14c are connected to the metal terminals 46a to 46c, respectively, via the through holes 16.
  • Other configurations are the same as those in FIG. 2B of the first embodiment, and the description thereof will be omitted.
  • the metal terminals 46a to 46c are not provided under the insulating layer 20, and the metal layer 24 is not connected to the metal terminals 46a to 46b.
  • Other configurations are the same as those in FIGS. 3 (a) and 3 (b) of the first embodiment, and the description thereof will be omitted.
  • the metal terminal 46 is adhered to the insulating layer 11 via the adhesive 12 and electrically connected to at least one of the electrodes 41, 43 and 45 via the metal layer 14. ing.
  • the component module can be mounted on the mounting board.
  • the metal terminal 46 is preferably higher than the electronic component 40. As a result, when the component module is flip-chip mounted on the mounting board, it is possible to prevent the electronic component 40 from coming into contact with the mounting board.
  • FIG. 11 is a cross-sectional view of the component module according to the second modification of the first embodiment.
  • 12 (a) and 12 (b) are plan views of the component module according to the second modification of the first embodiment.
  • the heat radiating member 48 is adhered to the insulating layer 10 via the adhesive 12.
  • the metal layer 14f is connected to the heat radiating member 48 via a through hole 16b that penetrates the insulating layer 10 and the adhesive 12.
  • the heat radiating member 48 is a member for releasing the heat generated in the electronic components 40, 42 and 44 to the outside, and is made of, for example, copper, gold, silver or aluminum as a main material.
  • Other configurations are the same as those in FIG. 8 of the first modification of the first embodiment, and the description thereof will be omitted.
  • a metal terminal 46 is provided on the insulating layer 10.
  • a through hole 16b is connected to the metal terminal 46.
  • the through hole 16b is larger than the through hole 16 and 16a.
  • Other configurations are the same as those in FIG. 9A of the first modification of the first embodiment, and the description thereof will be omitted.
  • the metal layer 14f is connected to the heat radiating member 48 via the through hole 16b.
  • the metal layer 14f is provided in a region where the metal layers 14a to 14e are not provided, and is adjacent to the metal layers 14a to 14c.
  • Other configurations are the same as those in FIG. 2B of the first embodiment, and the description thereof will be omitted.
  • Other planar structures are the same as those in FIGS. 10 (a) and 10 (b) of the first modification of the first embodiment, and the description thereof will be omitted.
  • the heat radiating member 48 is adhered to the insulating layer 11 via the adhesive 12 and is electrically separated from the electrodes 41, 43 and 45.
  • the heat generated in the electronic components 40, 42 and 44 (particularly the electronic component 40) is conducted to the adjacent metal layers 14f via the metal layers 14a to 14c.
  • the generated heat is conducted from the metal layer 14f to the heat radiating member 48. Therefore, it is possible to suppress an increase in the temperature of the electronic components 40, 42 and 44.
  • FIG. 13 is a cross-sectional view of the component module according to the third modification of the first embodiment.
  • FIG. 14 is a plan view of the component module according to the third modification of the first embodiment.
  • the insulating layer 30 is provided under the insulating layer 10, the metal layer 14 and 14f.
  • An adhesive 32 for adhering the insulating layer 10, the metal layers 14 and 14f, and the insulating layer 30 is provided.
  • the insulating layer 30 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility.
  • the thickness of the insulating layer 30 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 32 is a resin adhesive such as an epoxy resin adhesive.
  • the thickness of the adhesive 32 is, for example, from 5 ⁇ m to more than the thickness of the metal layer 14 after curing.
  • a metal layer 34 is provided under the insulating layer 30, and the metal layer 34 is connected to the metal layer 14f via an adhesive 32 and a through hole 36 penetrating the insulating layer 30.
  • the insulating layer 30 and the metal layer 34 are adhered to the insulating layer 20 via an adhesive 32.
  • the metal layer 34 has an opening 35, and the through hole 26 penetrates the insulating layer 20, the adhesive 22, the insulating layer 30, and the adhesive 32 in the opening 35.
  • the insulating layer 11 has insulating layers 10, 20, 30, and adhesives 22 and 32. Other configurations are the same as those in FIG. 11 of the second modification of the first embodiment, and the description thereof will be omitted.
  • FIG. 14 illustrates the metal layer 14f, the insulating layer 30, the metal layer 34, and the through hole 36.
  • the metal layer 34 is provided on substantially the entire lower surface of the insulating layer 30, and is connected to the metal layer 14f via a through hole 36.
  • An opening 35 is provided in the metal layer 34, and a through hole 26 is provided in the opening 35.
  • Other planar structures are the same as those of FIG. 10 (a) and FIG. 10 (b) of the first modification of the first embodiment and FIGS. 12 (a) and 12 (b) of the second modification of the first embodiment. The description is omitted.
  • the insulating layer 30 (second insulating layer) is adhered to the insulating layer 10 via the adhesive 32 (second adhesive), and the insulating layer 20 (third insulating layer) is formed.
  • the metal layer 34 (third metal layer) is provided between the insulating layers 10 and 30, and is electrically separated from the electrodes 41, 43, and 45, and at least a part thereof is viewed in plan with at least a part of the metal layer 14. Overlap in.
  • the metal layer 34 can be used as a shield layer between the electronic components 40 and 42 and 44.
  • the metal layer 34 is connected to the heat radiating member 48 via the metal layer 14f. As a result, the heat generated in the electronic components 40, 42 and 44 (particularly the electronic component 40) can be released from the metal layer 14 to the heat radiating member 48 via the metal layer 34.
  • the metal layer 34 is provided with an opening 35, and the metal layer 24 is connected to the metal layer 14 through a through hole 26 that does not come into contact with the metal layer 34 in the opening 35.
  • the metal layer 34 can be provided on almost the entire lower surface of the insulating layer 30. Therefore, the effect of shielding by the metal layer 34 and the effect of heat dissipation can be enhanced.
  • the electronic component 40 is a power transistor and the electronic component 42 is an integrated circuit that controls the electronic component 40, noise due to switching of the power transistor tends to affect the electronic component 42. Therefore, it is preferable to provide the metal layer 34 between the electronic components 40 and 42.
  • [Modified Example 4 of Example 1] 15 (a) and 15 (b) are cross-sectional views showing a method of manufacturing a component module according to a modification 4 of the first embodiment.
  • a resin layer 47 for sealing the component module of the modification 3 of the first embodiment is formed.
  • the resin layer 47 is a thermosetting resin such as an epoxy resin or a thermoplastic resin.
  • the resin layer 47 may contain an inorganic filler or the like.
  • the resin layer 47 is formed by using, for example, a potting method, a vacuum printing method, a transfer molding method, an injection molding method, or a compression molding method.
  • the upper surface of the resin layer 47 is polished to expose the upper surfaces of the metal terminal 46 and the heat radiating member 48. Since the metal terminal 46 and the heat radiating member 48 are thicker than the electronic component 40, the upper surface of the electronic component 40 is not exposed from the resin layer 47.
  • the component modules of the first embodiment and the modified examples 1 to 3 may be sealed with the resin layer 47.
  • a power transistor is mounted on the insulating layer 11 as an electronic component 40, an integrated circuit as an electronic component 42, and a discrete passive component as an electronic component 44 are mounted under the insulating layer 11
  • the power transistor and the integrated circuit may be mounted on the insulating layer 11, and the discrete passive component may be mounted under the insulating layer 11.
  • the power transistor and the discrete passive component may be mounted on the insulating layer 11, and the integrated circuit may be mounted under the insulating layer 11.
  • a part of the power transistor and the discrete passive component may be mounted on the insulating layer 11, and a part of the integrated circuit and the discrete passive component may be mounted under the insulating layer 11.
  • FIG. 16 is a cross-sectional view of the component module according to the second embodiment.
  • 17 (a) to 18 (b) are plan views of the component module according to the second embodiment.
  • the electronic components 40 and 42 do not overlap in a plan view.
  • the electronic component 42 and the heat radiating member 48 overlap each other in a plan view.
  • the electronic components 40 and 42 are electrically connected via metal layers 14 and 24 (wiring).
  • Other configurations are the same as those in FIG. 11 of the second modification of the first embodiment, and the description thereof will be omitted.
  • the heat radiating member 48 and the through hole 16b are larger than the heat radiating member 48 and the through hole 16b of FIG. 12 (a) of the modification 2 of the first embodiment.
  • Other configurations are the same as those in FIG. 12A of Modification 2 of Example 1, and the description thereof will be omitted.
  • the metal layer 14f and the through hole 16b are larger than the metal layer 14f and the through hole 16b of FIG. 12 (b) of the modification 2 of the first embodiment.
  • Other configurations are the same as those in FIG. 12B of the second modification of the first embodiment, and the description thereof will be omitted.
  • the metal layer 24 connecting the electronic components 40a and 40b and the electronic component 42 extends in the vertical direction in the drawing as compared with FIG. 10A of the modification 1 of the first embodiment. There is. Other configurations are the same as those in FIG. 10 (a) of the first modification of the first embodiment, and the description thereof will be omitted.
  • the electronic component 42 is provided in the lower direction in the figure as compared with FIG. 10 (b) of the modified example 1 of the first embodiment.
  • Other configurations are the same as those in FIG. 10 (b) of the first modification of the first embodiment, and the description thereof will be omitted.
  • the electronic components 40a and 40b, which are power transistors, and the electronic components 42, which are integrated circuits that control the power transistors do not overlap in a plan view.
  • the electronic components 42 which are integrated circuits that control the power transistors
  • At least a part of the electronic component 42 which is an integrated circuit overlaps with at least a part of the heat radiating member 48 in a plan view.
  • the heat generated in the electronic component 42 can be dissipated from the heat radiating member 48.
  • the heat generated in the electronic component 42 can be conducted to the heat radiating member 48 through the metal layer 14f and the through hole 16b (first through hole).
  • 50% or more of the plane area of the electronic component 42 preferably overlaps with the metal layer 14f, and more preferably 80% or more overlaps with the metal layer 14f.
  • FIG. 19 is a cross-sectional view of the component module according to the first modification of the second embodiment.
  • FIG. 20 is a plan view of the component module according to the first modification of the second embodiment.
  • the electronic components 40 and 42 do not overlap in a plan view.
  • the electronic component 42 and the heat radiating member 48 overlap each other in a plan view.
  • Other configurations are the same as those in FIG. 13 of the third modification of the first embodiment, and the description thereof will be omitted.
  • the metal layer 34 and the through hole 36 extend downward in the drawing from the metal layer 34 and the through hole 36 in FIG. 14 of the modified example 3 of the first embodiment.
  • Other configurations are the same as those in FIG. 14 of the third modification of the first embodiment, and the description thereof will be omitted.
  • At least a part of the metal layer 34 overlaps with at least a part of the electronic components 40a and 40b which are power transistors in a plan view, and at least one of the metal layers 34.
  • the portion overlaps at least a part of the electronic component 42 which is an integrated circuit in a plan view.
  • the heat generated in the power transistor and the integrated circuit can be conducted to the heat radiating member 48 through the metal layer 34, the through hole 36 (second through hole), the metal layer 14f and the through hole 16b.
  • 50% or more of the plane areas of the electronic components 40a and 40b preferably overlap with the metal layer 34, and more preferably 80% or more.
  • 50% or more of the plane area of the electronic component 42 preferably overlaps with the metal layer 34, and more preferably 80% or more overlaps with the metal layer 34.
  • the metal layer 34 in a region other than the opening 35 through which the through hole 26 passes, the rigidity of the insulating layer 11 can be increased. Further, the amount of the adhesive 22 to be filled between the insulating layers 20 and 30 can be reduced. Thereby, the bending of the insulating layer 11 due to the adhesive 22 can be suppressed.
  • the metal layer 34 may supply a ground potential. This makes it possible to prevent the metal layer 34 from affecting the electronic components 40a, 40b and 42.
  • the plane area of the metal layer 34 is preferably 50% or more, more preferably 80% or more of the plane area of the insulating layer 11.
  • FIG. 21 is a cross-sectional view of the component module according to the second modification of the second embodiment.
  • the electronic components 40 and 42 do not overlap in a plan view.
  • the electronic component 42 and the heat radiating member 48 overlap each other in a plan view.
  • Other configurations are the same as those in FIG. 15 (b) of the modified example 4 of the first embodiment, and the description thereof will be omitted.
  • the electronic components 40, 42 and 44 may be sealed in the resin layer 47. By exposing the upper surface of the heat radiating member 48 from the upper surface of the resin layer 47, heat can be efficiently radiated from the heat radiating member 48.

Abstract

A component module which is provided with: an insulating layer 11; a first electronic component 40 that is bonded onto the insulating layer, with a first adhesive 12 being interposed therebetween, while having a first electrode 41; at least one first metal layer 24 that is provided below the insulating layer, while being electrically connected to the first electrode; and second electronic components 42, 44 that are mounted below the insulating layer and respectively have second electrodes 43, 45 which are bonded to the first metal layer, with a bonding layer 38 being interposed therebetween. With respect to this component module, at least a part of the first electronic component overlaps with at least a part of the second electronic components when viewed in plan.　

Description

部品モジュールParts module
　本発明は部品モジュールに関し、例えば電子部品を搭載する部品モジュールに関する。 The present invention relates to a component module, for example, a component module on which an electronic component is mounted.
　ポリイミド層等の絶縁層上に接着剤を用い電子部品を接合し、絶縁層および接着剤を貫通する貫通孔を介し絶縁層下から電子部品の電極に接続する金属層を設けることが知られている（例えば特許文献１）。 It is known that electronic components are joined on an insulating layer such as a polyimide layer using an adhesive, and a metal layer is provided from under the insulating layer to connect to the electrodes of the electronic components through the insulating layer and through holes penetrating the adhesive. (For example, Patent Document 1).
特開２０１６－４６５２３号公報Japanese Unexamined Patent Publication No. 2016-46523
　複数の電子部品を絶縁層上に実装し、絶縁層下に設けられた金属層により電子部品を接続すると、部品モジュールが大型化してしまう。 If a plurality of electronic components are mounted on an insulating layer and the electronic components are connected by a metal layer provided under the insulating layer, the component module becomes large.
　本発明は、上記課題に鑑みなされたものであり、小型化することを目的とする。 The present invention has been made in view of the above problems, and an object of the present invention is to reduce the size.
　本発明は、絶縁層と、前記絶縁層上に第１接着剤を介し接着され、第１電極を有する第１電子部品と、前記絶縁層下に設けられ、少なくとも１つの第１金属層は前記第１電極と電気的に接続する第１金属層と、前記絶縁層下に実装され、前記第１金属層に接合層を介し接合された第２電極を有する第２電子部品と、を備え、前記第１電子部品の少なくとも一部は前記第２電子部品の少なくとも一部と平面視において重なる部品モジュールである。 In the present invention, the insulating layer is bonded to the insulating layer via a first adhesive, a first electronic component having a first electrode is provided, and at least one first metal layer is provided under the insulating layer. A first metal layer electrically connected to the first electrode and a second electronic component having a second electrode mounted under the insulating layer and bonded to the first metal layer via a bonding layer are provided. At least a part of the first electronic component is a component module that overlaps with at least a part of the second electronic component in a plan view.
　上記構成において、前記絶縁層は、第１絶縁層と、前記第１絶縁層下に第２接着剤を介し接着された第２絶縁層と、を備える構成とすることができる。 In the above configuration, the insulating layer may include a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive.
　上記構成において、前記少なくとも１つの第１金属層は、前記第２絶縁層下に設けられている構成とすることができる。 In the above configuration, the at least one first metal layer can be configured to be provided under the second insulating layer.
　上記構成において、前記第１絶縁層下に設けられ、前記第１絶縁層と前記第１接着剤を貫通する第１貫通孔の少なくとも１つを介し前記第１電極に接続する第２金属層を備え、前記第２絶縁層は、前記第１絶縁層および前記第２金属層に前記第２接着剤を介し接着されている構成とすることができる。 In the above configuration, a second metal layer provided under the first insulating layer and connected to the first electrode via at least one of the first insulating layer and the first through hole penetrating the first adhesive is provided. The second insulating layer may be configured to be adhered to the first insulating layer and the second metal layer via the second adhesive.
　上記構成において、前記絶縁層上に前記第１接着剤を介し接着され、前記第２金属層を介し前記第１電極および前記第２電極の少なくとも一方に電気的に接続された金属端子を備える構成とすることができる。 In the above configuration, the configuration includes a metal terminal that is adhered to the insulating layer via the first adhesive and is electrically connected to at least one of the first electrode and the second electrode via the second metal layer. Can be.
　上記構成において、前記第１絶縁層、前記第２絶縁層、前記第１接着剤および前記第２接着剤は樹脂を主材料とする構成とすることができる。 In the above configuration, the first insulating layer, the second insulating layer, the first adhesive, and the second adhesive may have a resin as a main material.
　上記構成において、前記絶縁層下に設けられ、前記第１金属層に接合層を介し接合され、前記第１金属層を介し前記第１電極および前記第２電極の少なくとも一方に電気的に接続された金属端子を備える構成とすることができる。 In the above configuration, it is provided under the insulating layer, is bonded to the first metal layer via a bonding layer, and is electrically connected to at least one of the first electrode and the second electrode via the first metal layer. It can be configured to include a metal terminal.
　上記構成において、前記絶縁層上に前記第１接着剤を介し接着され、前記第１電極および前記第２電極から電気的に分離された放熱部材を備える構成とすることができる。 In the above configuration, a heat radiating member that is adhered to the insulating layer via the first adhesive and electrically separated from the first electrode and the second electrode can be provided.
　上記構成において、前記絶縁層は、前記第２絶縁層および前記第２金属層下に第３接着剤を介し接着された第３絶縁層と、前記第２絶縁層と前記第３絶縁層との間に設けられ、前記第１電極および前記第２電極から電気的に分離され、少なくとも一部が前記第２金属層の少なくとも一部と平面視において重なる第３金属層と、を備える構成とすることができる。 In the above configuration, the insulating layer is composed of a third insulating layer bonded to the second insulating layer and the second metal layer under the second metal layer via a third adhesive, and the second insulating layer and the third insulating layer. It is configured to include a third metal layer provided between the first electrode and the second electrode, which is electrically separated from the first electrode and at least a part thereof overlaps with at least a part of the second metal layer in a plan view. be able to.
　上記構成において、前記絶縁層上に設けられ、前記第３金属層と接続され、前記第１電極および前記第２電極から電気的に分離された放熱部材を備える構成とすることができる。 In the above configuration, a heat radiating member provided on the insulating layer, connected to the third metal layer, and electrically separated from the first electrode and the second electrode can be provided.
　上記構成において、前記第１電子部品はパワートランジスタであり、前記第２電子部品はディスクリート受動素子である構成とすることができる。 In the above configuration, the first electronic component may be a power transistor, and the second electronic component may be a discrete passive element.
　本発明は、絶縁層と、前記絶縁層上に第１接着剤を介し接着されたパワートランジスタと、前記パワートランジスタを制御し、前記絶縁層下に実装され、前記パワートランジスタと前記絶縁層内に設けられた配線を介し電気的に接続された集積回路と、前記絶縁層上に前記第１接着剤を介し接着され、前記パワートランジスタおよび前記集積回路から電気的に分離された放熱部材と、を備え、前記パワートランジスタと前記集積回路とは平面視において重ならず、前記集積回路の少なくとも一部は前記放熱部材の少なくとも一部と平面視において重なる部品モジュールである。 The present invention controls an insulating layer, a power transistor bonded on the insulating layer via a first adhesive, and the power transistor, and is mounted under the insulating layer, and is mounted in the power transistor and the insulating layer. An integrated circuit electrically connected via an provided wiring and a heat dissipation member electrically separated from the power transistor and the integrated circuit by being bonded to the insulating layer via the first adhesive. The power transistor and the integrated circuit do not overlap in a plan view, and at least a part of the integrated circuit is a component module that overlaps with at least a part of the heat radiation member in a plan view.
　上記構成において、前記絶縁層内に設けられ、前記放熱部材と接続する第１金属層を備え、前記第１金属層の少なくとも一部は前記集積回路の少なくとも一部と平面視において重なる構成とすることができる。 In the above configuration, a first metal layer provided in the insulating layer and connected to the heat radiating member is provided, and at least a part of the first metal layer overlaps with at least a part of the integrated circuit in a plan view. be able to.
　上記構成において、前記第１金属層の少なくとも一部は前記パワートランジスタの少なくとも一部と重なる構成とすることができる。 In the above configuration, at least a part of the first metal layer can overlap with at least a part of the power transistor.
　上記構成において、前記絶縁層は、第１絶縁層と、前記第１絶縁層下に第２接着剤を介し接着された第２絶縁層と、を備え、前記第１金属層は、前記第１絶縁層下かつ前記第２絶縁層上に設けられ、前記第１絶縁層と前記第１接着剤を貫通する第１貫通孔の少なくとも１つを介し前記放熱部材と接続する構成とすることができる。 In the above configuration, the insulating layer includes a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive, and the first metal layer is the first. It can be configured to be provided under the insulating layer and on the second insulating layer, and to be connected to the heat radiating member through at least one of the first through hole penetrating the first insulating layer and the first adhesive. ..
　上記構成において、前記絶縁層は、前記第２絶縁層下に第３接着剤を介し接着された第３絶縁層と、前記第２絶縁層下かつ前記第３絶縁層上に設けられ、前記第２絶縁層と前記第２接着剤を貫通する第２貫通孔の少なくとも１つを介し前記第１金属層と接続する第２金属層と、を備え、前記第２金属層の少なくとも一部は前記集積回路の少なくとも一部と平面視において重なり、前記第２金属層の少なくとも一部は前記パワートランジスタの少なくとも一部と平面視において重なる構成とすることができる。 In the above configuration, the insulating layer is provided with a third insulating layer bonded under the second insulating layer via a third adhesive, and below the second insulating layer and on the third insulating layer. The two insulating layers and the second metal layer connected to the first metal layer through at least one of the second through holes penetrating the second adhesive are provided, and at least a part of the second metal layer is said. At least a part of the integrated circuit may be overlapped with at least a part of the second metal layer in a plan view, and at least a part of the second metal layer may be overlapped with at least a part of the power transistor in a plan view.
　本発明によれば、小型化することができる。 According to the present invention, the size can be reduced.
図１は、実施例１に係る部品モジュールの断面図である。FIG. 1 is a cross-sectional view of the component module according to the first embodiment. 図２（ａ）および図２（ｂ）は、実施例１に係る部品モジュールの平面図である。2 (a) and 2 (b) are plan views of the component module according to the first embodiment. 図３（ａ）および図３（ｂ）は、実施例１に係る部品モジュールの平面図である。3 (a) and 3 (b) are plan views of the component module according to the first embodiment. 図４（ａ）から図４（ｅ）は、実施例１に係る部品モジュールの製造方法を示す断面図（その１）である。4 (a) to 4 (e) are cross-sectional views (No. 1) showing a method of manufacturing the component module according to the first embodiment. 図５（ａ）から図５（ｃ）は、実施例１に係る部品モジュールの製造方法を示す断面図（その２）である。5 (a) to 5 (c) are cross-sectional views (No. 2) showing a method of manufacturing the component module according to the first embodiment. 図６は、比較例１に係る部品モジュールの断面図である。FIG. 6 is a cross-sectional view of the component module according to Comparative Example 1. 図７は、比較例１に係る部品モジュールの平面図である。FIG. 7 is a plan view of the component module according to Comparative Example 1. 図８は、実施例１の変形例１に係る部品モジュールの断面図である。FIG. 8 is a cross-sectional view of the component module according to the first modification of the first embodiment. 図９（ａ）および図９（ｂ）は、実施例１の変形例１に係る部品モジュールの平面図である。9 (a) and 9 (b) are plan views of the component module according to the first modification of the first embodiment. 図１０（ａ）および図１０（ｂ）は、実施例１の変形例１に係る部品モジュールの平面図である。10 (a) and 10 (b) are plan views of the component module according to the first modification of the first embodiment. 図１１は、実施例１の変形例２に係る部品モジュールの断面図である。FIG. 11 is a cross-sectional view of the component module according to the second modification of the first embodiment. 図１２（ａ）および図１２（ｂ）は、実施例１の変形例２に係る部品モジュールの平面図である。12 (a) and 12 (b) are plan views of the component module according to the second modification of the first embodiment. 図１３は、実施例１の変形例３に係る部品モジュールの断面図である。FIG. 13 is a cross-sectional view of the component module according to the third modification of the first embodiment. 図１４は、実施例１の変形例３に係る部品モジュールの平面図である。FIG. 14 is a plan view of the component module according to the third modification of the first embodiment. 図１５（ａ）および図１５（ｂ）は、実施例１の変形例４に係る部品モジュールの製造方法を示す断面図である。15 (a) and 15 (b) are cross-sectional views showing a method of manufacturing a component module according to a modification 4 of the first embodiment. 図１６は、実施例２に係る部品モジュールの断面図である。FIG. 16 is a cross-sectional view of the component module according to the second embodiment. 図１７（ａ）および図１７（ｂ）は、実施例２に係る部品モジュールの平面図である。17 (a) and 17 (b) are plan views of the component module according to the second embodiment. 図１８（ａ）および図１８（ｂ）は、実施例２に係る部品モジュールの平面図である。18 (a) and 18 (b) are plan views of the component module according to the second embodiment. 図１９は、実施例２の変形例１に係る部品モジュールの断面図である。FIG. 19 is a cross-sectional view of the component module according to the first modification of the second embodiment. 図２０は、実施例２の変形例１に係る部品モジュールの平面図である。FIG. 20 is a plan view of the component module according to the first modification of the second embodiment. 図２１は、実施例２の変形例２に係る部品モジュールの断面図である。FIG. 21 is a cross-sectional view of the component module according to the second modification of the second embodiment.
　以下、図面を参照し本発明の実施例について説明する。 Hereinafter, examples of the present invention will be described with reference to the drawings.
　図１は、実施例１に係る部品モジュールの断面図である。図２（ａ）から図３（ｂ）は、実施例１に係る部品モジュールの平面図である。図１では、金属層１４ａ～１４ｅを区別せず金属層１４として図示し、電子部品４０ａおよび４０ｂを区別せず電子部品４０として図示し、金属端子４６ａ～４６ｃを区別せず金属端子４６として図示している。 FIG. 1 is a cross-sectional view of the component module according to the first embodiment. 2 (a) to 3 (b) are plan views of the component module according to the first embodiment. In FIG. 1, the metal layers 14a to 14e are shown as the metal layer 14 without distinction, the electronic components 40a and 40b are shown as the electronic component 40 without distinction, and the metal terminals 46a to 46c are shown as the metal terminal 46 without distinction. Shown.
　図１に示すように、絶縁層１０の上面に接着剤１２が設けられている。絶縁層１０は、例えばポリイミド樹脂等の樹脂を主材料とする樹脂絶縁層であり、可撓性を有する。絶縁層１０の厚さは例えば７．５μｍから１２５μｍである。接着剤１２は例えばエポキシ樹脂接着剤等の樹脂接着剤である。接着剤１２の厚さは硬化後で例えば５μｍから５０μｍである。接着剤１２は例えば絶縁層１０より薄い。接着剤１２は耐熱性および低誘電特性に優れた樹脂材料が好ましい。 As shown in FIG. 1, the adhesive 12 is provided on the upper surface of the insulating layer 10. The insulating layer 10 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility. The thickness of the insulating layer 10 is, for example, 7.5 μm to 125 μm. The adhesive 12 is a resin adhesive such as an epoxy resin adhesive. The thickness of the adhesive 12 is, for example, 5 μm to 50 μm after curing. The adhesive 12 is thinner than, for example, the insulating layer 10. The adhesive 12 is preferably a resin material having excellent heat resistance and low dielectric properties.
　絶縁層１０上に接着剤１２を介し電子部品４０が接着されている。電子部品４０には、その下面に電極４１が設けられている。電子部品４０は、例えばＩＧＢＴ（Insulated Gate Bipolar Transistor）、バイポーラトランジスタまたはＦＥＴ（Field Effect Transistor）などのパワートランジスタである。トランジスタには、Ｓｉ、ＧａＮまたはＳｉＣ等の半導体材料が用いられる。電子部品４０は、例えばベアチップまたはベアチップが封止実装されたパッケージである。ベアチップが実装されたパッケージは、ＷＬＰ（Wafer Level Package）またはＳＩＰ（Single Inline Package）等のパッケージである。なお、実施例１では、ベアチップを採用している。 The electronic component 40 is adhered to the insulating layer 10 via the adhesive 12. The electronic component 40 is provided with an electrode 41 on the lower surface thereof. The electronic component 40 is, for example, a power transistor such as an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or a FET (Field Effect Transistor). A semiconductor material such as Si, GaN or SiC is used for the transistor. The electronic component 40 is, for example, a bare chip or a package in which a bare chip is sealed and mounted. The package on which the bare chip is mounted is a package such as WLP (Wafer Level Package) or SIP (Single Inline Package). In the first embodiment, a bare chip is used.
　電子部品４０は例えば横型トランジスタであり、電極４１は、例えばそれぞれゲート電極、ソース電極およびドレイン電極である。電子部品４０が縦型トランジスタの場合、電子部品４０の下面（表の面）にはゲート電極およびソース電極が設けられ、電子部品４０の上面（裏面）にドレイン電極が設けられる。電極４１は、Ｃｕ（銅）、Ａｕ（金）、Ａｇ（銀）、またはＡｌ（アルミニウム）等を主材料とする金属層である。 The electronic component 40 is, for example, a horizontal transistor, and the electrodes 41 are, for example, a gate electrode, a source electrode, and a drain electrode, respectively. When the electronic component 40 is a vertical transistor, a gate electrode and a source electrode are provided on the lower surface (front surface) of the electronic component 40, and a drain electrode is provided on the upper surface (back surface) of the electronic component 40. The electrode 41 is a metal layer whose main material is Cu (copper), Au (gold), Ag (silver), Al (aluminum), or the like.
　絶縁層１０および接着剤１２を貫通する貫通孔１６が設けられ、貫通孔１６の内面および絶縁層１０下に金属層１４が設けられている。金属層１４は、貫通孔１６を介し電子部品４０の電極４１に電気的に接続する。金属層１４は、例えば銅を主材料とする。金属層１４の厚さは例えば数μｍから１２５μｍであり、貫通孔１６（ビア）が埋め込まれる厚さである。金属層１４は絶縁層１０より厚い。金属層１４は絶縁層１０より薄くてもよい。貫通孔１６の大きさは、例えば３０μｍから５００μｍである。 A through hole 16 penetrating the insulating layer 10 and the adhesive 12 is provided, and a metal layer 14 is provided on the inner surface of the through hole 16 and under the insulating layer 10. The metal layer 14 is electrically connected to the electrode 41 of the electronic component 40 via the through hole 16. The metal layer 14 uses, for example, copper as a main material. The thickness of the metal layer 14 is, for example, several μm to 125 μm, which is the thickness at which the through hole 16 (via) is embedded. The metal layer 14 is thicker than the insulating layer 10. The metal layer 14 may be thinner than the insulating layer 10. The size of the through hole 16 is, for example, 30 μm to 500 μm.
　絶縁層２０は、例えばポリイミド樹脂等の樹脂を主材料とする樹脂絶縁層であり、可撓性を有する。絶縁層２０の厚さは例えば７．５μｍから１２５μｍである。接着剤２２は例えばエポキシ樹脂接着剤等の樹脂接着剤である。接着剤２２の厚さは硬化後で例えば５μｍから金属層１４の厚さ以上である。絶縁層１０、２０および接着剤２２は絶縁層１１を形成する。 The insulating layer 20 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility. The thickness of the insulating layer 20 is, for example, 7.5 μm to 125 μm. The adhesive 22 is a resin adhesive such as an epoxy resin adhesive. The thickness of the adhesive 22 is, for example, from 5 μm to more than the thickness of the metal layer 14 after curing. The insulating layers 10 and 20 and the adhesive 22 form the insulating layer 11.
　絶縁層２０および接着剤３２を貫通する貫通孔２６（第２貫通孔）が設けられ、貫通孔２６の内面および絶縁層２０下に金属層２４が設けられている。金属層２４は、貫通孔２６を介し金属層１４に電気的に接続する。金属層２４は、例えば銅を主材料とする。金属層２４の厚さは例えば数μｍから１２５μｍであり、貫通孔２６が埋め込まれる厚さである。 A through hole 26 (second through hole) penetrating the insulating layer 20 and the adhesive 32 is provided, and a metal layer 24 is provided on the inner surface of the through hole 26 and under the insulating layer 20. The metal layer 24 is electrically connected to the metal layer 14 through the through hole 26. The metal layer 24 uses, for example, copper as a main material. The thickness of the metal layer 24 is, for example, several μm to 125 μm, which is the thickness at which the through hole 26 is embedded.
　絶縁層２０下に金属層２４を覆うようにソルダーレジスト２８が設けられている。ソルダーレジスト２８には金属層２４の下面が露出する開口２９が設けられている。ソルダーレジスト２８はエポキシ樹脂等の樹脂絶縁層である。開口２９内には接合層３８が設けられている。接合層３８ははんだ等のロウ材または銀ペースト等の導電性ペーストを焼結した焼結金属層である。 A solder resist 28 is provided under the insulating layer 20 so as to cover the metal layer 24. The solder resist 28 is provided with an opening 29 in which the lower surface of the metal layer 24 is exposed. The solder resist 28 is a resin insulating layer such as an epoxy resin. A bonding layer 38 is provided in the opening 29. The bonding layer 38 is a sintered metal layer obtained by sintering a brazing material such as solder or a conductive paste such as silver paste.
　絶縁層１１下に電子部品４２、４４および金属端子４６が実装されている。電子部品４２は例えば電子部品４０等のトランジスタを制御する集積回路であり、シリコン基板を有する。電子部品４４はチップ抵抗、チップコンデンサおよびチップインダクタのようなディスクリート受動部品である。電子部品４２の上面には電極４３が設けられている。電子部品４４の両端には外部電極４５が設けられている。電極４３および４５は例えば銅、金、銀またはアルミニウムを主材料とする金属層である。電極４３および４５は接合層３８を介し金属層２４に接合される。金属端子４６は外部に電気的に接続するための端子であり、例えば銅、金、銀またはアルミニウムを主材料とする。金属端子４６は接合層３８を介し金属層２４と接合される。 Electronic components 42, 44 and metal terminals 46 are mounted under the insulating layer 11. The electronic component 42 is an integrated circuit that controls transistors such as the electronic component 40, and has a silicon substrate. Electronic components 44 are discrete passive components such as chip resistors, chip capacitors and chip inductors. An electrode 43 is provided on the upper surface of the electronic component 42. External electrodes 45 are provided at both ends of the electronic component 44. The electrodes 43 and 45 are metal layers mainly made of, for example, copper, gold, silver or aluminum. The electrodes 43 and 45 are bonded to the metal layer 24 via the bonding layer 38. The metal terminal 46 is a terminal for electrically connecting to the outside, and for example, copper, gold, silver or aluminum is used as a main material. The metal terminal 46 is joined to the metal layer 24 via the joining layer 38.
　図２（ａ）は、絶縁層１０、貫通孔１６、電子部品４０ａ、４０ｂ、電極４１ａおよび４１ｂを図示している。電子部品４０ａおよび４０ｂは横型トランジスタであり、その下面に電極４１ａおよび４１ｂとして、ソース電極ＳＥ、ドレイン電極ＤＥおよびゲート電極ＧＥが設けられている。電極４１ａおよび４１ｂには貫通孔１６が接続されている。 FIG. 2A illustrates the insulating layer 10, the through hole 16, the electronic components 40a and 40b, and the electrodes 41a and 41b. The electronic components 40a and 40b are horizontal transistors, and source electrodes SE, drain electrodes DE, and gate electrodes GE are provided on the lower surfaces thereof as electrodes 41a and 41b. Through holes 16 are connected to the electrodes 41a and 41b.
　図２（ｂ）は、絶縁層１０、金属層１４ａ～１４ｅおよび貫通孔１６を図示している。絶縁層１０の下面に金属層１４ａ～１４ｅが設けられている。金属層１４ａは貫通孔１６を介し電子部品４０ａのソース電極ＳＥに電気的に接続されている。金属層１４ｂは貫通孔１６を介し、電子部品４０ａのドレイン電極ＤＥおよび電子部品４０ｂのソース電極ＳＥに電気的に接続されている。金属層１４ｃは貫通孔１６を介し電子部品４０ｂのドレイン電極ＤＥに電気的に接続されている。このように、金属層１４ａ～１４ｃは電子部品４０ａおよび４０ｂのソース電極ＳＥ、ドレイン電極ＤＥを再配線する。金属層１４ｄおよび１４ｅは、貫通孔１６を介しそれぞれ電子部品４０ａおよび４０ｂのゲート電極ＧＥに電気的に接続されている。 FIG. 2B illustrates the insulating layer 10, the metal layers 14a to 14e, and the through hole 16. Metal layers 14a to 14e are provided on the lower surface of the insulating layer 10. The metal layer 14a is electrically connected to the source electrode SE of the electronic component 40a via the through hole 16. The metal layer 14b is electrically connected to the drain electrode DE of the electronic component 40a and the source electrode SE of the electronic component 40b via the through hole 16. The metal layer 14c is electrically connected to the drain electrode DE of the electronic component 40b via the through hole 16. In this way, the metal layers 14a to 14c rewire the source electrodes SE and drain electrodes DE of the electronic components 40a and 40b. The metal layers 14d and 14e are electrically connected to the gate electrodes GE of the electronic components 40a and 40b, respectively, through the through holes 16.
　図３（ａ）は、金属層１４ａ～１４ｅ、絶縁層２０、金属層２４および貫通孔２６を図示している。絶縁層２０の下面に金属層２４が設けられている。金属層２４は貫通孔２６を介し金属層１４ａ～１４ｅに電気的に接続されている。 FIG. 3A illustrates the metal layers 14a to 14e, the insulating layer 20, the metal layer 24, and the through hole 26. A metal layer 24 is provided on the lower surface of the insulating layer 20. The metal layer 24 is electrically connected to the metal layers 14a to 14e via the through hole 26.
　図３（ｂ）は、絶縁層２０、金属層２４、電子部品４２、４４、電極４３、４５および金属端子４６ａ～４６ｃを図示している。金属層２４の下面に電子部品４２、４４および金属端子４６が実装されている。金属層２４と電極４３、４５および金属端子４６とは接合層により接合されている。 FIG. 3B illustrates the insulating layer 20, the metal layer 24, the electronic components 42 and 44, the electrodes 43 and 45, and the metal terminals 46a to 46c. Electronic components 42, 44 and metal terminals 46 are mounted on the lower surface of the metal layer 24. The metal layer 24, the electrodes 43, 45, and the metal terminal 46 are joined by a joining layer.
　図２（ａ）から図３（ｂ）のように、金属端子４６ａは金属層２４および金属層１４ａを介し電子部品４０ａのソース電極ＳＥに電気的に接続される。金属端子４６ｂは金属層２４および金属層１４ｂを介し電子部品４０ａのドレイン電極ＤＥおよび電子部品４０ｂのソース電極ＳＥに電気的に接続される。金属端子４６ｃは、金属層２４および金属層１４ｃを介し電子部品４０ｂのドレイン電極ＤＥに電気的に接続される。このように、電子部品４０ａおよび４０ｂのトランジスタは金属端子４６ａと４６ｃの間に直列に接続され、電子部品４０ａおよび４０ｂのトランジスタの間のノードは金属端子４６ｂに接続される。電子部品４０ａおよび４０ｂのゲート電極ＧＥは、金属層１４ｄおよび１４ｅ、金属層２４、電子部品４４および金属層２４を介し電子部品４２に電気的に接続される。 As shown in FIGS. 2A to 3B, the metal terminal 46a is electrically connected to the source electrode SE of the electronic component 40a via the metal layer 24 and the metal layer 14a. The metal terminal 46b is electrically connected to the drain electrode DE of the electronic component 40a and the source electrode SE of the electronic component 40b via the metal layer 24 and the metal layer 14b. The metal terminal 46c is electrically connected to the drain electrode DE of the electronic component 40b via the metal layer 24 and the metal layer 14c. In this way, the transistors of the electronic components 40a and 40b are connected in series between the metal terminals 46a and 46c, and the nodes between the transistors of the electronic components 40a and 40b are connected to the metal terminals 46b. The gate electrodes GE of the electronic components 40a and 40b are electrically connected to the electronic component 42 via the metal layers 14d and 14e, the metal layer 24, the electronic component 44 and the metal layer 24.
［実施例１の製造方法］
　図４（ａ）から図５（ｃ）は、実施例１に係る部品モジュールの製造方法を示す断面図である。 [Manufacturing method of Example 1]
4 (a) to 5 (c) are cross-sectional views showing a method of manufacturing the component module according to the first embodiment.
　図４（ａ）に示すように、絶縁層１０の上面に接着剤１２を塗布する。接着剤１２の塗布には、例えばスピンコート法、スプレコート法、インクジェット法またはスクリーン印刷法を用いる。予め接着剤１２が形成された絶縁層１０を用意してもよい。接着剤１２は、電子部品４０が配置される領域に対応して、選択的に塗布されていてもよい。 As shown in FIG. 4A, the adhesive 12 is applied to the upper surface of the insulating layer 10. For the application of the adhesive 12, for example, a spin coating method, a spray coating method, an inkjet method or a screen printing method is used. The insulating layer 10 on which the adhesive 12 is formed in advance may be prepared. The adhesive 12 may be selectively applied corresponding to the region where the electronic component 40 is arranged.
　図４（ｂ）に示すように、接着剤１２上に電子部品４０を設け、電極４１の下面が接着剤１２に接するように配置する。熱処理することにより、接着剤１２を硬化させ電子部品４０と絶縁層１０とを接合させる。熱処理は例えば１００℃から３００℃の温度で実施する。絶縁層１０および接着剤１２を貫通する貫通孔１６を形成する。貫通孔１６は、例えばレーザ光を照射することにより形成する。これにより、電極４１の下面が貫通孔１６から露出する。 As shown in FIG. 4B, the electronic component 40 is provided on the adhesive 12 and arranged so that the lower surface of the electrode 41 is in contact with the adhesive 12. The heat treatment cures the adhesive 12 and joins the electronic component 40 and the insulating layer 10. The heat treatment is carried out at a temperature of, for example, 100 ° C to 300 ° C. A through hole 16 is formed through the insulating layer 10 and the adhesive 12. The through hole 16 is formed by, for example, irradiating a laser beam. As a result, the lower surface of the electrode 41 is exposed from the through hole 16.
　図４（ｃ）に示すように、絶縁層１０の下面および貫通孔１６の内面に金属層１４を形成する。金属層１４の形成は例えば以下の方法により行う。絶縁層１０の下面および貫通孔１６の内面にシード層を形成する。シード層は、例えばスパッタリング法または無電解めっき法を用い形成する。このシード層を電極とし、この上面にめっき層を電解めっき法で形成する。金属層１４をホトリソグラフィー法およびエッチング法を用いパターニングする。金属層１４は、配線、パッド電極、およびパッド電極と一体に形成された配線を形成する。 As shown in FIG. 4C, a metal layer 14 is formed on the lower surface of the insulating layer 10 and the inner surface of the through hole 16. The metal layer 14 is formed by, for example, the following method. A seed layer is formed on the lower surface of the insulating layer 10 and the inner surface of the through hole 16. The seed layer is formed by, for example, a sputtering method or an electroless plating method. This seed layer is used as an electrode, and a plating layer is formed on the upper surface thereof by an electrolytic plating method. The metal layer 14 is patterned using a photolithography method and an etching method. The metal layer 14 forms a wiring, a pad electrode, and a wiring integrally formed with the pad electrode.
　図４（ｄ）に示すように、絶縁層１０および金属層１４の下面に接着剤２２を塗布する。接着剤２２の塗布は図４（ａ）と同様に行う。接着剤２２下に絶縁層２０を配置し、熱処理することで絶縁層２０を金属層１４および絶縁層１０に接着させる。接着は図４（ｂ）と同様に行う。絶縁層１０、２０および接着剤２２により絶縁層１１を形成する。 As shown in FIG. 4D, the adhesive 22 is applied to the lower surfaces of the insulating layer 10 and the metal layer 14. The adhesive 22 is applied in the same manner as in FIG. 4 (a). The insulating layer 20 is arranged under the adhesive 22 and heat-treated to bond the insulating layer 20 to the metal layer 14 and the insulating layer 10. Adhesion is performed in the same manner as in FIG. 4 (b). The insulating layer 11 is formed by the insulating layers 10 and 20 and the adhesive 22.
　図４（ｅ）に示すように、絶縁層２０および接着剤２２を貫通する貫通孔２６を形成する。貫通孔２６の形成は図４（ｂ）と同様に行う。 As shown in FIG. 4 (e), a through hole 26 penetrating the insulating layer 20 and the adhesive 22 is formed. The through hole 26 is formed in the same manner as in FIG. 4 (b).
　図５（ａ）に示すように、絶縁層２０の下面および貫通孔２６の内面に金属層１４を形成する。金属層２４の形成は図４（ｃ）と同様の方法を用い行う。 As shown in FIG. 5A, a metal layer 14 is formed on the lower surface of the insulating layer 20 and the inner surface of the through hole 26. The metal layer 24 is formed by the same method as in FIG. 4 (c).
　図５（ｂ）に示すように、絶縁層２０下に金属層２４を覆うようにソルダーレジスト２８を形成する。ソルダーレジスト２８に金属層２４の下面が露出する開口２９を形成する。 As shown in FIG. 5B, a solder resist 28 is formed under the insulating layer 20 so as to cover the metal layer 24. An opening 29 is formed in the solder resist 28 so that the lower surface of the metal layer 24 is exposed.
　図５（ｃ）に示すように、開口２９内に接合層３８を設ける。接合層３８を介し、金属層２４に電子部品４２、４４および金属端子４６を実装する。接合層３８が例えばはんだまたは導電性ペーストの場合、２００℃～３００℃に加熱することにより、金属層２４に電子部品４２、４４および金属端子４６を接合する。以上により実施例１に係る部品モジュールが製造される。 As shown in FIG. 5C, a bonding layer 38 is provided in the opening 29. Electronic components 42, 44 and metal terminals 46 are mounted on the metal layer 24 via the bonding layer 38. When the bonding layer 38 is, for example, solder or a conductive paste, the electronic components 42, 44 and the metal terminals 46 are bonded to the metal layer 24 by heating to 200 ° C. to 300 ° C. As described above, the component module according to the first embodiment is manufactured.
［比較例１］
　図６は、比較例１に係る部品モジュールの断面図である。図７は、比較例１に係る部品モジュールの平面図である。 [Comparative Example 1]
FIG. 6 is a cross-sectional view of the component module according to Comparative Example 1. FIG. 7 is a plan view of the component module according to Comparative Example 1.
　図６に示すように、比較例１では、電子部品４０、４２および４４は絶縁層１０の上面に実装されている。電子部品４０の電極４１および電子部品４２の電極４３に金属層１４が貫通孔１６を介し接続されている。電子部品４４の電極４５は、例えば錫であり、金属層１４が銅層の場合、金属層１４は電極４５に直接接続できない。このため、絶縁層１０上に金属層１５を設け、金属層１４と電極４５とを接合層３８を用い接続する。 As shown in FIG. 6, in Comparative Example 1, the electronic components 40, 42, and 44 are mounted on the upper surface of the insulating layer 10. A metal layer 14 is connected to the electrode 41 of the electronic component 40 and the electrode 43 of the electronic component 42 via a through hole 16. The electrode 45 of the electronic component 44 is, for example, tin, and when the metal layer 14 is a copper layer, the metal layer 14 cannot be directly connected to the electrode 45. Therefore, the metal layer 15 is provided on the insulating layer 10, and the metal layer 14 and the electrode 45 are connected by using the bonding layer 38.
　図７に示すように、金属層１４は、電子部品４０ａ、４０ｂ、４２および４４を電気的に接続する。電子部品４０ａ、４０ｂ、４２および４４が重ならないように実装され、金属層１４を用いこれらを接続する。このため、絶縁層１０の面積が大きくなる。例えば絶縁層１０の大きさＸ１およびＹ１は一例としてそれぞれ５ｍｍおよび７ｍｍである。 As shown in FIG. 7, the metal layer 14 electrically connects the electronic components 40a, 40b, 42 and 44. The electronic components 40a, 40b, 42 and 44 are mounted so as not to overlap, and the metal layer 14 is used to connect them. Therefore, the area of the insulating layer 10 becomes large. For example, the sizes X1 and Y1 of the insulating layer 10 are, for example, 5 mm and 7 mm, respectively.
［実施例１の効果］
　実施例１によれば、電子部品４０（第１電子部品）は、絶縁層１１上に接着剤１２（第１接着剤）を介し接着されている。金属層２４（第１金属層）は、絶縁層１１下に設けられ、少なくとも１つの金属層１４は電極４１（第１電極）と電気的に接続する。電子部品４２および４４（第２電子部品）は、絶縁層１１下に実装され、電極４１および４３（第２電極）は、金属層２４に接合層３８を介し接合されている。 [Effect of Example 1]
According to the first embodiment, the electronic component 40 (first electronic component) is adhered to the insulating layer 11 via an adhesive 12 (first adhesive). The metal layer 24 (first metal layer) is provided under the insulating layer 11, and at least one metal layer 14 is electrically connected to the electrode 41 (first electrode). The electronic components 42 and 44 (second electronic components) are mounted under the insulating layer 11, and the electrodes 41 and 43 (second electrodes) are bonded to the metal layer 24 via the bonding layer 38.
　これにより、電子部品４０の少なくとも一部を電子部品４２および４４の少なくとも一部と平面視において重なるように設けることができる。よって、部品モジュールを小型化できる。例えば図２（ａ）の絶縁層１０の大きさＸ１およびＹ１を一例としてそれぞれ５ｍｍ×４．４ｍｍにできる。 Thereby, at least a part of the electronic parts 40 can be provided so as to overlap at least a part of the electronic parts 42 and 44 in a plan view. Therefore, the component module can be miniaturized. For example, the sizes X1 and Y1 of the insulating layer 10 shown in FIG. 2A can be set to 5 mm × 4.4 mm, respectively, as an example.
　図７において、矢印５１～５４で示した金属層１４の配線は、図３（ａ）における太線５６から５９内の貫通孔２６で代用できる。よって、金属層１４による配線を短縮できる。 In FIG. 7, the wiring of the metal layer 14 shown by arrows 51 to 54 can be replaced by the through hole 26 in the thick lines 56 to 59 in FIG. 3 (a). Therefore, the wiring by the metal layer 14 can be shortened.
　電極４１および金属層１４が例えば銅を主材料とする金属層の場合、金属層１４は電極４１に直接接合し易い。電極４３および４５が銅以外の金属（例えば錫または錫を含む半田等の金属）を主材料とする金属層の場合、金属層１４は電極４３および４５に直接接続し難い。そこで、図６のように、絶縁層１０上に金属層１５を設ける。金属層１５上に接合層３８としてはんだまたは導電性ペーストを設けるためには接着剤１２を一部除去することになり製造工程が複雑化する。また、接着剤１２の一部が残存すると接合不良となる。実施例１では、金属層２４下に接合層３８を介し電子部品４４を実装できるため、接着剤１２の除去を行わなくてもよくなる。なお、銅を主材料とするとは、銅を５０重量％以上含むことであり、例えば銅を８０重量％以上含むことである。 When the electrode 41 and the metal layer 14 are, for example, a metal layer whose main material is copper, the metal layer 14 is easily bonded directly to the electrode 41. When the electrodes 43 and 45 are metal layers whose main material is a metal other than copper (for example, tin or a metal such as solder containing tin), it is difficult for the metal layer 14 to be directly connected to the electrodes 43 and 45. Therefore, as shown in FIG. 6, a metal layer 15 is provided on the insulating layer 10. In order to provide the solder or the conductive paste as the bonding layer 38 on the metal layer 15, a part of the adhesive 12 is removed, which complicates the manufacturing process. Further, if a part of the adhesive 12 remains, the bonding becomes poor. In the first embodiment, since the electronic component 44 can be mounted under the metal layer 24 via the bonding layer 38, it is not necessary to remove the adhesive 12. The term "copper is used as the main material" means that copper is contained in an amount of 50% by weight or more, and for example, copper is contained in an amount of 80% by weight or more.
　電子部品４０がパワートランジスタであり、電子部品４４がディスクリート受動部品（特にインダクタまたはコンデンサ）の場合、電子部品４０と４４との間の寄生インダクタンスを小さくするため電子部品４０と４４との間の配線の距離を短くすることが好ましい。よって、電子部品４０と４４とを平面視において重ねることが好ましい。 When the electronic component 40 is a power transistor and the electronic component 44 is a discrete passive component (particularly an inductor or a capacitor), the wiring between the electronic components 40 and 44 is to reduce the parasitic inductance between the electronic components 40 and 44. It is preferable to shorten the distance between the two. Therefore, it is preferable to superimpose the electronic components 40 and 44 in a plan view.
　絶縁層１１は、絶縁層１０（第１絶縁層）と、絶縁層１０下に接着剤２２を介し接着された絶縁層２０（第２絶縁層）と、を備える。金属層１４は、絶縁層１０と接着剤１２（第１接着剤）を貫通する貫通孔１６内および絶縁層１０下に設けられ、電子部品４０の電極４１に接続する。絶縁層２０は、絶縁層１０および金属層１４に接着剤２２を介し接着されている。これにより、金属層１４を再配線層等に用いることができるため、部品モジュールをより小型化できる。 The insulating layer 11 includes an insulating layer 10 (first insulating layer) and an insulating layer 20 (second insulating layer) bonded under the insulating layer 10 via an adhesive 22. The metal layer 14 is provided in the through hole 16 penetrating the insulating layer 10 and the adhesive 12 (first adhesive) and under the insulating layer 10, and is connected to the electrode 41 of the electronic component 40. The insulating layer 20 is adhered to the insulating layer 10 and the metal layer 14 via an adhesive 22. As a result, the metal layer 14 can be used as the rewiring layer or the like, so that the component module can be further miniaturized.
　絶縁層１０および２０は樹脂を主材料とする樹脂絶縁層であり、接着剤１２および２２は図示を主材料とする絶縁性樹脂接着剤である。これにより、絶縁層１１上に接着剤１２を用い電子部品４０を簡単に実装できる。なお、樹脂を主材料とするとは、樹脂を５０重量％以上含むことであり、例えば樹脂を８０重量％以上含むことである。 The insulating layers 10 and 20 are resin insulating layers mainly made of resin, and the adhesives 12 and 22 are insulating resin adhesives whose main material is shown in the figure. As a result, the electronic component 40 can be easily mounted on the insulating layer 11 by using the adhesive 12. The resin as the main material means that the resin is contained in an amount of 50% by weight or more, for example, the resin is contained in an amount of 80% by weight or more.
　金属端子４６は、絶縁層１１下に設けられ、金属層２４に接合層３８を介し接合され、金属層２４を介し電極４１、４３および４５の少なくとも１つに電気的に接続されている。これにより、絶縁層１１下を実装基板等に実装できる。金属端子４６は、電子部品４２および４４より高いことが好ましい。これにより、部品モジュールを実装基板にフリップチップ実装したときに、電子部品４２および４４が実装基板に接触することを抑制できる。 The metal terminal 46 is provided under the insulating layer 11, is bonded to the metal layer 24 via the bonding layer 38, and is electrically connected to at least one of the electrodes 41, 43, and 45 via the metal layer 24. As a result, the bottom of the insulating layer 11 can be mounted on a mounting board or the like. The metal terminal 46 is preferably higher than the electronic components 42 and 44. As a result, when the component module is flip-chip mounted on the mounting board, it is possible to prevent the electronic components 42 and 44 from coming into contact with the mounting board.
［実施例１の変形例１］
　図８は、実施例１の変形例１に係る部品モジュールの断面図である。図９（ａ）から図１０（ｂ）は、実施例１の変形例１に係る部品モジュールの平面図である。 [Modification 1 of Example 1]
FIG. 8 is a cross-sectional view of the component module according to the first modification of the first embodiment. 9 (a) to 10 (b) are plan views of the component module according to the first modification of the first embodiment.
　図８に示すように、金属端子４６は、接着剤１２を介し絶縁層１０上に接着されている。金属層１４は絶縁層１０および接着剤１２を貫通する貫通孔１６ａを介し金属端子４６に接続されている。その他の構成は実施例１の図１と同じであり説明を省略する。 As shown in FIG. 8, the metal terminal 46 is adhered to the insulating layer 10 via the adhesive 12. The metal layer 14 is connected to the metal terminal 46 via a through hole 16a that penetrates the insulating layer 10 and the adhesive 12. Other configurations are the same as those in FIG. 1 of the first embodiment, and the description thereof will be omitted.
　図９（ａ）に示すように、絶縁層１０上に金属端子４６ａ～４６ｃが設けられている。金属端子４６ａ～４６ｃには貫通孔１６ａが接続されている。その他の構成は実施例１の図２（ａ）と同じであり説明を省略する。 As shown in FIG. 9A, metal terminals 46a to 46c are provided on the insulating layer 10. Through holes 16a are connected to the metal terminals 46a to 46c. Other configurations are the same as those in FIG. 2A of the first embodiment, and the description thereof will be omitted.
　図９（ｂ）に示すように、金属層１４ａ～１４ｃは貫通孔１６を介しそれぞれ金属端子４６ａ～４６ｃに接続されている。その他の構成は実施例１の図２（ｂ）と同じであり説明を省略する。 As shown in FIG. 9B, the metal layers 14a to 14c are connected to the metal terminals 46a to 46c, respectively, via the through holes 16. Other configurations are the same as those in FIG. 2B of the first embodiment, and the description thereof will be omitted.
　図１０（ａ）および図１０（ｂ）に示すように、絶縁層２０下に金属端子４６ａ～４６ｃは設けられておらず、金属端子４６ａ～４６ｂに金属層２４は接続されていない。その他の構成は実施例１の図３（ａ）および図３（ｂ）と同じであり説明を省略する。 As shown in FIGS. 10A and 10B, the metal terminals 46a to 46c are not provided under the insulating layer 20, and the metal layer 24 is not connected to the metal terminals 46a to 46b. Other configurations are the same as those in FIGS. 3 (a) and 3 (b) of the first embodiment, and the description thereof will be omitted.
　実施例１の変形例１によれば、金属端子４６は、絶縁層１１上に接着剤１２を介し接着され、金属層１４を介し電極４１、４３および４５の少なくとも１つに電気的に接続されている。これにより、部品モジュールを実装基板に実装することができる。金属端子４６は電子部品４０より高いことが好ましい。これにより、部品モジュールを実装基板にフリップチップ実装したときに、電子部品４０が実装基板に接触することを抑制できる。 According to the first modification of the first embodiment, the metal terminal 46 is adhered to the insulating layer 11 via the adhesive 12 and electrically connected to at least one of the electrodes 41, 43 and 45 via the metal layer 14. ing. As a result, the component module can be mounted on the mounting board. The metal terminal 46 is preferably higher than the electronic component 40. As a result, when the component module is flip-chip mounted on the mounting board, it is possible to prevent the electronic component 40 from coming into contact with the mounting board.
［実施例１の変形例２］
　図１１は、実施例１の変形例２に係る部品モジュールの断面図である。図１２（ａ）および図１２（ｂ）は、実施例１の変形例２に係る部品モジュールの平面図である。 [Modification 2 of Example 1]
FIG. 11 is a cross-sectional view of the component module according to the second modification of the first embodiment. 12 (a) and 12 (b) are plan views of the component module according to the second modification of the first embodiment.
　図１１に示すように、放熱部材４８は、接着剤１２を介し絶縁層１０上に接着されている。金属層１４ｆは絶縁層１０および接着剤１２を貫通する貫通孔１６ｂを介し放熱部材４８に接続されている。放熱部材４８は、電子部品４０、４２および４４において発生した熱を外部に放出するための部材であり、例えば銅、金、銀またはアルミニウムを主材料とする。その他の構成は実施例１の変形例１の図８と同じであり説明を省略する。 As shown in FIG. 11, the heat radiating member 48 is adhered to the insulating layer 10 via the adhesive 12. The metal layer 14f is connected to the heat radiating member 48 via a through hole 16b that penetrates the insulating layer 10 and the adhesive 12. The heat radiating member 48 is a member for releasing the heat generated in the electronic components 40, 42 and 44 to the outside, and is made of, for example, copper, gold, silver or aluminum as a main material. Other configurations are the same as those in FIG. 8 of the first modification of the first embodiment, and the description thereof will be omitted.
　図１２（ａ）に示すように、絶縁層１０上に金属端子４６が設けられている。金属端子４６には貫通孔１６ｂが接続されている。貫通孔１６ｂは貫通孔１６および１６ａより大きい。その他の構成は実施例１の変形例１の図９（ａ）と同じであり説明を省略する。 As shown in FIG. 12A, a metal terminal 46 is provided on the insulating layer 10. A through hole 16b is connected to the metal terminal 46. The through hole 16b is larger than the through hole 16 and 16a. Other configurations are the same as those in FIG. 9A of the first modification of the first embodiment, and the description thereof will be omitted.
　図１２（ｂ）に示すように、金属層１４ｆは貫通孔１６ｂを介し放熱部材４８に接続されている。金属層１４ｆは金属層１４ａ～１４ｅが設けられていない領域に設けられ、金属層１４ａ～１４ｃに隣接している。その他の構成は実施例１の図２（ｂ）と同じであり説明を省略する。その他の平面構造は、実施例１の変形例１の図１０（ａ）および図１０（ｂ）とおなじであり説明を省略する。 As shown in FIG. 12B, the metal layer 14f is connected to the heat radiating member 48 via the through hole 16b. The metal layer 14f is provided in a region where the metal layers 14a to 14e are not provided, and is adjacent to the metal layers 14a to 14c. Other configurations are the same as those in FIG. 2B of the first embodiment, and the description thereof will be omitted. Other planar structures are the same as those in FIGS. 10 (a) and 10 (b) of the first modification of the first embodiment, and the description thereof will be omitted.
　実施例１の変形例２によれば、放熱部材４８は、絶縁層１１上に接着剤１２を介し接着され、電極４１、４３および４５と電気的に分離されている。これにより、電子部品４０、４２および４４（特に電子部品４０）において発生した熱は金属層１４ａ～１４ｃを介し隣接する金属層１４ｆに伝導する。発生した熱は金属層１４ｆから放熱部材４８に伝導する。よって、電子部品４０、４２および４４の温度の上昇を抑制できる。 According to the second modification of the first embodiment, the heat radiating member 48 is adhered to the insulating layer 11 via the adhesive 12 and is electrically separated from the electrodes 41, 43 and 45. As a result, the heat generated in the electronic components 40, 42 and 44 (particularly the electronic component 40) is conducted to the adjacent metal layers 14f via the metal layers 14a to 14c. The generated heat is conducted from the metal layer 14f to the heat radiating member 48. Therefore, it is possible to suppress an increase in the temperature of the electronic components 40, 42 and 44.
［実施例１の変形例３］
　図１３は、実施例１の変形例３に係る部品モジュールの断面図である。図１４は、実施例１の変形例３に係る部品モジュールの平面図である。 [Modification 3 of Example 1]
FIG. 13 is a cross-sectional view of the component module according to the third modification of the first embodiment. FIG. 14 is a plan view of the component module according to the third modification of the first embodiment.
　図１３に示すように、絶縁層１０、金属層１４および１４ｆ下に絶縁層３０が設けられている。絶縁層１０、金属層１４および１４ｆと絶縁層３０とを接着する接着剤３２が設けられている。絶縁層３０は例えばポリイミド樹脂等の樹脂を主材料とする樹脂絶縁層であり、可撓性を有する。絶縁層３０の厚さは例えば７．５μｍから１２５μｍである。接着剤３２は例えばエポキシ樹脂接着剤等の樹脂接着剤である。接着剤３２の厚さは硬化後で例えば５μｍから金属層１４の厚さ以上である。絶縁層３０下に金属層３４が設けられ、金属層３４は接着剤３２および絶縁層３０を貫通する貫通孔３６を介し金属層１４ｆに接続されている。絶縁層３０および金属層３４は接着剤３２を介し絶縁層２０に接着されている。金属層３４は開口３５を有し、貫通孔２６は開口３５内において絶縁層２０、接着剤２２、絶縁層３０および接着剤３２を貫通する。絶縁層１１は、絶縁層１０、２０、３０、接着剤２２および３２を有する。その他の構成は実施例１の変形例２の図１１と同じであり説明を省略する。 As shown in FIG. 13, the insulating layer 30 is provided under the insulating layer 10, the metal layer 14 and 14f. An adhesive 32 for adhering the insulating layer 10, the metal layers 14 and 14f, and the insulating layer 30 is provided. The insulating layer 30 is a resin insulating layer whose main material is a resin such as a polyimide resin, and has flexibility. The thickness of the insulating layer 30 is, for example, 7.5 μm to 125 μm. The adhesive 32 is a resin adhesive such as an epoxy resin adhesive. The thickness of the adhesive 32 is, for example, from 5 μm to more than the thickness of the metal layer 14 after curing. A metal layer 34 is provided under the insulating layer 30, and the metal layer 34 is connected to the metal layer 14f via an adhesive 32 and a through hole 36 penetrating the insulating layer 30. The insulating layer 30 and the metal layer 34 are adhered to the insulating layer 20 via an adhesive 32. The metal layer 34 has an opening 35, and the through hole 26 penetrates the insulating layer 20, the adhesive 22, the insulating layer 30, and the adhesive 32 in the opening 35. The insulating layer 11 has insulating layers 10, 20, 30, and adhesives 22 and 32. Other configurations are the same as those in FIG. 11 of the second modification of the first embodiment, and the description thereof will be omitted.
　図１４は、金属層１４ｆ、絶縁層３０、金属層３４および貫通孔３６を図示している。金属層３４は、絶縁層３０の下面のほぼ全面に設けられており、貫通孔３６を介し金属層１４ｆに接続されている。金属層３４に開口３５が設けられ、貫通孔２６は開口３５内に設けられている。その他の平面構造は、実施例１の変形例１の図１０（ａ）、図１０（ｂ）、実施例１の変形例２の図１２（ａ）および図１２（ｂ）と同じであり、説明を省略する。 FIG. 14 illustrates the metal layer 14f, the insulating layer 30, the metal layer 34, and the through hole 36. The metal layer 34 is provided on substantially the entire lower surface of the insulating layer 30, and is connected to the metal layer 14f via a through hole 36. An opening 35 is provided in the metal layer 34, and a through hole 26 is provided in the opening 35. Other planar structures are the same as those of FIG. 10 (a) and FIG. 10 (b) of the first modification of the first embodiment and FIGS. 12 (a) and 12 (b) of the second modification of the first embodiment. The description is omitted.
　実施例１の変形例３によれば、絶縁層３０（第２絶縁層）は、接着剤３２（第２接着剤）を介し絶縁層１０に接着され、絶縁層２０（第３絶縁層）は、絶縁層３０および金属層１４（第２金属層）下に接着剤２２（第３接着剤）を介し接着されている。金属層３４（第３金属層）は、絶縁層１０と３０との間に設けられ、電極４１、４３および４５から電気的に分離され、少なくとも一部が金属層１４の少なくとも一部と平面視において重なる。これにより、金属層３４を電子部品４０と４２および４４との間のシールド層として用いることができる。 According to the third modification of the first embodiment, the insulating layer 30 (second insulating layer) is adhered to the insulating layer 10 via the adhesive 32 (second adhesive), and the insulating layer 20 (third insulating layer) is formed. , Is adhered under the insulating layer 30 and the metal layer 14 (second metal layer) via an adhesive 22 (third adhesive). The metal layer 34 (third metal layer) is provided between the insulating layers 10 and 30, and is electrically separated from the electrodes 41, 43, and 45, and at least a part thereof is viewed in plan with at least a part of the metal layer 14. Overlap in. As a result, the metal layer 34 can be used as a shield layer between the electronic components 40 and 42 and 44.
　また、金属層３４は金属層１４ｆを介し放熱部材４８と接続されている。これにより、電子部品４０、４２および４４（特に電子部品４０）で発生した熱を金属層１４から金属層３４を介し放熱部材４８から放出できる。 Further, the metal layer 34 is connected to the heat radiating member 48 via the metal layer 14f. As a result, the heat generated in the electronic components 40, 42 and 44 (particularly the electronic component 40) can be released from the metal layer 14 to the heat radiating member 48 via the metal layer 34.
　金属層３４に開口３５が設けられ、金属層２４は開口３５内の金属層３４と接触しない貫通孔２６を介し金属層１４に接続される。これにより、金属層３４を絶縁層３０の下面のほぼ全面に設けることができる。よって、金属層３４によるシールドの効果および放熱の効果を高めることができる。特に、電子部品４０がパワートランジスタであり、電子部品４２が電子部品４０を制御する集積回路の場合、パワートランジスタのスイッチングによるノイズが電子部品４２に影響し易い。よって、電子部品４０と４２との間の金属層３４を設けることが好ましい。 The metal layer 34 is provided with an opening 35, and the metal layer 24 is connected to the metal layer 14 through a through hole 26 that does not come into contact with the metal layer 34 in the opening 35. As a result, the metal layer 34 can be provided on almost the entire lower surface of the insulating layer 30. Therefore, the effect of shielding by the metal layer 34 and the effect of heat dissipation can be enhanced. In particular, when the electronic component 40 is a power transistor and the electronic component 42 is an integrated circuit that controls the electronic component 40, noise due to switching of the power transistor tends to affect the electronic component 42. Therefore, it is preferable to provide the metal layer 34 between the electronic components 40 and 42.
［実施例１の変形例４］
　図１５（ａ）および図１５（ｂ）は、実施例１の変形例４に係る部品モジュールの製造方法を示す断面図である。図１５（ａ）に示すように、実施例１の変形例３の部品モジュールを封止する樹脂層４７を形成する。樹脂層４７は、例えばエポキシ樹脂等の熱硬化性樹脂または熱可塑性樹脂である。樹脂層４７は無機フィラー等を含んでもよい。樹脂層４７は例えばポッティング法、真空印刷法、トランスファモールド法、インジェクションモールド法またはコンプレッションモールド法を用い形成する。 [Modified Example 4 of Example 1]
15 (a) and 15 (b) are cross-sectional views showing a method of manufacturing a component module according to a modification 4 of the first embodiment. As shown in FIG. 15A, a resin layer 47 for sealing the component module of the modification 3 of the first embodiment is formed. The resin layer 47 is a thermosetting resin such as an epoxy resin or a thermoplastic resin. The resin layer 47 may contain an inorganic filler or the like. The resin layer 47 is formed by using, for example, a potting method, a vacuum printing method, a transfer molding method, an injection molding method, or a compression molding method.
　図１５（ｂ）に示すように、樹脂層４７の上面を研磨し、金属端子４６および放熱部材４８の上面を露出させる。金属端子４６および放熱部材４８は電子部品４０より厚いため、電子部品４０の上面は樹脂層４７から露出しない。 As shown in FIG. 15B, the upper surface of the resin layer 47 is polished to expose the upper surfaces of the metal terminal 46 and the heat radiating member 48. Since the metal terminal 46 and the heat radiating member 48 are thicker than the electronic component 40, the upper surface of the electronic component 40 is not exposed from the resin layer 47.
　実施例１の変形例４のように実施例１およびその変形例１から３の部品モジュールを樹脂層４７により封止してもよい。 As in the modified example 4 of the first embodiment, the component modules of the first embodiment and the modified examples 1 to 3 may be sealed with the resin layer 47.
　実施例１およびその変形例においては、電子部品４０としてパワートランジスタを絶縁層１１上に実装し、電子部品４２として集積回路および電子部品４４としてディスクリート受動部品を絶縁層１１下に実装する例を説明した。パワートランジスタおよび集積回路を絶縁層１１上に実装し、ディスクリート受動部品を絶縁層１１下に実装してもよい。パワートランジスタおよびディスクリート受動部品を絶縁層１１上に実装し、集積回路を絶縁層１１下に実装してもよい。パワートランジスタおよびディスクリート受動部品の一部を絶縁層１１上に実装し、集積回路およびディスクリート受動部品の一部を絶縁層１１下に実装してもよい。 In the first embodiment and its modifications, an example in which a power transistor is mounted on the insulating layer 11 as an electronic component 40, an integrated circuit as an electronic component 42, and a discrete passive component as an electronic component 44 are mounted under the insulating layer 11 will be described. bottom. The power transistor and the integrated circuit may be mounted on the insulating layer 11, and the discrete passive component may be mounted under the insulating layer 11. The power transistor and the discrete passive component may be mounted on the insulating layer 11, and the integrated circuit may be mounted under the insulating layer 11. A part of the power transistor and the discrete passive component may be mounted on the insulating layer 11, and a part of the integrated circuit and the discrete passive component may be mounted under the insulating layer 11.
　図１６は、実施例２に係る部品モジュールの断面図である。図１７（ａ）から図１８（ｂ）は、実施例２に係る部品モジュールの平面図である。 FIG. 16 is a cross-sectional view of the component module according to the second embodiment. 17 (a) to 18 (b) are plan views of the component module according to the second embodiment.
　図１６に示すように、電子部品４０と４２とは平面視において重なっていない。電子部品４２と放熱部材４８は平面視において重なっている。電子部品４０と４２とは金属層１４および２４（配線）を介し電気的に接続されている。その他の構成は実施例１の変形例２の図１１と同じであり、説明を省略する。 As shown in FIG. 16, the electronic components 40 and 42 do not overlap in a plan view. The electronic component 42 and the heat radiating member 48 overlap each other in a plan view. The electronic components 40 and 42 are electrically connected via metal layers 14 and 24 (wiring). Other configurations are the same as those in FIG. 11 of the second modification of the first embodiment, and the description thereof will be omitted.
　図１７（ａ）に示すように、放熱部材４８および貫通孔１６ｂは実施例１の変形例２の図１２（ａ）の放熱部材４８および貫通孔１６ｂより大きい。その他の構成は実施例１の変形例２の図１２（ａ）と同じであり、説明を省略する。 As shown in FIG. 17 (a), the heat radiating member 48 and the through hole 16b are larger than the heat radiating member 48 and the through hole 16b of FIG. 12 (a) of the modification 2 of the first embodiment. Other configurations are the same as those in FIG. 12A of Modification 2 of Example 1, and the description thereof will be omitted.
　図１７（ｂ）に示すように、金属層１４ｆおよび貫通孔１６ｂは実施例１の変形例２の図１２（ｂ）の金属層１４ｆおよび貫通孔１６ｂより大きい。その他の構成は実施例１の変形例２の図１２（ｂ）と同じであり、説明を省略する。 As shown in FIG. 17 (b), the metal layer 14f and the through hole 16b are larger than the metal layer 14f and the through hole 16b of FIG. 12 (b) of the modification 2 of the first embodiment. Other configurations are the same as those in FIG. 12B of the second modification of the first embodiment, and the description thereof will be omitted.
　図１８（ａ）に示すように、電子部品４０ａおよび４０ｂと電子部品４２とを接続する金属層２４が実施例１の変形例１の図１０（ａ）に比べ図中の上下方向に伸びている。その他の構成は実施例１の変形例１の図１０（ａ）と同じであり、説明を省略する。 As shown in FIG. 18A, the metal layer 24 connecting the electronic components 40a and 40b and the electronic component 42 extends in the vertical direction in the drawing as compared with FIG. 10A of the modification 1 of the first embodiment. There is. Other configurations are the same as those in FIG. 10 (a) of the first modification of the first embodiment, and the description thereof will be omitted.
　図１８（ｂ）に示すように、電子部品４２が実施例１の変形例１の図１０（ｂ）に比べ図中の下方向に設けられている。その他の構成は実施例１の変形例１の図１０（ｂ）と同じであり、説明を省略する。 As shown in FIG. 18 (b), the electronic component 42 is provided in the lower direction in the figure as compared with FIG. 10 (b) of the modified example 1 of the first embodiment. Other configurations are the same as those in FIG. 10 (b) of the first modification of the first embodiment, and the description thereof will be omitted.
　実施例２によれば、パワートランジスタである電子部品４０ａおよび４０ｂとパワートランジスタを制御する集積回路である電子部品４２とは平面視において重ならない。これにより、パワートランジスタで発生した熱により制御回路の特性が変化することを抑制できる。集積回路である電子部品４２の少なくとも一部は放熱部材４８の少なくとも一部と平面視において重なる。これにより、電子部品４２において発生した熱を放熱部材４８から放熱できる。放熱性を高めるため、電子部品４２の平面面積のうち５０％以上は放熱部材４８と重なることが好ましく、８０％以上重なることがより好ましい。 According to the second embodiment, the electronic components 40a and 40b, which are power transistors, and the electronic components 42, which are integrated circuits that control the power transistors, do not overlap in a plan view. As a result, it is possible to suppress changes in the characteristics of the control circuit due to the heat generated by the power transistor. At least a part of the electronic component 42 which is an integrated circuit overlaps with at least a part of the heat radiating member 48 in a plan view. As a result, the heat generated in the electronic component 42 can be dissipated from the heat radiating member 48. In order to improve heat dissipation, it is preferable that 50% or more of the plane area of the electronic component 42 overlaps with the heat dissipation member 48, and more preferably 80% or more.
　放熱部材４８と貫通孔１６ｂを介し接続する金属層１４ｆ（第１金属層）の少なくとも一部は電子部品４２の少なくとも一部と平面視において重なる。これにより、電子部品４２において発生した熱を金属層１４ｆおよび貫通孔１６ｂ（第１貫通孔）を介し放熱部材４８に伝導させることができる。放熱性を高めるため、電子部品４２の平面面積のうち５０％以上は金属層１４ｆと重なることが好ましく、８０％以上重なることがより好ましい。 At least a part of the metal layer 14f (first metal layer) connected to the heat radiating member 48 via the through hole 16b overlaps with at least a part of the electronic component 42 in a plan view. As a result, the heat generated in the electronic component 42 can be conducted to the heat radiating member 48 through the metal layer 14f and the through hole 16b (first through hole). In order to improve heat dissipation, 50% or more of the plane area of the electronic component 42 preferably overlaps with the metal layer 14f, and more preferably 80% or more overlaps with the metal layer 14f.
［実施例２の変形例１］
　図１９は、実施例２の変形例１に係る部品モジュールの断面図である。図２０は、実施例２の変形例１に係る部品モジュールの平面図である。 [Modification 1 of Example 2]
FIG. 19 is a cross-sectional view of the component module according to the first modification of the second embodiment. FIG. 20 is a plan view of the component module according to the first modification of the second embodiment.
　図１９に示すように、電子部品４０と４２とは平面視において重なっていない。電子部品４２と放熱部材４８は平面視において重なっている。その他の構成は実施例１の変形例３の図１３と同じであり、説明を省略する。 As shown in FIG. 19, the electronic components 40 and 42 do not overlap in a plan view. The electronic component 42 and the heat radiating member 48 overlap each other in a plan view. Other configurations are the same as those in FIG. 13 of the third modification of the first embodiment, and the description thereof will be omitted.
　図２０に示すように、金属層３４および貫通孔３６は実施例１の変形例３の図１４の金属層３４および貫通孔３６より図中において下方向に広がっている。その他の構成は実施例１の変形例３の図１４と同じであり、説明を省略する。 As shown in FIG. 20, the metal layer 34 and the through hole 36 extend downward in the drawing from the metal layer 34 and the through hole 36 in FIG. 14 of the modified example 3 of the first embodiment. Other configurations are the same as those in FIG. 14 of the third modification of the first embodiment, and the description thereof will be omitted.
　実施例２の変形例１によれば、金属層３４（第２金属層）の少なくとも一部はパワートランジスタである電子部品４０ａおよび４０ｂの少なくとも一部と平面視において重なり、金属層３４の少なくとも一部は集積回路である電子部品４２の少なくとも一部と平面視において重なる。これにより、パワートランジスタおよび集積回路において発生した熱を、金属層３４、貫通孔３６（第２貫通孔）、金属層１４ｆおよび貫通孔１６ｂを介し放熱部材４８に伝導させることができる。放熱性を高めるため、電子部品４０ａおよび４０ｂの平面面積のうち５０％以上は金属層３４と重なることが好ましく、８０％以上重なることがより好ましい。また、電子部品４２の平面面積のうち５０％以上は金属層３４と重なることが好ましく、８０％以上重なることがより好ましい。 According to the first modification of the second embodiment, at least a part of the metal layer 34 (second metal layer) overlaps with at least a part of the electronic components 40a and 40b which are power transistors in a plan view, and at least one of the metal layers 34. The portion overlaps at least a part of the electronic component 42 which is an integrated circuit in a plan view. As a result, the heat generated in the power transistor and the integrated circuit can be conducted to the heat radiating member 48 through the metal layer 34, the through hole 36 (second through hole), the metal layer 14f and the through hole 16b. In order to improve heat dissipation, 50% or more of the plane areas of the electronic components 40a and 40b preferably overlap with the metal layer 34, and more preferably 80% or more. Further, 50% or more of the plane area of the electronic component 42 preferably overlaps with the metal layer 34, and more preferably 80% or more overlaps with the metal layer 34.
　また、金属層３４を貫通孔２６が通過する開口３５以外の領域に設けることで、絶縁層１１の剛性を高めることができる。また、絶縁層２０と３０との間に充填する接着剤２２の量を減らすことができる。これにより、接着剤２２に起因する絶縁層１１の撓みを抑制できる。金属層３４はグランド電位を供給してもよい。これにより、金属層３４が電子部品４０ａ、４０ｂおよび４２に影響することを抑制できる。 Further, by providing the metal layer 34 in a region other than the opening 35 through which the through hole 26 passes, the rigidity of the insulating layer 11 can be increased. Further, the amount of the adhesive 22 to be filled between the insulating layers 20 and 30 can be reduced. Thereby, the bending of the insulating layer 11 due to the adhesive 22 can be suppressed. The metal layer 34 may supply a ground potential. This makes it possible to prevent the metal layer 34 from affecting the electronic components 40a, 40b and 42.
　絶縁層１１の剛性を高める観点から、金属層３４の平面面積は、絶縁層１１の平面面積の５０％以上が好ましく、８０％以上がより好ましい。 From the viewpoint of increasing the rigidity of the insulating layer 11, the plane area of the metal layer 34 is preferably 50% or more, more preferably 80% or more of the plane area of the insulating layer 11.
［実施例２の変形例２］
　図２１は、実施例２の変形例２に係る部品モジュールの断面図である。 [Modification 2 of Example 2]
FIG. 21 is a cross-sectional view of the component module according to the second modification of the second embodiment.
　図２１に示すように、電子部品４０と４２とは平面視において重なっていない。電子部品４２と放熱部材４８は平面視において重なっている。その他の構成は実施例１の変形例４の図１５（ｂ）と同じであり、説明を省略する。実施例２の変形例２のように、電子部品４０、４２および４４は樹脂層４７に封止されていてもよい。放熱部材４８の上面が樹脂層４７の上面から露出することで、放熱部材４８から効率的に放熱させることができる。 As shown in FIG. 21, the electronic components 40 and 42 do not overlap in a plan view. The electronic component 42 and the heat radiating member 48 overlap each other in a plan view. Other configurations are the same as those in FIG. 15 (b) of the modified example 4 of the first embodiment, and the description thereof will be omitted. As in the second modification of the second embodiment, the electronic components 40, 42 and 44 may be sealed in the resin layer 47. By exposing the upper surface of the heat radiating member 48 from the upper surface of the resin layer 47, heat can be efficiently radiated from the heat radiating member 48.
　以上、本発明の実施例について詳述したが、本発明はかかる特定の実施例に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形・変更が可能である。 Although the examples of the present invention have been described in detail above, the present invention is not limited to such specific examples, and various modifications and modifications are made within the scope of the gist of the present invention described in the claims. It can be changed.
　１０、２０、３０　絶縁層
　１２、２２、３２　接着剤
　１４、１４ａ～１４ｆ、２４、３４　金属層
　１６、１６ａ、１６ｂ、２６、３６　貫通孔
　４０、４０ａ、４０ｂ、４２、４４　電子部品
　４１、４１ａ、４１ｂ、４３、４５　電極
　４６、４６ａ～４６ｃ　金属端子
　４８　放熱部材
　 10, 20, 30 Insulation layer 12, 22, 32 Adhesive 14, 14a-14f, 24, 34 Metal layer 16, 16a, 16b, 26, 36 Through holes 40, 40a, 40b, 42, 44 Electronic components 41, 41a , 41b, 43, 45 Electrodes 46, 46a-46c Metal terminals 48 Heat dissipation member

Claims (16)

  1. 　絶縁層と、
    　前記絶縁層上に第１接着剤を介し接着され、第１電極を有する第１電子部品と、
    　前記絶縁層下に設けられ、少なくとも１つの第１金属層は前記第１電極と電気的に接続する第１金属層と、
    　前記絶縁層下に実装され、前記第１金属層に接合層を介し接合された第２電極を有する第２電子部品と、
    　を備え、
    　前記第１電子部品の少なくとも一部は前記第２電子部品の少なくとも一部と平面視において重なる部品モジュール。     Insulation layer and
    A first electronic component that is adhered onto the insulating layer via a first adhesive and has a first electrode.
    A first metal layer provided under the insulating layer and at least one first metal layer is electrically connected to the first electrode.
    A second electronic component mounted under the insulating layer and having a second electrode bonded to the first metal layer via a bonding layer, and a second electronic component.
    With
    A component module in which at least a part of the first electronic component overlaps with at least a part of the second electronic component in a plan view.
  2. 　前記絶縁層は、第１絶縁層と、前記第１絶縁層下に第２接着剤を介し接着された第２絶縁層と、を備える請求項１に記載の部品モジュール。 The component module according to claim 1, wherein the insulating layer includes a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive.
  3. 　前記少なくとも１つの第１金属層は、前記第２絶縁層下に設けられている請求項２に記載の部品モジュール。 The component module according to claim 2, wherein the at least one first metal layer is provided under the second insulating layer.
  4. 　前記第１絶縁層下に設けられ、前記第１絶縁層と前記第１接着剤を貫通する第１貫通孔の少なくとも１つを介し前記第１電極に接続する第２金属層を備え、
    　前記第２絶縁層は、前記第１絶縁層および前記第２金属層に前記第２接着剤を介し接着されている請求項２に記載の部品モジュール。     A second metal layer provided below the first insulating layer and connected to the first electrode via at least one of the first insulating layer and the first through hole penetrating the first adhesive is provided.
    The component module according to claim 2, wherein the second insulating layer is adhered to the first insulating layer and the second metal layer via the second adhesive.
  5. 　前記絶縁層上に前記第１接着剤を介し接着され、前記第２金属層を介し前記第１電極および前記第２電極の少なくとも一方に電気的に接続された金属端子を備える請求項４に記載の部品モジュール。 4. The fourth aspect of the present invention, wherein the insulating layer is provided with a metal terminal that is adhered to the insulating layer via the first adhesive and is electrically connected to at least one of the first electrode and the second electrode via the second metal layer. Parts module.
  6. 　前記第１絶縁層、前記第２絶縁層、前記第１接着剤および前記第２接着剤は樹脂を主材料とする請求項２から５のいずれか一項に記載の部品モジュール。 The component module according to any one of claims 2 to 5, wherein the first insulating layer, the second insulating layer, the first adhesive, and the second adhesive are made of a resin as a main material.
  7. 　前記絶縁層下に設けられ、前記第１金属層に接合層を介し接合され、前記第１金属層を介し前記第１電極および前記第２電極の少なくとも一方に電気的に接続された金属端子を備える請求項１から６のいずれか一項に記載の部品モジュール。 A metal terminal provided under the insulating layer, bonded to the first metal layer via a bonding layer, and electrically connected to at least one of the first electrode and the second electrode via the first metal layer. The component module according to any one of claims 1 to 6.
  8. 　前記絶縁層上に前記第１接着剤を介し接着され、前記第１電極および前記第２電極から電気的に分離された放熱部材を備える請求項１から７のいずれか一項に記載の部品モジュール。 The component module according to any one of claims 1 to 7, further comprising a heat radiating member bonded to the insulating layer via the first adhesive and electrically separated from the first electrode and the second electrode. ..
  9. 　前記絶縁層は、前記第２絶縁層および前記第２金属層下に第３接着剤を介し接着された第３絶縁層と、
    　前記第２絶縁層と前記第３絶縁層との間に設けられ、前記第１電極および前記第２電極から電気的に分離され、少なくとも一部が前記第２金属層の少なくとも一部と平面視において重なる第３金属層と、
    を備える請求項４または５に記載の部品モジュール。     The insulating layer includes a second insulating layer and a third insulating layer bonded under the second metal layer via a third adhesive.
    It is provided between the second insulating layer and the third insulating layer, is electrically separated from the first electrode and the second electrode, and at least a part thereof is viewed in a plan view with at least a part of the second metal layer. With the overlapping third metal layer in
    The component module according to claim 4 or 5.
  10. 　前記絶縁層上に設けられ、前記第３金属層と接続され、前記第１電極および前記第２電極から電気的に分離された放熱部材を備える請求項９に記載の部品モジュール。 The component module according to claim 9, further comprising a heat radiating member provided on the insulating layer, connected to the third metal layer, and electrically separated from the first electrode and the second electrode.
  11. 　前記第１電子部品はパワートランジスタであり、前記第２電子部品はディスクリート受動素子である請求項１から１０のいずれか一項に記載の部品モジュール。 The component module according to any one of claims 1 to 10, wherein the first electronic component is a power transistor, and the second electronic component is a discrete passive element.
  12. 　絶縁層と、
    　前記絶縁層上に第１接着剤を介し接着されたパワートランジスタと、
    　前記パワートランジスタを制御し、前記絶縁層下に実装され、前記パワートランジスタと前記絶縁層内に設けられた配線を介し電気的に接続された集積回路と、
    　前記絶縁層上に前記第１接着剤を介し接着され、前記パワートランジスタおよび前記集積回路から電気的に分離された放熱部材と、を備え、
    　前記パワートランジスタと前記集積回路とは平面視において重ならず、
    　前記集積回路の少なくとも一部は前記放熱部材の少なくとも一部と平面視において重なる部品モジュール。     Insulation layer and
    A power transistor bonded on the insulating layer via a first adhesive,
    An integrated circuit that controls the power transistor, is mounted under the insulating layer, and is electrically connected to the power transistor via wiring provided in the insulating layer.
    A heat radiating member bonded to the insulating layer via the first adhesive and electrically separated from the power transistor and the integrated circuit is provided.
    The power transistor and the integrated circuit do not overlap in a plan view.
    A component module in which at least a part of the integrated circuit overlaps with at least a part of the heat radiating member in a plan view.
  13. 　前記絶縁層内に設けられ、前記放熱部材と接続する第１金属層を備え、
    　前記第１金属層の少なくとも一部は前記集積回路の少なくとも一部と平面視において重なる請求項１２に記載の部品モジュール。     A first metal layer provided in the insulating layer and connected to the heat radiating member is provided.
    The component module according to claim 12, wherein at least a part of the first metal layer overlaps with at least a part of the integrated circuit in a plan view.
  14. 　前記第１金属層の少なくとも一部は前記パワートランジスタの少なくとも一部と重なる請求項１３に記載の部品モジュール。 The component module according to claim 13, wherein at least a part of the first metal layer overlaps with at least a part of the power transistor.
  15. 　前記絶縁層は、第１絶縁層と、前記第１絶縁層下に第２接着剤を介し接着された第２絶縁層と、を備え、
    　前記第１金属層は、前記第１絶縁層下かつ前記第２絶縁層上に設けられ、前記第１絶縁層と前記第１接着剤を貫通する第１貫通孔の少なくとも１つを介し前記放熱部材と接続する請求項１３に記載の部品モジュール。     The insulating layer includes a first insulating layer and a second insulating layer bonded under the first insulating layer via a second adhesive.
    The first metal layer is provided below the first insulating layer and on the second insulating layer, and dissipates heat through at least one of the first insulating layer and the first through hole penetrating the first adhesive. The component module according to claim 13, which is connected to a member.
  16. 　前記絶縁層は、前記第２絶縁層下に第３接着剤を介し接着された第３絶縁層と、
    　前記第２絶縁層下かつ前記第３絶縁層上に設けられ、前記第２絶縁層と前記第２接着剤を貫通する第２貫通孔の少なくとも１つを介し前記第１金属層と接続する第２金属層と、
    を備え、
    　前記第２金属層の少なくとも一部は前記集積回路の少なくとも一部と平面視において重なり、前記第２金属層の少なくとも一部は前記パワートランジスタの少なくとも一部と平面視において重なる請求項１５に記載の部品モジュール。
    　     The insulating layer includes a third insulating layer bonded under the second insulating layer via a third adhesive.
    A second that is provided below the second insulating layer and above the third insulating layer, and is connected to the first metal layer via at least one of the second through hole that penetrates the second insulating layer and the second adhesive. 2 metal layers and
    With
    The fifteenth aspect of claim 15, wherein at least a part of the second metal layer overlaps with at least a part of the integrated circuit in a plan view, and at least a part of the second metal layer overlaps with at least a part of the power transistor in a plan view. Parts module.
PCT/JP2020/005736 2020-02-14 2020-02-14 Component module WO2021161498A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/005736 WO2021161498A1 (en) 2020-02-14 2020-02-14 Component module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/005736 WO2021161498A1 (en) 2020-02-14 2020-02-14 Component module

Publications (1)

Publication Number Publication Date
WO2021161498A1 true WO2021161498A1 (en) 2021-08-19

Family

ID=77292824

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2020/005736 WO2021161498A1 (en) 2020-02-14 2020-02-14 Component module

Country Status (1)

Country Link
WO (1) WO2021161498A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077134A (en) * 1993-02-08 1995-01-10 General Electric Co <Ge> Integrated circuit module
JP2003243604A (en) * 2002-02-13 2003-08-29 Sony Corp Electronic component and manufacturing method of electronic component
JP2019036723A (en) * 2017-08-10 2019-03-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． Semiconductor package and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077134A (en) * 1993-02-08 1995-01-10 General Electric Co <Ge> Integrated circuit module
JP2003243604A (en) * 2002-02-13 2003-08-29 Sony Corp Electronic component and manufacturing method of electronic component
JP2019036723A (en) * 2017-08-10 2019-03-07 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． Semiconductor package and manufacturing method thereof

Similar Documents

Publication Publication Date Title
US8125080B2 (en) Semiconductor power module packages with simplified structure and methods of fabricating the same
US7696055B2 (en) Method for manufacturing passive device and semiconductor package using thin metal piece
KR102622109B1 (en) Electronic package with integrated interconnection structure and method for manufacturing the same
JP2003124435A (en) High frequency semiconductor
KR20040020945A (en) Structure and method for fabrication of a leadless multi-die carrier
US8604610B1 (en) Flexible power module semiconductor packages
US20090243079A1 (en) Semiconductor device package
US10770444B2 (en) Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
JP2005064479A (en) Circuit module
US10879155B2 (en) Electronic device with double-sided cooling
CN110265307B (en) Method for manufacturing semiconductor package and package structure thereof
WO2021161498A1 (en) Component module
WO2021181468A1 (en) Semiconductor module
WO2021161449A1 (en) Component module and production method for same
JP7241805B2 (en) Semiconductor device and its manufacturing method
WO2021192172A1 (en) Power module and production method for same
US20230207420A1 (en) Integrated circuit having an improved thermal integrated circuit having an improved thermal performance
WO2020202972A1 (en) Module and method for manufacturing same
WO2021117191A1 (en) Component module and production method for same
JP2021052055A (en) Component module and manufacturing method thereof
KR20220033089A (en) Complex semiconductor package
JP2021044311A (en) Power module
JP2020155645A (en) Module and manufacturing method thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20919049

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20919049

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP