WO2020202972A1 - Module and method for manufacturing same - Google Patents

Module and method for manufacturing same Download PDF

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Publication number
WO2020202972A1
WO2020202972A1 PCT/JP2020/008656 JP2020008656W WO2020202972A1 WO 2020202972 A1 WO2020202972 A1 WO 2020202972A1 JP 2020008656 W JP2020008656 W JP 2020008656W WO 2020202972 A1 WO2020202972 A1 WO 2020202972A1
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WO
WIPO (PCT)
Prior art keywords
layer
metal layer
insulating layer
annular metal
hole
Prior art date
Application number
PCT/JP2020/008656
Other languages
French (fr)
Japanese (ja)
Inventor
高野貴之
笹島裕一
Original Assignee
太陽誘電株式会社
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Filing date
Publication date
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Publication of WO2020202972A1 publication Critical patent/WO2020202972A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

Definitions

  • the present invention relates to a module and a manufacturing method thereof, for example, a module for mounting an electronic component and a manufacturing method thereof.
  • the present invention has been made in view of the above problems, and an object of the present invention is to improve heat dissipation.
  • the present invention is provided through a first insulating layer, an electronic component mounted on the lower surface of the first insulating layer, and a first through hole provided on the upper surface of the first insulating layer and penetrating the first insulating layer.
  • the wiring connected to the electronic component, the first layer provided under or on the electronic component, and the corresponding electronic component between the first insulating layer and the first layer.
  • the corresponding electronic component and the corresponding electronic component are filled in a first space surrounded by a first annular metal layer surrounding any one of the wirings, the first insulating layer, the first layer and the first annular metal layer.
  • a module comprising a first resin for sealing one of the wirings, and having a first hole connecting the outside and the first space on at least one of the first insulating layer and the first annular metal layer. Is.
  • the first hole may be provided in the first annular metal layer.
  • the first hole may be provided diagonally or in the vicinity of the first annular metal layer.
  • the electronic component and the wiring are provided between the second layer provided under the electronic component and on the wiring, whichever is not one of the above, and between the first insulating layer and the second layer.
  • a second space surrounded by a second annular metal layer surrounding the other, the first insulating layer, the second layer, and the second annular metal layer is filled to seal the other of the electronic component and the wiring. It can be configured to include two resins.
  • the first hole is provided in the first annular metal layer
  • the first insulating layer is provided with a second hole connecting the first space and the second space
  • the second annular metal layer is provided.
  • the structure may be such that no holes are provided in the.
  • the first hole is provided in the first annular metal layer, is not provided in the first insulating layer and the first layer, and is externally provided in the second annular metal layer and the second.
  • the configuration may be such that a second hole connecting the space is provided.
  • the first layer is a second insulating layer provided on the wiring, and the wiring is provided on the upper surface of the second insulating layer and is provided through a second through hole penetrating the second insulating layer. It can be configured to include an electrode to be connected to.
  • the present invention is provided through a first insulating layer, an electronic component mounted on the lower surface of the first insulating layer, and a first through hole provided on the upper surface of the first insulating layer and penetrating the first insulating layer.
  • the wiring connected to the electronic component, the first layer provided under or on the electronic component, and the corresponding electronic component between the first insulating layer and the first layer.
  • a first annular metal layer that surrounds any one of the wirings is provided, and at least one of the first insulating layer, the first layer, and the first annular metal layer is provided with an external layer and the first insulating layer.
  • a method for manufacturing a module comprising a step of filling the first space with a resin for sealing one of the corresponding electronic component and the wiring through the first hole of the structure.
  • the structure comprises a second layer provided under the electronic component and on the other side of the wiring, and the other of the electronic component and the wiring between the first insulating layer and the second layer.
  • a second annular metal layer that surrounds the first hole is provided in the first annular metal layer, and the first insulating layer is provided with the first space, the first insulating layer, the second layer, and the like.
  • a second hole connecting the second space surrounded by the second annular metal layer is provided, the second annular metal layer is not provided with a hole, and the step of filling the resin is the first step.
  • the configuration may include a step of filling the first space with the resin through the holes and filling the resin from the first space to the second space through the second holes.
  • heat dissipation can be improved.
  • FIG. 1 (a) to 1 (c) are cross-sectional views (No. 1) showing a method of manufacturing a module according to the first embodiment.
  • 2 (a) and 2 (b) are cross-sectional views (No. 2) showing a method of manufacturing the module according to the first embodiment.
  • 3 (a) and 3 (b) are cross-sectional views (No. 3) showing a method of manufacturing the module according to the first embodiment.
  • 4 (a) and 4 (b) are cross-sectional views (No. 4) showing a method of manufacturing the module according to the first embodiment.
  • FIG. 5 is a cross-sectional view (No. 5) showing a method of manufacturing the module according to the first embodiment.
  • FIG. 6 is a cross-sectional view (No.
  • FIG. 7 is a cross-sectional view (No. 7) showing a method of manufacturing the module according to the first embodiment.
  • 8 (a) and 8 (b) are plan views showing a method of manufacturing the module according to the first embodiment.
  • FIG. 9 is a plan view of the module according to the first embodiment.
  • FIG. 10 is a plan view of the module according to the first embodiment.
  • FIG. 11 is a cross-sectional view showing a method of manufacturing a module according to the first modification of the first embodiment.
  • 12 (a) and 12 (b) are plan views showing a method of manufacturing a module according to a modification 1 of the first embodiment.
  • FIG. 13 (a) and 13 (b) are plan views showing a method of manufacturing a module according to a modification 2 of the first embodiment.
  • FIG. 14 is a cross-sectional view showing a method of manufacturing a module according to a modification 3 of the first embodiment.
  • 15 (a) and 15 (b) are plan views showing a method of manufacturing a module according to a modification 3 of the first embodiment.
  • FIG. 16 is a cross-sectional view showing a method of manufacturing a module according to a modification 4 of the first embodiment.
  • 17 (a) and 17 (b) are plan views showing a method of manufacturing a module according to a modification 4 of the first embodiment.
  • 18 (a) and 18 (b) are cross-sectional views showing a method of manufacturing the module according to the second embodiment.
  • FIG. 19 (a) and 19 (b) are a cross-sectional view and a plan view showing a method of manufacturing the module according to the second embodiment.
  • FIG. 20 is a plan view of the module according to the second embodiment.
  • FIG. 21 is a plan view showing a method of manufacturing a module according to the first modification of the second embodiment.
  • 22 (a) and 22 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 2 of the second embodiment.
  • 23 (a) and 23 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 3 of the second embodiment.
  • FIG. 8A illustrates the insulating layer 10, the wirings 80a to 80c, and the annular metal layer 86.
  • FIG. 8B illustrates the insulating layer 10, the electronic components 40a, 40b, 42, and the annular metal layer 48. In the cross-sectional view, the electronic components 40 and the wiring 80 are shown, but in the plan view, the electronic components 40a and 40b and the wirings 80a to 80c are shown.
  • the adhesive 16 is applied to the lower surface of the insulating layer 10.
  • the insulating layer 10 is a resin layer such as a polyimide layer and has flexibility.
  • the thickness of the insulating layer 10 is, for example, 7.5 ⁇ m to 125 ⁇ m.
  • the adhesive 16 is a resin adhesive such as an epoxy resin adhesive.
  • the adhesive 16 is applied, for example, by using a spin coating method, a spray coating method, an inkjet method, or a screen printing method.
  • the thickness of the adhesive 16 is, for example, 5 ⁇ m to 50 ⁇ m after curing.
  • the insulating layer 10 on which the adhesive 16 is formed in advance may be prepared.
  • the adhesive 16 may be selectively applied corresponding to the regions where the electronic components 40 and 42, the conductive block 46 and the annular metal layer 48, which will be described later, are arranged.
  • the adhesive 16 is preferably a resin material having excellent heat resistance and low dielectric properties.
  • a through hole 12 penetrating the insulating layer 10 and the adhesive 16 is formed.
  • the through hole 12 is formed by, for example, irradiating a laser beam.
  • the size of the through hole 12 is, for example, 30 ⁇ m to 500 ⁇ m.
  • annular metal layer 48 is provided with holes 72a and 72b diagonally in a plane (see, for example, FIG. 8B). Terminals 51 and 52 are provided on the upper surface of the electronic component 40, and terminals 53 are provided on the lower surface of the electronic component 40. Terminals 54 and 56 are provided on the upper surface of the electronic component 42.
  • the electronic component 40 is, for example, a vertical transistor, and is a transistor such as an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or a FET such as a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • a semiconductor material such as Si, GaN or SiC is used for the transistor.
  • the electronic component 40 is, for example, a bare chip or a package in which a bare chip is sealed and mounted.
  • the package on which the bare chip is mounted is a package such as WLP (Wafer Level Package) or SIP (Single Inline Package).
  • the electronic component 42 is, for example, an integrated circuit, a controller that controls the electronic component 40, and is, for example, a bare chip or a package on which a bare chip is mounted.
  • Terminals 51 to 54 and 56 are electrodes of electronic components 40 and 42, and are made of a metal such as Cu (copper), Au (gold), Ag (silver) or Al (aluminum), or one of them as a main material. It is a pad.
  • a gate terminal and a source terminal are provided on the upper surface, and a drain terminal (or a source terminal) is provided on the lower surface.
  • the conductive block 46 and the annular metal layer 48 are Cu or a metal layer containing Cu as a main material, and are preferably a metal block or a plate having a rectangular cross section.
  • the adhesive 16 is cured to fix and bond the electronic components 40 and 42, the conductive block 46, the annular metal layer 48, and the insulating layer 10.
  • the heat treatment is carried out at a temperature of, for example, 150 ° C to 300 ° C.
  • the terminals 51 to 54 and 56 are exposed in the through hole 12.
  • a metal layer 14 is formed on the upper surface of the insulating layer 10 and the inner surface of the through hole 12.
  • a seed layer is formed on the upper surface of the insulating layer 10 and the inner surface of the through hole 12.
  • the seed layer is formed by, for example, a sputtering method or an electroless plating method.
  • a plating layer is formed on the upper surface of the seed layer.
  • the plating layer is, for example, Cu or a metal layer containing Cu as a main material.
  • the metal layer 14 is formed by the seed layer and the plating layer.
  • the thickness of the metal layer 14 is, for example, several ⁇ m to 125 ⁇ m, and is the thickness at which the through hole 12 is embedded.
  • a bonding layer 28 is provided on the upper surface of the metal layer 14.
  • the bonding layer 28 is a so-called conductive paste in which the resin paste contains a brazing material, metal particles such as Cu or Ag, metal powder, and the like.
  • a support substrate having a metal layer 24 formed on one main surface of the insulating layer 20 is separately prepared.
  • the insulating layer 20 is a resin layer such as a polyimide layer.
  • the metal layer 24 is, for example, a layer containing Cu or Cu as a main material.
  • the support substrate is, for example, a copper-clad laminate (CCL: Copper Clad Laminate) substrate, and the metal layer 24 is a rolled or electroplated metal layer.
  • the holes 70a and 70b are provided in the metal layer 24 diagonally on a flat surface (see FIG. 8A).
  • the thickness of the insulating layer 10 is, for example, 7 ⁇ m to 125 ⁇ m, and the thickness of the metal layer 24 is, for example, 50 ⁇ m to 300 ⁇ m.
  • the metal layer 24 may be formed on the entire surface of the insulating layer 20, and then the metal layer 24 may be patterned by using a photolithography method and an etching method.
  • the metal layer 24 formed by machining such as pressing may be attached to the insulating layer 20.
  • An adhesive or the like may be provided between the insulating layer 20 and the metal layer 24.
  • the adhesive may be formed on the entire surface of the insulating layer 20, or may be selectively formed at a location where the metal layer 24 is provided.
  • a through hole 22 penetrating the insulating layer 20 is formed.
  • the method for forming the through hole 22 is the same as the method for forming the through hole 12 in FIG. 1 (b).
  • the metal layer 26 is formed on the upper surface of the insulating layer 20 and in the through hole 22.
  • the metal layer 26 is formed by a plating method in the same manner as the method for forming the metal layer 14 in FIG. 2 (a). As a result, the metal layer 26 is connected to the metal layer 24 via the through hole 22.
  • the lower surface of the metal layer 24 is brought into contact with the upper surface of the bonding layer 28 of FIG. 2B.
  • the metal layers 14 and 24 are thermally, mechanically and electrically joined.
  • the thickness of the bonding layer 28 is, for example, 5 ⁇ m to 50 ⁇ m after firing.
  • the thick wiring 80 and the annular metal layer 86 are formed by the metal layer 14, the bonding layer 28, and the metal layer 24.
  • the annular metal layer 86 is provided with holes 70b.
  • the terminals 51 and 56 are electrically connected to the metal layer 26 by the wiring 80.
  • the terminals 52 and 54 are electrically connected by wiring 82.
  • the annular metal layer 86 is provided on the periphery of the insulating layers 10 and 20 and supports the insulating layers 10 and 20. A space 98 surrounded by the insulating layers 10 and 20 and the annular metal layer 86 is formed.
  • the resin 60 is formed in the space 98 between the insulating layers 10 and 20.
  • a transfer molding method, an injection method or a compression method is used to form the resin 60.
  • the resin 60 is introduced from the hole 70a as shown by the arrow 76a and is filled in the space 98 as shown by the dotted lines 77a to 77c. Air escapes from the hole 70b as shown by the arrow 76b.
  • metal layers 34 and 36 are provided on the upper surface and the lower surface of the insulating substrate 30.
  • the insulating substrate 30 is, for example, a ceramic substrate.
  • the metal layers 34 and 36 are, for example, Cu layers.
  • the insulating substrate 30, the metal layers 34 and 36 function as a heat sink that releases heat from the electronic component 40.
  • the bonding layer 38 is applied to the upper surface of the metal layer 34.
  • the material of the bonding layer 38 is, for example, Ag paste, Cu paste or brazing material.
  • the upper surface of the bonding layer 38 is brought into contact with the lower surfaces of the electronic component 40, the conductive block 46, and the annular metal layer 48.
  • the joint layer 38 is fired by heat treatment.
  • the electronic component 40, the conductive block 46, the annular metal layer 48, and the metal layer 24 are thermally, mechanically, and electrically joined.
  • the thickness of the bonding layer 28 is, for example, 5 ⁇ m to 50 ⁇ m after firing.
  • the terminal 53 is electrically connected to the metal layer 26 via the metal layer 34, the conductive block 46, and the wiring 80.
  • the current flows from the upper surface to the lower surface of the electronic component 40, from the lower surface to the metal layer 26 on the upper surface of the module via the metal layer 34, the conductive block 46, and the wiring 80.
  • a space 99 surrounded by the insulating layer 10, the insulating substrate 30, and the annular metal layer 48 is formed.
  • the resin 62 is formed in the space 99 between the insulating layer 10 and the insulating substrate 30.
  • a transfer molding method, an injection method or a compression method is used to form the resin 62.
  • the resin 62 is introduced from the hole 72a as shown by the arrow 78a.
  • the resin 62 is diagonally filled with the space 99 between the insulating layer 10 and the insulating substrate 30, as shown by the dotted lines 79a to 79c.
  • the air in the space 99 escapes from the hole 72b.
  • the resin 62 is filled in the space 99, the resin 62 is cured.
  • the electronic components 40a, 40b and 42 are sealed.
  • the resin 62 is, for example, a thermosetting resin or a thermoplastic resin.
  • the width of the annular metal layer 86 in the X direction and the Y direction is, for example, 100 ⁇ m or 5000 ⁇ m, and the thickness of the annular metal layer 86 in the Z direction is, for example, 30 ⁇ m to 300 ⁇ m.
  • the widths of the holes 70a and 70b in the X and Y directions are, for example, 100 ⁇ m to 500 ⁇ m.
  • the holes 70a and 70b may be provided in at least a part of the annular metal layer 86 in the Z direction.
  • the width of the annular metal layer 48 in the X direction and the Y direction is, for example, 100 ⁇ m to 5000 ⁇ m, and the thickness of the annular metal layer 48 in the Z direction is, for example, 50 ⁇ m to 1000 ⁇ m.
  • the widths of the holes 72a and 72b in the X and Y directions are, for example, 100 ⁇ m to 5000 ⁇ m.
  • the holes 72a and 72b may be provided in at least a part of the annular metal layer 48 in the Z direction.
  • FIG. 9 and 10 are plan views of the module according to the first embodiment.
  • FIG. 9 mainly shows the portion of the upper layer provided in the insulating layer 20 of FIG. 7, and shows the through hole 22, the metal layers 24 and 26.
  • FIG. 10 mainly shows a lower layer portion provided on the insulating layer 10 side, and includes a through hole 12, a metal layer 14, electronic components 40a, 40b, 42, terminals 51a, 51b, 52a, 52b, 54, 56, and wiring. 80a to 80c, 82a and 82b are illustrated.
  • terminals 51a and 52a are provided on the upper surface of the electronic component 40a, and terminals 51b and 52b are provided on the upper surface of the electronic component 40b.
  • the electronic components 40a and 40b are, for example, power semiconductor elements and vertical transistors.
  • the terminals 51a and 51b are source terminals, and the terminals 52a and 52b are gate terminals.
  • Terminals 54 and 56 are provided on the upper surface of the electronic component 42.
  • the electronic component 42 has a control circuit that controls a transistor.
  • the control circuit outputs a gate signal to the gate terminal of the transistor based on the control signal from the outside.
  • the terminal 54 is a terminal that outputs a transistor gate signal to the terminals 52a and 52b.
  • the terminal 56 is a terminal that receives a control signal from the outside.
  • the metal layer 26 forms a source pad Ps, a drain pad Pd, and a control pad Pg.
  • the terminals 51a and 51b are electrically connected to the wiring 80a via the through hole 12.
  • the wiring 80a is electrically connected to the source pad Ps via the through hole 22.
  • the terminals 52a and 52b are electrically connected to the terminal 54 via the through hole 12 and the wiring 82a.
  • the terminal 56 is electrically connected to the control pad Pg via the through holes 12, 22 and the wirings 80b and 82b.
  • the terminals 53 provided on the lower surfaces of the electronic components 40a and 40b are electrically connected to the drain pad Pd via the bonding layer 38, the metal layer 34, the conductive block 46, and the wiring 80c.
  • a ground potential is supplied to the drain pad Pd.
  • the wiring connected to the source terminal may have a large planar dimension but is required to be thick, and the wiring connected to the gate terminal may be thin but required to have a small planar dimension.
  • the wiring 80a is a wiring for supplying a current between the source pad Ps and the terminals 51a and 51b which are the source terminals.
  • the wiring 80c is a wiring for supplying a current between the drain pad Pd and the terminal 53 which is a drain terminal.
  • the wiring 82a is a wiring for supplying a control voltage or a control current between the terminal 54 which is a control terminal of the control circuit and the terminals 52a and 52b which are gate terminals.
  • the wiring 80b is a wiring that connects the control pad Pg and the terminal 56, and a relatively large current flows through the wiring 80b.
  • the wiring 80a connected to the source terminal, the wiring 80c connected to the drain terminal, and the wiring 80b connected to the terminal 56 are formed by the metal layers 14 and 24, and the wiring 82a connected to the gate terminal. Is formed only by the metal layer 14. Thereby, the thick wiring 80a to 80c and the thin wiring 82 can be formed by a simple process.
  • the annular metal layers 48 and 86 can improve heat dissipation from the electronic components 40 and 42. Moreover, the strength can be improved.
  • Resins 60 and 62 can be formed in the cyclic metal layers 48 and 86 by providing holes 70a, 70b, 72a and 72b for injecting or discharging the resin in the annular metal layers 48 and 86.
  • the holes 70a and 70b are provided on opposite sides of the annular metal layer 86, and are provided diagonally or in the vicinity of the annular metal layer 86.
  • the holes 72a and 72b are provided on opposite sides of the annular metal layer 48, and are provided diagonally or in the vicinity of the annular metal layer 48.
  • FIGS. 12A and 12B are plan views showing a method of manufacturing the module according to the first modification of the first embodiment. is there.
  • the annular metal layer 86 is not provided.
  • a mold is used between the insulating layers 10 and 20 to form the resin 60.
  • the resin 62 is introduced from the hole 72a as shown by the arrow 78a.
  • Other configurations are the same as those in the first embodiment, and the description thereof will be omitted. Either one of the annular metal layers 48 and 86 may not be provided as in the first modification of the first embodiment.
  • FIG. 13A and 13 (b) are plan views showing a method of manufacturing a module according to a modification 2 of the first embodiment.
  • the holes 70c are provided on the sides of the annular metal layer 86 where the holes 70a and 70b are not provided.
  • the resin 60 is introduced into the space 98 from the hole 70a as shown by the arrow 76a, the air in the space 98 can be evacuated from the hole 70c as shown by the arrow 76c.
  • holes 72c are provided on the sides of the annular metal layer 48 where the holes 72a and 72b are not provided.
  • the resin 62 is introduced into the space 99 from the hole 72a as shown by the arrow 78a, the air in the space 99 can be evacuated from the hole 72c as shown by the arrow 78c.
  • Other configurations are the same as those in the first embodiment, and the description thereof will be omitted.
  • the holes 70a to 70c and 72a to 72c are provided on each side, air can be evacuated from the spaces 98 and 99.
  • the holes 70c and 72c may be provided at arbitrary locations.
  • FIG. 14 is a cross-sectional view showing a method of manufacturing a module according to a modification 3 of the first embodiment
  • FIGS. 15 (a) and 15 (b) show a method of manufacturing a module according to the third modification of the first embodiment. It is a plan view.
  • the annular metal layer 86 is not provided.
  • a hole 74 is provided in the insulating layer 10.
  • the annular metal layer 48 is not provided with holes 72a and 72b. The position of the hole 74 in FIG. 14 does not correspond to the position of the hole in FIGS. 15 (a) and 15 (b).
  • the insulating layers 10 and 20 are covered with the mold 90.
  • the resin is introduced from the introduction hole 91a of the mold 90 as shown by the arrow 92a. Air escapes from the lead-out hole 91b of the mold 90 as shown by the arrow 92b.
  • the resin is introduced from the space above the insulating layer 10 to the space below it through the holes 74 of the insulating layer 10 as shown by the arrow 93a.
  • the inside of the cyclic metal layer 48 can be filled with the resin 62 even if the annular metal layer 48 is not provided with holes.
  • At least one of the holes 74 may function as a hole for venting air from the space 99.
  • Other configurations are the same as those in the first embodiment, and the description thereof will be omitted.
  • FIG. 16 is a cross-sectional view showing a method of manufacturing a module according to a modified example 4 of the first embodiment
  • FIGS. 17 (a) and 17 (b) show a method of manufacturing a module according to the modified example 4 of the first embodiment. It is a plan view.
  • the annular metal layer 86 is provided with holes 70a and 70b.
  • a hole 74 is provided in the insulating layer 10.
  • the annular metal layer 48 is not provided with holes.
  • FIG. 18 (a) to 19 (a) are cross-sectional views showing a method of manufacturing the module according to the second embodiment.
  • FIG. 19B is a plan view showing a method of manufacturing the module according to the second embodiment.
  • FIG. 19B illustrates the insulating layer 10, the wirings 80a to 80c and the annular metal layer 86.
  • the insulating layers 10 and 20 are prepared in the same manner as in FIGS. 2 (b) and 3 (b).
  • the conductive block and the annular metal layer are not provided on the lower surface of the insulating layer 10.
  • No terminal is provided on the lower surface of the electronic component 40.
  • the electronic component 40 is a horizontal transistor, the source terminal, drain terminal, and gate terminal are all provided on the upper surface.
  • the wiring 80 and the annular metal layer 86 include metal layers 24 and 26, respectively, and the wiring 82 includes a metal layer 14 and no metal layer 24.
  • the resin 60 is formed in the space 98 between the insulating layers 10 and 20 as in FIG. 4 (b).
  • a transfer molding method, an injection method or a compression method is used to form the resin 60.
  • the resin 60 is introduced from the hole 70a as shown by the arrow 76a.
  • the resin 60 is diagonally filled with the space 98 between the insulating layers 10 and 20 as shown by the dotted lines 77a to 77c.
  • the air in the space 98 escapes from the hole 70b.
  • the resin 60 is filled in the space 98, the resin 60 is cured. As a result, the module according to the second embodiment is completed.
  • FIG. 20 is a plan view of the module according to the second embodiment.
  • FIG. 20 illustrates through holes 12, metal layers 14, electronic components 40a, 40b, 42, terminals 51a to 51d, 52a, 54, 56, wirings 80a to 80c, 82a, 82b and an annular metal layer 86.
  • terminals 51a, 51c and 52a are provided on the upper surface of the electronic component 40a, and terminals 51b, 51d and 52b are provided on the upper surface of the electronic component 40b.
  • the electronic components 40a and 40b are, for example, power semiconductor elements and transistors.
  • the terminals 51a and 51b are source terminals, the terminals 51c and 51d are drain terminals, and the terminals 52a and 52b are gate terminals.
  • the terminals 51a and 51b are electrically connected by wiring 80a, and are electrically connected to a source pad (not shown) on the upper surface of the insulating layer 20.
  • the terminals 51c and 51d are electrically connected by wiring 80c, and are electrically connected to a drain pad (not shown) on the upper surface of the insulating layer 20.
  • the terminals 52a and 52b are electrically connected to the terminal 54 by the wiring 82a.
  • Other configurations are the same as those in the first embodiment, and the description thereof will be omitted.
  • the source terminal and the drain terminal may be provided on the upper surface of the electronic component 40.
  • the cyclic metal layer 86 may be provided, and the annular metal layer 48 and the resin 62 may not be provided.
  • FIG. 21 is a plan view showing a method of manufacturing a module according to the first modification of the second embodiment.
  • the holes 70c are provided on the sides of the annular metal layer 86 where the holes 70a and 70b are not provided.
  • the resin 60 is introduced from the holes 70a as shown by the arrow 76a, the air in the space 98 is released from the holes 70b and 70c as shown by the arrows 76b and 76c. Therefore, the resin 60 can be easily introduced into the space 98.
  • Other configurations are the same as those in the second embodiment, and the description thereof will be omitted.
  • [Modification 2 of Example 2] 22 (a) and 22 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 2 of the second embodiment.
  • the annular metal layer 86 is not provided with holes 70a and 70b.
  • a hole 74 is provided in the insulating layer 10.
  • the resin 60 is introduced into the space 98 from the hole 74a as shown by the arrow 76a. Air in the space 98 escapes from the hole 74b as shown by the arrow 76b.
  • Other configurations are the same as those in the second embodiment, and the description thereof will be omitted.
  • the insulating layer 10 may be provided with a hole 74a for introducing the resin 60.
  • FIGS. 23 (a) and 23 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 3 of the second embodiment.
  • the annular metal layer 86 is provided with holes 70a and 70b
  • the insulating layer 10 is provided with holes 74.
  • the resin 60 is introduced from the holes 70a as shown by the arrows 76a
  • the air in the space 98 escapes from the holes 70b and 74 as shown by the arrows 76b and 76c.
  • Other configurations are the same as those in the second embodiment, and the description thereof will be omitted.
  • the hole 74 provided in the insulating layer 10 may be used for air release.
  • the electronic components 40 and 42 are mounted on the lower surface of the insulating layer 10 (first insulating layer) and penetrate the upper surface of the insulating layer 10.
  • Wiring 80 and 82 that connect to the electronic components 40 and 42 via the hole 12 (first through hole) are provided.
  • An insulating layer 20 (first layer) is provided on the wirings 80 and 82.
  • the annular metal layer 86 (first annular metal layer) surrounds the wirings 80 and 82 between the insulating layer 10 and the insulating layer 20.
  • the resin 60 (first resin) is filled in the space 98 (first space) surrounded by the insulating layer 10, the insulating layer 20, and the annular metal layer 86, and seals the wirings 80 and 82.
  • the insulating substrate 30 is provided under the electronic components 40 and 42.
  • the annular metal layer 48 surrounds the electronic components 40 and 42 between the insulating layer 10 and the insulating substrate 30.
  • the resin 62 fills the space 99 surrounded by the insulating layer 10, the insulating substrate 30, and the annular metal layer 48, and seals the electronic components 40 and 42.
  • the heat generated in the electronic components 40 and 42 (when the electronic component 40 is a power semiconductor, for example, 250 ° C.) is released to the outside by the cyclic metal layer 48 or 86.
  • the temperature in the vicinity of the electronic components 40 and 42 is lowered, so that other electronic components can be mounted in the vicinity of the electronic components 40 and 42.
  • the strength can be increased as compared with the resin 60 or 62 alone.
  • thick wirings 80b and 80c and a conductive block 46 are provided between the electronic component 40 and the annular metal layer 48 or 86.
  • the heat dissipation of the heat generated in the electronic component 40 can be improved.
  • At least one of the insulating layer 10 and the annular metal layer 48 or 86 is provided with holes 70a to 70c, 72a to 72c and 74 (first holes) connecting (that is, communicating with) the outside and the space 98 or 99.
  • the insulating layers 10, 20 (or the insulating substrate 30) and the annular metal layer 86 (or 48) are passed through the holes 70a to 70c, 72a to 72c and 74 of the structure having the insulating layer 10 and the annular metal layer 48 or 86.
  • the holes 70a and 70b are provided diagonally to or near the annular metal layer 86, and the holes 72a and 72b are provided diagonally or near the annular metal layer 48. As a result, as shown in FIGS. 8 and 9, a viscous resin can be filled in the space.
  • the insulating substrate 30 (second layer) is provided under the electronic components 40 and 42.
  • the annular metal layer 48 (second annular metal layer) surrounds the electronic components 40 and 42 between the insulating layer 10 and the insulating substrate 30.
  • the resin 62 (second resin) is filled in a space 99 (second space) surrounded by the insulating layer 10, the insulating substrate 30, and the annular metal layer 48, and seals the electronic components 40 and 42.
  • the heat generated in the electronic components 40 and 42 is efficiently released to the outside by both the annular metal layers 48 and 86.
  • the strength can be further increased by providing both the annular metal layers 48 and 86.
  • the annular metal layer 86 is provided with holes 70a and 70b (first hole), and the insulating layer 10 is provided with a hole 74 (second hole).
  • the annular metal layer 48 is not provided with holes 72a and 72b.
  • the space 98 can be filled with the resin 60 through the holes 70a and 70b, and the resin 62 can be filled in the space 99 in the annular metal layer 48 from the space 98 through the holes 74.
  • the annular metal layer 86 is provided with holes 70a and 70b, the insulating layer 10 is not provided with holes 74, and the annular metal layer 48 is provided with holes 72a and 72b. There is. Thereby, the resins 60 and 62 can be formed by another step.
  • An insulating layer 20 (second insulating layer) is provided on the wiring 80, and a metal layer 26 is provided on the upper surface of the insulating layer 20 as an electrode and is connected to the wiring 80 via a through hole 22 (second through hole). As a result, the heat of the electronic component 40 can be released through the wiring 80.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

Provided is a module which comprises: a first insulating layer; an electronic component that is mounted on a lower surface of the first insulating layer; wiring that is formed on an upper surface of the first insulating layer and is connected to the electronic component via a first through hole which passes through the first insulating layer; a first layer that is formed either below the electronic component or above the wiring; a first annular metal layer that surrounds the corresponding one of either the electronic component or the wiring between the first insulating layer and the first layer; and a first resin that fills a first space surrounded by the first insulating layer, the first layer, and the first annular metal layer and seals the corresponding one of either the electronic component or the wiring. A first hole that connects the first space with the outside is formed in at least one of the first insulating layer and the first annular metal layer.　

Description

モジュールおよびその製造方法Module and its manufacturing method
　本発明はモジュールおよびその製造方法に関し、例えば電子部品を搭載するモジュールおよびその製造方法に関する。 The present invention relates to a module and a manufacturing method thereof, for example, a module for mounting an electronic component and a manufacturing method thereof.
　パワー半導体デバイス等の電子部品が搭載されたモジュールにおいて、電子部品に接続される配線を厚くすることが知られている（例えば特許文献１）。 It is known that in a module on which an electronic component such as a power semiconductor device is mounted, the wiring connected to the electronic component is thickened (for example, Patent Document 1).
米国特許出願公開第２００７／０２３５８１０号明細書U.S. Patent Application Publication No. 2007/0235810
　配線を介し電子部品に大電流を供給すると電子部品が発熱する。そこで、効率的に放熱する構造が求められている。 When a large current is supplied to an electronic component via wiring, the electronic component generates heat. Therefore, there is a demand for a structure that efficiently dissipates heat.
　本発明は、上記課題に鑑みなされたものであり、放熱性を向上させることを目的とする。 The present invention has been made in view of the above problems, and an object of the present invention is to improve heat dissipation.
　本発明は、第１絶縁層と、前記第１絶縁層の下面に搭載された電子部品と、前記第１絶縁層の上面に設けられ、前記第１絶縁層を貫通する第１貫通孔を介し前記電子部品と接続する配線と、前記電子部品下および前記配線上のいずれか一方に設けられた第１層と、前記第１絶縁層と前記第１層との間において対応する前記電子部品および前記配線のいずれか一方を囲む第１環状金属層と、前記第１絶縁層、前記第１層および前記第１環状金属層に囲まれた第１空間に充填され前記対応する前記電子部品および前記配線のいずれか一方を封止する第１樹脂と、を備え、前記第１絶縁層および前記第１環状金属層の少なくとも一方に外部と前記第１空間とをつなぐ第１孔が設けられたモジュールである。 The present invention is provided through a first insulating layer, an electronic component mounted on the lower surface of the first insulating layer, and a first through hole provided on the upper surface of the first insulating layer and penetrating the first insulating layer. The wiring connected to the electronic component, the first layer provided under or on the electronic component, and the corresponding electronic component between the first insulating layer and the first layer. The corresponding electronic component and the corresponding electronic component are filled in a first space surrounded by a first annular metal layer surrounding any one of the wirings, the first insulating layer, the first layer and the first annular metal layer. A module comprising a first resin for sealing one of the wirings, and having a first hole connecting the outside and the first space on at least one of the first insulating layer and the first annular metal layer. Is.
　上記構成において、前記第１孔は前記第１環状金属層に設けられている構成とすることができる。 In the above configuration, the first hole may be provided in the first annular metal layer.
　上記構成において、前記第１孔は前記第１環状金属層の対角またはその近傍に設けられている構成とすることができる。 In the above configuration, the first hole may be provided diagonally or in the vicinity of the first annular metal layer.
　上記構成において、前記電子部品下および前記配線上のうち前記いずれか一方でない他方に設けられた第２層と、前記第１絶縁層と前記第２層との間において前記電子部品および前記配線の他方を囲む第２環状金属層と、前記第１絶縁層、前記第２層および前記第２環状金属層に囲まれた第２空間に充填され前記電子部品および前記配線の他方を封止する第２樹脂と、を備える構成とすることができる。 In the above configuration, the electronic component and the wiring are provided between the second layer provided under the electronic component and on the wiring, whichever is not one of the above, and between the first insulating layer and the second layer. A second space surrounded by a second annular metal layer surrounding the other, the first insulating layer, the second layer, and the second annular metal layer is filled to seal the other of the electronic component and the wiring. It can be configured to include two resins.
　上記構成において、前記第１孔は前記第１環状金属層に設けられ、前記第１絶縁層に前記第１空間と前記第２空間とをつなぐ第２孔が設けられ、前記第２環状金属層に孔は設けられていない構成とすることができる。 In the above configuration, the first hole is provided in the first annular metal layer, the first insulating layer is provided with a second hole connecting the first space and the second space, and the second annular metal layer is provided. The structure may be such that no holes are provided in the.
　上記構成において、前記第１孔は、前記第１環状金属層に設けられ、前記第１絶縁層および前記第１層には設けられておらず、前記第２環状金属層に外部と前記第２空間とをつなぐ第２孔が設けられている構成とすることができる。 In the above configuration, the first hole is provided in the first annular metal layer, is not provided in the first insulating layer and the first layer, and is externally provided in the second annular metal layer and the second. The configuration may be such that a second hole connecting the space is provided.
　上記構成において、前記第１層は前記配線上に設けられた第２絶縁層であり、前記第２絶縁層の上面に設けられ、前記第２絶縁層を貫通する第２貫通孔を介し前記配線と接続する電極を備える構成とすることができる。 In the above configuration, the first layer is a second insulating layer provided on the wiring, and the wiring is provided on the upper surface of the second insulating layer and is provided through a second through hole penetrating the second insulating layer. It can be configured to include an electrode to be connected to.
　本発明は、第１絶縁層と、前記第１絶縁層の下面に搭載された電子部品と、前記第１絶縁層の上面に設けられ、前記第１絶縁層を貫通する第１貫通孔を介し前記電子部品と接続する配線と、前記電子部品下および前記配線上のいずれか一方に設けられた第１層と、前記第１絶縁層と前記第１層との間において対応する前記電子部品および前記配線のいずれか一方を囲む第１環状金属層と、を備え、前記第１絶縁層、前記第１層および前記第１環状金属層の少なくとも１つに、外部と、前記第１絶縁層、前記第１層および前記第１環状金属層に囲まれた第１空間と、をつなぐ第１孔が設けられた構造を形成する工程と、
　前記構造の前記第１孔を介し、前記第１空間に前記対応する前記電子部品および前記配線のいずれか一方を封止する樹脂を充填する工程と、を含むモジュールの製造方法。 The present invention is provided through a first insulating layer, an electronic component mounted on the lower surface of the first insulating layer, and a first through hole provided on the upper surface of the first insulating layer and penetrating the first insulating layer. The wiring connected to the electronic component, the first layer provided under or on the electronic component, and the corresponding electronic component between the first insulating layer and the first layer. A first annular metal layer that surrounds any one of the wirings is provided, and at least one of the first insulating layer, the first layer, and the first annular metal layer is provided with an external layer and the first insulating layer. A step of forming a structure provided with a first hole connecting the first layer and the first space surrounded by the first annular metal layer.
A method for manufacturing a module, comprising a step of filling the first space with a resin for sealing one of the corresponding electronic component and the wiring through the first hole of the structure.
　上記構成において、前記構造は、前記電子部品下および前記配線上の他方に設けられた第２層と、前記第１絶縁層と前記第２層との間において前記電子部品および前記配線の他方を囲む第２環状金属層と、を備え、前記第１孔は前記第１環状金属層に設けられ、前記第１絶縁層に、前記第１空間と、前記第１絶縁層、前記第２層および前記第２環状金属層に囲まれた第２空間と、をつなぐ第２孔が設けられ、前記第２環状金属層に孔は設けられておらず、前記樹脂を充填する工程は、前記第１孔を介し前記第１空間に前記樹脂を充填し、前記第２孔を介し前記第１空間から前記第２空間に前記樹脂を充填する工程を含む構成とすることができる。 In the above configuration, the structure comprises a second layer provided under the electronic component and on the other side of the wiring, and the other of the electronic component and the wiring between the first insulating layer and the second layer. A second annular metal layer that surrounds the first hole is provided in the first annular metal layer, and the first insulating layer is provided with the first space, the first insulating layer, the second layer, and the like. A second hole connecting the second space surrounded by the second annular metal layer is provided, the second annular metal layer is not provided with a hole, and the step of filling the resin is the first step. The configuration may include a step of filling the first space with the resin through the holes and filling the resin from the first space to the second space through the second holes.
　本発明によれば、放熱性を向上させることができる。 According to the present invention, heat dissipation can be improved.
図１（ａ）から図１（ｃ）は、実施例１に係るモジュールの製造方法を示す断面図（その１）である。1 (a) to 1 (c) are cross-sectional views (No. 1) showing a method of manufacturing a module according to the first embodiment. 図２（ａ）および図２（ｂ）は、実施例１に係るモジュールの製造方法を示す断面図（その２）である。2 (a) and 2 (b) are cross-sectional views (No. 2) showing a method of manufacturing the module according to the first embodiment. 図３（ａ）および図３（ｂ）は、実施例１に係るモジュールの製造方法を示す断面図（その３）である。3 (a) and 3 (b) are cross-sectional views (No. 3) showing a method of manufacturing the module according to the first embodiment. 図４（ａ）および図４（ｂ）は、実施例１に係るモジュールの製造方法を示す断面図（その４）である。4 (a) and 4 (b) are cross-sectional views (No. 4) showing a method of manufacturing the module according to the first embodiment. 図５は、実施例１に係るモジュールの製造方法を示す断面図（その５）である。FIG. 5 is a cross-sectional view (No. 5) showing a method of manufacturing the module according to the first embodiment. 図６は、実施例１に係るモジュールの製造方法を示す断面図（その６）である。FIG. 6 is a cross-sectional view (No. 6) showing a method of manufacturing the module according to the first embodiment. 図７は、実施例１に係るモジュールの製造方法を示す断面図（その７）である。FIG. 7 is a cross-sectional view (No. 7) showing a method of manufacturing the module according to the first embodiment. 図８（ａ）および図８（ｂ）は、実施例１に係るモジュールの製造方法を示す平面図である。8 (a) and 8 (b) are plan views showing a method of manufacturing the module according to the first embodiment. 図９は、実施例１に係るモジュールの平面図である。FIG. 9 is a plan view of the module according to the first embodiment. 図１０は、実施例１に係るモジュールの平面図である。FIG. 10 is a plan view of the module according to the first embodiment. 図１１は、実施例１の変形例１に係るモジュールの製造方法を示す断面図である。FIG. 11 is a cross-sectional view showing a method of manufacturing a module according to the first modification of the first embodiment. 図１２（ａ）および図１２（ｂ）は、実施例１の変形例１に係るモジュールの製造方法を示す平面図である。12 (a) and 12 (b) are plan views showing a method of manufacturing a module according to a modification 1 of the first embodiment. 図１３（ａ）および図１３（ｂ）は、実施例１の変形例２に係るモジュールの製造方法を示す平面図である。13 (a) and 13 (b) are plan views showing a method of manufacturing a module according to a modification 2 of the first embodiment. 図１４は、実施例１の変形例３に係るモジュールの製造方法を示す断面図である。FIG. 14 is a cross-sectional view showing a method of manufacturing a module according to a modification 3 of the first embodiment. 図１５（ａ）および図１５（ｂ）は、実施例１の変形例３に係るモジュールの製造方法を示す平面図である。15 (a) and 15 (b) are plan views showing a method of manufacturing a module according to a modification 3 of the first embodiment. 図１６は、実施例１の変形例４に係るモジュールの製造方法を示す断面図である。FIG. 16 is a cross-sectional view showing a method of manufacturing a module according to a modification 4 of the first embodiment. 図１７（ａ）および図１７（ｂ）は、実施例１の変形例４に係るモジュールの製造方法を示す平面図である。17 (a) and 17 (b) are plan views showing a method of manufacturing a module according to a modification 4 of the first embodiment. 図１８（ａ）および図１８（ｂ）は、実施例２に係るモジュールの製造方法を示す断面図である。18 (a) and 18 (b) are cross-sectional views showing a method of manufacturing the module according to the second embodiment. 図１９（ａ）および図１９（ｂ）は、実施例２に係るモジュールの製造方法を示す断面図および平面図である。19 (a) and 19 (b) are a cross-sectional view and a plan view showing a method of manufacturing the module according to the second embodiment. 図２０は、実施例２に係るモジュールの平面図である。FIG. 20 is a plan view of the module according to the second embodiment. 図２１は、実施例２の変形例１に係るモジュールの製造方法を示す平面図である。FIG. 21 is a plan view showing a method of manufacturing a module according to the first modification of the second embodiment. 図２２（ａ）および図２２（ｂ）は、実施例２の変形例２に係るモジュールの製造方法を示す断面図および平面図である。22 (a) and 22 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 2 of the second embodiment. 図２３（ａ）および図２３（ｂ）は、実施例２の変形例３に係るモジュールの製造方法を示す断面図および平面図である。23 (a) and 23 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 3 of the second embodiment.
　以下、図面を参照し本発明の実施例について説明する。 Hereinafter, examples of the present invention will be described with reference to the drawings.
　図１（ａ）から図７は、実施例１に係るモジュールの製造方法を示す断面図である。図８（ａ）および図８（ｂ）は、実施例１に係るモジュールの製造方法を示す平面図である。図８（ａ）は、絶縁層１０、配線８０ａから８０ｃおよび環状金属層８６を図示している。図８（ｂ）は、絶縁層１０、電子部品４０ａ、４０ｂ、４２、および環状金属層４８を図示している。なお、断面図では電子部品４０および配線８０として図示しているが、平面図では電子部品４０ａ、４０ｂおよび配線８０ａから８０ｃとして図示している。 1 (a) to 7 are cross-sectional views showing a method of manufacturing a module according to the first embodiment. 8 (a) and 8 (b) are plan views showing a method of manufacturing the module according to the first embodiment. FIG. 8A illustrates the insulating layer 10, the wirings 80a to 80c, and the annular metal layer 86. FIG. 8B illustrates the insulating layer 10, the electronic components 40a, 40b, 42, and the annular metal layer 48. In the cross-sectional view, the electronic components 40 and the wiring 80 are shown, but in the plan view, the electronic components 40a and 40b and the wirings 80a to 80c are shown.
　図１（ａ）に示すように、絶縁層１０の下面に接着剤１６を塗布する。絶縁層１０はポリイミド層等の樹脂層であり可撓性を有する。絶縁層１０の厚さは例えば７．５μｍから１２５μｍである。接着剤１６は例えばエポキシ樹脂接着剤等の樹脂接着剤である。接着剤１６の塗布は、例えばスピンコート法、スプレコート法、インクジェット法またはスクリーン印刷法を用いる。接着剤１６の厚さは硬化後で例えば５μｍから５０μｍである。なお、予め接着剤１６が形成された絶縁層１０を用意してもよい。接着剤１６は、後述する電子部品４０、４２、導電性ブロック４６および環状金属層４８が配置される領域に対応して、選択的に塗布されていてもよい。なお、接着剤１６は耐熱性および低誘電特性に優れた樹脂材料が好ましい。 As shown in FIG. 1A, the adhesive 16 is applied to the lower surface of the insulating layer 10. The insulating layer 10 is a resin layer such as a polyimide layer and has flexibility. The thickness of the insulating layer 10 is, for example, 7.5 μm to 125 μm. The adhesive 16 is a resin adhesive such as an epoxy resin adhesive. The adhesive 16 is applied, for example, by using a spin coating method, a spray coating method, an inkjet method, or a screen printing method. The thickness of the adhesive 16 is, for example, 5 μm to 50 μm after curing. The insulating layer 10 on which the adhesive 16 is formed in advance may be prepared. The adhesive 16 may be selectively applied corresponding to the regions where the electronic components 40 and 42, the conductive block 46 and the annular metal layer 48, which will be described later, are arranged. The adhesive 16 is preferably a resin material having excellent heat resistance and low dielectric properties.
　図１（ｂ）に示すように、絶縁層１０および接着剤１６を貫通する貫通孔１２を形成する。貫通孔１２は、例えばレーザ光を照射することにより形成する。貫通孔１２の大きさは、例えば３０μｍから５００μｍである。 As shown in FIG. 1B, a through hole 12 penetrating the insulating layer 10 and the adhesive 16 is formed. The through hole 12 is formed by, for example, irradiating a laser beam. The size of the through hole 12 is, for example, 30 μm to 500 μm.
　図１（ｃ）に示すように、接着剤１６の下面に電子部品４０および４２、導電性ブロック４６および環状金属層４８を配置する。環状金属層４８には孔７２ａおよび７２ｂが平面の対角状に設けられている（例えば図８（ｂ）を参照）。電子部品４０の上面には、端子５１および５２が設けられ、電子部品４０の下面には端子５３が設けられている。電子部品４２の上面には端子５４および５６が設けられている。 As shown in FIG. 1C, electronic components 40 and 42, a conductive block 46, and an annular metal layer 48 are arranged on the lower surface of the adhesive 16. The annular metal layer 48 is provided with holes 72a and 72b diagonally in a plane (see, for example, FIG. 8B). Terminals 51 and 52 are provided on the upper surface of the electronic component 40, and terminals 53 are provided on the lower surface of the electronic component 40. Terminals 54 and 56 are provided on the upper surface of the electronic component 42.
　電子部品４０は、例えば縦型のトランジスタであり、ＩＧＢＴ（Insulated Gate Bipolar Transistor）、バイポーラトランジスタまたはパワーＭＯＳＦＥＴ（Metal Oxide Semiconductor Field Effect Transistor）などのＦＥＴ等のトランジスタである。トランジスタには、Ｓｉ、ＧａＮまたはＳｉＣ等の半導体材料が用いられる。電子部品４０は、例えばベアチップまたはベアチップが封止実装されたパッケージである。ベアチップが実装されたパッケージは、ＷＬＰ（Wafer Level Package）またはＳＩＰ（Single Inline Package）等のパッケージである。 The electronic component 40 is, for example, a vertical transistor, and is a transistor such as an IGBT (Insulated Gate Bipolar Transistor), a bipolar transistor, or a FET such as a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). A semiconductor material such as Si, GaN or SiC is used for the transistor. The electronic component 40 is, for example, a bare chip or a package in which a bare chip is sealed and mounted. The package on which the bare chip is mounted is a package such as WLP (Wafer Level Package) or SIP (Single Inline Package).
　電子部品４２は、例えば集積回路であり、電子部品４０を制御するコントローラであり、例えばベアチップまたはベアチップが実装されたパッケージである。端子５１～５４および５６は、電子部品４０および４２の電極であり、例えばＣｕ（銅）、Ａｕ（金）、Ａｇ（銀）またはＡｌ（アルミニウム）等の金属、またはこれらの１つを主材料としたパッドである。電子部品４０が縦型トランジスタの場合、ゲート端子、ソース端子（またはドレイン端子）が上面に設けられ、ドレイン端子（またはソース端子）が下面に設けられる。導電性ブロック４６および環状金属層４８は、Ｃｕ、またはＣｕを主材料とした金属層であり、好ましくは断面が矩形の金属の塊、または板体である。 The electronic component 42 is, for example, an integrated circuit, a controller that controls the electronic component 40, and is, for example, a bare chip or a package on which a bare chip is mounted. Terminals 51 to 54 and 56 are electrodes of electronic components 40 and 42, and are made of a metal such as Cu (copper), Au (gold), Ag (silver) or Al (aluminum), or one of them as a main material. It is a pad. When the electronic component 40 is a vertical transistor, a gate terminal and a source terminal (or a drain terminal) are provided on the upper surface, and a drain terminal (or a source terminal) is provided on the lower surface. The conductive block 46 and the annular metal layer 48 are Cu or a metal layer containing Cu as a main material, and are preferably a metal block or a plate having a rectangular cross section.
　熱処理することにより、接着剤１６を硬化させ電子部品４０、４２、導電性ブロック４６および環状金属層４８と絶縁層１０とを固着および接合させる。熱処理は例えば１５０℃から３００℃の温度で実施する。端子５１～５４および５６は貫通孔１２に露出する。 By heat treatment, the adhesive 16 is cured to fix and bond the electronic components 40 and 42, the conductive block 46, the annular metal layer 48, and the insulating layer 10. The heat treatment is carried out at a temperature of, for example, 150 ° C to 300 ° C. The terminals 51 to 54 and 56 are exposed in the through hole 12.
　図２（ａ）に示すように、絶縁層１０の上面、貫通孔１２の内面に金属層１４を形成する。絶縁層１０の上面、貫通孔１２の内面にシード層を形成する。シード層は、例えばスパッタリング法または無電解めっき法を用い形成する。シード層の上面にめっき層を形成する。めっき層は例えばＣｕまたはＣｕを主材料とした金属層である。シード層およびめっき層により金属層１４が形成される。金属層１４の厚さは例えば数μｍから１２５μｍであり、貫通孔１２が埋め込まれる厚さとする。 As shown in FIG. 2A, a metal layer 14 is formed on the upper surface of the insulating layer 10 and the inner surface of the through hole 12. A seed layer is formed on the upper surface of the insulating layer 10 and the inner surface of the through hole 12. The seed layer is formed by, for example, a sputtering method or an electroless plating method. A plating layer is formed on the upper surface of the seed layer. The plating layer is, for example, Cu or a metal layer containing Cu as a main material. The metal layer 14 is formed by the seed layer and the plating layer. The thickness of the metal layer 14 is, for example, several μm to 125 μm, and is the thickness at which the through hole 12 is embedded.
　図２（ｂ）に示すように、金属層１４の上面に接合層２８を設ける。接合層２８は、樹脂ペーストにロウ材、ＣｕまたはＡｇ等の金属粒子または金属粉体等が含まれる、いわゆる導電性ペーストである。 As shown in FIG. 2B, a bonding layer 28 is provided on the upper surface of the metal layer 14. The bonding layer 28 is a so-called conductive paste in which the resin paste contains a brazing material, metal particles such as Cu or Ag, metal powder, and the like.
　図３（ａ）に示すように、別途、絶縁層２０の一方主面に金属層２４が形成された支持基板を準備する。絶縁層２０はポリイミド層等の樹脂層である。金属層２４は、例えばＣｕまたはＣｕを主材料とした層である。支持基板は、例えば銅張積層（ＣＣＬ：Copper Clad Laminate）基板であり、金属層２４は圧延されたまたは電解めっきされた金属層である。金属層２４には孔７０ａおよび７０ｂが平面の対角状に設けられている（図８（ａ）参照）。絶縁層１０の厚さは例えば７μｍから１２５μｍであり、金属層２４の厚さは例えば５０μｍから３００μｍである。 As shown in FIG. 3A, a support substrate having a metal layer 24 formed on one main surface of the insulating layer 20 is separately prepared. The insulating layer 20 is a resin layer such as a polyimide layer. The metal layer 24 is, for example, a layer containing Cu or Cu as a main material. The support substrate is, for example, a copper-clad laminate (CCL: Copper Clad Laminate) substrate, and the metal layer 24 is a rolled or electroplated metal layer. The holes 70a and 70b are provided in the metal layer 24 diagonally on a flat surface (see FIG. 8A). The thickness of the insulating layer 10 is, for example, 7 μm to 125 μm, and the thickness of the metal layer 24 is, for example, 50 μm to 300 μm.
　絶縁層２０の全面に金属層２４を形成し、その後金属層２４を、フォトリソグラフィ法およびエッチング法を用いパターニングしてもよい。プレス等の機械加工により形成した金属層２４を絶縁層２０に張り付けてもよい。絶縁層２０と金属層２４との間に接着剤等が設けられていてもよい。接着剤は絶縁層２０の全面に形成されていてもよいし、金属層２４が設けられた箇所に選択的に形成されていてもよい。 The metal layer 24 may be formed on the entire surface of the insulating layer 20, and then the metal layer 24 may be patterned by using a photolithography method and an etching method. The metal layer 24 formed by machining such as pressing may be attached to the insulating layer 20. An adhesive or the like may be provided between the insulating layer 20 and the metal layer 24. The adhesive may be formed on the entire surface of the insulating layer 20, or may be selectively formed at a location where the metal layer 24 is provided.
　図３（ｂ）に示すように、絶縁層２０を貫通する貫通孔２２を形成する。貫通孔２２の形成方法は図１（ｂ）の貫通孔１２の形成方法と同様である。続いて絶縁層２０の上面及び貫通孔２２の中に金属層２６を形成する。金属層２６の形成方法は図２（ａ）の金属層１４の形成方法と同様にめっき法により形成される。これにより、金属層２６は貫通孔２２を介し金属層２４と接続する。 As shown in FIG. 3B, a through hole 22 penetrating the insulating layer 20 is formed. The method for forming the through hole 22 is the same as the method for forming the through hole 12 in FIG. 1 (b). Subsequently, the metal layer 26 is formed on the upper surface of the insulating layer 20 and in the through hole 22. The metal layer 26 is formed by a plating method in the same manner as the method for forming the metal layer 14 in FIG. 2 (a). As a result, the metal layer 26 is connected to the metal layer 24 via the through hole 22.
　図４（ａ）に示すように、図２（ｂ）の接合層２８の上面上に金属層２４の下面を接触させる。熱処理して、金属層１４と２４とが熱的、機械的かつ電気的に接合される。接合層２８の厚さは焼成後で例えば５μｍから５０μｍである。 As shown in FIG. 4A, the lower surface of the metal layer 24 is brought into contact with the upper surface of the bonding layer 28 of FIG. 2B. After heat treatment, the metal layers 14 and 24 are thermally, mechanically and electrically joined. The thickness of the bonding layer 28 is, for example, 5 μm to 50 μm after firing.
　以上により、金属層１４、接合層２８および金属層２４により厚い配線８０および環状金属層８６が形成される。なお、図８（ａ）のように環状金属層８６には孔７０ｂが設けられている。端子５１および５６は配線８０により金属層２６と電気的に接続される。端子５２と５４とは配線８２により電気的に接続される。環状金属層８６は、絶縁層１０および２０の周縁に設けられ、絶縁層１０および２０を支持する。絶縁層１０、２０および環状金属層８６に囲まれた空間９８が形成される。 As described above, the thick wiring 80 and the annular metal layer 86 are formed by the metal layer 14, the bonding layer 28, and the metal layer 24. As shown in FIG. 8A, the annular metal layer 86 is provided with holes 70b. The terminals 51 and 56 are electrically connected to the metal layer 26 by the wiring 80. The terminals 52 and 54 are electrically connected by wiring 82. The annular metal layer 86 is provided on the periphery of the insulating layers 10 and 20 and supports the insulating layers 10 and 20. A space 98 surrounded by the insulating layers 10 and 20 and the annular metal layer 86 is formed.
　図４（ｂ）に示すように、絶縁層１０と２０との間の空間９８に樹脂６０を形成する。樹脂６０の形成には例えばトランスファモールド法、インジェクション法またはコンプレッション法を用いる。図８（ａ）のように、樹脂６０は矢印７６ａのように孔７０ａから導入され、点線７７ａから７７ｃのように空間９８に充填される。矢印７６ｂのように孔７０ｂから空気が抜ける。 As shown in FIG. 4B, the resin 60 is formed in the space 98 between the insulating layers 10 and 20. For example, a transfer molding method, an injection method or a compression method is used to form the resin 60. As shown in FIG. 8A, the resin 60 is introduced from the hole 70a as shown by the arrow 76a and is filled in the space 98 as shown by the dotted lines 77a to 77c. Air escapes from the hole 70b as shown by the arrow 76b.
　図５に示すように、絶縁基板３０の上面および下面には金属層３４および３６が設けられている。絶縁基板３０は、例えばセラミックス基板である。金属層３４および３６は例えばＣｕ層である。絶縁基板３０、金属層３４および３６は電子部品４０の熱を放出するヒートシンクとして機能する。金属層３４上面に接合層３８を塗布する。接合層３８の材料は例えばＡｇペースト、Ｃｕペーストまたはロウ材である。 As shown in FIG. 5, metal layers 34 and 36 are provided on the upper surface and the lower surface of the insulating substrate 30. The insulating substrate 30 is, for example, a ceramic substrate. The metal layers 34 and 36 are, for example, Cu layers. The insulating substrate 30, the metal layers 34 and 36 function as a heat sink that releases heat from the electronic component 40. The bonding layer 38 is applied to the upper surface of the metal layer 34. The material of the bonding layer 38 is, for example, Ag paste, Cu paste or brazing material.
　図６に示すように、接合層３８の上面に電子部品４０、導電性ブロック４６および環状金属層４８の下面を接触させる。熱処理することで、接合層３８を焼成する。これにより、電子部品４０、導電性ブロック４６および環状金属層４８と金属層２４が熱的、機械的かつ電気的に接合される。接合層２８の厚さは焼成後で例えば５μｍから５０μｍである。端子５３は、金属層３４、導電性ブロック４６、配線８０を介し金属層２６に電気的に接続される。すなわち、電流は電子部品４０の上面から下面、この下面から金属層３４、導電性ブロック４６および配線８０を介してモジュールの上面の金属層２６へと流れる。絶縁層１０、絶縁基板３０および環状金属層４８に囲まれた空間９９が形成される。 As shown in FIG. 6, the upper surface of the bonding layer 38 is brought into contact with the lower surfaces of the electronic component 40, the conductive block 46, and the annular metal layer 48. The joint layer 38 is fired by heat treatment. As a result, the electronic component 40, the conductive block 46, the annular metal layer 48, and the metal layer 24 are thermally, mechanically, and electrically joined. The thickness of the bonding layer 28 is, for example, 5 μm to 50 μm after firing. The terminal 53 is electrically connected to the metal layer 26 via the metal layer 34, the conductive block 46, and the wiring 80. That is, the current flows from the upper surface to the lower surface of the electronic component 40, from the lower surface to the metal layer 26 on the upper surface of the module via the metal layer 34, the conductive block 46, and the wiring 80. A space 99 surrounded by the insulating layer 10, the insulating substrate 30, and the annular metal layer 48 is formed.
　図７に示すように、絶縁層１０と絶縁基板３０との間の空間９９に樹脂６２を形成する。樹脂６２の形成には例えばトランスファモールド法、インジェクション法またはコンプレッション法を用いる。図８（ｂ）のように、樹脂６２は矢印７８ａのように孔７２ａから導入される。樹脂６２は、点線７９ａから７９ｃのように、絶縁層１０と絶縁基板３０との間の空間９９を対角状に充填されている。矢印７８ｂのように、孔７２ｂから空間９９内の空気が抜ける。樹脂６２が空間９９内に充填されると、樹脂６２を硬化させる。これにより、電子部品４０ａ、４０ｂおよび４２が封止される。樹脂６２は、例えば熱硬化型樹脂または熱可塑性樹脂である。以上により実施例１に係るモジュールが完成する。 As shown in FIG. 7, the resin 62 is formed in the space 99 between the insulating layer 10 and the insulating substrate 30. For example, a transfer molding method, an injection method or a compression method is used to form the resin 62. As shown in FIG. 8B, the resin 62 is introduced from the hole 72a as shown by the arrow 78a. The resin 62 is diagonally filled with the space 99 between the insulating layer 10 and the insulating substrate 30, as shown by the dotted lines 79a to 79c. As shown by the arrow 78b, the air in the space 99 escapes from the hole 72b. When the resin 62 is filled in the space 99, the resin 62 is cured. As a result, the electronic components 40a, 40b and 42 are sealed. The resin 62 is, for example, a thermosetting resin or a thermoplastic resin. With the above, the module according to the first embodiment is completed.
　環状金属層８６のＸ方向およびＹ方向の幅は例えば１００μｍか５０００μｍであり、環状金属層８６のＺ方向の厚さは例えば３０μｍから３００μｍである。孔７０ａおよび７０ｂのＸ方向およびＹ方向の幅は例えば１００μｍから５００μｍである。孔７０ａおよび７０ｂは環状金属層８６のＺ方向の少なくとも一部に設けられていればよい。環状金属層４８のＸ方向およびＹ方向の幅は例えば１００μｍから５０００μｍであり、環状金属層４８のＺ方向の厚さは例えば５０μｍから１０００μｍである。孔７２ａおよび７２ｂのＸ方向およびＹ方向の幅は例えば１００μｍから５０００μｍである。孔７２ａおよび７２ｂは環状金属層４８のＺ方向の少なくとも一部に設けられていればよい。 The width of the annular metal layer 86 in the X direction and the Y direction is, for example, 100 μm or 5000 μm, and the thickness of the annular metal layer 86 in the Z direction is, for example, 30 μm to 300 μm. The widths of the holes 70a and 70b in the X and Y directions are, for example, 100 μm to 500 μm. The holes 70a and 70b may be provided in at least a part of the annular metal layer 86 in the Z direction. The width of the annular metal layer 48 in the X direction and the Y direction is, for example, 100 μm to 5000 μm, and the thickness of the annular metal layer 48 in the Z direction is, for example, 50 μm to 1000 μm. The widths of the holes 72a and 72b in the X and Y directions are, for example, 100 μm to 5000 μm. The holes 72a and 72b may be provided in at least a part of the annular metal layer 48 in the Z direction.
　図９および図１０は、実施例１に係るモジュールの平面図である。図９は、図７の絶縁層２０に設けられた上層の部分を主に示し、貫通孔２２、金属層２４および２６を図示している。図１０は、絶縁層１０側に設けられた下層の部分を主に示し、貫通孔１２、金属層１４、電子部品４０ａ、４０ｂ、４２、端子５１ａ、５１ｂ、５２ａ、５２ｂ、５４、５６、配線８０ａから８０ｃ、８２ａおよび８２ｂを図示している。 9 and 10 are plan views of the module according to the first embodiment. FIG. 9 mainly shows the portion of the upper layer provided in the insulating layer 20 of FIG. 7, and shows the through hole 22, the metal layers 24 and 26. FIG. 10 mainly shows a lower layer portion provided on the insulating layer 10 side, and includes a through hole 12, a metal layer 14, electronic components 40a, 40b, 42, terminals 51a, 51b, 52a, 52b, 54, 56, and wiring. 80a to 80c, 82a and 82b are illustrated.
　図９および図１０に示すように、電子部品４０ａおよび４０ｂおよび電子部品４２が設けられている。電子部品４０ａの上面には端子５１ａおよび５２ａが設けられ、電子部品４０ｂの上面には端子５１ｂおよび５２ｂが設けられている。電子部品４０ａおよび４０ｂは例えばパワー半導体素子であり縦型のトランジスタである。端子５１ａおよび５１ｂはソース端子であり、端子５２ａおよび５２ｂはゲート端子である。 As shown in FIGS. 9 and 10, electronic components 40a and 40b and electronic components 42 are provided. Terminals 51a and 52a are provided on the upper surface of the electronic component 40a, and terminals 51b and 52b are provided on the upper surface of the electronic component 40b. The electronic components 40a and 40b are, for example, power semiconductor elements and vertical transistors. The terminals 51a and 51b are source terminals, and the terminals 52a and 52b are gate terminals.
　電子部品４２の上面には端子５４および５６が設けられている。電子部品４２は、トランジスタを制御する制御回路を有する。制御回路は、外部からの制御信号に基づき、トランジスタのゲート端子にゲート信号を出力する。端子５４は、端子５２ａおよび５２ｂにトランジスタのゲート信号を出力する端子である。端子５６は外部から制御信号を受信する端子である。 Terminals 54 and 56 are provided on the upper surface of the electronic component 42. The electronic component 42 has a control circuit that controls a transistor. The control circuit outputs a gate signal to the gate terminal of the transistor based on the control signal from the outside. The terminal 54 is a terminal that outputs a transistor gate signal to the terminals 52a and 52b. The terminal 56 is a terminal that receives a control signal from the outside.
　金属層２６は、ソースパッドＰｓ、ドレインパッドＰｄおよび制御パッドＰｇを形成する。端子５１ａおよび５１ｂは貫通孔１２を介し配線８０ａに電気的に接続される。配線８０ａは貫通孔２２を介しソースパッドＰｓに電気的に接続される。端子５２ａおよび５２ｂは、貫通孔１２および配線８２ａを介し端子５４に電気的に接続される。端子５６は、貫通孔１２、２２および配線８０ｂおよび８２ｂを介し制御パッドＰｇに電気的に接続される。 The metal layer 26 forms a source pad Ps, a drain pad Pd, and a control pad Pg. The terminals 51a and 51b are electrically connected to the wiring 80a via the through hole 12. The wiring 80a is electrically connected to the source pad Ps via the through hole 22. The terminals 52a and 52b are electrically connected to the terminal 54 via the through hole 12 and the wiring 82a. The terminal 56 is electrically connected to the control pad Pg via the through holes 12, 22 and the wirings 80b and 82b.
　電子部品４０ａおよび４０ｂの下面に設けられた端子５３は接合層３８、金属層３４、導電性ブロック４６および配線８０ｃを介しドレインパッドＰｄに電気的に接続される。ドレインパッドＰｄには例えばグランド電位が供給される。 The terminals 53 provided on the lower surfaces of the electronic components 40a and 40b are electrically connected to the drain pad Pd via the bonding layer 38, the metal layer 34, the conductive block 46, and the wiring 80c. For example, a ground potential is supplied to the drain pad Pd.
　トランジスタでは、ソース端子およびドレイン端子には大きな電流が流れる。ゲート端子は、ソース電流とドレイン端子との間の電流のスイッチングを行うゲート信号が入力する。このため、ソース端子のパッド面積は大きく、ゲート端子のパッド面積は小さい。ソース端子に接続される配線は、平面寸法は大きくてもよいが厚いことが要求される、ゲート端子に接続される配線は、薄くてもよいが平面寸法は小さいことが要求される。 In a transistor, a large current flows through the source terminal and drain terminal. A gate signal that switches the current between the source current and the drain terminal is input to the gate terminal. Therefore, the pad area of the source terminal is large and the pad area of the gate terminal is small. The wiring connected to the source terminal may have a large planar dimension but is required to be thick, and the wiring connected to the gate terminal may be thin but required to have a small planar dimension.
　実施例１では、配線８０ａはソースパッドＰｓとソース端子である端子５１ａおよび５１ｂとの間の電流の供給用の配線である。配線８０ｃはドレインパッドＰｄとドレイン端子である端子５３との間の電流の供給用の配線である。配線８２ａは制御回路の制御端子である端子５４とゲート端子である端子５２ａおよび５２ｂとの間の制御電圧または制御電流の供給用の配線である。配線８０ｂは、制御パッドＰｇと端子５６とを接続する配線であり、比較的大きな電流が流れる。 In the first embodiment, the wiring 80a is a wiring for supplying a current between the source pad Ps and the terminals 51a and 51b which are the source terminals. The wiring 80c is a wiring for supplying a current between the drain pad Pd and the terminal 53 which is a drain terminal. The wiring 82a is a wiring for supplying a control voltage or a control current between the terminal 54 which is a control terminal of the control circuit and the terminals 52a and 52b which are gate terminals. The wiring 80b is a wiring that connects the control pad Pg and the terminal 56, and a relatively large current flows through the wiring 80b.
　実施例１では、ソース端子に接続される配線８０ａ、ドレイン端子に接続される配線８０ｃ、端子５６に接続される配線８０ｂを金属層１４と２４とで形成し、ゲート端子に接続される配線８２ａを金属層１４のみで形成する。これにより、簡単な工程で厚い配線８０ａから８０ｃと薄い配線８２を形成できる。 In the first embodiment, the wiring 80a connected to the source terminal, the wiring 80c connected to the drain terminal, and the wiring 80b connected to the terminal 56 are formed by the metal layers 14 and 24, and the wiring 82a connected to the gate terminal. Is formed only by the metal layer 14. Thereby, the thick wiring 80a to 80c and the thin wiring 82 can be formed by a simple process.
　環状金属層４８および８６により、電子部品４０および４２からの放熱性を向上できる。また、強度を向上させることができる。環状金属層４８および８６には、樹脂の注入または排出の口となる孔７０ａ、７０ｂ、７２ａおよび７２ｂを設けることで、環状金属層４８および８６内に樹脂６０および６２を形成することができる。平面視において孔７０ａと７０ｂは、環状金属層８６の対向する辺に設けられ、環状金属層８６の対角またはその近傍に設けられている。孔７２ａと７２ｂは、環状金属層４８の対向する辺に設けられ、環状金属層４８の対角またはその近傍に設けられている。 The annular metal layers 48 and 86 can improve heat dissipation from the electronic components 40 and 42. Moreover, the strength can be improved. Resins 60 and 62 can be formed in the cyclic metal layers 48 and 86 by providing holes 70a, 70b, 72a and 72b for injecting or discharging the resin in the annular metal layers 48 and 86. In a plan view, the holes 70a and 70b are provided on opposite sides of the annular metal layer 86, and are provided diagonally or in the vicinity of the annular metal layer 86. The holes 72a and 72b are provided on opposite sides of the annular metal layer 48, and are provided diagonally or in the vicinity of the annular metal layer 48.
［実施例１の変形例１］
　図１１は、実施例１の変形例１に係るモジュールを示す断面図、図１２（ａ）および図１２（ｂ）は、実施例１の変形例１に係るモジュールの製造方法を示す平面図である。図１１から図１２（ｂ）に示すように、環状金属層８６が設けられていない。絶縁層１０と２０との間には金型を用い樹脂６０を形成する。図１２（ｂ）に示すように、樹脂６２は矢印７８ａのように孔７２ａから導入される。その他の構成は実施例１と同じであり説明を省略する。実施例１の変形例１のように環状金属層４８および８６のいずれか一方は設けられていなくてもよい。 [Modification 1 of Example 1]
11 is a cross-sectional view showing a module according to the first modification of the first embodiment, and FIGS. 12A and 12B are plan views showing a method of manufacturing the module according to the first modification of the first embodiment. is there. As shown in FIGS. 11 to 12 (b), the annular metal layer 86 is not provided. A mold is used between the insulating layers 10 and 20 to form the resin 60. As shown in FIG. 12B, the resin 62 is introduced from the hole 72a as shown by the arrow 78a. Other configurations are the same as those in the first embodiment, and the description thereof will be omitted. Either one of the annular metal layers 48 and 86 may not be provided as in the first modification of the first embodiment.
［実施例１の変形例２］
　図１３（ａ）および図１３（ｂ）は、実施例１の変形例２に係るモジュールの製造方法を示す平面図である。図１３（ａ）に示すように、環状金属層８６の孔７０ａおよび７０ｂが設けられていない辺に孔７０ｃが設けられている。樹脂６０を矢印７６ａのように孔７０ａから空間９８に導入するときに、矢印７６ｃのように空間９８の空気を孔７０ｃから抜くことができる。 [Modification 2 of Example 1]
13 (a) and 13 (b) are plan views showing a method of manufacturing a module according to a modification 2 of the first embodiment. As shown in FIG. 13A, the holes 70c are provided on the sides of the annular metal layer 86 where the holes 70a and 70b are not provided. When the resin 60 is introduced into the space 98 from the hole 70a as shown by the arrow 76a, the air in the space 98 can be evacuated from the hole 70c as shown by the arrow 76c.
　図１３（ｂ）に示すように、環状金属層４８の孔７２ａおよび７２ｂが設けられていない辺に孔７２ｃが設けられている。樹脂６２を矢印７８ａのように孔７２ａから空間９９に導入するときに、矢印７８ｃのように空間９９の空気を孔７２ｃから抜くことができる。その他の構成は実施例１と同じであり説明を省略する。実施例１の変形例２では、各辺に孔７０ａから７０ｃおよび７２ａから７２ｃが設けられているため、空間９８および９９から空気を抜くことができる。孔７０ｃおよび７２ｃは、任意の箇所に設けられていてもよい。 As shown in FIG. 13B, holes 72c are provided on the sides of the annular metal layer 48 where the holes 72a and 72b are not provided. When the resin 62 is introduced into the space 99 from the hole 72a as shown by the arrow 78a, the air in the space 99 can be evacuated from the hole 72c as shown by the arrow 78c. Other configurations are the same as those in the first embodiment, and the description thereof will be omitted. In the second modification of the first embodiment, since the holes 70a to 70c and 72a to 72c are provided on each side, air can be evacuated from the spaces 98 and 99. The holes 70c and 72c may be provided at arbitrary locations.
［実施例１の変形例３］
　図１４は、実施例１の変形例３に係るモジュールの製造方法を示す断面図、図１５（ａ）および図１５（ｂ）は、実施例１の変形例３に係るモジュールの製造方法を示す平面図である。 [Modification 3 of Example 1]
FIG. 14 is a cross-sectional view showing a method of manufacturing a module according to a modification 3 of the first embodiment, and FIGS. 15 (a) and 15 (b) show a method of manufacturing a module according to the third modification of the first embodiment. It is a plan view.
　図１４から図１５（ｂ）に示すように、環状金属層８６が設けられていない。絶縁層１０に孔７４が設けられている。環状金属層４８には孔７２ａおよび７２ｂが設けられていない。なお、図１４の孔７４の位置は図１５（ａ）および図１５（ｂ）の孔の位置と対応していない。 As shown in FIGS. 14 to 15 (b), the annular metal layer 86 is not provided. A hole 74 is provided in the insulating layer 10. The annular metal layer 48 is not provided with holes 72a and 72b. The position of the hole 74 in FIG. 14 does not correspond to the position of the hole in FIGS. 15 (a) and 15 (b).
　樹脂６０および６２を形成するときに絶縁層１０および２０に金型９０を被せる。金型９０の導入孔９１ａより矢印９２ａのように樹脂を導入する。金型９０の導出孔９１ｂから矢印９２ｂのように空気が抜ける。樹脂は矢印９３ａのように絶縁層１０の孔７４を介し絶縁層１０の上の空間から下の空間に導入される。これにより、環状金属層４８に孔が設けられていなくとも、環状金属層４８内を樹脂６２で充填することができる。孔７４の少なくとも１つは空間９９から空気を抜く孔として機能してもよい。その他の構成は実施例１と同じであり説明を省略する。 When forming the resins 60 and 62, the insulating layers 10 and 20 are covered with the mold 90. The resin is introduced from the introduction hole 91a of the mold 90 as shown by the arrow 92a. Air escapes from the lead-out hole 91b of the mold 90 as shown by the arrow 92b. The resin is introduced from the space above the insulating layer 10 to the space below it through the holes 74 of the insulating layer 10 as shown by the arrow 93a. As a result, the inside of the cyclic metal layer 48 can be filled with the resin 62 even if the annular metal layer 48 is not provided with holes. At least one of the holes 74 may function as a hole for venting air from the space 99. Other configurations are the same as those in the first embodiment, and the description thereof will be omitted.
［実施例１の変形例４］
　図１６は、実施例１の変形例４に係るモジュールの製造方法を示す断面図、図１７（ａ）および図１７（ｂ）は、実施例１の変形例４に係るモジュールの製造方法を示す平面図である。 [Modification 4 of Example 1]
FIG. 16 is a cross-sectional view showing a method of manufacturing a module according to a modified example 4 of the first embodiment, and FIGS. 17 (a) and 17 (b) show a method of manufacturing a module according to the modified example 4 of the first embodiment. It is a plan view.
　図１６から図１７（ｂ）に示すように、環状金属層８６に孔７０ａおよび７０ｂが設けられている。絶縁層１０に孔７４が設けられている。環状金属層４８には孔は設けられていない。 As shown in FIGS. 16 to 17 (b), the annular metal layer 86 is provided with holes 70a and 70b. A hole 74 is provided in the insulating layer 10. The annular metal layer 48 is not provided with holes.
　樹脂６０および６２を形成するときに、矢印７６ａのように孔７０ａから環状金属層８６内に樹脂を導入すると、絶縁層１０の孔７４を介し、矢印９３ａのように環状金属層４８内に樹脂６２が導入される。これにより、環状金属層４８に孔７２ａおよび７２ｂが設けられていなくとも、環状金属層４８内を樹脂６２で充填することができる。その他の構成は実施例１と同じであり説明を省略する。 When the resins 60 and 62 are formed, when the resin is introduced into the annular metal layer 86 from the holes 70a as shown by the arrow 76a, the resin is introduced into the annular metal layer 48 as shown by the arrow 93a through the holes 74 of the insulating layer 10. 62 is introduced. As a result, even if the annular metal layer 48 is not provided with the holes 72a and 72b, the inside of the annular metal layer 48 can be filled with the resin 62. Other configurations are the same as those in the first embodiment, and the description thereof will be omitted.
　図１８（ａ）から図１９（ａ）は、実施例２に係るモジュールの製造方法を示す断面図である。図１９（ｂ）は、実施例２に係るモジュールの製造方法を示す平面図である。図１９（ｂ）は、絶縁層１０、配線８０ａから８０ｃおよび環状金属層８６を図示している。 18 (a) to 19 (a) are cross-sectional views showing a method of manufacturing the module according to the second embodiment. FIG. 19B is a plan view showing a method of manufacturing the module according to the second embodiment. FIG. 19B illustrates the insulating layer 10, the wirings 80a to 80c and the annular metal layer 86.
　図１８（ａ）に示すように、図２（ｂ）および図３（ｂ）と同様に、絶縁層１０および２０を準備する。絶縁層１０の下面に導電性ブロックおよび環状金属層は設けられていない。電子部品４０の下面に端子は設けられていない。電子部品４０が横型トランジスタの場合、ソース端子、ドレイン端子およびゲート端子はいずれも上面に設けられる。 As shown in FIG. 18 (a), the insulating layers 10 and 20 are prepared in the same manner as in FIGS. 2 (b) and 3 (b). The conductive block and the annular metal layer are not provided on the lower surface of the insulating layer 10. No terminal is provided on the lower surface of the electronic component 40. When the electronic component 40 is a horizontal transistor, the source terminal, drain terminal, and gate terminal are all provided on the upper surface.
　図１８（ｂ）に示すように、図４（ａ）と同様に接合層２８を用い金属層２４の下面と金属層１４の上面とを接合する。配線８０および環状金属層８６は各々金属層２４および２６を備え、配線８２は金属層１４を備え、金属層２４は備えていない。 As shown in FIG. 18 (b), the lower surface of the metal layer 24 and the upper surface of the metal layer 14 are joined using the bonding layer 28 in the same manner as in FIG. 4 (a). The wiring 80 and the annular metal layer 86 include metal layers 24 and 26, respectively, and the wiring 82 includes a metal layer 14 and no metal layer 24.
　図１９（ａ）および図１９（ｂ）に示すように、図４（ｂ）と同様に、絶縁層１０と２０との間の空間９８に樹脂６０を形成する。樹脂６０の形成には例えばトランスファモールド法、インジェクション法またはコンプレッション法を用いる。樹脂６０は矢印７６ａのように孔７０ａから導入される。樹脂６０は、点線７７ａから７７ｃのように、絶縁層１０と２０との間の空間９８を対角状に充填されている。矢印７６ｂのように、孔７０ｂから空間９８内の空気が抜ける。樹脂６０が空間９８内に充填されると、樹脂６０を硬化させる。これにより、実施例２に係るモジュールが完成する。 As shown in FIGS. 19 (a) and 19 (b), the resin 60 is formed in the space 98 between the insulating layers 10 and 20 as in FIG. 4 (b). For example, a transfer molding method, an injection method or a compression method is used to form the resin 60. The resin 60 is introduced from the hole 70a as shown by the arrow 76a. The resin 60 is diagonally filled with the space 98 between the insulating layers 10 and 20 as shown by the dotted lines 77a to 77c. As shown by the arrow 76b, the air in the space 98 escapes from the hole 70b. When the resin 60 is filled in the space 98, the resin 60 is cured. As a result, the module according to the second embodiment is completed.
　図２０は、実施例２に係るモジュールの平面図である。図２０は、貫通孔１２、金属層１４、電子部品４０ａ、４０ｂ、４２、端子５１ａから５１ｄ、５２ａ、５４、５６、配線８０ａから８０ｃ、８２ａ、８２ｂおよび環状金属層８６を図示している。 FIG. 20 is a plan view of the module according to the second embodiment. FIG. 20 illustrates through holes 12, metal layers 14, electronic components 40a, 40b, 42, terminals 51a to 51d, 52a, 54, 56, wirings 80a to 80c, 82a, 82b and an annular metal layer 86.
　図２０に示すように、電子部品４０ａおよび４０ｂおよび電子部品４２が設けられている。電子部品４０ａの上面には端子５１ａ、５１ｃおよび５２ａが設けられ、電子部品４０ｂの上面には端子５１ｂ、５１ｄおよび５２ｂが設けられている。電子部品４０ａおよび４０ｂは例えばパワー半導体素子でありトランジスタである。端子５１ａおよび５１ｂはソース端子であり、端子５１ｃおよび５１ｄはドレイン端子であり、端子５２ａおよび５２ｂはゲート端子である。 As shown in FIG. 20, electronic components 40a and 40b and electronic components 42 are provided. Terminals 51a, 51c and 52a are provided on the upper surface of the electronic component 40a, and terminals 51b, 51d and 52b are provided on the upper surface of the electronic component 40b. The electronic components 40a and 40b are, for example, power semiconductor elements and transistors. The terminals 51a and 51b are source terminals, the terminals 51c and 51d are drain terminals, and the terminals 52a and 52b are gate terminals.
　端子５１ａと５１ｂとは配線８０ａにより電気的に接続され、絶縁層２０の上面のソースパッド（不図示）に電気的に接続される。端子５１ｃと５１ｄとは配線８０ｃにより電気的に接続され、絶縁層２０の上面のドレインパッド（不図示）に電気的に接続される。端子５２ａと５２ｂとは配線８２ａにより端子５４に電気的に接続される。その他の構成は実施例１と同じであり説明を省略する。 The terminals 51a and 51b are electrically connected by wiring 80a, and are electrically connected to a source pad (not shown) on the upper surface of the insulating layer 20. The terminals 51c and 51d are electrically connected by wiring 80c, and are electrically connected to a drain pad (not shown) on the upper surface of the insulating layer 20. The terminals 52a and 52b are electrically connected to the terminal 54 by the wiring 82a. Other configurations are the same as those in the first embodiment, and the description thereof will be omitted.
　実施例２のようにソース端子とドレイン端子とは電子部品４０の上面に設けられていてもよい。環状金属層８６が設けられ、環状金属層４８および樹脂６２は設けられていなくてもよい。 As in the second embodiment, the source terminal and the drain terminal may be provided on the upper surface of the electronic component 40. The cyclic metal layer 86 may be provided, and the annular metal layer 48 and the resin 62 may not be provided.
［実施例２の変形例１］
　図２１は、実施例２の変形例１に係るモジュールの製造方法を示す平面図である。図２１に示すように、環状金属層８６の孔７０ａおよび７０ｂが設けられていない辺に孔７０ｃが設けられている。矢印７６ａのように、孔７０ａから樹脂６０を導入するときに、矢印７６ｂおよび７６ｃのように孔７０ｂおよび７０ｃから空間９８内の空気が抜ける。このため、空間９８内に樹脂６０を容易に導入できる。その他の構成は実施例２と同じであり説明を省略する。 [Modification 1 of Example 2]
FIG. 21 is a plan view showing a method of manufacturing a module according to the first modification of the second embodiment. As shown in FIG. 21, the holes 70c are provided on the sides of the annular metal layer 86 where the holes 70a and 70b are not provided. When the resin 60 is introduced from the holes 70a as shown by the arrow 76a, the air in the space 98 is released from the holes 70b and 70c as shown by the arrows 76b and 76c. Therefore, the resin 60 can be easily introduced into the space 98. Other configurations are the same as those in the second embodiment, and the description thereof will be omitted.
［実施例２の変形例２］
　図２２（ａ）および図２２（ｂ）は、実施例２の変形例２に係るモジュールの製造方法を示す断面図および平面図である。図２２（ａ）および図２２（ｂ）に示すように、環状金属層８６に孔７０ａおよび７０ｂが設けられていない。絶縁層１０に孔７４が設けられている。矢印７６ａのように孔７４ａから空間９８に樹脂６０を導入する。矢印７６ｂのように孔７４ｂから空間９８内の空気が抜ける。その他の構成は実施例２と同じであり説明を省略する。実施例２の変形例２のように、絶縁層１０に樹脂６０を導入する孔７４ａを設けてもよい。 [Modification 2 of Example 2]
22 (a) and 22 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 2 of the second embodiment. As shown in FIGS. 22 (a) and 22 (b), the annular metal layer 86 is not provided with holes 70a and 70b. A hole 74 is provided in the insulating layer 10. The resin 60 is introduced into the space 98 from the hole 74a as shown by the arrow 76a. Air in the space 98 escapes from the hole 74b as shown by the arrow 76b. Other configurations are the same as those in the second embodiment, and the description thereof will be omitted. As in the modified example 2 of the second embodiment, the insulating layer 10 may be provided with a hole 74a for introducing the resin 60.
［実施例２の変形例３］
　図２３（ａ）および図２３（ｂ）は、実施例２の変形例３に係るモジュールの製造方法を示す断面図および平面図である。図２３（ａ）および図２３（ｂ）に示すように、環状金属層８６に孔７０ａおよび７０ｂが設けられ、絶縁層１０に孔７４が設けられている。矢印７６ａのように孔７０ａから樹脂６０を導入するときに、矢印７６ｂおよび７６ｃのように空間９８内の空気は孔７０ｂおよび７４から外部に抜ける。その他の構成は実施例２と同じであり説明を省略する。実施例２の変形例３のように、絶縁層１０に設けられた孔７４を空気抜けに用いてもよい。 [Modification 3 of Example 2]
23 (a) and 23 (b) are a cross-sectional view and a plan view showing a method of manufacturing a module according to a modification 3 of the second embodiment. As shown in FIGS. 23 (a) and 23 (b), the annular metal layer 86 is provided with holes 70a and 70b, and the insulating layer 10 is provided with holes 74. When the resin 60 is introduced from the holes 70a as shown by the arrows 76a, the air in the space 98 escapes from the holes 70b and 74 as shown by the arrows 76b and 76c. Other configurations are the same as those in the second embodiment, and the description thereof will be omitted. As in the modified example 3 of the second embodiment, the hole 74 provided in the insulating layer 10 may be used for air release.
　実施例１およびその変形例２、４並びに実施例２およびその変形例によれば、絶縁層１０（第１絶縁層）の下面に電子部品４０および４２が搭載され、絶縁層１０の上面に貫通孔１２（第１貫通孔）を介し電子部品４０および４２と接続する配線８０および８２が設けられている。配線８０および８２上に絶縁層２０（第１層）が設けられている。環状金属層８６（第１環状金属層）は、絶縁層１０と絶縁層２０との間において配線８０および８２を囲む。樹脂６０（第１樹脂）は、絶縁層１０、絶縁層２０および環状金属層８６に囲まれた空間９８（第１空間）に充填され配線８０および８２を封止する。 According to the first embodiment and its modifications 2 and 4, and the second embodiment and its modifications, the electronic components 40 and 42 are mounted on the lower surface of the insulating layer 10 (first insulating layer) and penetrate the upper surface of the insulating layer 10. Wiring 80 and 82 that connect to the electronic components 40 and 42 via the hole 12 (first through hole) are provided. An insulating layer 20 (first layer) is provided on the wirings 80 and 82. The annular metal layer 86 (first annular metal layer) surrounds the wirings 80 and 82 between the insulating layer 10 and the insulating layer 20. The resin 60 (first resin) is filled in the space 98 (first space) surrounded by the insulating layer 10, the insulating layer 20, and the annular metal layer 86, and seals the wirings 80 and 82.
　実施例１およびその変形例では、電子部品４０および４２の下に絶縁基板３０が設けられている。環状金属層４８は、絶縁層１０と絶縁基板３０との間において電子部品４０および４２を囲む。樹脂６２は、絶縁層１０、絶縁基板３０および環状金属層４８に囲まれた空間９９に充填され電子部品４０および４２を封止する。 In the first embodiment and its modifications, the insulating substrate 30 is provided under the electronic components 40 and 42. The annular metal layer 48 surrounds the electronic components 40 and 42 between the insulating layer 10 and the insulating substrate 30. The resin 62 fills the space 99 surrounded by the insulating layer 10, the insulating substrate 30, and the annular metal layer 48, and seals the electronic components 40 and 42.
　これにより、電子部品４０および４２において発生した熱（電子部品４０がパワー半導体の場合例えば２５０℃となる）が環状金属層４８または８６により外部に放出される。これにより、電子部品４０および４２近傍の温度が下がるため、電子部品４０および４２の近傍に他の電子部品を実装することが可能となる。また、環状金属層４８または８６を設けることで樹脂６０または６２だけに比べ強度を大きくできる。 As a result, the heat generated in the electronic components 40 and 42 (when the electronic component 40 is a power semiconductor, for example, 250 ° C.) is released to the outside by the cyclic metal layer 48 or 86. As a result, the temperature in the vicinity of the electronic components 40 and 42 is lowered, so that other electronic components can be mounted in the vicinity of the electronic components 40 and 42. Further, by providing the annular metal layer 48 or 86, the strength can be increased as compared with the resin 60 or 62 alone.
　さらに、電子部品４０と環状金属層４８または８６との間に厚い配線８０ｂおよび８０ｃ、導電性ブロック４６が設けられている。これにより、電子部品４０において発生した熱の放熱性を高めることができる。放熱性を高めるため、薄い配線８２ａおよび８２ｂと環状金属層８６との間に厚い配線８０ｂおよび８０ｃを設けることが好ましい。 Further, thick wirings 80b and 80c and a conductive block 46 are provided between the electronic component 40 and the annular metal layer 48 or 86. As a result, the heat dissipation of the heat generated in the electronic component 40 can be improved. In order to improve heat dissipation, it is preferable to provide thick wirings 80b and 80c between the thin wirings 82a and 82b and the annular metal layer 86.
　絶縁層１０および環状金属層４８または８６の少なくとも１つに外部と空間９８または９９とをつなぐ（すなわち通ずる）孔７０ａから７０ｃ、７２ａから７２ｃおよび７４（第１孔）を設けている。これにより、絶縁層１０と環状金属層４８または８６とを有する構造の孔７０ａから７０ｃ、７２ａから７２ｃおよび７４を介し、絶縁層１０、２０（または絶縁基板３０）および環状金属層８６（または４８）に囲まれた空間に電子部品または配線を封止する樹脂を充填することができる。 At least one of the insulating layer 10 and the annular metal layer 48 or 86 is provided with holes 70a to 70c, 72a to 72c and 74 (first holes) connecting (that is, communicating with) the outside and the space 98 or 99. As a result, the insulating layers 10, 20 (or the insulating substrate 30) and the annular metal layer 86 (or 48) are passed through the holes 70a to 70c, 72a to 72c and 74 of the structure having the insulating layer 10 and the annular metal layer 48 or 86. ) Can be filled with a resin that seals electronic components or wiring.
　孔７０ａと７０ｂは環状金属層８６の対角またはその近傍に設けられ、孔７２ａと７２ｂは環状金属層４８の対角またはその近傍に設けられることが好ましい。これにより、図８および図９のように、粘性のある樹脂を空間内に充填させることができる。 It is preferable that the holes 70a and 70b are provided diagonally to or near the annular metal layer 86, and the holes 72a and 72b are provided diagonally or near the annular metal layer 48. As a result, as shown in FIGS. 8 and 9, a viscous resin can be filled in the space.
　実施例１およびその変形例２、４のように、電子部品４０および４２下に絶縁基板３０（第２層）が設けられている。環状金属層４８（第２環状金属層）は、絶縁層１０と絶縁基板３０との間において電子部品４０および４２を囲む。樹脂６２（第２樹脂）は、絶縁層１０、絶縁基板３０および環状金属層４８に囲まれた空間９９（第２空間）に充填され電子部品４０および４２を封止する。これにより、電子部品４０および４２において発生した熱が環状金属層４８および８６の両方により外部により効率的に放出される。環状金属層４８および８６の両方を設けることで強度をより大きくできる。 As in the first embodiment and the second and fourth modifications thereof, the insulating substrate 30 (second layer) is provided under the electronic components 40 and 42. The annular metal layer 48 (second annular metal layer) surrounds the electronic components 40 and 42 between the insulating layer 10 and the insulating substrate 30. The resin 62 (second resin) is filled in a space 99 (second space) surrounded by the insulating layer 10, the insulating substrate 30, and the annular metal layer 48, and seals the electronic components 40 and 42. As a result, the heat generated in the electronic components 40 and 42 is efficiently released to the outside by both the annular metal layers 48 and 86. The strength can be further increased by providing both the annular metal layers 48 and 86.
　実施例１の変形例３のように、環状金属層８６に孔７０ａおよび７０ｂ（第１孔）が設けられ、絶縁層１０に孔７４（第２孔）が設けられている。環状金属層４８に孔７２ａおよび７２ｂは設けられていない。これにより、孔７０ａおよび７０ｂを介し空間９８に樹脂６０を充填し、空間９８から孔７４を介し環状金属層４８内の空間９９に樹脂６２を充填することができる。 As in the modified example 3 of the first embodiment, the annular metal layer 86 is provided with holes 70a and 70b (first hole), and the insulating layer 10 is provided with a hole 74 (second hole). The annular metal layer 48 is not provided with holes 72a and 72b. As a result, the space 98 can be filled with the resin 60 through the holes 70a and 70b, and the resin 62 can be filled in the space 99 in the annular metal layer 48 from the space 98 through the holes 74.
　実施例１およびその変形例２のように、環状金属層８６に孔７０ａおよび７０ｂ設けられ、絶縁層１０に孔７４は設けられておらず、環状金属層４８に孔７２ａおよび７２ｂが設けられている。これにより、樹脂６０と６２とを別の工程により形成できる。 As in the first embodiment and the second modification thereof, the annular metal layer 86 is provided with holes 70a and 70b, the insulating layer 10 is not provided with holes 74, and the annular metal layer 48 is provided with holes 72a and 72b. There is. Thereby, the resins 60 and 62 can be formed by another step.
　配線８０上に絶縁層２０（第２絶縁層）が設けられ、電極として金属層２６は絶縁層２０の上面に設けられ、貫通孔２２（第２貫通孔）を介し配線８０と接続する。これにより、配線８０を介し電子部品４０の熱を放出できる。 An insulating layer 20 (second insulating layer) is provided on the wiring 80, and a metal layer 26 is provided on the upper surface of the insulating layer 20 as an electrode and is connected to the wiring 80 via a through hole 22 (second through hole). As a result, the heat of the electronic component 40 can be released through the wiring 80.
　以上、本発明の実施例について詳述したが、本発明はかかる特定の実施例に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形・変更が可能である。 Although the examples of the present invention have been described in detail above, the present invention is not limited to such specific examples, and various modifications and modifications are made within the scope of the gist of the present invention described in the claims. It can be changed.
　１０、２０　絶縁層
　１２、２２　貫通孔
　１４、２４、２６、３４、３６　金属層
　１６　接着剤
　２８、３８　接合層
　３０　絶縁基板
　４０、４０ａ、４０ｂ、４２　電子部品
　５１－５４、５６、５１ａ－５１ｄ　端子
　６０、６２　樹脂
　７０ａ－７０ｃ、７２ａ－７２ｃ、７４、７４ａ、７４ｂ　孔
　８０、８０ａ－８０ｃ、８２、８２ａ、８２ｂ　配線
　９８、９９　空間
　 10, 20 Insulation layer 12, 22 Through hole 14, 24, 26, 34, 36 Metal layer 16 Adhesive 28, 38 Bonding layer 30 Insulation substrate 40, 40a, 40b, 42 Electronic components 51-54, 56, 51a- 51d Terminals 60, 62 Resin 70a-70c, 72a-72c, 74, 74a, 74b Holes 80, 80a-80c, 82, 82a, 82b Wiring 98, 99 Space

Claims (9)

  1. 　第１絶縁層と、
    　前記第１絶縁層の下面に搭載された電子部品と、
    　前記第１絶縁層の上面に設けられ、前記第１絶縁層を貫通する第１貫通孔を介し前記電子部品と接続する配線と、
    　前記電子部品下および前記配線上のいずれか一方に設けられた第１層と、
    　前記第１絶縁層と前記第１層との間において対応する前記電子部品および前記配線のいずれか一方を囲む第１環状金属層と、
    　前記第１絶縁層、前記第１層および前記第１環状金属層に囲まれた第１空間に充填され前記対応する前記電子部品および前記配線のいずれか一方を封止する第１樹脂と、
    　を備え、
    　前記第１絶縁層および前記第１環状金属層の少なくとも一方に外部と前記第１空間とをつなぐ第１孔が設けられたモジュール。     With the first insulating layer
    Electronic components mounted on the lower surface of the first insulating layer and
    A wiring provided on the upper surface of the first insulating layer and connected to the electronic component through a first through hole penetrating the first insulating layer.
    A first layer provided under either the electronic component or the wiring, and
    A first annular metal layer that surrounds one of the corresponding electronic component and the wiring between the first insulating layer and the first layer.
    A first resin that fills a first space surrounded by the first insulating layer, the first layer, and the first annular metal layer and seals one of the corresponding electronic components and the wiring.
    With
    A module in which at least one of the first insulating layer and the first annular metal layer is provided with a first hole connecting the outside and the first space.
  2. 　前記第１孔は前記第１環状金属層に設けられている請求項１に記載のモジュール。 The module according to claim 1, wherein the first hole is provided in the first annular metal layer.
  3. 　前記第１孔は前記第１環状金属層の対角またはその近傍に設けられている請求項２に記載のモジュール。 The module according to claim 2, wherein the first hole is provided diagonally or in the vicinity of the first annular metal layer.
  4. 　前記電子部品下および前記配線上のうち前記いずれか一方でない他方に設けられた第２層と、
    　前記第１絶縁層と前記第２層との間において前記電子部品および前記配線の他方を囲む第２環状金属層と、
    　前記第１絶縁層、前記第２層および前記第２環状金属層に囲まれた第２空間に充填され前記電子部品および前記配線の他方を封止する第２樹脂と、
    　を備える請求項１から３のいずれか一項に記載のモジュール。     A second layer provided under the electronic component and on the wiring, which is not one of the above,
    A second annular metal layer that surrounds the electronic component and the other of the wiring between the first insulating layer and the second layer.
    A second resin that fills a second space surrounded by the first insulating layer, the second layer, and the second annular metal layer and seals the other of the electronic component and the wiring.
    The module according to any one of claims 1 to 3.
  5. 　前記第１孔は前記第１環状金属層に設けられ、
    　前記第１絶縁層に前記第１空間と前記第２空間とをつなぐ第２孔が設けられ、
    　前記第２環状金属層に孔は設けられていない請求項４に記載のモジュール。     The first hole is provided in the first annular metal layer and is provided.
    The first insulating layer is provided with a second hole connecting the first space and the second space.
    The module according to claim 4, wherein the second annular metal layer is not provided with holes.
  6. 　前記第１孔は、前記第１環状金属層に設けられ、前記第１絶縁層および前記第１層には設けられておらず、
    　前記第２環状金属層に外部と前記第２空間とをつなぐ第２孔が設けられている請求項４に記載のモジュール。     The first hole is provided in the first annular metal layer, and is not provided in the first insulating layer and the first layer.
    The module according to claim 4, wherein the second annular metal layer is provided with a second hole connecting the outside and the second space.
  7. 　前記第１層は前記配線上に設けられた第２絶縁層であり、
    　前記第２絶縁層の上面に設けられ、前記第２絶縁層を貫通する第２貫通孔を介し前記配線と接続する電極を備える請求項１から６のいずれか一項に記載のモジュール。     The first layer is a second insulating layer provided on the wiring.
    The module according to any one of claims 1 to 6, further comprising an electrode provided on the upper surface of the second insulating layer and connected to the wiring through a second through hole penetrating the second insulating layer.
  8. 　第１絶縁層と、前記第１絶縁層の下面に搭載された電子部品と、前記第１絶縁層の上面に設けられ、前記第１絶縁層を貫通する第１貫通孔を介し前記電子部品と接続する配線と、前記電子部品下および前記配線上のいずれか一方に設けられた第１層と、前記第１絶縁層と前記第１層との間において対応する前記電子部品および前記配線のいずれか一方を囲む第１環状金属層と、を備え、前記第１絶縁層、前記第１層および前記第１環状金属層の少なくとも１つに、外部と、前記第１絶縁層、前記第１層および前記第１環状金属層に囲まれた第１空間と、をつなぐ第１孔が設けられた構造を形成する工程と、
    　前記構造の前記第１孔を介し、前記第１空間に前記対応する前記電子部品および前記配線のいずれか一方を封止する樹脂を充填する工程と、
    を含むモジュールの製造方法。     The first insulating layer, the electronic component mounted on the lower surface of the first insulating layer, and the electronic component provided on the upper surface of the first insulating layer through a first through hole that penetrates the first insulating layer. Any of the electronic component and the wiring corresponding to the wiring to be connected, the first layer provided under the electronic component and either on the wiring, and between the first insulating layer and the first layer. A first annular metal layer surrounding one of them is provided, and at least one of the first insulating layer, the first layer, and the first annular metal layer is provided with an external layer, the first insulating layer, and the first layer. And a step of forming a structure provided with a first hole connecting the first space surrounded by the first annular metal layer.
    A step of filling the first space with a resin that seals either the corresponding electronic component or the wiring through the first hole of the structure.
    How to manufacture a module, including.
  9. 　前記構造は、前記電子部品下および前記配線上の他方に設けられた第２層と、前記第１絶縁層と前記第２層との間において前記電子部品および前記配線の他方を囲む第２環状金属層と、を備え、前記第１孔は前記第１環状金属層に設けられ、前記第１絶縁層に、前記第１空間と、前記第１絶縁層、前記第２層および前記第２環状金属層に囲まれた第２空間と、をつなぐ第２孔が設けられ、前記第２環状金属層に孔は設けられておらず、
    　前記樹脂を充填する工程は、前記第１孔を介し前記第１空間に前記樹脂を充填し、前記第２孔を介し前記第１空間から前記第２空間に前記樹脂を充填する工程を含む請求項８に記載のモジュールの製造方法。
    　     The structure includes a second layer provided under the electronic component and on the other side of the wiring, and a second annular structure surrounding the electronic component and the other side of the wiring between the first insulating layer and the second layer. A metal layer is provided, and the first hole is provided in the first annular metal layer, and the first insulating layer is provided with the first space, the first insulating layer, the second layer, and the second annular. A second hole is provided to connect the second space surrounded by the metal layer, and the second annular metal layer is not provided with a hole.
    The step of filling the resin includes a step of filling the first space with the resin through the first hole and filling the resin from the first space to the second space through the second hole. Item 8. The method for manufacturing a module according to Item 8.
PCT/JP2020/008656 2019-03-29 2020-03-02 Module and method for manufacturing same WO2020202972A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183571A (en) * 2003-12-18 2005-07-07 Matsushita Electric Ind Co Ltd Electronic element package and manufacturing method therefor
JP2014200825A (en) * 2013-04-05 2014-10-27 富士電機株式会社 Structure of and method for pressurization/heating joint
JP2016031969A (en) * 2014-07-28 2016-03-07 ローム株式会社 Semiconductor device
WO2018110383A1 (en) * 2016-12-15 2018-06-21 株式会社村田製作所 Electronic module and method for producing electronic module

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183571A (en) * 2003-12-18 2005-07-07 Matsushita Electric Ind Co Ltd Electronic element package and manufacturing method therefor
JP2014200825A (en) * 2013-04-05 2014-10-27 富士電機株式会社 Structure of and method for pressurization/heating joint
JP2016031969A (en) * 2014-07-28 2016-03-07 ローム株式会社 Semiconductor device
WO2018110383A1 (en) * 2016-12-15 2018-06-21 株式会社村田製作所 Electronic module and method for producing electronic module

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