WO2021149562A1 - 昇圧回路および電圧発生装置 - Google Patents

昇圧回路および電圧発生装置 Download PDF

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Publication number
WO2021149562A1
WO2021149562A1 PCT/JP2021/000887 JP2021000887W WO2021149562A1 WO 2021149562 A1 WO2021149562 A1 WO 2021149562A1 JP 2021000887 W JP2021000887 W JP 2021000887W WO 2021149562 A1 WO2021149562 A1 WO 2021149562A1
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WIPO (PCT)
Prior art keywords
copper foil
insulating substrate
lead
foil pattern
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2021/000887
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English (en)
French (fr)
Japanese (ja)
Inventor
文仁 伊澤
裕也 山下
陽平 荒木
雅人 阿知原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to EP21744904.0A priority Critical patent/EP4096083A4/en
Priority to JP2021573092A priority patent/JP7209875B2/ja
Publication of WO2021149562A1 publication Critical patent/WO2021149562A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0256—Electrical insulation details, e.g. around high voltage areas
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/183—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components mounted in and supported by recessed areas of the PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742—Details of leads
    • H05K2201/1075—Shape details
    • H05K2201/10757—Bent leads

Definitions

  • the present invention relates to a booster circuit and a voltage generator that boost the voltage.
  • the voltage generator used when accelerating an electron beam with an electron beam processing machine, ion beam generator, electron microscope, etc. is equipped with a Cockcroft-Walton (CW) circuit as a circuit that converts AC voltage to DC voltage. ing.
  • CW Cockcroft-Walton
  • a plurality of insulating substrates provided with booster circuits are stacked, and the voltage is stepwise boosted in each booster circuit to generate a high DC voltage.
  • the booster circuit of the voltage generator is composed of low withstand voltage components, but the voltage becomes higher as it approaches the voltage output section. Therefore, a large potential difference is generated between the low voltage portion and the high voltage portion, and discharge is likely to occur between the insulating substrates. In order to prevent the occurrence of such a discharge, it is necessary to secure a sufficient dielectric strength, but in order to increase the dielectric strength, the voltage generator becomes large.
  • the electronic components at each stage of the booster circuit are integrally molded with a resin molding material to improve the insulation withstand capability between the insulating substrates and to reduce the size of the voltage generator. Has been realized.
  • the present invention has been made in view of the above, and an object of the present invention is to obtain a miniaturized booster circuit without increasing the weight of a plurality of stacked insulating substrates.
  • the present invention is a booster circuit for boosting an input voltage, in which a first component is arranged on a first main surface and a second component is provided. It includes a first insulating substrate arranged on a second main surface and a second insulating substrate on which a third component is arranged on a third main surface. Further, the booster circuit includes a first lead connected to the second component and a connecting line connecting the first insulating substrate and the second insulating substrate. In the booster circuit, the first insulating substrate and the second insulating substrate are stacked so that the second main surface faces the third main surface.
  • At least one of the first main surface and the second main surface has a first conductive pattern for connecting the first lead to the conductive member arranged on the first insulating substrate.
  • the first conductive pattern is arranged and covers the first lead forming portion, which is a bent portion of the first lead when the first insulating substrate is viewed from the first main surface side. It has been extended to the area.
  • a miniaturized booster circuit can be obtained without weighting a plurality of stacked insulating substrates.
  • the figure for demonstrating the potential difference between the stages of the CW circuit provided in the voltage generator which concerns on Embodiment 1. A perspective view showing a structure of a stage included in the voltage generator according to the first embodiment.
  • the figure which shows the simulation result by the electric field simulation model of FIG. The figure for demonstrating another configuration example of the stage provided in the voltage generator which concerns on Embodiment 2.
  • the figure for demonstrating the electric field concentration when the copper foil pattern which concerns on Embodiment 1 is arranged on either the upper surface or the lower surface of an insulating substrate, and the outer shape of a copper foil pattern is quadrangular
  • the figure for demonstrating the electric field concentration when the copper foil pattern which concerns on Embodiment 1 is arranged on either the upper surface or the lower surface of an insulating substrate, and the outer shape of a copper foil pattern is circular.
  • the figure for demonstrating the electric field concentration when the copper foil pattern which concerns on Embodiment 1 is arranged on both sides of an insulating substrate, and the outer shape of a copper foil pattern is a quadrangle
  • the figure for demonstrating the electric field concentration in the case where the copper foil pattern which concerns on Embodiment 1 is arranged on both sides of the insulating substrate, and the outer shape of the copper foil pattern is circular.
  • the Cockcroft-Walton circuit included in the voltage generator is referred to as a CW circuit.
  • FIG. 1 is a diagram showing a configuration of a CW circuit included in the voltage generator according to the first embodiment.
  • the voltage generator 100 which is a DC high voltage generator, includes a CW circuit 1 which is a booster circuit, boost transformers 3A and 3B, and an inverter circuit 2 which generates an AC voltage.
  • CW circuit 1 is a symmetrical inverse type CW circuit.
  • the voltage generator 100 uses, for example, the CW circuit 1 to generate a voltage of several tens of kV to several hundreds of kV.
  • the DC high voltage generated by the voltage generator 100 is used, for example, when an electron beam processing machine that performs processing by irradiating an object with an electron beam accelerates the electron beam.
  • the DC high voltage generated by the voltage generator 100 may be applied to an ion beam generator, an electron microscope, or the like.
  • CW circuit 1 is a multi-stage voltage doubler rectifier circuit. Each component of the CW circuit 1 is a component with a low withstand voltage, but the voltage is boosted by the CW circuit 1 and a high voltage is output from the output unit 13, so that the voltage applied to the CW circuit 1 is the output unit. It becomes higher as it approaches 13.
  • the boosting method, boosting ratio, voltage value, and the like of the CW circuit 1 described here are examples.
  • the CW circuit 1 may be any boosting type CW circuit.
  • the symmetrical inverse type CW circuit 1 is connected to two step-up transformers 3A and 3B connected to the inverter circuit 2.
  • the inverter circuit 2 is a full-bridge inverter composed of switching elements such as an IGBT (Insulated Gate Bipolar Transistor) and a MOSFET (Field Effect Transistor: Metal-Oxide-Semiconductor Field-Effect Transistor).
  • the inverter circuit 2 is driven at a frequency on the order of kHz.
  • the step-up transformers 3A and 3B boost the output of the inverter circuit 2 from ⁇ several kV to ⁇ several kV (for example, ⁇ 10 kV).
  • the step-up transformers 3A and 3B each have a primary winding and a secondary winding, and the secondary windings of the step-up transformers 3A and 3B are connected so as to be in series with each other.
  • the polarities of the windings in the step-up transformers 3A and 3B are indicated by black dots.
  • the secondary windings of the step-up transformers 3A and 3B are connected to each other on the black spot side.
  • Both terminals of the secondary winding of the step-up transformer 3A are the input terminals T1 and T2 of the CW circuit 1.
  • Both terminals of the secondary winding of the step-up transformer 3B are input terminals T2 and T3 of the CW circuit 1.
  • the input terminal T2 is connected to a fixed potential.
  • the CW circuit 1 is configured by using a plurality of diodes and a plurality of capacitors.
  • the CW circuit 1 includes a rectifier circuit unit 50 and a voltage doubler booster circuit unit 60.
  • the rectifier circuit unit 50 has a DC capacitor Ca and diodes Da1 and Da2
  • the voltage doubler booster circuit unit 60 has a DC capacitor Cb1, an AC capacitor Cb2 and Cb3, and diodes Db1 to Db4.
  • the first stage circuit simply constitutes the rectifier circuit unit 50.
  • the rectifier circuit unit 50 is connected to the input terminals T1 to T3, and the voltage booster circuit unit 60 is connected to the rectifier circuit unit 50 and the output unit 13.
  • the DC capacitor Ca is connected to the input terminal T2
  • the cathode of the diode Da1 is connected to the input terminal T1
  • the cathode of the diode Da2 is connected to the input terminal T3.
  • a plurality of voltage booster circuit units 60 are connected stepwise to the rectifier circuit unit 50. That is, in the CW circuit 1, the DC capacitors Ca and the diodes Da1 and Da2 constituting the rectifier circuit unit 50 are provided with the voltage booster circuit unit 60 including the DC capacitors Cb1, the AC capacitors Cb2 and Cb3, and the diodes Db1 to Db4. , Multiple connections are made in stages. With this configuration, the CW circuit 1 is a multi-stage voltage doubler rectifier circuit. The capacity of the DC capacitor Ca of the rectifier circuit unit 50 is set to twice the capacity of the DC capacitor Cb1 included in the voltage booster circuit unit 60.
  • the voltage booster circuit section 60 of the Nth stage (N is a natural number) of the voltage booster circuit section 60 is the voltage booster circuit section 60-N
  • the voltage booster circuit section 60-N and the voltage booster circuit are The unit 60- (N-1) is connected.
  • the configuration of the voltage booster circuit unit 60-N when the voltage booster circuit unit 60-N is on the output unit 13 side will be described.
  • the cathode of the diode Db1 and the cathode of the diode Db2 are connected at a connection point 61. Further, the anode of the diode Db3 and the anode of the diode Db4 are connected at the connection point 62. Further, the anode of the diode Db1 and the cathode of the diode Db3 are connected at the connection point 63, and the anode of the diode Db2 and the cathode of the diode Db4 are connected at the connection point 64.
  • the DC capacitor Cb1 is connected to the connection point 61 and the connection point 62.
  • the AC capacitor Cb2 of the voltage booster circuit section 60-N is connected to the connection point 63 of the voltage booster circuit section 60-N and the connection point 63 of the voltage booster circuit section 60- (N-1). ..
  • the AC capacitor Cb3 of the voltage booster circuit section 60-N is connected to the connection point 64 of the voltage booster circuit section 60-N and the connection point 64 of the voltage booster circuit section 60- (N-1). ..
  • the connection point 61 of the voltage booster circuit unit 60-N is the connection point 62 of the voltage booster circuit unit 60- (N-1).
  • the first-stage voltage booster circuit unit 60 is connected to the second-stage voltage doubler booster circuit unit 60 and the rectifier circuit unit 50.
  • the AC capacitor Cb2 is connected to the cathode of the input terminal T1 and the diode Da1
  • the AC capacitor Cb3 is connected to the cathode of the input terminal T3 and the diode Da2.
  • the connection point 61 is connected to the DC capacitor Ca.
  • the voltage output by the CW circuit 1 from the output unit 13 is used as, for example, a high voltage for generating an electron beam.
  • n indicates the number of voltage booster circuit units 60 in series.
  • FIG. 1 shows a case where the total number of series of the voltage doubler booster circuit unit 60 is 6.5 and the CW circuit 1 is a 12 times booster circuit.
  • FIG. 2 is a diagram for explaining the operating principle of the CW circuit included in the voltage generator according to the first embodiment.
  • the diodes Db1 and Db3 in the CW circuit 1 are shown by the diodes D102, D103, ..., D113 in order from the voltage input side, and the diodes Db2 and Db4 in the CW circuit 1 are shown on the voltage input side.
  • the diodes D202, D203, ..., D213 are shown in this order.
  • the DC capacitors Cb1 in the CW circuit 1 are indicated by DC capacitors C02, C03, ..., C07 in order from the voltage input side.
  • AC capacitors Cb2 in the CW circuit 1 are indicated by AC capacitors C11, C12, ..., C16 in order from the voltage input side, and the AC capacitors Cb3 in the CW circuit 1 are shown in order from the voltage input side. It is shown by AC capacitors C21, C22, ..., C26.
  • the diodes Da1 and Da2 of the rectifier circuit unit 50 are indicated by the diodes D101 and D201, and the DC capacitor Ca is indicated by the DC capacitor C01.
  • the voltage value described next to the connection point of the CW circuit 1 is the voltage value of the connection point.
  • the peak value e is a negative value.
  • the DC capacitor C01 is charged to the voltage e via the diode D101.
  • the AC capacitor C21 is charged to 1.92e via the diodes D101 and D202.
  • the reason why only the capacity of the DC capacitor C01 is double the capacity of other DC capacitors (2C) is to prevent the occurrence of surges.
  • the discharge charge amounts of the DC capacitors C01 to C07 connected in series are all equal, so that all the DC capacitors C01 to C07 The voltage across the is e, and the other voltage is 2e. Therefore, by setting the capacitance of only the first-stage DC capacitor C01 to 2C, the amount of charge charged in the normal state is all 2eC.
  • the terminal voltages of all the DC capacitors C01 to C07 become equal to zero, there is nothing abnormal, and the generation of surge voltage is prevented.
  • FIG. 3 is a diagram showing a mounting structure of a CW circuit included in the voltage generator according to the first embodiment.
  • FIG. 3 shows a cross-sectional view of a cylindrical outer peripheral container 30 in which a CW circuit is arranged, when the outer peripheral container 30 is cut in a plane including a tubular shaft.
  • the bottom surface side of the outer peripheral container 30 will be the lower side, and the side on which the stage 31A is arranged will be the upper side.
  • the CW circuit 1 of the voltage generator 100 is arranged in the grounded cylindrical outer peripheral container 30.
  • a bottom plate 7 is provided at the bottom of the outer peripheral container 30, and two step-up transformers 3A and 3B are arranged on the upper surface of the bottom plate 7.
  • FIG. 3 shows a case where the three stages 31A, 31B, and 31C are stacked at equal intervals in the outer peripheral container 30. Stage 31C is the first stage from the bottom, stage 31B is the second stage from the bottom, and stage 31A is the third stage from the bottom.
  • FIG. 3 shows a case where the stage 31C is arranged on the upper side of the bottom plate 7, the stage 31B is arranged on the upper side of the stage 31C, and the stage 31A is arranged on the upper side of the stage 31B.
  • the step-up transformers 3A and 3B are electrically connected to the stage 31C.
  • the stage 31C is electrically connected to the stage 31B via the connecting line 51X
  • the stage 31B is electrically connected to the stage 31A via the connecting line 51Y.
  • the connection line between the step-up transformers 3A and 3B and the connection line between the step-up transformers 3A and 3B and the stage 31C are not shown.
  • the stages 31A, 31B, and 31C are configured by using a plate-shaped insulating substrate 10, and a capacitor 4 and a diode 5 are mounted on each insulating substrate 10.
  • the lower surface of the insulating substrate 10 of the stage 31A faces the upper surface of the insulating substrate 10 of the stage 31B
  • the lower surface of the insulating substrate 10 of the stage 31B faces the upper surface of the insulating substrate 10 of the stage 31C.
  • one of the two opposing insulating substrates 10 is the first insulating substrate, and the other is the second insulating substrate.
  • the diode 5 is arranged on the upper surface of the insulating substrate 10, and the capacitor 4 is arranged on the lower surface of the insulating substrate 10. Either the diode 5 or the capacitor 4 may be arranged on the upper surface and the lower surface of the insulating substrate 10 included in the stages 31A to 31C.
  • the upper surface of the insulating substrate 10 and the diode 5 are connected by leads 9B, and the lower surface of the insulating substrate 10 and the capacitor 4 are connected by leads 9A.
  • the output voltages from the step-up transformers 3A and 3B are stepwise boosted by the stages 31C, 31B and 31A, and output from the output unit 13.
  • the stages 31A to 31C constituting the CW circuit 1 are provided with an input unit and an output unit for connecting the stages.
  • the output unit and the input unit other than the output unit 13 included in the stage 31A are not shown.
  • the output unit of the stage 31C and the input unit of the stage 31B are provided at the connection point with the connection line 51X.
  • the output unit of the stage 31B and the input unit of the stage 31A are provided at the connection point with the connection line 51Y.
  • the output unit of the stage 31C and the input unit of the stage 31B are electrically connected, and the output unit of the stage 31B and the input unit of the stage 31A are electrically connected.
  • the stages 31A to 31C may be stacked via resin spacers, or may be stacked by providing columns 6 between the stages and fixing them with bolts or the like via the columns 6 as shown in FIG. good.
  • the support column 6 may be a part of the outer peripheral container 30, or may have a different configuration from the outer peripheral container 30.
  • FIG. 4 is a diagram for explaining a potential difference between stages of a CW circuit included in the voltage generator according to the first embodiment.
  • the potential difference between the stages when the input voltage to the CW circuit 1 is boosted to ⁇ 10 kV, that is, the output of the full bridge inverter is boosted to ⁇ 10 kV by the step-up transformers 3A and 3B will be described.
  • the output voltage of the third stage becomes -120 kV by boosting by about -40 kV per stage.
  • the potential difference between ⁇ 40 kV in the input section of the stage 31B, which is the second stage, and ⁇ 120 kV in the output section of the stage 31A, which is the third stage is ⁇ 80 kV. Since the stages 31A to 31C are stacked at equal intervals, it can be said that the place where the potential difference is maximum is the place where discharge is most likely to occur.
  • the discharge will be explained here.
  • the likelihood of discharge is determined by the magnitude of the electric field, and the magnitude of the electric field discharged in the air is about 3 kV / mm.
  • the magnitude of the electric field is determined by the potential difference between two points, which are locations where discharge may occur (hereinafter referred to as discharge candidates), the distance between the two points, and the outer shape of the two points.
  • discharge candidates are locations where discharge may occur
  • the electric field is determined only by the potential difference and the distance. This state of space is called the equal electric field.
  • the magnitude of the electric field is 3 kV / mm.
  • the magnitude of the electric field is the potential difference between the two points that are candidates for discharge, and the distance between the two points. Determined by the outer shape.
  • the distance between the two points is shortened by devising the outer shape of at least one of the two points that are candidates for discharge. That is, in the CW circuit 1, the distance between the stages is reduced.
  • FIG. 5 is a perspective view showing the structure of the stage included in the voltage generator according to the first embodiment.
  • FIG. 6 is a side view showing the structure of the stage included in the voltage generator according to the first embodiment. 5 and 6 show the structure for one stage. Since the stages 31A to 31C have the same structure, the structure of the stage 31A will be described here.
  • FIG. 6 shows the structure of the stage 31A when the stage 31A is viewed from the direction A of FIG.
  • the stage 31A includes an insulating substrate 10, a capacitor 4, a diode 5, an input unit 14, and an output unit 13.
  • An example of the insulating substrate 10 is a printed circuit board.
  • the capacitor 4 and the diode 5 are arranged on both sides of the insulating substrate 10.
  • FIG. 5 shows a case where a plurality of diodes 5 are arranged on the upper surface of the insulating substrate 10 and a plurality of capacitors 4 are arranged on the lower surface of the insulating substrate 10.
  • the CW circuit 1 as a booster circuit is configured by fixing the insulating substrate 10 on which components such as the capacitor 4 and the diode 5 are mounted to the outer peripheral container 30 with an insulating material such as resin.
  • FIG. 5 also shows the arrangement positions of the capacitor 4 and the diode 5, the arrangement positions of the capacitor 4 and the diode 5 are not limited to those shown in FIG.
  • FIG. 7 is a diagram for explaining the positional relationship of the stages included in the voltage generator according to the first embodiment.
  • FIG. 8 is a diagram for explaining the distance between the parts of the stage shown in FIG. 7.
  • FIG. 7 shows a side view of the stages 31A and 31B
  • FIG. 8 schematically shows an enlarged region 20 of the stages 31A and 31B.
  • the insulating substrate of the stage 31A is referred to as an insulating substrate 10A
  • the insulating substrate of the stage 31B is referred to as an insulating substrate 10B.
  • a capacitor 4 as a component is arranged on the lower surface of the stage 31A on the upper stage side, and a diode 5 as a component is arranged on the upper surface of the stage 31B on the lower stage side.
  • the capacitor 4 and the diode 5 of the stage 31B face each other.
  • the upper surface of the insulating substrates 10A and 10B, which is the first insulating substrate, is the first main surface, and the lower surface is the second main surface.
  • the upper surface of the insulating substrates 10A and 10B, which is the second insulating substrate, is the third main surface, and the lower surface is the fourth main surface.
  • the first part is arranged on the first main surface, and the second part is arranged on the second main surface.
  • the third component is arranged on the third main surface, and the fourth component is arranged on the fourth main surface.
  • the first to fourth components may be a capacitor 4 or a diode 5.
  • the diode 5 arranged on the upper surface of the insulating substrate 10 is the first component
  • the capacitor 4 arranged on the lower surface of the insulating substrate 10 is the second component.
  • the diode 5 arranged on the upper surface of the insulating substrate 10 is the third component
  • the capacitor 4 arranged on the lower surface of the insulating substrate 10 is the fourth component.
  • the distance between the stages 31A and 31B is the distance between the capacitor 4 mounted on the lower surface of the insulating substrate 10A on the upper stage side and the diode 5 mounted on the upper surface of the insulating substrate 10B on the lower stage side. Closest between.
  • the distance between the capacitor 4 of the insulating substrate 10A and the diode 5 of the insulating substrate 10B is shown by the distance L0.
  • the electric field is relaxed by devising the outer shape of the insulating substrates 10A and 10B.
  • FIG. 9 is an enlarged view of a portion of the upper stage shown in FIG. 8 where a capacitor is arranged.
  • FIG. 10 is an enlarged view of a portion of the lower stage shown in FIG. 8 in which the diode is arranged. 9, FIG. 10, and FIGS. 11 to 13 described later schematically show the side surfaces of the stage when the stage is viewed from the A direction of FIG.
  • through holes are formed in the insulating substrate 10A from the upper surface to the lower surface.
  • a capacitor 4 is arranged on the lower surface of the insulating substrate 10A, and a lead 9A connected to the capacitor 4 is passed through a through hole from the lower surface side of the insulating substrate 10A and pulled out to the upper surface side of the insulating substrate 10A.
  • a copper foil pattern 11A which is an example of a conductive pattern, is arranged around a through hole on the upper surface of the insulating substrate 10A.
  • the copper foil pattern 11A and the lead 9A are joined by the solder 12A on the upper surface of the insulating substrate 10A.
  • the capacitor 4 is joined to the conductive portion (not shown) arranged on the insulating substrate 10A.
  • through holes are formed in the insulating substrate 10B from the upper surface to the lower surface.
  • a diode 5 is arranged on the upper surface of the insulating substrate 10B, and a lead 9B connected to the diode 5 is passed through a through hole from the upper surface side of the insulating substrate 10B and pulled out to the lower surface side of the insulating substrate 10B.
  • a copper foil pattern 11B which is an example of a conductive pattern, is arranged on the lower surface of the insulating substrate 10B. The copper foil pattern 11B and the lead 9B are joined by the solder 12B on the lower surface of the insulating substrate 10B. As a result, the diode 5 is bonded to the insulating substrate 10B.
  • the copper foil pattern 11A is provided on the upper surface or the lower surface of the insulating substrate 10A. Further, the copper foil pattern 11B is provided on the upper surface or the lower surface of the insulating substrate 10B. Further, the copper foil pattern 11A may be provided on both the upper surface and the lower surface of the insulating substrate 10A. Further, the copper foil pattern 11B may be provided on both the upper surface and the lower surface of the insulating substrate 10B. That is, the copper foil pattern 11A is provided on at least one of the upper surface and the lower surface of the insulating substrate 10A, and the copper foil pattern 11B is provided on at least one of the upper surface and the lower surface of the insulating substrate 10B.
  • the copper foil pattern 11A is the first conductive pattern and the copper foil pattern 11B is the second conductive pattern.
  • the copper foil pattern 11B is the first conductive pattern and the copper foil pattern 11A is the second conductive pattern.
  • Discharge is unlikely to occur from the body of the diode 5 covered with the resin of the insulator and the body of the capacitor 4 covered with the resin of the insulator because the body is an insulator, but from the leads 9A and 9B which are conductors. Is prone to discharge. Further, when mounting the capacitor 4 on the insulating substrate 10A, it is necessary to bend the lead 9A, and when mounting the diode 5 on the insulating substrate 10B, it is necessary to bend the lead 9B.
  • the bent portion of the lead 9A (hereinafter referred to as the lead forming portion 21A) and the bent portion of the lead 9B (hereinafter referred to as the lead forming portion 21B) may have an acute angle and tend to have a high electric field.
  • the lead forming portion 21A has the first conductive pattern
  • the lead forming portion 21B has the second conductive pattern. be.
  • the lead forming portion 21B has the first conductive pattern
  • the lead forming portion 21A has the second conductive pattern. be.
  • FIG. 11 is a diagram for explaining the configuration of the copper foil pattern of the stage included in the voltage generator according to the first embodiment.
  • the copper foil pattern 11A cannot be arranged in the through hole itself on the stage 31A because the through hole is hollow, but in the present embodiment, the copper foil pattern 11A is also arranged in the place where the through hole is provided.
  • the configuration of the stage 31A will be described as being performed. Therefore, the area of the copper foil pattern 11A is the sum of the area of the through hole when the through hole is viewed from above and the area of the copper foil pattern 11A itself when the copper foil pattern 11A is viewed from above. be.
  • the copper foil pattern 11B cannot be arranged in the through hole itself on the stage 31B because the through hole is hollow, but in the present embodiment, the copper foil pattern 11B is also arranged in the place where the through hole is provided.
  • the configuration of the stage 31B will be described as being performed. Therefore, the area of the copper foil pattern 11B is the sum of the area of the through hole when the through hole is viewed from above and the area of the copper foil pattern 11B itself when the copper foil pattern 11B is viewed from above. be.
  • the copper foil patterns 11A and 11B of the present embodiment are applied to the lead forming portions 21A and 21B having a high electric field.
  • the copper foil pattern 11A at the portion where the capacitor 4 is joined by the solder 12A is spread so as to cover the lead forming portion 21A which may be the starting point of electric discharge. ing. That is, in the stage 31A, the copper foil pattern 11A is arranged so that the lead forming portion 21A cannot be seen by the copper foil pattern 11A when the stage 31A is viewed from above.
  • the copper foil pattern 11B at the portion where the diode 5 is joined by the solder 12B covers the lead forming portion 21B which may be the starting point of the discharge. It is spread to. That is, in the stage 31B, the copper foil pattern 11B is arranged so that the lead forming portion 21B cannot be seen by the copper foil pattern 11B when the stage 31B is viewed from below.
  • the area of the copper foil pattern 11A on the insulating substrate 10A is such that the lead 9A can cover the cut surface when the lead 9A is cut on the surface parallel to the insulating substrate 10A.
  • the area of the copper foil pattern 11A is wider than the lead cross-sectional area which is the cross-sectional area of the lead 9A, there is an effect of relaxing the electric field, the area of the copper foil pattern 11A is wider than the lead cross-sectional area, and the lead forming portion 21A The closer it is to the copper foil pattern 11A, the greater the effect of relaxing the electric field.
  • the distance from the upper surface or the lower surface of the insulating substrate 10A to the bent portion of the lead 9A is a distance L4, if (distance L4) 2 ⁇ (area of the copper foil pattern 11A), the effect of relaxing the electric field becomes larger. ..
  • the size of the copper foil pattern 11B on the insulating substrate 10B is such that the cut surface can be covered when the lead 9B is cut on a surface parallel to the insulating substrate 10B, for example.
  • the copper foil pattern 11A can relax the electric field of the lead forming portion 21A
  • the copper foil pattern 11B can relax the electric field of the lead forming portion 21B. Since the voltage generator 100 can relax the electric fields of the lead forming portions 21A and 21B, the distance L1 of the insulating substrates 10A and 10B can be brought closer.
  • the copper foil pattern 11A has a larger area than the one that generates a high electric field (for example, the lead forming portion 21A), the more effective the electric field relaxation is, and the copper foil pattern 11B has the one that generates a high electric field (for example, the lead forming portion 21A).
  • the copper foil pattern 11A may be arranged on at least one of the upper surface and the lower surface of the insulating substrate 10A. Further, the copper foil pattern 11B may be arranged on at least one of the upper surface and the lower surface of the insulating substrate 10B.
  • the copper foil pattern 11A and the lead forming portion 21A are arranged more than when the copper foil pattern 11A is arranged only on the upper surface of the insulating substrate 10A. the distance is close. Therefore, the electric field relaxation effect of the lead forming portion 21A is greater when the copper foil pattern 11A is arranged only on the lower surface than when it is arranged only on the upper surface of the insulating substrate 10A.
  • the copper foil pattern 11B and the lead forming portion are arranged more than when the copper foil pattern 11B is arranged only on the lower surface of the insulating substrate 10B.
  • the distance to 21B is short. Therefore, the electric field relaxation effect of the lead forming portion 21B is greater when the copper foil pattern 11B is arranged only on the upper surface than when it is arranged only on the lower surface of the insulating substrate 10B.
  • the electric field relaxation effect on the lead forming portion 21A is the same when the copper foil pattern 11A is arranged only on the lower surface of the insulating substrate 10A and when the copper foil pattern 11A is arranged on both sides of the insulating substrate 10A. Become.
  • the electric field relaxation effect on the lead forming portion 21B is the same when the copper foil pattern 11B is arranged only on the upper surface of the insulating substrate 10B and when the copper foil pattern 11B is arranged on both sides of the insulating substrate 10B. It becomes.
  • the electric field of the copper foil pattern 11A itself may become a problem, and by arranging the copper foil pattern 11A having the same area on both sides of the insulating substrate 10A, the electric field of the copper foil pattern 11A itself may become a problem. Can be alleviated.
  • the electric field of the copper foil pattern 11B itself may become a problem, and by arranging the copper foil pattern 11B having the same area on both sides of the insulating substrate 10B, the electric field of the copper foil pattern 11B itself may become a problem. Can be alleviated.
  • FIG. 12 is a diagram for explaining the configuration of the copper foil pattern of the stage included in the voltage generator of the comparative example.
  • the voltage generator of the comparative example includes stages 131A and 131B.
  • a small copper pattern 111B is arranged on the insulating substrate 10A in order to facilitate heat transfer to the solder 12A when the insulating substrate 10A and the capacitor 4 are joined by the solder 12A. Further, in order to facilitate heat transfer to the solder 12B when the insulating substrate 10B and the diode 5 are joined by the solder 12B, only a small copper pattern 111B is arranged on the insulating substrate 10B.
  • the copper foil pattern 11A having an area of 400 mm 2 or more is arranged on the insulating substrate 10A, and the copper foil pattern 11B having an area of 400 mm 2 or more is the insulating substrate 10B. Is located in.
  • the upper surface shape of the copper foil patterns 11A and 11B is preferably circular rather than an acute-angled square in order to relax the electric field of the copper foil patterns 11A and 11B itself.
  • the voltage generator of the comparative example cannot relax the electric fields of the lead forming portions 21A and 21B. Therefore, the distance L2 of the insulating substrates 10A and 10B included in the voltage generator of the comparative example must be longer than the distance L1 of the insulating substrates 10A and 10B included in the voltage generator 100. Since the distance L1 between the insulating substrates 10A and 10B can be shortened with respect to the voltage generator 100, it can be made smaller than the voltage generator of the comparative example.
  • the electric field of the copper foil patterns 11A and 11B itself may be a problem, and the electric field can be alleviated by arranging the copper foil patterns 11A and 11B on both sides of the insulating substrates 10A and 10B. Is as described above.
  • the outer shape of the copper foil patterns 11A and 11B is preferably circular rather than an acute-angled square. The reason for this will be explained. Since the copper foil patterns 11A and 11B have the same structure, the configuration of the copper foil pattern 11A will be described below.
  • FIG. 19 is a diagram for explaining electric field concentration when the copper foil pattern according to the first embodiment is arranged on either the upper surface or the lower surface of the insulating substrate and the outer shape of the copper foil pattern is quadrangular.
  • FIG. 20 is a diagram for explaining electric field concentration when the copper foil pattern according to the first embodiment is arranged on either the upper surface or the lower surface of the insulating substrate and the outer shape of the copper foil pattern is circular.
  • FIG. 21 is a diagram for explaining electric field concentration when the copper foil pattern according to the first embodiment is arranged on both sides of the insulating substrate and the outer shape of the copper foil pattern is quadrangular.
  • FIG. 22 is a diagram for explaining electric field concentration when the copper foil pattern according to the first embodiment is arranged on both sides of the insulating substrate and the outer shape of the copper foil pattern is circular.
  • FIG. 19 describes a case where the copper foil pattern 11A is a copper foil pattern 11P
  • FIG. 20 describes a case where the copper foil pattern 11A is a copper foil pattern 11Q
  • FIG. 21 describes a case where the copper foil pattern 11A is a copper foil pattern 11Ra, 11Rb
  • FIG. 22 describes a case where the copper foil pattern 11A is a copper foil pattern 11Sa, 11Sb.
  • 19 to 22 show perspective views of the copper foil patterns 11P, 11Q, 11Ra, Rb, 11Sa, 11Sb.
  • the outer shape of the copper foil pattern 11P is quadrangular. Electric field concentration is more likely to occur in the sharp-angled portion 301 than in the case where the outer shape is circular.
  • the acute-angled portion 301 is a portion of the end portion of the copper foil pattern 11P that has an acute-angled portion. Further, when the thickness of the copper foil pattern 11P is as thin as 35 ⁇ m, electric field concentration is likely to occur in the copper foil pattern 11P due to this thinness as well.
  • the copper foil pattern 11P may have a right-angled portion in which the end portion of the copper foil pattern 11P is at a right angle instead of the acute-angled portion 301.
  • the outer shape of the copper foil pattern 11Q As in the copper foil pattern 11Q shown in FIG. 20, when the copper foil pattern 11Q is arranged on either the upper surface or the lower surface of the insulating substrate 10A and the outer shape of the copper foil pattern 11Q is circular, the outer shape is circular. There is no sharp corner, and there is no electric field concentration at the sharp corner. Also in this case, when the thickness of the copper foil pattern 11Q is as thin as 35 ⁇ m, electric field concentration is likely to occur due to this thinness.
  • the copper foil pattern 11Ra shown in FIG. 21 is a copper foil pattern arranged on the upper surface of the insulating substrate 10A, and the copper foil pattern 11Rb is a copper foil pattern arranged on the lower surface of the insulating substrate 10A. That is, the insulating substrate 10A (not shown in FIG. 21) is arranged between the copper foil patterns 11Ra and 11Rb.
  • FIG. 21 shows a case where the thickness of the copper foil patterns 11Ra and 11Rb is 35 ⁇ m and the thickness of the insulating substrate 10A is 1.6 mm.
  • the copper foil patterns 11Ra and 11Rb have the same top surface area and the same top surface shape.
  • the copper foil patterns 11Ra and 11Rb are arranged on both sides of the insulating substrate 10A as in the copper foil patterns 11Ra and 11Rb shown in FIG. 21, the copper foil patterns 11Ra and 11Rb on both sides have the same potential.
  • the copper foil patterns 11Ra and 11Rb can be regarded as one metal block. Therefore, if the outer shape of the copper foil patterns 11Ra, 11Rb is quadrangular, the electric field concentration is more likely to occur in the acute angle portion 301 than in the case where the outer shape is circular, but the electric field concentration due to the thinness of the copper foil patterns 11Ra, 11Rb can be prevented. can.
  • the copper foil pattern 11Sa shown in FIG. 22 is a copper foil pattern arranged on the upper surface of the insulating substrate 10A, and the copper foil pattern 11Sb is a copper foil pattern arranged on the lower surface of the insulating substrate 10A. That is, the insulating substrate 10A (not shown in FIG. 22) is arranged between the copper foil patterns 11Sa and 11Sb.
  • FIG. 22 shows a case where the thickness of the copper foil patterns 11Sa and 11Sb is 35 ⁇ m and the thickness of the insulating substrate 10A is 1.6 mm.
  • the copper foil patterns 11Sa and 11Sb have the same top surface area and the same top surface shape.
  • the copper foil patterns 11Sa and 11Sb are arranged on both sides of the insulating substrate 10A as in the copper foil patterns 11Sa and 11Sb shown in FIG. 22, the copper foil patterns 11Sa and 11Sb on both sides have the same potential.
  • the copper foil patterns 11Sa and 11Sb can be regarded as one metal block.
  • the outer shape of the copper foil patterns 11Sa and 11Sb is circular. Therefore, in the case of the copper foil patterns 11Sa and 11Sb, both the electric field concentration due to the thinness of the copper foil patterns 11Sa and 11Sb and the electric field concentration due to the acute angle portion can be prevented.
  • FIG. 13 is a diagram for explaining an electric field simulation model in the lead forming portion of the lead included in the voltage generator according to the first embodiment.
  • FIG. 14 is a diagram showing a simulation result by the electric field simulation model of FIG.
  • the shortest distance between the lead forming portions 21A and 21B is 10 mm.
  • the distance between the copper foil patterns 11A and 11B is 40 mm.
  • the potential difference between the copper foil patterns 11A and 11B is 30 kV.
  • the copper foil pattern 11A and the lead 9A are in a conductive state.
  • the copper foil pattern 11B and the lead 9B are in a conductive state.
  • the simulation result shown in FIG. 14 is the electric field strength of the lead forming portions 21A and 21B when the widths of the copper foil patterns 11A and 11B are changed by using the electric field simulation model shown in FIG.
  • the maximum electric field values in the lead forming portions 21A and 21B when the pattern widths of the copper foil patterns 11A and 11B are 10 mm and 20 mm, and the lead forming when the copper foil patterns 11A and 11B are not present.
  • the maximum electric field values in parts 21A and 21B are shown.
  • the pattern width of the copper foil patterns 11A and 11B 20 mm
  • the simulation result of FIG. 14 shows the maximum electric field value when the maximum value of the electric field when the copper foil patterns 11A and 11B are not present is standardized to 1.
  • the capacitor 4 and the diode 5 which are the components of the voltage generator 100 are components having a low withstand voltage, but since the voltage is boosted in the CW circuit 1, the voltage becomes higher as it approaches the output unit 13. It becomes. Therefore, in the voltage generator 100, a low voltage section and a high voltage section are generated, and a large potential difference is generated between the low voltage section and the high voltage section.
  • the distance between the two points can be shortened by devising the outer shape of at least one of the two discharge candidate points. Discharge can be suppressed. That is, by expanding the copper foil patterns 11A and 11B, even if the lead forming portions 21A and 21B are brought closer to each other, the discharge in the lead forming portions 21A and 21B can be suppressed. As a result, the distance between the stages 31A and 31B can be shortened while suppressing the discharge, so that the voltage generator 100 can be miniaturized. Further, since it is not necessary to integrally mold the electronic component with the resin molding material, it is possible to suppress the weight increase of the voltage generator 100.
  • the CW circuit In the CW circuit, one capacitor and the other capacitor connected in series with it are electrically connected at the connection, a diode is connected to the connection, and the connection is at the end of each capacitor. There is a circuit that relaxes the electric field at the connection by arranging it between the electrodes. In this CW circuit, the electric field relaxation effect is not effective unless the connection portion is arranged so as not to protrude between the electrodes of the capacitor. Further, this CW circuit is difficult to apply to a radial type capacitor, and the mounting method is limited depending on the type of capacitor. Further, if the components are not arranged only on the same surface on the insulating substrate, there is no effect, so that the area of the insulating substrate becomes large.
  • the capacitor 4 of the CW circuit 1 may be an axial type or a radial type.
  • components such as a capacitor 4 and a diode 5 can be arranged on both sides of the insulating substrate 10A and both sides of the insulating substrate 10B. Therefore, the substrate sizes of the insulating substrate 10A and the insulating substrate 10B can be reduced.
  • the miniaturized CW circuit 1 can be obtained without increasing the weight of the stacked insulating substrates 10A and 10B.
  • the copper foil pattern 11B extends to a region covering the lead forming portion 21B of the leads 9B. Therefore, it is possible to obtain a further miniaturized CW circuit 1 without increasing the weight of the stacked insulating substrates 10A and 10B.
  • Embodiment 2 Next, a second embodiment of the present invention will be described with reference to FIGS. 15 to 18.
  • the distance between the lead forming portion 21A and the copper foil pattern 11A is made closer than that in the first embodiment. Further, the distance between the lead forming portion 21B and the copper foil pattern 11B is made closer than that in the case of the first embodiment.
  • FIG. 15 is a diagram for explaining a configuration of a stage included in the voltage generator according to the second embodiment.
  • components that achieve the same functions as the stages 31A and 31B of the first embodiment shown in FIG. 11 are designated by the same reference numerals, and redundant description will be omitted.
  • stage 32A lead 19A is used instead of lead 9A, and in stage 32B, lead 19B is used instead of lead 9B.
  • the lead 19A is a lead having a shorter length of a portion extending perpendicularly to the copper foil pattern 11A than the lead 9A.
  • the lead 19B is a lead having a shorter length of a portion extending perpendicularly to the copper foil pattern 11B than the lead 9B. Therefore, in the stage 32A, the distance between the lead forming portion 21A and the copper foil pattern 11A is shorter than that in the stage 31A. Further, in the stage 32B, the distance between the lead forming portion 21B and the copper foil pattern 11B is shorter than that in the stage 31B.
  • the cross-sectional area of the lead 19A is the same as the cross-sectional area of the lead 9A, and the cross-sectional area of the lead 19B is the same as the cross-sectional area of the lead 9B.
  • the length of the portion extending perpendicularly to the copper foil pattern 11A is shortened by bringing the connection position between the capacitor 4 and the lead 19A closer to the insulating substrate 10A.
  • the capacitor 4 and the lead 19A are connected at a position closer to the insulating substrate 10A than the central portion in the height direction of the capacitor 4.
  • the length of the portion extending vertically to the copper foil pattern 11B is shortened by bringing the connection position between the diode 5 and the lead 19B closer to the insulating substrate 10B.
  • the diode 5 and the lead 19B are connected at a position closer to the insulating substrate 10B than the central portion in the height direction of the diode 5.
  • the distance L3 of the insulating substrates 10A and 10B can be made shorter than the distance L1 of the insulating substrates 10A and 10B described in the first embodiment.
  • FIG. 16 is a diagram for explaining an electric field simulation model in the lead forming portion of the lead included in the voltage generator according to the second embodiment.
  • FIG. 17 is a diagram showing a simulation result by the electric field simulation model of FIG.
  • the shortest distance between the lead forming portions 21A and 21B is 10 mm.
  • the distance between the copper foil patterns 11A and 11B is 20 mm.
  • the potential difference between the copper foil patterns 11A and 11B is 30 kV.
  • the copper foil pattern 11A and the lead 91A are in a conductive state.
  • the copper foil pattern 11B and the lead 19B are in a conductive state.
  • the simulation result shown in FIG. 17 is the electric field strength of the lead forming portions 21A and 21B when the widths of the copper foil patterns 11A and 11B are changed by using the electric field simulation model shown in FIG.
  • the maximum electric field values in parts 21A and 21B are shown.
  • the pattern width of the copper foil patterns 11A and 11B 20 mm
  • the simulation result of FIG. 17 shows the maximum electric field value when the maximum value of the electric field when the copper foil patterns 11A and 11B are not present is standardized to 1.
  • FIG. 18 is a diagram for explaining another configuration example of the stage included in the voltage generator according to the second embodiment.
  • the configuration of the stage 33B which is a modification of the stage 32B, will be described.
  • the stage 33B includes an insulating substrate 10X, a diode 5, a lead 9X, a copper foil pattern 11X, and a solder 12X. That is, the stage 33B includes an insulating substrate 10X instead of the insulating substrate 10B, a lead 9X instead of the lead 9B, a copper foil pattern 11X instead of the copper foil pattern 11B, and a solder 12X instead of the solder 12B. I have.
  • the insulating substrate 10X is different from the insulating substrate 10B in that a hole capable of accommodating the diode 5 is formed as compared with the insulating substrate 10B. It is assumed that the lead 9X includes a lead forming unit 21X. The cross-sectional area of the lead 9X is the same as the cross-sectional area of the lead 9B.
  • the diode 5 is fitted into the hole provided in the insulating substrate 10X, and then the insulating substrate 10X and the diode 5 are electrically connected by the lead 9X.
  • the copper foil pattern 11X is arranged between the insulating substrate 10X and the leads 9X. Specifically, a portion of the lead 9X extending in a direction parallel to the upper surface of the insulating substrate 10X is joined to the upper surface of the insulating substrate 10X.
  • the copper foil pattern 11X is arranged around the hole into which the diode 5 is fitted, and the lead 9X is arranged on the copper foil pattern 11X. That is, when the stage 33B is viewed from below, the copper foil pattern 11X is spread so as to cover the lead 9X which is a discharge candidate. The copper foil pattern 11X does not have to cover the entire lead 9X. In this case, the copper foil pattern 11X is expanded so as to cover the lead forming portion 21X, which is likely to be the starting point of electric discharge when the stage 33B is viewed from below.
  • the copper foil pattern 11X and the lead 9X are joined by solder 12X.
  • a hole structure such as stage 33B may be applied to stage 32A. That is, even if a hole like the stage 33B is provided in the stage 32A, the capacitor 4 is fitted in the hole, and then the insulating substrate 10A and the capacitor 4 are electrically connected by the lead 9A. good. In this case, the portion of the lead 9A extending in the direction parallel to the upper surface of the insulating substrate 10A is joined to the upper surface of the insulating substrate 10A.
  • the hole provided in the stage 32A is the first hole and the hole provided in the stage 33B is the second hole. It's a hole.
  • the hole provided in the stage 33B is the first hole, and the hole provided in the stage 32A is the second hole. It's a hole.
  • stage 33B By configuring the stage 33B as shown in FIG. 18, it is possible to bring the lead 9X and the lead forming portion 21X closer to the copper foil pattern 11X. Therefore, the distance between the stacked stages can be shortened.
  • solder 12X When joining the solder 12X to the insulating substrate 10X, the solder 12X may be joined to the land pattern on the surface, or through holes are formed as in the insulating substrates 10A and 10B of the first embodiment to insulate. Solder 12X may be bonded from the lower surfaces of the substrates 10A and 10B.
  • any lead component may be embedded in the insulating substrate 10X regardless of the type of component.
  • the capacitor 4 may be embedded in the insulating substrate 10X.
  • the distance between the edge of the lead forming portion 21X arranged on the insulating substrate 10X and the copper foil pattern 11X differs depending on the size of the component. For example, when the diode 5 embedded in the insulating substrate 10X is thicker than the insulating substrate 10X, the diode 5 protrudes from the upper surface of the insulating substrate 10X, so that the distance between the edge of the lead forming portion 21X and the copper foil pattern 11X becomes long. .. In the case of a film capacitor having a width of 100 mm and a diameter of ⁇ 20 mm, the distance between the edge of the lead forming portion 21X and the copper foil pattern 11X is 10 mm.
  • the configuration of the first embodiment makes it possible to make the distance between the stages closer than before, and the configuration of the second embodiment makes it possible to make the distance between the stages even closer.
  • the voltage generator 100 can be made smaller than that of the first embodiment.
  • the copper foil patterns 11A and 11B are arranged on both sides of the insulating substrates 10A and 10B, respectively, the copper foil patterns 11A and 11B on both sides have the same area, and the outer shapes of the copper foil patterns 11A and 11B are circular.
  • the copper foil patterns 11A and 11B can relax both the electric field of the lead forming portions 21A and 21B and the electric field of the end face portion which is the side surface of the copper foil patterns 11A and 11B.
  • the copper foil patterns 11A and the copper foil pattern 11Rb shown in FIG. 21 may not always have the same area.
  • the copper foil pattern 11Sa and the copper foil pattern 11Sb shown in FIG. 22 may not always have the same area.
  • the copper foil pattern arranged on the upper surface of the insulating substrate is designed to be larger than the copper foil pattern arranged on the lower surface, and the copper foil pattern arranged on the upper surface of the insulating substrate is used as the lower surface.
  • the copper foil pattern is arranged so that the copper foil pattern arranged in the can be covered. Since the copper foil patterns 11A and 11B have the same structure, the configuration of the copper foil pattern 11A will be described below.
  • FIG. 23 is a diagram showing the configuration of the copper foil pattern according to the third embodiment.
  • FIG. 23 describes a case where the copper foil pattern 11A is the copper foil patterns 11Ta and 11Tb. Since the copper foil patterns 11Ta and 11Tb have manufacturing variations, it is difficult to make the upper surfaces of the copper foil patterns 11Ta and 11Tb completely the same area and shape. Therefore, the area and shape of the copper foil patterns 11Ta and 11Tb are designed in advance in consideration of manufacturing variations. That is, the area and shape of the copper foil patterns 11Ta and 11Tb are designed so that the entire surface of the copper foil pattern 11Tb can be covered by the copper foil pattern 11Ta when viewed from the upper surface side of the copper foil pattern 11Ta. ..
  • the copper foil patterns 11Ta and 11Tb are arranged so that the entire surface of the copper foil pattern 11Tb can be covered by the copper foil pattern 11Ta.
  • the end face portion 302 of the copper foil pattern 11Tb is covered with the copper foil pattern 11Ta when viewed from the upper surface side of the copper foil pattern 11Ta.
  • the copper foil patterns 11Ta and 11Tb can relax the electric field of the lead forming portions 21A and 21B and the electric field of the end face portion 302 of the copper foil pattern 11Tb arranged on the lower surface.
  • the outer shape of the copper foil patterns 11Ta and 11Tb, that is, the upper surface may be circular or quadrangular.
  • the electric field relaxation method using the copper foil patterns 11Ta and 11Tb is a method of preferentially relaxing the electric field of the end face portion 302 of the copper foil pattern 11Tb arranged on the lower surface.
  • the copper foil pattern 11Ta is farther from the lead forming portion 21A than the copper foil pattern 11Tb. Therefore, even if a partial discharge occurs between the end face portion of the copper foil pattern 11Ta and the lead forming portion 21A, a flashover, that is, a complete discharge is unlikely to occur because it is via the insulating substrate 10A.
  • the electric field of the end face portion 302 of the copper foil pattern 11Tb can be relaxed because the copper foil pattern 11A can relax the electric field of the lead forming portion 21A. The reason is the same.
  • the electric field of the end surface portion 302 of the lower surface copper foil pattern 11Tb is made inconspicuous by the upper surface copper foil pattern 11Ta arranged so as to include the lower surface copper foil pattern 11Tb. Can be done.
  • the copper foil pattern 11Ta arranged on the upper surface of the insulating substrate 10A is designed to be larger than the copper foil pattern 11Tb arranged on the lower surface.
  • the copper foil patterns 11Ta and 11Tb are arranged so as to cover the entire copper foil pattern 11Tb.
  • the distance between the stages can be made closer than in the case of the first embodiment. Therefore, the voltage generator 100 can be made smaller than that of the first embodiment.
  • Embodiment 4 Next, the fourth embodiment will be described with reference to FIGS. 24 to 26.
  • solder is applied to the outer peripheral portion of the copper foil pattern arranged on the upper surface of the insulating substrate 10A to relax the electric field at the end face portion of the copper foil pattern arranged on the upper surface of the insulating substrate 10A. .. Since the copper foil patterns 11A and 11B have the same structure, the configuration of the copper foil pattern 11A will be described below.
  • FIG. 24 is a top view showing the configuration of the copper foil pattern according to the fourth embodiment.
  • FIG. 25 is a perspective view showing the configuration of the copper foil pattern according to the fourth embodiment.
  • FIG. 26 is a perspective view showing the configuration of the copper foil pattern when the copper foil pattern shown in FIG. 25 is cut along the line BB. 24 to 26 show a case where the copper foil pattern 11A is the copper foil pattern 11U. In FIG. 26, one of the cut copper foil patterns 11U is shown, and the other is omitted.
  • the copper foil pattern 11U includes a solder portion 15 and a copper foil portion 16.
  • the copper foil portion 16 has a circular shape when the copper foil pattern 11U is viewed from the upper surface.
  • the solder portion 15 is arranged in an annular region which is an outer peripheral portion of the copper foil portion 16.
  • a circular copper foil portion 16 is formed on the upper surface of the insulating substrate 10A.
  • a resist is applied to the upper surface of the insulating substrate 10A so as to cover the entire upper surface of the insulating substrate 10A.
  • the resist is peeled off only in the annular region which is the outer peripheral portion of the copper foil portion 16.
  • the resist of the insulating substrate 10A is peeled off only at the end of the copper foil portion 16.
  • the solder is applied only to the annular region, which is the region where the resist has been peeled off.
  • the solder piled up in the annular region is the solder portion 15. After the solder portion 15 is formed, the remaining resist is peeled off from the insulating substrate 10A.
  • the solder portion 15 is piled up at a position that becomes the end face portion of the copper foil portion 16, so that the copper foil pattern 11U The position that becomes the end face becomes thicker. As a result, the electric field at the end face portion of the copper foil pattern 11U is relaxed. When the solder is piled up, the electric field can be further relaxed by piling up the solder portion 15 so as not to have an acute angle.
  • the copper foil pattern 11U may be arranged on both sides of the insulating substrate 10A.
  • the solder portions 15 are arranged on both sides of the insulating substrate 10A.
  • the solder portion 15 may be arranged only on one surface of the upper surface and the lower surface of the insulating substrate 10A.
  • the copper foil pattern 11U arranged on the upper surface may be larger than or the same size as the copper foil pattern 11U arranged on the lower surface. ..
  • the upper surface of the copper foil portion 16 may be a quadrangle.
  • the solder portion 15 has a square ring shape. Further, the solder portion 15 may be applied to the copper foil pattern described in the first to third embodiments.
  • the copper foil portion 16 may not be provided below the solder portion 15.
  • the copper foil portion 16 is formed to be one size smaller, and the annular solder portion 15 is formed so as to come into contact with the end face portion of the copper foil portion 16 in the outer region of the copper foil portion 16.
  • the solder portion 15 is provided in the outer peripheral region region of the copper foil pattern 11U, even if the copper foil portion 16 is thin, the end face portion of the copper foil pattern 11U can be used. It is possible to relax the electric field.
  • the configuration shown in the above-described embodiment shows an example of the content of the present invention, can be combined with another known technique, and is one of the configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)
  • Inverter Devices (AREA)
PCT/JP2021/000887 2020-01-24 2021-01-13 昇圧回路および電圧発生装置 Ceased WO2021149562A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP21744904.0A EP4096083A4 (en) 2020-01-24 2021-01-13 BOOSTER CIRCUIT AND VOLTAGE GENERATION DEVICE
JP2021573092A JP7209875B2 (ja) 2020-01-24 2021-01-13 昇圧回路および電圧発生装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2020009971 2020-01-24
JP2020-009971 2020-01-24

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WO2021149562A1 true WO2021149562A1 (ja) 2021-07-29

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07312300A (ja) 1994-05-17 1995-11-28 Nissin Electric Co Ltd 高電圧電源装置
JPH10106791A (ja) * 1996-09-30 1998-04-24 Japan Steel & Tube Constr Co Ltd 小径管検査用ｘ線発生装置
JP2004048905A (ja) * 2002-07-11 2004-02-12 Totoku Electric Co Ltd 倍電圧整流回路基板
WO2015005380A1 (ja) * 2013-07-11 2015-01-15 株式会社日立メディコ 高電圧発生装置およびｘ線発生装置
JP2018022550A (ja) * 2016-08-01 2018-02-08 株式会社日立製作所 高電圧発生装置、及びこれを用いたｘ線高電圧装置
US20180054879A1 (en) * 2016-08-17 2018-02-22 Thermo Scientific Portable Analytical Instruments Inc. Cylindrical high voltage arrangement for a miniature x-ray system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166965A (en) * 1991-04-11 1992-11-24 Varian Associates, Inc. High voltage dc source including magnetic flux pole and multiple stacked ac to dc converter stages with planar coils
JPH10224070A (ja) * 1997-02-07 1998-08-21 Nec Eng Ltd 放電防止型電子機器及びそれに使用するキャップ
US5886886A (en) * 1997-08-20 1999-03-23 Teng; Shie-Ning Voltage multiplier for a power supply unit of an electronic insect-killer device
JP4497640B2 (ja) * 2000-03-29 2010-07-07 株式会社日立メディコ 高電圧スイッチ回路及びこれを用いたｘ線装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07312300A (ja) 1994-05-17 1995-11-28 Nissin Electric Co Ltd 高電圧電源装置
JPH10106791A (ja) * 1996-09-30 1998-04-24 Japan Steel & Tube Constr Co Ltd 小径管検査用ｘ線発生装置
JP2004048905A (ja) * 2002-07-11 2004-02-12 Totoku Electric Co Ltd 倍電圧整流回路基板
WO2015005380A1 (ja) * 2013-07-11 2015-01-15 株式会社日立メディコ 高電圧発生装置およびｘ線発生装置
JP2018022550A (ja) * 2016-08-01 2018-02-08 株式会社日立製作所 高電圧発生装置、及びこれを用いたｘ線高電圧装置
US20180054879A1 (en) * 2016-08-17 2018-02-22 Thermo Scientific Portable Analytical Instruments Inc. Cylindrical high voltage arrangement for a miniature x-ray system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4096083A4

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JPWO2021149562A1 (https=) 2021-07-29
EP4096083A1 (en) 2022-11-30
EP4096083A4 (en) 2023-07-26
JP7209875B2 (ja) 2023-01-20

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