WO2021102711A1 - 一种薄膜晶体管及其制备方法与薄膜晶体管阵列 - Google Patents

一种薄膜晶体管及其制备方法与薄膜晶体管阵列 Download PDF

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WO2021102711A1
WO2021102711A1 PCT/CN2019/121087 CN2019121087W WO2021102711A1 WO 2021102711 A1 WO2021102711 A1 WO 2021102711A1 CN 2019121087 W CN2019121087 W CN 2019121087W WO 2021102711 A1 WO2021102711 A1 WO 2021102711A1
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insulating layer
film transistor
layer
thin film
organic material
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PCT/CN2019/121087
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English (en)
French (fr)
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李刘中
林子平
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重庆康佳光电技术研究院有限公司
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Priority to PCT/CN2019/121087 priority Critical patent/WO2021102711A1/zh
Priority to CN201980002780.4A priority patent/CN110998857A/zh
Publication of WO2021102711A1 publication Critical patent/WO2021102711A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H01L21/441—Deposition of conductive or insulating materials for electrodes
    • H01L21/445—Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials

Definitions

  • the invention belongs to the technical field of semiconductor optoelectronics, and in particular relates to a thin film transistor, a preparation method thereof, and a thin film transistor array.
  • LCD liquid crystal display
  • OLED organic electroluminescence display
  • IELD inorganic electroluminescence display
  • TFT thin film transistor
  • Thin film transistors mainly include gates, insulating layers, semiconductor layers, source and drain electrodes. Wherein, the source electrode and the drain electrode are arranged at intervals and electrically connected to the semiconductor layer, and the gate electrode is arranged at intervals and insulated from the semiconductor layer and the source electrode and the drain electrode through the insulating layer.
  • Existing insulating layer materials for thin film transistors include inorganic insulating materials and organic insulating materials. When inorganic insulating materials are used as the insulating layer of thin film transistors, expensive plasma-enhanced chemical vapor deposition equipment is required and multiple depositions are required to obtain an insulating layer of uniform and appropriate thickness, resulting in high manufacturing cost of the insulating layer and complicated manufacturing processes.
  • organic materials as an insulating layer can overcome the above-mentioned problems of inorganic insulating materials, the dielectric constant of organic insulating materials is low, which reduces the capacitance of the thin film transistor connected to the storage capacitor, which in turn reduces the kickback voltage generated by the thin film transistor at the pixel electrode. , The reduction of the recoil voltage causes device display problems such as flicker, image stickiness, and uneven brightness.
  • the purpose of the present invention is to provide a thin film transistor, a preparation method thereof, and a thin film transistor array, which overcome the high cost of using inorganic insulating materials as the insulating layer of thin film transistors in the prior art, and manufacture
  • the process is complicated, and the use of organic insulating materials as the insulating layer of the thin film transistor has a low dielectric constant, which is likely to cause defects such as flicker, image stickiness, and uneven brightness of the device display.
  • the first embodiment disclosed in the present invention is a thin film transistor, which includes:
  • a metal oxide semiconductor layer located on the source electrode, the drain electrode, and the buffer layer between the source electrode and the drain electrode;
  • a first insulating layer located on the source electrode, the drain electrode, the metal oxide semiconductor layer, and the buffer layer; wherein the first insulating layer is composed of an organic material and metal oxide nanoparticles dispersed in the organic material. Particle composition
  • the metal oxide nanoparticles include one of tantalum pentoxide, titanium dioxide, hafnium dioxide, aluminum oxide, and yttrium trioxide.
  • the dielectric constant of the first insulating layer is 7-10.
  • the first insulating layer further includes a photosensitive material dispersed in the organic material.
  • the photosensitive material is diazonaphthoquinone sulfonate.
  • the organic material is phenolic resin.
  • the thin film transistor which further includes a second insulating layer on the first insulating layer and the gate, and the first insulating layer and the second insulating layer have a drain contact hole that leaks the drain .
  • the thin film transistor further includes an ITO layer on the second insulating layer and the drain contact hole.
  • the second embodiment disclosed in the present invention is a method for manufacturing a thin film transistor, which includes the following steps:
  • a first insulating layer is formed on the source electrode, the drain electrode, the metal oxide semiconductor layer, and the buffer layer; wherein, the first insulating layer is made of an organic material and metal oxide nanoparticles dispersed in the organic material. Particle composition
  • a gate is formed on the first insulating layer.
  • the first insulating layer further includes a photosensitive material dispersed in the organic material.
  • the step of forming a first insulating layer on the source electrode, the drain electrode, the metal oxide semiconductor layer, and the buffer layer specifically includes:
  • the doped organic material solution is coated on the source electrode, the drain electrode, the metal oxide semiconductor layer and the buffer layer, and dried and cured to form a first insulating layer.
  • the method for preparing the thin film transistor wherein the doped organic material solution is coated on the source electrode, the drain electrode, the metal oxide semiconductor layer and the buffer layer, and dried and solidified to form a first After the insulating layer step, it also includes:
  • the manufacturing method of the thin film transistor which further comprises the following steps:
  • a second insulating layer is formed on the gate and the first insulating layer.
  • the manufacturing method of the thin film transistor which further comprises the following steps:
  • An ITO layer is formed on the second insulating layer and the drain contact hole.
  • the third embodiment disclosed in the present invention is a thin film transistor array, which at least includes the thin film transistors described above.
  • the present invention provides a thin film transistor, a preparation method thereof, and a thin film transistor array.
  • the dielectric of the first insulating layer is improved.
  • the manufacturing cost of the thin film transistor is reduced while the constant is constant; by adding a photosensitive material in the first insulating layer, there is no need to make a pattern through the traditional photoresist and photoresist stripping, which simplifies the manufacturing process of the thin film transistor and reduces the manufacturing cost.
  • FIG. 1 is a schematic diagram of the structure of a thin film transistor provided by the present invention.
  • FIG. 2 is a flowchart of a preferred embodiment of a method for manufacturing a thin film transistor provided by the present invention.
  • the manufacturing process is complicated, and the use of organic insulating materials as the insulating layer of thin film transistors has a low dielectric constant, resulting in a decrease in the capacitance of the thin film transistor connected to the storage capacitor.
  • the recoil voltage generated by the thin film transistor at the pixel electrode is reduced, and the decrease in recoil voltage causes device display problems such as flicker, image stickiness, and uneven brightness.
  • the present invention provides a thin film transistor. As shown in FIG.
  • the thin film transistor includes: a base layer 10; a buffer layer 20 located on the base layer 10; Separated source 30 and drain 40; metal oxide semiconductor layer 50 located on the buffer layer 20 between the source 30, the drain 40 and the source 30 and the drain 40; located at the source 30.
  • the organic material 61 is used as the first insulating layer 60, which can overcome the problems of high cost and complicated manufacturing process that require the use of expensive plasma-enhanced chemical weather deposition for inorganic insulating materials.
  • the problem of low dielectric constant of the organic material 61 can be overcome.
  • the base layer 10 includes glass, transparent plastic materials such as polyethersulfone, polyacrylate, polyetherimide, and the like.
  • the buffer layer 20 includes inorganic materials, such as silicon oxide, silicon nitride, silicon oxide, aluminum oxide, etc., or organic materials, such as polyimide, polyester, or acrylic.
  • the buffer layer 20 is used to flatten the surface of the base layer 10 to facilitate subsequent formation of the source electrode 30, the drain electrode 40 and the metal oxide semiconductor layer 50.
  • the buffer layer 20 can effectively prevent impurities or moisture from penetrating from the base layer 10 to the upper source electrode 30, the drain electrode 40 or the metal oxide semiconductor layer 50, thereby affecting the performance of the thin film transistor.
  • the source electrode 30 and the drain electrode 40 include metals such as copper, aluminum, tungsten, gold, silver, molybdenum, etc., or conductive semiconductor materials such as doped polysilicon. In a specific embodiment, the source 30 and the drain 40 are metallic molybdenum.
  • the source electrode 30 and the drain electrode 40 are located on the buffer layer 20 and are spaced apart from each other to form a source and drain electrode channel.
  • a metal oxide semiconductor layer 50 is formed on the source electrode 30, the drain electrode 40, and the source and drain electrode channels.
  • the metal oxide semiconductor layer 50 includes amorphous silicon, low temperature polysilicon, oxides such as indium gallium oxide, indium zinc Oxide, compound semiconductor such as SiGe, GaAs, etc.
  • the organic material 61 is a phenolic resin. Since the dielectric constant of the existing organic poly material is usually about 3.8 to 4, in order to increase the dielectric constant of the first insulating layer 60, in this embodiment, the organic material 61 is mixed with metal oxide nanoparticles 62.
  • the metal oxide nanoparticles 62 include one of tantalum pentoxide, titanium dioxide, hafnium dioxide, aluminum oxide, and yttrium trioxide.
  • the metal oxides are all high-dielectric constant gate insulating materials, which are added to organic materials In 61, the dielectric constant of the organic material 61 can be significantly increased.
  • the organic material 61 and the metal oxide nanoparticles 62 may be dispersed by physical force and chemical force, for example, the metal oxide nanoparticles 62 may be dispersed in the organic material 61 solution by agitation using physical force such as shear stress. Alternatively, the metal oxide nanoparticles 62 may be dispersed in a solution of the organic material 61 by using a chemical bond using chemical force. Then, the source electrode 30, the drain electrode 40, the metal oxide semiconductor layer 50 and the buffer layer 20 are coated with an organic material solution doped with metal oxide nanoparticles and dried and cured to form the first insulating layer 60. The first insulating layer 60 may be deposited on the source electrode, the drain electrode, the metal oxide semiconductor layer, and the buffer layer by a spin coating method, a coating method, a roll coating method, a printing method, a spraying method, or the like.
  • the higher the amount of metal oxide nanoparticles 62 added the higher the dielectric constant of the first insulating layer 60. Since the dielectric constant of the first insulating layer 60 is proportional to the storage capacitance of the storage capacitor on the array substrate containing the thin film transistor, and the storage capacitance is inversely proportional to the recoil voltage generated by the thin film transistor on the pixel electrode, the increase of the The dielectric constant of an insulating layer 60 can reduce the kickback voltage generated by the thin film transistor on the pixel electrode, thereby reducing the display problems such as flicker, image sticking, and uneven brightness caused by the kickback voltage, and improving the display device Display quality.
  • the metal oxide nanoparticles 62 are added in an amount such that the dielectric constant of the first insulating layer 60 is preferably 7-10.
  • the photoresist and photoresist stripping are involved in the pattern making process, and the manufacturing process is complicated.
  • a photosensitive material is also added to the organic material 61. Similar to the step of dispersing the metal oxide nanoparticles 62 in the organic material solution in the previous step, the organic material 61 and the photosensitive material can be dispersed by physical force and chemical force.
  • the photosensitive material includes a positive photosensitive material and a negative photosensitive material.
  • the photosensitive material is a positive photosensitive material such as naphthoquinone diazide sulfonate. After the naphthoquinone diazide sulfonate is dissolved in a phenolic resin solution, the naphthoquinone diazide sulfonate and the organic material phenolic Resins can form strong interactions. After the first insulating layer 60 is formed, the first insulating layer 60 is exposed to light.
  • the diazonaphthoquinone sulfonate After the diazonaphthoquinone sulfonate is exposed to light, the diazonaphthoquinone sulfonate in the exposed area is photodegraded, and nitrogen is released to form ketene and ene The ketone forms indenic acid when it meets with water and is easily soluble in the developer.
  • the first insulating layer 60 is developed.
  • the photosensitive material at the exposed position on the first insulating layer 60 is soluble in the developer, while the photosensitive material at the unexposed position is insoluble in the developer, so that the first insulating layer 60 is directly exposed by exposure.
  • the preparation method is simple and the manufacturing cost is reduced.
  • the metal oxide semiconductor layer is formed first. 50.
  • a first insulating layer 60 is formed on the metal oxide semiconductor layer 50, and then a gate 70 is formed on the first insulating layer 60, which overcomes the traditional formation of a gate layer first and forms a gate insulating layer on the gate layer.
  • the gate insulating layer is easily broken by high temperature when the metal oxide semiconductor layer 50 is annealed, which affects the quality of the thin film transistor.
  • the gate 70 includes metals such as copper, aluminum, tungsten, gold, silver, etc., or conductive semiconductor materials such as doped polysilicon.
  • a second insulating layer 80 is further provided on the first insulating layer 60 and the gate 70, and the second insulating layer 80 is used as a non-conductor protective layer of the thin film transistor.
  • the second insulating layer 80 includes insulating materials such as SiO 2 , Si 3 N 4 , HfO 2 , TiO 2 , Ta 3 O 3 , SnO 2 and the like.
  • the first insulating layer 60 and the second insulating layer 80 are also provided with a drain contact hole that leaks the drain 40, and the second insulating layer 80 and the drain contact hole are also provided with an ITO layer 90.
  • the present invention also provides a method for manufacturing the above-mentioned thin film transistor, as shown in FIG. 2, which includes the following steps:
  • a first insulating layer is formed on the source electrode, the drain electrode, the metal oxide semiconductor layer, and the buffer layer; wherein the first insulating layer is oxidized by an organic material and a metal dispersed in the organic material Composition of nano-particles;
  • the method for manufacturing the thin film transistor further includes the steps:
  • the first insulating layer includes an organic polymer doped with metal oxide nanoparticles and photosensitive materials
  • the step S4 specifically includes:
  • the method further includes the following steps:
  • the present invention also provides a thin film transistor array, which can be used in liquid crystal display devices, and can also be used in other display devices, such as organic electroluminescence display devices, electronic paper, and plastic thin film transistor liquid crystal displays (TFT- LCD) flexible display device of the device.
  • the thin film transistor array includes at least the thin film transistors described above including metal oxide nanoparticles and an organic insulating layer of photosensitive material.
  • the present invention provides a thin film transistor, a method of manufacturing the same, and a thin film transistor array, including: a base layer; a buffer layer on the base layer; a source electrode and a drain electrode separated from each other on the buffer layer; The source electrode, the drain electrode, and the metal oxide semiconductor layer on the buffer layer between the source and drain; the first insulating layer on the source electrode, the drain electrode, the metal oxide semiconductor layer, and the buffer layer; wherein the first insulating layer
  • the layer is composed of organic material and metal oxide nanoparticles dispersed in the organic material; the gate is located on the first insulating layer.
  • This application uses organic materials and metal oxide nanoparticles dispersed in organic materials as the first insulating layer to increase the dielectric constant of the first insulating layer while reducing the manufacturing cost of thin film transistors; by adding The photosensitive material does not need to be patterned by traditional photoresist and photoresist stripping, which simplifies the manufacturing process of thin film transistors and reduces the manufacturing cost.

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Abstract

一种薄膜晶体管及其制备方法与薄膜晶体管阵列，包括：基底层（10）；位于基底层（10）上的缓冲层（20）；位于缓冲层（20）上彼此隔开的源极（30）和漏极（40）；位于源极（30）、漏极（40）以及源极（30）与漏极（40）之间缓冲层（20）上的金属氧化物半导体层（50）；位于源极（30）、漏极（40）、金属氧化物半导体层（50）以及缓冲层（20）上的第一绝缘层（60）；其中，第一绝缘层（60）由有机材料（61）和分散在有机材料（61）中的金属氧化物纳米颗粒（62）组成；位于第一绝缘层（60）上的栅极（70）。通过以有机材料（61）及分散在有机材料（61）中的金属氧化物纳米颗粒（62）作为第一绝缘层（60），在提高第一绝缘层（60）介电常数的同时降低薄膜晶体管的制作成本；通过在第一绝缘层（60）中添加感光材料，不需要通过传统的光刻胶与光刻胶剥离制作图案，简化了薄膜晶体管的制作工艺，降低了制作成本。

Description

一种薄膜晶体管及其制备方法与薄膜晶体管阵列 技术领域
本发明属于半导体光电子技术领域，尤其涉及一种薄膜晶体管及其制备方法与薄膜晶体管阵列。
背景技术
随着显示科技的发展，各种显示设备如液晶显示(LCD)设备、有机电致发光显示(OLED)设备、或无机电致发光显示(IELD)设备已经得到广泛应用。而液晶显示(LCD)设备中的每个液晶像素点都由集成在像素点后面的薄膜晶体管(TFT)来驱动，从而可以做到高速度、高亮度、高对比度显示屏信息，是目前最好的彩色显示设备之一。
薄膜晶体管主要包括栅极、绝缘层、半导体层、源极和漏极。其中，源极和漏极间隔设置并与半导体层电连接，栅极通过绝缘层与半导体层及源极和漏极间隔绝缘设置。现有用于薄膜晶体管的绝缘层材料包括无机绝缘材料和有机绝缘材料。无机绝缘材料作为薄膜晶体管的绝缘层时需要利用价格高昂的等离子体增强化学气相沉积设备并且需要经过多次沉积以获得均匀和合适厚度的绝缘层，导致绝缘层制造成本高，制造工序复杂。有机材料作为绝缘层虽然可以克服上述无机绝缘材料的问题，但有机绝缘材料介电常数较低，导致薄膜晶体管连接到存储电容器的电容降低，进而造成薄膜晶体管在像素电极产生的反冲电压减小，反冲电压减小造成诸如闪烁、图像粘滞、以及亮度不均匀等设备显示问题。
因此，现有技术有待于进一步的改进。
发明内容
鉴于上述现有技术中的不足之处，本发明的目的在于提供一种薄膜晶体管及其制备方法与薄膜晶体管阵列，克服现有技术中使用无机绝缘材料作为薄膜晶体管的绝缘层成本较高，制造工序复杂，而使用有机绝缘材料作为薄膜晶体管的绝缘层介电常数低，容易造成诸如闪烁、图像粘滞、以及亮度不均匀等设备显示问题的缺陷。
本发明所公开的第一实施例为一种薄膜晶体管，其中，包括：
基底层；
位于所述基底层上的缓冲层；
位于所述缓冲层上彼此隔开的源极和漏极；
位于所述源极、漏极以及所述源极与漏极之间缓冲层上的金属氧化物半导体层；
位于所述源极、漏极、金属氧化物半导体层以及所述缓冲层上的第一绝缘层；其中，所述第一绝缘层由有机材料和分散在所述有机材料中的金属氧化物纳米颗粒组成；
位于所述第一绝缘层上的栅极。
所述的薄膜晶体管，其中，所述金属氧化物纳米颗粒包括五氧化二钽、二氧化钛、二氧化铪、氧化铝、三氧化二钇中的一种。
所述的薄膜晶体管，其中，所述第一绝缘层的介电常数为7～10。
所述的薄膜晶体管，其中，所述第一绝缘层还包括分散于所述有机材料中的感光材料。
所述的薄膜晶体管，其中，所述感光材料为重氮萘醌磺酸酯。
所述的薄膜晶体管，其中，所述有机材料为酚醛树脂。
所述的薄膜晶体管，其中，还包括位于所述第一绝缘层和栅极上的第二绝缘层，所述第一绝缘层和所述第二绝缘层具有漏出所述漏极的漏接触孔。
所述的薄膜晶体管，其中，还包括位于所述第二绝缘层和所述漏接触孔上的ITO层。
本发明所公开的第二实施例为一种薄膜晶体管的制备方法，其中，包括步骤：
在基底层上形成缓冲层；
在所述缓冲层上形成彼此隔开的源极和漏极；
在所述源极、漏极和所述源极和漏极之间缓冲层上形成金属氧化物半导体层；
在所述源极、漏极、金属氧化物半导体层以及所述缓冲层上形成第一绝缘层；其中，所述第一绝缘层由有机材料和分散在所述有机材料中的金属氧化物纳米颗粒组成；
在所述第一绝缘层上形成栅极。
所述的薄膜晶体管的制备方法，其中，所述第一绝缘层还包括分散于所述有机材料中的感光材料。
所述的薄膜晶体管的制备方法，其中，所述在所述源极、漏极、金属氧化物半导体层以及所述缓冲层上形成第一绝缘层的步骤具体包括：
将金属氧化物纳米颗粒和感光材料通过物理力或化学力分散在有机材料溶液中，得到掺杂的有机材料溶液；
将所述掺杂的有机材料溶液涂覆到所述源极、漏极、金属氧化物半导体层以及所 述缓冲层上，干燥固化形成第一绝缘层。
所述的薄膜晶体管的制备方法，其中，所述将所述掺杂的有机材料溶液涂覆到所述源极、漏极、金属氧化物半导体层以及所述缓冲层上，干燥固化形成第一绝缘层的步骤之后还包括：
对所述第一绝缘层进行曝光、显影，在所述第一绝缘层上形成图案。
所述的薄膜晶体管的制备方法，其中，还包括步骤：
在所述栅极和所述第一绝缘层上形成第二绝缘层。
所述的薄膜晶体管的制备方法，其中，还包括步骤：
在所述第一绝缘层和所述第二绝缘层上形成漏接触孔；
在所述第二绝缘层和所述漏接触孔上形成ITO层。
本发明所公开的第三实施例为一种薄膜晶体管阵列，其中，至少包括所述的薄膜晶体管。
有益效果：本发明提供了一种薄膜晶体管及其制备方法与薄膜晶体管阵列，通过以有机材料及分散在有机材料中的金属氧化物纳米颗粒作为第一绝缘层，在提高第一绝缘层介电常数的同时降低薄膜晶体管的制作成本；通过在第一绝缘层中添加感光材料，不需要通过传统的光刻胶与光刻胶剥离制作图案，简化了薄膜晶体管的制作工艺，降低了制作成本。
附图说明
图1是本发明提供的一种薄膜晶体管的结构示意图；
图2是本发明提供的一种薄膜晶体管的制备方法的较佳实施例的流程图。
具体实施方式
为使本发明的目的、技术方案及优点更加清楚、明确，以下参照附图并举实施例对本发明进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
由于现有技术中使用无机绝缘材料作为薄膜晶体管的绝缘层成本较高，制造工序复杂，而使用有机绝缘材料作为薄膜晶体管的绝缘层介电常数低，导致薄膜晶体管连接到存储电容器的电容降低，进而造成薄膜晶体管在像素电极产生的反冲电压减小，反冲电压减小造成诸如闪烁、图像粘滞、以及亮度不均匀等设备显示问题。为了解决上述问题， 本发明提供了一种薄膜晶体管，如图1所示，所示薄膜晶体管包括：基底层10；位于所述基底层10上的缓冲层20；位于所述缓冲层20上彼此隔开的源极30和漏极40；位于所述源极30、漏极40和所述源极30和漏极40之间缓冲层20上的金属氧化物半导体层50；位于所述源极30、漏极40、金属氧化物半导体层50以及所述缓冲层20上的第一绝缘层60；其中，所述第一绝缘层60由有机材料61和分散在所述有机材料61中的金属氧化物纳米颗粒62组成；位于所述第一绝缘层60上的栅极70。具体实施时，使用有机材料61作为第一绝缘层60，能够克服无机绝缘材料需要使用昂贵的等离子体增强化学气象沉积成本高，制作工序复杂的问题。而通过在有机材料61中添加金属氧化物纳米颗粒62，能够克服有机材料61介电常数低的问题。
在一具体实施方式中，所述基底层10包括玻璃、透明塑料材料如聚醚砜、聚丙烯酸酯、聚醚酰亚胺等。所述缓冲层20包括无机材料，例如氧化硅、氮化硅、氧化硅、氧化铝等，或有机材料，例如聚酰亚胺、聚酯或丙烯等。所述缓冲层20用于使基底层10表面平坦化，以利于后续源极30、漏极40和金属氧化物半导体层50的形成。并且所述缓冲层20可以有效地防止杂质或水分从基底层10渗透到上面的源极30、漏极40或金属氧化物半导体层50，从而影响薄膜晶体管的使用性能。
在一具体实施方式中，所述源极30和漏极40包括金属如铜、铝、钨、金、银、钼等，或导电半导体材料如掺杂的多晶硅等。在一具体实施例中所述源极30和漏极40为金属钼。所述源极30和漏极40位于所述缓冲层20上并彼此隔开一段距离形成源漏电极沟道。所述源极30、漏极40及源漏电极沟道上形成有金属氧化物半导体层50，所述金属氧化物半导体层50包括非晶硅、低温多晶硅、氧化物如铟镓氧化物、铟锌氧化物、化合物半导体如SiGe、GaAs等。
在一具体实施方式中，所述有机材料61为酚醛树脂。由于现有的有机聚材料的介电常数通常为3.8～4左右，为了提高第一绝缘层60的介电常数，本实施例中在有机材料61中掺入金属氧化物纳米颗粒62，所述金属氧化物纳米颗粒62包括五氧化二钽、二氧化钛、二氧化铪、氧化铝、三氧化二钇中的一种，上述金属氧化物均为高介电常数闸极绝缘材料，将其加入有机材料61中，能够显著提高有机材料61的介电常数。有机材料61和金属氧化物纳米颗粒62可以通过物理力和化学力来分散，例如，可通过利用诸如剪应力的物理力的搅动在有机材料61溶液中分散金属氧化物纳米颗粒62。或者，可通过利用化学力的化学键在有机材料61溶液中分散金属氧化物纳米颗粒62。然后在源极30、漏极40、金属氧化物半导体层50以及缓冲层20上涂覆掺杂有金属氧化物纳米 颗粒的有机材料溶液并干燥固化形成第一绝缘层60。所述第一绝缘层60可以通过旋涂法、涂敷法、滚涂法、印刷法以及喷涂法等沉积在源极、漏极、金属氧化物半导体层以及所述缓冲层上。
在一具体实施方式中，金属氧化物纳米颗粒62添加量越高，则所述第一绝缘层60介电常数越高。由于第一绝缘层60的介电常数与包含薄膜晶体管的阵列基板上的存储电容器的存储电容成正比，而存储电容又与薄膜晶体管在像素电极上产生的反冲电压成反比，因而通过增加第一绝缘层60的介电常数，可以减小薄膜晶体管在像素电极上产生的反冲电压，进而减小反冲电压引起的诸如闪烁、图像粘滞、以及亮度不均匀等显示问题，提高显示设备的显示质量。但第一绝缘层60的介电常数太高，会引起薄膜晶体管的边缘化效应，进而影响薄膜晶体管制备过程中的光刻深度以及产生布线时的爬坡等问题。在一具体实施例中，所述金属氧化物纳米颗粒62添加量使第一绝缘层60的介电常数在7～10为宜。
在一具体实施方式中，由于现有技术中在制作第一绝缘层60的图案时，需要在第一绝缘层60上进行光刻胶、涂布、显影、干刻、光刻胶剥离来形成第一绝缘层60的图案，图案制作过程中涉及到光刻胶及光刻胶剥离，制作过程复杂。为了解决上述过程，本实施例中除在有机材料61中加入金属氧化物纳米颗粒62以提高第一绝缘层60的介电常数外，还在有机材料61中加入感光材料。与前述步骤中金属氧化物纳米颗粒62分散在有机材料溶液中的步骤相同，有机材料61和感光材料可以通过物理力和化学力来分散。
具体实施时，所述感光材料包括正感光材料和负感光材料，当光照射到感光材料上时，会让正感光材料容易溶于显影剂，而让负感光材料不容易溶于显影剂。在一具体实施例中，所述感光材料为正感光材料如重氮萘醌磺酸酯，将重氮萘醌磺酸酯溶于酚醛树脂溶液后，重氮萘醌磺酸酯与有机材料酚醛树脂能够形成强的相互作用。形成第一绝缘层60后，对第一绝缘层60进行曝光处理，重氮萘醌磺酸酯受到光照后，曝光区的重氮萘醌磺酸酯发生光解，放出氮气形成烯酮，烯酮遇水形成茚酸而易溶于显影剂。曝光后对第一绝缘层60进行显影，第一绝缘层60上曝光位置的感光材料溶于显影剂，而未曝光位置的感光材料不溶于显影剂，从而在第一绝缘层60上直接通过曝光、显影形成图案，而无需经过传统的光刻胶与光刻胶剥离，制备方法简单并且降低制造成本。
在一具体实施方式中，由于金属氧化物半导体层50形成过程中需要经过高温退火，而由有机材料61组成的第一绝缘层60无法承受高温，本实施例中通过先形成金属氧化 物半导体层50，再在金属氧化物半导体层50形成第一绝缘层60，然后再在第一绝缘层60上形成栅极70，克服了传统先形成栅极层，在栅极层上形成栅极绝缘层，然后在栅极绝缘层上形成金属氧化物半导体层50时，栅极绝缘层在金属氧化物半导体层50进行退火时容易被高温破会，影响薄膜晶体管质量的问题。所述栅极70包括金属如铜、铝、钨、金、银等，或导电半导体材料如掺杂的多晶硅等。
在一具体实施方式中，第一绝缘层60和栅极70上还设置有第二绝缘层80，所述第二绝缘层80用于作为薄膜晶体管的非导体保护层。所述第二绝缘层80包括绝缘材料如SiO 2、Si 3N 4、HfO 2、TiO 2、Ta 3O 3、SnO 2等。所述第一绝缘层60、第二绝缘层80上还设置有漏出所述漏极40的漏接触孔，所述第二绝缘层80和漏接触孔上还设置有ITO层90。
此外，本发明还提供一种上述薄膜晶体管的制备方法，如图2所示，其包括以下步骤：
S1、在基底层上形成缓冲层；
S2、在所述缓冲层上形成彼此隔开的源极和漏极；
S3、在所述源极、漏极和所述源极和漏极之间缓冲层上形成金属氧化物半导体层；
S4、在所述源极、漏极、金属氧化物半导体层以及所述缓冲层上形成第一绝缘层；其中，所述第一绝缘层由有机材料和分散在所述有机材料中的金属氧化物纳米颗粒组成；
S5、在所述第一绝缘层上形成栅极。
在一具体实施方式中，所述薄膜晶体管的制备方法还包括步骤：
S6、在所述栅极和所述第一绝缘层上形成第二绝缘层；
S7、在所述第一绝缘层和所述第二绝缘层上形成漏接触孔；
S7、在所述第二绝缘层和所述漏接触孔上形成ITO层。
在一具体实施方式中，所述第一绝缘层包括掺杂有金属氧化物纳米颗粒、感光材料的有机聚合物，所述步骤S4具体包括：
S41、将金属氧化物纳米颗粒和感光材料通过物理力或化学力分散在有机材料溶液中，得到掺杂的有机材料溶液；
S42、将所述掺杂的有机材料溶液涂覆到所述源极、漏极、金属氧化物半导体层以及所述缓冲层上，干燥固化形成第一绝缘层。
在一具体实施方式中，所述步骤S42之后还包括步骤：
S43、对所述第一绝缘层进行曝光、显影，在所述第一绝缘层上形成图案。
此外，本发明还提供一种薄膜晶体管阵列，所述薄膜晶体管阵列可用于液晶显示设备，也可用于其它显示设备，诸如有机电致发光显示设备、电子纸张、以及塑料薄膜晶体管液晶显示(TFT-LCD)设备的柔性显示设备。所述薄膜晶体管阵列至少包括上述包括金属氧化物纳米颗粒和感光材料的有机绝缘层的薄膜晶体管。
综上所述，本发明提供了一种薄膜晶体管及其制备方法与薄膜晶体管阵列，包括：基底层；位于基底层上的缓冲层；位于缓冲层上彼此隔开的源极和漏极；位于源极、漏极以及源极与漏极之间缓冲层上的金属氧化物半导体层；位于源极、漏极、金属氧化物半导体层以及缓冲层上的第一绝缘层；其中，第一绝缘层由有机材料和分散在有机材料中的金属氧化物纳米颗粒组成；位于第一绝缘层上的栅极。本申请通过以有机材料及分散在有机材料中的金属氧化物纳米颗粒作为第一绝缘层，在提高第一绝缘层介电常数的同时降低薄膜晶体管的制作成本；通过在第一绝缘层中添加感光材料，不需要通过传统的光刻胶与光刻胶剥离制作图案，简化了薄膜晶体管的制作工艺，降低了制作成本。
应当理解的是，本发明的系统应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (15)

  1. 一种薄膜晶体管，其特征在于，包括：
    基底层；
    位于所述基底层上的缓冲层；
    位于所述缓冲层上彼此隔开的源极和漏极；
    位于所述源极、漏极以及所述源极与漏极之间缓冲层上的金属氧化物半导体层；
    位于所述源极、漏极、金属氧化物半导体层以及所述缓冲层上的第一绝缘层；其中，所述第一绝缘层由有机材料和分散在所述有机材料中的金属氧化物纳米颗粒组成；
    位于所述第一绝缘层上的栅极。
  2. 根据权利要求1所述的薄膜晶体管，其特征在于，所述金属氧化物纳米颗粒包括五氧化二钽、二氧化钛、二氧化铪、氧化铝、三氧化二钇中的一种。
  3. 根据权利要求2所述的薄膜晶体管，其特征在于，所述第一绝缘层的介电常数为7～10。
  4. 根据权利要求3所述的薄膜晶体管，其特征在于，所述第一绝缘层还包括分散于所述有机材料中的感光材料。
  5. 根据权利要求4所述的薄膜晶体管，其特征在于，所述感光材料为重氮萘醌磺酸酯。
  6. 根据权利要求4所述的薄膜晶体管，其特征在于，所述有机材料为酚醛树脂。
  7. 根据权利要求1所述的薄膜晶体管，其特征在于，还包括位于所述第一绝缘层和栅极上的第二绝缘层，所述第一绝缘层和所述第二绝缘层具有漏出所述漏极的漏接触孔。
  8. 根据权利要求7所述的薄膜晶体管，其特征在于，还包括位于所述第二绝缘层和所述漏接触孔上的ITO层。
  9. 一种薄膜晶体管的制备方法，其特征在于，包括步骤：
    在基底层上形成缓冲层；
    在所述缓冲层上形成彼此隔开的源极和漏极；
    在所述源极、漏极和所述源极和漏极之间缓冲层上形成金属氧化物半导体层；
    在所述源极、漏极、金属氧化物半导体层以及所述缓冲层上形成第一绝缘层；其中，所述第一绝缘层由有机材料和分散在所述有机材料中的金属氧化物纳米颗粒组成；
    在所述第一绝缘层上形成栅极。
  10. 根据权利要求9所述的薄膜晶体管的制备方法，其特征在于，所述第一绝缘层 还包括分散于所述有机材料中的感光材料。
  11. 根据权利要求10所述的薄膜晶体管的制备方法，其特征在于，所述在所述源极、漏极、金属氧化物半导体层以及所述缓冲层上形成第一绝缘层的步骤具体包括：
    将金属氧化物纳米颗粒和感光材料通过物理力或化学力分散在有机材料溶液中，得到掺杂的有机材料溶液；
    将所述掺杂的有机材料溶液涂覆到所述源极、漏极、金属氧化物半导体层以及所述缓冲层上，干燥固化形成第一绝缘层。
  12. 根据权利要求11所述的薄膜晶体管的制备方法，其特征在于，所述将所述掺杂的有机材料溶液涂覆到所述源极、漏极、金属氧化物半导体层以及所述缓冲层上，干燥固化形成第一绝缘层的步骤之后还包括：
    对所述第一绝缘层进行曝光、显影，在所述第一绝缘层上形成图案。
  13. 根据权利要求9所述的薄膜晶体管的制备方法，其特征在于，还包括步骤：
    在所述栅极和所述第一绝缘层上形成第二绝缘层。
  14. 根据权利要求13所述的薄膜晶体管的制备方法，其特征在于，还包括步骤：
    在所述第一绝缘层和所述第二绝缘层上形成漏接触孔；
    在所述第二绝缘层和所述漏接触孔上形成ITO层。
  15. 一种薄膜晶体管阵列，其特征在于，至少包括如权利要求1所述的薄膜晶体管。
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