WO2021083080A1 - 一种超高深宽比的硅纳米针阵列的制备方法 - Google Patents

一种超高深宽比的硅纳米针阵列的制备方法 Download PDF

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WO2021083080A1
WO2021083080A1 PCT/CN2020/123710 CN2020123710W WO2021083080A1 WO 2021083080 A1 WO2021083080 A1 WO 2021083080A1 CN 2020123710 W CN2020123710 W CN 2020123710W WO 2021083080 A1 WO2021083080 A1 WO 2021083080A1
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silicon
silicon substrate
ultra
aspect ratio
preparing
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French (fr)
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涂学凑
孟庆雨
刘梦欣
康琳
张蜡宝
贾小氢
赵清源
陈健
吴培亨
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南京大学
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    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B33/00—Silicon; Compounds thereof
    • C01B33/02—Silicon
    • C01B33/021—Preparation
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/02—Pretreatment of the material to be coated
    • C23C14/021—Cleaning or etching treatments
    • C23C14/022—Cleaning or etching treatments by means of bombardment with energetic particles or radiation
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24—Vacuum evaporation
    • C23C14/28—Vacuum evaporation by wave energy or particle radiation
    • C23C14/30—Vacuum evaporation by wave energy or particle radiation by electron bombardment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • C23C14/5873—Removal of material

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  • the present invention relates to the field of semiconductor technology, and in particular to a method for preparing a silicon nano-tip array with ultra-high aspect ratio by comprehensively using electron beam lithography, electron beam evaporation, and inductively coupled plasma (ICP).
  • ICP inductively coupled plasma
  • Nano-scale needle tips have very important and extensive applications in the fields of biomedical cell probes, single photon sources, electromagnetic wave absorbers and anti-reflection structures, and the preparation of quantum devices.
  • foreign scientists (Nature Materials, 14(5), 532-539, 2015) used silicon nanoneedles to deliver nucleic acids in cells. Compared with traditional methods, this silicon nanoneedle injection technology has less trauma and target Good tropism and other advantages.
  • broadband terahertz wave absorbing materials based on silicon nanoneedle arrays have an absorption rate of up to 90% for terahertz waves, which overcomes the absorption bandwidth of existing terahertz wave absorbers Shortcomings such as narrow, poor stability, and high manufacturing cost.
  • the methods for preparing silicon nanoneedles are still relatively limited, and the commonly used method is dry etching.
  • dry etching silicon photoresist is usually used as an etching mask, but this method has many defects. If the positive photoresist polymethyl methacrylate (PMMA) is used as the etching mask, the exposure area is large, the exposure time is long, and the etching resistance is poor, and it is difficult to achieve an etching depth of 5 ⁇ m or more.
  • PMMA positive photoresist polymethyl methacrylate
  • etching resistance is better than PMMA
  • molecular polymer formed after exposure and development is not easy to remove, which will cause the next process Pollution
  • HSQ is expensive
  • shelf life is short
  • process stability is poor
  • the etching depth is less than 10 ⁇ m.
  • Other preparation methods such as wet etching, thermal evaporation, and focused ion milling, also have many problems such as complicated processes, high preparation costs, and difficulty in mass production.
  • the purpose of the present invention is to provide a method for preparing an ultra-high aspect ratio silicon nanoneedle array.
  • the technical solution to achieve the objective of the present invention is: a method for preparing an ultra-high aspect ratio silicon nanoneedle array, including the following steps:
  • Step 1 Spin-coating MMA and PMMA A2 double layer photoresist on the silicon substrate;
  • Step 2 Perform electron beam exposure on the silicon substrate coated with MMA and PMMA A2 double-layer photoresist, and make a resist pattern on the silicon substrate;
  • Step 3 Perform electron beam evaporation on the silicon substrate on which the resist pattern is formed, and deposit an Al thin film on the silicon substrate;
  • Step 4 peeling off the silicon substrate after the Al thin film is deposited to obtain an Al thin film array deposited on the silicon substrate to provide a mask for the subsequent ICP etching process;
  • Step 5 Perform ICP silicon etching on the silicon substrate covering the Al mask to fabricate a silicon nanoneedle array structure.
  • the present invention has significant advantages as follows: 1) The silicon nanoneedle array structure with ultra-high aspect ratio can be stably obtained through the process flow of the present invention.
  • the single silicon nanoneedle has good morphology, smooth sidewalls and minimum needle tip diameter. It can reach 10nm, and the aspect ratio can reach 1450; 2)
  • the Al used in the present invention as a mask has the advantages of long anti-etching time, stable process, etc., can realize batch preparation of ultra-high aspect ratio silicon nanoneedle array structure and has low preparation cost 3)
  • the present invention can easily obtain silicon nanoneedle array structures of different heights and different tip sizes by changing the layout design and ICP etching parameters.
  • Fig. 1 is a schematic diagram of the process flow for preparing the ultra-high aspect ratio silicon nanoneedle array of the present invention.
  • Fig. 2 is a design layout required for the electron beam exposure process steps of the present invention.
  • Fig. 3 is a scanning electron microscope (SEM) image of the surface of a sample of the present invention that has been deposited with an Al thin film but has not yet been peeled off.
  • Fig. 4 is a scanning electron microscope (SEM) image of the surface of the sample after peeling off according to the present invention.
  • Fig. 5 is a scanning electron microscope (SEM) image of the overall morphology of a sample etched under different etching conditions of the present invention.
  • Fig. 6 is a scanning electron microscope (SEM) image of the overall morphology of the sample at different etching stages of the present invention.
  • FIG. 7 is a scanning electron microscope (SEM) image of the overview of the silicon nanoneedle array fabricated after etching according to the present invention.
  • Fig. 8 is a scanning electron microscope (SEM) image of the tip of the silicon nanoneedle made by the present invention.
  • Fig. 9 is a scanning electron microscope (SEM) image for measuring the size of the tip of the silicon nanoneedle made by the present invention.
  • the preparation method of the ultra-high aspect ratio silicon nanoneedle array of the present invention mainly includes the following micro-nano processing steps:
  • the pure silicon wafer substrate was ultrasonically cleaned with acetone, alcohol and deionized water for 5-8 minutes, and then dried with a nitrogen gun to dry the residual moisture on the surface. Observe the surface under an optical microscope to confirm that the surface is clean and not obvious. Particles, debris. If the surface of the substrate is not clean enough, it will affect the subsequent production of the resist structure.
  • Figure 2 is the layout used in the electron beam exposure step of the present invention.
  • the layout is made by L-Edit software.
  • the radius of the circle in the layout is 900 nm and the period is 5 ⁇ m.
  • MMA and PMMA have similar exposure doses, so only one exposure step is required.
  • the exposure dose of the electron beam exposure step is finally optimized at 750 ⁇ C/cm 2 . Under this exposure dose, the layout pattern can be fully exposed, and the developed resist pattern has high contrast and good quality.
  • it can be achieved by adjusting the size of the circle radius in the layout design.
  • the distance between the centers of the circles can be adjusted.
  • a layer of Al thin film with a thickness of 300-350 nanometers is evaporated on the sample by means of electron beam evaporation.
  • the scanning electron microscope image of the sample surface after Al thin film deposition is shown in Figure 3.
  • the circular recessed area in the figure is deposited on
  • the Al film on the silicon substrate, the other area is the Al film deposited on the double-layer photoresist.
  • FIG. 4 is a scanning electron microscope picture of the sample surface after the stripping step. It can be seen that only circular Al thin film arrays are left on the surface of the silicon substrate. These Al thin film arrays will provide the required masks for the subsequent etching steps. membrane.
  • the specific etching conditions include gas type, gas flow, ICP power, RF power, pressure, temperature, and etching time.
  • a thin layer of silicone grease can be applied to the back of the sample to increase thermal conductivity.
  • the fabrication of silicon nanoneedles can be divided into two parts as a whole, one is the fabrication of the tip structure at the top, and the other is the columnar support structure under the tip.
  • ICP dry etching different process parameters will form structures with different morphologies, and the present invention uses this to achieve the design of the structure.
  • SF 6 is used as the etching gas.
  • C 4 F 8 gas Perform passivation due to the characteristic of isotropic etching that appears during ICP dry etching, it is necessary to pass in an appropriate proportion of C 4 F 8 gas Perform passivation.
  • Figure 6 is a scanning electron microscope picture of the overall topography of the silicon nanoneedle array after etching for 8min, 25min, 45min and 55min during the preparation process using the process parameters in Table 3. It can be seen that there are obvious morphologies in different etching stages different.
  • Figure 7 is a scanning electron microscope picture of the silicon nanoneedle array prepared using the process conditions in Table 3. It can be seen that the prepared silicon nanoneedles have smooth sidewalls, complete morphology, and a uniform height of 14.5 ⁇ m.
  • Figure 8 is a scanning electron microscope picture of the tip of the silicon nanoneedle prepared using the process conditions in Table 3.
  • Figure 9 is a scanning electron microscope picture of the tip of the silicon nanoneedle prepared using the process conditions in Table 3. It can be seen that the minimum size of the tip can reach 10nm.

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Abstract

提供一种超高深宽比的硅纳米针阵列的制备方法。该方法包括：在硅衬底上旋涂MMA和PMMA A2双层光刻胶；对涂覆MMA和PMMA A2双层光刻胶的硅衬底进行电子束曝光，在硅衬底上制作抗蚀剂图形；对形成抗蚀剂图形的硅衬底进行电子束蒸发，在硅衬底上沉积一层Al薄膜；对沉积Al薄膜后的硅衬底进行剥离，得到沉积在硅衬底上的Al薄膜阵列，为后续ICP刻蚀工艺提供掩膜；对覆盖Al掩膜的硅衬底进行ICP硅刻蚀，制作硅纳米针阵列结构。通过该方法能够稳定地获得超高深宽比的硅纳米针阵列结构，单个硅纳米针形态良好，侧壁光滑，最小针尖直径达到10nm，深宽比可达1450。

Description

一种超高深宽比的硅纳米针阵列的制备方法 技术领域
本发明涉及半导体技术领域，具体而言，涉及一种综合使用电子束光刻、电子束蒸发、电感耦合等离子体(ICP)制备超高深宽比的硅纳米针尖阵列的方法。
背景技术
纳米尺度的针尖在生物医学细胞探针、单光子源、电磁波吸收器与防反射结构以及量子器件制备等领域有着十分重要且广泛的应用。例如，2015年，国外科学家(Nature Materials,14(5)，532-539，2015)利用硅纳米针在细胞内传递核酸，相比于传统手段，这种硅纳米针注射技术具有创伤小、靶向性好等优点。2016年文岐业等(申请号为201611243901.9的中国发明专利)基于硅纳米针阵列的宽带太赫兹波吸收材料对太赫兹波的吸收率高达90％，克服了现有太赫兹波吸收器吸收带宽窄、稳定性差、制造成本高等缺点。
目前，制备硅纳米针的手段还比较有限，常用的方法为干法刻蚀。使用干法刻蚀硅时，通常采用光刻胶做刻蚀掩膜，但这种方式存在很多缺陷。如使用正性光刻胶聚甲基丙烯酸甲酯(PMMA)做刻蚀掩膜，存在曝光面积大，曝光时间长，抗刻蚀性差，很难做到5μm以上的刻蚀深度。使用负性光刻胶氢倍半硅氧烷(HSQ)做刻蚀掩膜，虽然抗刻蚀性好于PMMA，但其曝光显影后形成的分子聚合物不容易去掉，会给下道工艺造成污染，且HSQ价格昂贵，保质期短，工艺稳定性差，还做不到10μm以上刻蚀深度。而其他制备手段，如湿法刻蚀、热蒸发、聚焦离子铣削，同样存在工艺复杂、制备成本高昂，批量生产难等诸多问题。
发明内容
本发明的目的在于提供一种超高深宽比的硅纳米针阵列的制备方法。
实现本发明目的的技术解决方案为：一种超高深宽比的硅纳米针阵列的制备方法，包括如下步骤：
步骤1，在硅衬底上旋涂MMA和PMMA A2双层光刻胶；
步骤2，对涂覆MMA和PMMA A2双层光刻胶的硅衬底进行电子束曝光，在硅衬底上制作抗蚀剂图形；
步骤3，对形成抗蚀剂图形的硅衬底进行电子束蒸发，在硅衬底上沉积一层Al薄膜；
步骤4，对沉积Al薄膜后的硅衬底进行剥离，得到沉积在硅衬底上的Al薄膜阵列，为后续ICP刻蚀工艺提供掩膜；
步骤5，对覆盖Al掩膜的硅衬底进行ICP硅刻蚀，制作硅纳米针阵列结构。
本发明与现有技术相比，其显著优点在于：1)通过本发明工艺流程能够稳定地获得超高 深宽比的硅纳米针阵列结构，单个硅纳米针形态良好，侧壁光滑，最小针尖直径达到10nm，深宽比可达1450；2)本发明所用的Al做掩膜具有抗刻蚀时间长、工艺稳定等优点，能够实现批量制备超高深宽比硅纳米针阵列结构且制备成本较低；3)本发明通过改变版图设计和ICP刻蚀的参数，能够方便地获得不同高度、不同针尖大小的硅纳米针阵列结构。
附图说明
图1是本发明超高深宽比硅纳米针阵列制备的工艺流程示意图。
图2是本发明电子束曝光工艺步骤所需的设计版图。
图3是本发明经过沉积Al薄膜但尚未进行剥离的样品表面扫描电子显微镜(SEM)图。
图4是本发明经过剥离后的样品表面扫描电子显微镜(SEM)图。
图5是本发明不同刻蚀条件刻蚀的样品整体形貌扫描电子显微镜(SEM)图。
图6是本发明不同刻蚀阶段的样品整体形貌扫描电子显微镜(SEM)图。
图7是本发明经过刻蚀后制作的硅纳米针阵列概貌扫描电子显微镜(SEM)图。
图8是本发明制作的硅纳米针针尖部位扫描电子显微镜(SEM)图。
图9是本发明制作的硅纳米针针尖部位尺寸测量扫描电子显微镜(SEM)图。
具体实施方式
下面结合附图和具体实施例，进一步说明本发明方案。
本发明超高深宽比的硅纳米针阵列的制备方法，主要包括如下微纳加工步骤：
(1)将纯硅片衬底先后用丙酮、酒精和去离子水超声清洗5-8分钟，然后用氮气枪吹干表面残留水分，在光学显微镜下观察其表面，确认其表面洁净，无明显颗粒、杂物。如果衬底表面不够洁净，将会影响后续抗蚀剂结构的制作。
(2)在上述硅衬底上旋涂MMA光刻胶，然后置于恒温烘台上烘烤，其目的是除去光刻胶中残余的水分。而后用同样的方式再旋涂一层PMMA A2光刻胶并烘烤。经过大量实验，MMA和PMMA A2旋涂及烘烤优选使用表1中的参数，在该参数条件下，MMA和PMMA胶层厚度适中、均匀性好、附着力强。此步骤使用的双层光刻胶工艺能够给后续的剥离步骤带来很大的方便。
表1电子束光刻条件表
Figure PCTCN2020123710-appb-000001
(3)将样品进行电子束曝光，图2是本发明电子束曝光步骤中所用的版图，该版图由 L-Edit软件制作完成，版图中圆形的半径为900nm，周期为5μm。虽然使用的是双层光刻胶，但MMA和PMMA有着相似的曝光剂量，所以只需要一次曝光步骤就可以。经过多次曝光剂量测试实验，本发明中将电子束曝光步骤的曝光剂量最终优化在750μC/cm 2。该曝光剂量下，版图图形能够得到充分的曝光，且显影后的抗蚀剂图形对比度高、质量好。对于实现不同高度的硅纳米针制备，可以通过调整版图设计中圆形半径的大小来实现，对于实现不同周期的硅纳米针阵列结构的制备，则可以调整圆心之间的距离。
(4)将经过电子束曝光后的样品放进甲基异丁基(甲)酮(MIBK)和异丙醇(IPA)配比比例为1:3的溶液中显影3min，然后放进IPA溶液中定影1min，最后浸入去离子水中10s，取出后用氮气枪吹干样品表面残留水分，用气枪吹样品的时候要注意气枪的出气量不能太大，以避免造成抗蚀剂图形坍塌。由于MMA和PMMA都是正性光刻胶，在步骤(3)中的曝光剂量条件下，显影、定影后两层光刻胶上经过电子束曝光的圆形图形阵列区域将被去除，其它未经过电子束曝光的区域将得以保留。
(5)通过电子束蒸发的方式在样品上蒸发一层厚度为300-350纳米厚的Al薄膜。沉积Al薄膜后的样品表面扫描电子显微镜图如图3所示，图中圆形凹陷的区域为沉积在
硅衬底上的Al薄膜，其它区域则是沉积在双层光刻胶上的Al薄膜。
(6)将样品浸没在N-甲基吡咯烷酮溶液中，80℃水浴加热60min，然后将样品先后放入丙酮、酒精、去离子水用超声机对沉积在光刻胶上的Al薄膜进行剥离，最终留下沉积在硅衬底上的圆形Al薄膜。超声机剥离的时候要注意功率不能过大，以避免造成沉积在硅衬底上的Al脱落。图4是经过剥离步骤后的样品表面扫描电子显微镜图片，可以看到，硅衬底表面只留下了圆形的Al薄膜阵列，这些Al薄膜阵列将为后续的刻蚀步骤提供所需要的掩膜。
(7)对表面覆盖有圆形阵列Al掩膜的样品进行ICP硅刻蚀，刻蚀具体条件包括气体种类、气体流量、ICP功率、RF功率、压强、温度、刻蚀时间等。刻蚀时，可以在样品背面涂一层薄硅脂以增加导热。
硅纳米针的制作整体上可以分为两个部分，一部分是顶部的针尖结构的制作，另一部分是针尖下方的柱状支撑结构。ICP干法刻蚀中，不同的工艺参数会形成不同形貌的结构，本发明利用这一点达到设计结构的制作。本发明所用的ICP刻蚀工艺中，采用SF 6作为刻蚀气体，同时，由于ICP干法刻蚀时显现出的各向同性刻蚀的特征，故需要通入适当比例的C 4F 8气体进行钝化。
大量工艺实验发现，刻蚀气体的流量及比例对刻蚀的形貌影响最为显著，具体来说，当刻蚀、钝化气体流量比例较小时，柱体形态整体呈现上细下粗的状态，反之则呈现上粗下细的形态。经过大量实验，总结出四组稳定且具有代表性的工艺参数，表2是四组工艺参数的 数据。图5中标号1、2、3、4的图片分别对应表2中四组ICP刻蚀对比实验的样品形貌扫描电子显微镜图。通过调整刻蚀的工艺参数，我们可以实现对对硅纳米针整体形态的控制。
表2不同刻蚀条件对形貌的影响
Figure PCTCN2020123710-appb-000002
(8)用扫描电子显微镜观察刻蚀后的样品，观察其形貌并测量关键参数信息，根据结果，优化工艺参数，经过大量实验，本发明中所用的最佳工艺条件如表3所示。图6是使用表3工艺参数制备过程中刻蚀8min、25min、45min和55min后的硅纳米针阵列的整体形貌扫描电子显微镜图片，可以看到，不同刻蚀阶段的形貌存在着明显的不同。图7为使用表3中工艺条件制备的硅纳米针阵列的扫描电子显微镜图片，可以看到，制备的硅纳米针侧壁光滑、形态完整，整体高度均匀且达到了14.5μm。图8为使用表3中工艺条件制备的硅纳米针针尖部位的扫描电子显微镜图片。图9为使用表3中工艺条件制备的硅纳米针针尖部位的测量扫描电子显微镜图片，可以看到，针尖的最小尺寸可以达到10nm。
表3 ICP刻蚀条件表
Figure PCTCN2020123710-appb-000003

Claims (9)

  1. 一种超高深宽比的硅纳米针阵列的制备方法，其特征在于，包括如下步骤：
    步骤1，在硅衬底上旋涂MMA和PMMA A2双层光刻胶；
    步骤2，对涂覆MMA和PMMA A2双层光刻胶的硅衬底进行电子束曝光，在硅衬底上制作抗蚀剂图形；
    步骤3，对形成抗蚀剂图形的硅衬底进行电子束蒸发，在硅衬底上沉积一层Al薄膜；
    步骤4，对沉积Al薄膜后的硅衬底进行剥离，得到沉积在硅衬底上的Al薄膜阵列，为后续ICP刻蚀工艺提供掩膜；
    步骤5，对覆盖Al掩膜的硅衬底进行ICP硅刻蚀，制作硅纳米针阵列结构。
  2. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，在硅衬底上旋涂MMA和PMMA A2双层光刻胶前，将纯硅片衬底先后用丙酮、酒精和去离子水超声清洗5-8分钟，然后用氮气枪吹干表面残留水分。
  3. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，步骤1中，先在硅衬底上旋涂MMA光刻胶，然后置于恒温烘台上烘烤，再旋涂一层PMMA A2光刻胶并烘烤。
  4. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，步骤2中，只需要进行一次曝光，电子束曝光步骤的曝光剂量优化在750μC/cm 2。
  5. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，将经过电子束曝光后的样品放进甲基异丁基(甲)酮和异丙醇配比比例为1:3的溶液中显影3min，然后放进IPA溶液中定影1min，最后浸入去离子水中10s，取出用氮气枪吹干样品表面残留水分后，再进行电子束蒸发制作Al薄膜。
  6. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，步骤3中，所述Al薄膜的厚度控制在300-350nm。
  7. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，步骤4中，先将样品浸没在N-甲基吡咯烷酮溶液中，80℃水浴加热60min，然后将样品先后放入丙酮、酒精、去离子水超声剥离，最终留下沉积在硅衬底上的Al薄膜阵列。
  8. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，步骤5中，ICP硅刻蚀中气压控制在20mtorr，温度为10℃，射频功率为700-900W，ICP功率为20-30W，刻蚀时间为55min。
  9. 根据权利要求1所述的超高深宽比的硅纳米针阵列的制备方法，其特征在于，步骤5中，ICP硅刻蚀所用的气体为SF 6和C 4F 8，其中，SF 6气体流量为32Sccm，C 4F 8气体流量为40Sccm。
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