WO2021056778A1 - 一种晶圆背面覆铜的焊接工艺 - Google Patents

一种晶圆背面覆铜的焊接工艺 Download PDF

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WO2021056778A1
WO2021056778A1 PCT/CN2019/119752 CN2019119752W WO2021056778A1 WO 2021056778 A1 WO2021056778 A1 WO 2021056778A1 CN 2019119752 W CN2019119752 W CN 2019119752W WO 2021056778 A1 WO2021056778 A1 WO 2021056778A1
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copper sheet
wafer
welding
copper
cleaning
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PCT/CN2019/119752
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English (en)
French (fr)
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张茹
臧天程
姜维宾
安勇
金浩
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烟台台芯电子科技有限公司
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Publication of WO2021056778A1 publication Critical patent/WO2021056778A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H01L2224/80011—Chemical cleaning, e.g. etching, flux
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H01L2224/80012—Mechanical cleaning, e.g. abrasion using hydro blasting, brushes, ultrasonic cleaning, dry ice blasting, gas-flow
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H01L2224/80019—Combinations of two or more cleaning methods provided for in at least two different groups from H01L2224/8001 - H01L2224/80014
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/80024—Applying flux to the bonding area in the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/802—Applying energy for connecting
    • H01L2224/80201—Compression bonding
    • H01L2224/80203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding

Definitions

  • the invention relates to a welding process for copper coating on the back of a wafer, and belongs to the technical field of wafer manufacturing.
  • IGBT chip device As the core component of power equipment, IGBT chip device is also the main heat source of the equipment. Generally, the working temperature of the device exceeds a certain limit, and its working performance will be significantly reduced, which will affect the reliability of system operation. Therefore, in order to reduce the thermal resistance of the chip, To improve the heat dissipation capacity of the chip, the thickness of the IGBT chip is required to become thinner and thinner, but the ultra-thinness of the chip makes the chip prone to chipping during the packaging process, so how to reduce the thermal resistance of the chip and improve the heat dissipation of the chip Capability, while avoiding the fragility of the chip packaging process, is a technical problem that needs to be solved urgently.
  • the present invention provides a welding process for coating copper on the back of a wafer to solve the technical problems of chip temperature rise and chip fragility during packaging in the prior art.
  • a welding process of copper coating on the back of a wafer the process steps are as follows: S1: grinding: sanding the upper and lower surfaces of the copper sheet with sandpaper; S2: cleaning: placing the copper sheet on After soaking in alcohol, perform ultrasonic cleaning; S3: Annealing: Place the upper and lower substrates above and below the copper sheet to form an annealed structure, and perform annealing at 310°C; S4: Second grinding and cleaning: the annealed Repeat steps S1 and S2 for the copper sheet; S5: printing: print solder paste on the upper surface of the copper sheet; S6: soldering: place the wafer on the copper sheet where the solder paste has been printed, the back of the wafer is in contact with the copper sheet, and placed on top of the wafer On the substrate, the lower substrate is placed under the copper sheet to form a welding mechanism.
  • the welding structure is placed in a vacuum welding furnace for welding.
  • the welding temperature is 290 °C, and the welding is completed. Cool down;
  • the copper sheet is polished with sandpaper and soaked in alcohol and then ultrasonically cleaned to remove impurities and particles on the upper and lower surfaces of the copper sheet, so that the upper and lower surfaces of the copper sheet are smoother, which is beneficial to improve the subsequent wafer and copper
  • the welding quality of the sheet by annealing the copper sheet, the upper and lower substrates are used to fix the copper sheet to remove internal stress and prevent the copper sheet from being deformed during annealing; by grinding and cleaning the annealed copper sheet again , Further clean the upper and lower surfaces of the copper sheet to improve the welding quality of subsequent wafers and copper sheets; by using the upper and lower substrates to fix the wafer and the copper sheet, it is beneficial to prevent the occurrence of copper sheets when the copper sheet and the wafer are welded
  • the phenomenon of deformation reduces the scrap rate; the use of bromopropane to ultrasonically clean the soldered copper and wafers improves the cleaning effect; (1) The traditional wafer backside aluminum encapsulation process is changed
  • the copper sheet on the back of the chip cut from the wafer during packaging matches the upper copper material of the ceramic copper clad laminate (DBC) to improve the fatigue resistance of the module;
  • DBC ceramic copper clad laminate
  • the chip Due to the high toughness of copper, the chip can reduce the fragmentation rate during the packaging process, and the thinned chip reduces the thermal resistance of the chip and reduces the temperature rise of the module;
  • the problem of the temperature rise of the IGBT module is solved, It enhances the reliability of the product, and at the same time fills the gap in the field of copper coating on the back of the IGBT chip in China.
  • the present invention can also be improved as follows.
  • the size of the lower substrate is the same as the size of the copper sheet.
  • the beneficial effect of adopting the above-mentioned further solution is that it is beneficial to reduce the amount of deformation of the copper sheet during annealing.
  • step S5 a steel mesh is used to print the solder paste on the upper surface of the copper sheet, the thickness of the steel mesh is 0.25 mm, and a plurality of meshes are provided on the steel mesh.
  • the shape of the mesh is rectangular, and the spacing of the mesh is 0.4 mm.
  • the beneficial effect of adopting the above-mentioned further solution is that by arranging the stencil and arranging meshes on the stencil, it is beneficial to uniformly print the solder paste on the upper surface of the copper sheet, so that the thickness of the solder paste is consistent with the thickness of the stencil, and the efficiency of printing solder paste is improved. .
  • step S6 the soldered wafer and copper sheet are gradually cooled, and the cooling temperature is set to 200°C, 175°C, 150°C, 100°C, and 50°C.
  • the beneficial effect of adopting the above-mentioned further solution is that by setting the step-by-step cooling and setting the cooling temperature of different levels, it is beneficial to avoid the deformation of the copper sheet due to the sudden cooling, and to ensure the welding quality.
  • the alcohol temperature is 38° C.
  • the immersion time is 10 minutes
  • the ultrasonic cleaning time is 30 seconds.
  • the beneficial effect of adopting the above-mentioned further solution is that by setting the soaking temperature and soaking time of alcohol, and the time of ultrasonic cleaning, the cleaning efficiency of the copper sheet is improved.
  • step S7 the bromopropane soaking temperature is 38°C, the soaking time is 10 minutes, the alcohol soaking temperature is 38°C, and the ultrasonic cleaning time is 30s.
  • the beneficial effect of adopting the above-mentioned further solution is that by setting the soaking temperature and soaking time of bromopropane, the cleaning effect of the wafer after welding the copper sheet is improved, and the cleaning effect of the wafer after the welding copper sheet is further improved by alcohol soaking and ultrasonic cleaning. effectiveness.
  • FIG. 1 is a schematic diagram of the use of the annealing structure in step S3;
  • step S6 is a schematic front view of the copper sheet using stencil printing solder paste in step S6;
  • step S6 is a schematic top view of the copper sheet using stencil printing solder paste in step S6;
  • FIG. 4 is a schematic diagram of the use of step 7 welding structure
  • Figure 5 is a schematic diagram of the process flow of the present invention.
  • a welding process for copper coating on the back of a wafer is as follows:
  • Polishing Use 2000 molybdenum sandpaper to polish the upper and lower surfaces of the copper sheet 2;
  • Annealing Place the upper substrate 1 and the lower substrate 3 above and below the copper sheet 2 respectively.
  • the size of the upper and lower substrate 3 is the same as that of the copper sheet 2, which is beneficial to reduce the deformation of the copper sheet 2 during annealing and form annealing Structure, annealed at 310°C;
  • S5 Printing: Print solder paste on the upper surface of the copper sheet 2, and use the steel mesh 4 to print the solder paste on the upper surface of the copper sheet 2.
  • the thickness of the steel mesh 4 is 0.25 mm, and several meshes are arranged on the steel mesh 4 Hole 41, the shape of the mesh 41 is rectangular, and the spacing of the mesh 41 is 0.4mm.
  • S6 Soldering: Place the wafer 5 on the copper 2 sheets printed with solder paste, the back of the wafer 5 is in contact with the copper sheet 2, the upper substrate 1 is placed on the wafer 5, and the lower substrate 3 is placed under the copper sheet 2 to form a welding mechanism , Place the welding structure in a vacuum welding furnace for welding.
  • the welding temperature is 290°C, and the finished wafer 5 and copper sheet 2 are gradually cooled.
  • the cooling temperature is set to 200°C, 175°C, 150°C, 100°C , 50°C, by setting the step-by-step cooling and setting the cooling temperature of different levels, it is helpful to avoid the deformation of the copper sheet 2 due to sudden cooling and ensure the welding quality;
  • S7 Cleaning: Soak the wafer 5 on which the copper sheet 2 is soldered in bromopropane at a temperature of 38°C for 10 minutes, then perform ultrasonic cleaning for 30s, and then soak with alcohol at a temperature of 38°C for ultrasonic cleaning for 30s;
  • the copper sheet 2 is polished with sandpaper and soaked in alcohol and then ultrasonically cleaned to remove impurities and particles on the upper and lower surfaces of the copper sheet 2 to make the upper and lower surfaces of the copper sheet 2 smoother, which is beneficial to improve the subsequent wafer 5 and copper sheet 2.
  • welding quality by annealing the copper sheet 2, the upper substrate 1 and the lower substrate 3 are used to fix the copper sheet 2 to remove internal stress and prevent the copper sheet 2 from being deformed during annealing; by performing annealed copper sheet 2 Grinding and cleaning again to further clean the upper and lower surfaces of the copper sheet 2 to improve the welding quality of the subsequent wafer 5 and the copper sheet 2; using the upper substrate 1 and the lower substrate 3 to fix the wafer 5 and the copper sheet 2 is beneficial Prevent copper sheet 2 and wafer 5 from deforming when welding copper sheet 2 and reduce the scrap rate; use bromopropane to ultrasonically clean the welded copper sheet 2 and wafer 5 to improve the cleaning effect; (1) change the traditional The back side of the wafer 5 is covered with aluminum packaging process, the copper sheet 2 is welded on the back of the wafer 5.
  • the copper sheet 2 on the back of the chip cut by the wafer 5 and the ceramic coating during packaging are The upper copper material of the copper plate (DBC) is matched to improve the fatigue resistance of the module; (2) Because of the high toughness of copper, the chip can reduce the fragmentation rate during the packaging process, and the thinned chip reduces the thermal resistance of the chip. , Reduce the temperature rise of the module; (3) Solve the problem of the temperature rise of the IGBT module, enhance the reliability of the product, and also fill the gap in the field of copper coating on the back of the IGBT chip in China.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

一种晶圆背面覆铜的焊接工艺，属于晶圆制造技术领域，该工艺步骤如下：S1：打磨；S2：清洗；S3：退火；S4：第二次打磨和清洗：将退火后的铜片（2）重复步骤S1和S2；S5：印刷：对铜片（2）上表面印刷锡膏；S6：焊接：将晶圆（5）放置于印刷完锡膏的铜片（2）上，晶圆（5）背面与铜片（2）接触，晶圆（5）上方放置上基板（1），铜片（2）下方放置下基板（3），形成焊接机构，将焊接结构放置于真空焊接炉进行焊接，焊接温度为290℃，焊接完成后进行冷却；S7：清洗：将焊接上铜片（2）的晶圆（5）使用溴丙烷浸泡，然后进行超声波清洗，然后再用酒精浸泡进行超声波清洗；S8：检测空洞；用以解决现有技术中芯片温升高、芯片封装时易碎裂的技术问题。

Description

一种晶圆背面覆铜的焊接工艺 技术领域
本发明涉及一种晶圆背面覆铜的焊接工艺，属于晶圆制造技术领域。
背景技术
IGBT芯片器件作为功率设备的核心组件，也是设备的主要发热源，一般器件的工作温度超过一定的限制范围，其工作性能将显著下降，进而影响系统运行的可靠性，因此为了降低芯片热阻，提高芯片的散热能力，IGBT芯片的厚度要求越来越薄，但是芯片的超薄化使得芯片在封装过程中容易出现碎裂的情况，因此如何实现既能降低芯片的热阻，提高芯片的散热能力，同时又能避免芯片封装过程易碎裂的现象发生，是急需解决的技术问题。
发明内容
本发明针对现有技术存在的不足，提供一种晶圆背面覆铜的焊接工艺，用以解决现有技术中芯片温升高、芯片封装时易碎裂的技术问题。
本发明解决上述技术问题的技术方案如下：一种晶圆背面覆铜的焊接工艺，该工艺步骤如下：S1：打磨：对铜片上下表面使用砂纸进行打磨；S2：清洗：将铜片放置于酒精浸泡后，进行超声波清洗；S3：退火：在铜片上方和下方分别放置上基板和下基板形成退火结构，在310℃条件下进行退火；S4：第二次打磨和清洗：将退火后的铜片重复步骤S1和S2；S5：印刷：对铜片上表面印刷锡膏；S6：焊接：将晶圆放置于印刷完锡膏的铜片上，晶圆背面与铜片接触，晶圆上方放置上基板，铜片下方放置下基板，形成焊接机 构，将焊接结构放置于真空焊接炉进行焊接，焊接温度为290℃,焊接完成后进行冷却；S7:清洗：将焊接上铜片的晶圆使用溴丙烷浸泡，然后进行超声波清洗，然后再用酒精浸泡进行超声波清洗；S8：检测空洞，空洞率在3％内即为合格。
本发明的有益效果是：通过对铜片用砂纸进行打磨和用酒精浸泡后进行超声波清洗，清除铜片上下表面的杂质和颗粒，使铜片上下表面更光滑，有利于提高后续晶圆与铜片的焊接质量；通过对铜片进行退火操作，同时使用上基板和下基板对铜片进行固定，去除内应力，防止铜片退火时发生变形；通过对退火后的铜片进行再次打磨和清洗，进一步对铜片上下表面进行清理，提高后续晶圆与铜片的焊接质量；通过使用上基板和下基板对晶圆和铜片进行固定，有利于防止铜片与晶圆焊接时发生铜片变形的现象，降低废品率；通过采用溴丙烷进行超声波清洗焊接后的铜片与晶圆，提高清洗效果；(1)改变了传统的晶圆背面覆铝封装工艺，在晶圆背面焊接铜片，由于铜具有较高的电导率和热导率，封装时由晶圆切割的芯片背面的铜片与陶瓷覆铜板(DBC)的上层铜材料相匹配，提高模块的抗疲劳性；(2)由于铜的韧度高，芯片在封装过程中可降低碎片率，同时减薄后的芯片降低了芯片的热阻，降低了模块的温升；(3)解决了IGBT模块温升高的问题，增强了产品的可靠性，同时也填补了我国在IGBT芯片背面覆铜这一领域的空白。
在上述技术方案的基础上，本发明还可以做如下改进。
进一步，所述下基板的尺寸与铜片尺寸相同。
采用上述进一步方案的有益效果是，有利于降低铜片退火时的形变量。
进一步，步骤S5中使用钢网对铜片上表面进行印刷锡膏，所述钢网的厚度为0.25mm，所述钢网上设置若干个网孔。
进一步，所述网孔的形状为矩形，网孔的间距为0.4mm。
采用上述进一步方案的有益效果是，通过设置钢网以及在钢网上设置网 孔，有利于对铜片上表面均匀的印刷锡膏，使得锡膏的厚度与钢网厚度一直，提高印刷锡膏的效率。
进一步，步骤S6中对焊接完成的晶圆与铜片进行逐级冷却，冷却温度设定为200℃、175℃、150℃、100℃、50℃。
采用上述进一步方案的有益效果是，通过设置逐级冷却，并对不同等级的冷却温度进行设定，有利于避免铜片因骤冷而发生形变，保证焊接质量。
进一步，步骤S2中铜片清洗时，酒精温度为38℃，浸泡时间为10min，超声波清洗时间为30s。
采用上述进一步方案的有益效果是，通过设定酒精的浸泡温度和浸泡时间，以及超声波清洗的时间，提高铜片的清洗效率。
进一步，步骤S7中溴丙烷浸泡的温度为38℃，浸泡时间为10min，酒精浸泡温度为38℃，超声波清洗时间均为30s。
采用上述进一步方案的有益效果是，通过设置溴丙烷的浸泡温度和浸泡时间，提高焊接铜片后的晶圆的清洗效果，通过酒精浸泡和超声波清洗，进一步提高焊接铜片后的晶圆的清洗效率。
附图说明
图1为步骤S3中退火结构的使用示意图；
图2为步骤S6中铜片使用钢网印刷锡膏的主视示意图；
图3为步骤S6中铜片使用钢网印刷锡膏的俯视示意图；
图4为步骤7焊接结构的使用示意图；
图5为本发明的工艺流程示意图。
图中1.上基板，2.铜片，3.下基板，4.钢网，5.晶圆，41.网孔。
具体实施方式
以下结合附图对本发明的原理和特征进行描述，所举实例只用于解释本发明，并非用于限定本发明的范围。
一种晶圆背面覆铜的焊接工艺，该工艺步骤如下：
S1：打磨：对铜片2上下表面使用2000钼的砂纸进行打磨；
S2：清洗：将铜片2放置于温度为38℃的酒精浸泡10min后，进行超声波清洗30s，通过设定酒精的浸泡温度和浸泡时间，以及超声波清洗的时间，提高铜片的清洗效率；
S3：退火：在铜片2上方和下方分别放置上基板1和下基板3，上所述下基板3的尺寸与铜片2尺寸相同，有利于降低铜片2退火时的形变量，形成退火结构，在310℃条件下进行退火；
S4：第二次打磨和清洗：将退火后的铜片2重复步骤S1和S2；
S5：印刷：对铜片2上表面印刷锡膏，使用钢网4对铜片2上表面进行印刷锡膏，所述钢网4的厚度为0.25mm，所述钢网4上设置若干个网孔41，所述网孔41的形状为矩形，网孔41的间距为0.4mm，通过设置钢网4以及在钢网4上设置网孔41，有利于对铜片2上表面均匀的印刷锡膏，使得锡膏的厚度与钢网4厚度一直，提高印刷锡膏的效率；
S6：焊接：将晶圆5放置于印刷完锡膏的铜2片上，晶圆5背面与铜片2接触，晶圆5上方放置上基板1，铜片2下方放置下基板3，形成焊接机构，将焊接结构放置于真空焊接炉进行焊接，焊接温度为290℃,对焊接完成的晶圆5与铜片2进行逐级冷却，冷却温度设定为200℃、175℃、150℃、100℃、50℃，通过设置逐级冷却，并对不同等级的冷却温度进行设定，有利于避免铜片2因骤冷而发生形变，保证焊接质量；
S7:清洗：将焊接上铜片2的晶圆5使用温度为38℃的溴丙烷浸泡10min，然后进行超声波清洗30s，然后再用温度为38℃的酒精浸泡进行超声波清洗30s；
S8：检测空洞，空洞率在3％内即为合格。
通过对铜片2用砂纸进行打磨和用酒精浸泡后进行超声波清洗，清除铜片2上下表面的杂质和颗粒，使铜片2上下表面更光滑，有利于提高后续晶圆5与铜片2的焊接质量；通过对铜片2进行退火操作，同时使用上基板1和下基板3对铜片2进行固定，去除内应力，防止铜片2退火时发生变形；通过对退火后的铜片2进行再次打磨和清洗，进一步对铜片2上下表面进行清理，提高后续晶圆5与铜片2的焊接质量；通过使用上基板1和下基板3对晶圆5和铜片2进行固定，有利于防止铜片2与晶圆5焊接时发生铜片2变形的现象，降低废品率；通过采用溴丙烷进行超声波清洗焊接后的铜片2与晶圆5，提高清洗效果；(1)改变了传统的晶圆5背面覆铝封装工艺，在晶圆5背面焊接铜片2，由于铜具有较高的电导率和热导率，封装时由晶圆5切割的芯片背面的铜片2与陶瓷覆铜板(DBC)的上层铜材料相匹配，提高模块的抗疲劳性；(2)由于铜的韧度高，芯片在封装过程中可降低碎片率，同时减薄后的芯片降低了芯片的热阻，降低了模块的温升；(3)解决了IGBT模块温升高的问题，增强了产品的可靠性，同时也填补了我国在IGBT芯片背面覆铜这一领域的空白。
以上所述仅为本发明的较佳实施例，并不用以限制本发明，凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (7)

  1. 一种晶圆背面覆铜的焊接工艺，其特征在于：该工艺步骤如下：S1：打磨：对铜片上下表面使用砂纸进行打磨；S2：清洗：将铜片放置于酒精浸泡后，进行超声波清洗；S3：退火：在铜片上方和下方分别放置上基板和下基板，形成退火结构，在310℃条件下进行退火；S4：第二次打磨和清洗：将退火后的铜片重复步骤S1和S2；S5：印刷：对铜片上表面印刷锡膏；S6：焊接：将晶圆放置于印刷完锡膏的铜片上，晶圆背面与铜片接触，晶圆上方放置上基板，铜片下方放置下基板，形成焊接机构，将焊接结构放置于真空焊接炉进行焊接，焊接温度为290℃,焊接完成后进行冷却；S7:清洗：将焊接上铜片的晶圆使用溴丙烷浸泡，然后进行超声波清洗，然后再用酒精浸泡进行超声波清洗；S8：检测空洞，空洞率在3％内即为合格。
  2. 根据权利要求1所述的一种晶圆背面覆铜的焊接工艺，其特征在于：所述下基板的尺寸与铜片尺寸相同。
  3. 根据权利要求1所述的一种晶圆背面覆铜的焊接工艺，其特征在于：步骤S5中使用钢网对铜片上表面进行印刷锡膏，所述钢网的厚度为0.25mm，所述钢网上设置若干个网孔。
  4. 根据权利要求3所述的一种晶圆背面覆铜的焊接工艺，其特征在于：所述网孔的形状为矩形，网孔的间距为0.4mm。
  5. 根据权利要求1所述的一种晶圆背面覆铜的焊接工艺，其特征在于：步骤S6中对焊接完成的晶圆与铜片进行逐级冷却，冷却温度设定为200℃、175℃、150℃、100℃、50℃。
  6. 根据权利要求1所述的一种晶圆背面覆铜的焊接工艺，其特征在于：步骤S2中铜片清洗时，酒精温度为38℃，浸泡时间为10min，超声波清洗时间为30s。
  7. 根据权利要求1所述的一种晶圆背面覆铜的焊接工艺，其特征在于：步骤S7中溴丙烷浸泡的温度为38℃，浸泡时间为10min，酒精浸泡温度为38℃，超声波清洗时间均为30s。
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