WO2021008228A1 - Sip封装结构 - Google Patents

Sip封装结构 Download PDF

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Publication number
WO2021008228A1
WO2021008228A1 PCT/CN2020/091227 CN2020091227W WO2021008228A1 WO 2021008228 A1 WO2021008228 A1 WO 2021008228A1 CN 2020091227 W CN2020091227 W CN 2020091227W WO 2021008228 A1 WO2021008228 A1 WO 2021008228A1
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WIPO (PCT)
Prior art keywords
substrate
shielding
module
functional element
peripheral element
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PCT/CN2020/091227
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English (en)
French (fr)
Inventor
林耀剑
陈雪晴
周莎莎
陈建
刘硕
杨丹凤
Original Assignee
江苏长电科技股份有限公司
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Application filed by 江苏长电科技股份有限公司 filed Critical 江苏长电科技股份有限公司
Priority to US17/613,053 priority Critical patent/US20220223539A1/en
Publication of WO2021008228A1 publication Critical patent/WO2021008228A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1041—Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/107—Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates

Definitions

  • the present invention relates to the technical field of semiconductor packaging, in particular to a SIP packaging structure with embedded EMI electromagnetic shielding to achieve different electromagnetic shielding requirements for different secondary modules or SOC chips.
  • the purpose of the present invention is to provide a SIP package structure with embedded EMI electromagnetic shielding to achieve different electromagnetic shielding requirements for different secondary modules or SOC chips.
  • a SIP packaging structure includes a first module and a second module.
  • the first module and the second module are horizontally distributed or vertically superimposed. Electromagnetically sensitive frequencies are different; the SIP package structure further includes a shielding component, the shielding component includes a first shielding structure covering the first module, a second shielding structure covering the second module, at least part of the The first shielding structure and/or at least part of the second shielding structure is located between the first module and the second module.
  • the materials of the first shielding structure and the second shielding structure are different, or the structures of the first shielding structure and the second shielding structure are different, or the first shielding structure and the second shielding structure are different from each other.
  • the material and structure of the shielding structure are different.
  • the two modules are located on the front of the first module, and at least part of the first shielding structure is located between the first module and the second module.
  • first shielding structure is electrically connected to the second shielding structure, and the first shielding structure and/or the second shielding structure have at least one grounding point.
  • the first module includes a first substrate, a third substrate, a first functional element, a first peripheral element, and a first plastic packaging structure.
  • the first functional element, the first substrate, and the first peripheral element are located in the On the third substrate, the first plastic packaging structure encapsulates the first functional element, the first peripheral element and the first substrate;
  • the first shielding structure includes a shielding metal layer located on the front surface of the first plastic packaging structure;
  • the second module includes a second substrate, a second functional element, a second peripheral element, and a second plastic packaging structure. The second functional element and the second peripheral element are located on the front surface of the second substrate.
  • Two plastic encapsulation structures encapsulate the second functional element and the second peripheral component; the second shielding structure encapsulates the second plastic encapsulation structure; the shielding metal layer is electrically connected to the first substrate, and /Or the shielding metal layer is electrically connected to the second substrate.
  • the first shielding structure includes a shielding metal layer located between the first module and the second module, and the second shielding structure further includes a side surface capable of covering part of the first module
  • the additional shielding structure is electrically connected to the shielding metal layer.
  • the first shielding structure includes a shielding metal layer located between the first module and the second module, and the second shielding structure covers the front and side surfaces of the second module;
  • the end of the second shielding structure is electrically connected to the shielding metal layer, or the shielding assembly further includes the second shielding metal layer that is electrically connected to the shielding metal layer and the second module covering the side surface of the second module.
  • Conductive glue for shielding structure is electrically connected to the shielding metal layer and the second module covering the side surface of the second module.
  • both the first shielding structure and the second shielding structure have at least one ground point.
  • the first module includes a first substrate, a third substrate, a first functional element, a first peripheral element, and a first plastic packaging structure.
  • the first functional element, the first substrate, and the first peripheral element are located in the On the third substrate, the first plastic encapsulation structure encapsulates the first functional element, the first peripheral element, and the first substrate;
  • the second module includes a second substrate, a second functional element, and a second peripheral element , A second plastic packaging structure, the second functional element and the second peripheral element are located on the front surface of the second substrate, and the second plastic packaging structure encapsulates the second functional element and the second peripheral element;
  • the first shielding structure includes a shielding metal layer on the front side of the first plastic packaging structure, and at least one of the first substrate and the second substrate is electrically connected to the shielding metal layer; the second shielding The structure is wrapped around the second plastic packaging structure and is electrically connected to the second substrate.
  • the first module includes a first substrate, a third substrate, a first functional element, a first peripheral element, and a first plastic packaging structure.
  • the first functional element, the first substrate, and the first peripheral element are located in the On the third substrate, the first plastic encapsulation structure encapsulates the first functional element, the first peripheral element, and the first substrate;
  • the second module includes a second substrate, a second functional element, and a second peripheral element , A second plastic packaging structure, the second functional element and the second peripheral element are located on the front surface of the second substrate, and the second plastic packaging structure encapsulates the second functional element and the second peripheral element;
  • the second shielding structure is wrapped around the second plastic packaging structure and is electrically connected to the second substrate; the first substrate and the second substrate are connected by a first solder ball; the first shielding structure It includes at least one of a shielding metal layer located on the front surface of the first plastic packaging structure, at least a part of the second substrate, or a solder ball electrically connecting the first substrate and the second substrate
  • the first module includes a first substrate, a third substrate, a first functional element, a first peripheral element, and a first plastic packaging structure.
  • the first functional element, the first substrate, and the first peripheral element are located in the On the third substrate, the first plastic encapsulation structure encapsulates the first functional element, the first peripheral element, and the first substrate;
  • the second module includes a second substrate, a second functional element, and a second peripheral element , A second plastic packaging structure, the second functional element and the second peripheral element are located on the front surface of the second substrate, and the second plastic packaging structure encapsulates the second functional element and the second peripheral element;
  • the first substrate and the second substrate are connected by a first solder ball; the back of the third substrate has a third solder ball.
  • the first module includes a third substrate, a first functional element, a first peripheral element, and a first plastic packaging structure.
  • the first functional element and the first peripheral element are located on the third substrate.
  • the first plastic packaging structure encapsulates the first functional element and the first peripheral element;
  • the second module includes a second substrate, a second functional element, a second peripheral element, and a second plastic packaging structure.
  • the second functional element and the second peripheral element are located on the front surface of the second substrate.
  • Two plastic packaging structures encapsulate the second functional element and the second peripheral element;
  • the third substrate and the second substrate are electrically connected through a first transition metal pillar.
  • the first plastic package structure also covers the side surface of the third substrate, and the width of the first plastic package structure located on the side surface of the third substrate is not less than 70 ⁇ m.
  • the SIP package structure further includes a third peripheral element located on the back of the third substrate.
  • the first module includes a first substrate, a third substrate, a first functional element, a first peripheral element, and a first plastic packaging structure.
  • the first functional element, the first substrate, and the first peripheral element are located in the On the third substrate, the first plastic encapsulation structure encapsulates the first functional element and the first peripheral element;
  • the first substrate includes an extension substrate extending outside the first plastic packaging structure, and the SIP packaging structure further includes an external packaging body on the extension substrate and/or functional elements that do not require plastic packaging.
  • the shielding assembly further includes a third shielding structure that covers the outer package and/or the functional element that does not require plastic encapsulation, and at least one of the first shielding structure or the second shielding structure and the The third shielding structure is electrically connected.
  • the beneficial effect of the present invention is that the SIP package structure of the present invention applies different frequency-sensitive modules and devices to different electromagnetic shielding technologies, and then performs horizontal or vertical stacking and integrated packaging. Different electromagnetic shielding requirements are achieved for different secondary modules or SOC chips, and the overall structure is compact.
  • FIG. 1 is a schematic diagram of the SIP package structure of a preferred embodiment of the present invention.
  • FIG. 2 is a schematic diagram of the SIP package structure of another preferred embodiment of the present invention.
  • FIG. 3 is a schematic diagram of the SIP package structure of another preferred embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the SIP package structure of another preferred embodiment of the present invention.
  • Fig. 5 is a schematic diagram of a SIP package structure according to another preferred embodiment of the present invention.
  • the SIP package structure 100 at least includes a first module 1, a second module 2 with a different electromagnetic sensitivity frequency from the first module 1, and a shielding component 4.
  • the shielding component 4 is used to form the EMI electromagnetic shield of the SIP package structure 100 to prevent external electromagnetic signal interference and magnetic leakage interference between different modules.
  • the first module 1 is a main module and includes a first substrate 11, a third substrate 3, a first functional element 12, a first peripheral element 13, a first plastic packaging structure 14, and the first functional element 12, A substrate 11 and a first peripheral element 13 are located on the third substrate 3, such as the front side; the first plastic packaging structure 14 encapsulates the first functional element 12, the first peripheral element 13 and the first substrate 11.
  • the first functional element 12 is built inside the first substrate 11, and is placed on the front surface of the third substrate 3 together with the first substrate 11 and the first peripheral element 13 Reflow bonding is performed on the pad.
  • the first functional element 12 and the first peripheral element 13 may also be attached to the inside or outside of the first substrate 11, respectively.
  • the first functional element 12 is embedded inside the first substrate 11, and it can be pre-embedded in a plastic molding compound together with the first substrate 11. It includes substrate-level embedding, crystal There are two types of circular-level embedding; and an optional rewiring and bump molding process (or Fan-out process) is performed, and then the back metal pad of the first substrate 11 is exposed. After the final cutting and inspection, together with the first peripheral component 13 are bonded to the front pad of the third substrate. The volume of the first module 1 can be greatly reduced.
  • the first module 1 further includes a first peripheral element 13 built into the first substrate 11 and located around the first functional element 12, and the first peripheral element 13
  • the element 13 is arranged adjacent to the first functional element 12, and may also be spaced apart by a part of the first substrate 11 or the first transition metal pillar 8 as shown in FIGS. 1 and 3 to 5.
  • the second module 2 includes a second substrate 21, a second functional element 22, a second peripheral element 23, and a second plastic packaging structure 24.
  • the second functional element 22 and the second peripheral element 23 are located on the first On the front of the second substrate 21, the second plastic encapsulation structure 24 encapsulates the second functional element 22 and the second peripheral element 23.
  • the third substrate 3 and the second substrate 21 may be organic homogenous or heterogeneous substrates, containing glass fibers and/or inorganic fillers, and corresponding resins.
  • the first substrate 11 and the second substrate 21 may also be redistribution layers of circuits, including homogenous or heterogeneous layers of organic dielectric materials and metal circuits.
  • the first functional element 12 and the second functional element 22 are active devices, or active elements, including but not limited to commonly used functional elements such as chips or secondary modules.
  • the first peripheral element 13 and the second peripheral element 23 are passive devices, or passive elements, including but not limited to resistors, capacitors, and inductors.
  • the peripheral elements are located around the functional elements, making the SIP package structure 100 compact as a whole.
  • the shielding assembly 4 includes a first shielding structure 41 covering the first module 1 and a second shielding structure 42 covering the second module 2. At least part of the first shielding structure 41 and at least part of the second shielding structure 42 are grounded, or both the first shielding structure 41 and the second shielding structure 42 have at least one grounding point, which can play a very important role. Good electromagnetic shielding effect.
  • the first shielding structure 41 covers the first module 1, including two situations: the first shielding structure 41 is directly connected to the first functional element 12 and the first peripheral element 13 Contact or the first plastic packaging structure 14 between the first shielding structure 41 and the first functional element 12 and the first peripheral element 13 can achieve a good electromagnetic shielding effect.
  • the second shielding structure 42 covers the second module 2 in two situations: the second shielding structure 42 is in direct contact with the second functional element 22 and the second peripheral element 23, or the first A second plastic encapsulation structure 24 is spaced between the second shielding structure 42 and the second functional element 22 and the second peripheral element 23.
  • the materials of the first shielding structure 41 and the second shielding structure 42 are different, or the structures of the first shielding structure 41 and the second shielding structure 42 are different, or the first shielding structure 41 and The materials and structures of the second shielding structure 42 are different; through the overall cooperation of the structure and the material, the first shielding structure 41 and the second shielding structure 42 with different electromagnetic shielding effects are formed, which can be used for modules sensitive to different electromagnetic frequencies. Different electromagnetic shielding can meet the electromagnetic shielding requirements of the entire SIP package structure 100.
  • first shielding structure 41 and the second shielding structure 42 select appropriate materials and/or structures according to the frequencies that the first module 1 and the second module 2 need to shield, respectively.
  • sputtering or spraying high and low frequency shielding coating is used to form the required first shielding structure 41 and second shielding structure 42.
  • the first module 1 and the second module 2 can be arranged horizontally or vertically, and at least part of the shielding component 4 is embedded in the SIP packaging structure 100, Realize different EMI shielding of different modules.
  • at least part of the first shielding structure 41 and/or at least part of the second shielding structure 42 is located between the first module 1 and the second module 2, and can form different shields for the two Effective, and can prevent magnetic leakage between the two.
  • the vertical superposition of the first module 1 and the second module 2 is taken as an example to illustrate the design of the shielding component 4 of the SIP package structure 100 of the present invention.
  • the second module 2 is located on the front of the first module 1, and the two are vertically superimposed. There is a filler between the first substrate 11 and the second substrate 21, and the first substrate 11 and the second substrate 21 are connected by a first solder ball 5. As shown in FIG.
  • the SIP package structure 100 further includes a third substrate 3 located on the back of the first substrate 11, and the third substrate 3 has a third solder ball 7 on the back.
  • the third solder ball 7 serves as the overall input/output terminal of the SIP package structure 100, and provides transmission of power, signal, ground, etc.
  • the third substrate 3 is electrically connected to the first substrate 11 through the second solder balls 6; or as shown in Figure 3 As shown, the third substrate 3 and the second substrate 21 are electrically connected through the first transition metal pillar 8 to provide electrical connection between the upper and lower modules and the grounding of the partial shielding assembly 4.
  • the second substrate 21 or the third substrate 3 may be absent, and the bonding and interconnection are directly performed by solder balls or metal bumps or other metal structures.
  • the first plastic package structure 14 also covers the side surface of the third substrate 3.
  • the width of the first plastic package structure 14 located on the side surface of the third substrate 3 is not less than 70 ⁇ m, The stability of the entire SIP packaging structure 100 can be improved.
  • the SIP package structure 100 further includes a third peripheral element 31 selectively disposed on the back of the third substrate 3. That is, the third peripheral element 31 may be provided as shown in FIGS. 1 to 5, or the third peripheral element 31 may not be provided. Component 31.
  • the first peripheral element 13 can also be attached to the third substrate 3, and then the first substrate 11 with the first functional element 12 and the third The substrate 3 is pressed together, and the first peripheral element 13 described above is built into the first substrate 11 without affecting the implementation of the first functional element 12.
  • the first substrate 11 may not be provided, and the first functional element 12 and the first peripheral element 13 are both surface-mounted on the third substrate 3.
  • the first shielding structure 41 is located between the first module 1 and the second module 2, or at least part of the first shielding structure 41 is embedded in the SIP package structure 100 for the first module 1 Conduct electromagnetic shielding.
  • the first shielding structure 41 may be a shielding metal layer 411 located on the front of the first plastic packaging structure.
  • the shielding metal layer 411 includes a shielding metal coating or a shielding metal sheet; it may also be part of the second substrate 21. It may also be a bonding point such as a solder ball that electrically connects the first substrate 11 and the second substrate 21.
  • first shielding structure 41 and the second shielding structure 42 are electrically connected, and the first shielding structure 41 and/or the second shielding structure 42 have at least one grounding point , Can form a strong overall EMI grounding and electromagnetic shielding protection.
  • the first shielding structure 41 includes a shielding metal layer 411 located between the first module 1 and the second module 2, and the shielding metal layer 411 is located on the front of the first plastic packaging structure 14 .
  • the shielding metal layer 411 is electrically connected to the first substrate 11, and/or the shielding metal layer 411 is electrically connected to the second substrate 21; or "the first substrate 11, the second substrate At least one of 21 is in electrical contact with the shielding metal layer 411", so that at least one of the first shielding structure 41 is grounded, thereby realizing the grounding of the entire shielding assembly 4.
  • the shielding metal layer 411 is electrically connected to the first substrate 11 and the second substrate 21, which means that the shielding metal layer 411 is electrically connected to the grounding wire in the substrate.
  • the manner of electrically connecting the first shielding structure 41 and the second shielding structure 42 includes but is not limited to:
  • the first shielding structure 41 includes a shielding metal layer 411 located between the first module 1 and the second module 2, and the second shielding structure 42 also includes a covering portion
  • the additional shielding structure 421 on the side of the first module 1 is electrically connected to the shielding metal layer 411 to achieve highly integrated, highly reliable grounding and high connection performance, and achieve overall product shielding Design to improve the EMC performance of the product.
  • the first shielding structure 41 includes a shielding metal layer 411 between the first module 1 and the second module 2, and the second shielding structure 42 covers the On the front and side surfaces of the second module 2, the shielding assembly 4 further includes a conductive adhesive that electrically connects the shielding metal layer 411 and the second shielding structure 42 covering the side of the second module 2 43;
  • the conductive adhesive 43 forms a reinforced EMI grounding and electromagnetic shielding protection.
  • the first shielding structure 41 and the second shielding structure 42 each have at least one ground point, the first module 1 and the second module 2 respectively form independent EMI, and then Fit together.
  • the first shielding structure 41 includes a shielding metal layer 411 located between the first module 1 and the second module 2, and the first substrate 11. At least one of the second substrates 21 is electrically connected to the shielding metal layer 411; the second shielding structure 42 is wrapped around the second plastic packaging structure 24 and is electrically connected to the second substrate 21 sexual connection.
  • FIG. 1 is a SIP package structure 100 according to a preferred embodiment of the present invention.
  • the first module 1 specifically includes a first substrate 11, a third substrate 3, a first functional element 12, a first peripheral element 13 arranged around the first functional element 12, and a first plastic packaging structure 14;
  • the functional element 12, the first substrate 11, and the first peripheral element 13 are located on the third substrate 3, such as the front side;
  • the first plastic encapsulation structure 14 encapsulates the first functional element 12, the first peripheral element 13, and the first A base plate 11 has a compact overall structure and small volume.
  • the first functional element 12 is built in the inner side of the first substrate 11, and is placed on the front pad of the third substrate 3 together with the first substrate 11 and the first peripheral element 13 for reflow bonding; A part of the first substrate 11 is located between the first functional element 12 and the first peripheral element 13.
  • the first substrate 11 is provided with a receiving cavity for accommodating the first peripheral element 13 so as to reduce the volume of the entire SIP package 100, and the first peripheral element 13 is built into the first substrate 11 Achieve an equivalent effect.
  • first functional element 12 and the first peripheral element 13 may also be attached to the inside or outside of the first substrate 11, respectively.
  • the third substrate 3 has solder balls on the back surface, which serve as the overall input and output terminals of the SIP package structure 100 to provide transmission of power, signals, and ground.
  • a third peripheral element 31 is further provided on the back of the third substrate 3.
  • the first shielding structure 41 includes a shielding metal layer 411 on the front side of the first module 1, and the shielding metal layer 411 is electrically connected to the first substrate 11 at A, and the shielding effect is good.
  • the second module 2 includes a second substrate 21, a second functional element 22, a second peripheral element 23, and a second plastic packaging structure 24.
  • the second functional element 22 and the second peripheral element 23 are located on the first The front surface of the second substrate 21, the second peripheral element 23 is arranged around the second functional element 22, and the second plastic encapsulation structure 24 encapsulates the second functional element 22 and the second peripheral element 23 with a compact structure.
  • the second substrate 21 is located on the side of the shielding metal layer 411 away from the first module 1 with a filler between them, and the second substrate 21 and the first substrate 11 pass The first solder ball 5 is electrically connected.
  • the shielding metal layer 411 is in electrical contact with the second substrate 21 at B.
  • the first shielding structure 41 at least includes a shielding metal layer 411, a part of the second substrate 21, and a first solder ball 5 electrically connecting the first substrate 11 and the second substrate 21.
  • the second shielding structure 42 covers the front and side surfaces of the second module 2 and has an effective shielding effect on the second shielding structure 42.
  • the second shielding structure 42 covers part of the first module 1 at the same time, and the second shielding structure 42 and the shielding metal layer 411 are electrically connected at C to achieve a highly integrated and reliable grounding. And high connection performance, realize the overall shielding design of the product, and improve the EMI (electromagnetic shielding) performance of the product.
  • the second shielding structure 42 also covers the side surface of the third substrate 3, and the second shielding structure 42 is electrically connected to the third substrate 3 at D to achieve grounding.
  • FIG. 2 is a SIP packaging structure 100 according to another preferred embodiment of the present invention.
  • the difference from the SIP packaging structure 100 shown in FIG. 1 is only:
  • part of the first peripheral element 13 and the first functional element 12 are arranged adjacent to each other, and they share the same shielding metal layer 411, and both ends of the shielding metal layer 411 are connected to each other.
  • the first substrate 11 is electrically connected.
  • the first plastic packaging structure 14 simultaneously encapsulates the side surface of the third substrate 3, and the width of the first plastic packaging structure 14 outside the third substrate 3 is greater than 0 ⁇ m, preferably greater than 70 ⁇ m, to improve packaging reliability .
  • the second shielding structure 42 only covers the second module 2, and the second shielding structure 42 is electrically connected to the second substrate 21 at E. Therefore, the first module 1 and the second module 2 respectively form an independent shielding structure, and then connect to form a complete EMI protection.
  • FIG. 3 is a SIP package structure 100 according to another preferred embodiment of the present invention.
  • the difference from the SIP package structure 100 shown in FIG. 1 is only:
  • the SIP package structure 100 includes only the third substrate 3 but not the first substrate 11.
  • the first functional element 12 and the first peripheral element 13 are both surface-mounted on the third substrate 3, and
  • the third substrate 3 and the second substrate 21 are electrically connected through a first transfer metal post 8; the first transfer metal post 8 provides electrical connection between the first module 1 and the second module 2, and is partially shielded Component 4 grounding.
  • the shielding metal layer 411 covering the first functional element 12 is electrically connected to the second substrate 21, and the shielding metal layer 411 covering the first peripheral element 13 is connected to the conductive pin of the first peripheral element 13
  • the third substrate 3 is electrically connected to achieve a good grounding effect.
  • the second shielding structure 42 only covers the second module 2, and the ends of the second shielding structure 42 are electrically connected to the shielding metal layer 411 at F respectively. Therefore, the first module 1 and the second module 2 respectively form an independent shielding structure, and then connect to form a complete EMI protection.
  • the shielding assembly 4 also includes an overall shielding structure 45 covering the first module 1, the second module 2 and the third substrate 3 as a whole.
  • FIG. 4 is a SIP packaging structure 100 according to another preferred embodiment of the present invention.
  • the difference from the SIP packaging structure 100 shown in FIG. 3 is only:
  • the SIP package structure 100 includes a first substrate 11, and the first substrate 11 includes an extension substrate 111 extending outside the first plastic packaging structure 14, or the extension substrate 111 is not covered by the first plastic packaging structure 14. Sealing, the extension substrate 111 is the first substrate 11 adjacent to the first module 1 on the same substrate during the preparation of the first module 1. That is, two adjacent first modules 1 use the same transfer block 110, and the transfer block 110 is finally cut to become the first substrate 11 in the first module, and the side surface of the first substrate 11 (such as The dotted line in the figure) is exposed.
  • the first plastic packaging structure 14 does not include the first substrate 11, the first functional element 12 and the first peripheral element 13 are both surface-mounted on the third substrate 3, and the third The substrate 3 and the second substrate 21 are electrically connected through a first transfer metal pillar 8; and outside the first plastic packaging structure 14, the first substrate 11 and the third substrate 3 are electrically connected through a second solder ball 6 Electrical connection.
  • the SIP package structure 100 also includes an external package and/or functional element 9 that does not require plastic encapsulation on the extension substrate 111.
  • the external package and other functional elements that do not require plastic encapsulation share a substrate with the first functional element 12, In order to reduce the cost or not affect the function of the external package and/or the functional element 9 that does not require plastic packaging, such as the antenna function.
  • Other functional components that do not require plastic packaging include but are not limited to pressure-sensitive BAW/SAW filters, MEMS devices, B2B connectors, photoelectric connection couplers, etc., which are placed and bonded on the substrate 11 without being plasticized.
  • the shielding metal layer 411 covering the first peripheral element 13 is electrically connected to the first substrate 11 around the first peripheral element 13.
  • the shielding assembly 4 also includes a conductive adhesive 43 that electrically connects the shielding metal layer 411 and the second shielding structure 42 to enhance EMI grounding and electromagnetic shielding protection.
  • a conductive adhesive 43 that electrically connects the shielding metal layer 411 and the second shielding structure 42 to enhance EMI grounding and electromagnetic shielding protection.
  • the second shielding structure 42 on the side of the second module 2 and the first shielding structure 41 are connected by conductive glue 43.
  • FIG. 5 is a SIP packaging structure 100 according to another preferred embodiment of the present invention.
  • the difference from the SIP packaging structure 100 shown in FIG. 4 is only:
  • the shielding assembly 4 also includes a third shielding structure 44 covering the functional elements that do not require secondary plastic packaging, such as pressure-sensitive BAW/SAW filters.
  • the third shielding structure 44 is a part of the second shielding structure 44, and the second shielding structure 44 also covers the exposed side surface of the first substrate 11.
  • the third shielding structure 44 and the second shielding structure 42 use the same shielding material and are electrically connected, and may be integrally arranged.
  • the second shielding structure 42 simultaneously covers the first shielding structure 42 A peripheral side of a module 1, and the second shielding structure 42 and the first shielding structure 41 are electrically connected at G to achieve a highly integrated, highly reliable grounding and high connection performance, and realize the overall shielding design of the product , Improve the EMC performance of the product.
  • the SIP package structure 100 may also include an extension substrate 111, an external package, and/or does not require plastic packaging.
  • the functional element 9 may also include the third shielding structure 44 on this basis.
  • modules and devices that are sensitive to different frequencies are subjected to different electromagnetic shielding technologies, and then stacked horizontally or vertically, and then integrated and packaged, targeting different secondary modules or SOC chip realizes different electromagnetic shielding requirements.
  • the pressure-sensitive devices such as BAW/SAW filters and MEMS, B2B connectors or photoelectric connection couplers are placed and bonded on the main module substrate instead of being plasticized, which meets the different requirements of all components, and The overall structure is compact.

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Abstract

本发明提供一种SIP封装结构，包括第一模组、第二模组和屏蔽组件，所述第一模组与所述第二模组水平分布或垂直叠加，所述第一模组与所述第二模组的电磁敏感频率不同；所述屏蔽组件包括覆盖所述第一模组的第一屏蔽结构、覆盖所述第二模组的第二屏蔽结构，至少部分所述第一屏蔽结构和/或至少部分所述第二屏蔽结构位于所述第一模组和所述第二模组中间。

Description

SIP封装结构 技术领域
本发明涉及半导体封装技术领域，尤其涉及一种带嵌入式EMI电磁屏蔽，以针对不同的次级模组或SOC芯片实现不同的电磁屏蔽要求的SIP封装结构。
背景技术
随着半导体技术的发展，尤其5G通信时代的到来，不但对电子器件的需求越来越微型化、轻薄化，且对异质集成不同元件的需求越来越大，因此半导体异质集成的系统级封装(SiP)逐渐成为封装的趋势。
异质集成发展需要高密度、小型化、多维化，以满足多频率和多带宽的应用。然而，不同的次级模组或SOC芯片可能对不同的电磁频率干涉有不同的敏感度和要求；例如，板到板连接器或光电连接器等压力敏感器件需与电磁屏蔽的模组分离和不能被完全塑封。基于目前的SIP封装结构，难以兼顾不同的次级模组或SOC芯片对电磁屏蔽的要求。
有鉴于此，有必要提供一种改进的SIP封装结构，以解决上述问题。
发明内容
本发明的目的在于提供一种带嵌入式EMI电磁屏蔽，以针对不同的次级模组或SOC芯片实现不同的电磁屏蔽要求的SIP封装结构。
为实现上述发明目的，本发明采用如下技术方案：
一种SIP封装结构，包括第一模组、第二模组，所述第一模组与所述第二模组水平分布或垂直叠加，所述第一模组与所述第二模组的电磁敏感频率不同；所述SIP封装结构还包括屏蔽组件，所述屏蔽组件包括 覆盖所述第一模组的第一屏蔽结构、覆盖所述第二模组的第二屏蔽结构，至少部分所述第一屏蔽结构和/或至少部分所述第二屏蔽结构位于所述第一模组和所述第二模组中间。
进一步地，所述第一屏蔽结构和所述第二屏蔽结构的材料不同，或所述第一屏蔽结构和所述第二屏蔽结构的结构不同，或所述第一屏蔽结构和所述第二屏蔽结构的材料和结构均不同。
进一步地，所述二模组位于所述第一模组的正面，至少部分所述第一屏蔽结构位于所述第一模组与所述第二模组之间。
进一步地，所述第一屏蔽结构与所述第二屏蔽结构电性连接，所述第一屏蔽结构和/或所述第二屏蔽结构具有至少一个接地点。
进一步地，所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；所述第一屏蔽结构包括位于所述第一塑封结构正面的屏蔽金属层；所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；所述第二屏蔽结构包覆所述第二塑封结构；所述屏蔽金属层与所述第一基板电性连接，和/或所述屏蔽金属层与所述第二基板电性连接。
进一步地，所述第一屏蔽结构包括位于所述第一模组与所述第二模组之间的屏蔽金属层，所述第二屏蔽结构还包括能够覆盖部分所述第一模组的侧面的附加屏蔽结构，所述附加屏蔽结构与所述屏蔽金属层电性连接。
进一步地，所述第一屏蔽结构包括位于所述第一模组与所述第二模组之间的屏蔽金属层，所述第二屏蔽结构包覆所述第二模组的正面和侧面；所述第二屏蔽结构的端部与所述屏蔽金属层电性连接，或所述屏蔽 组件还包括电性连接所述屏蔽金属层与包覆所述第二模组的侧面的所述第二屏蔽结构的导电胶。
进一步地，所述第一屏蔽结构、所述第二屏蔽结构均具有至少一个接地点。
进一步地，所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；所述第一屏蔽结构包括位于所述第一塑封结构正面的屏蔽金属层，且所述第一基板、所述第二基板中的至少一个与所述屏蔽金属层电性连接；所述第二屏蔽结构包覆于所述第二塑封结构外且与所述第二基板电性连接。
进一步地，所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；所述第二屏蔽结构包覆于所述第二塑封结构外且与所述第二基板电性连接；所述第一基板与所述第二基板通过第一焊球连接；所述第一屏蔽结构包括位于所述第一塑封结构正面的屏蔽金属层、至少部分所述第二基板、或电性连接所述第一基板与所述第二基板的焊球中的至少一个。
进一步地，所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周 边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；所述第一基板与所述第二基板通过第一焊球连接；所述第三基板背面具有第三焊球。
进一步地，所述第一模组包括第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件；
所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；
所述第三基板、所述第二基板通过第一转接金属柱电性连接。
进一步地，所述第一塑封结构还包覆所述第三基板的侧面，且位于所述第三基板侧面的所述第一塑封结构的宽度不小于70μm。
进一步地，所述SIP封装结构还包括位于所述第三基板背面的第三周边元件。
进一步地，所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件；
所述第一基板包括延伸于所述第一塑封结构外的延伸基板，所述SIP封装结构还包括位于所述延伸基板上的外部封装体和/或无需塑封的功能元件。
进一步地，所述屏蔽组件还包括包覆所述外部封装体和/或无需塑封的功能元件的第三屏蔽结构，所述第一屏蔽结构或所述第二屏蔽结构中的至少一个与所述第三屏蔽结构电性连接。
与现有技术相比，本发明的有益效果是：本发明的SIP封装结构，将不同频率敏感的模组和器件分别进行不同的电磁屏蔽技术处、然后进行水平或垂直堆叠、再集成封装，针对不同的次级模组或SOC芯片实现不同的电磁屏蔽要求，且整体结构紧凑。
附图说明
图1是本发明一较佳实施例的SIP封装结构示意图；
图2是本发明另一较佳实施例的SIP封装结构示意图；
图3是本发明另一较佳实施例的SIP封装结构示意图；
图4是本发明另一较佳实施例的SIP封装结构示意图；
图5是本发明另一较佳实施例的SIP封装结构示意图。
具体实施方式
以下将结合附图所示的具体实施方式对本发明进行详细描述。但这些实施方式并不限制本发明，本领域的普通技术人员根据这些实施方式所做出的结构、方法、或功能上的变换均包含在本发明的保护范围内。
在本发明的各个图示中，为了便于图示，结构或部分的某些尺寸会相对于其它结构或部分夸大，因此，仅用于图示本发明的主题的基本结构。
另外，本文使用的“和/或”表示“或”或者“和”，例如“M和/或N”，包括M，或N，或M和N三种情况。
请参阅图1～图5所示，为本发明较佳实施例的SIP封装结构100。所述SIP封装结构100至少包括第一模组1、与所述第一模组1的电磁敏感频率不同的第二模组2、屏蔽组件4。所述屏蔽组件4用以构成所述 SIP封装结构100的EMI电磁屏蔽，防止外界电磁信号干扰及不同模组之间的漏磁干扰。
所述第一模组1为主模组，包括第一基板11、第三基板3、第一功能元件12、第一周边元件13、第一塑封结构14，所述第一功能元件12、第一基板11、第一周边元件13位于所述第三基板3上，例如正面；所述第一塑封结构14包封所述第一功能元件12、第一周边元件13和第一基板11。
具体地，如图1～图2所示，所述第一功能元件12内置于所述第一基板11内侧，并与第一基板11、第一周边元件13一起置于第三基板3的正面焊盘上进行回流焊键合。或者，所述第一功能元件12和第一周边元件13也可以分别贴合于所述第一基板11的内侧或外侧。
作为另一种工艺和结构，所述第一功能元件12内埋于所述第一基板11内侧，其可以与第一基板11一起预埋入于塑封料中，其包括基板级埋入、晶圆级埋入两类；并进行可选的重布线和凸块成型工艺(或称Fan-out扇出工艺)，然后将第一基板11的背面金属焊盘露出。最后切割检验后与第一周边元件13一起与第3基板的正面焊盘键合。可大大减小所述第一模组1的体积。
进一步地，如图2所示，所述第一模组1还包括内置于所述第一基板11内侧且位于所述第一功能元件12周围的第一周边元件13，且所述第一周边元件13与所述第一功能元件12相邻设置，也可以如图1、图3～图5所示被部分所述第一基板11或第一转接金属柱8间隔开设置。
所述第二模组2包括第二基板21、第二功能元件22、第二周边元件 23、第二塑封结构24，所述第二功能元件22与所述第二周边元件23位于所述第二基板21正面，所述第二塑封结构24包封所述第二功能元件22和所述第二周边元件23。
所述第三基板3和所述第二基板21可以是有机同质或异质层的基板，包含玻璃纤维和/或无机填料，和相应的树脂。同时所述第一基板11和所述第二基板21也可以是线路的重布线层，包括同质或异质层的有机介电材料和金属线路。
所述第一功能元件12、所述第二功能元件22为有源器件，或称主动元件，包括但不限于芯片或次级模组等常用的功能元件。所述第一周边元件13、所述第二周边元件23为无源器件，或称为被动元件，包括但不限于电阻、电容、电感等。通常情况下，所述周边元件位于所述功能元件的四周，使得所述SIP封装结构100整体紧凑。
所述屏蔽组件4包括覆盖所述第一模组1的第一屏蔽结构41、覆盖所述第二模组2的第二屏蔽结构42。至少部分所述第一屏蔽结构41、至少部分所述第二屏蔽结构42接地，或称所述第一屏蔽结构41、所述第二屏蔽结构42均具有至少一处接地点，能够起到很好的电磁屏蔽效果。
本领域技术人员可以理解的是：所述第一屏蔽结构41覆盖所述第一模组1，包括两种情形：所述第一屏蔽结构41与第一功能元件12、第一周边元件13直接接触，或所述第一屏蔽结构41与第一功能元件12、第一周边元件13之间间隔第一塑封结构14，均能起到良好的电磁屏蔽效果。同理，所述第二屏蔽结构42覆盖所述第二模组2，包括两种情形：所述第二屏蔽结构42与第二功能元件22、第二周边元件23直接接触， 或所述第二屏蔽结构42与第二功能元件22、第二周边元件23之间间隔第二塑封结构24。
其中，所述第一屏蔽结构41和所述第二屏蔽结构42的材料不同，或所述第一屏蔽结构41和所述第二屏蔽结构42的结构不同，或所述第一屏蔽结构41和所述第二屏蔽结构42的材料和结构均不同；通过结构与材料的整体配合，构成电磁屏蔽效果不同的第一屏蔽结构41、第二屏蔽结构42，能够针对不同电磁频率敏感的模组进行不同的电磁屏蔽，从而达到整个SIP封装结构100的电磁屏蔽需求。
具体地，所述第一屏蔽结构41、所述第二屏蔽结构42分别根据第一模组1、第二模组2需要屏蔽的频率选择合适的材料和/或结构。例如，采用溅射或喷涂高低频屏蔽涂层构成需要的第一屏蔽结构41、第二屏蔽结构42。
根据不同的产品外观尺寸需求，所述第一模组1和所述第二模组2可以水平排布或垂直排布，至少部分所述屏蔽组件4内嵌于所述SIP封装结构100内，实现不同模组的不同EMI屏蔽。具体地至少部分所述第一屏蔽结构41和/或至少部分所述第二屏蔽结构42位于所述第一模组1和所述第二模组2之间，能够对两者形成不同的屏蔽效果，且可以防止两者之间漏磁。
如图1～图5所示，基于上述所有结构描述，以第一模组1与第二模组2垂直叠加为例来说明本发明的SIP封装结构100的屏蔽组件4设计。
所述第二模组2位于所述第一模组1的正面，两者垂直叠加。所述第一基板11与所述第二基板21之间具有填充胶，且所述第一基板11与 所述第二基板21通过第一焊球5连接。
进一步地，所述SIP封装结构100还包括位于所述第一基板11背面的第三基板3，所述第三基板3背面具有第三焊球7。所述第三焊球7作为SIP封装结构100的整体输入/输出端，提供电源、信号、接地等的传输。
具有第三基板3时，如图1、图2、图4或图5所示，所述第三基板3通过第二焊球6与所述第一基板11电性连接；或如图3所示，所述第三基板3、所述第二基板21通过第一转接金属柱8电性连接，以提供上下模组的电学连接，以及部分屏蔽组件4的接地。在某些设计下，第二基板21或第三基板3也可以是没有的，而直接通过锡球或金属凸块或其它金属结构进行键合互联。
如图2所示，所述第一塑封结构14还包覆所述第三基板3的侧面，优选地，位于所述第三基板3侧面的所述第一塑封结构14的宽度不小于70μm，能够提高整个SIP封装结构100的稳定性。
所述SIP封装结构100还包括选择性地设置于所述第三基板3背面的第三周边元件31，即可以如图1～5所示设置第三周边元件31，也可以不设置第三周边元件31。
另外，在具有第三基板3的实施例中，所述第一周边元件13也可以贴合于所述第三基板3上，然后将内置有第一功能元件12的第一基板11与第三基板3压合，与上述描述的第一周边元件13内置于第一基板11内均不影响所述第一功能元件12的实施。或者，如图3所示，也可以不设置第一基板11，所述第一功能元件12、所述第一周边元件13均 表贴于所述第三基板3上。
至少部分所述第一屏蔽结构41位于所述第一模组1与所述第二模组2之间，或称至少部分第一屏蔽结构41内嵌于SIP封装结构100内对第一模组1进行电磁屏蔽。此时，所述第一屏蔽结构41可以为位于所述第一塑封结构正面的屏蔽金属层411，所述屏蔽金属层411包括屏蔽金属涂层或屏蔽金属片；也可以为部分第二基板21；也可以为电性连接所述第一基板11与所述第二基板21的焊球等键合点。
进一步地，一类实施例中，所述第一屏蔽结构41与所述第二屏蔽结构42电性连接，所述第一屏蔽结构41和/或所述第二屏蔽结构42具有至少一个接地点，可以形成较强的整体的EMI接地和电磁屏蔽保护。
具体地，所述第一屏蔽结构41包括位于所述第一模组1与所述第二模组2之间的屏蔽金属层411，所述屏蔽金属层411位于所述第一塑封结构14正面。所述屏蔽金属层411与所述第一基板11电性连接，和/或屏蔽金属层411与所述第二基板21电性连接；或称“所述第一基板11、所述第二基板21中的至少一个与所述屏蔽金属层411电性接触”，以使得所述第一屏蔽结构41的至少一处接地，从而实现整个屏蔽组件4的接地。本领域技术人员可以理解的是，所述屏蔽金属层411与第一基板11、第二基板21电性连接，均指的是所述屏蔽金属层411与基板中的接地线电性连接。
所述第一屏蔽结构41与所述第二屏蔽结构42电性连接的方式包括但不限于：
如图1所示，所述第一屏蔽结构41包括位于所述第一模组1与所述 第二模组2之间的屏蔽金属层411，所述第二屏蔽结构42还包括能够覆盖部分所述第一模组1的侧面的附加屏蔽结构421，所述附加屏蔽结构421与所述屏蔽金属层411电性连接，以实现高度整体的高可靠接地及高联结性能，实现产品的整体屏蔽设计，提升产品的EMC性能。
或，如图4所示，所述第一屏蔽结构41包括位于所述第一模组1与所述第二模组2之间的屏蔽金属层411，所述第二屏蔽结构42包覆所述第二模组2的正面和侧面，所述屏蔽组件4还包括电性连接所述屏蔽金属层411与包覆所述第二模组2的侧面的所述第二屏蔽结构42的导电胶43；通过导电胶43形成加强的EMI接地和电磁屏蔽保护。
或者，于另一类实施例中，所述第一屏蔽结构41、所述第二屏蔽结构42均具有至少一个接地点，第一模组1、第二模组2分别形成独立的EMI，再贴合在一起。
具体地，如图2、图3所示，所述第一屏蔽结构41包括位于所述第一模组1与所述第二模组2之间的屏蔽金属层411，且所述第一基板11、所述第二基板21中的至少一个与所述屏蔽金属层411电性连接；所述第二屏蔽结构42包覆于所述第二塑封结构24外且与所述第二基板21电性连接。
以下将以多个具体的实施例对本发明的SIP封装结构100进一步详细说明。
请具体参阅图1所示，为本发明一较佳实施例的SIP封装结构100。
所述第一模组1具体包括第一基板11、第三基板3、第一功能元件12、设置于第一功能元件12周围的第一周边元件13、第一塑封结构14； 所述第一功能元件12、第一基板11、第一周边元件13位于所述第三基板3上，例如正面；所述第一塑封结构14包封所述第一功能元件12、第一周边元件13和第一基板11，整体结构紧凑，体积较小。
具体地，所述第一功能元件12内置于所述第一基板11内侧，并与第一基板11、第一周边元件13一起置于第三基板3的正面焊盘上进行回流焊键合；第一功能元件12与所述第一周边元件13之间具有部分所述第一基板11。
优选地所述第一基板11上设置有收容所述第一周边元件13的收容腔，以能够缩小整个SIP封装100的体积，与所述第一周边元件13内置于所述第一基板11内达成等效的效果。
或者，所述第一功能元件12和第一周边元件13也可以分别贴合于所述第一基板11的内侧或外侧。
所述第三基板3的背面具有焊球，作为SIP封装结构100的整体输入输出端，提供电源、信号、接地等的传输。
所述第三基板3的背面还设有第三周边元件31。
所述第一屏蔽结构41包括位于所述第一模组1正面的屏蔽金属层411，所述屏蔽金属层411在A处与所述第一基板11电性连接，屏蔽效果较好。
所述第二模组2包括第二基板21、第二功能元件22、第二周边元件23、第二塑封结构24，所述第二功能元件22与所述第二周边元件23位于所述第二基板21正面，且所述第二周边元件23设置于所述第二功能元件22周围，所述第二塑封结构24包封第二功能元件22、第二周边元 件23，结构紧凑。
其中，所述第二基板21位于所述屏蔽金属层411背离所述第一模组1的一侧，两者之间具有填充胶，且所述第二基板21与所述第一基板11通过第一焊球5电性连接。
所述屏蔽金属层411在B处与所述第二基板21电性接触。所述第一屏蔽结构41至少包括屏蔽金属层411、部分所述第二基板21、电性连接第一基板11和第二基板21的第一焊球5。
所述第二屏蔽结构42覆盖所述第二模组2的正面及侧面，对所述第二屏蔽结构42起到有效的屏蔽效果。
并且，所述第二屏蔽结构42同时覆盖部分所述第一模组1，且所述第二屏蔽结构42与所述屏蔽金属层411于C处电性连接，以实现高度整体的高可靠接地及高联结性能，实现产品的整体屏蔽设计，提升产品的EMI(电磁屏蔽)性能。
进一步地，所述第二屏蔽结构42还覆盖所述第三基板3的侧面，且所述第二屏蔽结构42于D处与所述第三基板3电性连接，实现接地。
请具体参阅图2所示，为本发明另一较佳实施例的SIP封装结构100，与图1所示SIP封装结构100的区别仅在于：
第一模组1中，部分所述第一周边元件13与所述第一功能元件12相邻设置，两者共用同一片屏蔽金属层411，且该屏蔽金属层411的两个端部均与所述第一基板11电性连接。
所述第一塑封结构14同时包封所述第三基板3的侧面，且所述第三基板3外侧的所述第一塑封结构14的宽度大于0μm，优选地大于70μm， 以提高封装可靠性。
所述第二屏蔽结构42仅覆盖所述第二模组2，且所述第二屏蔽结构42与所述第二基板21于E处电性连接。因此，第一模组1和第二模组2分别形成独立的屏蔽结构，然后连接形成完整的EMI保护。
请具体参阅图3所示，为本发明另一较佳实施例的SIP封装结构100，与图1所示SIP封装结构100的区别仅在于：
所述SIP封装结构100中只包括第三基板3而不包含第一基板11，所述第一功能元件12、所述第一周边元件13均表贴于所述第三基板3上，且所述第三基板3、所述第二基板21通过第一转接金属柱8电性连接；第一转接金属柱8提供第一模组1与第二模组2的电学连接，以及部分屏蔽组件4的接地。
覆盖所述第一功能元件12的屏蔽金属层411与所述第二基板21电性连接，覆盖所述第一周边元件13的屏蔽金属层411通过第一周边元件13的导电引脚与所述第三基板3电性连接，实现良好的接地效果。
所述第二屏蔽结构42仅覆盖所述第二模组2，且所述第二屏蔽结构42的端部分别与所述屏蔽金属层411在F处电性连接。因此，第一模组1和第二模组2分别形成独立的屏蔽结构，然后连接形成完整的EMI保护。
所述屏蔽组件4还包括整体覆盖所述第一模组1、所述第二模组2和所述第三基板3的整体屏蔽结构45。
其他结构及其连接方式、能够达成的效果于此不再赘述。
请具体参阅图4所示，为本发明另一较佳实施例的SIP封装结构100， 与图3所示SIP封装结构100的区别仅在于：
所述SIP封装结构100包括第一基板11，所述第一基板11包括延伸于所述第一塑封结构14外的延伸基板111，或称所述延伸基板111不被所述第一塑封结构14密封，该延伸基板111为在第一模组1制备过程中在同一基板上的接邻第一模组1的第一基板11。也就是接邻的两个第一模组1采用同一转接块110，所述转接块110最终切割后成为在第1模组中的第一基板11，而第一基板11的侧面(如图中虚线)是暴露的。
该实施例中，第一塑封结构14内不包含第一基板11，所述第一功能元件12、所述第一周边元件13均表贴于所述第三基板3上，且所述第三基板3、所述第二基板21通过第一转接金属柱8电性连接；而所述第一塑封结构14外，所述第一基板11与所述第三基板3通过第二焊球6电性连接。
所述SIP封装结构100还包括位于所述延伸基板111上的外部封装体和/或无需塑封的功能元件9，外部封装体、其他无需塑封的功能元件与所述第一功能元件12共享基板，以降低成本或不影响外部封装体和/或无需塑封的功能元件9的功能，如天线功能等。
其他无需塑封的功能元件包括但不限于对压力敏感的BAW/SAW滤波器、MEMS器件、B2B连接器、光电连接耦合器等，将它们放置键合在所述基板11上而不被塑封。
覆盖所述第一周边元件13的所述屏蔽金属层411与该第一周边元件13周围的第一基板11电性连接。
所述屏蔽组件4还包括电性连接所述屏蔽金属层411与所述第二屏 蔽结构42的导电胶43，以加强EMI接地和电磁屏蔽保护。具体地，所述第二模组2侧面的第二屏蔽结构42与第一屏蔽结构41通过导电胶43连接。
其他结构及其连接方式、能够达成的效果于此不再赘述。
请具体参阅图5所示，为本发明另一较佳实施例的SIP封装结构100，与图4所示SIP封装结构100的区别仅在于：
所述屏蔽组件4还包括包覆所述无需2次塑封的功能元件如压力敏感的BAW/SAW滤波器的第三屏蔽结构44。第三屏蔽结构44为第二屏蔽结构44的一部分，而第二屏蔽结构44也覆盖了裸露在外的第一基板11的侧面。
具体地，所述第三屏蔽结构44与所述第二屏蔽结构42采用相同的屏蔽材料并电性连接，可以为一体设置，与此同时，所述第二屏蔽结构42同时包覆所述第一模组1的外围侧，且所述第二屏蔽结构42与所述第一屏蔽结构41于G处电性连接，以实现高度整体的高可靠接地及高联结性能，实现产品的整体屏蔽设计，提升产品的EMC性能。
其他结构及其连接方式、能够达成的效果于此不再赘述。
当然，在图1或图2所示的所述第一塑封结构14内具有第一基板11的实施例中，所述SIP封装结构100也可以包括延伸基板111、外部封装体和/或无需塑封的功能元件9，还可以在此基础上包括所述第三屏蔽结构44。
综上所述，本发明的SIP封装结构100，将不同频率敏感的模组和器件分别进行不同的电磁屏蔽技术处、然后进行水平或垂直堆叠、再集 成封装，针对不同的次级模组或SOC芯片实现不同的电磁屏蔽要求。尤其是将对压力敏感的器件如BAW/SAW滤波器和MEMS，B2B连接器或光电连接耦合器放置键合在主模组基板上，而不被塑封，满足了所有元器件的不同需求，且整体结构紧凑。
应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施方式中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。
上文所列出的一系列的详细说明仅仅是针对本发明的可行性实施方式的具体说明，它们并非用以限制本发明的保护范围，凡未脱离本发明技艺精神所作的等效实施方式或变更均应包含在本发明的保护范围之内。

Claims (16)

  1. 一种SIP封装结构，包括第一模组、第二模组，所述第一模组与所述第二模组水平分布或垂直叠加，其特征在于，所述第一模组与所述第二模组的电磁敏感频率不同；所述SIP封装结构还包括屏蔽组件，所述屏蔽组件包括覆盖所述第一模组的第一屏蔽结构、覆盖所述第二模组的第二屏蔽结构，至少部分所述第一屏蔽结构和/或至少部分所述第二屏蔽结构位于所述第一模组和所述第二模组中间。
  2. 根据权利要求1所述的SIP封装结构，其特征在于：所述第一屏蔽结构和所述第二屏蔽结构的材料不同，或所述第一屏蔽结构和所述第二屏蔽结构的结构不同，或所述第一屏蔽结构和所述第二屏蔽结构的材料和结构均不同。
  3. 根据权利要求1所述的SIP封装结构，其特征在于：所述二模组位于所述第一模组的正面，至少部分所述第一屏蔽结构位于所述第一模组与所述第二模组之间。
  4. 根据权利要求3所述的SIP封装结构，其特征在于：所述第一屏蔽结构与所述第二屏蔽结构电性连接，所述第一屏蔽结构和/或所述第二屏蔽结构具有至少一个接地点。
  5. 根据权利要求4所述的SIP封装结构，其特征在于：所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；所述第一屏蔽结构包括位于所述第一塑封结构正面的屏蔽金属层；
    所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；所述第二屏蔽结构包覆所述第二塑封结构；
    所述屏蔽金属层与所述第一基板电性连接，和/或所述屏蔽金属层与所述第二基板电性连接。
  6. 根据权利要求4所述的SIP封装结构，其特征在于：所述第一屏蔽结构包括位于所述第一模组与所述第二模组之间的屏蔽金属层，所述第二屏蔽结构还包括能够覆盖部分所述第一模组的侧面的附加屏蔽结构，所述附加屏蔽结构与所述屏蔽金属层电性连接。
  7. 根据权利要求4所述的SIP封装结构，其特征在于：所述第一屏蔽结构包括位于所述第一模组与所述第二模组之间的屏蔽金属层，所述第二屏蔽结构包覆所述第二模组的正面和侧面；
    所述第二屏蔽结构的端部与所述屏蔽金属层电性连接，或所述屏蔽组件还包括电性连接所述屏蔽金属层与包覆所述第二模组的侧面的所述第二屏蔽结构的导电胶。
  8. 根据权利要求3所述的SIP封装结构，其特征在于：所述第一屏蔽结构、所述第二屏蔽结构均具有至少一个接地点。
  9. 根据权利要求8所述的SIP封装结构，其特征在于：
    所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；
    所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；
    所述第一屏蔽结构包括位于所述第一塑封结构正面的屏蔽金属层，且所述第一基板、所述第二基板中的至少一个与所述屏蔽金属层电性连接；所述第二屏蔽结构包覆于所述第二塑封结构外且与所述第二基板电性连接。
  10. 根据权利要求3所述的SIP封装结构，其特征在于：
    所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；
    所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；所述第二屏蔽结构包覆于所述第二塑封结构外且与所述第二基板电性连接；
    所述第一基板与所述第二基板通过第一焊球连接；
    所述第一屏蔽结构包括位于所述第一塑封结构正面的屏蔽金属层、至少部分所述第二基板、或电性连接所述第一基板与所述第二基板的焊球中的至少一个。
  11. 根据权利要求3所述的SIP封装结构，其特征在于：
    所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件和第一基板；
    所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；
    所述第一基板与所述第二基板通过第一焊球连接；
    所述第三基板背面具有第三焊球。
  12. 根据权利要求3所述的SIP封装结构，其特征在于：所述第一模组包括第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件；
    所述第二模组包括第二基板、第二功能元件、第二周边元件、第二塑封结构，所述第二功能元件与所述第二周边元件位于所述第二基板正面，所述第二塑封结构包封所述第二功能元件和所述第二周边元件；
    所述第三基板、所述第二基板通过第一转接金属柱电性连接。
  13. 根据权利要求11所述的SIP封装结构，其特征在于：所述第一塑封结构还包覆所述第三基板的侧面，且位于所述第三基板侧面的所述第一塑封结构的宽度不小于70μm。
  14. 根据权利要求11所述的SIP封装结构，其特征在于：所述SIP封装结构还包括位于所述第三基板背面的第三周边元件。
  15. 根据权利要求1所述的SIP封装结构，其特征在于：
    所述第一模组包括第一基板、第三基板、第一功能元件、第一周边元件、第一塑封结构，所述第一功能元件、第一基板、第一周边元件位于所述第三基板上，所述第一塑封结构包封所述第一功能元件、第一周边元件；
    所述第一基板包括延伸于所述第一塑封结构外的延伸基板，所述SIP封装结构还包括位于所述延伸基板上的外部封装体和/或无需塑封的功能元件。
  16. 根据权利要求15所述的SIP封装结构，其特征在于：所述屏蔽组件还包括包覆所述外部封装体和/或无需塑封的功能元件的第三屏蔽结构，所述第一屏蔽结构或所述第二屏蔽结构中的至少一个与所述第三屏蔽结构电性连接。
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