WO2021004087A1 - 屏体检测电路、显示屏以及屏体检测方法 - Google Patents

屏体检测电路、显示屏以及屏体检测方法 Download PDF

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Publication number
WO2021004087A1
WO2021004087A1 PCT/CN2020/080035 CN2020080035W WO2021004087A1 WO 2021004087 A1 WO2021004087 A1 WO 2021004087A1 CN 2020080035 W CN2020080035 W CN 2020080035W WO 2021004087 A1 WO2021004087 A1 WO 2021004087A1
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Prior art keywords
screen
signal line
detection circuit
control
screen detection
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PCT/CN2020/080035
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English (en)
French (fr)
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葛明伟
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昆山国显光电有限公司
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Publication of WO2021004087A1 publication Critical patent/WO2021004087A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

Definitions

  • This application relates to the field of display technology, in particular to a screen detection circuit, a display screen, and a screen detection method.
  • the screen has two working stages: detection and display.
  • each control signal line can receive signals from the drive IC to drive each pixel in the display area to work.
  • each control signal line needs to receive the screen detection signal through the corresponding test pad (solder or pin) to light the screen for testing and aging.
  • the test pad is exposed to the air, which is easily corroded and affects the control signal in the internal drive circuit, resulting in abnormal display.
  • the purpose of this application is to provide a screen detection circuit, a display screen, and a screen detection method.
  • the screen detection circuit can isolate and test the influence of the Pad on the internal driving circuit when the screen is displayed, so as to avoid causing display abnormalities.
  • an embodiment of the present application provides a screen detection circuit for detecting a screen drive circuit.
  • the screen has a display area and a non-display area on the periphery of the display area.
  • the non-display area is distributed with a drive circuit and a detection circuit.
  • the screen detection circuit includes a plurality of switch units, which are arranged in a one-to-one correspondence with a plurality of control signal lines in the driving circuit for driving each pixel in the display area; each switch unit includes:
  • the first connection terminal is connected to the control signal line
  • the second connection terminal is connected to the detection signal input terminal
  • the first control terminal is used to receive the conduction signal to conduct the control signal line and the detection signal input terminal when the screen body is detected;
  • the second control terminal is connected to the power signal line in the display area.
  • the power signal line inputs a disconnection signal to the second control terminal to disconnect the electrical connection between the detection signal input terminal and the control signal line.
  • an embodiment of the present application provides a display screen, which includes the above-mentioned screen detection circuit.
  • embodiments of the present application provide a screen detection method, which is used in the above-mentioned screen detection circuit, and the screen detection method includes:
  • the conduction signal is transmitted to the first control terminal of the switch unit, and the switch unit is turned on to conduct the line between the detection signal input terminal of the switch unit and the control signal line;
  • the disconnection signal is transmitted to the second control terminal of the switch unit, and the switch unit is disconnected to disconnect the line between the detection signal input terminal and the control signal line.
  • the screen detection circuit of the embodiment of the present application includes a plurality of switch units, and each switch unit has a first connection terminal, a second connection terminal, a first control terminal and a second control terminal.
  • the first control terminal receives the conduction signal, and conducts the control signal line and the detection signal input terminal during the screen detection, so that the screen detection signal is transmitted to the corresponding control signal line, and the screen is lit for testing and aging.
  • the second control terminal is connected to the power signal line in the display area.
  • the power signal line inputs a disconnection signal to the second control terminal to disconnect the electrical connection between the detection signal input terminal and the control signal line to enable the drive
  • the display signal sent by the IC can be directly transmitted to the corresponding control signal line to drive each pixel in the display area to work, and the test pad is isolated from the control signal line, so that the impact of the test pad on the internal drive circuit can be isolated when the screen is displayed, so as to avoid Cause display abnormality.
  • first control terminal and the second control terminal of the switch unit in the embodiment of the present application are respectively responsible for the control of the screen detection phase and the screen display phase, they are relatively independently set up, so that even if the connection of the first control terminal appears The problem will not affect the second control terminal's control of the screen display phase, so that the screen display effect can be avoided from being affected by the corrosion of the test pad.
  • the second control terminal in the embodiment of the present application is connected to the power signal line in the display area, that is, there is no need to connect an external power source, so that the internal power signal line can be used to control the display stage of the screen, and the structure is simple. Easy to promote and use.
  • Figure 1 is a wiring diagram of a screen body involved in an embodiment of the application
  • FIG. 2 is a schematic structural diagram of a screen detection circuit provided by an embodiment of the application.
  • FIG. 3 is a timing signal diagram of the screen detection phase provided by an embodiment of the application.
  • FIG. 5 is a schematic structural diagram of a screen detection circuit provided by another embodiment of the application.
  • FIG. 6 is a schematic structural diagram of a screen detection circuit provided by another embodiment of this application.
  • FIG. 7 is a schematic structural diagram of a screen detection circuit provided by another embodiment of this application.
  • FIG. 8 is a schematic structural diagram of a screen detection circuit provided by another embodiment of this application.
  • FIG. 9 is a schematic structural diagram of a screen detection circuit provided by another embodiment of the application.
  • the screen has a display area DA and a non-display area NDA located on the periphery of the display area, and the non-display area NDA is distributed with a driving circuit.
  • the driving circuit includes a plurality of control signal lines C1-Cn for driving each pixel in the display area, such as gate lines, data lines, and power lines.
  • FIG. 2 is a schematic structural diagram of a screen detection circuit provided by an embodiment of the application.
  • the screen detection circuit includes multiple switch units Q1-Qn, multiple switch units Q1-Qn and multiple control signal lines C1-Cn used to drive each pixel in the display area in the drive circuit. Corresponding settings.
  • each switch unit includes: a first connection terminal, a second connection terminal, a first control terminal and a second control terminal.
  • the first connection terminal d1 of Q1 is connected to the control signal line C1.
  • the second connection terminal d2 of Q1 is connected to the detection signal input terminal Pad1.
  • the detection signal input terminal can be set on the screen body or outside the screen body, and there is no limitation here.
  • the first control terminal d3 of Q1 is used to receive the conduction signal to connect the line between the control signal line C1 and the detection signal input terminal Pad1 when the screen is detected, so that the screen detection signal is transmitted to the control signal line C1 through Pad1 , Test and aging by lighting the screen.
  • the second control terminal d4 of Q1 is connected to the power signal line Vi in the display area.
  • the power signal line Vi inputs a disconnect signal to the second control terminal d4 to disconnect the detection signal input terminal Pad1 from the control signal
  • the line between the lines C1 to isolate the influence of Pad1 on the control signal line C1 when the screen is displayed.
  • the screen detection method of the above-mentioned screen detection circuit includes:
  • the conduction signal is transmitted to the first control terminal of the switch unit, and the switch unit is turned on to conduct the line between the detection signal input terminal of the switch unit and the control signal line;
  • the disconnection signal is transmitted to the second control terminal of the switch unit, and the switch unit is disconnected to disconnect the line between the detection signal input terminal and the control signal line.
  • the turn-on signal may be provided by an external direct current voltage source DC.
  • the power signal line Vi may be a power signal line for screen display located in the display area, such as VCI, AVDD, VGH, VGL, and so on.
  • the switch units Q1, Q2, and Q3 are taken as examples to illustrate the working principle of the screen detection circuit.
  • FIG. 3 is a timing signal diagram of the screen detection phase provided by an embodiment of the application.
  • DC provides a low-level signal to the first control terminal d3 of the switch units Q1, Q2, and Q3.
  • the switch units Q1, Q2, and Q3 are turned on .
  • the screen detection signals CT_ECK1, CT_ECK2, CT_ECK3 (only 3 signal examples are provided, but not limited to 3 signals) are respectively transmitted to the control signal lines C1, C2 and C3 through Pad1, Pad2 and Pad3, and the screen is lit for testing And aging.
  • FIG. 4 is a timing signal diagram of the screen display stage provided by an embodiment of the application.
  • the screen detection circuit of the embodiment of the present application includes a plurality of switch units, and each switch unit has a first connection terminal, a second connection terminal, a first control terminal and a second control terminal.
  • the first control terminal is used to receive the conduction signal to conduct the control signal line and the detection signal input terminal during the screen detection, so that the screen detection signal is transmitted to the corresponding control signal line, and the screen is lit for testing and Aging
  • the second control terminal is connected to the power signal line in the display area, so that when the screen is displayed, the power signal line inputs a disconnection signal to the switch unit to disconnect the electrical connection between the detection signal input terminal and the control signal line.
  • the display signal sent by the driver IC can be directly transmitted to the corresponding control signal line to drive each pixel in the display area to work, and the test pad is isolated from the control signal line, so that the impact of the test pad on the internal drive circuit can be isolated when the screen is displayed , To avoid causing display abnormalities.
  • first control terminal and the second control terminal of the switch unit in the embodiment of the present application are respectively responsible for the control of the screen detection phase and the screen display phase, that is, the two are relatively independent, even if the connection of the first control terminal appears The problem will not affect the second control terminal's control of the screen display phase, so that the screen display effect can be avoided from being affected by the corrosion of the test pad.
  • the second control terminal in the embodiment of the present application is connected to the power signal line in the display area, that is, there is no need to connect an external power source, and the internal power signal line can be used to control the display stage of the screen.
  • the structure is simple and easy Promote use.
  • multiple switch units are arranged in parallel.
  • the first control terminals of multiple switch units (Q1-Qn) can share a conduction signal
  • the second control terminals of multiple switch units (Q1-Qn) can share one disconnection signal input port Vi.
  • those skilled in the art may also reserve the on-signal input port DC and the off-signal input port Vi for the first control terminal and the second control terminal of each switch unit, which are not limited here.
  • the specific implementation form of the switch unit includes, but is not limited to, a MOS tube, a thin film field effect transistor TFT, or a relay, etc., as long as it can provide a switch isolation function.
  • the MOS tube and the thin film field effect transistor TFT are transistors, which are widely used in the field of display panels due to their small size and fast response speed.
  • two metal lead wires can be made on the gate of the transistor, which serve as the first control terminal and the second control terminal of the switch unit, and one of the source and drain of the transistor is the second control terminal of the switch unit.
  • One connection terminal, the other of the source and drain of the transistor is the second connection terminal of the switch unit.
  • transistors can be divided into P-type transistors and N-type transistors, and different types of transistors have different turn-on signals.
  • the on signal of the P-type transistor is a low level signal
  • the off signal is a high level signal.
  • the power signal line Vi may be a high-level signal line (such as AVDD).
  • the DC terminal inputs a low-level signal, and in response to the low-level signal, the transistor is turned on to transmit the screen detection signal to the control signal line to light the screen for testing and aging.
  • a high-level signal is input to the AVDD terminal. In response to the high-level signal, the transistor is disconnected to isolate the test pad from the control signal line.
  • the screen detection circuit may further include a first pull-up module R1.
  • the first pull-up module R1 is arranged between the second control terminal d4 and the high-level signal line (AVDD) and is connected in series with the second control terminal d4 and the high-level signal line (AVDD).
  • the specific implementation form of the first pull-up module R1 may be a first resistor network. Through the first pull-up module R1, the high-level signal output by the AVDD in the screen detection phase will be pulled down, thereby eliminating the interference to the low-level signal at the DC end and ensuring the smooth progress of the screen detection phase.
  • the on signal of the N-type transistor is a high-level signal, and the off signal is a low-level signal.
  • the power signal line may be a low-level signal line (such as VGL).
  • the DC terminal inputs a high-level signal, and in response to the high-level signal transistor is turned on, the screen detection signal is transmitted to the control signal line to light up the screen for testing and aging.
  • the VGL terminal inputs a low-level signal, the transistor is disconnected, and the test pad is isolated from the control signal line.
  • the screen detection circuit can also include a pull-down module R2.
  • the pull-down module R2 is arranged between the second control terminal d4 and the low-level signal line (such as VGL), and the second control terminal d4 And the low level signal line (VGL) are connected in series.
  • the specific implementation form of the pull-down module R2 may be a second resistance network. By pulling down the module R2, the low-level signal output by the VGL during the screen detection phase can be pulled high, thereby eliminating the interference to the high-level signal at the DC end and ensuring the smooth progress of the screen detection phase.
  • the screen detection circuit also includes a second Two pull-up modules R3, the first connection end of the second pull-up module R3 is respectively connected to the second control terminal d4 of the switch unit and the pull-down module R2, and the second connection end of the second pull-up module R3 is grounded to GND.
  • the specific implementation form of the second pull-up module R3 may be a third resistor network.
  • the resistance value of the third resistance network may be smaller than the resistance value of the second resistance network to ensure that the voltage signal of the second control terminal d4 can be maintained at a lower voltage during the display phase of the screen, so that the transistor can be successfully turned off.
  • the screen detection circuit further includes: a plurality of electrostatic protection circuits (ESD1-ESDn) arranged in one-to-one correspondence with the plurality of control signal lines (C1-Cn), so that the screen detection circuit has an electrostatic protection function.
  • ESD1-ESDn electrostatic protection circuits
  • the electrostatic protection circuits shown in FIGS. 8 and 9 are in different positions relative to the switch unit.
  • the first connection terminal of the electrostatic protection circuit ESD1 is respectively connected to the first connection terminal d1 of the switch unit Q1 and the control signal line C1, and the second connection terminal of the electrostatic protection circuit ESD1 is grounded.
  • the first connection terminal of the electrostatic protection circuit ESD1 is connected to the second connection terminal d2 of the switch unit Q1 and the detection signal input terminal Pad1 respectively, and the second connection terminal of the electrostatic protection circuit ESD1 is grounded.
  • An embodiment of the present application also provides a display screen.
  • the screen has a display area and a non-display area on the periphery of the display area.
  • the non-display area is distributed with a driving circuit and the above-mentioned screen detection circuit.
  • the screen detection circuit includes a plurality of switch units, and the plurality of switch units are arranged in a one-to-one correspondence with a plurality of control signal lines in the driving circuit for driving each pixel in the display area.
  • Each switch unit includes:
  • the first connection terminal is connected to the control signal line.
  • the second connection terminal and the detection signal input terminal are connected to The second connection terminal and the detection signal input terminal.
  • the first control terminal is used to receive the conduction signal to conduct the control signal line and the detection signal input terminal when the screen body is detected.
  • the second control terminal is connected to the power signal line in the display area.
  • the power signal line inputs a disconnection signal to the second control terminal to disconnect the electrical connection between the detection signal input terminal and the control signal line.
  • the first connection terminal d1 of Q1 is connected to the control signal line C1.
  • the second connection terminal d2 of Q1 is connected to the detection signal input terminal Pad1.
  • the detection signal input terminal can be set on the screen body or outside the screen, and there is no limitation here.
  • the first control terminal d3 of Q1 is used to receive the conduction signal to connect the line between the control signal line C1 and the detection signal input terminal Pad1 when the screen is detected, so that the screen detection signal is transmitted to the control signal line C1 through Pad1 , Test and aging by lighting the screen.
  • the second control terminal d4 of Q1 is connected to the power signal line Vi in the display area.
  • the power signal line Vi inputs a disconnect signal to the second control terminal d4 to disconnect the detection signal input terminal Pad1 from the control signal
  • the line between the lines C1 to isolate the influence of Pad1 on the control signal line C1 when the screen is displayed.

Abstract

一种屏体检测电路、显示屏以及屏体检测方法。屏体检测电路包括多个开关单元，与驱动电路中用于驱动显示区域内各像素工作的多条控制信号线一一对应设置；各开关单元包括：第一连接端，与控制信号线连接；第二连接端，与检测信号输入端连接；第一控制端，用于接收导通信号，以在屏体检测时导通控制信号线和检测信号输入端；第二控制端，与显示区域内的电源信号线连接，在屏体显示时，由电源信号线向第二控制端输入断开信号，以断开所述检测信号输入端与所述控制信号线的电连接。

Description

屏体检测电路、显示屏以及屏体检测方法
相关申请的交叉引用
本申请要求享有于2019年07月05日提交的名称为“屏体检测电路和显示屏”的中国专利申请第201921048673.9号的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本申请涉及显示技术领域，具体涉及一种屏体检测电路、显示屏以及屏体检测方法。
背景技术
屏体具有检测和显示两个工作阶段。在屏体显示阶段，各控制信号线可接收来自驱动IC的信号，驱动显示区域内各像素工作。在屏体检测阶段，各控制信号线需要通过对应的测试Pad(焊点或者引脚)接收屏体检测信号，以点亮屏体做测试及老化。通常，测试Pad被暴露在空气中，极易被腐蚀并影响内部驱动电路中的控制信号，导致显示异常。
发明内容
本申请的目的是提供一种屏体检测电路、显示屏以及屏体检测方法，所述屏体检测电路能够在屏体显示时隔离测试Pad对内部驱动电路的影响，避免引起显示异常。
一方面，本申请实施例提供一种屏体检测电路，用于检测屏体驱动电路，屏体具有显示区域和位于显示区域周侧的非显示区域，非显示区域分布有驱动电路和检测电路，屏体检测电路包括多个开关单元，与驱动电路中用于驱动显示区域内各像素工作的多条控制信号线一一对应设置；各开关单元包括：
第一连接端，与控制信号线连接；
第二连接端，与检测信号输入端连接；
第一控制端，用于接收导通信号，以在屏体检测时导通控制信号线和检测信号输入端；
第二控制端，与显示区域内的电源信号线连接，在屏体显示时，由电源信号线向第二控制端输入断开信号，以断开检测信号输入端与控制信号线的电连接。
另一方面，本申请实施例提供一种显示屏，该显示屏包括如上所述的屏体检测电路。
第三方面，本申请实施例提供一种屏体检测方法，用于如上所述的屏体检测电路，屏体检测方法包括：
屏体检测阶段，将导通信号传输至开关单元第一控制端，导通开关单元，以导通开关单元的检测信号输入端与控制信号线之间的线路；
屏体显示阶段，将断开信号传输至开关单元的第二控制端，断开开关单元，以断开检测信号输入端与控制信号线之间的线路。
如上所述，本申请实施例的屏体检测电路包括多个开关单元，各开关单元均具有第一连接端、第二连接端、第一控制端和第二控制端。其中，第一控制端接收导通信号，在屏体检测时导通控制信号线和检测信号输入端，使屏体检测信号传递至对应的控制信号线，点亮屏体做测试及老化，第二控制端与显示区域内的电源信号线连接，在屏体显示时，由电源信号线向第二控制端输入断开信号，以断开检测信号输入端与控制信号线的电连接，使驱动IC发送的显示信号可直接传递至对应的控制信号线，驱动显示区域内各像素工作，而测试Pad与控制信号线隔离，从而能够在屏体显示时隔离测试Pad对内部驱动电路的影响，避免引起显示异常.
此外，由于本申请实施例中的开关单元的第一控制端和第二控制端分别负责对屏体检测阶段和屏体显示阶段的控制，两者相对独立设置，这样即使第一控制端的连接出现问题，也不会影响到第二控制端对屏体显示阶段的控制，从而能够避免屏体显示效果受到测试Pad腐蚀的影响。
另外，由于本申请实施例中的第二控制端与显示区域内的电源信号线 连接，即不需要连接外部电源，这样利用内部电源信号线就能够实现对屏体显示阶段的控制，结构简单，易于推广使用。
附图说明
下面将参考附图来描述本申请示例性实施例的特征、优点和技术效果，其中的附图并未按照实际的比例绘制。
图1为本申请实施例涉及的屏体布线图；
图2为本申请一个实施例提供的屏体检测电路的结构示意图；
图3为本申请实施例提供的屏体检测阶段的时序信号图；
图4为本申请实施例提供的屏体显示阶段的时序信号图；
图5为本申请另一实施例提供的屏体检测电路的结构示意图；
图6为本申请又一实施例提供的屏体检测电路的结构示意图；
图7为本申请又一实施例提供的屏体检测电路的结构示意图；
图8为本申请又一实施例提供的屏体检测电路的结构示意图；
图9为本申请又一实施例提供的屏体检测电路的结构示意图。
具体实施方式
下面将详细描述本申请的各个方面的特征和示例性实施例。在下面的详细描述中，提出了许多具体细节，以便提供对本申请的全面理解。
如图1所示，屏体具有显示区域DA和位于显示区域周侧的非显示区域NDA，非显示区域NDA分布有驱动电路。驱动电路包括用于驱动所述显示区域内各像素工作的多条控制信号线C1-Cn，比如，栅极线、数据线和电源线等。
图2为本申请一个实施例提供的屏体检测电路的结构示意图。
如图2所示，屏体检测电路包括多个开关单元Q1-Qn，多个开关单元Q1-Qn与驱动电路中用于驱动显示区域内各像素工作的多条控制信号线C1-Cn一一对应设置。
其中，每个开关单元均包括：第一连接端，第二连接端，第一控制端和第二控制端。
以开关单元Q1为例：
Q1的第一连接端d1与控制信号线C1连接。
Q1的第二连接端d2与检测信号输入端Pad1连接。检测信号输入端可以设置在屏体上，也可以设置在屏体外，此处不做限定。
Q1的第一控制端d3用于接收导通信号，以在屏体检测时导通控制信号线C1和检测信号输入端Pad1之间的线路，使屏体检测信号通过Pad1传递至控制信号线C1，以点亮屏体做测试及老化。
Q1的第二控制端d4与显示区域内的电源信号线Vi连接，在屏体显示时，电源信号线Vi向第二控制端d4输入断开信号，以断开检测信号输入端Pad1与控制信号线C1之间的线路，从而在屏体显示时隔离Pad1对控制信号线C1的影响。
上述屏体检测电路的屏体检测方法包括：
屏体检测阶段，将导通信号传输至开关单元第一控制端，导通开关单元，以导通开关单元的检测信号输入端与控制信号线之间的线路；
屏体显示阶段，将断开信号传输至开关单元的第二控制端，断开开关单元，以断开检测信号输入端与控制信号线之间的线路。
在一些实施例中，导通信号可以由外部直流电压源DC提供。
在一些实施例中，电源信号线Vi可以是位于显示区域内用于屏体显示的电源信号线，比如VCI、AVDD、VGH和VGL等。
下面以开关单元Q1、Q2和Q3为例说明屏体检测电路的工作原理。
图3为本申请实施例提供的屏体检测阶段的时序信号图。
如图3所示，在屏体检测阶段，DC向开关单元Q1、Q2和Q3的第一控制端d3提供低电平信号，响应于该低电平信号，开关单元Q1、Q2和Q3导通，屏体检测信号CT_ECK1、CT_ECK2、CT_ECK3(仅提供3个信号举例，实际不局限于3个信号)分别通过Pad1、Pad2和Pad3传递至控制信号线C1、C2和C3，点亮屏体做测试及老化。
图4为本申请实施例提供的屏体显示阶段的时序信号图。
如图4所示，在屏体显示阶段，DC不提供信号，电源信号线Vi向开关单元Q1、Q2和Q3的第二控制端d4提供高电平信号，响应于该高电平 信号，开关单元Q1、Q2和Q3断开，将Pad1、Pad2和Pad3分别与控制信号线C1、C2和C3隔离，此时，驱动IC发送的显示信号Module_ECK1、Module_ECK2、Module_ECK3直接传递至控制信号线C1、C2和C3，以驱动显示区域内各像素工作。
如上所述，本申请实施例的屏体检测电路包括多个开关单元，各开关单元均具有第一连接端、第二连接端、第一控制端和第二控制端。其中，第一控制端用于接收导通信号，以在屏体检测时导通控制信号线和检测信号输入端，使屏体检测信号传递至对应的控制信号线，点亮屏体做测试及老化，第二控制端与显示区域内的电源信号线连接，以在屏体显示时，由电源信号线向开关单元输入断开信号，以断开检测信号输入端与控制信号线的电连接，使驱动IC发送的显示信号可直接传递至对应的控制信号线，驱动显示区域内各像素工作，而测试Pad与控制信号线隔离，从而能够在屏体显示时隔离测试Pad对内部驱动电路的影响，避免引起显示异常。
另外，由于本申请实施例中的开关单元的第一控制端和第二控制端分别负责对屏体检测阶段和屏体显示阶段的控制，即两者相对独立设置，即使第一控制端的连接出现问题，也不会影响到第二控制端对屏体显示阶段的控制，从而能够避免屏体显示效果受到测试Pad腐蚀的影响。
此外，由于本申请实施例中的第二控制端与显示区域内的电源信号线连接，即不需要连接外部电源，利用内部电源信号线就能够实现对屏体显示阶段的控制，结构简单，易于推广使用。
本申请实施例中的多个开关单元(Q1-Qn)并联设置，为简化屏体检测电路结构，参看图2，多个开关单元(Q1-Qn)的第一控制端可以共用一个导通信号输入端口DC，多个开关单元(Q1-Qn)的第二控制端可以共用一个断开信号输入端口Vi。当然，本领域技术人员也可以为各开关单元的第一控制端和第二控制端分别预留导通信号输入端口DC和断开信号输入端口Vi，此处不做限定。
在一些实施例中，开关单元的具体实现形式包括但不限于MOS管、薄膜场效应晶体管TFT或者继电器等，只要能够起到开关隔离作用均适 用。其中，MOS管和薄膜场效应晶体管TFT属于晶体管，因体积小，反应速度快而广泛应用于显示面板领域。
以晶体管为例，可以在晶体管的栅极上制作两条金属引出线，分别作为开关单元的第一控制端和第二控制端，晶体管的源极和漏极中的其中一个为开关单元的第一连接端，晶体管的源极和漏极中的另一个为开关单元的第二连接端。
根据掺杂材料的不同，晶体管可分为P型晶体管和N型晶体管，不同类型晶体管对应的导通信号不同。
其中，P型晶体管的导通信号为低电平信号，断开信号为高电平信号。当采用P型晶体管作为开关单元时，电源信号线Vi可以为高电平信号线(比如AVDD)。
在屏体检测阶段，DC端输入低电平信号，响应于该低电平信号晶体管导通，以将屏体检测信号传递至控制信号线，点亮屏体做测试及老化。在屏体显示阶段，AVDD端输入高电平信号，响应于该高电平信号，晶体管断开，使测试Pad与控制信号线隔离。
由于在屏体检测阶段，AVDD仍可能输出高电平信号，从而对DC端的低电平信号形成干扰。参见图5，为避免该问题，可以使屏体检测电路还包括第一上拉模块R1。第一上拉模块R1设置于第二控制端d4和高电平信号线(AVDD)之间且与第二控制端d4及高电平信号线(AVDD)串联。
第一上拉模块R1的具体实现形式可以为第一电阻网路。通过第一上拉模块R1，屏体检测阶段AVDD输出的高电平信号会被拉低，从而消除对DC端低电平信号的干扰，保证屏体检测阶段的顺利进行。
N型晶体管的导通信号为高电平信号，断开信号为低电平信号，当采用N型晶体管作为开关单元时，电源信号线可以为低电平信号线(比如VGL)。
在屏体检测阶段，DC端输入高电平信号，响应于该高电平信号晶体管导通，将屏体检测信号传递至控制信号线，以点亮屏体做测试及老化。在屏体显示阶段，VGL端输入低电平信号，晶体管断开，使测试Pad与控 制信号线隔离。
由于在屏体检测阶段，VGL仍可能输出低电平信号，会对DC端的高电平信号形成干扰。参见图6，为解决该问题，可以使屏体检测电路还包括下拉模块R2，下拉模块R2设置于第二控制端d4和低电平信号线(比如VGL)之间，与第二控制端d4及低电平信号线(VGL)串联连接。
下拉模块R2的具体实现形式可以为第二电阻网路。通过下拉模块R2，屏体检测阶段VGL输出的低电平信号能够被拉高，从而消除对DC端高电平信号的干扰，保证屏体检测阶段的顺利进行。
可选地，采用N型晶体管作为开关单元时，为了保证屏体显示阶段VGL输出的低电平信号不受周边信号的干扰并维持在低电平，参见图7，屏体检测电路还包括第二上拉模块R3，第二上拉模块R3的第一连接端分别与开关单元的第二控制端d4和下拉模块R2连接，第二上拉模块R3的第二连接端接地GND。第二上拉模块R3的具体实现形式可以为第三电阻网路。通过第二上拉模块R3，屏体检测阶段VGL输出的低电平信号确定低于GND，即维持在低电平。
可选地，第三电阻网络的电阻值可以小于第二电阻网络的电阻值，以保证屏体显示阶段第二控制端d4的电压信号能够维持在较低电压，使晶体管成功断开。
可选地，屏体检测电路还包括：与多条控制信号线(C1-Cn)一一对应设置的多条静电防护电路(ESD1-ESDn)，以使屏体检测电路具有静电防护功能。
图8和图9示出的静电防护电路相对于开关单元处于不同位置。
参看图8，静电防护电路ESD1的第一连接端分别与开关单元Q1的第一连接端d1和控制信号线C1连接，静电防护电路ESD1的第二连接端接地。
参看图9，静电防护电路ESD1的第一连接端分别与开关单元Q1的第二连接端d2和检测信号输入端Pad1连接，静电防护电路ESD1的第二连接端接地。
可以参考图8或者图9设计具有静电防护功能的屏体检测电路，以及 参考相关资料得到静电防护电路的具体结构，此处不做限定。
本申请实施例还提供一种显示屏，参看图2，屏体具有显示区域和位于显示区域周侧的非显示区域，非显示区域分布有驱动电路和如上所述的屏体检测电路。
其中，屏体检测电路包括多个开关单元，多个开关单元与驱动电路中用于驱动显示区域内各像素工作的多条控制信号线一一对应设置。
各开关单元包括：
第一连接端，与控制信号线连接。
第二连接端，与检测信号输入端。
第一控制端，用于接收导通信号，以在屏体检测时导通控制信号线和检测信号输入端。
第二控制端，与显示区域内的电源信号线连接，在屏体显示时，由电源信号线向第二控制端输入断开信号，以断开检测信号输入端与控制信号线的电连接。
以开关单元Q1为例：
Q1的第一连接端d1与控制信号线C1连接。
Q1的第二连接端d2与检测信号输入端Pad1连接。检测信号输入端可是设置在屏体上，也可以设置在屏体外，此处不做限定。
Q1的第一控制端d3用于接收导通信号，以在屏体检测时导通控制信号线C1和检测信号输入端Pad1之间的线路，使屏体检测信号通过Pad1传递至控制信号线C1，以点亮屏体做测试及老化。
Q1的第二控制端d4与显示区域内的电源信号线Vi连接，在屏体显示时，电源信号线Vi向第二控制端d4输入断开信号，以断开检测信号输入端Pad1与控制信号线C1之间的线路，从而在屏体显示时隔离Pad1对控制信号线C1的影响。
虽然已经参考优选实施例对本申请进行了描述，但在不脱离本申请的范围的情况下，可以对其进行各种改进并且可以用等效物替换其中的部件。尤其是，只要不存在结构冲突，各个实施例中所提到的各项技术特征均可以任意方式组合起来。本申请并不局限于文中公开的特定实施例，而 是包括落入权利要求的范围内的所有技术方案。

Claims (15)

  1. 一种屏体检测电路，用于检测屏体驱动电路，所述屏体具有显示区域和位于所述显示区域周侧的非显示区域，所述非显示区域分布有驱动电路和所述屏体检测电路，其中，所述屏体检测电路包括多个开关单元，所述多个开关单元与所述驱动电路中用于驱动所述显示区域内各像素工作的多条控制信号线一一对应设置；
    各所述开关单元包括：
    第一连接端，与所述控制信号线连接；
    第二连接端，与检测信号输入端连接；
    第一控制端，用于接收导通信号，以在屏体检测时导通所述控制信号线和所述检测信号输入端；
    第二控制端，与所述显示区域内的电源信号线连接，在屏体显示时，由所述电源信号线向所述第二控制端输入断开信号，以断开所述检测信号输入端与所述控制信号线的电连接。
  2. 根据权利要求1所述的屏体检测电路，其中，
    所述导通信号为低电平信号，所述断开信号为高电平信号；
    所述电源信号线为高电平信号线；
    所述屏体检测电路还包括：第一上拉模块，用于拉低所述高电平信号线；所述第一上拉模块设置于所述第二控制端和所述电源信号线之间，且与所述第二控制端及所述高电平信号线串联连接。
  3. 根据权利要求2所述的屏体检测电路，其中，
    所述第一上拉模块包括第一电阻网路。
  4. 根据权利要求1所述的屏体检测电路，其中，
    所述导通信号为高电平信号，所述断开信号为低电平信号；
    所述电源信号线为低电平信号线；
    所述屏体检测电路还包括：下拉模块，用于拉高所述低电平信号线；所述下拉模块设置于所述第二控制端和所述电源信号线之间，且与所述第二控制端及所述低电平信号线串联连接。
  5. 根据权利要求4所述的屏体检测电路，其中，
    所述下拉模块包括第二电阻网路。
  6. 根据权利要求4所述的屏体检测电路，其中，
    所述屏体检测电路还包括：第二上拉模块，用于使所述高电平信号线维持在低电平；所述第二上拉模块的第一连接端分别与所述第二控制端和所述下拉模块连接，所述第二上拉模块的第二连接端接地。
  7. 根据权利要求6所述的屏体检测电路，其中，
    所述第二上拉模块包括第三电阻网路。
  8. 根据权利要求6所述的屏体检测电路，其中，所述第三电阻网络的电阻值小于所述第二电阻网络的电阻值。
  9. 根据权利要求1所述的屏体检测电路，其中，所述导通信号由外部直流电压源提供。
  10. 根据权利要求1所述的屏体检测电路，其中，
    多个所述开关单元的所述第一控制端共用一个导通信号输入端口；
    多个所述开关单元的所述第二控制端共用一个断开信号输入端口。
  11. 根据权利要求1-10任一项所述的屏体检测电路，其中，所述开关单元包括晶体管，所述晶体管的栅极具有两条金属引出线，分别作为所述开关单元的第一控制端和第二控制端，所述晶体管的源极和漏极中的一个作为所述开关单元的所述第一连接端，所述晶体管的源极和漏极中的另一个作为所述开关单元的所述第二连接端。
  12. 根据权利要求11所述的屏体检测电路，其中，所述屏体检测电路还包括：与所述多条控制信号线一一对应设置的多条静电防护电路，所述静电防护电路的第一连接端分别与所述开关单元的第一连接端和所述控制信号线连接。
  13. 根据权利要求11任一项所述的屏体检测电路，其中，所述屏体检测电路还包括：与所述多条控制信号线一一对应设置的多条静电防护电路，所述静电防护电路的第一连接端分别与所述开关单元的第二连接端和所述检测信号输入端连接，所述静电防护电路的第二连接端接地。
  14. 一种显示屏，包括如权利要求1-13任一项所述的屏体检测电路。
  15. 一种屏体检测方法，用于权利要求1-13任一项所述的屏体检测电 路，其中，所述屏体检测方法包括：
    屏体检测阶段，将导通信号传输至所述开关单元第一控制端，导通所述开关单元，以导通所述开关单元的检测信号输入端与控制信号线之间的线路；
    屏体显示阶段，将断开信号传输至所述开关单元的第二控制端，断开所述开关单元，以断开所述检测信号输入端与所述控制信号线之间的线路。
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