WO2020259339A1 - 总线监控装置及方法、存储介质、电子装置 - Google Patents

总线监控装置及方法、存储介质、电子装置 Download PDF

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Publication number
WO2020259339A1
WO2020259339A1 PCT/CN2020/096133 CN2020096133W WO2020259339A1 WO 2020259339 A1 WO2020259339 A1 WO 2020259339A1 CN 2020096133 W CN2020096133 W CN 2020096133W WO 2020259339 A1 WO2020259339 A1 WO 2020259339A1
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Prior art keywords
test
monitoring
information
message
channel
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PCT/CN2020/096133
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English (en)
French (fr)
Inventor
刘念
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深圳市中兴微电子技术有限公司
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Priority to EP20832404.6A priority Critical patent/EP3961403B1/en
Priority to KR1020217038522A priority patent/KR20210154249A/ko
Priority to US17/609,653 priority patent/US12086022B2/en
Priority to JP2021569023A priority patent/JP7383053B2/ja
Publication of WO2020259339A1 publication Critical patent/WO2020259339A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273—Test methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079—Root cause analysis, i.e. error or fault diagnosis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3027—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a bus

Definitions

  • This application relates to the field of electronics, for example, to a bus monitoring device and method, storage medium, and electronic device.
  • the main principle of the bus monitoring technology that has been developed in the industry is to choose to record all the behaviors of the bus nodes, and then form a data stream through packetization and compression, and send it to the internal cache of the chip system for storage, or through the port of the chip system Send it to an off-chip memory module for storage.
  • This function is generally called the trace method in the industry, which is similar to the oscilloscope for signal sampling and storage, and then restores it for analysis by debuggers.
  • Large chip companies in the industry generally adopt self-developed bus debugging systems, including tool chains, and so on. For example, Advanced RISC Machines (ARM) companies define Coresight, a debugging component for buses.
  • ARM Advanced RISC Machines
  • the above-mentioned ARM company's bus debugging technology (debugging component) is still similar to the monitoring method in related technologies. In principle, it cannot support real-time positioning problems, but is a passive debugging method after the fact. Specifically, other methods appear in the operation of the chip system After the problem, the tester can check the history of the bus and analyze it afterwards to locate where the problem occurred. The workload and requirements for analysis and positioning are relatively high.
  • the embodiments of the present application provide a bus monitoring device and method, a storage medium, and an electronic device to solve the technical problem in related technologies that the chip system cannot perform real-time monitoring of nodes during operation.
  • a bus monitoring device including:
  • a plurality of monitoring modules are configured to be set in the bus, and each monitoring module is configured to be set in a sub-system to be tested in the bus; wherein, the plurality of monitoring modules are connected in series by using a ring topology structure.
  • a control module configured to obtain a test vector, and send a test message to one monitoring module of the plurality of monitoring modules according to the test vector to transmit the test message among the plurality of monitoring modules;
  • the monitoring module is configured to execute the test message and obtain the test information of the sub-system to be tested, wherein the test information of the sub-system to be tested is set to instruct to perform the test in the monitoring module In the case of a message, the bus information of the subsystem under test.
  • a bus monitoring method applied to a control module including:
  • a plurality of monitoring nodes are set in the bus, and each of the monitoring nodes is set in a sub-system to be tested in the bus; wherein, the plurality of monitoring nodes are connected in series with a ring topology;
  • test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem under test, wherein the test information of the subsystem under test is used to indicate Information of the bus of the subsystem to be tested in the case that the monitoring node executes the test message.
  • a bus monitoring method applied to a monitoring node including:
  • a plurality of monitoring nodes are set in the bus, and each of the monitoring nodes is set in a sub-system to be tested in the bus; wherein, the plurality of monitoring nodes are connected in series with a ring topology;
  • test information of the subsystem to be tested is used to indicate that when the monitoring node executes the test message, the Information about the bus of the test subsystem;
  • test message is delivered by the control module to one monitoring node of the plurality of monitoring nodes according to the acquired test vector to transmit the test message among the plurality of monitoring nodes.
  • a bus monitoring device applied to a control module including:
  • the topology unit is configured to set a plurality of monitoring nodes in the bus, and each of the monitoring nodes is set in a sub-system to be tested in the bus; wherein, a ring topology structure is adopted between the plurality of monitoring nodes.
  • the control unit is configured to obtain a test vector, and according to the test vector, deliver a test message to one monitoring node of the plurality of monitoring nodes to transmit the test message among the plurality of monitoring nodes;
  • the test vector is set to instruct the monitoring node to execute the test message and obtain the test information of the subsystem under test, wherein the test information of the subsystem under test is used to indicate Information of the bus of the subsystem to be tested in the case that the monitoring node executes the test message.
  • a bus monitoring device applied to a monitoring node including:
  • the topology unit is configured to set a plurality of monitoring nodes in the bus, and each of the monitoring nodes is set in a sub-system to be tested in the bus; wherein, a ring topology structure is adopted between the plurality of monitoring nodes.
  • the monitoring unit is configured to receive and execute a test message, and obtain test information of the sub-system to be tested, and the test information of the sub-system to be tested is set to indicate the execution of the test message on the monitoring node Next, the bus information of the subsystem under test;
  • test message is delivered by the control module to the multiple monitoring nodes for transmission according to the acquired test vector.
  • a storage medium in which a computer program is stored, and the computer program is configured to execute the steps in any one of the foregoing method embodiments when running.
  • an electronic device including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute any of the above Steps in the method embodiment.
  • Fig. 1 is a functional schematic diagram (1) of a bus monitoring device provided according to an embodiment of the present application
  • FIG. 2 is a structural block diagram of a monitoring module provided according to an embodiment of the present application.
  • Fig. 3 is a structural block diagram of a control module provided according to an embodiment of the present application.
  • Fig. 4 is a functional schematic diagram (2) of a bus monitoring device provided according to an embodiment of the present application.
  • FIG. 5 is a flowchart (1) of a bus monitoring method provided according to an embodiment of the present application.
  • Fig. 6 is a flowchart (2) of a bus monitoring method provided according to an embodiment of the present application.
  • Fig. 7 is a flowchart of a scenario embodiment one provided according to an embodiment of the present application.
  • FIG. 8 is a flowchart of a second scenario embodiment according to an embodiment of the present application.
  • Fig. 9 is a flowchart of a third scenario embodiment according to an embodiment of the present application.
  • Fig. 10 is a flowchart of a fourth scenario embodiment provided according to an embodiment of the present application.
  • Fig. 11 is a flowchart (3) of a bus monitoring method provided according to an embodiment of the present application.
  • Figure 12 is a structural block diagram (1) of a bus monitoring device provided according to an embodiment of the present application.
  • Fig. 13 is a structural block diagram (2) of a bus monitoring method provided according to an embodiment of the present application.
  • the bus protocol in the chip system is generally based on multi-channel processing.
  • AXI Advanced Extensible Interface
  • AR read address channel
  • R Read data channel
  • AW write address channel
  • W write data channel
  • B write response channel
  • FIG. 1 is a functional schematic diagram (1) of the bus monitoring device according to an embodiment of the application. As shown in FIG. 1, the bus monitoring device includes:
  • a plurality of monitoring modules 102 are configured to be set in the bus, and each monitoring module 102 is configured to be set in a sub-system under test in the bus; among them, the plurality of monitoring modules 102 are connected in series with a ring topology.
  • the control module 104 is set to obtain the test vector, and according to the test vector, the test message is sent to a plurality of monitoring modules 102 for transmission; the monitoring module 102 is set to execute the test message and obtain the test information of the subsystem to be tested , Where, the test information of the subsystem under test is used to instruct the monitoring module to execute the test message, the information of the bus of the subsystem under test.
  • the bus monitoring device since the bus monitoring device includes a plurality of monitoring modules set in the bus, each of the monitoring modules is configured to be set in a sub-system under test in the bus.
  • a ring topology is adopted for serial connection between a plurality of the monitoring modules; the bus monitoring device obtains a test vector through the control module, and sends a test message to the plurality of monitoring modules according to the test vector Transmission; the monitoring module can execute the test message and obtain the test information of the sub-system to be tested, wherein the test information of the sub-system to be tested is used to instruct the monitoring module to execute the When testing a message, the bus information of the subsystem under test. Therefore, the bus monitoring device in this embodiment can solve the technical problem in the related art that the chip system cannot perform real-time monitoring of nodes during operation, so as to achieve the effect of real-time monitoring of nodes during the operation of the chip system.
  • the bus monitoring device in this embodiment can obtain information about the bus of the sub-system to be tested by executing the test message by the monitoring module during the operation of multiple sub-systems to be tested in the bus.
  • Real-time monitoring of the test subsystem on the one hand, when a problem occurs in the bus operation, the debugger can quickly locate the node (that is, the subsystem under test) where the problem is located, which improves the efficiency of locating and solving bus problems; on the other hand
  • the bus device in this embodiment does not need to follow the tracking and monitoring method of recording all the actions of the sub-system under test in the related technology, this embodiment can effectively reduce the logic processing resources and storage resources set for monitoring. , In order to reduce system cost or pressure.
  • the multiple monitoring modules in this embodiment are set independently of each other. Therefore, the independent testability of different subsystems to be tested in the system can be effectively improved, and the coupling between multiple subsystems to be tested can be reduced; the hardware in the system
  • the bus monitoring device in this embodiment can also add a monitoring module and connect the newly added monitoring module to the original topology to realize the free configuration of the subsystem under test in the system. To increase the flexibility of monitoring.
  • the network formed by the ring topology formed by multiple monitoring modules can be referred to as a token ring network, and the connection between multiple monitoring modules is the end-to-end serial connection between multiple monitoring modules.
  • control module 104 is configured to issue a test message to multiple monitoring modules for transmission according to the test vector, including: the control module is configured to obtain the test vector, and analyze the test vector to obtain the test message , And send test messages to multiple monitoring modules for transmission.
  • the test message in this embodiment adopts a data message in a specified frame format, and the data message includes: header information, instruction identification number (Identity, ID) information, operation command information, instruction address information, and message Length information and command data information.
  • control module 104 is configured to send test messages to multiple monitoring modules for transmission according to the test vector, and further includes: the control module is configured to obtain the test vector, and analyze the test vector to obtain the test report.
  • the configuration message is generated according to the test message, and the configuration message is sent to multiple sub-systems under test in the bus, where the configuration message is used to instruct multiple sub-systems under test to perform configuration processing according to the configuration message; After the multiple subsystems to be tested have completed the configuration processing, test messages are sent to multiple monitoring modules for transmission.
  • the configuration message is used to configure multiple subsystems under test according to the requirements in the test vector, for example, turn on the corresponding registers in the subsystem under test, or set corresponding matching values in the registers according to the requirements of the test vector, etc. .
  • the test message includes a plurality of test sub-messages, and each test sub-message carries first identification information, and the first identification information is used to identify the subsystem to be tested; the test sub-messages are used for The monitoring module is instructed to execute the test sub-message according to the first identification information, wherein the monitoring module is a monitoring module set in the subsystem to be tested identified by the first identification information.
  • the multiple test sub-messages contained in the test message are respectively used to instruct the monitoring modules set in different subsystems to be tested to execute the corresponding test sub-messages.
  • the first identification information in the test sub-messages can usually be The address information of the sub-system to be tested, but not limited to this, any identification information that can identify different sub-systems to be tested can be used as the first identification information, such as the ID of the device to be tested, or a combination of multiple identification information.
  • the application is not limited.
  • the control module transmits the test message to multiple monitoring modules, whether it is a write or read operation, it is a 32-bit data message, and the first identification information is carried in the data message.
  • the control module sends a test message encapsulated according to the set frame format to multiple monitoring modules.
  • the test message includes the ID number, the write control signal, the address of the subsystem under test, and the subsystem under test.
  • the address of the register and the data to be written, where the address of the subsystem under test can indicate the first identification information to identify the address of the subsystem under test.
  • any monitoring module receives the above test message, it can transmit between the token ring network formed by multiple monitoring modules.
  • each monitoring module After each monitoring module receives the test message, it detects whether the address of the corresponding subsystem under test matches the address of the subsystem under test in the data. If it does not match, it will continue to the next monitoring module in serial form. Transmission for processing by the next monitoring module; if the match is consistent, after the write operation corresponding to the address is executed, the original data is still transmitted intact in serial form to the next monitoring module; if all the subsystems to be tested If the addresses do not match, the original data will be transmitted back to the test control module intact.
  • the monitoring module 102 in this embodiment can generally be composed of a monitoring connection unit 1022 and a monitoring implementation unit 1024, wherein the monitoring connection unit 1022 is configured to realize the connection between the monitoring module and the sub-system under test, and the test of the sub-system under test Information is read, encapsulated, and transmitted; the monitoring implementation unit 1024 is set to implement monitoring of the subsystem under test.
  • the receiving of the test message by the above monitoring module can be realized by the monitoring connection unit, and the monitoring of the subsystem under test is to detect whether the address of the corresponding subsystem under test matches the address of the subsystem under test in the data.
  • the implementation unit 1024 is implemented.
  • FIG. 2 is a structural block diagram of a monitoring module provided according to an embodiment of the present application. The internal functional structure of the monitoring module 104 is as shown in FIG. 2.
  • the monitoring module includes a first monitoring implementation unit and a second monitoring implementation unit.
  • the first monitoring implementation unit is configured to obtain the first test information of the subsystem to be tested, and the second monitoring implementation unit is configured to obtain the The second test information of the test subsystem; wherein the first test information of the test subsystem includes the information of the write address channel, the write data channel and the write response channel of the bus of the test subsystem; the second test of the test subsystem The information includes the read address channel and read data channel of the bus of the subsystem under test.
  • the above-mentioned setting of the first monitoring implementation unit and the second monitoring implementation unit can make the write address channel, write data channel, and write response channel in the bus information of each subsystem under test time-division multiplex the first monitoring implementation unit, and make The information of the read address channel and the read data channel in the bus information of each subsystem to be tested is time-division multiplexed with the second monitoring implementation unit, so as to ensure that the monitoring module monitors the bus information of the aforementioned subsystem to be tested, Save 3 channels of implementation units to save logic processing resources and storage resources.
  • the monitoring module in this embodiment can usually be composed of a monitoring connection unit and a monitoring implementation unit, where the monitoring connection unit is configured to realize the connection between the monitoring module and the subsystem under test, and to read the test information of the subsystem under test , Packaging and transmission, etc.; the monitoring implementation unit is set to implement the monitoring of the sub-system under test.
  • the receiving of the test message by the above monitoring module can be realized by the monitoring connection unit, and the monitoring of the subsystem under test is to detect whether the address of the corresponding subsystem under test matches the address of the subsystem under test in the data.
  • Implementation unit implementation is configured to realize the connection between the monitoring module and the subsystem under test, and to read the test information of the subsystem under test , Packaging and transmission, etc.; the monitoring implementation unit is set to implement the monitoring of the sub-system under test.
  • the monitoring module is set to execute the test message and obtain the test information of the subsystem under test, including: the monitoring module is set to be in the address channel, data channel, and response channel of the subsystem under test.
  • the test information of the sub-system under test is acquired; among them, the address channel, data channel, and response channel of the bus of the sub-system under test meet the preset trigger sequence conditions including at least the following One:
  • the trigger sequence condition is that the data channel has priority over the address channel trigger; when the data channel is used as the matching target of the monitoring module, the trigger sequence condition is that the address channel has priority over the data channel trigger;
  • the trigger sequence condition is that both the address channel and the data channel have priority over the response channel trigger.
  • the aforementioned monitoring module can obtain information about the successful handshake of the subsystem under test on the corresponding channel when the corresponding channel of the subsystem under test meets the preset trigger sequence, that is, test information; the monitoring object of the monitoring module, that is, the matching object can be one, It can also be multiple.
  • the monitoring module is set to execute the test message and obtain the test information of the subsystem under test, including: the monitoring module is set to obtain the write address channel, write data channel, and write address of the bus of the subsystem under test.
  • the foregoing preset range may indicate bus handshake information at different moments, such as the last bus handshake information.
  • the monitoring module is set to execute the test message and obtain the test information of the subsystem under test, including: the monitoring module is set to obtain the write address channel of the bus of the subsystem under test and the write response channel The difference between the number of successful handshake and the number of successful handshake between the read address channel and the read response channel; when the following preset conditions are met, the monitoring module is also set to report a silent timeout interrupt: the difference is non-zero, and the difference is maintained The constant time exceeds the preset threshold.
  • the monitoring module is set to execute the test message and obtain the test information of the subsystem to be tested, including: the monitoring module is set to obtain the write address channel of the bus of the subsystem to be tested and the read address channel in advance Set the address information in the range, where the address information in the preset range is used to indicate the out-of-order transmission OUTSTANDING pen address information calculated from the current moment.
  • the monitoring module is configured to obtain test information of the sub-system to be tested, including: the monitoring module is configured to obtain the test information of the sub-system to be tested, and send the test information to the control module.
  • the monitoring module is set to obtain the test information of the sub-system to be tested, and further includes: the monitoring module is set to obtain the test information of the sub-system to be tested, and encapsulates the test information according to a preset frame format, and The packaged test information is sent to the control module.
  • the encapsulated test information carries second identification information, and the second identification information is used to identify the control module.
  • the above-mentioned second identification information may be the ID number of the control module, and each control module has a unique ID number, so the identification of the control module can be realized based on this.
  • the monitoring module obtains the test information of the sub-system to be tested and encapsulates it to be sent to the control module
  • the ID number of the aforementioned control module can be added during the encapsulation process.
  • the control module After the control module receives the test information, it will detect the ID number carried in the test information. If the ID number in the feedback data matches the ID number of the control module in the test information, the feedback data will be stored. If it does not match, The feedback data is transmitted in the serial form intact.
  • the control module 104 in this embodiment can generally be composed of a test vector input unit 1042, a test vector analysis execution unit 1044, and a test vector output unit 1046.
  • the input unit of the test vector is set to receive the test vector and perform the test.
  • the vector is stored in a dedicated RAM or any address space on the bus interconnection;
  • the analysis execution unit of the test vector is set to read the test vector from the above storage space, execute and parse it, and deliver the test message, and give feedback
  • the test information is written or read into the designated address space; the output unit of the test result is set to send the above-mentioned test information stored in the designated address space to the outside, such as the test host.
  • Fig. 3 is a structural block diagram of a control module provided according to an embodiment of the present application. The internal functional structure of the above-mentioned control module is shown in Fig. 3.
  • control module also needs to be able to detect the data written by multiple monitoring modules to the control module, and determine whether it is writing data or reading data by itself according to the read and write control signals and feedback signals; according to the address of the subsystem under test and the test
  • the register address of the subsystem can judge the correctness of this operation and extract the data correctly; according to the returned feedback signal value, judge whether the operation is completed correctly.
  • Read operation complete a read operation. Under normal circumstances, two read operations are required. For the first time, input the device number, register address, read control signal, etc. of the corresponding subsystem under test to the monitoring module, and the feedback signal value is 2 'b10, the 16bits data read back is invalid at this time; input the same 32bits value for the second time, and the feedback signal value is 2'b11, then a read operation is completed at this time, and the 16bits value read back is what is needed Data value; if the feedback in the data read back for the first time is 2'b01, indicating that the storage space is full, the device needs the following operations: Determine whether the data has been read, and the corresponding second operation has not been completed, if it is If not, the read operation is completed; if not, there are other devices reading the register data of the sub-system under test, and the device needs to wait and send the read data repeatedly until the feedback signal is 2'b10, which means reading The operation is in progress and the data can be read back next time.
  • the response feedback signal value is 2'b00, it means that the input device number of the monitoring module does not match the device numbers of all the subsystems under test in the bus. You need to check the input device number of the monitoring module .
  • FIG. 4 is a functional schematic diagram (2) of the bus monitoring device provided according to an embodiment of the present application.
  • the device further includes: a test host 106 configured to generate a preset test vector ; Asynchronous transceiver 108, configured to send test vectors to the control module, and receive test information sent by the control module.
  • FIG. 5 is a flowchart (1) of the bus monitoring method according to an embodiment of the application. As shown in FIG. 5, the bus monitoring method includes:
  • multiple monitoring nodes are set in the bus, and each monitoring node is set in a sub-system to be tested in the bus; wherein, the multiple monitoring nodes are connected in series by using a ring topology structure.
  • S204 Obtain a test vector, and deliver a test message to multiple monitoring nodes for transmission according to the test vector; where the test vector is used to instruct the monitoring node to execute the test message and obtain test information of the subsystem to be tested, where: The test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, the information of the bus of the subsystem to be tested.
  • the bus monitoring method in this embodiment since multiple monitoring nodes in the bus can be respectively configured to be set in a sub-system to be tested in the bus; wherein, a ring is adopted between the multiple monitoring nodes.
  • the topology structure is connected in series; when the control module obtains the test vector and sends a test message to the multiple monitoring nodes for transmission according to the test vector, the monitoring node can execute the test message, and Acquire test information of the subsystem to be tested, where the test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, information about the bus of the subsystem to be tested. Therefore, the bus monitoring method in this embodiment can solve the technical problem in the related art that the chip system cannot perform real-time monitoring of nodes during operation, so as to achieve the effect of real-time monitoring of nodes during the operation of the chip system.
  • the monitoring node executes the test message to obtain the information of the bus of the subsystem to be tested.
  • Real-time monitoring of the test subsystem on the one hand, when a problem occurs in the bus operation, the debugger can quickly locate the node where the problem is located, that is, the subsystem under test, which improves the efficiency of locating and solving bus problems; on the other hand, because The bus device in this embodiment does not need to follow the tracking monitoring method of recording all the actions of the sub-system under test in the related technology, so this embodiment can effectively reduce the logic processing resources and storage resources set up for monitoring. Reduce system cost or pressure.
  • the multiple monitoring nodes in this embodiment are set independently of each other, therefore, the independent testability of the different subsystems to be tested in the system can be effectively improved, and the coupling between the subsystems to be tested can be reduced; the hardware unit in the system
  • the bus monitoring device in this embodiment can also add a monitoring node and connect it to the original topology to realize the free configuration of the sub-system under test in the system to improve the monitoring performance. flexibility.
  • the network formed by the ring topology formed by multiple monitoring nodes can be called a token ring network, and the connection between multiple monitoring nodes is the end-to-end serial connection between multiple monitoring nodes.
  • the above S204, obtaining a test vector, and sending a test message to multiple monitoring nodes for transmission according to the test vector includes: obtaining the test vector, analyzing the test vector to obtain the test message, and downloading Send test messages to multiple monitoring nodes for transmission.
  • the test message in this embodiment adopts a data message in a specified frame format, and the data message includes: header information, instruction identification number (Identity, ID) information, operation command information, instruction address information, and message Length information and command data information.
  • the above S204, obtaining a test vector, and sending a test message to multiple monitoring nodes for transmission according to the test vector further includes: obtaining the test vector, analyzing the test vector to obtain the test message; The test message generates a configuration message, and sends the configuration message to multiple sub-systems under test in the bus.
  • the configuration message is used to instruct multiple sub-systems under test to perform configuration processing according to the configuration message; After the subsystem under test completes the configuration processing, it sends test messages to multiple monitoring nodes for transmission.
  • the configuration message is used to configure multiple subsystems under test according to the requirements in the test vector, for example, turn on the corresponding register in the subsystem under test, or set the corresponding matching value in the register according to the requirements of the test vector, etc. Wait.
  • the test message includes a plurality of test sub-messages, and each test sub-message carries first identification information, and the first identification information is used to identify the subsystem to be tested; the test sub-messages are used for Instruct the monitoring node to execute the test sub-message according to the first identification information, where the monitoring node is a monitoring node set in the subsystem to be tested identified by the first identification information.
  • the multiple test sub-messages contained in the test message are respectively used to instruct monitoring units set in different sub-systems to be tested to execute the corresponding test sub-messages.
  • the first identification information in the above-mentioned test sub-messages can usually be The address information of the subsystem to be tested, but not limited to this, any identification information that can identify different subsystems to be tested can be used as the first identification information, which is not limited in this application.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the sub-system under test, including: time-division multiplexing the first monitoring implementation unit to obtain the sub-system under test The information of the write address channel, the write data channel and the write response channel of the bus; and the time-sharing multiplexed second monitoring implementation unit obtains the information of the read address channel and the read data channel of the bus of the subsystem under test; wherein, the first monitor The implementation unit and the second monitoring implementation unit are both set in the monitoring node.
  • the above-mentioned setting of the first monitoring implementation unit and the second monitoring implementation unit can make the write address channel, write data channel, and write response channel in the bus information of each subsystem under test time-division multiplex the first monitoring implementation unit, and make The information of the read address channel and the read data channel in the bus information of each sub-system to be tested is time-multiplexed with the second monitoring implementation unit, so as to ensure that the monitoring node monitors the bus information of the aforementioned sub-system to be tested, Save 3 channels of implementation units to save logic processing resources and storage resources.
  • the test vector is used to instruct the monitoring node to execute the test message and to obtain the test information of the subsystem under test, including: indicating that the monitoring node is on the address channel of the bus of the subsystem under test, When the preset trigger sequence conditions between the data channel and the response channel are met, the test information of the subsystem under test is obtained; among them, the address channel, data channel, and response channel of the bus under test meet the preset conditions.
  • the trigger sequence condition includes at least one of the following: when the address channel is used as the matching object of the monitoring node, the trigger sequence condition is that the data channel has priority over the address channel trigger; when the data channel is used as the matching object of the monitoring node, the trigger sequence condition is the address channel priority Trigger on the data channel; when the response channel is the matching object of the monitoring node, the trigger sequence condition is that both the address channel and the data channel have priority over the response channel trigger.
  • the aforementioned monitoring module can obtain information about the successful handshake of the subsystem under test on the corresponding channel when the corresponding channel of the subsystem under test meets the preset trigger sequence, that is, test information; the monitoring object of the monitoring module, that is, the matching object can be one , Or multiple.
  • the test vector is used to instruct the monitoring node to execute the test message and to obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the write address channel of the bus of the subsystem under test The bus handshake information of the write data channel, write response channel, read address channel, and read data channel within the preset range.
  • the foregoing preset range may indicate bus handshake information at different moments, such as the last bus handshake information.
  • the test vector is used to instruct the monitoring node to execute the test message and to obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the write address channel of the bus of the subsystem under test And the difference between the number of successful handshake between the write response channel and the number of successful handshake between the read address channel and the read response channel; when the following preset conditions are met, the monitoring node is also used to report the silent timeout interrupt: bad The value is non-zero, and the time the difference remains unchanged exceeds the preset threshold.
  • the test vector is used to instruct the monitoring node to execute the test message and to obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the write address channel of the bus of the subsystem under test And read the address information of the address channel within the preset range, where the address information within the preset range is used to indicate the OUTSTANDING address information calculated from the current moment.
  • the test vector is used to instruct the monitoring node to execute the test message and to obtain the test information of the sub-system to be tested, and further includes: the test vector is used to instruct the monitoring node to obtain the sub-system to be tested Test information, and send the test information to the control module.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the sub-system to be tested, and further includes: the test vector is used to instruct to obtain the test information of the sub-system to be tested , And encapsulate the test information according to the preset frame format, and send the encapsulated test information to the control module.
  • the encapsulated test information carries second identification information, and the second identification information is used to identify the control module.
  • the above-mentioned second identification information may be the ID number of the control module, and each control module has a unique ID number, so the identification of the control module can be realized based on this.
  • FIG. 6 is a flowchart (2) of the bus monitoring method according to the embodiment of the application. , As shown in Figure 6, the method includes:
  • S3010 Receive a pre-configured test vector sent by the test host.
  • the pre-configured test vector contains the test task for the bus test, that is, through the test task, the test situation and status of the bus can be obtained in real time to achieve the purpose of understanding the bus status;
  • the test vector can be set in advance according to the actual test task.
  • S3020 Parse the pre-configured test vector to obtain a test message.
  • test message is a data message with a specified frame format, and the test message includes: packet header information, command ID information , Operation command information, instruction address information, message length information and instruction data information.
  • a token ring network of monitoring nodes is set up on the bus.
  • the token ring network of the monitoring nodes includes at least two monitoring nodes.
  • the head and tail of each monitoring node are connected in series according to the ring topology to form a token ring network.
  • a monitoring node is set on a node to be tested on the bus.
  • S3040 Send a test message to the token ring network, and the test message instructs each monitoring node to execute the test message.
  • the device sends a test message to each monitoring node on the token ring network; the test message instructs each monitoring node to execute the part of the test message corresponding to the device address information of the node to be tested.
  • control module in the device writes or reads 32-bit data
  • the nodes to be tested on the entire bus have independent and unique device numbers
  • the control module has a unique ID number
  • control module sends a write operation 32bits data to the serial bus of the token ring network according to the specified format, including the ID number, write control signal, address of the node to be tested, and data of the node to be tested. Register address and data to be written.
  • each monitoring node When each monitoring node receives the data, it checks whether the corresponding address of the node to be tested matches the address of the node to be tested in the data. If it does not match, it will continue to transmit to the next monitoring node in serial form for the next A monitoring node is processed; if the match is consistent, after the corresponding write operation, the original data is still transmitted in the serial form to the next monitoring node; if the addresses of all the nodes to be tested do not match, the original The data will also be transferred back to the test control module intact.
  • control module After the control module receives the feedback data, it will detect the ID number. If the ID number in the feedback data matches the ID number of the control module, the feedback data will be stored. If it does not match, the feedback data will be left intact. It is transmitted in serial form.
  • the device When each monitoring node executes the test message, the device obtains the information of the bus on each node to be tested.
  • the control module of the device needs to be able to detect the data written by each monitoring node to the device, and determine whether to write data or read data by itself according to the read and write control signals and feedback signals; according to the address of the node to be tested and the node to be tested
  • the register address of can judge the correctness of this operation, and can correctly extract the data; according to the returned feedback signal value, judge whether the operation is completed correctly.
  • Read operation complete a read operation. Under normal circumstances, two read operations are required. For the first time, input the device number, register address, read control signal, etc. of the node to be monitored to the monitoring node, and the feedback signal value is 2' b10, the 16bits data read back at this time is invalid; input the same 32bits value for the second time, and the feedback signal value is 2'b11, then a read operation is completed at this time, and the 16bits value read back is the required data Value; if the feedback in the data read back for the first time is 2'b01, indicating that the storage space is full, the device needs the following operations: Determine whether the data has been read, but the corresponding second operation has not been completed, if so , Then the read operation is completed; if not, there are other devices reading the register data of the node to be monitored, and the device needs to wait and send the read data repeatedly until the feedback signal is 2'b10, which means the read operation is in progress Go ahead and read back the data next time.
  • the value of the feedback feedback signal is 2'b00, it means that the input device number of the monitoring node does not match the device numbers of all the nodes to be monitored in the bus. You need to check the input device number of the monitoring node.
  • time-division multiplexing technology can be used to acquire it.
  • the first monitoring implementation unit in each monitoring node is time-division multiplexed The information of the write address channel, write data channel and write response channel of the bus on each node to be tested.
  • the second monitoring implementation unit in each monitoring node is time-multiplexed to obtain the bus information on each node to be tested.
  • the content of the bus information on each node to be tested is also different, as shown below:
  • Trigger conditions include: the use of multiplexing of read and write channels, and supports the trigger conditions for the setting of address, data and response to the combination sequence between the three channels; support for the combination sequence of address, data and response to the three channels
  • the settings include: for address channel triggering, support the setting of data channel trigger first; for data channel trigger, support the setting of address channel trigger first; for response channel trigger, support the setting of address channel and data channel trigger first.
  • the second case is a first case
  • S3060 Pack the information of the bus on each node to be tested into a message in a fixed frame format.
  • the device packages the information of the bus on each node to be tested into a fixed frame format message.
  • the device reports the message in a fixed frame format to the test host for analysis and storage by the test host, and monitors whether the bus transmission is normal in real time.
  • FIG. 7 is a flowchart of a scenario embodiment 1 according to an embodiment of the application.
  • the method of this scenario embodiment is to obtain the write address channel data of the bus, set the address as a matching item, and a single trigger as an example
  • the steps are as follows:
  • the configuration storage register is used to store data.
  • Configuration ID is suitable for matching address channel selection register.
  • step S4110 Determine whether the address matching is successful, if the address matching is unsuccessful, perform step S4120; if the address match is successful, perform step S4130.
  • the relevant data information includes: handshake time information, write address ID information, write address information, write burst length information, burst size information, and burst type information.
  • Fig. 8 is a flowchart of a second scenario embodiment provided by an embodiment of the application. As shown in Fig. 8, the method of this scenario embodiment uses monitoring of 5 channels of the bus as an example to illustrate how to monitor the bus. The steps are as follows :
  • the monitoring is started by default after power-on, and no matching conditions are set to capture the handshake information of the bus in real time.
  • the handshake information of the write address channel includes: handshake time information, write address ID information, write address information, write burst length information, burst size information, and burst type information.
  • the write data channel handshake information includes: write data ID information, write data switch value information, and write data value information.
  • the handshake information of the write response channel includes: write response ID value information and write response value information.
  • the handshake information of the read address channel includes: handshake time information, read address ID value information, read address information, read burst length information, burst size information, and burst type information.
  • the handshake information of the read data channel includes: read data ID value information, read data value information, and read response value information.
  • S5020 After grouping the handshake information captured in real time by each channel into a fixed frame format, it is transmitted to an external test host.
  • S5030 an external test host, conducts data analysis and monitors whether the bus transmission is normal in real time.
  • Fig. 9 is a flowchart of a third scenario embodiment provided by an embodiment of the present application. As shown in Fig. 9, the method of this scenario embodiment uses monitoring the address channel of the bus as an example to illustrate how to monitor the bus. The steps are as follows:
  • monitoring is started by default after power-on.
  • S6020 Record the difference between the successful handshake times of the write address channel and the write response channel, the read address channel and the read response channel, respectively.
  • Step 6040 Freeze the monitoring function of the monitoring node triggered by the silent timeout interrupt, clear the register and keep it on-site, and do not monitor any subsequent bus actions.
  • Step 6050 Clear the silent timeout counter to ensure that the interrupt will not be pulled high all the time.
  • Step 6060 It is determined that the bus cannot be recovered, and the bus needs to be reset and restarted.
  • FIG. 10 is a flowchart of a fourth scenario embodiment according to an embodiment of the present application. As shown in FIG. 10, the method of this scenario embodiment uses monitoring the write address channel and/or read address channel of the bus as an example to illustrate how to monitor the bus , The steps are as follows:
  • Step 7010 Store the information of the write address channel and/or read address channel (information includes: address information, ID information, burst length information, burst size information and burst type information) into a write address with a depth equal to the OUTSTANDING value. Queue (first input first output, fifo) and/or read address fifo; where the write address channel corresponds to the write address fifo, and the read address channel corresponds to the read address fifo.
  • Step 7020 Before reading the write address channel and/or read address channel information, first query the status of the write address fifo and/or read address fifo.
  • Step 7030 If the fifo is not empty, raise the read enable signal of the register write address fifo and/or read address fifo through the write register operation, and take the information from the fifo and store it in 5 (3+1+1) cache registers, and then Read the value of 5 cache registers.
  • Step 7040 Continue to use the write register operation to pull up the read enable signal of the register write address fifo and/or read address fifo, and the next message will be taken out from fifo and stored in 5 (3+1+1) cache registers. 5 cache register values are read away.
  • Step 7050 Until all the information in the write address fifo and/or the read address fifo is read and taken away, the state of the fifo becomes empty at this time.
  • the above 5(3+1+1) is used to indicate the five information of address information, ID information, burst length information, burst size information and burst type information.
  • the technical solution of the present application can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium (such as Read-Only Memory, ROM)/Random Access Memory (Random Access Memory). , RAM), magnetic disk, optical disk), including multiple instructions to make a terminal device (can be a mobile phone, computer, server, or network device, etc.) execute the methods described in multiple embodiments of the present application.
  • FIG. 11 is a flowchart (3) of the bus monitoring method according to an embodiment of the present application. As shown in FIG. 11, the bus monitoring method includes:
  • multiple monitoring nodes are set up in the bus, and each monitoring node is set in a sub-system to be tested in the bus; wherein, the multiple monitoring nodes are connected in series with a ring topology structure.
  • S804 Receive and execute a test message, and obtain test information of the sub-system to be tested.
  • the test information of the sub-system to be tested is used to instruct the monitoring node to execute the test message, the information of the bus of the sub-system to be tested; among them, the test message
  • the control module sends the obtained test vector to multiple monitoring nodes for transmission.
  • the bus monitoring method in this embodiment since multiple monitoring nodes in the bus can be respectively configured to be set in a sub-system to be tested in the bus; wherein, a ring is adopted between the multiple monitoring nodes.
  • the topology structure is connected in series; when the control module obtains the test vector and sends a test message to the multiple monitoring nodes for transmission according to the test vector, the monitoring node can execute the test message, and Acquire test information of the subsystem to be tested, where the test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, information about the bus of the subsystem to be tested. Therefore, the bus monitoring method in this embodiment can solve the technical problem in the related art that the chip system cannot perform real-time monitoring of nodes during operation, so as to achieve the effect of real-time monitoring of nodes during the operation of the chip system.
  • control module sends the acquired test vector to multiple monitoring nodes for transmission, including:
  • the control module obtains the test vector, analyzes the test vector to obtain a test message, and sends the test message to multiple monitoring nodes for transmission.
  • control module sends the obtained test vector to multiple monitoring nodes for transmission, and further includes: the control module obtains the test vector, analyzes the test vector to obtain a test message; The test message generates a configuration message, and sends the configuration message to multiple sub-systems under test in the bus.
  • the configuration message is used to instruct multiple sub-systems under test to perform configuration processing according to the configuration message; After the subsystem under test completes the configuration processing, it sends test messages to multiple monitoring nodes for transmission.
  • the test message includes a plurality of test sub-messages, and each test sub-message carries first identification information, and the first identification information is used to identify the subsystem to be tested; the test sub-messages are used for Instruct the monitoring node to execute the test sub-message according to the first identification information, where the monitoring node is a monitoring node set in the subsystem to be tested identified by the first identification information.
  • S802 receiving and executing a test message to obtain test information of the sub-system under test includes: time-division multiplexing the first monitoring implementation unit to obtain the write address channel of the bus of the sub-system under test, and write The information of the data channel and the write response channel; and the time-division multiplexing of the second monitoring implementation unit to obtain the information of the read address channel and the read data channel of the bus of the subsystem under test; wherein, the first monitoring implementation unit and the second monitoring implementation unit All are set in the monitoring node.
  • S802 receiving and executing a test message, and obtaining test information of the sub-system under test, includes: obtaining the trigger sequence of the address channel, data channel, and response channel of the bus of the sub-system under test; wherein, The address channel includes the write address channel and the read address channel, the data channel includes the write data channel and the read data channel, and the response channel includes the write response channel; the trigger sequence of the address channel, the data channel, and the response channel includes: for the address channel trigger, the data channel is supported Trigger first; or, for data channel trigger, support address channel trigger first; or, for response channel trigger, support address channel and data channel trigger first.
  • S802 receiving and executing a test message, and acquiring test information of the subsystem under test, includes:
  • S802 receiving and executing a test message, and acquiring test information of the subsystem under test, includes:
  • the monitoring node is also used to report the silent timeout interrupt: the difference is non-zero, and the time that the difference remains unchanged exceeds the preset threshold.
  • S802 receiving and executing a test message, and obtaining test information of the sub-system under test, includes: obtaining the write address channel of the bus of the sub-system under test and the address of the read address channel within a preset range Information, where the preset range is used to indicate the OUTSTANDING pens calculated from the current moment.
  • S802 receiving and executing the test message, and obtaining the test information of the sub-system to be tested, further includes: obtaining the test information of the sub-system to be tested, and sending the test information to the control module.
  • S802 receiving and executing a test message, obtaining test information of the sub-system under test, further includes: obtaining test information of the sub-system under test, and encapsulating the test information according to a preset frame format, Send the packaged test information to the control module.
  • the encapsulated test information carries second identification information, and the second identification information is used to identify the control module.
  • the method according to the foregoing embodiment can be implemented by means of software plus a general hardware platform, and of course can also be implemented by hardware.
  • the technical solution of the present application can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium (such as ROM/RAM, magnetic disk, and optical disk), and includes multiple instructions to enable one
  • a terminal device which may be a mobile phone, a computer, a server, or a network device, etc. executes the methods described in the multiple embodiments of the present application.
  • a bus monitoring device is also provided, which is applied to a control module.
  • the device is used to implement the above-mentioned embodiments and implementation modes, and the descriptions that have been described will not be repeated.
  • the term "module" can implement a combination of software and/or hardware with predetermined functions.
  • Fig. 12 is a structural block diagram (1) of a bus monitoring device according to an embodiment of the present application.
  • the device includes: a first topology unit 402 configured to set multiple monitoring nodes in the bus, each monitoring node Set in a sub-system to be tested in the bus; among them, multiple monitoring nodes are connected in series with a ring topology; the control unit 404 is set to obtain a test vector and send a test message to multiple Transmission between monitoring nodes; among them, the test vector is used to instruct the monitoring node to execute the test message and to obtain the test information of the sub-system to be tested. Among them, the test information of the sub-system to be tested is used to instruct the monitoring node to execute the test message. , The bus information of the subsystem under test.
  • the bus monitoring device in this embodiment since multiple monitoring nodes in the bus can be respectively configured to be set in a sub-system under test in the bus; wherein, a ring is adopted between the multiple monitoring nodes.
  • the topology structure is connected in series; when the control module obtains the test vector and sends a test message to the multiple monitoring nodes for transmission according to the test vector, the monitoring node can execute the test message, and Acquire test information of the subsystem to be tested, where the test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, information about the bus of the subsystem to be tested. Therefore, the bus monitoring device in this embodiment can solve the technical problem in the related art that the chip system cannot perform real-time monitoring of nodes during operation, so as to achieve the effect of real-time monitoring of nodes during the operation of the chip system.
  • obtaining a test vector, and issuing a test message to multiple monitoring nodes for transmission according to the test vector includes: obtaining the test vector, analyzing the test vector to obtain the test message, and sending it Test messages are transmitted between multiple monitoring nodes.
  • obtaining a test vector, and sending a test message to multiple monitoring nodes for transmission according to the test vector further includes: obtaining the test vector, analyzing the test vector to obtain the test message; The message generates a configuration message, and sends the configuration message to multiple sub-systems under test in the bus.
  • the configuration message is used to instruct multiple sub-systems under test to perform configuration processing according to the configuration message; After the test subsystem completes the configuration processing, it sends test messages to multiple monitoring nodes for transmission.
  • the test message includes a plurality of test sub-messages, and each test sub-message carries first identification information, and the first identification information is used to identify the subsystem to be tested.
  • the test sub-message is used to instruct the monitoring node to execute the test sub-message according to the first identification information, where the monitoring node is a monitoring node set in the subsystem to be tested identified by the first identification information.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem to be tested, including: time-sharing multiplexing the first monitoring implementation unit to obtain the writing of the bus of the subsystem to be tested The information of the address channel, the write data channel and the write response channel; and the time-division multiplexed second monitoring implementation unit obtains the information of the read address channel and the read data channel of the bus of the sub-system under test; wherein, the first monitoring implementation unit and the second monitoring implementation unit The second monitoring implementation unit is set in the monitoring node.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the address channel, data channel, and response of the bus of the subsystem under test
  • the trigger sequence of the channel among them, the address channel includes the write address channel and the read address channel, the data channel includes the write data channel and the read data channel, and the response channel includes the write response channel; the trigger sequence of the address channel, data channel, and response channel includes: Address channel trigger, support data channel trigger first; or, for data channel trigger, support address channel trigger first; or, for response channel trigger, support address channel and data channel trigger first.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the write address channel and write data channel of the bus of the subsystem under test , The bus handshake information of the write response channel, read address channel, and read data channel within the preset range.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the write address channel and write response channel of the bus of the subsystem under test The difference between the number of successful handshake between the read address channel and the read response channel; the monitoring node is also used to report the silent timeout interrupt when the following preset conditions are met: the difference is non-zero, The time that the difference remains constant exceeds the preset threshold.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem under test, including: instructing the monitoring node to obtain the write address channel and the read address channel of the bus of the subsystem under test Address information within a preset range, where the address information within the preset range is used to indicate OUTSTANDING address information calculated from the current moment.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the subsystem to be tested, and further includes: the test vector is used to instruct the monitoring node to obtain the test information of the subsystem to be tested, and Send the test information to the control module.
  • the test vector is used to instruct the monitoring node to execute the test message and obtain the test information of the sub-system to be tested, and further includes: the test vector is used to instruct to obtain the test information of the sub-system to be tested, and according to the preset Set the frame format to encapsulate the test information, and send the encapsulated test information to the control module.
  • the encapsulated test information carries second identification information, and the second identification information is used to identify the control module.
  • the above-mentioned multiple modules can be implemented by software or hardware. For the latter, it can be implemented in the following way, but not limited to this: the above-mentioned modules are all located in the same processor; or, the above-mentioned multiple modules are respectively in the form of any combination. Located in different processors.
  • a bus monitoring device is also provided, which is applied to a monitoring node.
  • the device is used to implement the above-mentioned embodiments and optional implementation manners, and what has been described will not be repeated.
  • the term "module" can implement a combination of software and/or hardware with predetermined functions.
  • Fig. 13 is a structural block diagram (2) of a bus monitoring device according to an embodiment of the present application.
  • the device includes: a second topology unit configured to set multiple monitoring nodes in the bus, and each monitoring node is set In a sub-system under test in the bus; among them, multiple monitoring nodes are connected in series with a ring topology; the monitoring unit is set to receive and execute test messages to obtain test information of the sub-system under test.
  • the test information of the test subsystem is set as the information of the bus of the sub-system to be tested when the monitoring node is instructed to execute the test message; wherein the test message is sent by the control module to multiple monitoring nodes for transmission according to the acquired test vector.
  • the bus monitoring device in this embodiment since multiple monitoring nodes in the bus can be respectively configured to be set in a sub-system under test in the bus; wherein, a ring is adopted between the multiple monitoring nodes.
  • the topology structure is connected in series; when the control module obtains the test vector and sends a test message to the multiple monitoring nodes for transmission according to the test vector, the monitoring node can execute the test message, and Acquire test information of the subsystem to be tested, where the test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, information about the bus of the subsystem to be tested. Therefore, the bus monitoring device in this embodiment can solve the technical problem in the related art that the chip system cannot perform real-time monitoring of nodes during operation, so as to achieve the effect of real-time monitoring of nodes during the operation of the chip system.
  • control module sends the obtained test vector to multiple monitoring nodes for transmission, including: the control module obtains the test vector, analyzes the test vector to obtain a test message, and sends the test message Documents are transmitted between multiple monitoring nodes.
  • control module sends the obtained test vector to multiple monitoring nodes for transmission, and further includes: the control module obtains the test vector, analyzes the test vector to obtain a test message; according to the test message Generate configuration messages and deliver them to multiple subsystems under test in the bus, where the configuration messages are used to instruct multiple subsystems under test to perform configuration processing according to the configuration messages; multiple subsystems under test After the configuration processing is completed, test packets are sent to multiple monitoring nodes for transmission.
  • the test message includes a plurality of test sub-messages, and each test sub-message carries first identification information, and the first identification information is used to identify the subsystem to be tested; the test sub-messages are used for Instruct the monitoring node to execute the test sub-message according to the first identification information, where the monitoring node is a monitoring node set in the subsystem to be tested identified by the first identification information.
  • receiving and executing the test message to obtain the test information of the sub-system under test includes: time-division multiplexing the first monitoring implementation unit to obtain the write address channel and the write data channel of the bus of the sub-system under test And write response channel information; and time-division multiplexing the second monitoring implementation unit to obtain the read address channel and read data channel information of the bus of the subsystem under test; wherein, the first monitoring implementation unit and the second monitoring implementation unit are both set Among the monitoring nodes.
  • receiving and executing the test message to obtain the test information of the sub-system under test includes: obtaining the trigger sequence of the address channel, data channel, and response channel of the bus of the sub-system under test; where the address channel Including write address channel and read address channel, data channel includes write data channel and read data channel, response channel includes write response channel; trigger sequence of address channel, data channel, response channel includes: for address channel trigger, support data channel trigger first ; Or, for data channel trigger, support address channel trigger first; or, for response channel trigger, support address channel and data channel trigger first.
  • receiving and executing the test message to obtain the test information of the sub-system to be tested includes: obtaining the write address channel, write data channel, write response channel, read address channel, Read the bus handshake information of the data channel within the preset range.
  • receiving and executing the test message to obtain the test information of the subsystem under test includes: obtaining the write address channel of the bus of the subsystem under test and the number of successful handshake times between the write response channel, and read The difference in the number of successful handshake between the address channel and the read response channel.
  • the monitoring node is also used to report the silent timeout interrupt: the difference is non-zero, and the time that the difference remains unchanged exceeds the preset threshold.
  • receiving and executing the test message to obtain the test information of the subsystem under test includes: obtaining the write address channel of the bus of the subsystem under test and the address information of the read address channel within a preset range, Among them, the address information within the preset range is used to indicate the OUTSTANDING address information calculated from the current moment.
  • receiving and executing the test message to obtain the test information of the sub-system to be tested further includes: obtaining the test information of the sub-system to be tested and sending the test information to the control module.
  • receiving and executing the test message to obtain the test information of the sub-system to be tested also includes: obtaining the test information of the sub-system to be tested, and encapsulating the test information according to a preset frame format. The subsequent test information is sent to the control module.
  • the encapsulated test information carries second identification information, and the second identification information is used to identify the control module.
  • the embodiment of the present application also provides a storage medium in which a computer program is stored, and the computer program is configured to execute the steps in any of the foregoing method embodiments when running.
  • the foregoing storage medium may be configured to store a computer program for executing the following steps:
  • multiple monitoring nodes are set in the bus, and each monitoring node is set in a sub-system to be tested in the bus; wherein, the multiple monitoring nodes are connected in series with a ring topology structure.
  • S20 Obtain a test vector, and deliver a test message to multiple monitoring nodes for transmission according to the test vector; where the test vector is used to instruct the monitoring node to execute the test message and obtain test information of the subsystem to be tested, where: The test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, the information of the bus of the subsystem to be tested.
  • the foregoing storage medium may include, but is not limited to: U disk, ROM, RAM, mobile hard disk, magnetic disk, or optical disk, and other media that can store computer programs.
  • the embodiment of the present application also provides a storage medium in which a computer program is stored, and the computer program is configured to execute the steps in any of the foregoing method embodiments when running.
  • the foregoing storage medium may be configured to store a computer program for executing the following steps:
  • multiple monitoring nodes are set in the bus, and each monitoring node is set in a sub-system to be tested in the bus; wherein, the multiple monitoring nodes are connected in series with a ring topology structure.
  • S20 Receive and execute a test message, and obtain test information of the sub-system to be tested.
  • the test information of the sub-system to be tested is used to instruct the monitoring node to execute the test message, the information of the bus of the sub-system to be tested; among them, the test message
  • the control module sends the obtained test vector to multiple monitoring nodes for transmission.
  • the foregoing storage medium may include, but is not limited to: U disk, ROM, RAM, mobile hard disk, magnetic disk, or optical disk and other media that can store computer programs.
  • the embodiment of the present application also provides an electronic device, including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute the steps in any of the foregoing method embodiments.
  • the aforementioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the aforementioned processor, and the input-output device is connected to the aforementioned processor.
  • the foregoing processor may be configured to execute the following steps through a computer program:
  • multiple monitoring nodes are set in the bus, and each monitoring node is set in a sub-system to be tested in the bus; wherein, the multiple monitoring nodes are connected in series with a ring topology structure.
  • S20 Obtain a test vector, and deliver a test message to multiple monitoring nodes for transmission according to the test vector; where the test vector is used to instruct the monitoring node to execute the test message and obtain test information of the subsystem to be tested, where: The test information of the subsystem to be tested is used to instruct the monitoring node to execute the test message, the information of the bus of the subsystem to be tested.
  • the embodiment of the present application also provides an electronic device, including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute the steps in any of the foregoing method embodiments.
  • the aforementioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the aforementioned processor, and the input-output device is connected to the aforementioned processor.
  • the foregoing processor may be configured to execute the following steps through a computer program:
  • multiple monitoring nodes are set in the bus, and each monitoring node is set in a sub-system to be tested in the bus; wherein, the multiple monitoring nodes are connected in series with a ring topology structure.
  • S20 Receive and execute a test message, and obtain test information of the sub-system to be tested.
  • the test information of the sub-system to be tested is used to instruct the monitoring node to execute the test message, the information of the bus of the sub-system to be tested; among them, the test message
  • the control module sends the obtained test vector to multiple monitoring nodes for transmission.
  • the above-mentioned multiple modules or multiple steps of this application can be implemented by a general computing device, and they can be concentrated on a single computing device or distributed among multiple computing devices On the network.
  • the foregoing multiple modules or multiple steps may be implemented by a program code executable by a computing device, so that the foregoing multiple modules or multiple steps may be stored in a storage device and executed by the computing device, and in some In this case, the steps shown or described can be performed in a different order here, or the above-mentioned multiple modules or multiple steps can be respectively made into multiple integrated circuit modules, or the multiple modules or multiple steps can be Multiple modules or steps are made into a single integrated circuit module to achieve. In this way, this application is not limited to any designated combination of hardware and software.

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Abstract

一种总线监控装置及方法、存储介质、电子装置，所述总线监控装置包括：多个监控模块(102)，设置为设置在总线之中，每一个监控模块(102)配置为设置在总线中的一个待测子系统之中；其中，多个监控模块(102)之间采用环形拓扑结构进行串接；控制模块(104)，设置为获取测试向量，并根据测试向量下发测试报文至多个监控模块(102)中的一个监控模块(102)以在多个监控模块(102)之间传输测试报文；监控模块(102)设置为执行测试报文，并获取待测子系统的测试信息，其中，待测子系统的测试信息用于指示在监控模块(102)执行测试报文的情况下，待测子系统的总线的信息。

Description

总线监控装置及方法、存储介质、电子装置
本申请要求在2019年06月28日提交中国专利局、申请号为201910578843.2的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子领域，例如，涉及一种总线监控装置及方法、存储介质、电子装置。
背景技术
随着通信产品应用需求的更新换代，芯片系统的集成度越来越高，芯片系统内部的总线的复杂度也越来越高，对于系统内总线的调试和定位一直是困扰芯片前端设计、电子设计自动化(Electronics Design Automation，EDA)、现场可编程门阵列(Field－Programmable Gate Array，FPGA)、硬件加速器验证、芯片软件开发及调试等等的主要问题。
相关技术中，业界已经开发出的总线监控技术主要原理是选择记录总线节点的所有行为，然后通过组包、压缩后形成数据流，送入芯片系统内部的缓存进行存储，或者通过芯片系统的端口送到片外的存储模块进行存储，该功能业界一般称为追踪(Trace)方法，类似于示波器做信号采样存储，然后事后恢复出来以供调试人员分析。业界大的芯片公司，一般都采用自行开发的总线调试系统，包括工具链等等，例如高级精简指令集机器(Advanced RISC Machines，ARM)公司定义了用于总线的调试组件Coresight。上述ARM公司的总线调试技术(调试组件)仍与相关技术中的监控方式类似，在原理上不能支持实时定位问题，而是属于事后的被动调试方式，具体而言，在芯片系统运行中出现其他问题后，测试人员可以通过查看总线的历史记录，在事后进行分析，从而定位出哪里出现了问题，其分析定位的工作量和要求都比较高。
此外，由于上述ARM公司的总线调试技术需要使用ARM公司的工具链支持，故调试方需要付费购买ARM公司的产品，而不能支持自行定位新的追踪内容，无法独立测试总线上每个硬件单元，灵活性较差，不能快速定位总线出现问题的节点，降低了工作效率。
针对相关技术中，芯片系统无法在运行过程中对于节点进行实时监控的技术问题，相关技术中暂未提出解决方案。
发明内容
本申请实施例提供了一种总线监控装置及方法、存储介质、电子装置，以解决相关技术中，芯片系统无法在运行过程中对于节点进行实时监控的技术问题。
根据本申请的一个实施例，提供了一种总线监控装置，包括：
多个监控模块，设置为设置在总线之中，每一个监控模块配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控模块之间采用环形拓扑结构进行串接；
控制模块，设置为获取测试向量，并根据所述测试向量下发测试报文至所述多个监控模块中的一个监控模块以在所述多个监控模块之间传输所述测试报文；
所述监控模块设置为执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息设置为指示在所述监控模块执行所述测试报文的情况下，所述待测子系统的总线的信息。
根据本申请的另一个实施例，还提供了一种总线监控方法，应用于控制模块，包括：
在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文；
其中，所述测试向量用于指示所述监控节点执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息。
根据本申请的另一个实施例，还提供了一种总线监控方法，应用于监控节点，包括：
在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
接收并执行测试报文，获取所述待测子系统的测试信息，所述待测子系统的所述测试信息用于指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息；
其中，所述测试报文由控制模块根据获取的测试向量下发至所述多个监控节点中的一个监控节点以在多个监控节点之间传输所述测试报文。
根据本申请的另一个实施例，还提供了一种总线监控装置，应用于控制模块，包括：
拓扑单元，设置为在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
控制单元，设置为获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文；
其中，所述测试向量设置为指示所述监控节点执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息。
根据本申请的另一个实施例，还提供了一种总线监控装置，应用于监控节点，包括：
拓扑单元，设置为在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
监控单元，设置为接收并执行测试报文，获取所述待测子系统的测试信息，所述待测子系统的所述测试信息设置为指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息；
其中，所述测试报文由控制模块根据获取的测试向量下发至所述多个监控节点之间进行传输。
根据本申请的又一个实施例，还提供了一种存储介质，所述存储介质中存储有计算机程序，所述计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
根据本申请的又一个实施例，还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
附图说明
此处所说明的附图用来提供对本申请的理解，构成本申请的一部分，本申请的示意性实施例及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1是根据本申请实施例提供的总线监控装置的功能示意图(一)；
图2是根据本申请实施例提供的监控模块的结构框图；
图3是根据本申请实施例提供的控制模块的结构框图；
图4是根据本申请实施例提供的总线监控装置的功能示意图(二)；
图5是根据本申请实施例提供的总线监控方法的流程图(一)；
图6是根据本申请实施例提供的总线监控方法的流程图(二)；
图7是根据本申请实施例提供的场景实施例一的流程图；
图8是根据本申请实施例提供的场景实施例二的流程图；
图9是根据本申请实施例提供的场景实施例三的流程图；
图10是根据本申请实施例提供的场景实施例四的流程图；
图11是根据本申请实施例提供的总线监控方法的流程图(三)；
图12是根据本申请实施例提供的总线监控装置的结构框图(一)；
图13是根据本申请实施例提供的总线监控方法的结构框图(二)。
具体实施方式
下文中将参考附图并结合实施例来说明本申请。
需要说明的是，本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
通常而言，芯片系统内的总线协议一般都是基于多通道处理，例如在ARM公司的先进可扩展接口(Advanced eXtensible Interface，AXI)总线中具有5个通道，分别为读地址通道(AR)、读数据通道(R)、写地址通道(AW)、写数据通道(W)、写响应通道(B)；在本申请实施例中，以ARM公司的AXI总线来进行说明。
实施例1
本实施例中提供了一种总线监控装置，图1是根据本申请实施例提供的总线监控装置的功能示意图(一)，如图1所示，总线监控装置包括：
多个监控模块102，设置为设置在总线之中，每一个监控模块102分别配置为设置在总线中的一个待测子系统之中；其中，多个监控模块102之间采用环形拓扑结构进行串接；控制模块104，设置为获取测试向量，并根据测试向量下发测试报文至多个监控模块102之间进行传输；监控模块102设置为执行测试报文，并获取待测子系统的测试信息，其中，待测子系统的测试信息用于指示监控模块执行测试报文时，待测子系统的总线的信息。
通过本实施例中的总线监控装置，由于总线监控装置中包括设置在总线之中的多个监控模块，每一个所述监控模块分别配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控模块之间采用环形拓扑结构进行串接；总线监控装置通过控制模块以获取测试向量，并根据所述测试向量下发测试报文至所述多个监控模块之间进行传输；所述监控模块可执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示所述监控模块执行所述测试报文时，所述待测子系统的总线的信息。因此，本实施例中的总线监控装置可以解决相关技术中芯片系统无法在运行过程中对于节点进行实时监控的技术问题，以达到可在芯片系统运行过程中对于节点进行实时监控的效果。
本实施例中的总线监控装置，可在总线中多个待测子系统运行过程中，通过监控模块执行测试报文的方式以获取待测子系统的总线的信息的方式，实现对于多个待测子系统的实时监控；从而一方面可令调试人员在总线运行出现问 题时，可快速定位该问题所在的节点(即待测子系统)，提高了定位、解决总线问题的效率；另一方面，由于本实施例中的总线装置无需按照相关技术中，对于待测子系统的全部动作进行记录的追踪监控方式，故本实施例可有效的减少为实施监控而设置的逻辑处理资源和存储资源，以降低系统成本或压力。
本实施例中的多个监控模块之间相互独立设置，因此，可有效提升系统中不同待测子系统的独立可测试性，降低多个待测子系统之间的耦合；在系统内的硬件单元出现改动时，本实施例中的总线监控装置亦可通过新增监控模块，并将新增监控模块连接至原有的拓扑结构中，以实现对于系统内的待测子系统的自由配置，以提高监控的灵活性。
本实施例中多个监控模块构成的环形拓扑所构成的网路可称为令牌环网路，多个监控模块之间的连接方式即为多个监控模块之间首尾串联连接。
在一可选实施例中，控制模块104设置为根据测试向量下发测试报文至多个监控模块之间进行传输，包括：控制模块设置为获取测试向量，对测试向量进行解析以得到测试报文，并下发测试报文至多个监控模块之间进行传输。
本实施例中的测试报文采用了一种指定帧格式的数据报文，该数据报文包括：包头信息、指令身份标识号(Identity，ID)信息、操作命令信息、指令地址信息、报文长度信息及指令数据信息。
在一可选实施例中，控制模块104设置为根据测试向量下发测试报文至多个监控模块之间进行传输，还包括：控制模块设置为获取测试向量，对测试向量进行解析以得到测试报文；根据测试报文生成配置报文，并下发配置报文至总线中的多个待测子系统，其中，配置报文用于指示多个待测子系统根据配置报文进行配置处理；在多个待测子系统完成配置处理后，下发测试报文至多个监控模块之间进行传输。
配置报文用以令多个待测子系统按照测试向量中的要求进行配置，例如将待测子系统中的相应寄存器开启，或根据测试向量的要求在寄存器内设置对应的匹配值，等等。
在一可选实施例中，测试报文包括多个测试子报文，每一个测试子报文携带有第一标识信息，第一标识信息用于标识待测子系统；测试子报文用于根据第一标识信息指示监控模块执行测试子报文，其中，监控模块为设置在第一标 识信息标识的待测子系统之中的监控模块。
测试报文中包含的多个测试子报文分别用于指示设置在不同待测子系统中的监控模块以执行对应的测试子报文，上述测试子报文中的第一标识信息通常可以为待测子系统的地址信息，但不限于此，任何可以标识不同的待测子系统的标识信息均可作为第一标识信息，例如待测设备的ID，或者将多个标识信息综合运用，本申请对此不做限定。
在控制模块向多个监测模块传输测试报文的过程中，无论是写或读操作都为一个32bits的数据报文，第一标识信息即携带在该数据报文中。对于写操作而言，控制模块将按照设定的帧格式封装的测试报文发送至多个监控模块之间，该测试报文包括ID号，写控制信号，待测子系统地址，待测子系统的寄存器地址，以及需要写的数据，其中，待测子系统地址即可指示第一标识信息，以标识待测子系统的地址。当任意一个监控模块收到上述测试报文时，即可在多个监控模块构成的令牌环网路之间进行传输。每个监控模块接收到测试报文后，即检测各自对应的待测子系统的地址与数据中的待测子系统的地址是否匹配，如果不匹配，则以串行形式继续往下一个监控模块传输，供下一个监控模块处理；如果匹配一致，则执行该地址对应的写操作之后，仍然将原数据原封不动地以串行形式继续往下一个监控模块传输；若所有的待测子系统的地址都不匹配，原数据也会原封不动地传输回测试控制模块。
本实施例中的监控模块102通常可由监控连接单元1022以及监控实施单元1024构成，其中，监控连接单元1022设置为实现监控模块与待测子系统之间的连接，以及对于待测子系统的测试信息进行读取、封装与传输等；监控实施单元1024设置为实施对待测子系统的监控。上述监控模块对于测试报文的接收可由监控连接单元实现，而对于待测子系统的监控，即检测各自对应的待测子系统的地址与数据中的待测子系统的地址是否匹配即可由监控实施单元1024实现。图2是根据本申请实施例提供的监控模块的结构框图，上述监控模块104中的内部功能结构即如图2所示。
在一可选实施例中，监控模块包括第一监控实施单元以及第二监控实施单元，第一监控实施单元设置为获取待测子系统的第一测试信息，第二监控实施单元设置为获取待测子系统的第二测试信息；其中，待测子系统的第一测试信息包括待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；待 测子系统的第二测试信息包括待测子系统的总线的读地址通道及读数据通道的信息。
上述第一监控实施单元以及第二监控实施单元的设置可令每一个待测子系统的总线信息中的写地址通道、写数据通道及写响应通道分时复用第一监控实施单元，同时令每一个待测子系统的总线信息中的读地址通道及读数据通道的信息分时复用第二监控实施单元，以此在保证监控模块对于上述待测子系统的总线信息的监控的同时，节省了3个通道的实施单元，以节省逻辑处理资源和存储资源。
本实施例中的监控模块通常可由监控连接单元以及监控实施单元构成，其中，监控连接单元设置为实现监控模块与待测子系统之间的连接，以及对于待测子系统的测试信息进行读取、封装与传输等；监控实施单元设置为实施对待测子系统的监控。上述监控模块对于测试报文的接收可由监控连接单元实现，而对于待测子系统的监控，即检测各自对应的待测子系统的地址与数据中的待测子系统的地址是否匹配即可由监控实施单元实现。
在一可选实施例中，监控模块设置为执行测试报文，并获取待测子系统的测试信息，包括：监控模块设置为在待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件的情形下，获取待测子系统的测试信息；其中，待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件包括以下至少之一：当地址通道作为监控模块的匹配对象时，触发顺序条件为数据通道优先于地址通道触发；当数据通道作为监控模块的匹配对象时，触发顺序条件为地址通道优先于数据通道触发；当响应通道作为监控模块的匹配对象时，触发顺序条件为地址通道以及数据通道均优先于响应通道触发。
上述监控模块可在待测子系统的对应通道满足预设的触发顺序时，获取待测子系统在对应通道成功握手的信息，即测试信息；监控模块的监控对象，即匹配对象可以为一个，也可以为多个。
在一可选实施例中，监控模块设置为执行测试报文，并获取待测子系统的测试信息，包括：监控模块设置为获取待测子系统的总线的写地址通道、写数据通道、写响应通道、读地址通道、读数据通道在预设范围内的总线握手信息。
上述预设范围可以指示不同时刻的总线握手信息，例如最后一次总线握手信息。
在一可选实施例中，监控模块设置为执行测试报文，并获取待测子系统的测试信息，包括：监控模块设置为获取待测子系统的总线的写地址通道以及写响应通道之间成功握手的次数与读地址通道以及读响应通道之间成功握手的次数的差值；在满足以下预设条件的情形下，监控模块还设置为上报静默超时中断：差值非零，差值保持不变的时间超过预设阈值。
在一可选实施例中，监控模块设置为执行测试报文，并获取待测子系统的测试信息，包括：监控模块设置为获取待测子系统的总线的写地址通道以及读地址通道在预设范围内的地址信息，其中，预设范围内的地址信息用于指示当前时刻起计算的乱序传输OUTSTANDING笔地址信息。
在一可选实施例中，监控模块设置为获取待测子系统的测试信息，包括：监控模块设置为获取待测子系统的测试信息，并将测试信息发送至控制模块。
在一可选实施例中，监控模块设置为获取待测子系统的测试信息，还包括：监控模块设置为获取待测子系统的测试信息，并按照预设帧格式对测试信息进行封装，将封装后的测试信息发送至控制模块。
在一可选实施例中，封装后的测试信息中携带有第二标识信息，第二标识信息用于标识控制模块。
上述第二标识信息可为控制模块的ID号，每一个控制模块具有唯一的ID号，故基于此可实现对控制模块的识别。
在监控模块获取到待测子系统的测试信息，并进行封装以发送至控制模块时，可在该封装过程中添加上述控制模块的ID号。控制模块在接收到测试信息后即会检测测试信息中携带的ID号，如果反馈的数据中的ID号与测试信息中的控制模块的ID号匹配，则存储该反馈的数据，如果不匹配，将反馈的数据原封不动地以串行形式传输出去。
本实施例中的控制模块104通常可由测试向量的输入单元1042、测试向量的解析执行单元1044以及测试向量的输出单元1046构成，其中，测试向量的输入单元设置为接收测试向量，并将该测试向量存储到专用的RAM或者总线互联上的任意地址空间中；测试向量的解析执行单元设置为从上述存储空间中读 取测试向量，按照执行与解析，以及下发测试报文，并将反馈的测试信息写入或读入到指定的地址空间中；测试结果的输出单元，设置为将上述存放在指定的地址空间中的测试信息发送至外部，如测试主机中。图3是根据本申请实施例提供的控制模块的结构框图，上述控制模块中的内部功能结构如图3所示。
此外，控制模块还需要能检测到多个监控模块向控制模块写的数据，根据读写控制信号以及反馈信号，判断是自身往外写数据，还是读数据；根据待测子系统的地址和待测子系统的寄存器地址，可以判断此操作的正确性，以及可以正确提取数据；根据返回的反馈信号值，判断是否正确完成了操作。
读操作：完成一次读操作，正常情况下，需要进行两次读操作，第一次给监控模块输入相应的待测子系统的设备号、寄存器地址、读控制信号等，返回反馈信号值为2’b10，此时读回的16bits数据无效；第二次输入同样的32bits数值，返回反馈信号值为2’b11，则此时完成了一次读操作，读回的16bits数值，即为所需要的数据值；如果第一次读回的数据中的反馈为2’b01，表示存储空间满，则装置需要如下操作：判断是否已经读过数据，而没有进行完相应的第二次操作，如果是的话，则完成读操作；如果没有，则有其他的装置在读取此待测子系统的寄存器数据，则本装置需要等待，重复发送读数据，直到返回反馈信号为2’b10，则代表读操作正在进行，下次可读回数据。
写操作：完成一次写操作，和读操作不同，只需要进行一次即可；通过装置的异步收发传输模块，按照指定的32bits数据格式写入相应输入，则内部通过串行总线，往监控模块输入相应的待测子系统的设备号、寄存器地址、写控制信号等，返回的反馈信号值为2’b11；写操作时，反馈信号无2’b10以及2’b01情况。
对于写和读操作，如果回复反馈信号数值为2’b00，则代表所输入的监控模块的设备号和总线中的所有待测子系统的设备号不匹配，需要检查输入的监控模块的设备号。
在一可选实施例中，图4是根据本申请实施例提供的总线监控装置的功能示意图(二)，如图4所示，装置还包括：测试主机106，设置为生成预设的测试向量；异步收发传输器108，设置为将测试向量发送至控制模块，以及接收控制模块的发送的测试信息。
实施例2
本实施例还提供了一种总线监控方法，应用于控制模块，图5是根据本申请实施例提供的总线监控方法的流程图(一)，如图5所示，该总线监控方法包括：
S202，在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接。
S204，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输；其中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，其中，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息。
通过本实施例中的总线监控方法，由于总线之中的多个监控节点可分别配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；在控制模块获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点之间进行传输时，所述监控节点可执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示所述监控节点执行所述测试报文时，所述待测子系统的总线的信息。因此，本实施例中的总线监控方法可以解决相关技术中芯片系统无法在运行过程中对于节点进行实时监控的技术问题，以达到可在芯片系统运行过程中对于节点进行实时监控的效果。
本实施例中的总线监控方法，可在总线中多个待测子系统运行过程中，通过监控节点执行测试报文的方式以获取待测子系统的总线的信息的方式，实现对于多个待测子系统的实时监控；从而一方面可令调试人员在总线运行出现问题时，可快速定位该问题所在的节点即待测子系统，提高了定位、解决总线问题的效率；另一方面，由于本实施例中的总线装置无需按照相关技术中，对于待测子系统的全部动作进行记录的追踪监控方式，故本实施例可有效的减少为实施监控而设置的逻辑处理资源和存储资源，以降低系统成本或压力。
本实施例中的多个监控节点之间相互独立设置，因此，可有效提升系统中不同待测子系统的独立可测试性，降低各个待测子系统之间的耦合；在系统内的硬件单元出现改动时，本实施例中的总线监控装置亦可通过新增监控节点， 并将其连接至原有的拓扑结构中，以实现对于系统内的待测子系统的自由配置，以提高监控的灵活性。
本实施例中多个监控节点构成的环形拓扑所构成的网路可称为令牌环网路，多个监控节点之间的连接方式即为多个监控节点之间首尾串联连接。
在一实施例中，上述S204，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输，包括：获取测试向量，对测试向量进行解析以得到测试报文，并下发测试报文至多个监控节点之间进行传输。
本实施例中的测试报文采用了一种指定帧格式的数据报文，该数据报文包括：包头信息、指令身份标识号(Identity，ID)信息、操作命令信息、指令地址信息、报文长度信息及指令数据信息。
在一实施例中，上述S204，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输，还包括：获取测试向量，对测试向量进行解析以得到测试报文；根据测试报文生成配置报文，并下发配置报文至总线中的多个待测子系统，其中，配置报文用于指示多个待测子系统根据配置报文进行配置处理；在多个待测子系统完成配置处理后，下发测试报文至多个监控节点之间进行传输。
配置报文用以令多个待测子系统的按照测试向量中的要求进行配置，例如将待测子系统中的相应寄存器开启，或根据测试向量的要求在寄存器内设置对应的匹配值，等等。
在一可选实施例中，测试报文包括多个测试子报文，每一个测试子报文携带有第一标识信息，第一标识信息用于标识待测子系统；测试子报文用于根据第一标识信息指示监控节点执行测试子报文，其中，监控节点为设置在第一标识信息标识的待测子系统之中的监控节点。
测试报文中包含的多个测试子报文分别用于指示设置在不同待测子系统中的监控单元以执行对应的测试子报文，上述测试子报文中的第一标识信息通常可以为待测子系统的地址信息，但不限于此，任何可以标识不同的待测子系统的标识信息均可作为第一标识信息，本申请对此不作限定。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：分时复用第一监控实施单元获取待 测子系统的总线的写地址通道、写数据通道及写响应通道的信息；以及分时复用第二监控实施单元获取待测子系统的总线的读地址通道及读数据通道的信息；其中，第一监控实施单元与第二监控实施单元均设置在监控节点之中。
上述第一监控实施单元以及第二监控实施单元的设置可令每一个待测子系统的总线信息中的写地址通道、写数据通道及写响应通道分时复用第一监控实施单元，同时令每一个待测子系统的总线信息中的读地址通道及读数据通道的信息分时复用第二监控实施单元，以此在保证监控节点对于上述待测子系统的总线信息的监控的同时，节省了3个通道的实施单元，以节省逻辑处理资源和存储资源。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点在待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件的情形下，获取待测子系统的测试信息；其中，待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件包括以下至少之一：当地址通道作为监控节点的匹配对象时，触发顺序条件为数据通道优先于地址通道触发；当数据通道作为监控节点的匹配对象时，触发顺序条件为地址通道优先于数据通道触发；当响应通道作为监控节点的匹配对象时，触发顺序条件为地址通道以及数据通道均优先于响应通道触发。
上述监控模块即可在待测子系统的对应通道满足预设的触发顺序时，获取待测子系统在对应通道成功握手的信息，即测试信息；监控模块的监控对象，即匹配对象可以为一个，也可以为多个。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总线的写地址通道、写数据通道、写响应通道、读地址通道、读数据通道在预设范围内的总线握手信息。
上述预设范围可以指示不同时刻的总线握手信息，例如最后一次总线握手信息。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总 线的写地址通道以及写响应通道之间成功握手的次数，与读地址通道以及读响应通道之间成功握手的次数的差值；在满足以下预设条件的情形下，监控节点还用于上报静默超时中断：差值非零，差值保持不变的时间超过预设阈值。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总线的写地址通道以及读地址通道在预设范围内的地址信息，其中，预设范围内的地址信息用于指示当前时刻起计算的OUTSTANDING笔地址信息。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，还包括：测试向量用于指示监控节点获取待测子系统的测试信息，并将测试信息发送至控制模块。
在一可选实施例中，上述S204中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，还包括：测试向量用于指示获取待测子系统的测试信息，并按照预设帧格式对测试信息进行封装，将封装后的测试信息发送至控制模块。
在一可选实施例中，封装后的测试信息中携带有第二标识信息，第二标识信息用于标识控制模块。
上述第二标识信息可为控制模块的ID号，每一个控制模块具有唯一的ID号，故基于此可实现对控制模块的识别。
为了进一步说明本实施例中的总线监控方法，以下以采用本实施例中的总线监控方法进行总线监控的过程进行说明，图6是根据本申请实施例提供的总线监控方法的流程图(二)，如图6所示，方法包括：
S3010，接收测试主机发送的预先配置的测试向量。
接收测试主机发送来的预先配置的测试向量，预先配置的测试向量里面包含有针对总线进行测试的测试任务，即通过测试任务能够实时获取到总线的测试情况及状态，达到了解总线状态的目的；可以根据实际的测试任务来事先设置测试向量。
S3020，解析预先配置的测试向量，得到测试报文。
解析接收到的预先配置的测试向量，完成测试向量的配置过程，最终得到 测试报文；该测试报文为一种指定帧格式的数据报文，该测试报文包括：包头信息、指令ID信息、操作命令信息、指令地址信息、报文长度信息及指令数据信息。
S3030，在总线上设置监控节点的令牌环网路。
在总线上设置监控节点的令牌环网路，其中，监控节点的令牌环网路上包括有至少两个监控节点，每个监控节点的首尾按照环形拓扑串联，形成令牌环网路，每个监控节点设置在总线上的一个待测试节点上。
将测试任务中的总线上的待测试节点选出，针对每个待测试节点对应设置一个监控节点，即监控节点的数量与待测试节点的数量相同，每个监控节点负责自己的待测试节点的测试任务。
S3040，将测试报文发送至令牌环网路，测试报文指示每个监控节点执行测试报文。
装置将测试报文发送至令牌环网路上的每个监控节点；测试报文指示每个监控节点执行测试报文中与待测试节点的设备地址信息对应的部分。
例如，装置中的控制模块写或读都为32比特(bit)数据，整个总线上的待测试节点都有独立且唯一的设备号，控制模块有唯一的ID号。
在执行写操作的情况下，控制模块按照指定格式，发送一个写操作32bits数据到令牌环网路的串行总线上，包括ID号，写控制信号，待测试节点的地址，待测试节点的寄存器地址，以及需要写的数据。
当每个监控节点接收到数据后，检测各自对应的待测试节点的地址与数据中的待测试节点的地址是否匹配，如果不匹配，则以串行形式继续往下一个监控节点传输，供下一个监控节点处理；如果匹配一致，则进行相应的写操作之后，仍然将原数据原封不动地以串行形式继续往下一个监控节点传输；若所有的待测试节点的地址都不匹配，原数据也会原封不动地传输回测试控制模块。
控制模块在接收到反馈的数据后，会检测ID号，如果反馈的数据中的ID号与控制模块的ID号匹配，则存储该反馈的数据，如果不匹配，将反馈的数据原封不动地以串行形式传输出去。
S3050，在每个监控节点执行测试报文时，获取每个待测试节点上的总线的 信息。
装置在每个监控节点执行测试报文时，获取每个待测试节点上的总线的信息。例如，装置的控制模块需要能够检测到每个监控节点向装置写的数据，根据读写控制信号以及反馈信号，判断是自身往外写数据，还是读数据；根据待测试节点的地址和待测试节点的寄存器地址，可以判断此操作的正确性，以及可以正确提取数据；根据返回的反馈信号值，判断是否正确完成了操作。
读操作：完成一次读操作，正常情况下，需要进行两次读操作，第一次给监控节点输入相应的待监测节点的设备号、寄存器地址、读控制信号等，返回反馈信号值为2’b10，此时读回的16bits数据无效；第二次输入同样的32bits数值，返回反馈信号值为2’b11，则此时完成了一次读操作，读回的16bits数值，即为所需要的数据值；如果第一次读回的数据中的反馈为2’b01，表示存储空间满，则装置需要如下操作：判断是否已经读过数据，而没有进行完相应的第二次操作，如果是的话，则完成读操作；如果没有，则有其他的装置在读取此待监测节点的寄存器数据，则本装置需要等待，重复发送读数据，直到返回反馈信号为2’b10，则代表读操作正在进行，下次可读回数据。
写操作：完成一次写操作，和读操作不同，只需要进行一次即可；通过装置的异步收发传输模块，按照指定的32bits数据格式写入相应输入，则内部通过串行总线，往监控节点输入相应的待监测节点的设备号、寄存器地址、写控制信号等，返回的反馈信号值为2’b11；写操作时，反馈信号无2’b10以及2’b01情况。
对于写和读操作，如果回复反馈信号数值为2’b00，则代表所输入的监控节点的设备号和总线中的所有待监测节点的设备号不匹配，需要检查输入的监控节点的设备号。
另外，在获取每个待测试节点上的总线的信息的情况下，可以利用分时复用技术来获取，在一实施例中，分时复用每个监控节点中的第一监控实施单元获取每个待测试节点上的总线的写地址通道、写数据通道及写响应通道的信息，同时，分时复用每个监控节点中的第二监控实施单元获取每个待测试节点上的总线的读地址通道及读数据通道的信息；与每个通道使用一个监控实施单元相比，这样就节省了三个监控实施单元的逻辑处理资源和存储资源；利用分时复 用技术可以充分节省硬件资源，对硬件资源进行高度复用，针对逻辑处理资源和存储资源可以高度复用。
在根据测试任务的不同，针对获取每个待测试节点上的总线的信息的内容也不同，如下所示：
第一种情况：
在满足预设的触发条件下，获取每个待测试节点上的总线的写地址通道、写数据通道、写响应通道、读地址通道及读数据通道在满足触发条件时刻的总线信息；其中，获取触发条件包括：采用读、写通道的复用，并支持分地址、数据及响应三个通道之间的组合顺序的设置的触发条件；支持分地址、数据及响应三个通道之间的组合顺序的设置，包括：对于地址通道触发，支持数据通道先触发的设置；对于数据通道触发，支持地址通道先触发的设置；对于响应通道触发，支持地址通道及数据通道先触发的设置。
第二种情况：
获取每个待测试节点上的总线的写地址通道、写数据通道、写响应通道、读地址通道及读数据通道的最后一次握手信息。
第三种情况：
获取每个待测试节点上的总线的写地址通道及写响应通道的握手超时中断报警信息；获取每个待测试节点上的总线的读地址通道及读响应通道的握手超时中断报警信息；获取每个待测试节点上的总线的写地址通道和写响应通道成功握手次数的差值信息，并获取每个待测试节点上的总线的读地址通道和读响应通道成功握手次数的差值信息。
第四种情况：
获取每个待测试节点上的总线的写地址通道及读地址通道的最新OUTSTANDING笔地址信息。
上述四种情况的监控方式下文通过厂家实施例进行说明。
S3060，将每个待测试节点上的总线的信息组包成固定帧格式的报文。
装置将每个待测试节点上的总线的信息组包成固定帧格式的报文。
S3070，将固定的帧格式的报文上报至测试主机。
装置将固定的帧格式的报文上报至测试主机，供测试主机分析和存储，实时监测总线传输是否正常。
在本实施例的上述总线监控方法中，为说明监控节点对于每个待测子系统的监控过程，以下采用多个监控场景实施例进行说明：
场景实施例一：
图7是根据本申请实施例提供的场景实施例一的流程图，如图7所示，本场景实施例的方法以获取总线的写地址通道数据，设置地址为匹配项，单次触发为例来说明如何监控总线的，步骤如下所示：
S4010、配置全局测试开关，测试功能打开。
S4020、配置使能总线写通道统计寄存器。
S4030、配置打开地址通道单次触发使能开关。
S4040、配置存储寄存器用于存储数据。
S4050、配置ID适用于匹配地址通道选择寄存器。
S4060、配置采样时间寄存器用于记录地址通道的采样时间。
S4070、配置地址掩膜寄存器用于对地址进行掩膜匹配。
S4080、配置匹配地址寄存器为采样匹配值。
S4090、配置匹配地址掩膜寄存器为采样匹配值。
S4100、对地址匹配成功的寄存器清零。
S4110、判断地址匹配是否成功，若地址匹配不成功，则执行步骤S4120；若地址匹配成功，则执行步骤S4130。
S4120、继续读取该寄存器，直到地址匹配成功为止。
S4130、读取地址匹配成功的寄存器的值。
S4140、读取写地址通道的相关数据信息，该相关数据信息包括：握手时间信息、写地址ID信息、写地址信息、写猝发长度信息、猝发大小信息及猝发类型信息。
场景实施例二：
图8是根据本申请实施例提供的场景实施例二的流程图，如图8所示，本场景实施例的方法以监控总线的5个通道为例来说明如何监控总线的，步骤如下所示：
S5010、上电后默认启动监控，不设置任何匹配条件实时抓取总线的握手信息。
写地址通道的握手信息包括：握手时间信息、写地址ID信息、写地址信息、写猝发长度信息、猝发大小信息及猝发类型信息。
写数据通道握手信息包括：写数据ID信息、写数据开关值信息及写数据值信息。
写响应通道的握手信息包括：写响应ID值信息及写响应值信息。
读地址通道的握手信息包括：握手时间信息、读地址ID值信息、读地址信息、读猝发长度信息、猝发大小信息及猝发类型信息。
读数据通道的握手信息包括：读数据ID值信息、读数据值信息及读响应值信息。
S5020、将每个通道实时抓取到的握手信息组包成固定的帧格式后，传送给外部的测试主机。
S5030、外部的测试主机，进行数据分析，实时监测总线传输是否正常。
场景实施例三：
图9是根据本申请实施例提供的场景实施例三的流程图，如图9所示，本场景实施例的方法以监控总线的地址通道为例来说明如何监控总线的，步骤如下所示：
S6010、上电后默认启动监控。
S6020、分别记录写地址通道和写响应通道、读地址通道和读响应通道成功握手次数的差值。
S6030、确定出握手次数的差值如果非零且保持不变、时间(静默状态)超过门限值时，拉起静默超时中断。
步骤6040、将静默超时中断拉起的监控节点的监控功能冻结，将寄存器清 零并保持现场，对后续的总线任何动作不作任何监控。
步骤6050、将静默超时计数器清零，确保中断不会一直拉高。
步骤6060、确定出总线无法恢复，总线需要重新复位启动。
场景实施例四
图10是根据本申请实施例提供的场景实施例四的流程图，如图10所示，本场景实施例的方法以监控总线的写地址通道和/或读地址通道为例来说明如何监控总线的，步骤如下所示：
步骤7010、将写地址通道和/或读地址通道的信息(信息包括：地址信息、ID信息、猝发长度信息、猝发大小信息及猝发类型信息)存入一个深度等于OUTSTANDING值的写地址先入先出队列(first input first output，fifo)和/或读地址fifo；其中写地址通道对应写地址fifo，读地址通道对应读地址fifo。
步骤7020、读取写地址通道和/或读地址通道信息前，先查询写地址fifo和/或读地址fifo的状态。
步骤7030、如果fifo非空，通过写寄存器操作拉高寄存器写地址fifo和/或读地址fifo的读使能信号，将信息从fifo取出存放至5(3+1+1)个缓存寄存器，再将5个缓存寄存器值读走。
步骤7040、再继续通过写寄存器操作拉高寄存器写地址fifo和/或读地址fifo的读使能信号，将下一笔信息从fifo取出存放至5(3+1+1)个缓存寄存器，将5个缓存寄存器值读走。
步骤7050、直到写地址fifo和/或读地址fifo里面的全部的信息被读出、取走，此时fifo状态变为空。
上述5(3+1+1)即用于指示地址信息、ID信息、猝发长度信息、猝发大小信息及猝发类型信息五个信息。
通过以上的实施方式的描述，本领域的技术人员可以了解到根据上述实施例的方法可借助软件加通用硬件平台的方式来实现，当然也可以通过硬件来实现。基于这样的理解，本申请的技术方案可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如只读存储器(Read-Only Memory，ROM)/随机存取存储器(Random Access Memory，RAM)、磁碟、光盘)中，包括多 个指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本申请多个实施例所述的方法。
实施例3
本实施例还提供了一种总线监控方法，应用于监控节点，图11是根据本申请实施例提供的总线监控方法的流程图(三)，如图11所示，该总线监控方法包括：
S802，在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接。
S804，接收并执行测试报文，获取待测子系统的测试信息，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息；其中，测试报文由控制模块根据获取的测试向量下发至多个监控节点之间进行传输。
通过本实施例中的总线监控方法，由于总线之中的多个监控节点可分别配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；在控制模块获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点之间进行传输时，所述监控节点可执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示所述监控节点执行所述测试报文时，所述待测子系统的总线的信息。因此，本实施例中的总线监控方法可以解决相关技术中芯片系统无法在运行过程中对于节点进行实时监控的技术问题，以达到可在芯片系统运行过程中对于节点进行实时监控的效果。
本实施例中的总线监控方法的其余技术方案均与实施例2中的总线监控方法的方案对应，故在此不再赘述。
在一可选实施例中，S804中，控制模块根据获取的测试向量下发至多个监控节点之间进行传输，包括：
控制模块获取测试向量，对测试向量进行解析以得到测试报文，并下发测试报文至多个监控节点之间进行传输。
在一可选实施例中，S804中，控制模块根据获取的测试向量下发至多个监控节点之间进行传输，还包括：控制模块获取测试向量，对测试向量进行解析以得到测试报文；根据测试报文生成配置报文，并下发配置报文至总线中的多 个待测子系统，其中，配置报文用于指示多个待测子系统根据配置报文进行配置处理；在多个待测子系统完成配置处理后，下发测试报文至多个监控节点之间进行传输。
在一可选实施例中，测试报文包括多个测试子报文，每一个测试子报文携带有第一标识信息，第一标识信息用于标识待测子系统；测试子报文用于根据第一标识信息指示监控节点执行测试子报文，其中，监控节点为设置在第一标识信息标识的待测子系统之中的监控节点。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，包括：分时复用第一监控实施单元获取待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；以及分时复用第二监控实施单元获取待测子系统的总线的读地址通道及读数据通道的信息；其中，第一监控实施单元与第二监控实施单元均设置在监控节点之中。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，包括：获取待测子系统的总线的地址通道、数据通道、响应通道的触发顺序；其中，地址通道包括写地址通道以及读地址通道，数据通道包括写数据通道以及读数据通道，响应通道包括写响应通道；地址通道、数据通道、响应通道的触发顺序包括：对于地址通道触发，支持数据通道先触发；或者，对于数据通道触发，支持地址通道先触发；或者，对于响应通道触发，支持地址通道以及数据通道先触发。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，包括：
获取待测子系统的总线的写地址通道、写数据通道、写响应通道、读地址通道、读数据通道在预设范围内的总线握手信息。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，包括：
获取待测子系统的总线的写地址通道以及写响应通道之间成功握手的次数，与读地址通道以及读响应通道之间成功握手的次数的差值；在满足以下预设条件的情形下，监控节点还用于上报静默超时中断：差值非零，差值保持不变的时间超过预设阈值。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，包括：获取待测子系统的总线的写地址通道以及读地址通道在预设范围内的地址信息，其中，预设范围用于指示当前时刻起计算的OUTSTANDING笔。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，还包括：获取待测子系统的测试信息，并将测试信息发送至控制模块。
在一可选实施例中，S802，接收并执行测试报文，获取待测子系统的测试信息，还包括：获取待测子系统的测试信息，并按照预设帧格式对测试信息进行封装，将封装后的测试信息发送至控制模块。
在一可选实施例中，封装后的测试信息中携带有第二标识信息，第二标识信息用于标识控制模块。
通过以上的实施方式的描述，本领域的技术人员可以了解到根据上述实施例的方法可借助软件加通用硬件平台的方式来实现，当然也可以通过硬件来实现。基于这样的理解，本申请的技术方案可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括多个指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本申请多个实施例所述的方法。
实施例4
在本实施例中还提供了一种总线监控装置，应用于控制模块，该装置用于实现上述实施例及实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置可以以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图12是根据本申请实施例的总线监控装置的结构框图(一)，如图12所示，该装置包括：第一拓扑单元402，设置为在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接；控制单元404，设置为获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输；其中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，其中，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息。
通过本实施例中的总线监控装置，由于总线之中的多个监控节点可分别配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；在控制模块获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点之间进行传输时，所述监控节点可执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示所述监控节点执行所述测试报文时，所述待测子系统的总线的信息。因此，本实施例中的总线监控装置可以解决相关技术中芯片系统无法在运行过程中对于节点进行实时监控的技术问题，以达到可在芯片系统运行过程中对于节点进行实时监控的效果。
本实施例中的总线监控装置的其余技术方案与实施例2中的总线监控方法相对应，故在此不再赘述。
在一可选实施例中，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输，包括：获取测试向量，对测试向量进行解析以得到测试报文，并下发测试报文至多个监控节点之间进行传输。
在一可选实施例中，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输，还包括：获取测试向量，对测试向量进行解析以得到测试报文；根据测试报文生成配置报文，并下发配置报文至总线中的多个待测子系统，其中，配置报文用于指示多个待测子系统根据配置报文进行配置处理；在多个待测子系统完成配置处理后，下发测试报文至多个监控节点之间进行传输。
在一可选实施例中，测试报文包括多个测试子报文，每一个测试子报文携带有第一标识信息，第一标识信息用于标识待测子系统。测试子报文用于根据第一标识信息指示监控节点执行测试子报文，其中，监控节点为设置在第一标识信息标识的待测子系统之中的监控节点。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：分时复用第一监控实施单元获取待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；以及分时复用第二监控实施单元获取待测子系统的总线的读地址通道及读数据通道的信息；其中，第一监控实施单元与第二监控实施单元均设置在监控节点之中。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总线的地址通道、数据通道、响应通道的触发顺序；其中，地址通道包括写地址通道以及读地址通道，数据通道包括写数据通道以及读数据通道，响应通道包括写响应通道；地址通道、数据通道、响应通道的触发顺序包括：对于地址通道触发，支持数据通道先触发；或者，对于数据通道触发，支持地址通道先触发；或者，对于响应通道触发，支持地址通道以及数据通道先触发。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总线的写地址通道、写数据通道、写响应通道、读地址通道、读数据通道在预设范围内的总线握手信息。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总线的写地址通道以及写响应通道之间成功握手的次数，与读地址通道以及读响应通道之间成功握手的次数的差值；在满足以下预设条件的情形下，监控节点还用于上报静默超时中断：差值非零，差值保持不变的时间超过预设阈值。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，包括：指示监控节点获取待测子系统的总线的写地址通道以及读地址通道在预设范围内的地址信息，其中，预设范围内的地址信息用于指示当前时刻起计算的OUTSTANDING笔地址信息。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，还包括：测试向量用于指示监控节点获取待测子系统的测试信息，并将测试信息发送至控制模块。
在一可选实施例中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，还包括：测试向量用于指示获取待测子系统的测试信息，并按照预设帧格式对测试信息进行封装，将封装后的测试信息发送至控制模块。
在一可选实施例中，封装后的测试信息中携带有第二标识信息，第二标识信息用于标识控制模块。
上述多个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下 方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述多个模块以任意组合的形式分别位于不同的处理器中。
实施例5
在本实施例中还提供了一种总线监控装置，应用于监控节点，该装置用于实现上述实施例及可选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置可以以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图13是根据本申请实施例的总线监控装置的结构框图(二)，如图13所示，该装置包括：第二拓扑单元，设置为在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接；监控单元，设置为接收并执行测试报文，获取待测子系统的测试信息，待测子系统的测试信息设置为指示监控节点执行测试报文时，待测子系统的总线的信息；其中，测试报文由控制模块根据获取的测试向量下发至多个监控节点之间进行传输。
通过本实施例中的总线监控装置，由于总线之中的多个监控节点可分别配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；在控制模块获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点之间进行传输时，所述监控节点可执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示所述监控节点执行所述测试报文时，所述待测子系统的总线的信息。因此，本实施例中的总线监控装置可以解决相关技术中芯片系统无法在运行过程中对于节点进行实时监控的技术问题，以达到可在芯片系统运行过程中对于节点进行实时监控的效果。
本实施例中的总线监控装置的其余技术方案与实施例2中的总线监控方法相对应，故在此不再赘述。
在一可选实施例中，控制模块根据获取的测试向量下发至多个监控节点之间进行传输，包括：控制模块获取测试向量，对测试向量进行解析以得到测试报文，并下发测试报文至多个监控节点之间进行传输。
在一可选实施例中，控制模块根据获取的测试向量下发至多个监控节点之间进行传输，还包括：控制模块获取测试向量，对测试向量进行解析以得到测试报文；根据测试报文生成配置报文，并下发配置报文至总线中的多个待测子系统，其中，配置报文用于指示多个待测子系统根据配置报文进行配置处理；多个待测子系统完成配置处理后，下发测试报文至多个监控节点之间进行传输。
在一可选实施例中，测试报文包括多个测试子报文，每一个测试子报文携带有第一标识信息，第一标识信息用于标识待测子系统；测试子报文用于根据第一标识信息指示监控节点执行测试子报文，其中，监控节点为设置在第一标识信息标识的待测子系统之中的监控节点。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，包括：分时复用第一监控实施单元获取待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；以及分时复用第二监控实施单元获取待测子系统的总线的读地址通道及读数据通道的信息；其中，第一监控实施单元与第二监控实施单元均设置在监控节点之中。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，包括：获取待测子系统的总线的地址通道、数据通道、响应通道的触发顺序；其中，地址通道包括写地址通道以及读地址通道，数据通道包括写数据通道以及读数据通道，响应通道包括写响应通道；地址通道、数据通道、响应通道的触发顺序包括：对于地址通道触发，支持数据通道先触发；或者，对于数据通道触发，支持地址通道先触发；或者，对于响应通道触发，支持地址通道以及数据通道先触发。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，包括：获取待测子系统的总线的写地址通道、写数据通道、写响应通道、读地址通道、读数据通道在预设范围内的总线握手信息。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，包括：获取待测子系统的总线的写地址通道以及写响应通道之间成功握手的次数，与读地址通道以及读响应通道之间成功握手的次数的差值。在满足以下预设条件的情形下，监控节点还用于上报静默超时中断：差值非零，差值保持不变的时间超过预设阈值。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，包括：获取待测子系统的总线的写地址通道以及读地址通道在预设范围内的地址信息，其中，预设范围内的地址信息用于指示当前时刻起计算的OUTSTANDING笔地址信息。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，还包括：获取待测子系统的测试信息，并将测试信息发送至控制模块。
在一可选实施例中，接收并执行测试报文，获取待测子系统的测试信息，还包括：获取待测子系统的测试信息，并按照预设帧格式对测试信息进行封装，将封装后的测试信息发送至控制模块。
在一可选实施例中，封装后的测试信息中携带有第二标识信息，第二标识信息用于标识控制模块。
实施例6
本申请的实施例还提供了一种存储介质，该存储介质中存储有计算机程序，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
可选地，在本实施例中，上述存储介质可以被设置为存储用于执行以下步骤的计算机程序：
S10，在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接。
S20，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输；其中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，其中，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息。
在本实施例中，上述存储介质可以包括但不限于：U盘、ROM、RAM、移动硬盘、磁碟或者光盘等多种可以存储计算机程序的介质。
实施例7
本申请的实施例还提供了一种存储介质，该存储介质中存储有计算机程序，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
可选地，在本实施例中，上述存储介质可以被设置为存储用于执行以下步 骤的计算机程序：
S10，在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接。
S20，接收并执行测试报文，获取待测子系统的测试信息，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息；其中，测试报文由控制模块根据获取的测试向量下发至多个监控节点之间进行传输。
可选地，在本实施例中，上述存储介质可以包括但不限于：U盘、ROM、RAM、移动硬盘、磁碟或者光盘等多种可以存储计算机程序的介质。
实施例8
本申请的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
可选地，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
可选地，在本实施例中，上述处理器可以被设置为通过计算机程序执行以下步骤：
S10，在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接。
S20，获取测试向量，并根据测试向量下发测试报文至多个监控节点之间进行传输；其中，测试向量用于指示监控节点执行测试报文，并获取待测子系统的测试信息，其中，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息。
可选地，本实施例中的具体示例可以参考上述实施例及可选实施方式中所描述的示例，本实施例在此不再赘述。
实施例9
本申请的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
可选地，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
可选地，在本实施例中，上述处理器可以被设置为通过计算机程序执行以下步骤：
S10，在总线中设置多个监控节点，每一个监控节点设置在总线中的一个待测子系统之中；其中，多个监控节点之间采用环形拓扑结构进行串接。
S20，接收并执行测试报文，获取待测子系统的测试信息，待测子系统的测试信息用于指示监控节点执行测试报文时，待测子系统的总线的信息；其中，测试报文由控制模块根据获取的测试向量下发至多个监控节点之间进行传输。
可选地，本实施例中的具体示例可以参考上述实施例及实施方式中所描述的示例，本实施例在此不再赘述。
显然，本领域的技术人员应该明白，上述的本申请的多个模块或多个步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上。可选地，上述多个模块或多个步骤可以用计算装置可执行的程序代码来实现，从而，可以将上述多个模块或多个步骤存储在存储装置中由计算装置来执行，并且在一些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将上述多个模块或多个步骤分别制作成多个集成电路模块，或者将上述多个模块或多个步骤中的多个模块或步骤制作成单个集成电路模块来实现。这样，本申请不限制于任何指定的硬件和软件结合。

Claims (41)

  1. 一种总线监控装置，包括：
    多个监控模块，设置为设置在总线之中，每一个监控模块配置为设置在所述总线中的一个待测子系统之中；其中，多个所述监控模块之间采用环形拓扑结构进行串接；
    控制模块，设置为获取测试向量，并根据所述测试向量下发测试报文至所述多个监控模块中的一个监控模块以在所述多个监控模块之间传输所述测试报文；
    所述监控模块设置为执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示在所述监控模块执行所述测试报文的情况下，所述待测子系统的总线的信息。
  2. 根据权利要求1所述的装置，其中，所述控制模块是设置为：
    获取所述测试向量，对所述测试向量进行解析以得到所述测试报文，并下发所述测试报文至所述多个监控模块中的一个监控模块以在所述多个监控模块之间传输所述测试报文。
  3. 根据权利要求1或2所述的装置，其中，所述控制模块是设置为通过如下方式根据所述测试向量下发测试报文至所述多个监控模块中的一个监控模块以在所述多个监控模块之间传输所述测试报文：
    获取所述测试向量，对所述测试向量进行解析以得到所述测试报文；
    根据所述测试报文生成配置报文，并下发所述配置报文至所述总线中的多个所述待测子系统，其中，所述配置报文用于指示多个所述待测子系统根据所述配置报文进行配置处理；
    在多个所述待测子系统完成所述配置处理后，下发所述测试报文至所述多个监控模块中的一个监控模块以在所述多个监控模块之间传输所述测试报文。
  4. 根据权利要求1所述的装置，其中，所述测试报文包括多个测试子报文，每一个测试子报文携带有第一标识信息，所述第一标识信息用于标识所述待测子系统；
    每一个测试子报文用于根据所述每一个测试子报文携带的第一标识信息指示目标监控模块执行所述每一个测试子报文，其中，所述目标监控模块为设置 在所述每一个测试子报文携带的第一标识信息标识的所述待测子系统之中的所述监控模块。
  5. 根据权利要求1所述的装置，其中，所述监控模块包括第一监控实施单元以及第二监控实施单元，所述第一监控实施单元设置为获取所述待测子系统的第一测试信息，所述第二监控实施单元设置为获取所述待测子系统的第二测试信息；
    其中，所述待测子系统的所述第一测试信息包括所述待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；所述待测子系统的所述第二测试信息包括所述待测子系统的总线的读地址通道及读数据通道的信息。
  6. 根据权利要求5所述的装置，其中，所述监控模块是设置为通过如下方式获取所述待测子系统的测试信息
    在所述待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件的情形下，获取所述待测子系统的测试信息；其中，所述地址通道包括所述写地址通以及所述读地址通道，所述数据通道包括所述写数据通道以及所述读数据通道，所述响应通道包括所述写响应通道；
    其中，所述待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件包括以下至少之一：
    在所述地址通道作为所述监控模块的匹配对象的情况下，所述触发顺序条件为所述数据通道优先于所述地址通道触发；
    在所述数据通道作为所述监控模块的匹配对象的情况下，所述触发顺序条件为所述地址通道优先于所述数据通道触发；
    在所述响应通道作为所述监控模块的匹配对象的情况下，所述触发顺序条件为所述地址通道以及所述数据通道均优先于所述响应通道触发。
  7. 根据权利要求5所述的装置，所述监控模块是设置为通过如下方式获取所述待测子系统的测试信息：
    获取所述待测子系统的总线的所述写地址通道、所述写数据通道、所述写响应通道、所述读地址通道、所述读数据通道在预设范围内的总线握手信息。
  8. 根据权利要求5所述的装置，所述监控模块是设置为通过如下方式获取 所述待测子系统的测试信息：
    获取所述待测子系统的总线的所述写地址通道以及所述写响应通道之间成功握手的次数的差值，与所述读地址通道以及读响应通道之间成功握手的次数的差值；
    在满足以下预设条件的情形下，所述监控模块还设置为上报静默超时中断：所述差值非零，以及所述差值保持不变的时间超过预设阈值。
  9. 根据权利要求5所述的装置，所述监控模块是设置为通过如下方式获取所述待测子系统的测试信息：
    获取所述待测子系统的总线的所述写地址通道以及所述读地址通道在预设范围内的地址信息，其中，所述预设范围内的地址信息用于指示当前时刻起计算的OUTSTANDING笔地址信息。
  10. 根据权利要求1所述的装置，其中，所述监控模块是设置为通过如下方式获取所述待测子系统的测试信息：
    获取所述待测子系统的所述测试信息，并将所述测试信息发送至所述控制模块。
  11. 根据权利要求1或10所述的装置，其中，所述监控模块是设置为通过如下方式获取所述待测子系统的测试信息：
    获取所述待测子系统的所述测试信息，并按照预设帧格式对所述测试信息进行封装，将封装后的所述测试信息发送至所述控制模块。
  12. 根据权利要求11所述的装置，其中，所述封装后的所述测试信息中携带有第二标识信息，所述第二标识信息用于标识所述控制模块。
  13. 根据权利要求10所述的装置，还包括：
    测试主机，设置为生成预设的所述测试向量；
    异步收发传输器，设置为将所述测试向量发送至所述控制模块，以及接收所述控制模块的发送的所述测试信息。
  14. 一种总线监控方法，应用于控制模块，包括：
    在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
    获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文；
    其中，所述测试向量用于指示所述监控节点执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示所述监控节点在执行所述测试报文的情况下，所述待测子系统的总线的信息。
  15. 根据权利要求14所述的方法，其中，所述获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文，包括：
    获取所述测试向量，对所述测试向量进行解析以得到所述测试报文，并下发所述测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文。
  16. 根据权利要求14或15所述的方法，其中，所述获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点之间中的一个监控节点以在所述多个监控节点传输所述测试报文，包括：
    获取所述测试向量，对所述测试向量进行解析以得到所述测试报文；
    根据所述测试报文生成配置报文，并下发所述配置报文至所述总线中的多个所述待测子系统，其中，所述配置报文用于指示多个所述待测子系统根据所述配置报文进行配置处理；
    在多个所述待测子系统完成所述配置处理后，下发所述测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文。
  17. 根据权利要求14所述的方法，其中，
    所述测试报文包括多个测试子报文，每一个所述测试子报文携带有第一标识信息，所述第一标识信息用于标识所述待测子系统；
    每一个测试子报文用于根据所述每一个测试子报文携带的第一标识信息指示目标监控节点执行所述每一个测试子报文，其中，所述目标监控节点为设置在所述每一个测试子报文携带的第一标识信息标识的所述待测子系统之中的所述监控节点。
  18. 根据权利要求14所述的方法，其中，所述测试向量用于指示所述监 控节点获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示所述监控节点分时复用第一监控实施单元获取所述待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；以及分时复用第二监控实施单元获取所述待测子系统的总线的读地址通道及读数据通道的信息；
    其中，所述第一监控实施单元与所述第二监控实施单元均设置在所述监控节点之中。
  19. 根据权利要求18所述的方法，其中，所述测试向量用于指示所述监控节点获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示所述监控节点在所述待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件的情形下，获取所述待测子系统的测试信息；其中，所述地址通道包括所述写地址通道以及所述读地址通道，所述数据通道包括所述写数据通道以及所述读数据通道，所述响应通道包括所述写响应通道；
    其中，所述待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件包括以下至少之一：
    在所述地址通道作为所述监控节点的匹配对象的情况下，所述触发顺序条件为所述数据通道优先于所述地址通道触发；
    在所述数据通道作为所述监控节点的匹配对象的情况下，所述触发顺序条件为所述地址通道优先于所述数据通道触发；
    在所述响应通道作为所述监控节点的匹配对象的情况下，所述触发顺序条件为所述地址通道以及所述数据通道均优先于所述响应通道触发。
  20. 根据权利要求18所述的方法，所述测试向量用于指示所述监控节点获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示所述监控节点获取所述待测子系统的总线的所述写地址通道、所述写数据通道、所述写响应通道、所述读地址通道、所述读数据通道在预设范围内的总线握手信息。
  21. 根据权利要求18所述的方法，所述测试向量用于指示所述监控节点 获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示所述监控节点获取所述待测子系统的总线的所述写地址通道以及所述写响应通道之间成功握手的次数的差值，与所述读地址通道以及读响应通道之间成功握手的次数的差值；
    在满足以下预设条件的情形下，所述监控节点还用于上报静默超时中断：所述差值非零，以及所述差值保持不变的时间超过预设阈值。
  22. 根据权利要求18所述的方法，所述测试向量用于指示所述监控节点执行所述测试报文，并获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示所述监控节点获取所述待测子系统的总线的所述写地址通道以及所述读地址通道在预设范围内的地址信息，其中，所述预设范围内的地址信息用于指示当前时刻起计算的OUTSTANDING笔地址信息。
  23. 根据权利要求14所述的方法，所述测试向量用于指示所述监控节点获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示所述监控节点获取所述待测子系统的所述测试信息，并将所述测试信息发送至所述控制模块。
  24. 根据权利要求14或22所述的方法，所述测试向量用于指示获取所述待测子系统的测试信息，包括：
    所述测试向量用于指示获取所述待测子系统的所述测试信息，并按照预设帧格式对所述测试信息进行封装，将封装后的所述测试信息发送至所述控制模块。
  25. 根据权利要求24所述的方法，其中，所述封装后的所述测试信息中携带有第二标识信息，所述第二标识信息用于标识所述控制模块。
  26. 一种总线监控方法，应用于监控节点，包括：
    在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
    接收并执行测试报文，获取所述待测子系统的测试信息，所述待测子系统的所述测试信息用于指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息；
    其中，所述测试报文由控制模块根据获取的测试向量下发至所述多个监控节点中的一个监控节点以在多个监控节点之间传输所述测试报文。
  27. 根据权利要求26所述的方法，其中，所述控制模块根据获取的测试向量下发至所述多个监控节点中的一个监控节点以在多个监控节点之间传输所述测试报文，包括：
    所述控制模块获取所述测试向量，对所述测试向量进行解析以得到所述测试报文，并下发所述测试报文至所述多个监控节点中的一个监控节点以在多个监控节点之间传输所述测试报文。
  28. 根据权利要求26或27所述的方法，其中，所述控制模块根据获取的测试向量下发至所述多个监控节点中的一个监控节点以在多个监控节点之间传输所述测试报文，包括：
    所述控制模块获取所述测试向量，对所述测试向量进行解析以得到所述测试报文；
    所述控制模块根据所述测试报文生成配置报文，并下发所述配置报文至所述总线中的多个所述待测子系统，其中，所述配置报文用于指示多个所述待测子系统根据所述配置报文进行配置处理；
    所述控制模块在多个所述待测子系统完成所述配置处理后，下发所述测试报文至所述多个监控节点中的一个监控节点以在多个监控节点之间传输所述测试报文。
  29. 根据权利要求26所述的方法，其中，
    所述测试报文包括多个测试子报文，每一个所述测试子报文携带有第一标识信息，所述第一标识信息用于标识所述待测子系统；
    每一个测试子报文用于根据所述每一个测试子报文携带的第一标识信息指示目标监控节点执行所述每一个测试子报文，其中，所述目标监控节点为设置在所述每一个测试子报文携带的第一标识信息标识的所述待测子系统之中的所述监控节点。
  30. 根据权利要求26所述的方法，其中，所述获取所述待测子系统的测试信息，包括：
    分时复用第一监控实施单元获取所述待测子系统的总线的写地址通道、写数据通道及写响应通道的信息；以及
    分时复用第二监控实施单元获取所述待测子系统的总线的读地址通道及读数据通道的信息；
    其中，所述第一监控实施单元与所述第二监控实施单元均设置在所述监控节点之中。
  31. 根据权利要求30所述的方法，其中，所述获取所述待测子系统的测试信息，包括：
    在所述待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件的情形下，获取所述待测子系统的测试信息；所述地址通道包括所述写地址通道以及所述读地址通道，所述数据通道包括所述写数据通道以及所述读数据通道，所述响应通道包括所述写响应通道；
    其中，所述待测子系统的总线的地址通道、数据通道、响应通道之间满足预设的触发顺序条件包括以下至少之一：
    在所述地址通道作为所述监控节点的匹配对象的情况下，所述触发顺序条件为所述数据通道优先于所述地址通道触发；
    在所述数据通道作为所述监控节点的匹配对象的情况下，所述触发顺序条件为所述地址通道优先于所述数据通道触发；
    在所述响应通道作为所述监控节点的匹配对象的情况下，所述触发顺序条件为所述地址通道以及所述数据通道均优先于所述响应通道触发。
  32. 根据权利要求30所述的方法，所述获取所述待测子系统的测试信息，包括：
    获取所述待测子系统的总线的所述写地址通道、所述写数据通道、所述写响应通道、所述读地址通道、所述读数据通道在预设范围内的总线握手信息。
  33. 根据权利要求30所述的方法，所述获取所述待测子系统的测试信息，包括：
    获取所述待测子系统的总线的所述写地址通道以及所述写响应通道之间成功握手的次数的差值，与所述读地址通道以及读响应通道之间成功握手的次数 的差值；
    在满足以下预设条件的情形下，所述监控节点上报静默超时中断：所述差值非零，所述差值保持不变的时间超过预设阈值。
  34. 根据权利要求30所述的方法，所述获取所述待测子系统的测试信息，包括：
    获取所述待测子系统的总线的所述写地址通道以及所述读地址通道在预设范围内的地址信息，其中，所述预设范围内的地址信息用于指示当前时刻起计算的OUTSTANDING笔地址信息。
  35. 根据权利要求26所述的方法，所述获取所述待测子系统的测试信息，包括：
    获取所述待测子系统的所述测试信息，并将所述测试信息发送至所述控制模块。
  36. 根据权利要求26或35所述的方法，其中，所述获取所述待测子系统的测试信息，包括：
    获取所述待测子系统的所述测试信息，并按照预设帧格式对所述测试信息进行封装，将封装后的所述测试信息发送至所述控制模块。
  37. 根据权利要求36所述的方法，其中，所述封装后的所述测试信息中携带有第二标识信息，所述第二标识信息用于标识所述控制模块。
  38. 一种总线监控装置，应用于控制模块，包括：
    拓扑单元，设置为在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
    控制单元，设置为获取测试向量，并根据所述测试向量下发测试报文至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文；
    其中，所述测试向量用于指示所述监控节点执行所述测试报文，并获取所述待测子系统的测试信息，其中，所述待测子系统的所述测试信息用于指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息。
  39. 一种总线监控装置，应用于监控节点，包括：
    拓扑单元，设置为在总线中设置多个监控节点，每一个所述监控节点设置在所述总线中的一个待测子系统之中；其中，多个所述监控节点之间采用环形拓扑结构进行串接；
    监控单元，设置为接收并执行测试报文，获取所述待测子系统的测试信息，所述待测子系统的所述测试信息用于指示在所述监控节点执行所述测试报文的情况下，所述待测子系统的总线的信息；
    其中，所述测试报文由控制模块根据获取的测试向量下发至所述多个监控节点中的一个监控节点以在所述多个监控节点之间传输所述测试报文。
  40. 一种存储介质，存储有计算机程序，所述计算机程序被设置为运行时执行所述权利要求14至37中任一项所述的方法。
  41. 一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行所述权利要求14至37中任一项所述的方法。
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