WO2020258504A1 - 一种阵列基板及显示面板 - Google Patents

一种阵列基板及显示面板 Download PDF

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Publication number
WO2020258504A1
WO2020258504A1 PCT/CN2019/103627 CN2019103627W WO2020258504A1 WO 2020258504 A1 WO2020258504 A1 WO 2020258504A1 CN 2019103627 W CN2019103627 W CN 2019103627W WO 2020258504 A1 WO2020258504 A1 WO 2020258504A1
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WIPO (PCT)
Prior art keywords
unit
layer
substrate
metal layer
color resist
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PCT/CN2019/103627
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English (en)
French (fr)
Inventor
张翼鹤
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020258504A1 publication Critical patent/WO2020258504A1/zh

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136209Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136222Colour filters incorporated in the active matrix substrate

Definitions

  • the present invention relates to the field of display technology, in particular to an array substrate and a display panel.
  • the BPS technology combines the black matrix and support pillars into a process on the lower substrate. There is only a layer of unpatterned ITO on the upper substrate, which can effectively prevent light leakage caused by the dislocation of the upper and lower substrates.
  • the liquid crystal mode in the industry is generally divided into VA mode and IPS mode.
  • BPS technology adopts VA mode liquid crystal
  • the data wiring adopts transparent conductive metal film to shield the light, so that the potential of the common electrode and the upper substrate If the potential of the upper ITO is the same, the liquid crystal will not be reversed, and no light will pass through, which can well shield the data trace.
  • the VA mode liquid crystal panel is prone to uneven liquid crystal distribution during the bending process, resulting in poor display effects, while the IPS mode liquid crystal panel is more conducive to preparing a flexible display screen.
  • the upper substrate has no ITO, which cannot achieve electrical shading, and there is a risk of color mixing and light leakage at the data line.
  • the upper substrate has no ITO, which cannot achieve electrical shading, and there are technical problems of color mixing and light leakage risks at the data wiring.
  • An array substrate which includes:
  • a second metal layer provided above the substrate
  • a passivation layer provided on the second metal layer
  • a color resist layer provided on the passivation layer
  • the color resist layer includes a plurality of color resist units, at least a portion of adjacent color resist units partially overlap, and the overlapping portions of adjacent color resist units form overlapping units;
  • the second metal layer includes spaced apart Data wiring, the orthographic projection of the overlapping unit on the substrate at least covers a part of the orthographic projection of the data wiring on the substrate.
  • the orthographic projection of the overlapping unit on the substrate completely covers the orthographic projection of the data trace on the substrate.
  • the color resistance units are arranged in an array, and are arranged along the length direction of the data lines, and the adjacent color resistance units partially overlap to form the overlapping unit.
  • the color resistance unit includes a first color resistance unit, a second color resistance unit, and a third color resistance unit;
  • the color resistance colors of the first color resistance unit, the second color resistance unit and the third color resistance unit are different from each other, and respectively correspond to one of red, green, and blue.
  • the overlapping unit includes a first overlapping unit, a second overlapping unit, and a third overlapping unit;
  • the first overlap unit includes an overlap portion of the first color resist unit and the second color resist unit
  • the second overlap unit includes the second color resist unit and the third color resist unit
  • the third overlapping unit includes the overlapping portion of the third color resist unit and the first color resist unit.
  • a pixel electrode is further provided on the flat layer, and the orthographic projection of the pixel electrode on the substrate and the orthographic projection of the data wiring on the substrate do not overlap with each other.
  • the array substrate further includes:
  • a first metal layer disposed above the substrate
  • An insulating layer provided on the first metal layer
  • An active layer provided on the insulating layer
  • the second metal layer is provided on the insulating layer, the passivation layer covers the second metal layer and the active layer; a photoresist layer is provided on the flat layer, and the photoresist The orthographic projection of the layer on the substrate and the orthographic projection of the data trace on the substrate do not coincide with each other.
  • the first metal layer includes a gate metal layer
  • the second metal layer further includes a source and drain metal layer electrically connected to the active layer and positioned corresponding to the gate metal layer, so
  • the photoresist layer includes main support pillars and sub support pillars whose positions correspond to the source and drain metal layers.
  • an overlapping unit is also provided between the main support column and the source/drain metal layer, and the orthographic projection of the overlapping unit on the substrate at least covers the source/drain metal layer on the substrate Part of the orthographic projection.
  • the present invention also provides a display panel.
  • the display panel includes a color filter substrate and an array substrate.
  • a liquid crystal layer is provided between the color filter substrate and the array substrate; the array substrate includes:
  • a second metal layer provided above the substrate
  • a passivation layer provided on the second metal layer
  • a color resist layer provided on the passivation layer
  • the color resist layer includes a plurality of color resist units, at least a portion of adjacent color resist units partially overlap, and the overlapping portions of adjacent color resist units form overlapping units;
  • the second metal layer includes spaced apart Data wiring, the orthographic projection of the overlapping unit on the substrate at least covers a part of the orthographic projection of the data wiring on the substrate.
  • liquid crystal layer of the display panel adopts an IPS mode.
  • the orthographic projection of the overlapping unit on the substrate completely covers the orthographic projection of the data trace on the substrate.
  • the color resistance units are arranged in an array, and are arranged along the length direction of the data lines, and the adjacent color resistance units partially overlap to form the overlapping unit.
  • the color resistance unit includes a first color resistance unit, a second color resistance unit, and a third color resistance unit;
  • the color resistance colors of the first color resistance unit, the second color resistance unit and the third color resistance unit are different from each other, and respectively correspond to one of red, green, and blue.
  • the overlapping unit includes a first overlapping unit, a second overlapping unit, and a third overlapping unit;
  • the first overlap unit includes an overlap portion of the first color resist unit and the second color resist unit
  • the second overlap unit includes the second color resist unit and the third color resist unit
  • the third overlapping unit includes the overlapping portion of the third color resist unit and the first color resist unit.
  • a pixel electrode is further provided on the flat layer, and the orthographic projection of the pixel electrode on the substrate and the orthographic projection of the data wiring on the substrate do not overlap with each other.
  • the array substrate further includes:
  • a first metal layer disposed above the substrate
  • An insulating layer provided on the first metal layer
  • An active layer provided on the insulating layer
  • the second metal layer is provided on the insulating layer, the passivation layer covers the second metal layer and the active layer; a photoresist layer is provided on the flat layer, and the photoresist The orthographic projection of the layer on the substrate and the orthographic projection of the data trace on the substrate do not coincide with each other.
  • the first metal layer includes a gate metal layer
  • the second metal layer further includes a source and drain metal layer electrically connected to the active layer and positioned corresponding to the gate metal layer, so
  • the photoresist layer includes main support pillars and sub support pillars whose positions correspond to the source and drain metal layers.
  • an overlapping unit is also provided between the main support column and the source/drain metal layer, and the orthographic projection of the overlapping unit on the substrate at least covers the source/drain metal layer on the substrate Part of the orthographic projection.
  • the display panel uses the BPS architecture design, which can effectively prevent poor shading caused by the misalignment of the array substrate and the color film substrate during the bending process of the display panel.
  • the liquid crystal layer of the display panel adopts the IPS mode, which can effectively prevent the liquid crystal during the bending process.
  • the uneven cell causes the display effect of the display panel to deteriorate, and the overlapping single pair of data lines formed by the partial overlap of adjacent color resist units in the array substrate has a light shielding effect, so that it can be achieved even without using electrical shading
  • the shading design of the data wiring in the array substrate is beneficial to achieve a good shading effect when the display panel is bent, and prevents light leakage and color mixing.
  • FIG. 1 is a schematic diagram of a longitudinal section of an array substrate along a first direction in a specific embodiment of the present invention
  • FIG. 2 is a schematic longitudinal cross-sectional view of an array substrate along a second direction in a specific embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a display panel in a specific embodiment of the present invention.
  • the present invention addresses the technical problems that in the existing liquid crystal display panel adopting the IPS mode, the upper substrate has no ITO, electrical shading cannot be realized, and the risk of color mixing and light leakage at the data wiring.
  • the present invention can solve the above-mentioned problems.
  • the array substrate 10 includes a substrate 11, a second metal layer 15, a passivation layer 17, a color resist layer 18 and a flat layer 19.
  • the substrate 11 includes a flexible substrate, and the preparation material of the flexible substrate includes polyimide.
  • the second metal layer 15 is disposed above the substrate 11, and the second metal layer 15 includes data traces 151 and source-drain metal layers 152 distributed at intervals.
  • the length direction of the data traces 151 is In the first direction, the source-drain metal layer 152 is used for signal transmission.
  • the passivation layer 17 is disposed on the second metal layer 15, and the passivation layer 17 is used to protect the second metal layer 15 and prevent the second metal layer 15 from contacting other metals and causing short circuits. .
  • the passivation layer 17 is made of at least one of silicon nitride and silicon oxide.
  • the color resist layer 18 is disposed on the passivation layer 17, the flat layer 19 is disposed on the passivation layer 17 and covers the color resist layer 18, and the color resist layer 18 is used to The light passing through the color resist layer 18 is filtered into light of the target color.
  • the color resist layer 18 includes a plurality of color resist units 181, at least a portion of adjacent color resist units 181 partially overlap, and the overlapping portions of adjacent color resist units 181 form an overlap unit 1811.
  • the orthographic projection of 1811 on the substrate 11 covers at least part of the orthographic projection of the data wiring 151 on the substrate 11.
  • the overlapping unit 1811 formed by partially overlapping adjacent color resist units 181 has a light-shielding effect on the data wiring 151, and uses physical and optical characteristics to shield light, so that data in the array substrate 10 can be realized even if electrical shading is not used.
  • the shading design at the wiring 151 prevents color mixing and light leakage at the data wiring 151.
  • the orthographic projection of the overlapping unit 1811 on the substrate 11 completely covers the orthographic projection of the data wiring 151 on the substrate 11.
  • the color resistance units 181 are arranged in an array, arranged along the length direction of the data wiring 151, and the adjacent color resistance units 181 partially overlap to form the overlapping unit 1811, that is, along the first direction The arranged and adjacent color resist units 181 partially overlap to form the overlapping unit 1811.
  • the color resistance unit 181 includes a first color resistance unit, a second color resistance unit, and a third color resistance unit.
  • the color resistance colors of the first color resistance unit, the second color resistance unit and the third color resistance unit are different from each other, and respectively correspond to one of red, green, and blue.
  • the overlapping unit 1811 includes a first overlapping unit, a second overlapping unit, and a third overlapping unit.
  • the first overlap unit includes an overlap portion of the first color resist unit and the second color resist unit
  • the second overlap unit includes the second color resist unit and the third color resist unit
  • the third overlapping unit includes the overlapping portion of the third color resist unit and the first color resist unit.
  • the first color resist unit and the second color resist unit partially overlap, and the overlapping portion of the first color resist unit and the second color resist unit is simultaneously with the third color resist unit.
  • the units overlap, thereby forming an overlap unit 1811.
  • red, green, and blue are the three primary colors, and the mixed color of red, green, and blue is black, so that the data wiring 151 has a better shading effect.
  • the flat layer 19 is further provided with a pixel electrode 50, and the orthographic projection of the pixel electrode 50 on the substrate 11 and the orthographic projection of the data wiring 151 on the substrate 11 are different from each other. coincide.
  • the pixel electrode 50 is made of materials including but not limited to indium zinc oxide.
  • the array substrate 10 further includes a buffer layer 12, a first metal layer 13, an insulating layer 14 and an active layer 16.
  • the buffer layer 12 is disposed on the substrate 11, and the material of the buffer layer 12 is one or more of silicon nitride and silicon oxide.
  • the first metal layer 13 is disposed on the buffer layer 12, the first metal layer 13 includes a gate metal layer 131 and a scan line 132, and the gate metal layer 131 includes a gate metal layer for transmitting scan signals.
  • the length direction of the scan line 132 is the second direction.
  • the second direction and the first direction are not parallel to each other.
  • the first direction and the second direction alternate vertically and horizontally, that is, the overlapping unit 1811 and the scan line 132 are alternately distributed vertically and horizontally.
  • the insulating layer 14 is disposed on the buffer layer 12 and covers the first metal layer 13, the second metal layer 15 is disposed on the insulating layer 14, and the insulating layer 14 is used to prevent A short circuit occurs between the first metal layer 13 and the second metal layer 15.
  • the active layer 16 is disposed on the insulating layer 14 and the position of the active layer 16 corresponds to the gate metal layer 131, and the position of the source/drain metal layer 152 corresponds to the gate
  • the metal layer 131 corresponds to the source and drain metal layer 152 and the active layer 16 is electrically connected.
  • the active layer 16 is an active semiconductor layer.
  • the material of the active layer 16 is indium gallium zinc oxide.
  • the flat layer 19 is provided with a photoresist layer 40, and the orthographic projection of the photoresist layer 40 on the substrate 11 and the orthographic projection of the data wiring 151 on the substrate 11 are different from each other. coincide.
  • the photoresist layer 40 includes a black photoresist layer 41 and a main support post 42 and a sub support post 43 corresponding to the source and drain metal layer 152.
  • An overlap unit 1811 is also provided between the main support pillar 42 and the source/drain metal layer 152, and the orthographic projection of the overlap unit 1811 on the substrate 11 at least covers the source/drain metal layer 152 in the The partial orthographic projection on the substrate 11.
  • the orthographic projection of the overlapping unit 1811 located between the main support pillar 42 and the source/drain metal layer 152 on the substrate 11 completely covers the source/drain metal layer 152 on the liner. Orthographic projection on bottom 11.
  • the overlapping unit 1811 located between the main support pillar 42 and the source/drain metal layer 152 not only shields the gate metal layer 131, but also supports the main support pillar 42 together.
  • the present invention also provides a display panel.
  • the display panel includes a color filter substrate 30, the above-mentioned array substrate 10, and the color filter substrate 30 and the array substrate 10. Between the liquid crystal layer 20, the liquid crystal layer 20 of the display panel adopts the IPS mode.
  • the display panel in this application uses the BPS architecture design, which can effectively prevent poor shading caused by the misalignment of the array substrate and the color film substrate during the bending process of the display panel, and the liquid crystal layer of the display panel adopts the IPS mode This can effectively prevent the unevenness of the liquid crystal cell during the bending process from causing the display effect of the display panel to deteriorate, and the overlapping single pair of data lines 151 formed by partially overlapping adjacent color resist units 181 in the array substrate 10 has a light shielding effect. Therefore, even without electrical shading, the shading design at the data wiring 151 in the array substrate 10 can be realized, which is beneficial to achieve a good shading effect when the display panel is bent, and prevents light leakage and color mixing.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract

本发明提供一种阵列基板及显示面板,阵列基板包括衬底、第二金属层、钝化层、设置在钝化层上的色阻层;其中,色阻层包括多个色阻单元,至少部分相邻色阻单元部分重叠,相邻色阻单元的重叠部分形成重叠单元;第二金属层包括间隔分布的数据走线,重叠单元在衬底上的正投影至少覆盖数据走线在衬底上的部分正投影。

Description

一种阵列基板及显示面板 技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及显示面板。
背景技术
在柔性显示面板中,BPS技术是将黑色矩阵和支撑柱合成一道工艺做在下基板,上基板上只有一层无图形的ITO,能够有效防止由于上下基板错位产生的漏光现象。
行业内的液晶模式一般分为VA模式和IPS模式,由于BPS技术采用VA模式的液晶,在采用BPS技术的显示面板中,数据走线采用透明导电金属薄膜遮光,令公共电极的电位与上基板上ITO的电位一致,则液晶不反转,没有光通过,可以对数据走线进行很好的遮光。VA模式的液晶面板在弯折过程中容易出现液晶分布不均导致显示效果变差,而IPS模式的液晶更利于制备柔性显示屏。
然而,在采用BPS技术的显示面板中,采用IPS模式的液晶时,上基板无ITO,无法实现电性遮光,数据走线处有混色和漏光风险。
技术问题
采用IPS模式的液晶时,上基板无ITO,无法实现电性遮光,数据走线处有混色和漏光风险的技术问题。
技术解决方案
一种阵列基板,其包括:
衬底;
设置在所述衬底上方的第二金属层;
设置于所述第二金属层上的钝化层;
设置在所述钝化层上的色阻层;
设置在所述色阻层上的平坦层;
其中,所述色阻层包括多个色阻单元,至少部分相邻所述色阻单元部分重叠,相邻所述色阻单元的重叠部分形成重叠单元;所述第二金属层包括间隔分布的数据走线,所述重叠单元在所述衬底上的正投影至少覆盖所述数据走线在所述衬底上的部分正投影。
进一步的,所述重叠单元在所述衬底上的正投影完全覆盖所述数据走线在所述衬底上的正投影。
进一步的,所述色阻单元按阵列排布,沿所述数据走线长度方向排布且相邻的所述色阻单元部分重叠以形成所述重叠单元。
进一步的,所述色阻单元包括第一色阻单元、第二色阻单元和第三色阻单元;
其中,所述第一色阻单元、所述第二色阻单元和所述第三色阻单元的色阻颜色互不相同,且分别对应红色、绿色和蓝色中的其中一者。
进一步的,所述重叠单元包括第一重叠单元、第二重叠单元和第三重叠单元;
其中,所述第一重叠单元包括所述第一色阻单元和所述第二色阻单元的重叠部分,所述第二重叠单元包括所述第二色阻单元和所述第三色阻单元的重叠部分,所述第三重叠单元包括所述第三色阻单元和所述第一色阻单元的重叠部分。
进一步的,所述平坦层上还设置有像素电极,所述像素电极在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
进一步的,所述阵列基板还包括:
设置于所述衬底上方的第一金属层;
设置于所述第一金属层上的绝缘层;
设置于所述绝缘层上的有源层;
其中,所述第二金属层设置于所述绝缘层上,所述钝化层覆盖所述第二金属层和所述有源层;所述平坦层上设置有光阻层,所述光阻层在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
进一步的,所述第一金属层包括栅极金属层,所述第二金属层还包括与所述有源层电性连接且位置与所述栅极金属层相对应的源漏金属层,所述光阻层包括位置与所述源漏金属层相对应的主支撑柱和副支撑柱。
进一步的,所述主支撑柱与所述源漏金属层之间也设置有重叠单元,所述重叠单元在所述衬底上的正投影至少覆盖所述源漏金属层在所述衬底上的部分正投影。
本发明还提供一种显示面板,所述显示面板包括彩膜基板以及阵列基板,所述彩膜基板与所述阵列基板之间设置有液晶层;所述阵列基板包括:
衬底;
设置在所述衬底上方的第二金属层;
设置于所述第二金属层上的钝化层;
设置在所述钝化层上的色阻层;
设置在所述色阻层上的平坦层;
其中,所述色阻层包括多个色阻单元,至少部分相邻所述色阻单元部分重叠,相邻所述色阻单元的重叠部分形成重叠单元;所述第二金属层包括间隔分布的数据走线,所述重叠单元在所述衬底上的正投影至少覆盖所述数据走线在所述衬底上的部分正投影。
进一步的,所述显示面板的液晶层采用IPS模式。
进一步的,所述重叠单元在所述衬底上的正投影完全覆盖所述数据走线在所述衬底上的正投影。
进一步的,所述色阻单元按阵列排布,沿所述数据走线长度方向排布且相邻的所述色阻单元部分重叠以形成所述重叠单元。
进一步的,所述色阻单元包括第一色阻单元、第二色阻单元和第三色阻单元;
其中,所述第一色阻单元、所述第二色阻单元和所述第三色阻单元的色阻颜色互不相同,且分别对应红色、绿色和蓝色中的其中一者。
进一步的,所述重叠单元包括第一重叠单元、第二重叠单元和第三重叠单元;
其中,所述第一重叠单元包括所述第一色阻单元和所述第二色阻单元的重叠部分,所述第二重叠单元包括所述第二色阻单元和所述第三色阻单元的重叠部分,所述第三重叠单元包括所述第三色阻单元和所述第一色阻单元的重叠部分。
进一步的,所述平坦层上还设置有像素电极,所述像素电极在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
进一步的,所述阵列基板还包括:
设置于所述衬底上方的第一金属层;
设置于所述第一金属层上的绝缘层;
设置于所述绝缘层上的有源层;
其中,所述第二金属层设置于所述绝缘层上,所述钝化层覆盖所述第二金属层和所述有源层;所述平坦层上设置有光阻层,所述光阻层在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
进一步的,所述第一金属层包括栅极金属层,所述第二金属层还包括与所述有源层电性连接且位置与所述栅极金属层相对应的源漏金属层,所述光阻层包括位置与所述源漏金属层相对应的主支撑柱和副支撑柱。
进一步的,所述主支撑柱与所述源漏金属层之间也设置有重叠单元,所述重叠单元在所述衬底上的正投影至少覆盖所述源漏金属层在所述衬底上的部分正投影。
有益效果
显示面板使用BPS架构设计,能够有效防止显示面板弯折过程中由于阵列基板和彩膜基板发生错位引起的遮光不良,同时显示面板的液晶层采用IPS模式,能够有效的防止在弯折过程中液晶盒不均导致显示面板显示效果变差,而阵列基板中利用相邻色阻单元部分重叠形成的重叠单对数据走线起到遮光效果,从而在即使不采用电学遮光的前提下,也能实现阵列基板中数据走线处的遮光设计,有利于在显示面板的弯折情况下达到良好的遮光效果,防止漏光和混色的发生。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明具体实施方式中阵列基板沿第一方向的纵截面示意图;
图2为本发明具体实施方式中阵列基板沿第二方向的纵截面示意图;
图3为本发明具体实施方式中显示面板的结构示意图。
附图标记:
10、阵列基板;11、衬底;12、缓冲层;13、第一金属层;131、栅极金属层;132、扫描走线;14、绝缘层;15、第二金属层;151、数据走线;152、源漏金属层;16、有源层;17、钝化层;18、色阻层;181、色阻单元;1811、重叠单元;19、平坦层;20、液晶层;30、彩膜基板;40、光阻层;41、黑色光阻层;42、主支撑柱;43、副支撑柱;50、像素电极。
本发明的实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
本发明针对现有的采用IPS模式的液晶显示面板中,上基板无ITO,无法实现电性遮光,数据走线处有混色和漏光风险的技术问题。本发明可以解决上述问题。
一种阵列基板,如图1所示,所述阵列基板10包括衬底11、第二金属层15、钝化层17、色阻层18以及平坦层19。
其中,所述衬底11包括柔性衬底,所述柔性衬底的制备材料包括聚酰亚胺。
其中,所述第二金属层15设置在所述衬底11的上方,所述第二金属层15包括间隔分布的数据走线151以及源漏金属层152,所述数据走线151的长度方向为第一方向,所述源漏金属层152用以进行信号传输。
其中,所述钝化层17设置在所述第二金属层15上,所述钝化层17用以保护所述第二金属层15,防止所述第二金属层15与其它金属接触导致短路。
在一种实施方式中,所述钝化层17的制作材料包括氮化硅和氧化硅中的至少一者。
其中,所述色阻层18设置在所述钝化层17上,所述平坦层19设置于所述钝化层17上且覆盖所述色阻层18,所述色阻层18用以将穿过所述色阻层18的光过滤为目标颜色的光。
具体的,所述色阻层18包括多个色阻单元181,至少部分相邻所述色阻单元181部分重叠,相邻所述色阻单元181的重叠部分形成重叠单元1811,所述重叠单元1811在所述衬底11上的正投影至少覆盖所述数据走线151在所述衬底11上的部分正投影。
利用相邻色阻单元181部分重叠形成的重叠单元1811对数据走线151起到遮光效果,利用物理光学特性进行遮光,从而在即使不采用电学遮光的前提下,也能实现阵列基板10中数据走线151处的遮光设计,防止数据走线151处产生混色和漏光。
进一步的,所述重叠单元1811在所述衬底11上的正投影完全覆盖所述数据走线151在所述衬底11上的正投影。
进一步的,所述色阻单元181按阵列排布,沿所述数据走线151长度方向排布且相邻的所述色阻单元181部分重叠以形成所述重叠单元1811,即沿第一方向排布且相邻的所述色阻单元181部分重叠以形成所述重叠单元1811。
具体的,所述色阻单元181包括第一色阻单元、第二色阻单元和第三色阻单元。
其中,所述第一色阻单元、所述第二色阻单元和所述第三色阻单元的色阻颜色互不相同,且分别对应红色、绿色和蓝色中的其中一者。
进一步的,所述重叠单元1811包括第一重叠单元、第二重叠单元和第三重叠单元。
其中,所述第一重叠单元包括所述第一色阻单元和所述第二色阻单元的重叠部分,所述第二重叠单元包括所述第二色阻单元和所述第三色阻单元的重叠部分,所述第三重叠单元包括所述第三色阻单元和所述第一色阻单元的重叠部分。
在一实施方式中,所述第一色阻单元与所述第二色阻单元部分重叠,所述第一色阻单元与所述第二色阻单元的重叠部分同时与所述第三色阻单元重叠,从而形成重叠单元1811。对于本领域技术人员可知,红色、绿色和蓝色为三原色,而红色、绿色和蓝色三者的混合色为黑色,从而对数据走线151起到更好的遮光效果。
具体的,所述平坦层19上还设置有像素电极50,所述像素电极50在所述衬底11上的正投影与所述数据走线151在所述衬底11上的正投影互不重合。
在一种实施方式中,所述像素电极50的制作材料包括但不限于氧化铟锌。
如图2所示,所述阵列基板10还包括缓冲层12、第一金属层13、绝缘层14以及有源层16。
其中,所述缓冲层12设置在所述衬底11上,所述缓冲层12的制备材料为氮化硅和氧化硅中的一种或多种。
其中,所述第一金属层13设置在所述缓冲层12上,所述第一金属层13包括栅极金属层131和扫描走线132,所述栅极金属层131包括用于传递扫描信号的栅极线,所述扫描走线132的长度方向为第二方向。
在一实施方式中,所述第二方向与所述第一方向之间不相互平行。
在一实施方式中,所述第一方向与所述第二方向纵横交替,即,所述重叠单元1811与所述扫描走线132纵横交替分布。
其中,所述绝缘层14设置在所述缓冲层12上且覆盖所述第一金属层13,所述第二金属层15设置在所述绝缘层14上,所述绝缘层14用以防止所述第一金属层13和所述第二金属层15之间发生短路。
其中,所述有源层16设置在所述绝缘层14上且所述有源层16的位置与所述栅极金属层131相对应,所述源漏金属层152的位置与所述栅极金属层131相对应且所述源漏金属层152与所述有源层16电性连接。
所述有源层16为有源半导体层,在一实施方式中,所述有源层16的制备材料为氧化铟镓锌。
其中,所述平坦层19上设置有光阻层40,所述光阻层40在所述衬底11上的正投影与所述数据走线151在所述衬底11上的正投影互不重合。
在一实施方式中,所述光阻层40包括黑色光阻层41以及位置与所述源漏金属层152相对应的主支撑柱42和副支撑柱43。
所述主支撑柱42与所述源漏金属层152之间也设置有重叠单元1811,所述重叠单元1811在所述衬底11上的正投影至少覆盖所述源漏金属层152在所述衬底11上的部分正投影。
在一实施方式中,位于所述主支撑柱42与所述源漏金属层152之间的重叠单元1811在所述衬底11上的正投影完全覆盖所述源漏金属层152在所述衬底11上的正投影。
位于所述主支撑柱42与所述源漏金属层152之间的重叠单元1811对所述栅极金属层131起到遮光作用的同时,与所述主支撑柱42共同承担支撑作用。
基于上述阵列基板10,本发明还提供一种显示面板,如图3所示,所述显示面板包括彩膜基板30、上述的阵列基板10以及位于所述彩膜基板30与所述阵列基板10之间的液晶层20,所述显示面板的液晶层20采用IPS模式。
本发明的有益效果为:本申请中的显示面板使用BPS架构设计,能够有效防止显示面板弯折过程中由于阵列基板和彩膜基板发生错位引起的遮光不良,同时显示面板的液晶层采用IPS模式,能够有效的防止在弯折过程中液晶盒不均导致显示面板显示效果变差,而阵列基板10中利用相邻色阻单元181部分重叠形成的重叠单对数据走线151起到遮光效果,从而在即使不采用电学遮光的前提下,也能实现阵列基板10中数据走线151处的遮光设计,有利于在显示面板的弯折情况下达到良好的遮光效果,防止漏光和混色的发生。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (19)

  1. 一种阵列基板,其中,所述阵列基板包括:
    衬底;
    设置在所述衬底上方的第二金属层;
    设置于所述第二金属层上的钝化层;
    设置在所述钝化层上的色阻层;
    设置在所述色阻层上的平坦层;
    其中,所述色阻层包括多个色阻单元,至少部分相邻所述色阻单元部分重叠,相邻所述色阻单元的重叠部分形成重叠单元;所述第二金属层包括间隔分布的数据走线,所述重叠单元在所述衬底上的正投影至少覆盖所述数据走线在所述衬底上的部分正投影。
  2. 根据权利要求1所述的阵列基板,其中,所述重叠单元在所述衬底上的正投影完全覆盖所述数据走线在所述衬底上的正投影。
  3. 根据权利要求1所述的阵列基板,其中,所述色阻单元按阵列排布,沿所述数据走线长度方向排布且相邻的所述色阻单元部分重叠以形成所述重叠单元。
  4. 根据权利要求1所述的阵列基板,其中,所述色阻单元包括第一色阻单元、第二色阻单元和第三色阻单元;
    其中,所述第一色阻单元、所述第二色阻单元和所述第三色阻单元的色阻颜色互不相同,且分别对应红色、绿色和蓝色中的其中一者。
  5. 根据权利要求4所述的阵列基板,其中,所述重叠单元包括第一重叠单元、第二重叠单元和第三重叠单元;
    其中,所述第一重叠单元包括所述第一色阻单元和所述第二色阻单元的重叠部分,所述第二重叠单元包括所述第二色阻单元和所述第三色阻单元的重叠部分,所述第三重叠单元包括所述第三色阻单元和所述第一色阻单元的重叠部分。
  6. 根据权利要求1所述的阵列基板,其中,所述平坦层上还设置有像素电极,所述像素电极在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
  7. 根据权利要求1所述的阵列基板,其中,所述阵列基板还包括:
    设置于所述衬底上方的第一金属层;
    设置于所述第一金属层上的绝缘层;
    设置于所述绝缘层上的有源层;
    其中,所述第二金属层设置于所述绝缘层上,所述钝化层覆盖所述第二金属层和所述有源层;所述平坦层上设置有光阻层,所述光阻层在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
  8. 根据权利要求7所述的阵列基板,其中,所述第一金属层包括栅极金属层,所述第二金属层还包括与所述有源层电性连接且位置与所述栅极金属层相对应的源漏金属层,所述光阻层包括位置与所述源漏金属层相对应的主支撑柱和副支撑柱。
  9. 根据权利要求8所述的阵列基板,其中,所述主支撑柱与所述源漏金属层之间也设置有重叠单元,所述重叠单元在所述衬底上的正投影至少覆盖所述源漏金属层在所述衬底上的部分正投影。
  10. 一种显示面板,其中,所述显示面板包括彩膜基板以及阵列基板,所述彩膜基板与所述阵列基板之间设置有液晶层;所述阵列基板包括:
    衬底;
    设置在所述衬底上方的第二金属层;
    设置于所述第二金属层上的钝化层;
    设置在所述钝化层上的色阻层;
    设置在所述色阻层上的平坦层;
    其中,所述色阻层包括多个色阻单元,至少部分相邻所述色阻单元部分重叠,相邻所述色阻单元的重叠部分形成重叠单元;所述第二金属层包括间隔分布的数据走线,所述重叠单元在所述衬底上的正投影至少覆盖所述数据走线在所述衬底上的部分正投影。
  11. 根据权利要求10所述的显示面板,其中,所述显示面板的液晶层采用IPS模式。
  12. 根据权利要求10所述的显示面板,其中,所述重叠单元在所述衬底上的正投影完全覆盖所述数据走线在所述衬底上的正投影。
  13. 根据权利要求10所述的显示面板,其中,所述色阻单元按阵列排布,沿所述数据走线长度方向排布且相邻的所述色阻单元部分重叠以形成所述重叠单元。
  14. 根据权利要求10所述的显示面板,其中,所述色阻单元包括第一色阻单元、第二色阻单元和第三色阻单元;
    其中,所述第一色阻单元、所述第二色阻单元和所述第三色阻单元的色阻颜色互不相同,且分别对应红色、绿色和蓝色中的其中一者。
  15. 根据权利要求14所述的显示面板,其中,所述重叠单元包括第一重叠单元、第二重叠单元和第三重叠单元;
    其中,所述第一重叠单元包括所述第一色阻单元和所述第二色阻单元的重叠部分,所述第二重叠单元包括所述第二色阻单元和所述第三色阻单元的重叠部分,所述第三重叠单元包括所述第三色阻单元和所述第一色阻单元的重叠部分。
  16. 根据权利要求10所述的显示面板,其中,所述平坦层上还设置有像素电极,所述像素电极在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
  17. 根据权利要求10所述的显示面板,其中,所述阵列基板还包括:
    设置于所述衬底上方的第一金属层;
    设置于所述第一金属层上的绝缘层;
    设置于所述绝缘层上的有源层;
    其中,所述第二金属层设置于所述绝缘层上,所述钝化层覆盖所述第二金属层和所述有源层;所述平坦层上设置有光阻层,所述光阻层在所述衬底上的正投影与所述数据走线在所述衬底上的正投影互不重合。
  18. 根据权利要求17所述的显示面板,其中,所述第一金属层包括栅极金属层,所述第二金属层还包括与所述有源层电性连接且位置与所述栅极金属层相对应的源漏金属层,所述光阻层包括位置与所述源漏金属层相对应的主支撑柱和副支撑柱。
  19. 根据权利要求18所述的显示面板,其中,所述主支撑柱与所述源漏金属层之间也设置有重叠单元,所述重叠单元在所述衬底上的正投影至少覆盖所述源漏金属层在所述衬底上的部分正投影。
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110687704B (zh) * 2019-10-23 2022-09-27 Tcl华星光电技术有限公司 检测影响coa基板拼接曝光缺陷的因素的方法
CN111474787B (zh) * 2020-05-12 2022-04-08 深圳市华星光电半导体显示技术有限公司 阵列基板及显示面板
US11415829B2 (en) 2020-08-10 2022-08-16 Tcl China Star Optoelectronics Technology Co., Ltd. Liquid crystal display panel and liquid crystal display device
CN111965876B (zh) * 2020-08-10 2022-02-22 Tcl华星光电技术有限公司 液晶显示面板及液晶显示装置
CN113097268B (zh) * 2021-03-30 2024-04-12 上海天马微电子有限公司 一种显示面板及电子设备
CN114326233A (zh) * 2021-12-30 2022-04-12 惠科股份有限公司 阵列基板、显示面板及显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104375313A (zh) * 2014-11-12 2015-02-25 深圳市华星光电技术有限公司 液晶显示面板及液晶显示面板的制造方法
CN105759520A (zh) * 2016-04-21 2016-07-13 深圳市华星光电技术有限公司 液晶显示面板
US20160202543A1 (en) * 2015-01-14 2016-07-14 Samsung Display Co., Ltd. Liquid crystal display device
CN108535909A (zh) * 2018-04-17 2018-09-14 深圳市华星光电技术有限公司 Bps型阵列基板的制作方法及bps型阵列基板

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100614332B1 (ko) * 2004-03-30 2006-08-18 엘지.필립스 엘시디 주식회사 액정표시장치 및 그 제조방법
JP2016031513A (ja) * 2014-07-30 2016-03-07 大日本印刷株式会社 高精細カラーフィルタ
CN104656333A (zh) * 2015-03-18 2015-05-27 深圳市华星光电技术有限公司 Coa型液晶面板的制作方法及coa型液晶面板
KR20170007656A (ko) * 2015-07-10 2017-01-19 삼성디스플레이 주식회사 표시 장치용 어레이 기판
CN105093746B (zh) * 2015-08-10 2017-10-17 深圳市华星光电技术有限公司 阵列基板及液晶显示面板
KR102515807B1 (ko) * 2016-01-11 2023-03-31 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
CN107229152B (zh) * 2017-07-04 2020-01-31 深圳市华星光电半导体显示技术有限公司 液晶显示面板的制作方法及液晶显示面板
CN107247378B (zh) * 2017-07-19 2018-11-09 深圳市华星光电半导体显示技术有限公司 一种显示面板及其制程
CN108873449B (zh) * 2018-06-20 2021-05-28 昆山龙腾光电股份有限公司 彩色滤光基板及液晶显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104375313A (zh) * 2014-11-12 2015-02-25 深圳市华星光电技术有限公司 液晶显示面板及液晶显示面板的制造方法
US20160202543A1 (en) * 2015-01-14 2016-07-14 Samsung Display Co., Ltd. Liquid crystal display device
CN105759520A (zh) * 2016-04-21 2016-07-13 深圳市华星光电技术有限公司 液晶显示面板
CN108535909A (zh) * 2018-04-17 2018-09-14 深圳市华星光电技术有限公司 Bps型阵列基板的制作方法及bps型阵列基板

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