WO2020253258A1 - 微型发光二极管芯片的键合方法 - Google Patents

微型发光二极管芯片的键合方法 Download PDF

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Publication number
WO2020253258A1
WO2020253258A1 PCT/CN2020/076481 CN2020076481W WO2020253258A1 WO 2020253258 A1 WO2020253258 A1 WO 2020253258A1 CN 2020076481 W CN2020076481 W CN 2020076481W WO 2020253258 A1 WO2020253258 A1 WO 2020253258A1
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WIPO (PCT)
Prior art keywords
chip
bonding
solder
emitting diode
glue
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PCT/CN2020/076481
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English (en)
French (fr)
Inventor
董小彪
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成都辰显光电有限公司
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Publication of WO2020253258A1 publication Critical patent/WO2020253258A1/zh
Priority to US17/388,398 priority Critical patent/US20210359154A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Definitions

  • the present application relates to the field of display technology, and in particular to a bonding method of miniature light-emitting diode chips.
  • Micro-LED display technology has gradually become a research hotspot due to its advantages of high brightness, high response speed, low power consumption, and long life.
  • a massive transfer and bonding process of the chip is required.
  • the bonding process refers to aligning the chip with the backplane, and then soldering the positive and negative poles of the chip to the backplane
  • the upper electrode metal is electrically connected.
  • the existing chip bonding method has problems that when the positive electrode and negative electrode of the LED chip are bonded to the backplane, the chip and the backplane are prone to thermal mismatch, warpage, and affect the service life of the transfer head.
  • the embodiment of the present application provides a bonding method of a miniature light-emitting diode chip, which is used to solve the problem that when the anode and cathode of the LED chip are bonded to the backplane in the existing bonding method, the chip and the backplane are prone to thermal mismatch, warping and Problems affecting the service life of the transfer head.
  • the embodiment of the present application provides a bonding method of a miniature light emitting diode chip, including:
  • a backplane is provided, the backplane includes a plurality of chip bonding regions, and two solder pillars are formed on the electrodes of each of the chip bonding regions;
  • the positive electrode and the solder pillar, and the negative electrode and the solder pillar that are bonded by welding are welded.
  • a glue groove is formed in the chip bonding area of the backplane, and a glue layer is formed in the glue groove.
  • the bonding method of the miniature light-emitting diode chip provided by the embodiment of the present application solves the problem of the positive and negative poles of the LED chip in the related art When bonding with the backplane, the chip and the backplane are prone to thermal mismatch and warpage.
  • the transfer head used for picking up and moving the chip can be removed, thus avoiding the impact on the life of the transfer head during subsequent heating.
  • FIG. 1 is a schematic diagram 1 of the structure of bonding a chip and a backplane in an embodiment of the application;
  • FIG. 2 is the second schematic diagram of the structure of bonding the chip and the backplane in the embodiment of the application;
  • FIG. 3 is the third schematic diagram of the structure of bonding the chip and the backplane in the embodiment of the application;
  • FIG. 4 is a fourth schematic diagram of the structure of bonding the chip and the backplane in the embodiment of the application.
  • Solder usually includes high melting point solder and low melting point solder.
  • high melting point solder When high melting point solder is used for soldering, it is generally necessary to heat the solder to above 100°C to melt the solder to connect the chip to the backplane.
  • high heating temperature due to the high heating temperature, it is easy to cause thermal mismatch The problem of misalignment and poor connection effect, and will reduce the life of the transfer head; when the low melting point solder is used for soldering, because the chip will heat during use, it is easy to cause the low melting point solder to remelt, resulting in electrical connection failure problem.
  • the existing bonding method of the micro light emitting diode chip has the problems that when the anode and the cathode of the LED chip are bonded to the back plate, the chip and the back plate are prone to thermal mismatch, warping, and affect the service life of the transfer head.
  • the embodiments of the present application provide an improved method for bonding micro light emitting diode chips, which includes forming a glue groove in each chip bonding area of the backplane, forming a glue layer in the glue groove, and using a transfer head Pick up and move the chip so that the positive and negative electrodes of the chip are aligned with the two solder columns respectively; heat the back plate to melt the glue layer into liquid glue; press down on the transfer head to immerse the positive and negative electrodes in the liquid glue; wait to cool to room temperature The liquid glue is solidified, and the positive electrode and the negative electrode are respectively bonded to the two solder columns; the transfer head is removed; the positive electrode and the solder column, and the negative electrode and the solder column that are bonded are welded.
  • the bonding method of the miniature light-emitting diode chip provided by the embodiment of the present application solves the problem of thermal mismatch, warpage, and influence on the transfer head during bonding when the anode and cathode of the LED chip are bonded to the backplane in the related art.
  • the problem of service life is the problem of service life.
  • An embodiment of the present application provides a method for bonding a miniature light-emitting diode chip, including:
  • Step 1 Provide a backplane 20.
  • the backplane 20 includes a plurality of chip bonding areas, and two solder pillars 21 are formed on the electrodes of each chip bonding area.
  • the backplane 20 in the embodiment of the present application includes a plurality of chip bonding areas, and each chip bonding area is used for bonding with a chip 10.
  • Two solder pillars 21 are formed on the electrode of each chip bonding area, and the solder pillars 21 can be formed by metal thermal vapor deposition, lift-off and other processes.
  • the solder column 21 may be made of high melting point solder.
  • high melting point solder refers to conventional solders in the field with a melting point above 150°C, such as metal indium or metal tin. The use of high melting point solder can prevent melting due to heat during use, thereby preventing the chip 10 and the backplane The electrical connection between 20 failed.
  • Step 2 A glue groove 22 is formed between the two solder pillars 21 in each chip bonding area, so that the two solder pillars 21 are located in the glue groove 22.
  • the glue groove 22 is formed in the chip bonding area of the backplane 20.
  • the glue groove 22 has an opening.
  • the side wall of the glue groove 22 is set as a glue.
  • the glue can be photoresist.
  • the bottom of the glue groove 22 is The back plate 20 faces the surface of the chip.
  • the glue tank 22 is used to provide a accommodating space for the subsequent formation of a glue layer, and at the same time prevent the glue layer from melting to form a liquid glue from flowing.
  • the glue groove 22 in the embodiment of the present application is a groove made of photoresist.
  • Step 3 Form the glue layer 23 in the glue tank 22 and make the glue layer 23 cover the top of the solder pillar 21.
  • the formation method of forming the glue layer 23 in the glue tank 22 may be spin coating or inkjet printing.
  • the melting point of the glue layer 23 is 50° C.-60° C., and the melting point of the glue layer 23 is lower than the melting point of the glue tank 22.
  • the adhesive layer 23 is used to provide adhesion between the positive and negative electrodes of the chip and the solder pillars 21 in the chip bonding area on the back plate 20, so that the positive and negative electrodes of the chip are bonded to the chip on the back plate 20.
  • the solder column 21 in the bonding area is relatively fixed before welding to prevent dislocation during welding and ensure the accuracy of positioning during welding.
  • the height of the adhesive layer 23 is higher than the height of the solder column 21. This arrangement ensures that the positive electrode, the negative electrode and the solder column 21 of the chip can be located in the adhesive layer 23 at the same time, which is convenient for the positive electrode, The negative electrode and the solder pillar 21 are bonded to each other.
  • Step 4 Move the chip 10 so that the positive electrode 11 and the negative electrode 12 of the chip 10 are aligned with the two solder pillars 21 respectively.
  • the transfer head 30 can be used to pick up and move the chip 10.
  • the transfer head 30 first picks up the chip 10, and then drives the chip 10 to move above the chip bonding area of the backplane 20, so that the positive electrode 11 of the chip 10 is aligned with one of the solder pillars 21, and the negative electrode 12 of the chip 10 is aligned with the other.
  • One solder pillar 21 is aligned.
  • Step 5 Heat the back plate 20 to melt the glue layer 23 into liquid glue.
  • the back plate 20 is heated first to increase the temperature until the glue layer 23 melts until the glue layer 23 melts to form a liquid glue . Since the adhesive layer 23 used in the embodiment of the present application has a low melting point, when the back plate 20 is heated, the solder pillars 21 and the glue groove 22 on the back plate 20 will not be heated and melted.
  • Step 6 Move the chip 10 downward, so that the positive electrode 11 and the negative electrode 12 are immersed in the liquid glue.
  • the transfer head 30 can be used to drive the chip 10 to move downward, so that the positive electrode 11 and the negative electrode 12 are immersed in the liquid glue. At this time, the part where the positive electrode 11 contacts the solder column 21, the negative electrode 12 and the solder column 21 The contacting parts are all immersed in liquid glue to ensure that they can be bonded to each other in the future.
  • Step 7 After cooling to room temperature to solidify the liquid glue, the positive electrode 11 and the negative electrode 12 are bonded to the two solder pillars 21 respectively.
  • the chip 10 and the back plate 20 are first cooled to lower the temperature to room temperature, so that the liquid glue in the glue tank 22 is solidified again to form the glue layer 23.
  • the solidified glue layer 23 connects the positive electrode 11 with The solder column 21, the negative electrode 12 and the solder column 21 are bonded together, so that the chip 10 and the back plate 20 are relatively fixed, and dislocation during subsequent soldering is avoided.
  • the transfer head 30 is removed; since the chip 10 and the back plate 20 are relatively fixed, the transfer head can be 30 removed; because the solder column 21 is a high-temperature solder, when the solder column 21 is connected to the positive electrode 11 and the negative electrode 12, it needs to be heated to the melting point of the solder column 21. Therefore, the removal of the transfer head 30 ensures that the subsequent welding connection of the positive electrode 11, When the negative electrode 12 and the solder column 21 are used, the service life of the transfer head 30 will not be affected by the excessively high soldering temperature.
  • Step 8 Weld the positive electrode 11 and the solder column 21, the negative electrode 12 and the solder column 21 that are bonded together.
  • the soldering process is a flip-chip soldering process and a reflow soldering process. After the transfer head 30 is removed, first heat the back plate 20 to melt the solder pillar 21, so that the solder pillar 21 is further electrically connected to the positive electrode 11 and the negative electrode 12 of the chip 10 bonded to it, and then can pass through The reflow soldering process further improves the reliability of the connection between the chip 10 and the backplane 20.
  • the bonding method of the chip 10 forms a glue groove 22 in the chip bonding area of the backplane 20, and a glue layer 23 is formed in the glue groove 22.
  • the positive electrode 11, the negative electrode 12 and the solder column 21 of the chip 10 are first bonded together, thereby ensuring the relative fixation between the positive electrode 11, the negative electrode 12 and the solder column 21, avoiding misalignment, and ensuring the bonding of the chip 10 and the back plate 20
  • the positioning is accurate, and the transfer head 30 of the pick-up chip 10 can be removed after bonding. After the transfer head 30 is removed, the back plate 20 is heated to connect the positive electrode 11 and the solder column 21, and the negative electrode 12 and the solder column 21.
  • the chip bonding method provided in the embodiments of the present application solves the problems that the chip and the backplane are prone to thermal mismatch, warpage, and affect the service life of the transfer head when the positive and negative electrodes of the chip are bonded to the backplane in the related art.
  • two solder pillars 21 are formed on the electrodes of the chip bonding area using the following method: two solder pillars 21 are formed on the electrodes of the chip bonding area by a metal thermal evaporation process.
  • the solder column 21 is a high melting point solder column
  • the high melting point solder column is an indium solder column or a tin solder column.
  • the embodiment of the present application adopts high melting point solder, which avoids the subsequent use of the chip 10 to cause heat to cause the solder to melt.
  • forming the glue groove 22 in each chip bonding area includes: spin-coating photoresist on the side of the backplane 20 where the solder pillars 21 are arranged; baking and exposing the photoresist , Developing and hard baking, forming a glue tank 22.
  • the cross-sectional area of the opening of the glue groove 22 is larger than the cross-sectional area of the chip 10.
  • the cross-sectional area of the opening of the glue tank 22 is larger than the cross-sectional area of the chip 10, which ensures that the chip 10 can extend into the glue tank 22 so that the positive electrode 11 and the negative electrode 12 are respectively bonded to the solder pillars 21 on the back plate 20 .
  • forming the glue layer 23 in the glue tank 22 includes: ink-jet printing a low melting point polymer in the glue tank 22 to form the glue layer 23.
  • the method of forming the glue layer 23 is inkjet printing, in which the low melting point polymer is inkjet printed in the glue tank 22 to form the glue layer 23.
  • the low melting point polymer is polyethylene glycol.
  • polyethylene glycol PEG-2000 can be used.
  • Polyethylene glycol is a non-ionic water-soluble polymer.
  • PEG-2000 can be used as a welding agent and hot melt adhesive.
  • the embodiments of the present application can also use other polymers that meet the requirements of low melting points.
  • the positive electrode 11 and the solder column 21, the negative electrode 12 and the solder column 21 that are bonded by welding include: providing a hard pressing plate 40, and pressing the hard pressing plate 40 on the chip 10 facing away from the back plate 20. Side; heating the back plate 20 to melt the solder column 21, press down the hard press plate 40, so that the positive electrode 11 and the negative electrode 12 are respectively connected with the solder column 21; cool to room temperature, remove the hard press plate 40.
  • the hard pressing plate 40 may be a hard resin plate or a hard glass plate. As shown in FIG. 4, after the positive electrode 11 and the negative electrode 12 are respectively bonded to the solder pillar 21, further welding is required to electrically connect the positive electrode 11 and the negative electrode 12 to the solder pillar 21, respectively. In the embodiment of the present application, while heating the back plate 20 and the solder column 21, the hard pressing plate 40 presses the side of the chip 10 away from the back plate 20 to apply a force for the chip 10 to move toward the back plate 20. The solder column 21 is melted and welded to the positive electrode 11 and the negative electrode 12 bonded to the solder column 21 to realize electrical connection. The embodiment of the present application ensures the reliability of the connection between the positive electrode 11 and the negative electrode 12 and the solder column 21 by the hard pressing plate 40 acting on the chip 10.
  • the bonding method of the chip 10 further includes removing the adhesive layer 23 after welding the positive electrode 11 and the solder column 21, the negative electrode 12 and the solder column 21 that are bonded together.
  • the adhesive layer 23 can be removed by solvent cleaning, and the solvent used for cleaning can be water or ethanol.
  • the glue layer 23 is made of polyethylene glycol, since polyethylene glycol is a water-soluble polymer, the glue layer 23 can be cleaned by water.
  • the bonding method of the chip 10 further includes performing reflow soldering on the chip 10 and the backplane 20 after the adhesive layer 23 is removed.
  • Reflow soldering can further improve the stability of the connection between the positive electrode 11 and the negative electrode 12 and the solder column 21 respectively, thereby improving the reliability of the electrical connection between the chip 10 and the back plate 20.

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Abstract

本申请提供一种微型发光二极管芯片的键合方法,该方法包括提供背板,背板的每个芯片键合区的电极上形成有两个焊料柱;在芯片键合区内形成胶槽,在胶槽内形成胶层,使胶层覆盖焊料柱的顶部;移动芯片,使芯片的正极和负极分别与两个焊料柱对准;加热背板,使胶层融化为液体胶;使芯片的正极和负极浸入液体胶内;待冷却至室温使正极和负极分别与两个焊料柱粘合;移走转移头;焊接相粘合的正极与焊料柱、负极与焊料柱。本申请提供的芯片的键合方法解决了芯片的正极和负极与背板bonding时芯片与背板容易产生热失配、翘曲以及影响转移头的使用寿命的问题。

Description

微型发光二极管芯片的键合方法 技术领域
本申请涉及显示技术领域,尤其涉及一种微型发光二极管芯片的键合方法。
背景技术
微型发光二极管(Micro-LED)显示技术由于具有高亮度、高响应速度、低功耗、长寿命等优点,逐渐成为研究热点。在制造大、中尺寸的微型发光二极管显示器过程中,需要进行芯片的巨量转移和键合工艺,键合工艺是指将芯片与背板对齐后,用焊料将芯片的正极和负极与背板上的电极金属电连接。
现有的芯片的键合方法存在LED芯片的正极和负极与背板绑定(bonding)时芯片与背板容易产生热失配、翘曲以及影响转移头的使用寿命的问题。
发明内容
本申请实施例提供一种微型发光二极管芯片的键合方法,用以解决现有的键合方法中LED芯片的正极和负极与背板bonding时芯片与背板容易产生热失配、翘曲以及影响转移头的使用寿命的问题。
为了实现上述目的,本申请实施例提供如下技术方案:
本申请实施例提供了一种微型发光二极管芯片的键合方法,包括:
提供背板,所述背板包括多个芯片键合区,每个所述芯片键合区的电极上形成有两个焊料柱;
在每个所述芯片键合区内形成胶槽,使两个所述焊料柱位于所述胶槽内;
在所述胶槽内形成胶层,并使所述胶层覆盖所述焊料柱的顶部;
移动芯片,使所述芯片的正极和负极分别与两个所述焊料柱对准;
加热所述背板,使所述胶层融化为液体胶;
将所述芯片向下移动,使所述正极和所述负极浸入所述液体胶内;
待冷却至室温使所述液体胶凝固,使所述正极和所述负极分别与两个所述焊料柱粘合;
焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱。
本申请实施例提供的微型发光二极管芯片的键合方法具有如下优点:
在背板的芯片键合区内形成胶槽,在胶槽内形成胶层,通过胶层的粘合作用使芯片的正极、负极与焊料柱先粘接在一起,从而保证了正极、负极与焊料柱之间相对固定,避免产生错位,保证了芯片与背板键合时的定位准确,因此本申请实施例提供的微型发光二极管芯片的键合方法解决了相关技术中LED芯片的正极和负极与背板bonding时芯片与背板容易产生热失配、翘曲的问题。同时,在芯片的正极、负极与焊料柱粘接在一起后,用于拾取和移动芯片的转移头能够移走,因此还避免了后续加热时对转移头的寿命的影响。
附图说明
图1为本申请实施例中芯片与背板键合的结构示意图一;
图2为本申请实施例中芯片与背板键合的结构示意图二;
图3为本申请实施例中芯片与背板键合的结构示意图三;
图4为本申请实施例中芯片与背板键合的结构示意图四。
具体实施方式
焊料通常包括高熔点焊料和低熔点焊料,当使用高熔点焊料进行焊接时,一般需要加热到100℃以上熔解焊料以使芯片与背板连接,但是由于加热温度较高,容易造成热失配导致的错位、连接效果差的问题,而且会降低转移头的寿命;当使用低熔点焊料进行焊接后,由于芯片在使用过程中会发热,容易造成低熔点焊料发生重熔,导致电性连接失效的问题。
现有的微型发光二极管芯片的键合方法存在LED芯片的正极和负极与背板bonding时芯片与背板容易产生热失配、翘曲以及影响转移头的使用寿命的问题。
针对上述问题,本申请实施例提供了一种改进的微型发光二极管芯片 的键合方法,包括在背板的每个芯片键合区内形成胶槽,在胶槽内形成胶层,利用转移头拾取并移动芯片,使芯片的正极和负极分别与两个焊料柱对准;加热背板,使胶层融化为液体胶;下压转移头,使正极和负极浸入液体胶内;待冷却至室温使液体胶凝固,使正极和负极分别与两个焊料柱粘合;移走所述转移头;焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱。本申请实施例提供的微型发光二极管芯片的键合方法解决了相关技术中LED芯片的正极和负极与背板bonding时芯片与背板容易产生热失配、翘曲以及键合时影响转移头的使用寿命的问题。
为了使本申请实施例的上述目的、特征和优点能够更加明显易懂,下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请的一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其它实施例,均属于本申请保护的范围。
请参阅图1-图4,本申请实施例提供了一种微型发光二极管芯片的键合方法,包括:
步骤一:提供背板20,背板20包括多个芯片键合区,每个芯片键合区的电极上形成有两个焊料柱21。
如图1和图3所示,本申请实施例中背板20包括多个芯片键合区,每个芯片键合区用于与一个芯片10键合。每个芯片键合区的电极上形成有两个焊料柱21,焊料柱21可以通过金属热蒸镀、提离(lift-off)等工艺形成。在一种实施方式中,焊料柱21可采用高熔点焊料制成。本申请实施例中,高熔点焊料指的是金属铟或金属锡等熔点在150℃以上的本领域常规焊料,采用高熔点焊料能够防止在使用过程中因受热熔化,从而防止芯片10与背板20之间的电性连接失效。
步骤二:在每个芯片键合区内的两个焊料柱21之间形成胶槽22,使两个焊料柱21位于胶槽22内。
如图1所示,胶槽22形成在背板20的芯片键合区内,胶槽22具有开口,胶槽22的侧壁设置为胶体,胶体可以为光刻胶,胶槽22的底部为背板20面向芯片的表面。本申请实施例中胶槽22用于为后续形成胶层提 供容纳空间,同时防止胶层融化形成液体胶后产生流动。
此外,本申请实施例中的胶槽22为光刻胶制成的槽。
步骤三:在胶槽22内形成胶层23,并使胶层23覆盖焊料柱21的顶部。
在胶槽22内形成胶层23的形成方式可以为旋涂或喷墨打印等。本申请实施例中胶层23的熔点为50℃-60℃,且胶层23的熔点低于胶槽22的熔点。本申请实施例中胶层23用于为芯片的正极、负极与背板20上芯片键合区内的焊料柱21之间提供粘接力,使芯片的正极、负极与背板20上芯片键合区内的焊料柱21在焊接前相对固定,防止焊接时产生错位,保证焊接时定位的准确性。以背板20面向芯片的一侧面为基准,胶层23的高度高于焊料柱21的高度,这样的设置保证了芯片的正极、负极和焊料柱21能够同时位于胶层23中,便于正极、负极与焊料柱21相互粘接。
步骤四:移动芯片10,使芯片10的正极11和负极12分别与两个焊料柱21对准。
在本申请实施例中,如图2所示,可以利用转移头30对芯片10进行拾取和移动。例如,转移头30先将芯片10拾取,然后带动芯片10移动到背板20的芯片键合区上方,使芯片10的正极11与其中一个焊料柱21对准,使芯片10的负极12与另一个焊料柱21对准。
步骤五:加热背板20,使胶层23融化为液体胶。
如图3所示,当使芯片10的正极11、负极12分别与焊料柱21对准后,先加热背板20,使温度升高至胶层23产生融化,直至胶层23融化形成液体胶。本申请实施例中由于采用的胶层23的熔点较低,因此在加热背板20时,位于背板20上的焊料柱21以及胶槽22均不会受热融化。
步骤六:使芯片10向下移动,使正极11和负极12浸入液体胶内。
在上述实施方式的基础上,可以利用转移头30带动芯片10向下移动,使正极11和负极12浸入液体胶内,此时,正极11与焊料柱21接触的部分、负极12与焊料柱21接触的部分均被液体胶浸没,保证了后续能够相互粘接。
步骤七:待冷却至室温使液体胶凝固,使正极11和负极12分别与两个焊料柱21粘合。
本申请实施例中先对芯片10、背板20进行冷却,使温度降低至室温,从而使胶槽22内的液体胶重新凝固形成胶层23,同时,凝固状态的胶层23将正极11与焊料柱21、负极12与焊料柱21粘接在一起,从而使芯片10与背板20相对固定,避免了后续焊接时发生错位。
在上述实施方式的基础上,当正极11和负极12分别与两个焊料柱21粘合后,移走转移头30;由于芯片10与背板20相对固定,本申请实施例中可以将转移头30移走;由于焊料柱21为高温焊料,当焊料柱21与正极11、负极12连接时,需进行加热至焊料柱21的熔点温度,因此移走转移头30保证了后续焊接连接正极11、负极12与焊料柱21时,不会因焊接温度过高而影响转移头30的使用寿命。
步骤八:焊接相粘合的正极11与焊料柱21、负极12与焊料柱21。
本申请实施例中,焊接工艺为倒装焊工艺和回流焊工艺。当转移头30移走后,先加热背板20,使焊料柱21熔化,从而使焊料柱21进一步和与之相粘接的芯片10的正极11、负极12电性连接,然后还可以再通过回流焊工艺进一步提高芯片10与背板20之间连接的可靠性。
综上所述,本申请实施例提供的芯片10的键合方法在背板20的芯片键合区内形成胶槽22,在胶槽22内形成胶层23,通过胶层23的粘合作用使芯片10的正极11、负极12与焊料柱21先粘接在一起,从而保证了正极11、负极12与焊料柱21之间相对固定,避免产生错位,保证了芯片10与背板20键合时的定位准确,且粘接后能够将拾取芯片10的转移头30移走,移走转移头30后再加热背板20,对正极11与焊料柱21、负极12与焊料柱21进行连接,避免了高温对转移头30的影响。因此本申请实施例提供的芯片的键合方法解决了相关技术中芯片的正极和负极与背板bonding时芯片与背板容易产生热失配、翘曲以及影响转移头的使用寿命的问题。
在一种可能的实现方式中,在芯片键合区的电极上形成两个焊料柱21采用如下方法形成:通过金属热蒸镀工艺在芯片键合区的电极上形成两个焊料柱21。
在一种可能的实现方式中,焊料柱21为高熔点焊料柱,高熔点焊料柱为铟焊料柱或锡焊料柱。本申请实施例采用高熔点焊料,避免了后续在 使用过程中芯片10放热导致焊料方式熔化。
在一种可能的实现方式中,在每个芯片键合区内形成胶槽22包括:在背板20设置有焊料柱21的一侧旋涂光刻胶;对光刻胶进行烘烤、曝光、显影、硬烘,形成胶槽22。
在一种可能的实现方式中,以平行于芯片10和背板20的平面为截面,胶槽22的开口截面面积大于芯片10的截面面积。本申请实施例中,胶槽22的开口截面面积大于芯片10的截面面积,保证了芯片10能够伸入胶槽22内,使正极11、负极12分别与背板20上的焊料柱21粘接。
在一种可能的实现方式中,在胶槽22内形成胶层23包括:在胶槽22内喷墨打印低熔点聚合物,形成胶层23。本申请实施例中,形成胶层23的方式为喷墨打印,将低熔点聚合物喷墨打印在胶槽22内,从而形成胶层23。
在一种可能的实现方式中,低熔点聚合物为聚乙二醇。例如,可以采用聚乙二醇PEG-2000,聚乙二醇是非离子型的水溶性聚合物,PEG-2000可以用作焊接剂、热熔粘合剂。此外,本申请实施例也可以使用其他符合低熔点要求的聚合物。
在一种可能的实现方式中,焊接相粘合的正极11与焊料柱21、负极12与焊料柱21包括:提供硬质压板40,将硬质压板40压在芯片10背离背板20的一侧;加热背板20使焊料柱21熔化,下压硬质压板40,使正极11、负极12分别与焊料柱21连接;冷却至室温,移走硬质压板40。
硬质压板40可以为硬质树脂板或硬质玻璃板。如图4所示,当正极11、负极12分别与焊料柱21粘接后,需要通过进一步焊接使正极11、负极12分别与焊料柱21电性连接。本申请实施例中,在对背板20及焊料柱21进行加热的同时,通过硬质压板40压在芯片10背离背板20的一侧,施加给芯片10一个朝向背板20运动的力,使焊料柱21产生熔化并和与之相粘接的正极11、负极12相焊接,从而实现电性连接。本申请实施例通过硬质压板40作用于芯片10的方式保证了正极11、负极12分别与焊料柱21连接的可靠性。
在一种可能的实现方式中,芯片10的键合方法还包括在焊接相粘合的正极11与焊料柱21、负极12与焊料柱21后,去除胶层23。本申请实 施例中可以通过溶剂清洗的方式去除胶层23,清洗所用的溶剂可以为水或乙醇。例如,若胶层23采用聚乙二醇制成,由于聚乙二醇是水溶性聚合物,可以通过水清洗胶层23。
在一种可能的实现方式中,芯片10的键合方法还包括在去除胶层23后,对芯片10和背板20进行回流焊。回流焊能够进一步提高正极11、负极12分别与焊料柱21之间连接的稳定性,从而提高芯片10与背板20之间电性连接的可靠性。
以上各实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述各实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (18)

  1. 一种微型发光二极管芯片的键合方法,包括:
    提供背板,所述背板包括多个芯片键合区,每个所述芯片键合区的电极上形成有两个焊料柱;
    在每个所述芯片键合区内形成胶槽,使两个所述焊料柱位于所述胶槽内;
    在所述胶槽内形成胶层,并使所述胶层覆盖所述焊料柱的顶部;
    移动芯片,使所述芯片的正极和负极分别与两个所述焊料柱对准;
    加热所述背板,使所述胶层融化为液体胶;
    将所述芯片向下移动,使所述正极和所述负极浸入所述液体胶内;
    待冷却至室温使所述液体胶凝固,使所述正极和所述负极分别与两个所述焊料柱粘合;
    焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱。
  2. 根据权利要求1所述的微型发光二极管芯片的键合方法,其中,在所述芯片键合区的电极上形成两个所述焊料柱采用如下方法形成:
    通过金属热蒸镀或提离工艺在所述芯片键合区的电极上形成两个所述焊料柱。
  3. 根据权利要求2所述的微型发光二极管芯片的键合方法,其中,所述焊料柱为高熔点焊料柱。
  4. 根据权利要求3所述的微型发光二极管芯片的键合方法,其中,所述高熔点焊料柱为铟焊料柱或锡焊料柱。
  5. 根据权利要求1所述的微型发光二极管芯片的键合方法,其中,在每个所述芯片键合区内形成胶槽包括:
    在所述背板设置有所述焊料柱的一侧旋涂光刻胶;
    对所述光刻胶进行烘烤、曝光、显影、硬烘,形成所述胶槽。
  6. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,以平行于所述芯片和所述背板的平面为截面,所述胶槽的开口截面面积大于所述芯片的截面面积。
  7. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,在所述胶槽内形成胶层包括:
    在所述胶槽内旋涂或喷墨打印低熔点聚合物,形成所述胶层。
  8. 根据权利要求7所述的微型发光二极管芯片的键合方法,其中,所述低熔点聚合物为聚乙二醇。
  9. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,所述胶层的熔点低于所述胶槽的熔点。
  10. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,以所述背板面向所述芯片的一侧面为基准,所述胶层的高度高于两个所述焊料柱的高度。
  11. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,移动芯片,使所述芯片的正极和负极分别与两个所述焊料柱对准包括:
    采用转移头将所述芯片拾取;
    采用所述转移头带动所述芯片移动到所述芯片键合区上方,使所述芯片的正极与两个所述焊料柱中的一个焊料柱对准,使所述芯片的负极与两个所述焊料柱中的另一个焊料柱对准。
  12. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱包括:
    采用倒装焊工艺和回流焊工艺,焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱。
  13. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方法,其中,焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱包括:
    提供硬质压板,将所述硬质压板压在所述芯片背离所述背板的一侧;
    加热所述背板使所述焊料柱熔化,下压所述硬质压板,使所述正极、所述负极分别与所述焊料柱连接;
    冷却至室温,移走所述硬质压板。
  14. 根据权利要求13所述的微型发光二极管芯片的键合方法,其中,所述硬质压板为硬质树脂板或硬质玻璃板。
  15. 根据权利要求1-5中任一项所述的微型发光二极管芯片的键合方 法,其中,所述芯片的键合方法还包括在焊接相粘合的所述正极与所述焊料柱、所述负极与所述焊料柱后,去除所述胶层。
  16. 根据权利要求15所述的微型发光二极管芯片的键合方法,其中,去除所述胶层包括:
    通过溶剂清洗去除所述胶层。
  17. 根据权利要求16所述的微型发光二极管芯片的键合方法,其中,所述溶剂为水或乙醇。
  18. 根据权利要求15所述的微型发光二极管芯片的键合方法,其中,所述芯片的键合方法还包括在去除所述胶层后,对所述芯片和所述背板进行回流焊。
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