WO2020248330A1 - 像素驱动电路 - Google Patents

像素驱动电路 Download PDF

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Publication number
WO2020248330A1
WO2020248330A1 PCT/CN2019/096892 CN2019096892W WO2020248330A1 WO 2020248330 A1 WO2020248330 A1 WO 2020248330A1 CN 2019096892 W CN2019096892 W CN 2019096892W WO 2020248330 A1 WO2020248330 A1 WO 2020248330A1
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WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
control signal
module
electrically connected
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PCT/CN2019/096892
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English (en)
French (fr)
Inventor
王海
Original Assignee
武汉华星光电半导体显示技术有限公司
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Priority to US16/633,471 priority Critical patent/US10902785B2/en
Publication of WO2020248330A1 publication Critical patent/WO2020248330A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

Definitions

  • the present invention relates to the field of display technology, in particular to a pixel drive circuit.
  • OLED display devices have self-luminescence, low driving voltage, high luminous efficiency, short response time, high definition and contrast, close to 180° viewing angle, wide operating temperature range, and can realize flexible display and Large-area full-color display and many other advantages are recognized by the industry as the display device with the most potential for development.
  • OLED display devices can be divided into passive matrix OLED (Passive Matrix OLED, PMOLED) and active matrix OLED (Active Matrix OLED, AMOLED) are two categories, namely direct addressing and thin film transistor (Thin Film Transistor, TFT) matrix addressing.
  • PMOLED Passive Matrix OLED
  • AMOLED Active Matrix OLED
  • direct addressing direct addressing
  • thin film transistor Thin Film Transistor
  • AMOLED is a current-driven device. When a current flows through the organic light-emitting diode, the organic light-emitting diode emits light, and the light-emitting brightness is determined by the current flowing through the organic light-emitting diode itself.
  • Most of the existing integrated circuits Integrated Circuit, IC only transmit voltage signals, so the pixel drive circuit of AMOLED needs to complete the task of converting voltage signals into current signals.
  • the traditional AMOLED pixel drive circuit is usually 2T1C, that is, a structure of two thin film transistors and a capacitor to convert voltage into current.
  • the current mainstream 60Hz refresh rate can no longer meet the user's requirements.
  • the time to scan 1 row of pixels is 6.94 us, while the 90Hz refresh rate, scan 1 row of pixels only 4.63us, 120Hz refresh rate (scan 1 row of pixels only 3.4us, the current OLED display panel pixels
  • the driving circuit has only a storage capacitor with a fixed capacitance value, and the capacitance value of the storage capacitor cannot be adjusted according to the change of the refresh frequency of the display panel. When applied to a high refresh frequency, the scan time is shortened, which may cause insufficient charging and cause the picture abnormal.
  • the object of the present invention is to provide a pixel driving circuit that can adjust the storage capacitor value with the change of the refresh frequency of the OLED display panel, so as to avoid insufficient charging due to the increase of the refresh frequency.
  • the present invention provides a pixel driving circuit applied to an OLED display panel, including a reset module, a compensation module electrically connected to the reset module, a light emitting module electrically connected to the reset module, and A storage capacitor control module electrically connected to the compensation module, where the compensation module includes a storage capacitor;
  • the reset module is used to access the first control signal and the reset voltage, and transmit the reset voltage to the compensation module and the light emitting module under the control of the first control signal to reset the compensation module and the light emitting module;
  • the compensation module is used to access a second control signal, write a data signal under the control of the second control signal, and perform threshold voltage compensation;
  • the light-emitting module is configured to receive a third control signal, and emit light under the control of the third control signal;
  • the storage capacitor control module is used to adjust the capacitance value of the storage capacitor in the compensation module according to the difference in refresh frequency of the OLED display panel.
  • the storage capacitor control module receives a first capacitor control signal and a second capacitor control signal to adjust the capacitance value of the storage capacitor in the compensation module by changing the potential of the first capacitor control signal and the second capacitor control signal.
  • the storage capacitor control module includes an eighth thin film transistor and a ninth thin film transistor
  • the gate of the eighth thin film transistor is connected to the first capacitance control signal, the source is connected to the high potential of the power supply, and the drain is electrically connected to the compensation module;
  • the gate of the ninth thin film transistor is connected to the second capacitance control signal, the source is connected to the high potential of the power supply, and the drain is electrically connected to the compensation module.
  • the compensation module further includes a first thin film transistor, a second thin film transistor, and a third thin film transistor, and the storage capacitor includes a first capacitor and a second capacitor;
  • the gate of the first thin film transistor is electrically connected to the second end of the first capacitor, the source is electrically connected to the drain of the second thin film transistor, and the drain is electrically connected to the drain of the third thin film transistor;
  • the gate of the second thin film transistor is connected to a second control signal, and the source is connected to a data signal;
  • the gate of the third thin film transistor is connected to a second control signal, and the source is electrically connected to the gate of the first thin film transistor;
  • the first terminal of the first capacitor is electrically connected to the drain of the eighth thin film transistor, and the second terminal is electrically connected to the gate of the first thin film transistor;
  • the first terminal of the second capacitor is electrically connected to the drain of the ninth thin film transistor, and the second terminal is electrically connected to the gate of the first thin film transistor.
  • the capacitance value of the first capacitor is greater than the capacitance value of the second capacitor.
  • the first capacitance control signal and the second capacitance control signal control both the eighth thin film transistor and the ninth thin film transistor to be turned on;
  • the first capacitance control signal controls the eighth thin film transistor to turn on, and the second capacitance control signal controls the ninth thin film transistor to turn off;
  • the first capacitance control signal controls the eighth thin film transistor to turn off, and the second capacitance control signal controls the ninth thin film transistor to turn on.
  • the reset module includes a fourth thin film transistor and a seventh thin film transistor
  • the gate of the fourth thin film transistor is connected to the first control signal, the source is connected to the reset voltage, and the drain is electrically connected to the gate of the first thin film transistor;
  • the gate of the seventh thin film transistor is connected to the first control signal, the source is connected to the reset voltage, and the drain is electrically connected to the light emitting module.
  • the light emitting module includes a fifth thin film transistor, a sixth thin film transistor and an organic light emitting diode;
  • the gate of the fifth thin film transistor is connected to the third control signal, the source is connected to the power supply high voltage, and the drain is electrically connected to the drain of the first thin film transistor;
  • the gate of the sixth thin film transistor is connected to the third control signal, the source is electrically connected to the drain of the first thin film transistor, and the drain is electrically connected to the anode of the organic light emitting diode;
  • the anode of the organic light emitting diode is electrically connected to the drain of the seventh thin film transistor, and the cathode is connected to the low voltage of the power supply.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, the sixth thin film transistor, and the seventh thin film transistor are all P-type thin film transistors.
  • the potentials of the first control signal, the second control signal, and the third control signal cooperate with each other so that the pixel driving circuit sequentially enters the reset phase, the threshold voltage compensation phase, and the light-emitting phase;
  • the first control signal is at a low level, and the second control signal and the third control signal are at a high level;
  • the second control signal is at a low level, and the first control signal and the third control signal are at a high level;
  • the third control signal is at a low potential, and the first control signal and the second control signal are at a high potential.
  • the present invention provides a pixel driving circuit applied to an OLED display panel, including a reset module, a compensation module electrically connected to the reset module, a light emitting module electrically connected to the reset module, and
  • the storage capacitor control module adjusts the capacitance value of the storage capacitor in the compensation module according to the refresh frequency of the OLED display panel, which can avoid insufficient charging due to the increase in refresh frequency and improve the performance of the pixel drive circuit. stability.
  • FIG. 1 is a circuit diagram of the pixel driving circuit of the present invention
  • FIG. 2 is a timing diagram of the pixel driving circuit of the present invention.
  • the present invention provides a pixel driving circuit applied to an OLED display panel, including a reset module 1, a compensation module electrically connected to the reset module 1, a light emitting module electrically connected to the reset module 1 A module 3 and a storage capacitor control module 4 electrically connected to the compensation module 2, and the compensation module 2 includes a storage capacitor;
  • the reset module 1 is used to access the first control signal S1 and the reset voltage VI, and transmit the reset voltage VI to the compensation module 2 and the light emitting module 3 under the control of the first control signal S1 to reset the compensation module 2 and light-emitting module 3;
  • the compensation module 2 is used to access the second control signal S2, and write the data signal Data under the control of the second control signal S2 and perform threshold voltage compensation;
  • the light emitting module 3 is configured to receive a third control signal S3, and emit light under the control of the third control signal S3;
  • the storage capacitor control module 4 is used to adjust the capacitance value of the storage capacitor in the compensation module 2 according to the difference in the refresh frequency of the OLED display panel.
  • the storage capacitance control module 4 receives the first capacitance control signal ACT1 and the second capacitance control signal ACT2 to adjust the compensation module 2 by changing the potentials of the first capacitance control signal ACT1 and the second capacitance control signal ACT2 The capacitance value of the storage capacitor.
  • the storage capacitor control module 4 includes an eighth thin film transistor M8 and a ninth thin film transistor M9; the gate of the eighth thin film transistor M8 is connected to the first capacitance control signal ACT1 , The source is connected to the power supply high potential VDD, the drain is electrically connected to the compensation module 2; the gate of the ninth thin film transistor M9 is connected to the second capacitance control signal ACT2, the source is connected to the power supply high potential VDD, and the drain is connected to sexual connection compensation module 2.
  • the compensation module 2 further includes a first thin film transistor M1, a second thin film transistor M2, and a third thin film transistor M3, and the storage capacitor includes a first capacitor C1 and a second capacitor. C2; the gate of the first thin film transistor M1 is electrically connected to the second end of the first capacitor C1, the source is electrically connected to the drain of the second thin film transistor M2, and the drain is electrically connected to the drain of the third thin film transistor M3
  • the gate of the second thin film transistor M2 is connected to the second control signal S2, and the source is connected to the data signal Data
  • the gate of the third thin film transistor M3 is connected to the second control signal S2, and the source is electrically connected Is connected to the gate of the first thin film transistor M1;
  • the first terminal of the first capacitor C1 is electrically connected to the drain of the eighth thin film transistor M8, and the second terminal is electrically connected to the first thin film transistor M1 Gate; the first end of the second capacitor C2 is electrically connected to the drain of the ninth
  • the capacitance value of the first capacitor C1 is greater than the capacitance value of the second capacitor C2.
  • the first capacitance control signal ACT1 and the second capacitance control signal ACT2 control The eighth thin film transistor M8 and the ninth thin film transistor M9 are both turned on; when 60 Hz ⁇ the refresh frequency of the OLED display panel ⁇ 90 Hz, the first capacitance control signal ACT1 controls the eighth thin film transistor M8 to turn on, so The second capacitance control signal ACT2 controls the ninth thin film transistor M9 to turn off; when the refresh frequency of the OLED display panel>90Hz, the first capacitance control signal ACT1 controls the eighth thin film transistor M8 to turn off, and the second The capacitance control signal ACT2 controls the ninth thin film transistor M9 to turn on.
  • the current common refresh frequencies of OLED display panels include 30Hz, 60Hz, 90Hz, and 120Hz.
  • the present invention sets the first capacitance control signal ACT1 and the second capacitance control The signal ACT2 controls both the eighth thin film transistor M8 and the ninth thin film transistor M9 to be turned on.
  • the first capacitor C1 and the second capacitor C2 are activated simultaneously, and the size of the storage capacitor in the compensation module 2 is the first capacitor C1 and the second capacitor C1.
  • the present invention sets the first capacitance control signal ACT1 to control the eighth thin film transistor M8 to turn on, and the second capacitance control signal ACT2 to control the ninth thin film transistor M9 Turn off, the first capacitor C1 is enabled, and the second capacitor C2 is disabled.
  • the size of the storage capacitor in the compensation module 2 is the capacitance value of the first capacitor C1.
  • the present invention sets the first capacitor
  • the control signal ACT1 controls the eighth thin film transistor M8 to turn off
  • the second capacitance control signal ACT2 controls the ninth thin film transistor M9 to turn on
  • the first capacitor C1 is disabled
  • the second capacitor C2 is enabled
  • the storage in the compensation module 2
  • the size of the capacitor is the capacitance value of the second capacitor C2, so the present invention controls the activation of the first capacitor C1 and the second capacitor C2 through the first capacitor control signal ACT1 and the second capacitor control signal ACT2, so that the The size of the storage capacitor in the compensation module 2 decreases with the increase of the refresh frequency, so as to avoid insufficient charging of the storage capacitor due to the increase of the refresh frequency.
  • the eighth thin film transistor M8 and the ninth thin film transistor M9 are both P-type thin film transistors.
  • the first capacitor The control signal ACT1 and the second capacitance control signal ACT2 are both low potential; when 60Hz ⁇ the refresh frequency of the OLED display panel ⁇ 90Hz, the first capacitance control signal ACT1 is at a low potential, and the second capacitance control signal ACT2
  • the refresh frequency of the OLED display panel is greater than 90 Hz, the first capacitance control signal ACT1 is at a high potential, and the second capacitance control signal ACT2 is at a low potential.
  • the reset module 1 includes a fourth thin film transistor M4 and a seventh thin film transistor M7; the gate of the fourth thin film transistor M4 is connected to the first control signal S1, and the source The reset voltage VI is connected, the drain is electrically connected to the gate of the first thin film transistor; the gate of the seventh thin film transistor M7 is connected to the first control signal S1, the source is connected to the reset voltage VI, and the drain is electrically connected Light-emitting module 3.
  • the light emitting module 3 includes a fifth thin film transistor M5, a sixth thin film transistor M6, and an organic light emitting diode D1;
  • the gate of the fifth thin film transistor M5 is connected to the third control signal S3, the source is connected to the power supply high voltage VDD, and the drain is electrically connected to the drain of the first thin film transistor M1;
  • the gate of the sixth thin film transistor M6 is connected to the third control signal S3, the source is electrically connected to the drain of the first thin film transistor M1, and the drain is electrically connected to the anode of the organic light emitting diode D1;
  • the anode of the organic light emitting diode D1 is electrically connected to the drain of the seventh thin film transistor M7, and the cathode is connected to the power supply low voltage VSS.
  • the seventh thin film transistor M7 is a P-type thin film transistor.
  • the potentials of the first control signal S1, the second control signal S2, and the third control signal S3 cooperate with each other so that the pixel driving circuit enters the reset stage 10, the threshold voltage compensation stage 20, and the light-emitting stage 30 in sequence;
  • the first control signal S1 is at a low level, and the second control signal S2 and the third control signal S3 are at a high level;
  • the second control signal S2 is at a low level, and the first control signal S1 and the third control signal S3 are at a high level;
  • the third control signal S3 is at a low potential, and the first control signal S1 and the second control signal S2 are at a high potential.
  • the first control signal S1 is at a low potential
  • the fourth thin film transistor M4 and the seventh thin film crystal M7 are turned on, and the gate of the first thin film transistor M1 and the organic light emitting diode D1
  • the anode potential becomes a low potential, and the storage capacitor discharges.
  • the second control signal S2 is at a low level, and the second thin film transistor M2 and the third thin film transistor M3 are turned on.
  • the source and drain of the first thin film transistor M1 are shorted, and the gate potential of the first thin film transistor M1
  • the third control signal S3 is at a low level, and the fifth thin film transistor M5 and the sixth thin film transistor M6 are turned on.
  • the voltage Vgs of the gate relative to the source of the first thin film transistor M1 is:
  • Vgs Vdd-(Vdata-
  • the current Ids through the first thin film transistor M1 is:
  • Ids (1/2)K(Vdd-Vdata) 2 ;
  • K is the characteristic constant of the first thin film transistor M1
  • the current flowing through the organic light emitting diode D1 is equal to Ids
  • the threshold voltage of the first thin film transistor M1 and the organic light emitting diode D1 has nothing to do with Ids
  • the first thin film transistor M1 and the organic light emitting diode D1 The threshold voltage is compensated.
  • the OLED display panel to which the pixel driving circuit is applied includes a plurality of sub-pixels arranged in an array, and each sub-pixel is provided with a pixel driving circuit, and each row of sub-pixels is provided with a scan line and One light-emitting signal line, one data line corresponding to each column of sub-pixels, each scan line outputs a scan signal, each light-emitting signal line outputs a light-emitting signal, each data line outputs a data signal, and each pixel drive circuit ,
  • the first control signal is the scan signal output by the scan line of the previous row
  • the second control signal is the scan signal output by the scan line of the row
  • the third control signal is the light output from the light-emitting signal line of the row.
  • the data signal is the data signal output by the data line of the column.
  • the present invention provides a pixel driving circuit applied to an OLED display panel, including a reset module, a compensation module electrically connected to the reset module, a light emitting module electrically connected to the reset module, and A storage capacitor control module electrically connected to the compensation module, the compensation module includes a storage capacitor; the reset module is used to access a first control signal and a reset voltage, and reset the voltage under the control of the first control signal It is transmitted to the compensation module and the light-emitting module to reset the compensation module and the light-emitting module; the compensation module is used to access the second control signal, and write the data signal under the control of the second control signal and perform threshold voltage Compensation; the light-emitting module is used to receive a third control signal, and emit light under the control of the third control signal; the storage capacitor control module is used to adjust the refresh frequency of the OLED display panel according to the difference The capacitance value of the storage capacitor in the compensation module.
  • the storage capacitor control module adjusts the capacitance value of the storage capacitor in the compensation module according to the refresh frequency of the OLED display panel, which can avoid insufficient charging due to the increase in refresh frequency and improve the performance of the pixel drive circuit. stability.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本发明提供一种像素驱动电路。所述像素驱动电路应用于OLED显示面板，包括复位模块、补偿模块、发光模块及存储电容控制模块，补偿模块包括存储电容；复位模块用于接入第一控制信号及复位电压，并在第一控制信号的控制下复位补偿模块和发光模块；补偿模块用于接入第二控制信号，并在第二控制信号的控制下写入数据信号并进行阈值电压的补偿；发光模块用于接收第三控制信号，并在第三控制信号的控制下发光；存储电容控制模块用于根据OLED显示面板的刷新频率的不同，调整补偿模块中存储电容的电容值，通过存储电容控制模块根据OLED显示面板的刷新频率的不同，调整补偿模块中存储电容的电容值，能够避免因刷新频率的提高而造成充电不足。

Description

像素驱动电路 技术领域
本发明涉及显示技术领域，尤其涉及一种像素驱动电路。
 背景技术
有机发光二极管（Organic Light Emitting Display，OLED）显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示装置。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED（Passive Matrix OLED，PMOLED）和有源矩阵型OLED（Active Matrix OLED，AMOLED）两大类，即直接寻址和薄膜晶体管（Thin Film Transistor，TFT）矩阵寻址两类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。
AMOLED是电流驱动器件，当有电流流过有机发光二极管时，有机发光二极管发光，且发光亮度由流过有机发光二极管自身的电流决定。大部分已有的集成电路（Integrated Circuit，IC）都只传输电压信号，故AMOLED的像素驱动电路需要完成将电压信号转变为电流信号的任务。传统的AMOLED像素驱动电路通常为2T1C，即两个薄膜晶体管加一个电容的结构，将电压变换为电流。
随着显示技术的不断发展，用户对于显示面板的刷新频率的要求越来越高，目前主流的60Hz刷新频率已经不能满足用户的要求，需要使用90Hz或120Hz的高刷新频率的场景越来越多，对于60Hz刷新频率，扫描1行像素的时间为6.94 us，而90Hz刷新频率，扫描1行像素仅剩4.63us，120Hz刷新频率（扫描1行像素仅剩3.4us，目前的OLED显示面板的像素驱动电路，均只有一个固定电容值的存储电容，无法根据显示面板的刷新频率的变化调整存储电容的电容值，在应用于高刷新频率时，由于扫描时间的缩短，容易造成充电不足，引起画面异常。
 技术问题
本发明的目的在于提供一种像素驱动电路，能够随着OLED显示面板的刷新频率的改变，调整存储电容值，避免因刷新频率的提高而造成充电不足。
 技术解决方案
为实现上述目的，本发明提供一种像素驱动电路，应用于OLED显示面板，包括复位模块、与所述复位模块电性连接的补偿模块、与所述复位模块电性连接的发光模块及与所述补偿模块电性连接的存储电容控制模块，所述补偿模块包括存储电容；
所述复位模块用于接入第一控制信号及复位电压，并在所述第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位所述补偿模块和发光模块；
所述补偿模块用于接入第二控制信号，并在所述第二控制信号的控制下写入数据信号并进行阈值电压的补偿；
所述发光模块用于接收第三控制信号，并在所述第三控制信号的控制下发光；
所述存储电容控制模块用于根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块中存储电容的电容值。
所述存储电容控制模块接收第一电容控制信号及第二电容控制信号，以通过第一电容控制信号及第二电容控制信号的电位的改变调整所述补偿模块中存储电容的电容值。
所述存储电容控制模块包括第八薄膜晶体管及第九薄膜晶体管；
所述第八薄膜晶体管的栅极接入第一电容控制信号，源极接入电源高电位，漏极电性连接补偿模块；
所述第九薄膜晶体管的栅极接入第二电容控制信号，源极接入电源高电位，漏极电性连接补偿模块。
所述补偿模块还包括第一薄膜晶体管、第二薄膜晶体管及第三薄膜晶体管，所述存储电容包括第一电容及第二电容；
所述第一薄膜晶体管的栅极电性连接第一电容的第二端，源极电性连接第二薄膜晶体管的漏极，漏极电性连接第三薄膜晶体管的漏极；
所述第二薄膜晶体管的栅极接入第二控制信号，源极接入数据信号；
所述第三薄膜晶体管的栅极接入第二控制信号，源极电性连接所述第一薄膜晶体管的栅极；
所述第一电容的第一端电性连接所述第八薄膜晶体管的漏极，第二端电性连接所述第一薄膜晶体管的栅极；
所述第二电容的第一端电性连接所述第九薄膜晶体管的漏极，第二端电性连接所述第一薄膜晶体管的栅极。
所述第一电容的电容值大于第二电容的电容值。
当所述OLED显示面板的刷新频率≤60Hz时，所述第一电容控制信号和第二电容控制信号控制所述第八薄膜晶体管及第九薄膜晶体管均打开；
当60Hz＜所述OLED显示面板的刷新频率≤90Hz时，所述第一电容控制信号控制所述第八薄膜晶体管打开，所述第二电容控制信号控制第九薄膜晶体管关闭；
当所述OLED显示面板的刷新频率＞90Hz时，所述第一电容控制信号控制所述第八薄膜晶体管关闭，所述第二电容控制信号控制第九薄膜晶体管打开。
所述复位模块包括第四薄膜晶体管及第七薄膜晶体管；
所述第四薄膜晶体管的栅极接入第一控制信号，源极接入复位电压，漏极电性连接第一薄膜晶体管的栅极；
所述第七薄膜晶体管的栅极接入第一控制信号，源极接入复位电压，漏极电性连接发光模块。
所述发光模块包括第五薄膜晶体管、第六薄膜晶体管及有机发光二极管；
所述第五薄膜晶体管的栅极接入第三控制信号，源极接入电源高电压，漏极电性连接第一薄膜晶体管的漏极；
所述第六薄膜晶体管的栅极接入第三控制信号，源极电性连接第一薄膜晶体管的漏极，漏极电性连接有机发光二极管的阳极；
所述有机发光二极管的阳极电性连接第七薄膜晶体管的漏极，阴极接入电源低电压。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管及第七薄膜晶体管均为P型薄膜晶体管。
所述第一控制信号、第二控制信号及第三控制信号的电位相互配合使得所述像素驱动电路依次进入复位阶段、阈值电压补偿阶段及发光阶段；
在所述复位阶段，第一控制信号为低电位，第二控制信号及第三控制信号为高电位；
在阈值电压补偿阶段，第二控制信号为低电位，第一控制信号及第三控制信号为高电位；
在发光阶段，第三控制信号为低电位，第一控制信号及第二控制信号为高电位。
 有益效果
本发明的有益效果：本发明提供一种像素驱动电路，应用于OLED显示面板，包括复位模块、与所述复位模块电性连接的补偿模块、与所述复位模块电性连接的发光模块及与所述补偿模块电性连接的存储电容控制模块，所述补偿模块包括存储电容；所述复位模块用于接入第一控制信号及复位电压，并在所述第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位所述补偿模块和发光模块；所述补偿模块用于接入第二控制信号，并在所述第二控制信号的控制下写入数据信号并进行阈值电压的补偿；所述发光模块用于接收第三控制信号，并在所述第三控制信号的控制下发光；所述存储电容控制模块用于根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块中存储电容的电容值。本发明设置所述存储电容控制模块根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块中存储电容的电容值，能够避免因刷新频率的提高而造成充电不足，提升像素驱动电路的稳定性。
 附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为本发明的像素驱动电路的电路图；
图2为本发明的像素驱动电路的时序图。
 本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1，本发明提供一种像素驱动电路，应用于OLED显示面板，包括复位模块1、与所述复位模块1电性连接的补偿模块2、与所述复位模块1电性连接的发光模块3及与所述补偿模块2电性连接的存储电容控制模块4，所述补偿模块2包括存储电容；
所述复位模块1用于接入第一控制信号S1及复位电压VI，并在所述第一控制信号S1的控制下将复位电压VI传输至补偿模块2和发光模块3以复位所述补偿模块2和发光模块3；
所述补偿模块2用于接入第二控制信号S2，并在所述第二控制信号S2的控制下写入数据信号Data并进行阈值电压的补偿；
所述发光模块3用于接收第三控制信号S3，并在所述第三控制信号S3的控制下发光；
所述存储电容控制模块4用于根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块2中存储电容的电容值。
具体地，所述存储电容控制模块4接收第一电容控制信号ACT1及第二电容控制信号ACT2，以通过第一电容控制信号ACT1及第二电容控制信号ACT2的电位的改变调整所述补偿模块2中存储电容的电容值。
进一步地，在本发明的优选实施例中，所述存储电容控制模块4包括第八薄膜晶体管M8及第九薄膜晶体管M9；所述第八薄膜晶体管M8的栅极接入第一电容控制信号ACT1，源极接入电源高电位VDD，漏极电性连接补偿模块2；所述第九薄膜晶体管M9的栅极接入第二电容控制信号ACT2，源极接入电源高电位VDD，漏极电性连接补偿模块2。
具体地，在本发明的优选实施例中，所述补偿模块2还包括第一薄膜晶体管M1、第二薄膜晶体管M2及第三薄膜晶体管M3，所述存储电容包括第一电容C1及第二电容C2；所述第一薄膜晶体管M1的栅极电性连接第一电容C1的第二端，源极电性连接第二薄膜晶体管M2的漏极，漏极电性连接第三薄膜晶体管M3的漏极；所述第二薄膜晶体管M2的栅极接入第二控制信号S2，源极接入数据信号Data；所述第三薄膜晶体管M3的栅极接入第二控制信号S2，源极电性连接所述第一薄膜晶体管M1的栅极；所述第一电容C1的第一端电性连接所述第八薄膜晶体管M8的漏极，第二端电性连接所述第一薄膜晶体管M1的栅极；所述第二电容C2的第一端电性连接所述第九薄膜晶体管M9的漏极，第二端电性连接所述第一薄膜晶体管M1的栅极。
进一步地，所述第一电容C1的电容值大于第二电容C2的电容值，当所述OLED显示面板的刷新频率≤60Hz时，所述第一电容控制信号ACT1和第二电容控制信号ACT2控制所述第八薄膜晶体管M8及第九薄膜晶体管M9均打开；当60Hz＜所述OLED显示面板的刷新频率≤90Hz时，所述第一电容控制信号ACT1控制所述第八薄膜晶体管M8打开，所述第二电容控制信号ACT2控制第九薄膜晶体管M9关闭；当所述OLED显示面板的刷新频率＞90Hz时，所述第一电容控制信号ACT1控制所述第八薄膜晶体管M8关闭，所述第二电容控制信号ACT2控制第九薄膜晶体管M9打开。
需要说明的是，目前OLED显示面板常用的刷新频率包括30Hz、60Hz、90Hz及120Hz，如上述，对于30Hz及60Hz的OLED显示面板，本发明设置所述第一电容控制信号ACT1和第二电容控制信号ACT2控制所述第八薄膜晶体管M8及第九薄膜晶体管M9均打开，此时第一电容C1及第二电容C2同时启用，补偿模块2中的存储电容的大小为第一电容C1和第二电容C2的电容值的和，对于90Hz的OLED显示面板，本发明设置所述第一电容控制信号ACT1控制所述第八薄膜晶体管M8打开，所述第二电容控制信号ACT2控制第九薄膜晶体管M9关闭，第一电容C1启用，第二电容C2停用，所述补偿模块2中的存储电容的大小为第一电容C1的电容值，对于120Hz的OLED线面板，本发明设置所述第一电容控制信号ACT1控制所述第八薄膜晶体管M8关闭，所述第二电容控制信号ACT2控制第九薄膜晶体管M9打开，第一电容C1停用，第二电容C2启用，所述补偿模块2中的存储电容的大小为第二电容C2的电容值，从而本发明通过第一电容控制信号ACT1及第二电容控制信号ACT2的控制所述第一电容C1和第二电容C2的启用与否，使得所述补偿模块2中的存储电容的大小随着刷新频率的提升而减少，避免因刷新频率提高导至存储电容充电不足，
进一步地，在本发明的优选实施例中，所述第八薄膜晶体管M8及第九薄膜晶体管M9均为P型薄膜晶体管，当所述OLED显示面板的刷新频率≤60Hz时，所述第一电容控制信号ACT1和第二电容控制信号ACT2均为低电位；当60Hz＜所述OLED显示面板的刷新频率≤90Hz时，所述第一电容控制信号ACT1为低电位，所述第二电容控制信号ACT2为高电位；当所述OLED显示面板的刷新频率＞90Hz时，所述第一电容控制信号ACT1为高电位，所述第二电容控制信号ACT2为低电位。
具体地，在本发明的优选实施例中，所述复位模块1包括第四薄膜晶体管M4及第七薄膜晶体管M7；所述第四薄膜晶体管M4的栅极接入第一控制信号S1，源极接入复位电压VI，漏极电性连接第一薄膜晶体管的栅极；所述第七薄膜晶体管M7的栅极接入第一控制信号S1，源极接入复位电压VI，漏极电性连接发光模块3。
具体地，在本发明的优选实施例中，所述发光模块3包括第五薄膜晶体管M5、第六薄膜晶体管M6及有机发光二极管D1；
所述第五薄膜晶体管M5的栅极接入第三控制信号S3，源极接入电源高电压VDD，漏极电性连接第一薄膜晶体管M1的漏极；
所述第六薄膜晶体管M6的栅极接入第三控制信号S3，源极电性连接第一薄膜晶体管M1的漏极，漏极电性连接有机发光二极管D1的阳极；
所述有机发光二极管D1的阳极电性连接第七薄膜晶体管M7的漏极，阴极接入电源低电压VSS。
具体地，在本发明的优选实施例中，所述第一薄膜晶体管M1、第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4、第五薄膜晶体管M5、第六薄膜晶体管M6及第七薄膜晶体管M7均为P型薄膜晶体管。
进一步地，所述第一控制信号S1、第二控制信号S2及第三控制信号S3的电位相互配合使得所述像素驱动电路依次进入复位阶段10、阈值电压补偿阶段20及发光阶段30；
在所述复位阶段10，第一控制信号S1为低电位，第二控制信号S2及第三控制信号S3为高电位；
在阈值电压补偿阶段20，第二控制信号S2为低电位，第一控制信号S1及第三控制信号S3为高电位；
在发光阶段30，第三控制信号S3为低电位，第一控制信号S1及第二控制信号S2为高电位。
需要说明书的，结合图2，在复位阶段10，第一控制信号S1为低电位，第四薄膜晶体管M4及第七薄膜晶体M7打开，将第一薄膜晶体管M1的栅极和有机发光二极管D1的阳极电位变成低电位，存储电容放电。
在阈值电压补偿阶段20，第二控制信号S2为低电位，第二薄膜晶体管M2、第三薄膜晶体管M3打开。第一薄膜晶体管M1的源漏短接，且第一薄膜晶体管M1的栅极电位|VA|>|Vth|；即此时第一薄膜晶体管M1变成二极管，第一薄膜晶体管M1打开，直到第一薄膜晶体管M1的栅极的电位变成Vdata-|Vth|截止；
在发光阶段30，第三控制信号S3低电位，第五薄膜晶体管M5、第六薄膜晶体管M6打开。第一薄膜晶体管M1的栅极相对于源极的电压Vgs为：
Vgs＝Vdd-(Vdata-|Vth|)；
经过第一薄膜晶体管M1的电流Ids为：
 Ids＝ (1/2)K(Vdd-Vdata) 2 ；
K为第一薄膜晶体管M1的特性常数， 流过有机发光二极管D1的电流等于Ids，第一薄膜晶体管M1和有机发光二极管D1的阈值电压与Ids无关，第一薄膜晶体管M1和有机发光二极管D1的阈值电压得到补偿。
值得一提的是，所述应用该像素驱动电路的OLED显示面板包括阵列排布的多个子像素，对应每一个子像素均设有一个像素驱动电路，对应每一行的子像素设置一条扫描线及一条发光信号线，对应每一列的子像素设置一条数据线，每一条扫描线输出一扫描信号，每一条发光信号线输出一发光信号，每一条数据线输出一数据信号，每一个像素驱动电路中，第一控制信号为其所在行的前一行扫描线输出的扫描信号，第二控制信号为其所在行的扫描线输出的扫描信号，第三控制信号为其所在行的发光信号线输出的发光信号，数据信号为其所在列的数据线输出的数据信号。
综上所述，本发明提供一种像素驱动电路，应用于OLED显示面板，包括复位模块、与所述复位模块电性连接的补偿模块、与所述复位模块电性连接的发光模块及与所述补偿模块电性连接的存储电容控制模块，所述补偿模块包括存储电容；所述复位模块用于接入第一控制信号及复位电压，并在所述第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位所述补偿模块和发光模块；所述补偿模块用于接入第二控制信号，并在所述第二控制信号的控制下写入数据信号并进行阈值电压的补偿；所述发光模块用于接收第三控制信号，并在所述第三控制信号的控制下发光；所述存储电容控制模块用于根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块中存储电容的电容值。本发明设置所述存储电容控制模块根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块中存储电容的电容值，能够避免因刷新频率的提高而造成充电不足，提升像素驱动电路的稳定性。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种像素驱动电路，应用于OLED显示面板，包括复位模块、与所述复位模块电性连接的补偿模块、与所述复位模块电性连接的发光模块及与所述补偿模块电性连接的存储电容控制模块，所述补偿模块包括存储电容；
    所述复位模块用于接入第一控制信号及复位电压，并在所述第一控制信号的控制下将复位电压传输至补偿模块和发光模块以复位所述补偿模块和发光模块；
    所述补偿模块用于接入第二控制信号，并在所述第二控制信号的控制下写入数据信号并进行阈值电压的补偿；
    所述发光模块用于接收第三控制信号，并在所述第三控制信号的控制下发光；
    所述存储电容控制模块用于根据所述OLED显示面板的刷新频率的不同，调整所述补偿模块中存储电容的电容值。
  2. 如权利要求1所述的像素驱动电路，其中，所述存储电容控制模块接收第一电容控制信号及第二电容控制信号，以通过第一电容控制信号及第二电容控制信号的电位的改变调整所述补偿模块中存储电容的电容值。
  3. 如权利要求2所述的像素驱动电路，其中，所述存储电容控制模块包括第八薄膜晶体管及第九薄膜晶体管；
    所述第八薄膜晶体管的栅极接入第一电容控制信号，源极接入电源高电位，漏极电性连接补偿模块；
    所述第九薄膜晶体管的栅极接入第二电容控制信号，源极接入电源高电位，漏极电性连接补偿模块。
  4. 如权利要求3所述的像素驱动电路，其中，所述补偿模块还包括第一薄膜晶体管、第二薄膜晶体管及第三薄膜晶体管，所述存储电容包括第一电容及第二电容；
    所述第一薄膜晶体管的源极电性连接第二薄膜晶体管的漏极，漏极电性连接第三薄膜晶体管的漏极；
    所述第二薄膜晶体管的栅极接入第二控制信号，源极接入数据信号；
    所述第三薄膜晶体管的栅极接入第二控制信号，源极电性连接所述第一薄膜晶体管的栅极；
    所述第一电容的第一端电性连接所述第八薄膜晶体管的漏极，第二端电性连接所述第一薄膜晶体管的栅极；
    所述第二电容的第一端电性连接所述第九薄膜晶体管的漏极，第二端电性连接所述第一薄膜晶体管的栅极。
  5. 如权利要求4所述的像素驱动电路，其中，所述第一电容的电容值大于第二电容的电容值。
  6. 如权利要求5所述的像素驱动电路，其中，当所述OLED显示面板的刷新频率≤60Hz时，所述第一电容控制信号和第二电容控制信号控制所述第八薄膜晶体管及第九薄膜晶体管均打开；
    当60Hz＜所述OLED显示面板的刷新频率≤90Hz时，所述第一电容控制信号控制所述第八薄膜晶体管打开，所述第二电容控制信号控制第九薄膜晶体管关闭；
    当所述OLED显示面板的刷新频率＞90Hz时，所述第一电容控制信号控制所述第八薄膜晶体管关闭，所述第二电容控制信号控制第九薄膜晶体管打开。
  7. 如权利要求4所述的像素驱动电路，其中，所述复位模块包括第四薄膜晶体管及第七薄膜晶体管；
    所述第四薄膜晶体管的栅极接入第一控制信号，源极接入复位电压，漏极电性连接第一薄膜晶体管的栅极；
    所述第七薄膜晶体管的栅极接入第一控制信号，源极接入复位电压，漏极电性连接发光模块。
  8. 如权利要求7所述的像素驱动电路，其中，所述发光模块包括第五薄膜晶体管、第六薄膜晶体管及有机发光二极管；
    所述第五薄膜晶体管的栅极接入第三控制信号，源极接入电源高电压，漏极电性连接第一薄膜晶体管的漏极；
    所述第六薄膜晶体管的栅极接入第三控制信号，源极电性连接第一薄膜晶体管的漏极，漏极电性连接有机发光二极管的阳极；
    所述有机发光二极管的阳极电性连接第七薄膜晶体管的漏极，阴极接入电源低电压。
  9. 如权利要求8所述的像素驱动电路，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管及第七薄膜晶体管均为P型薄膜晶体管。
  10. 如权利要求9所述的像素驱动电路，其中，所述第一控制信号、第二控制信号及第三控制信号的电位相互配合使得所述像素驱动电路依次进入复位阶段、阈值电压补偿阶段及发光阶段；
    在所述复位阶段，第一控制信号为低电位，第二控制信号及第三控制信号为高电位；
    在阈值电压补偿阶段，第二控制信号为低电位，第一控制信号及第三控制信号为高电位；
    在发光阶段，第三控制信号为低电位，第一控制信号及第二控制信号为高电位。
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