CN112002283A - 像素驱动电路、显示面板及其驱动方法 - Google Patents
像素驱动电路、显示面板及其驱动方法 Download PDFInfo
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Abstract
本发明提供一种像素驱动电路、显示面板及其驱动方法,所述像素驱动电路包括第一晶体管T1、第二晶体管T2、存储电容Cst、低帧频补偿电容单元以及有机发光元件OLED。本发明的通过增加低帧频补偿电容单元,优化了像素驱动电路中电容结构,相同功能电容分为两个部分,实现了同时兼顾高帧频模式或低帧频模式,可以保证在较低的刷新频率下电压的稳定,同时确保在高帧频驱动时增加了电容值总量,确保在短时间内电压的准确写入。
Description
技术领域
本申请涉及显示技术领域,尤其涉及一种像素驱动电路、显示面板及其驱动方法。
背景技术
随着多条有机发光二极管产线建成和投产,以及良率的提升,有机发光二极管显示面板在手机上的使用比例大幅提升,同时由于其优秀的显示特性,也在智能穿戴等产品中使用。
但智能穿戴等产品为了让用户有更好的使用体验,会设置更多的应用场景,如手机及手表为适应不同的应用场景,需要进行高帧频或低帧频(Frame rate) 驱动,而在高帧频驱动时需要的存储电容小,在低帧频时需要的存储电容大。
如图1所示,为现有的一种有机发光二极管显示面板的像素驱动电路,其中的存储电容Cst的存储电容小,为固定容值的存储电容,无法同时兼顾高帧频或低帧频驱动。
发明内容
本发明的目的在于,提供一种像素驱动电路、显示面板及其驱动方法以解决现有技术存在阈值电压为负电压时,发光二极管的发光亮度迅速降低,发光二极管的电流迅速降低,以及数据信号损失严重的技术问题。
为实现上述目的,本发明提供一种像素驱动电路,包括第一晶体管T1、第二晶体管T2、存储电容Cst、低帧频补偿电容单元以及有机发光元件OLED;具体的,所述第一晶体管T1的栅极连接第一节点G,所述第一晶体管T1的源极接入连接所述第二节点N,所述第二节点接入电源电压VDD,所述第一晶体管T1的漏极连接第三节点S;所述第二晶体管T2的栅极与接入第一扫描信号 Scan[n],所述第二晶体管T2的源极接入数据信号Data,所述第二晶体管T2 的漏极连接所述第二节点N;所述存储电容Cst的一端连接所述电源电压VDD,另一端连接所述第一节点G;所述低帧频补偿电容单元与所述存储电容Cst并联连接,其一端连接所述电源电压VDD,另一端连接所述第一节点G;所述有机发光元件OLED的阳极连接所述第三节点S,其阴极连接负向电压VSS。
进一步地,所述低帧频补偿电容单元包括串联连接的补偿电容Cb和低帧频开启晶体管Tb。
进一步地,所述低帧频开启晶体管Tb为N型或P型晶体管;所述低帧频开启晶体管Tb中有源层的材料包括非晶硅材料或金属氧化物材料,所述金属氧化物材料包括IGZO、IZTO或IGZTO。
进一步地,所述低帧频开启晶体管Tb的栅极与接入一控制信号Cb_EN,所述低帧频开启晶体管Tb的源极接入所述电源电压VDD,所述低帧频开启晶体管Tb的漏极连接所述第一节点G;当所述像素驱动电路为低帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管Tb开启;当所述像素驱动电路为高帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管Tb关闭。
进一步地,所述的像素驱动电路还包括第三晶体管T3,所述第三晶体管 T3的栅极接入发光信号EM[n],所述第三晶体管T3的源极接入所述电源电压,所述第三晶体管T3的漏极连接所述第二节点N。
进一步地,所述像素驱动电路还包括第四晶体管T4,所述第四晶体管T4 的栅极接入所述第一扫描信号Scan[n],所述第四晶体管T4的源极连接所述第一节点G,所述第四晶体管T4的漏极连接所述第三节点S。
进一步地,所述像素驱动电路还包括第五晶体管T5,所述第五晶体管T5 的栅极接入第二扫描信号Scan[n-1],所述第五晶体管T5的源极连接所述第一节点G,所述第五晶体管T5的漏极接入复位电压VI。
进一步地,所述像素驱动电路还包括第六晶体管T6,所述第六晶体管T6 的栅极与接入发光信号EM[n],所述第六晶体管T6的源极连接所述第三节点S,所述第六晶体管T6的漏极连接所述有机发光元件OLED的阳极。
本发明还提供一种显示面板,其包括上述驱动电路。
本发明还提供一种所述显示面板的驱动方法,其包括如下步骤:
显示面板应用切换步骤,用于点亮屏幕或切换应用软件的显示画面;
应用帧频检测步骤,用于检测所述显示面板当前应用软件的帧频;
应用帧频判断步骤,当驱动系统检测显示端应用软件需低帧频(小于等于 60Hz)驱动时,系统端会切换低帧频模式并输出切换信号到显示面板;当驱动系统检测显示端应用软件需高帧频(大于60Hz)驱动时,系统端会切换高帧频模式并输出切换信号到显示面板;以及
低帧频开启晶体管控制步骤,在低帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管Tb开启,所述补偿电容Cb和所述存储电容Cst并联使用;在高帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管Tb关闭,所述存储电容Cst单独使用。
本发明的技术效果在于,提供一种像素驱动电路、显示面板及其驱动方法,通过增加低帧频补偿电容单元,优化了像素驱动电路中电容结构,相同功能电容分为两个部分,实现了同时兼顾高帧频模式或低帧频模式,可以保证在较低的刷新频率下电压的稳定,同时确保在高帧频驱动时增加了电容值总量,确保在短时间内电压的准确写入。
附图说明
下面结合附图,通过对本申请的具体实施方式详细描述,将使本申请的技术方案及其它有益效果显而易见。
图1为现有的一种有机发光二极管显示面板的像素驱动电路;
图2为本发明实施例1中一种像素驱动电路的结构示意图;
图3为所述像素驱动电路的充电原理图;
图4为所述像素驱动电路的电压保持原理图;
图5为本发明实施例2中一种像素驱动电路的结构示意图;
图6为本发明实施例3中一种像素驱动电路的结构示意图;
图7为本发明实施例3中一种显示面板的驱动方法的流程图;
图8为本发明中所述显示面板应用图7所示驱动方法的使用流程图。
其中,附图中的标识如下:
T1、第一晶体管,T2、第二晶体管,T3、第三晶体管,
T4、第四晶体管,T5、第五晶体管,T6、第六晶体管,
Cst、存储电容,Cb、补偿电容,Tb、低帧频开启晶体管,
OLED、有机发光元件。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
在本申请实施例的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接或可以相互通讯;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。
实施例1
如图2所示,本申请实施例1提供一种像素驱动电路,其包括第一晶体管 T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6、存储电容Cst、低帧频补偿电容单元以及有机发光元件OLED。所述低帧频补偿电容单元包括串联连接的补偿电容Cb和低帧频开启晶体管Tb。所述补偿电容Cb位于所述低帧频开启晶体管Tb上方。图中的Id表示电流的方向。
其中,所述第一晶体管T1、所述第二晶体管T2、所述第三晶体管T3、所述第四晶体管T4、所述第五晶体管T5、所述第六晶体管T6、所述低帧频开启晶体管Tb为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的任一种。
具体的,本实施例中,所述第一晶体管T1的栅极连接第一节点G,所述第一晶体管T1的源极接入连接所述第二节点N,所述第二节点接入电源电压 VDD,所述第一晶体管T1的漏极连接第三节点S;所述第二晶体管T2的栅极与接入第一扫描信号Scan[n],所述第二晶体管T2的源极接入数据信号Data,所述第二晶体管T2的漏极连接所述第二节点N;所述存储电容Cst的一端连接所述电源电压VDD,另一端连接所述第一节点G;所述低帧频补偿电容单元与所述存储电容Cst并联连接,其一端连接所述电源电压VDD,另一端连接所述第一节点G;所述有机发光元件OLED的阳极连接所述第三节点S,其阴极连接负向电压VSS。
本实施例中,所述低帧频开启晶体管Tb为N型或P型晶体管;所述低帧频开启晶体管Tb通过低温多晶硅(LTPS)或低温多晶氧化物(LTPO)工艺制作。所述低帧频开启晶体管Tb中的有源层的材料包括非晶硅材料或金属氧化物材料,所述金属氧化物材料包括IGZO、IZTO或IGZTO。当采用非晶硅材料制作所述低帧频开启晶体管Tb中的有源层时,通过低温多晶硅(LTPS)工艺制作;当采用金属氧化物材料制作所述低帧频开启晶体管Tb中的有源层时,通过低温多晶氧化物(LTPO)工艺制作。
本实施例中,所述低帧频开启晶体管Tb的栅极与接入一控制信号Cb_EN,所述低帧频开启晶体管Tb的源极接入所述电源电压VDD,所述低帧频开启晶体管Tb的漏极连接所述第一节点G。
当所述像素驱动电路为低帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管Tb开启,所述补偿电容Cb和所述存储电容Cst并联使用;当所述像素驱动电路为高帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管Tb关闭,所述存储电容Cst单独使用。
值得注意的是,本申请实施例中优选区分低帧频模式和高帧频模式的分界阈值为60Hz,但是不严格限分界阈值为60Hz,其还可以为40~80Hz中的任意整数,其均属于本申请保护范围。所述低帧频模式中的帧频范围为1~60Hz,所述高帧频模式中的帧频范围为60~120Hz。
本实施例通过增加低帧频补偿电容单元,优化了像素驱动电路中电容结构,将相同功能电容分为两个部分,实现了同时兼顾高帧频模式或低帧频模式,可以保证在较低的刷新频率下电压的稳定,同时确保在高帧频驱动时增加了电容值总量,确保在短时间内电压的准确写入。
本实施例中,所述像素驱动电路还包括第三晶体管T3,所述第三晶体管T3 的栅极接入发光信号EM[n],所述第三晶体管T3的源极接入电源电压VDD,所述第三晶体管T3的漏极连接第二节点N。
本实施例中,所述像素驱动电路还包括第四晶体管T4,所述第四晶体管 T4的栅极接入所述第一扫描信号Scan[n],所述第四晶体管T4的源极连接所述第一节点G,所述第四晶体管T4的漏极连接所述第三节点S。
本实施例中,所述像素驱动电路还包括第五晶体管T5,所述第五晶体管 T5的栅极接入第二扫描信号Scan[n-1],所述第五晶体管T5的源极连接所述第一节点G,所述第五晶体管T5的漏极接入复位电压VI。当正向扫描时,首先通过复位电压VI复位,第五晶体管T5开启。
本实施例中,所述像素驱动电路还包括第六晶体管T6,所述第六晶体管 T6的栅极与接入发光信号EM[n],所述第六晶体管T6的源极连接所述第三节点S,所述第六晶体管T6的漏极连接所述有机发光元件OLED的阳极。
本申请使用所述像素驱动电路进行了模拟仿真数据,确认可实现对应功能。电容不同所需的充电时间不同,电容越小所需充电时间越短,高帧频下可使用小电容,即所述存储电容Cst单独使用;低帧频时充电时间较长,可使用组合大电容,即所述补偿电容Cb和所述存储电容Cst并联使用。另外,在存储电容大时的电容保持效果较优,可使用组合大电容加强低帧频时的电压保持。
结合模拟仿真结果,绘制了图3、图4对所述像素驱动电路进行原理说明。
图3为所述像素驱动电路的充电原理图,横轴为时间Time、纵轴为Q点电压VQ,高频驱动对应电容为Cst,电容较小电压上升较快,在较短时间到达数据信号Data的数据电压Vdata;低频驱动对应电容为Cst+Cb,电容较大电压上升较慢,在较长时间到达数据信号Data的数据电压Vdata。故可根据不同驱动帧频选择不同大小的存储电容,尽可能较少充电时间差异引起的Q点电压VQ差异。
图4为所述像素驱动电路的电压保持原理图,横轴为时间Time、纵轴为负向电压VSS的电流值IVSS,高频驱动对应电容为Cst,电容较小,相同漏电流导致电压变化较快;低频驱动对应电容为Cst+Cb,电容较慢,相同漏电流导致电压变化较慢。根据不同驱动帧频选择不同大小的存储电容,尽可能较少充电时间差异引起的Q点电压VQ差异。
实施例2
如图5所示,在实施例2中包括实施例1中大部分的技术特征,其区别在于,实施例2中的所述补偿电容Cb位于所述低帧频开启晶体管Tb下方,而不是实施例1中所述补偿电容Cb位于所述低帧频开启晶体管Tb上方。
在图5中所述补偿电容Cb位于所述低帧频开启晶体管Tb下方,相对于图 2的结构,所述补偿电容Cb与所述低帧频开启晶体管Tb位置对调。其中上方和下方为在附图中的相对位置描述。
实施例3
如图6所示,在实施例3中包括实施例2中大部分的技术特征,其区别在于,实施例3中的所述低帧频开启晶体管Tb为单栅极结构,而不是实施例2 中所述低帧频开启晶体管Tb为双栅极结构。
同样可理解的是,所述低帧频开启晶体管Tb为单栅极结构也可替换实施例1中所述低帧频开启晶体管Tb为双栅极结构。
基于同样的发明构思,本发明其中一实施例中提供一种显示面板,包括上述任一种所述的驱动电路。本实施例中的显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本实施例提供的显示面板的工作原理,与前述驱动电路的实施例工作原理一致,具体结构关系及工作原理参见前述驱动电路实施例,此处不再赘述。
如图7所示,本发明还提供一种所述显示面板的驱动方法,其包括如下步骤:
S1、显示面板应用切换步骤,用于点亮屏幕或切换应用软件的显示画面;
S2、应用帧频检测步骤,用于检测所述显示面板当前应用软件的帧频;
S3、应用帧频判断步骤,当驱动系统检测显示端应用软件需低帧频驱动时,系统端会切换低帧频模式并输出切换信号到显示面板;当驱动系统检测显示端应用软件需高帧频驱动时,系统端会切换高帧频模式并输出切换信号到显示面板;其中当检测的帧频小于等于60Hz时判定为低帧频,此时为低帧频模式;当检测的帧频大于60Hz时判定为高帧频,此时为高帧频模式;以及
S4、低帧频开启晶体管控制步骤,在低帧频模式时,所述控制信号Cb_EN 控制所述低帧频开启晶体管Tb开启,所述补偿电容Cb和所述存储电容Cst并联使用;在高帧频模式时,所述控制信号Cb_EN控制所述低帧频开启晶体管 Tb关闭,所述存储电容Cst单独使用。
值得注意的是,本申请实施例中优选区分低帧频模式和高帧频模式的分界阈值为60Hz,但是不严格限分界阈值为60Hz,其还可以为40~80Hz中的任意整数,其均属于本申请保护范围。所述低帧频模式中的帧频范围为1~60Hz,所述高帧频模式中的帧频范围为60~120Hz。
如图8所示,图8为显示面板应用图7所示的所述显示面板的驱动方法的使用流程图,其对应图7所示的所述显示面板的驱动方法实现驱动。
本发明的技术效果在于,提供一种像素驱动电路、显示面板及其驱动方法,通过增加低帧频补偿电容单元,优化了像素驱动电路中电容结构,相同功能电容分为两个部分,实现了同时兼顾高帧频模式或低帧频模式,可以保证在较低的刷新频率下电压的稳定,同时确保在高帧频驱动时增加了电容值总量,确保在短时间内电压的准确写入。
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述的部分,可以参见其他实施例的相关描述。
以上对本申请实施例所提供的进行了一种像素驱动电路、显示面板及其驱动方法的详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想;本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。
Claims (10)
1.一种像素驱动电路,其特征在于,包括:
第一晶体管,所述第一晶体管的栅极连接第一节点,所述第一晶体管的源极连接第二节点,所述第二节点接入电源电压,所述第一晶体管的漏极连接第三节点;
第二晶体管,所述第二晶体管的栅极与接入第一扫描信号,所述第二晶体管的源极接入数据信号,所述第二晶体管的漏极连接所述第二节点;
存储电容,其一端连接所述电源电压,另一端连接所述第一节点;
低帧频补偿电容单元,与所述存储电容并联连接,其一端连接所述电源电压,另一端连接所述第一节点;以及
有机发光元件,其阳极连接所述第三节点,其阴极连接负向电压。
2.如权利要求1所述的像素驱动电路,其特征在于,所述低帧频补偿电容单元包括串联连接的补偿电容和低帧频开启晶体管。
3.如权利要求2所述的像素驱动电路,其特征在于,所述低帧频开启晶体管为N型或P型晶体管;所述低帧频开启晶体管中有源层的材料包括非晶硅材料或金属氧化物材料,所述金属氧化物材料包括IGZO、IZTO或IGZTO。
4.如权利要求2所述的像素驱动电路,其特征在于,所述低帧频开启晶体管的栅极与接入一控制信号,所述低帧频开启晶体管的源极接入所述电源电压,所述低帧频开启晶体管的漏极连接所述第一节点;当所述像素驱动电路为低帧频模式时,所述控制信号控制所述低帧频开启晶体管开启;当所述像素驱动电路为高帧频模式时,所述控制信号控制所述低帧频开启晶体管关闭。
5.如权利要求1所述的像素驱动电路,其特征在于,还包括:
第三晶体管,所述第三晶体管的栅极接入发光信号,所述第三晶体管的源极接入所述电源电压,所述第三晶体管的漏极连接所述第二节点。
6.如权利要求1所述的像素驱动电路,其特征在于,还包括:
第四晶体管,所述第四晶体管的栅极接入所述第一扫描信号,所述第四晶体管的源极连接所述第一节点,所述第四晶体管的漏极连接所述第三节点。
7.如权利要求1所述的像素驱动电路,其特征在于,还包括:
第五晶体管,所述第五晶体管的栅极接入第二扫描信号,所述第五晶体管的源极连接所述第一节点,所述第五晶体管的漏极接入复位电压。
8.如权利要求1所述的像素驱动电路,其特征在于,还包括:
第六晶体管,所述第六晶体管的栅极与接入发光信号,所述第六晶体管的源极连接所述第三节点,所述第六晶体管的漏极连接所述有机发光元件的阳极。
9.一种显示面板,其特征在于,包括权利要求1-8中任一项所述的驱动电路。
10.一种权利要求9所述的显示面板的驱动方法,其特征在于,包括如下步骤:
显示面板应用切换步骤,用于点亮屏幕或切换应用软件的显示画面;
应用帧频检测步骤,用于检测所述显示面板当前应用软件的帧频;
应用帧频判断步骤,当驱动系统检测显示端应用软件需低帧频驱动时,系统端会切换低帧频模式并输出切换信号到显示面板;当驱动系统检测显示端应用软件需高帧频驱动时,系统端会切换高帧频模式并输出切换信号到显示面板;以及
低帧频开启晶体管控制步骤,在低帧频模式时,所述控制信号控制所述低帧频开启晶体管开启,所述补偿电容和所述存储电容并联使用;在高帧频模式时,所述控制信号控制所述低帧频开启晶体管关闭,所述存储电容单独使用。
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US20220319414A1 (en) | 2022-10-06 |
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