WO2020248246A1 - 显示基板及其制造方法、显示装置 - Google Patents

显示基板及其制造方法、显示装置 Download PDF

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Publication number
WO2020248246A1
WO2020248246A1 PCT/CN2019/091354 CN2019091354W WO2020248246A1 WO 2020248246 A1 WO2020248246 A1 WO 2020248246A1 CN 2019091354 W CN2019091354 W CN 2019091354W WO 2020248246 A1 WO2020248246 A1 WO 2020248246A1
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WO
WIPO (PCT)
Prior art keywords
area
layer
base substrate
display
grooves
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PCT/CN2019/091354
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English (en)
French (fr)
Inventor
蒋志亮
赵攀
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2019/091354 priority Critical patent/WO2020248246A1/zh
Priority to US16/958,949 priority patent/US11495772B2/en
Priority to EP19932902.0A priority patent/EP3985725A4/en
Priority to CN201980000843.2A priority patent/CN112567520A/zh
Publication of WO2020248246A1 publication Critical patent/WO2020248246A1/zh
Priority to US17/952,845 priority patent/US11956988B2/en
Priority to US18/589,950 priority patent/US20240206223A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/842—Containers
    • H10K50/8426—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a manufacturing method thereof, and a display device.
  • Active matrix light-emitting diode active matrix organic light emitting diode, AMOLED
  • AMOLED active matrix organic light emitting diode
  • the AMOLED display substrate uses organic light-emitting materials, the organic light-emitting materials are highly sensitive to water vapor or oxygen. Therefore, when the crack extends to the display area of the AMOLED display substrate, the water vapor or oxygen in the air is likely to pass through the The cracks invade the display area, causing black spots on the display substrate, which affects the quality of the display substrate.
  • the present disclosure provides a display substrate, a manufacturing method thereof, and a display device.
  • the technical solution is as follows:
  • a display substrate is provided, and the display substrate includes:
  • a base substrate has a packaging area and an edge area located around the packaging area, the edge area including a binding area on the side of at least one side of the base substrate;
  • a plurality of inorganic film layers are located on one side of the base substrate and are stacked and arranged;
  • a plurality of first grooves are located in the edge area and are sequentially spaced apart in the direction away from the packaging area, and extend along the periphery of the base substrate, wherein each of the first grooves penetrates For at least one inorganic film layer of the plurality of inorganic film layers, the orthographic projection of the plurality of first grooves on the base substrate does not overlap with the binding area;
  • the organic layer covers the plurality of first grooves.
  • the at least one inorganic film layer includes: a gate insulating layer and an interlayer dielectric layer that are sequentially stacked in a direction away from the base substrate.
  • the plurality of inorganic film layers further include: a buffer layer located between the base substrate and the at least one inorganic film layer, and the buffer layer includes a first buffer pattern and a second buffer layer formed integrally. pattern;
  • the orthographic projection of the first buffer pattern on the base substrate covers the packaging area and part of the edge area, the second buffer pattern is located in the edge area, and the thickness of the first buffer pattern Greater than the thickness of the second buffer pattern;
  • the orthographic projection of the organic layer on the buffer layer partially overlaps the second buffer pattern, and the first groove of the plurality of first grooves farthest from the package area is close to the package.
  • the orthographic projection of one side of the region on the buffer layer overlaps the boundary line of the first buffer pattern and the second buffer pattern.
  • the inorganic film layer between every two adjacent first grooves constitutes a barrier;
  • the plurality of inorganic film layers further include: located between the base substrate and the at least one inorganic film layer A buffer layer in between, the buffer layer includes a first buffer pattern and a second buffer pattern that are integrally formed;
  • the orthographic projection of the first buffer pattern on the base substrate covers the packaging area and part of the edge area, the second buffer pattern is located in the edge area, and the thickness of the first buffer pattern Greater than the thickness of the second buffer pattern;
  • the orthographic projection of the organic layer on the buffer layer partially overlaps the second buffer pattern, and the barrier part farthest away from the encapsulation area is on the buffer layer on the side farthest from the encapsulation area.
  • the orthographic projection overlaps the boundary line of the first buffer pattern and the second buffer pattern.
  • the thickness of the second buffer pattern is 20% of the thickness of the first buffer pattern.
  • the plurality of inorganic film layers include: a barrier layer, a buffer layer, a gate insulating layer, and an interlayer dielectric layer that are sequentially stacked in a direction away from the base substrate;
  • the at least one inorganic film layer includes: the interlayer dielectric layer, the gate insulating layer, and a part of the buffer layer.
  • the plurality of inorganic film layers include: a barrier layer, a buffer layer, a gate insulating layer, and an interlayer dielectric layer that are sequentially stacked in a direction away from the base substrate;
  • the at least one inorganic film layer includes: the interlayer dielectric layer, the gate insulating layer, the buffer layer, and a part of the barrier layer.
  • the orthographic projection of each of the first grooves on the base substrate is a ring shape with an opening
  • the ring surrounds the packaging area, and the orthographic projection of the opening on the base substrate overlaps the binding area.
  • the base substrate further has a display area, and the packaging area surrounds the display area;
  • the shape of the side of the loop away from the binding area matches the shape of the side of the display area away from the binding area.
  • the encapsulation area includes a display area and a peripheral area surrounding the display area, and the ring shape includes: a first side, a second side, a third side, and a fourth side that are sequentially connected;
  • the distance between the first side edge and the side of the peripheral area away from the display area is equal to the distance between the third side edge and the side of the peripheral area away from the display area;
  • the distance between the intersection of the first side and the second side and the side of the peripheral area away from the display area is smaller than the intersection of the first side and the fourth side and the The distance of the side of the peripheral area away from the display area;
  • the distance between the intersection of the third side and the second side and the side of the peripheral area away from the display area is smaller than the intersection of the third and fourth side and the The distance of the side of the peripheral area away from the display area;
  • first side and the third side are arranged opposite to each other, the second side and the fourth side are arranged opposite to each other, and the fourth side is located on the side of the binding area, and The fourth side is provided with the opening.
  • At least one of the corners formed by every two adjacent sides of each side of the ring is rounded.
  • the fourth side edge includes a first part and a second part separated by the opening
  • the angle formed by the first side edge and the first portion and the angle formed by the third side edge and the second portion are both greater than or equal to 90 degrees.
  • the distance between each part of the ring and the edge of the base substrate is equal.
  • the binding area includes a wiring fan-out area and a welding area, and the welding area overlaps the opening;
  • Both ends of the first groove are located at the edge of the side of the base substrate close to the side of the binding area, and each of the two ends of the first groove is connected to the welding area The spacing between them is 5 to 10 microns.
  • the ring is surrounded by at least one of a bar shape and an arc shape.
  • the plurality of first grooves are arranged at equal intervals.
  • the base substrate is a flexible substrate
  • the binding area includes: a first sub-area, a bending area, and a second sub-area that are sequentially away from the packaging area, and a welding area in the binding area Located in the second sub-region;
  • the orthographic projections of the two ends of the first groove on the base substrate do not overlap with the bending area, and are located on a side of the first sub-region close to the bending area.
  • the plurality of inorganic film layers further have a second groove, and an orthographic projection of the second groove on the base substrate covers the bending area;
  • the plurality of inorganic film layers include: a barrier layer, a buffer layer, a gate insulating layer, and an interlayer dielectric layer stacked in sequence along a direction away from the base substrate, and the second groove penetrates the interlayer dielectric layer , The gate insulating layer, the buffer layer and part of the barrier layer.
  • the display substrate further includes: a first groove of the plurality of first grooves that is close to the encapsulation area on a side close to the encapsulation area, and is far from the plurality of first grooves.
  • the distance between the first groove of the encapsulation area and the side close to the encapsulation area is 60 microns.
  • the encapsulation area includes a display area and a peripheral area surrounding the display area, and the display substrate further includes: a barrier dam located in the peripheral area;
  • the orthographic projection of the organic layer on the base substrate does not overlap with the orthographic projection of the barrier dam on the base substrate.
  • a method for manufacturing a display substrate includes:
  • the base substrate having an encapsulation area and an edge area located around the encapsulation area, the edge area including a binding area on the side of at least one side of the base substrate;
  • a plurality of first grooves extending along the periphery of the base substrate are formed in the edge area and in a direction away from the packaging area. Each of the first grooves penetrates the plurality of first grooves.
  • the orthographic projection of the plurality of first grooves on the base substrate does not overlap with the binding area;
  • An organic material is used to form an organic layer covering the plurality of first grooves.
  • a display device in yet another aspect, includes the display substrate as described in the foregoing aspect.
  • FIG. 1 is a top view of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a cross-sectional view of a display substrate provided by an embodiment of the present disclosure
  • FIG. 3 is a cross-sectional view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 4 is a cross-sectional view of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 5 is a cross-sectional view of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 6 is a cross-sectional view of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 7 is a top view of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 8 is a top view of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 9 is a top view of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 10 is a top view of still another display substrate provided by an embodiment of the present disclosure.
  • FIG. 11 is a top view of a first ring structure provided by an embodiment of the present disclosure.
  • FIG. 12 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 1 is a top view of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 2 is a cross-sectional view of the display substrate shown in FIG. 1 in the MM' direction.
  • the display substrate may include: a base substrate 01, a plurality of inorganic film layers 02, a plurality of first grooves C1, and an organic layer 03.
  • the inorganic film layer 02 may be made of inorganic materials, and the organic layer 03 may be made of organic materials.
  • the base substrate 01 may have a packaging area A1 and an edge area A2 located around the packaging area A1.
  • the edge area A2 includes a binding area A21 on the side of at least one side of the base substrate 01.
  • FIG. 1 only shows the binding area A21 on the side of one side.
  • the plurality of inorganic film layers 02 can be located on one side of the base substrate 01 and stacked.
  • FIG. 2 only shows 4 inorganic film layers located on one side of the base substrate 01 and stacked.
  • the plurality of first grooves C1 may be located in the edge area A2 and sequentially spaced apart in the direction away from the packaging area A1, and extend along the periphery of the base substrate 01.
  • FIG. There are four first grooves C1 extending from the periphery, and Figure 1 shows a top view of the two first grooves C1.
  • each first groove C1 can penetrate at least one inorganic film layer 02 of the plurality of inorganic film layers 02, and the orthographic projection of the plurality of first grooves C1 on the base substrate 01 is different from the binding area A21 overlapping.
  • the organic layer 03 may cover a plurality of first grooves C1.
  • the plurality of first grooves C1 are located in the edge area A2, and there will be a gap between the first grooves C1 and the packaging area A1, the plurality of first grooves C1 can block the cracks that appear at the edge of the display substrate, and avoid the cracks.
  • the package area A1 extends. Since the plurality of first grooves C1 can block the extension of the cracks, the inorganic film layer between two adjacent first grooves C1 can constitute a blocking portion, which can also be called a crack dam (Crack Dam).
  • the base substrate 01 may further include a display area A11
  • the packaging area A1 may include a display area A11 and a peripheral area A12 surrounding the display area A11. That is, referring to FIG. 2, the display area A11 may also be covered with the plurality of inorganic film layers 02.
  • the edge area A2 may be an annular area surrounding the packaging area A1.
  • the binding area A21 may be located at a side of the edge area A2 close to a flexible printed circuit board (FPC) or a chip on film (COF).
  • FPC flexible printed circuit board
  • COF chip on film
  • the embodiments of the present disclosure provide a display substrate. Because the edge area of the base substrate not only includes a plurality of first grooves penetrating through at least one inorganic film layer, but also includes an organic layer covering the plurality of first grooves, wherein the hardness of the organic material forming the organic layer is The hardness of the inorganic material forming the inorganic film layer is relatively large. Therefore, the combination of hardware and software effectively improves the impact resistance of the display substrate, buffers the external force on the display substrate, effectively avoids the problem of package failure caused by cracks extending to the packaging area, and ensures the quality of the display substrate.
  • the orthographic projections of the plurality of first grooves on the base substrate do not overlap with the bonding area, it is possible to prevent the metal traces located in the bonding area from being exposed when the first grooves are formed by the etching process. Corrosion ensures the yield of the display substrate.
  • the orthographic projection of the organic layer 03 on the base substrate 01 may not overlap with the binding area A21.
  • the organic layer covers the welding area in the bonding area, which causes the problem that the metal traces in the bonding area cannot be normally bonded.
  • the plurality of stacked inorganic film layers may cover the packaging area A1 and the edge area A2.
  • a plurality of laminated inorganic film layers covering the packaging area A1 and the edge area A2 may be formed on the base substrate 01 first. Then, the portion of the at least one inorganic film layer located in the edge area A2 can be etched to obtain the plurality of first grooves C1.
  • FIG. 3 is a cross-sectional view of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate includes four inorganic film layers 02 located on one side of the base substrate 01, and the four inorganic film layers 02 may include: barrier layers ( barrier 021, buffer 022, gate insulator (GI) 023, and inter-level dielectric (ILD) 024.
  • barrier layers barrier 021, buffer 022, gate insulator (GI) 023, and inter-level dielectric (ILD) 024.
  • each first groove C1 may include: sequentially stacked in a direction away from the base substrate 01 The gate insulating layer 023 and the interlayer dielectric layer 024. That is, each first groove C1 may only penetrate the gate insulating layer 023 and the interlayer dielectric layer 024.
  • the barrier formed between two adjacent first grooves C1 may be formed by sequentially stacked gate insulating layer patterns and interlayer dielectric layer patterns.
  • the gate insulation layer pattern is located in the gate insulation layer 023, and the interlayer dielectric layer pattern is located in the interlayer dielectric layer 024.
  • the plurality of inorganic film layers 02 may further include: a buffer layer 022 located between the base substrate 01 and at least one inorganic film layer 02.
  • the buffer layer 022 may include a first buffer pattern 0221 and a second buffer pattern 0222 formed integrally.
  • the orthographic projection of the first buffer pattern 0221 on the base substrate 01 covers the packaging area A1 and part of the edge area A2, and the second buffer pattern 0222 is located in the edge area A2, that is, the second The buffer pattern 0222 is close to the edge of the base substrate 01 relative to the first buffer pattern 0221, and the thickness d1 of the first buffer pattern 0221 is greater than the thickness d2 of the second buffer pattern 0222.
  • the orthographic projection of the organic layer 03 on the buffer layer 022 partially overlaps the second buffer pattern 0222.
  • the first groove C1a that is, the outermost first groove C1a
  • the orthographic projection on the buffer layer 022 is the same as the first The boundary line of the buffer pattern 0221 and the second buffer pattern 0222 overlaps.
  • the barrier B1 (that is, the outermost barrier B1) farthest away from the packaging area A1 is away from the packaging area
  • the orthographic projection of one side of A1 on the buffer layer 022 overlaps the boundary line of the first buffer pattern 0221 and the second buffer pattern 0222.
  • each functional film layer is formed on the base substrate 01, the base substrate 01 needs to be cut at the edge area A2 of the base substrate 01 to obtain a display substrate. Therefore, by forming the second buffer pattern 0222 with a smaller thickness on the side of the edge area A2 away from the package area A1, the probability of the edge of the display substrate fractured by cutting can be effectively reduced, thereby avoiding the problem that the fracture extends to the package area and causes the package to fail. Accordingly, it is possible to prevent water vapor or oxygen from entering the display area, causing black spots on the display substrate, and further improve the yield of the display substrate.
  • the first buffer pattern 0221 and the second buffer overlaps, that is, the orthographic projection of the first grooves C1 on the buffer layer 022 only overlaps the first buffer pattern 0221. Therefore, the orthographic projection of the organic layer 03 on the buffer layer 022 overlaps with the second buffer layer.
  • the pattern 0222 is partially overlapped, which can ensure that the organic layer 03 completely covers the barrier formed between the plurality of first grooves C1, and further ensures the impact resistance of the display substrate.
  • the thickness d2 of the second buffer pattern 0222 may be 20% of the thickness d1 of the first buffer pattern 0221.
  • a buffer layer may be formed on the base substrate 01 first, and then a portion of the buffer layer away from the packaging area A1 may be etched.
  • the portion of the buffer layer away from the packaging area A1 may be etched, and the etching of the buffer layer may be combined with the plurality of first grooves.
  • the etching of C1 is performed simultaneously.
  • the etching thickness of the buffer layer 022 can be 80% of the thickness of the buffer layer 022, and then the integrated first buffer pattern 0221 and the second buffer pattern 0222 can be obtained.
  • FIG. 5 is a cross-sectional view of still another display substrate provided by an embodiment of the present disclosure.
  • at least one inorganic film layer penetrated by each first groove C1 may include: an interlayer dielectric layer 024, a gate insulating layer 023 and a part of the buffer layer 022. That is, each first groove C1 can penetrate the interlayer dielectric layer 024 and the gate insulating layer 023, and only penetrate a part of the buffer layer 022.
  • the barrier formed between two adjacent first grooves C1 may be formed by sequentially layering a buffer layer pattern, a gate insulating layer pattern, and an interlayer dielectric layer pattern.
  • the buffer layer pattern may be located in the buffer layer 022
  • the gate insulating layer pattern may be located in the gate insulating layer 023
  • the interlayer dielectric layer pattern may be located in the interlayer dielectric layer 024.
  • FIG. 6 is a cross-sectional view of yet another display substrate provided by an embodiment of the present disclosure.
  • at least one inorganic film layer penetrated by each first groove C1 may include: an interlayer dielectric layer 024, a gate insulating layer 023, a buffer layer 022, and a partial barrier layer 021 . That is, each first groove C1 can penetrate the interlayer dielectric layer 024, the gate insulating layer 023, and the buffer layer 022, and only penetrate a part of the barrier layer 021.
  • the barrier formed between two adjacent first grooves can be formed by sequentially stacked barrier layer patterns, buffer layer patterns, gate insulating layer patterns, and interlayer dielectric layer patterns.
  • the barrier layer pattern may be located in the barrier layer 021
  • the buffer layer pattern may be located in the buffer layer 022
  • the gate insulating layer pattern may be located in the gate insulating layer 023
  • the interlayer dielectric layer pattern may be located in the interlayer dielectric layer 024.
  • At least one inorganic film layer penetrated by the first groove C1 may include only the interlayer dielectric layer 024. That is, each first groove C1 may only penetrate the interlayer dielectric layer 024, and correspondingly, the barrier formed between two adjacent first grooves C1 may only be formed by the interlayer dielectric layer pattern.
  • the first groove C1 ie, the innermost first groove
  • the plurality of first grooves C1 close to the packaging area A1 is close to the side of the packaging area A1
  • the distance d3 of the first groove C1 (that is, the outermost first groove) of the groove C1 away from the packaging area A1 close to the packaging area A1 may be 60 microns. That is, when the part of the at least one inorganic film layer located in the edge area A2 is etched, the etching can be started at a position 60 microns away from the edge of the at least one inorganic film layer.
  • each first groove C1 on the base substrate 01 may be a ring shape with an opening.
  • the first groove C1 closest to the packaging area A1 is taken as an example for description.
  • the inorganic film layer may include a plurality of first grooves C1.
  • each ring shape ie, each first groove C1
  • the orthographic projection of each opening on the base substrate 01 can be the same as the binding area A21.
  • Overlap that is, the width of each opening may be greater than the width of the binding area A21.
  • the base substrate 01 also has a display area A11.
  • the shape of the side of the ring away from the binding area A21 can match the shape of the side of the display area A11 away from the binding area A21.
  • the side of the display area A11 away from the binding area A21 has a notch, that is, the middle of the side of the display area A11 away from the binding area A21 is recessed toward the side close to the binding area A21.
  • the side of the ring away from the binding area A21 also has a cutout, that is, referring to FIG.
  • the ring that is, the middle of the side of the first groove C1 away from the binding area A21 is also toward the side close to the binding area A21 Sunken.
  • the position, shape, and size of the cutout on the side of the first groove C1 away from the binding area A21 and the cutout on the side of the display area A11 away from the binding area A21 may be the same.
  • the packaging area A1 may include a display area A11 and a peripheral area A12 surrounding the display area A11.
  • the ring shape of the orthographic projection of the first groove C1 on the base substrate 01 may include: a first side C11, a second side C12, a third side C13, and a fourth side C14 that are sequentially connected.
  • first side C11 and the third side C13 may be disposed oppositely
  • the second side C12 and the fourth side C14 may be disposed oppositely
  • the fourth side C14 may be located on the side where the binding area A21 is located
  • the four sides C14 may be provided with openings, that is, referring to FIG. 8, the fourth side C14 is divided into two sections by the opening.
  • the first side C11 and the third side C13 can also be arranged in parallel
  • the second side C12 and the fourth side C14 can also be arranged in parallel.
  • the distance d4 between the first side C11 and the side of the peripheral area A12 away from the display area A11 may be equal to the distance d5 between the third side C13 and the side of the peripheral area A12 away from the display area A11.
  • the distance d6 between the intersection P1 of the first side C11 and the second side C12 and the side of the peripheral area A12 away from the display area A11 may be smaller than the intersection P2 of the first side C11 and the fourth side C14 and the peripheral area A12 far away
  • the pitch d8 on one side of the display area A11 may be smaller than the intersection P4 of the third side C13 and the fourth side C14 and the peripheral area A12 far away
  • the distance d6 between the intersection point P1 of the first side C11 and the second side C12 and the side of the peripheral area A12 away from the display area A11 may be equal to the intersection P3 of the third side C13 and the second side C12 and the peripheral area
  • the distance d7 between the side of A12 away from the display area A11; the distance d8 between the intersection P2 of the first side C11 and the fourth side C14 and the side of the peripheral area A12 away from the display area A11 is equal to the third side C13 and the fourth side
  • the distance d4 between the first side C11 and the side of the peripheral area A12 away from the display area A11, and the distance d5 between the third side C13 and the side of the peripheral area A12 away from the display area A11, may both be smaller than the first side C11 and
  • the distance d6 between the intersection point P1 of the second side C12 and the side of the peripheral area A12 away from the display area A11 is smaller than the intersection P3 of the third side C13 and the second side C12 and the peripheral area A12 away from the display area A11.
  • Side spacing d7 is used to reduce the intersection point P1 of the second side C12 and the side of the peripheral area A12 away from the display area A11.
  • the distance between the left and right sides of the ring and the side of the peripheral area A12 away from the display area A11 may be equal.
  • the two corners on the side of the ring away from the binding area A21 and the side of the peripheral area A12 away from the display area A11 are equally spaced.
  • the two corners of the ring on the side close to the binding area A21 and the side of the peripheral area A12 away from the display area A11 are equal in distance.
  • the distance between the two corners on the side of the ring away from the binding area A21 and the side of the peripheral area A12 away from the display area A11 is smaller than the two corners of the ring on the side close to the binding area A21 and the side of the peripheral area A12 away from the display area A11 Pitch.
  • the distance between the left and right sides of the ring and the side of the peripheral area A12 away from the display area A11 is smaller than the distance between the two corners of the ring on the side away from the binding area A21 and the side of the peripheral area A12 away from the display area A11.
  • the distance between each side and the side of the peripheral area A12 away from the display area A11 may refer to: the side and the peripheral area A12 away from the display area A11. The shortest distance to the side.
  • the distance between each part of the ring shape (ie, the first groove C1) and the edge of the base substrate 01 may be equal.
  • the distance may refer to the shortest distance between any place of the first groove C1 and the edge of the base substrate 01.
  • the fourth side C14 may include a first part C141 and a second part C142 separated by an opening.
  • the corners formed by every two adjacent sides of each side of the ring at least one corner may be rounded.
  • a section of each side near the other side may be arc-shaped.
  • the angle ⁇ formed by the first side C11 and the second side C12, and the angle ⁇ formed by the third side C13 and the second side C12 may be rounded corners.
  • the angle ⁇ formed by the first portion C141 of the first side C11 and the fourth side C14 and the angle ⁇ formed by the second portion C142 of the third side C13 and the fourth side C14 may both be square angles. That is, for each side of the first portion C141 of the first side C11 and the fourth side C14, a section close to the other side may be linear. For each side of the second portion C142 of the third side C13 and the fourth side C14, a section close to the other side may be linear.
  • the ring shape may be a rectangle with one side open, and the angle ⁇ formed by every two adjacent sides may be rounded corners.
  • the angle formed by the first side C11 and the first portion C141, and the angle formed by the third side C13 and the second portion C142 may both be greater than or equal to 90 degrees.
  • the angle ⁇ formed by the first side C11 and the first portion C141 and the angle ⁇ formed by the third side C13 and the second portion C142 may both be equal to 90 degrees, that is, both are right angles.
  • the angle ⁇ formed by the first side C11 and the first portion C141, and the angle ⁇ formed by the third side C13 and the second portion C142 may both be greater than 90 degrees, that is, both are obtuse angles.
  • the bonding area A21 may include a bonding pad A211 and a fanout area A212.
  • the welding area A211 overlaps with the orthographic projection of the opening K1 on the binding area A21.
  • both ends of the first groove C1 are located on both sides of the welding area A211.
  • both ends of the first groove C1 are located at the edge of the side of the base substrate 01 close to the binding area A21, that is, referring to FIG. 7, both ends of the first groove C1 are located under the base substrate 01 Edge M1. And the distance d0 between each of the two ends of the first groove C1 and the welding area A211 is 5-10 microns.
  • the base substrate 01 may be a flexible substrate. That is, the base substrate 01 may be made of a flexible material.
  • the binding area A21 may include a first sub-area A3, a bending area A4, and a second sub-area A5.
  • the portion of the base substrate 01 located in the bending area A4 may be Bent shape.
  • the first sub-area A3 is located on the front side of the display substrate, that is, the first sub-area A3 and the display area A11 are located on the same surface, and the second sub-area A5 is bent to the area on the back of the display substrate, that is, the second sub-area A5 It is located on a different side from the display area A11.
  • the welding area A211 in the binding area A21 may be located in the second sub-area A5, and the wiring fan-out area A212 in the binding area A21 may be located in the first sub-area A3 and the bending area A4.
  • the orthographic projections of both ends of the first groove C1 on the base substrate 01 do not overlap with the bending area A4, and are located on the side of the first sub-region A3 close to the bending area A4 .
  • the bending area A4 is realized by bending the base substrate using a special process after forming a plurality of first grooves C1. Therefore, by arranging the orthographic projection of a plurality of first grooves C1 on the base substrate 01 to be located on the side of the first sub-area A3 close to the bending area A4, it can be avoided that when the bending area A4 is formed, the adjacent two second A barrier formed between the grooves C1 is broken, which further ensures the quality of the display substrate.
  • the plurality of inorganic film layers included in the display substrate may further have a second groove
  • the orthographic projection of the second groove on the base substrate may cover the bending area A4
  • the second groove may penetrate the layer Intermediate layer 024, gate insulating layer 023, buffer layer 022, and partial barrier layer 021. That is, the second groove can penetrate the interlayer dielectric layer 024, the gate insulating layer 023, and the buffer layer 022, and only penetrate a part of the barrier layer 021.
  • the interlayer dielectric layer 024, the gate insulating layer 023, the buffer layer 022 and the part of the barrier layer 021 in the bending area A4 among the plurality of inorganic film layers can be etched to obtain the second groove. Since the bending process of the base substrate 01 is performed after forming a plurality of inorganic film layers, by first forming a second groove in the bending area A4, the inorganic film in the bending area A4 is first etched The layer makes the thickness of the film layer on the base substrate 01 in the portion A4 of the bending area thinner, which can facilitate the bending process.
  • the inorganic film layer in the second sub-region A5 may include an interlayer dielectric layer 024 and a gate insulating layer 023, that is, the inorganic film layer in the second sub-region A5 may not be etched, and The inorganic film layer located in the first sub-region A3 may not be etched.
  • the pins (ie, pin pins) at the welding area A211 may also include a source metal layer and a drain metal layer on the side of the plurality of inorganic film layers 02 away from the base substrate 01, and the source metal layer
  • the source metal layer in the display area A11, the drain metal layer and the drain metal layer in the display area A11 can be formed by one patterning process.
  • the edge area A2 of the base substrate 01 may also be provided with a cutting line L1 surrounding the first groove C1.
  • cutting can be performed along the cutting line L1 to obtain a display substrate.
  • the ring shape matches the shape of the cutting line L1, that is, the ring-shaped first groove C1 can be designed along the shape of the cutting line L1.
  • the edges of the display substrate are prone to cracks during the cutting operation, by designing the first groove C1 along the shape of the cutting line L1, the cracks generated by the cutting operation can be effectively blocked, that is, the occurrence of the cutting operation can be effectively avoided The extension of the crack.
  • a plurality of first grooves C1 included in the display substrate may be arranged at equal intervals, that is, between every two adjacent first grooves C1
  • the spacing can be a fixed value.
  • the first groove C1 includes 5 rings having openings.
  • FIG. 7 shows that it includes two first grooves C1 in an annular shape with openings.
  • the ring shape may be surrounded by at least one of a bar shape and an arc shape.
  • the ring shape is surrounded by several strip-shaped structures and several arc-shaped structures.
  • FIG. 11 is a top view of a first groove C1 in a ring shape with an opening provided by an embodiment of the present disclosure.
  • the ring can be surrounded by a plurality of arc-shaped structures.
  • the orthographic projection of each side of the ring on the base substrate 01 may be wavy.
  • the first direction impact force generated at a certain point P on the first groove C1 is F.
  • the impact force F can be decomposed into the impact force in the second direction by the arc-shaped first groove C1.
  • the tangent direction, ⁇ is the angle between the tangent direction and the first direction.
  • the impact force F1 in the second direction can be less than or equal to F for an arc-shaped ring.
  • the impact force of the ring surrounded by the arc is lower. Accordingly, the ability of the first groove C1 to block the crack extension can be further improved, and the risk of crack extension can be effectively reduced.
  • the packaging area A1 includes a display area A11 and a peripheral area A12 surrounding the display area A11.
  • the display substrate may further include a blocking dam 04 located in the peripheral area A12.
  • the blocking dam 04 can also be made of organic materials.
  • the orthographic projection of the organic layer 03 on the base substrate 01 and the orthographic projection of the barrier dam 04 on the base substrate 01 may not overlap.
  • the blocking dam 04 Since the blocking dam 04 is located in the peripheral area A12, there will be a gap between the blocking dam 04 and the display area A11, which can effectively prevent the organic material from flowing out of the encapsulation area A1 when organic materials are used to form the organic encapsulation film layer in the encapsulation film.
  • the problem that water vapor in the air enters the display area due to the hydrophilic nature of the organic material, which affects the quality of the display area further guarantees the quality of the display substrate.
  • the blocking dam 04 may include at least one closed ring structure 041, and each ring structure 041 may surround the display area A11 of the base substrate 01. By surrounding the display area A11 with the ring structure 041, effective protection of the periphery of the display area A11 can be achieved.
  • the blocking dam 04 may include a plurality of ring structures 041 arranged at intervals.
  • FIGS. 7 to 10 all show a blocking dam 04 including two ring structures 041.
  • the plurality of ring structures 041 may be arranged at equal intervals, that is, the interval between every two adjacent ring structures 041 may be a fixed value.
  • the blocking dam 04 can be formed by deposition.
  • the base substrate 01 may be made of a flexible material.
  • the flexible material may be a polyimide (PI) material, which has good properties such as high temperature resistance, low temperature resistance, and oxidation resistance.
  • PI polyimide
  • the embodiments of the present disclosure provide a display substrate. Because the edge area of the base substrate not only includes a plurality of first grooves penetrating through at least one inorganic film layer, but also includes an organic layer covering the plurality of first grooves, wherein the hardness of the organic material forming the organic layer is The hardness of the inorganic material forming the inorganic film layer is relatively large. Therefore, the combination of hardware and software effectively improves the impact resistance of the display substrate, buffers the external force on the display substrate, effectively avoids the problem of package failure caused by cracks extending to the packaging area, and ensures the quality of the display substrate.
  • the orthographic projections of the plurality of first grooves on the base substrate do not overlap with the bonding area, it is possible to prevent the metal traces located in the bonding area from being exposed when the first grooves are formed by the etching process. Corrosion ensures the yield of the display substrate.
  • FIG. 12 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure. This method can be used to manufacture the display substrate shown in any one of FIGS. 1 to 10. As shown in Figure 12, the method may include:
  • Step 101 Provide a base substrate.
  • the base substrate may be a glass substrate.
  • the base substrate 01 may have a packaging area A1 and an edge area A2 located around the packaging area A1.
  • the edge area A2 may include a binding area A21 on the side of at least one side of the base substrate 01.
  • the base substrate 01 may include two flexible material layers and a barrier layer located between the two flexible material layers, and the flexible material forming the flexible material layer may be PI material.
  • Step 102 Use inorganic materials to form a plurality of stacked inorganic film layers on one side of the base substrate.
  • inorganic materials may be used to form multiple inorganic film layers on one side of the base substrate through a patterning process.
  • the patterning process may include: gluing, exposure, development, and etching
  • the inorganic material may include at least one of silicon oxide, silicon nitride, and silicon oxynitride.
  • the plurality of inorganic film layers may include: a barrier layer, a buffer layer, a gate insulating layer, and an interlayer dielectric layer that are sequentially stacked in a direction away from the base substrate.
  • the barrier layer can effectively block water vapor or oxygen from entering the base substrate, and improve the water barrier, oxygen barrier, and scratch resistance of the base substrate.
  • the inorganic material may include at least one of silicon oxide, silicon nitride, and silicon oxynitride.
  • the inorganic materials used to form different inorganic film layers may be the same or different.
  • Step 103 forming a plurality of first grooves sequentially spaced in the edge area and in a direction away from the packaging area and extending along the periphery of the base substrate.
  • At least one inorganic film layer of the plurality of inorganic film layers may be etched at the edge area A2 to obtain the plurality of first grooves.
  • each first groove may penetrate at least one of the plurality of inorganic film layers, and the orthographic projection of the plurality of first grooves on the base substrate may not overlap with the binding area.
  • Step 104 Use an organic material to form an organic layer covering the plurality of first grooves.
  • organic materials may be used to form an organic layer covering the first grooves on the side of the plurality of first grooves away from the base substrate.
  • the organic layer covering the first groove it can act as a buffer when collision occurs in a direction perpendicular to the base substrate.
  • the hardness of organic materials is greater than that of inorganic materials, the impact resistance of the display substrate can be further improved through the combination of soft and hard, and the extension of cracks can be further effectively avoided.
  • the embodiments of the present disclosure provide a method for manufacturing a display substrate.
  • an inorganic material to form a plurality of first grooves penetrating at least one inorganic film layer in the edge region, and using an organic material with a hardness greater than that of the inorganic material to form an organic layer covering the plurality of first grooves.
  • the combination of software and hardware effectively improves the impact resistance of the display substrate, buffers the external force on the display substrate, and effectively avoids the problem of package failure caused by cracks extending to the packaging area. This effectively prevents the crack from extending to the display area, causing water vapor or oxygen to invade the display area through the crack, causing black spots on the display substrate, and ensuring the quality of the display substrate.
  • the orthographic projections of the plurality of first grooves on the base substrate do not overlap with the bonding area, it is possible to prevent the metal traces located in the bonding area from being exposed when the first grooves are formed by the etching process. Corrosion ensures the yield of the display substrate.
  • forming a plurality of first grooves may include: etching a portion of at least one inorganic film layer in the edge region of the plurality of inorganic film layers to obtain a plurality of first grooves.
  • the at least one inorganic film layer to be etched may be processed by processes such as glue coating, exposure, and development.
  • At least one inorganic film layer penetrated by each first groove C1 may include: along a direction away from the base substrate
  • the gate insulating layer 023 and the interlayer dielectric layer 024 are sequentially stacked.
  • the foregoing step 103 can be regarded as: etching the gate insulating layer and the interlayer dielectric layer in the edge region of the plurality of inorganic film layers.
  • the manufacturing method of the display substrate may further include: forming a buffer layer on one side of the base substrate.
  • the buffer layer 022 may include a first buffer pattern 0221 and a second buffer pattern 0222 that are integrally formed.
  • the orthographic projection of the first buffer pattern 0221 on the base substrate 01 covers the packaging area A1 and a part of the edge area A2, and the second buffer pattern 0222 is located in the edge area A2.
  • the thickness of the first buffer pattern 0221 is greater than the thickness of the second buffer pattern 0222 of the second buffer pattern.
  • the orthographic projection of the organic layer 02 on the buffer layer 022 partially overlaps the second buffer pattern 0222, and the plurality of first grooves C1 are farthest away from the first groove C1 of the package area A1 (that is, the outermost first groove) C1)
  • the orthographic projection on the buffer layer 022 overlaps the boundary line of the first buffer pattern 0221 and the second buffer pattern 0222.
  • the base substrate 01 Since multiple functional film layers are formed on the base substrate 01, the base substrate 01 needs to be cut in the edge area A2 of the base substrate 01 to obtain the display substrate. Therefore, the edge area A2 is far away from the packaging area A1.
  • the second buffer pattern 0222 with a smaller thickness is formed on one side, which can effectively reduce the probability that the edge of the display substrate will be broken due to a large cutting force, and improve the yield of the display substrate.
  • the orthographic projection on the buffer layer 022 is the same as that of the first buffer pattern 0221 and the second buffer pattern 0222
  • the boundary line overlaps that is, the orthographic projection of the plurality of first grooves C1 on the buffer layer 022 only overlaps the first buffer pattern 0221, so by making the orthographic projection of the organic layer 03 on the buffer layer 022 and the second buffer layer
  • the pattern 0222 is partially overlapped, which can ensure that the organic layer 03 completely covers the barrier formed between the plurality of first grooves C1, and further ensures the impact resistance of the display substrate.
  • At least one inorganic film layer penetrated by each first groove C1 may include: an interlayer dielectric layer 024, a gate insulating layer 023 and part of the buffer layer 022.
  • the above step 103 can be regarded as: etching the interlayer dielectric layer, the gate insulating layer and part of the buffer layer in the edge region of the plurality of inorganic film layers.
  • At least one inorganic film layer penetrated by each first groove C1 may include: an interlayer dielectric layer 024, a gate insulating layer 023, a buffer layer 022 and a partial barrier layer 021.
  • the foregoing step 103 can be regarded as: etching the interlayer dielectric layer, the gate insulating layer, the buffer layer, and part of the barrier layer in the edge region of the plurality of inorganic film layers.
  • At least one inorganic film layer penetrated by each first groove C1 may only include: an interlayer dielectric layer disposed in a direction away from the base substrate.
  • the method may further include: using an organic material to form a barrier dam in the peripheral area included in the packaging area.
  • an organic material may be used to form a barrier dam with a gap between the plurality of inorganic film layers and the display area on the side of the plurality of inorganic film layers away from the base substrate by deposition.
  • the orthographic projection of the organic layer on the base substrate and the orthographic projection of the barrier dam on the base substrate do not overlap. Since the barrier dam is located in the peripheral area included in the encapsulation area and there is a gap between the display area included in the encapsulation area, the barrier dam can effectively prevent the organic material from flowing out when the organic encapsulation film layer in the encapsulation film is formed by using organic materials.
  • the encapsulation area A1 can effectively prevent the water vapor in the air from entering the display area due to the hydrophilic properties of the organic material, which affects the quality of the display area, which further guarantees the quality of the display substrate.
  • the embodiments of the present disclosure provide a method for manufacturing a display substrate.
  • an inorganic material to form a plurality of first grooves penetrating at least one inorganic film layer in the edge region, and using an organic material with a hardness greater than that of the inorganic material to form an organic layer covering the plurality of first grooves.
  • the combination of software and hardware effectively improves the impact resistance of the display substrate, buffers the external force on the display substrate, and effectively avoids the problem of package failure caused by cracks extending to the packaging area. This effectively avoids the problem of cracks extending to the display area, causing water vapor or oxygen to invade the display area through the cracks, causing black spots on the display substrate, and ensuring the quality of the display substrate.
  • the orthographic projections of the plurality of first grooves on the base substrate do not overlap with the bonding area, it is possible to prevent the metal traces located in the bonding area from being exposed when the first grooves are formed by the etching process. Corrosion ensures the yield of the display substrate.
  • An embodiment of the present disclosure provides a display device, which may include a display substrate as shown in any one of FIGS. 1 to 10.
  • the display device can be: LCD panel, electronic paper, OLED panel, AMOLED panel, mobile phone, tablet computer, television, monitor, notebook computer, digital photo frame, navigator and other products or components with display function.
  • the AMOLED panel may be a flexible display panel.

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Abstract

提供一种显示基板及其制造方法、显示装置。由于衬底基板（01）的边缘区域（A2）内不仅包括贯穿至少一个无机膜层（02）的多个第一凹槽（C1），而且还包括覆盖于多个第一凹槽（C1）上的有机层（03），形成有机层（03）的有机材料的硬度相对于形成无机膜层（02）的无机材料的硬度较大，因此通过软硬搭配方式有效提高了显示基板的抗冲击能力，有效避免了裂缝延伸至封装区域（A1）造成封装失效的问题，保证了显示基板的品质，并且，通过使多个第一凹槽（C1）在衬底基板（01）上的正投影与绑定区域（A21）不重叠，可以避免通过刻蚀工艺形成第一凹槽（C1）时，位于绑定区域（A21）的金属走线裸露出来而被腐蚀，确保了显示基板的良率。

Description

显示基板及其制造方法、显示装置 技术领域
本公开涉及显示技术领域，特别涉及一种显示基板及其制造方法、显示装置。
背景技术
有源矩阵发光二极管(active matrix organic light emitting diode，AMOLED)显示基板因其厚度薄、自发光、对比度高、色域广、可弯折以及可制作在柔性衬底基板上等优点被广泛应用于目前的显示领域中。
但是，因AMOLED显示基板的抗冲击能力较差，在制造或者运输等过程中，AMOLED显示基板的边缘容易出现裂缝。又因AMOLED显示基板中采用的是有机发光材料，有机发光材料对水汽或者氧气的敏感度较高，因此当该裂缝延伸至AMOLED显示基板的显示区域时，空气中的水汽或者氧气很可能通过该裂缝侵入显示区域，使得显示基板上产生黑斑，影响显示基板的品质。
发明内容
本公开提供了一种显示基板及其制造方法、显示装置。所述技术方案如下：
一方面，提供了一种显示基板，所述显示基板包括：
衬底基板，所述衬底基板具有封装区域，以及位于所述封装区域周围的边缘区域，所述边缘区域包括在所述衬底基板至少一个边所在侧的绑定区域；
多个无机膜层，位于所述衬底基板的一侧且层叠设置；
多个第一凹槽，位于所述边缘区域且在远离所述封装区域的方向上依次间隔设置，并沿着所述衬底基板的周边延伸，其中，每个所述第一凹槽贯穿所述多个无机膜层中的至少一个无机膜层，所述多个第一凹槽在所述衬底基板上的正投影与所述绑定区域不重叠；
有机层，覆盖于所述多个第一凹槽上。
可选的，所述至少一个无机膜层包括：沿远离所述衬底基板的方向 依次层叠的栅绝缘层和层间介质层。
可选的，所述多个无机膜层还包括：位于所述衬底基板和所述至少一个无机膜层之间的缓冲层，所述缓冲层包括一体形成的第一缓冲图案和第二缓冲图案；
所述第一缓冲图案在所述衬底基板上的正投影覆盖所述封装区域和部分所述边缘区域，所述第二缓冲图案位于所述边缘区域内，且所述第一缓冲图案的厚度大于所述第二缓冲图案的厚度；
其中，所述有机层在所述缓冲层上的正投影，与所述第二缓冲图案部分重叠，所述多个第一凹槽中最远离所述封装区域的第一凹槽靠近所述封装区域的一侧在所述缓冲层上的正投影，与所述第一缓冲图案和所述第二缓冲图案的交界线重叠。
可选的，每相邻两个所述第一凹槽之间的无机膜层构成阻挡部；所多个述无机膜层还包括：位于所述衬底基板和所述至少一个无机膜层之间的缓冲层，所述缓冲层包括一体形成的第一缓冲图案和第二缓冲图案；
所述第一缓冲图案在所述衬底基板上的正投影覆盖所述封装区域和部分所述边缘区域，所述第二缓冲图案位于所述边缘区域内，且所述第一缓冲图案的厚度大于所述第二缓冲图案的厚度；
其中，所述有机层在所述缓冲层上的正投影，与所述第二缓冲图案部分重叠，最远离所述封装区域的阻挡部远离所述封装区域的一侧在所述缓冲层上的正投影，与所述第一缓冲图案和所述第二缓冲图案的交界线重叠。
可选的，所述第二缓冲图案的厚度为所述第一缓冲图案厚度的20％。
可选的，所述多个无机膜层包括：沿远离所述衬底基板的方向依次层叠设置的阻隔层、缓冲层、栅绝缘层和层间介质层；
所述至少一个无机膜层包括：所述层间介质层、所述栅绝缘层以及部分所述缓冲层。
可选的，所述多个无机膜层包括：沿远离所述衬底基板的方向依次层叠设置的阻隔层、缓冲层、栅绝缘层和层间介质层；
所述至少一个无机膜层包括：所述层间介质层、所述栅绝缘层、所述缓冲层以及部分所述阻隔层。
可选的，每个所述第一凹槽在所述衬底基板上的正投影呈具有开口的环形；
所述环形环绕所述封装区域，且所述开口在所述衬底基板上的正投影与所述绑定区域重叠。
可选的，所述衬底基板还具有显示区域，所述封装区域包围所述显示区域；
所述环形远离所述绑定区域的一边的形状，与所述显示区域远离所述绑定区域一边的形状相匹配。
可选的，所述封装区域包括显示区域和包围所述显示区域的周边区域，所述环形包括：依次连接的第一侧边、第二侧边、第三侧边和第四侧边；
所述第一侧边与所述周边区域远离所述显示区域的一侧的间距，等于所述第三侧边与所述周边区域远离所述显示区域的一侧的间距；
所述第一侧边和所述第二侧边的交点与所述周边区域远离所述显示区域的一侧的间距，小于所述第一侧边和所述第四侧边的交点与所述周边区域远离所述显示区域的一侧的间距；
所述第三侧边和所述第二侧边的交点与所述周边区域远离所述显示区域的一侧的间距，小于所述第三侧边和所述第四侧边的交点与所述周边区域远离所述显示区域的一侧的间距；
其中，所述第一侧边和所述第三侧边相对设置，所述第二侧边和所述第四侧边相对设置，所述第四侧边位于所述绑定区域所在侧，且所述第四侧边设有所述开口。
可选的，所述环形的各个侧边中每相邻两个侧边形成的角中，至少一个角为圆角。
可选的，所述第四侧边包括由所述开口分隔的第一部分和第二部分；
所述第一侧边与所述第一部分形成的角，以及所述第三侧边与所述第二部分形成的角均大于或等于90度。
可选的，所述环形的各处与所述衬底基板的边缘的间距均相等。
可选的，所述绑定区域包括走线扇出区和焊接区，所述焊接区与所述开口重叠；
所述第一凹槽的两端均位于所述衬底基板靠近所述绑定区域的一侧的边的边缘处，且所述第一凹槽的两端中的每一端与所述焊接区之间的间距为5至10微米。
可选的，所述环形由条形和弧形中的至少一种形状围成。
可选的，所述多个第一凹槽等间距设置。
可选的，所述衬底基板为柔性基板，所述绑定区域包括：依次远离所述封装区域的第一子区域、弯折区域和第二子区域，所述绑定区域中的焊接区位于所述第二子区域内；
所述第一凹槽的两端在所述衬底基板上的正投影不与所述弯折区域重叠，且位于所述第一子区域靠近所述弯折区域的一侧。
可选的，所述多个无机膜层还具有第二凹槽，所述第二凹槽在所述衬底基板上的正投影覆盖所述弯折区域；
所述多个无机膜层包括：沿远离所述衬底基板的方向依次层叠设置的阻隔层、缓冲层、栅绝缘层和层间介质层，所述第二凹槽贯穿所述层间介质层、所述栅绝缘层、所述缓冲层以及部分所述阻隔层。
可选的，所述显示基板还包括：所述多个第一凹槽中靠近所述封装区域的第一凹槽靠近所述封装区域的一侧，与所述多个第一凹槽中远离所述封装区域的第一凹槽靠近所述封装区域一侧的间距为60微米。
可选的，所述封装区域包括显示区域和包围所述显示区域的周边区域，所述显示基板还包括：位于所述周边区域内的阻挡坝；
所述有机层在所述衬底基板上的正投影，与所述阻挡坝在所述衬底基板上的正投影不重叠。
另一方面，提供了一种显示基板的制造方法，所述方法包括：
提供衬底基板，所述衬底基板具有封装区域，以及位于所述封装区域周围的边缘区域，所述边缘区域包括在所述衬底基板至少一个边所在侧的绑定区域；
采用无机材料在所述衬底基板的一侧形成多个层叠的无机膜层；
在所述边缘区域且在远离所述封装区域的方向上形成依次间隔，且沿着所述衬底基板的周边延伸的多个第一凹槽，每个所述第一凹槽贯穿多个所述无机膜层中的至少一个无机膜层，所述多个第一凹槽在所述衬底基板上的正投影与所述绑定区域不重叠；
采用有机材料形成覆盖于所述多个第一凹槽上的有机层。
又一方面，提供了一种显示装置，所述显示装置包括：如上述方面所述的显示基板。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开实施例提供的一种显示基板的俯视图；
图2是本公开实施例提供的一种显示基板的截面图；
图3是本公开实施例提供的另一种显示基板的截面图；
图4是本公开实施例提供的又一种显示基板的截面图；
图5是本公开实施例提供的再一种显示基板的截面图；
图6是本公开实施例提供的再一种显示基板的截面图；
图7是本公开实施例提供的另一种显示基板的俯视图；
图8是本公开实施例提供的又一种显示基板的俯视图；
图9是本公开实施例提供的再一种显示基板的俯视图；
图10是本公开实施例提供的再一种显示基板的俯视图；
图11是本公开实施例提供的一种第一环状结构的俯视图；
图12是本公开实施例提供的一种显示基板的制造方法流程图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。
图1是本公开实施例提供的一种显示基板的俯视图。图2是图1所示的显示基板在MM'方向上的截面图。如图1和图2所示，该显示基板可以包括：衬底基板01，多个无机膜层02，多个第一凹槽C1，以及有机层03。该无机膜层02可以由无机材料制成，该有机层03可以由有机材料制成。
参考图1和图2可以看出，该衬底基板01可以具有封装区域A1，以及位于封装区域A1周围的边缘区域A2。该边缘区域A2包括在衬底基板01至少一个边所在侧的绑定区域A21，例如，图1仅示出了一个边所在侧的绑定区域A21。
该多个无机膜层02可以位于衬底基板01的一侧且层叠设置，例如图2仅示出了位于衬底基板01的一侧且层叠设置的4个无机膜层。
该多个第一凹槽C1可以位于边缘区域A2且在远离封装区域A1的方向上 依次间隔设置，并沿着衬底基板01的周边延伸，例如，图2示出了沿着衬底基板01的周边延伸的四个第一凹槽C1，图1示出了两个第一凹槽C1的俯视图。
其中，每个第一凹槽C1可以贯穿多个无机膜层02中的至少一个无机膜层02，且该多个第一凹槽C1在衬底基板01上的正投影与绑定区域A21不重叠。该有机层03可以覆盖于多个第一凹槽C1上。
由于该多个第一凹槽C1位于边缘区域A2内，与封装区域A1之间会存在间隙，因此该多个第一凹槽C1可以对显示基板边缘出现的裂缝起到阻挡作用，避免裂缝向封装区域A1延伸。由于该多个第一凹槽C1可以阻挡裂缝的延伸，因此相邻两个第一凹槽C1之间的无机膜层可以构成阻挡部，也可以称为裂缝坝(Crack Dam)。
可选的，参考图1和图2还可以看出，该衬底基板01还可以包括显示区域A11，该封装区域A1可以包括显示区域A11以及包围该显示区域A11的周边区域A12。即参考图2，该显示区域A11内也可以覆盖有该多个无机膜层02。该边缘区域A2可以为包围该封装区域A1的环形区域。且该绑定区域A21可以位于边缘区域A2靠近柔性电路板(flexible printed circuit board，FPC)或覆晶薄膜(chip on film，COF)的一侧。
综上所述，本公开实施例提供了一种显示基板。由于衬底基板的边缘区域内不仅包括贯穿至少一个无机膜层的多个第一凹槽，而且还包括覆盖于多个第一凹槽上的有机层，其中，形成有机层的有机材料的硬度相对于形成无机膜层的无机材料的硬度较大。因此通过软硬搭配方式有效提高了显示基板的抗冲击能力，对显示基板所受外力起到缓冲作用，有效避免了裂缝延伸至封装区域造成封装失效的问题，保证了显示基板的品质。并且，通过使多个第一凹槽在衬底基板上的正投影与绑定区域不重叠，可以避免通过刻蚀工艺形成第一凹槽时，位于绑定区域的金属走线裸露出来而被腐蚀，确保了显示基板的良率。
可选的，在本公开实施例中，该有机层03在衬底基板01上的正投影也可以不与绑定区域A21重叠。相应的，即可以避免有机层覆盖位于绑定区域内的焊接区，导致位于绑定区域的金属走线无法正常绑定的问题。
在本公开实施例中，该多个层叠的无机膜层可以覆盖封装区域A1和边缘区域A2。示例的，在形成多个第一凹槽C1之前，可以先在衬底基板01上形成覆 盖封装区域A1和边缘区域A2的多个层叠的无机膜层。然后可以对至少一个无机膜层位于边缘区域A2的部分进行刻蚀，得到该多个第一凹槽C1。
图3是本公开实施例提供的另一种显示基板的截面图。如图3所示，该显示基板包括：位于衬底基板01一侧的四个无机膜层02，该四个无机膜层02可以包括：沿远离衬底基板01的方向依次层叠的阻隔层(barrier)021、缓冲层(buffer)022、栅绝缘层(gate insulator，GI)023和层间介质层(inter level dielectric，ILD)024。通过在远离衬底基板01的一侧先形成由无机材料制成的阻隔层021，可以有效阻隔水汽或氧气进入衬底基板01内，提高了衬底基板01的阻水、阻氧以及抗刮刻等性能。
作为一种可选的实现方式，参考图3，该多个无机膜层02中，每个第一凹槽C1贯穿的至少一个无机膜层可以包括：沿远离衬底基板01的方向依次层叠的栅绝缘层023和层间介质层024。也即是，每个第一凹槽C1可以仅穿透栅绝缘层023和层间介质层024。
相应的，参考图3，相邻两个第一凹槽C1之间构成的阻挡部即可以由依次层叠的栅绝缘层图案和层间介质层图案形成。其中，栅绝缘层图案位于栅绝缘层023中，层间介质层图案位于层间介质层024中。
进一步的，参考图4，在本公开实施例中，该多个无机膜层02还可以包括：位于衬底基板01和至少一个无机膜层02之间的缓冲层022。该缓冲层022可以包括一体形成的第一缓冲图案0221和第二缓冲图案0222。
其中，参考图4可以看出，第一缓冲图案0221在衬底基板01上的正投影覆盖封装区域A1和部分边缘区域A2，第二缓冲图案0222位于边缘区域A2内，也即是该第二缓冲图案0222相对于第一缓冲图案0221靠近衬底基板01的边缘处，且第一缓冲图案0221的厚度d1大于第二缓冲图案0222的厚度d2。
有机层03在缓冲层022上的正投影与第二缓冲图案0222部分重叠。且多个第一凹槽C1中最远离封装区域A1的第一凹槽C1a(即最外侧的第一凹槽C1a)靠近封装区域A1的一侧，在缓冲层022上的正投影与第一缓冲图案0221和第二缓冲图案0222的交界线重叠。
由于每相邻两个第一凹槽C1之间的无机膜层可以构成阻挡部，因此如图4所示，最远离封装区域A1的阻挡部B1(即最外侧的阻挡部B1)远离封装区域A1的一侧在缓冲层022上的正投影，与第一缓冲图案0221和第二缓冲图案0222 的交界线重叠。
由于在衬底基板01上形成各个功能膜层后，还需要在衬底基板01的边缘区域A2对衬底基板01进行切割，从而得到显示基板。因此通过在边缘区域A2远离封装区域A1的一侧形成厚度较小的第二缓冲图案0222，可以有效降低切割造成显示基板边缘断裂的概率，进而可以避免断裂延伸至封装区域，导致封装失效的问题，相应的，即可以避免水汽或者氧气等侵入显示区域，造成显示基板出现黑斑的问题，进一步提高了显示基板的良率。
并且，由于多个第一凹槽C1最远离封装区域A1的第一凹槽C1(即最外侧的第一凹槽C1)靠近封装区域A1的一侧，与第一缓冲图案0221和第二缓冲图案0222的交界线重叠，即多个第一凹槽C1在缓冲层022上的正投影仅与第一缓冲图案0221重叠，因此通过使有机层03在缓冲层022上的正投影与第二缓冲图案0222部分重叠，可以确保有机层03完全包覆多个第一凹槽C1之间构成的阻挡部，进一步保证了显示基板的抗冲击能力。
可选的，在本公开实施例中，该第二缓冲图案0222的厚度d2可以为第一缓冲图案0221的厚度d1的20％。
示例的，可以先在衬底基板01上形成一层缓冲层，然后对该缓冲层远离封装区域A1的部分进行刻蚀。或者，可以在衬底基板01上形成多个层叠的无机膜层之后，再对该缓冲层远离封装区域A1的部分进行刻蚀，且对该缓冲层的刻蚀可以与多个第一凹槽C1的刻蚀同步进行。其中，对该缓冲层022的刻蚀厚度可以为该缓冲层022厚度的80％，进而即可以得到该一体形成的第一缓冲图案0221和第二缓冲图案0222。
作为另一种可选的实现方式，图5是本公开实施例提供的再一种显示基板的截面图。如图5所示，该多个无机膜层中，每个第一凹槽C1贯穿的至少一个无机膜层可以包括：层间介质层024、栅绝缘层023以及部分缓冲层022。也即是，每个第一凹槽C1可以穿透层间介质层024和栅绝缘层023，并仅穿过部分缓冲层022。
相应的，参考图5，相邻两个第一凹槽C1之间构成的阻挡部即可以由依次层叠的缓冲层图案、栅绝缘层图案和层间介质层图案形成。其中，缓冲层图案可以位于缓冲层022中，栅绝缘层图案可以位于栅绝缘层023中，层间介质层图案可以位于层间介质层024中。
作为又一种可选的实现方式，图6是本公开实施例提供的再一种显示基板的截面图。如图6所示，该多个无机膜层中，每个第一凹槽C1贯穿的至少一个无机膜层可以包括：层间介质层024、栅绝缘层023、缓冲层022以及部分阻隔层021。也即是，每个第一凹槽C1可以穿透层间介质层024、栅绝缘层023和缓冲层022，并仅穿过部分阻隔层021。
相应的，参考图6，相邻两个第一凹槽之间构成的阻挡部即可由依次层叠的阻隔层图案、缓冲层图案、栅绝缘层图案和层间介质层图案形成。其中，阻隔层图案可以位于阻隔层021中，缓冲层图案可以位于缓冲层022中，栅绝缘层图案可以位于栅绝缘层023中，层间介质层图案可以位于层间介质层024中。
作为再一种可选的实现方式，该封装区域A1内的多个无机膜层中，第一凹槽C1贯穿的至少一个无机膜层可以仅包括：层间介质层024。也即是，每个第一凹槽C1可以仅穿透层间介质层024，相应的，相邻两个第一凹槽C1之间形成的阻挡部即可以仅由层间介质层图案形成。
可选的，参考图6，多个第一凹槽C1中靠近封装区域A1的第一凹槽C1(即最内侧的第一凹槽)靠近封装区域A1的一侧，与多个第一凹槽C1中远离封装区域A1的第一凹槽C1(即最外侧的第一凹槽)靠近封装区域A1的一侧的间距d3可以为60微米。即在对至少一个无机膜层位于边缘区域A2的部分进行刻蚀时，可以在距离至少一个无机膜层的边缘60微米的位置处开始刻蚀。
图7至图10是本公开实施例提供的多种显示基板的俯视图。如图7至图10所示，每个第一凹槽C1在衬底基板01上的正投影可以呈具有开口的环形。例如，参考图7，其示出了包括两个呈具有开口的环形的第一凹槽C1。又例如，参考图8至图10，其均以最靠近封装区域A1的一个第一凹槽C1为例进行说明，在本公开实施例中，无机膜层可以包括多个第一凹槽C1。
参考图7至图10均可以看出，每个环形(即每个第一凹槽C1)可以均环绕封装区域A1，且每个开口在衬底基板01上的正投影可以与绑定区域A21重叠，即每个开口的宽度可以均大于绑定区域A21的宽度。通过设置形状呈环形的第一凹槽C1环绕封装区域A1，可以实现对封装区域A1四周的有效保护，进一步保证了显示基板的品质。
可选的，参考图1、图7至图10，衬底基板01还具有显示区域A11。环形远离绑定区域A21的一边的形状，可以与显示区域A11远离绑定区域A21一边 的形状相匹配。例如，参考图10，该显示区域A11远离绑定区域A21的一边具有切口(notch)，即该显示区域A11远离绑定区域A21的一边的中部向靠近绑定区域A21的一侧凹陷。相应的，该环形远离绑定区域A21的一边也具有切口，即参考图10，该环形，即该第一凹槽C1远离绑定区域A21的一边的中部也向靠近绑定区域A21的一侧凹陷。且第一凹槽C1远离绑定区域A21的一边具有的切口与显示区域A11远离绑定区域A21的一边具有的切口，位置、形状和大小可以均相同。
可选的，在本公开实施例中，参考图8，封装区域A1可以包括显示区域A11和包围该显示区域A11的周边区域A12。该第一凹槽C1在衬底基板01上的正投影所呈的环形可以包括：依次连接的第一侧边C11、第二侧边C12、第三侧边C13和第四侧边C14。
其中，该第一侧边C11和第三侧边C13可以相对设置，第二侧边C12和第四侧边C14可以相对设置，第四侧边C14可以位于绑定区域A21所在侧，且该第四侧边C14可以设有开口，即参考图8，该第四侧边C14被开口分隔为两段。可选的，该第一侧边C11和第三侧边C13还可以平行设置，第二侧边C12和第四侧边C14还可以平行设置。
如图8所示，第一侧边C11与周边区域A12远离显示区域A11的一侧的间距d4，可以等于第三侧边C13与周边区域A12远离显示区域A11的一侧的间距d5。
第一侧边C11和第二侧边C12的交点P1与周边区域A12远离显示区域A11的一侧的间距d6，可以小于第一侧边C11和第四侧边C14的交点P2与周边区域A12远离显示区域A11的一侧的间距d8。第三侧边C13和第二侧边C12的交点P3与周边区域A12远离显示区域A11的一侧的间距d7，可以小于第三侧边C13和第四侧边C14的交点P4与周边区域A12远离显示区域A11的一侧的间距d9。
并且，第一侧边C11和第二侧边C12的交点P1与周边区域A12远离显示区域A11的一侧的间距d6，可以等于第三侧边C13和第二侧边C12的交点P3与周边区域A12远离显示区域A11的一侧的间距d7；第一侧边C11和第四侧边C14的交点P2与周边区域A12远离显示区域A11的一侧的间距d8，等于第三侧边C13和第四侧边C14的交点P4与周边区域A12远离显示区域A11的一侧 的间距d9。第一侧边C11与周边区域A12远离显示区域A11的一侧的间距d4，以及第三侧边C13与周边区域A12远离显示区域A11的一侧的间距d5，可以均小于第一侧边C11和第二侧边C12的交点P1与周边区域A12远离显示区域A11的一侧的间距d6，以及均小于第三侧边C13和第二侧边C12的交点P3与周边区域A12远离显示区域A11的一侧的间距d7。
也即是，该环形左右两侧与周边区域A12远离显示区域A11一侧的间距可以相等。该环形远离绑定区域A21一侧的两个角与周边区域A12远离显示区域A11一侧的间距相等。该环形靠近绑定区域A21一侧的两个角与周边区域A12远离显示区域A11一侧的间距相等。该环形远离绑定区域A21一侧的两个角与周边区域A12远离显示区域A11一侧的间距，小于该环形靠近绑定区域A21一侧的两个角与周边区域A12远离显示区域A11一侧的间距。且该环形左右两侧与周边区域A12远离显示区域A11一侧的间距，小于该环形远离绑定区域A21一侧的两个角与周边区域A12远离显示区域A11一侧的间距。
在本公开实施例中，对于环形的每个侧边，每个侧边与周边区域A12远离显示区域A11的一侧的间距均可以是指：该侧边与周边区域A12远离显示区域A11的一侧的最短距离。
可选的，该环形(即第一凹槽C1)的各处与衬底基板01的边缘的间距可以均相等。该间距可以是指第一凹槽C1的任一处与衬底基板01边缘的最短距离。
可选的，参考图8，该第四侧边C14可以包括由开口分隔的第一部分C141和第二部分C142。该环形的各个侧边中每相邻两个侧边形成的角中，至少一个角可以为圆角。其中，形成圆角的两个侧边中，每个侧边靠近另一个侧边的一段可以呈弧线形。
例如，参考图7和图8，第一侧边C11和第二侧边C12形成的角α，以及第三侧边C13和第二侧边C12形成的角α可以均为圆角。该第一侧边C11和第四侧边C14的第一部分C141形成的角α，以及第三侧边C13和第四侧边C14的第二部分C142形成的角α可以均为方角。也即是，该第一侧边C11和第四侧边C14的第一部分C141中的每个侧边，靠近另一个侧边的一段可以呈直线形。该第三侧边C13和第四侧边C14的第二部分C142中的每个侧边，靠近另一个侧边的一段可以呈直线形。
又例如，参考图9和图10，该环形可以为一边开口的矩形，且每相邻两个 侧边形成的角α可以均为圆角。
可选的，在本公开实施例中，该第一侧边C11与第一部分C141形成的角，以及第三侧边C13与第二部分C142形成的角可以均大于或等于90度
例如，参考图7，第一侧边C11与第一部分C141形成的角α，以及第三侧边C13与第二部分C142形成的角α可以均等于90度，即均为直角。又例如，参考图8至图10，第一侧边C11与第一部分C141形成的角α，以及第三侧边C13与第二部分C142形成的角α可以均大于90度，即均为钝角。
在本公开实施例中，参考图7和图8可以看出，该绑定区域A21可以包括焊接区(bonding pad)A211和走线扇出(fanout)区A212。该焊接区A211与开口K1在绑定区域A21上的正投影重叠。例如，参考图8，该第一凹槽C1的两端正好位于焊接区A211的两侧。
并且，该第一凹槽C1的两端位于衬底基板01靠近绑定区域A21的一侧的边的边缘处，即参考图7，第一凹槽C1的两端位于衬底基板01的下边缘M1。且第一凹槽C1两端中的每一端与焊接区A211之间的间距d0均为5至10微米。
可选的，在本公开实施例中，衬底基板01可以为柔性基板。也即是，衬底基板01可以由柔性材料制成。相应的，参考图9和图10，该绑定区域A21可以包括：第一子区域A3、弯折区域A4和第二子区域A5，该衬底基板01位于该弯折区域A4的部分可以呈弯折状。该第一子区域A3位于显示基板的正面，即该第一子区域A3与显示区域A11位于同一面，该第二子区域A5被弯折到显示基板背面的区域，即该第二子区域A5与显示区域A11位于不同面。该绑定区域A21中的焊接区A211可以位于第二子区域A5内，该绑定区域A21中的走线扇出区A212可以位于第一子区域A3和弯折区域A4内。
并且，参考图9和图10，该第一凹槽C1的两端在衬底基板01上的正投影不与弯折区域A4重叠，且位于第一子区域A3靠近弯折区域A4的一侧。
由于无机材料的硬度较低，且由于该弯折区域A4是在形成多个第一凹槽C1之后采用特殊工艺弯折该衬底基板实现的。因此通过设置多个第一凹槽C1在衬底基板01上的正投影，位于第一子区域A3靠近弯折区域A4的一侧，可以避免在形成弯折区域A4时，相邻两个第一凹槽C1之间构成的阻挡部发生断裂，进一步保证了显示基板的品质。
可选的，显示基板包括的多个无机膜层还可以具有第二凹槽，该第二凹槽 在衬底基板上的正投影可以覆盖弯折区域A4，且该第二凹槽可以贯穿层间介质层024、栅绝缘层023、缓冲层022以及部分阻隔层021。也即是，该第二凹槽可以穿透层间介质层024、栅绝缘层023和缓冲层022，并仅穿过部分阻隔层021。
例如，可以对多个无机膜层中的层间介质层024、栅绝缘层023、缓冲层022以及部分阻隔层021位于弯折区域A4内的部分进行刻蚀，得到第二凹槽。由于对衬底基板01进行弯折处理是在形成多个无机膜层后执行的，因此通过先在该弯折区域A4内形成第二凹槽，即先刻蚀该弯折区域A4内的无机膜层使得该弯折区域A4部分的衬底基板01上的膜层厚度较薄，可以便于进行弯折处理。
可选的，该第二子区域A5内的无机膜层可以包括层间介质层024和栅绝缘层023，即对于位于该第二子区域A5内的无机膜层可以不进行刻蚀处理，且对于位于该第一子区域A3内的无机膜层也可以不进行刻蚀处理。并且，该焊接区A211处的管脚(即pin脚)处还可以包括位于多个无机膜层02远离衬底基板01一侧的源极金属层和漏极金属层，且该源极金属层可以和显示区域A11内的源极金属层，以及该漏极金属层可以和显示区域A11内的漏极金属层均可以通过一次构图工艺形成。
需要说明的是，参考图7至图10，衬底基板01的边缘区域A2还可以设置有围绕该第一凹槽C1的切割线(cutting line)L1。在衬底基板01的一侧形成具有多个第一凹槽C1的无机膜层后，可以沿该切割线L1进行切割，得到显示基板。相应的，该环形与切割线L1的形状相匹配，也即是，呈环形的第一凹槽C1可以是沿着该切割线L1的形状进行设计的。
由于在进行切割操作时，显示基板的边缘易出现裂缝，因此通过沿着切割线L1的形状设计第一凹槽C1，可以对切割操作产生的裂缝进行有效阻挡，即可以有效避免切割操作时出现的裂缝的延伸。
可选的，在本公开实施例中，如图3至图7所示，显示基板包括的多个第一凹槽C1可以等间距设置，即每两个相邻的第一凹槽C1之间的间距可以为固定值。通过间隔设置多个第一凹槽C1，可以进一步有效避免裂缝的延伸，保证显示基板的品质。
例如，参考图3至图6，其示出了包括5个呈具有开口的环形的第一凹槽C1。又例如，参考图7，其示出了包括2个呈具有开口的环形的第一凹槽C1。
可选的，在本公开实施例中，该环形可以由条形和弧形中的至少一种形状 围成。例如，参考图7至图10，环形即为由若干条形结构和若干弧形结构围成。
图11是本公开实施例提供的一种呈具有开口的环形的第一凹槽C1的俯视图。如图11所示，该环形可以由多个弧形结构围成。例如，该环形的每条边在衬底基板01上的正投影可以呈波浪形。
参考图11，假设外力作用在呈环形的第一凹槽C1时，对该第一凹槽C1上某点P处产生的第一方向的冲击力为F。该冲击力F可以被弧形的第一凹槽C1分解为第二方向的冲击力，该第二方向的冲击力F1满足：F1＝F×sin(β)，第二方向垂直于P点的切线方向，β为该切线方向与第一方向的夹角。
根据上述分析可知，由于sin(β)小于或者等于1，因此对于弧形围成的环形，第二方向的冲击力F1即可以小于或者等于F。相对于条形，由弧形围成的环形所受到的冲击力更低，相应的，可以进一步提高第一凹槽C1阻挡裂缝延伸的能力，有效降低裂缝延伸的风险。
可选的，参考图7至图10，封装区域A1包括显示区域A11和包围该显示区域A11的周边区域A12，该显示基板还可以包括：位于周边区域A12内的阻挡坝04。该阻挡坝04也可以由有机材料制成。有机层03在衬底基板01上的正投影，与阻挡坝04在衬底基板01上的正投影可以不重叠。
由于阻挡坝04位于周边区域A12内，阻挡坝04会与显示区域A11存在间隙，因此可以有效避免在采用有机材料形成封装薄膜中的有机封装膜层时，有机材料流出封装区域A1，进而有效避免因有机材料的亲水特性而使空气中的水汽进入显示区域，影响显示区域品质的问题，即进一步保证了显示基板的品质。
可选的，参考图7至图10，该阻挡坝04可以包括至少一个封闭的环状结构041，每个环状结构041均可以围绕衬底基板01的显示区域A11。通过环状结构041围绕显示区域A11，可以实现对显示区域A11四周的有效保护。
可选的，该阻挡坝04可以包括多个间隔设置的环状结构041。例如，图7至图10均示出了包括两个环状结构041的阻挡坝04。并且，该多个环状结构041可以等间距设置，即每两个相邻的环状结构041之间的间距可以为固定值。通过间隔设置多个环状结构041，可以进一步提高对显示区域A11的有效保护。示例的，可以采用沉积的方式形成阻挡坝04。
需要说明的是，在本公开实施例中，该衬底基板01可以由柔性材料制成。该柔性材料可以为聚酰亚胺(polyimide，PI)材料，该材料具有耐高温、耐低 温以及抗氧化等较好的性能。
综上所述，本公开实施例提供了一种显示基板。由于衬底基板的边缘区域内不仅包括贯穿至少一个无机膜层的多个第一凹槽，而且还包括覆盖于多个第一凹槽上的有机层，其中，形成有机层的有机材料的硬度相对于形成无机膜层的无机材料的硬度较大。因此通过软硬搭配方式有效提高了显示基板的抗冲击能力，对显示基板所受外力起到缓冲作用，有效避免了裂缝延伸至封装区域造成封装失效的问题，保证了显示基板的品质。并且，通过使多个第一凹槽在衬底基板上的正投影与绑定区域不重叠，可以避免通过刻蚀工艺形成第一凹槽时，位于绑定区域的金属走线裸露出来而被腐蚀，确保了显示基板的良率。
图12是本公开实施例提供的一种显示基板的制造方法流程图。该方法可以用于制造上述图1至图10任一所示的显示基板。如图12所示，该方法可以包括：
步骤101、提供衬底基板。
该衬底基板可以为玻璃基板。参考图1，该衬底基板01可以具有封装区域A1，以及位于封装区域A1周围的边缘区域A2，该边缘区域A2可以包括在衬底基板01至少一个边所在侧的绑定区域A21。
可选的，该衬底基板01可以包括两层柔性材料层以及位于该两层柔性材料层之间的一层阻隔层，形成该柔性材料层的柔性材料可以为PI材料。
步骤102、采用无机材料在衬底基板的一侧形成多个层叠的无机膜层。
在本公开实施例中，可以采用无机材料，通过构图工艺在衬底基板的一侧形成多个无机膜层。其中，该构图工艺可以包括：涂胶、曝光、显影和刻蚀，该无机材料可以包括氧化硅、氮化硅和氮氧化硅中的至少一种。
可选的，该多个无机膜层可以包括：沿远离衬底基板方向依次层叠的阻隔层、缓冲层、栅绝缘层和层间介质层。其中，阻隔层可以有效阻隔水汽或氧气进入衬底基板内，提高了衬底基板的阻水、阻氧以及抗刮刻等性能。该无机材料可以包括氧化硅、氮化硅和氮氧化硅中的至少一种。并且，形成不同无机膜层所采用的无机材料可以相同，也可以不同。
步骤103、在边缘区域且在远离封装区域的方向上形成依次间隔，且沿着衬底基板的周边延伸的多个第一凹槽。
在本公开实施例中，可以对该多个无机膜层中的至少一个无机膜层位于边缘区域A2的部分进行刻蚀，得到该多个第一凹槽。
其中，每个第一凹槽可以贯穿多个无机膜层中的至少一个无机膜层，且该多个第一凹槽在衬底基板上的正投影可以与绑定区域不重叠。通过形成位于边缘区域内的第一凹槽，可以对边缘区域出现的裂缝起到阻挡作用。
步骤104、采用有机材料形成覆盖于多个第一凹槽上的有机层。
在本公开实施例中，可以采用有机材料，在多个第一凹槽远离衬底基板的一侧形成覆盖第一凹槽的有机层。通过形成覆盖第一凹槽的有机层，可以在垂直于衬底基板的方向上发生碰撞时起到缓冲作用。且由于有机材料的硬度相对于无机材料的硬度较大，因此可以通过软硬搭配的方式进一步提升显示基板的抗冲击能力，进一步有效避免裂缝的延伸。
综上所述，本公开实施例提供了一种显示基板的制造方法。通过采用无机材料在边缘区域内形成贯穿至少一个无机膜层的多个第一凹槽，以及采用硬度相对于无机材料的硬度更大的有机材料形成覆盖多个第一凹槽的有机层，可以通过软硬搭配的方式有效提升显示基板的抗冲击能力，对显示基板所受外力起到缓冲作用，有效避免了裂缝延伸至封装区域造成封装失效的问题。进而有效避免了裂缝延伸至显示区域，造成水汽或氧气通过裂缝侵入显示区域，使得显示基板产生黑斑的问题，保证了显示基板的品质。并且，通过使多个第一凹槽在衬底基板上的正投影与绑定区域不重叠，可以避免通过刻蚀工艺形成第一凹槽时，位于绑定区域的金属走线裸露出来而被腐蚀，确保了显示基板的良率。
可选的，形成多个第一凹槽(即上述步骤103)可以包括：对多个无机膜层中的至少一个无机膜层位于边缘区域的部分进行刻蚀，得到多个第一凹槽。
其中，在对至少一个无机膜层进行刻蚀处理之前，可以采用涂胶、曝光和显影等工艺对待刻蚀的至少一个无机膜层进行处理。
作为一种可选的实现方式，如图3和图4所示，该多个无机膜层中，每个第一凹槽C1贯穿的至少一个无机膜层可以包括：沿远离衬底基板的方向依次层叠的栅绝缘层023和层间介质层024。相应的，上述步骤103即可以为：对多个无机膜层中的栅绝缘层和层间介质层位于边缘区域的部分进行刻蚀。
可选的，在上述步骤103之前，该显示基板的制造方法还可以包括：在衬底基板的一侧形成缓冲层。
在本公开实施例中，可以采用无机材料形成缓冲层。参考图4，该缓冲层022可以包括一体形成的第一缓冲图案0221和第二缓冲图案0222。该第一缓冲图案0221在衬底基板01上的正投影覆盖封装区域A1和部分边缘区域A2，该第二缓冲图案0222位于边缘区域A2内。该第一缓冲图案0221的厚度大于第二缓冲图案该第二缓冲图案0222的厚度。并且，有机层02在缓冲层022上的正投影，与第二缓冲图案0222部分重叠，多个第一凹槽C1最远离封装区域A1的第一凹槽C1(即最外侧的第一凹槽C1)靠近封装区域A1的一侧，在缓冲层022上的正投影，与第一缓冲图案0221和第二缓冲图案0222的交界线重叠。
由于在衬底基板01上形成多个功能膜层后，还需要在衬底基板01的边缘区域A2对衬底基板01进行切割，从而得到显示基板，因此通过在边缘区域A2远离封装区域A1的一侧形成厚度较小的第二缓冲图案0222，可以有效降低切割力度较大造成显示基板边缘断裂的概率，提高了显示基板的良率。
并且，由于多个第一凹槽C1最远离封装区域A1的第一凹槽C1靠近封装区域A1的一侧，在缓冲层022上的正投影与第一缓冲图案0221和第二缓冲图案0222的交界线重叠，也即是，多个第一凹槽C1在缓冲层022上的正投影仅与第一缓冲图案0221重叠，因此通过使有机层03在缓冲层022上的正投影与第二缓冲图案0222部分重叠，可以确保有机层03完全包覆多个第一凹槽C1之间构成的阻挡部，进一步保证了显示基板的抗冲击能力。
作为另一种可选的实现方式，如图5所示，该多个无机膜层中，每个第一凹槽C1贯穿的至少一个无机膜层可以包括：层间介质层024、栅绝缘层023以及部分缓冲层022。相应的，上述步骤103即可以为：对多个无机膜层中的层间介质层、栅绝缘层和部分缓冲层位于边缘区域的部分进行刻蚀。
作为又一种可选的实现方式，如图6所示，该多个无机膜层中，每个第一凹槽C1贯穿的至少一个无机膜层可以包括：层间介质层024、栅绝缘层023、缓冲层022和部分阻隔层021。相应的，上述步骤103即可以为：对多个无机膜层中的层间介质层、栅绝缘层、缓冲层和部分阻隔层位于边缘区域的部分进行刻蚀。
作为再一种可选的实现方式，该多个无机膜层中，每个第一凹槽C1贯穿的至少一个无机膜层可以仅包括：沿远离衬底基板的方向设置的层间介质层。相应的，上述步骤103即可以为：仅对多个无机膜层中的层间介质层位于边缘 区域的部分进行刻蚀。
在上述步骤102至104之前，或在上述步骤102至104之后，该方法还可以包括：采用有机材料在封装区域包括的周边区域内形成阻挡坝。
可选的，可以采用有机材料，通过沉积的方式在多个无机膜层远离衬底基板的一侧形成与显示区域存在间隙的阻挡坝。并且，有机层在衬底基板上的正投影与阻挡坝在衬底基板上的正投影不重叠。由于该阻挡坝位于封装区域包括的周边区域内，与封装区域包括的显示区域之间存在间隙，因此该阻挡坝可以有效避免在采用有机材料形成封装薄膜中的有机封装膜层时，有机材料流出封装区域A1，进而可以有效避免因有机材料的亲水特性而使空气中的水汽进入显示区域，影响显示区域品质的问题，即进一步保证了显示基板的品质。
综上所述，本公开实施例提供了一种显示基板的制造方法。通过采用无机材料在边缘区域内形成贯穿至少一个无机膜层的多个第一凹槽，以及采用硬度相对于无机材料的硬度更大的有机材料形成覆盖多个第一凹槽的有机层，可以通过软硬搭配的方式有效提升显示基板的抗冲击能力，对显示基板所受外力起到缓冲作用，有效避免了裂缝延伸至封装区域造成封装失效的问题。进而有效避免了裂缝延伸至显示区域，造成水汽或氧气通过裂缝侵入显示区域，使得显示基板产生黑斑的问题，保证了显示基板的品质。并且，通过使多个第一凹槽在衬底基板上的正投影与绑定区域不重叠，可以避免通过刻蚀工艺形成第一凹槽时，位于绑定区域的金属走线裸露出来而被腐蚀，确保了显示基板的良率。
本公开实施例提供了一种显示装置，该显示装置可以包括如图1至图10任一所示的显示基板。该显示装置可以为：液晶面板、电子纸、OLED面板、AMOLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。其中，该AMOLED面板可以为柔性显示面板。
以上所述仅为本公开的可选实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (22)

  1. 一种显示基板，所述显示基板包括：
    衬底基板，所述衬底基板具有封装区域，以及位于所述封装区域周围的边缘区域，所述边缘区域包括在所述衬底基板至少一个边所在侧的绑定区域；
    多个无机膜层，位于所述衬底基板的一侧且层叠设置；
    多个第一凹槽，位于所述边缘区域且在远离所述封装区域的方向上依次间隔设置，并沿着所述衬底基板的周边延伸，其中，每个所述第一凹槽贯穿所述多个无机膜层中的至少一个无机膜层，所述多个第一凹槽在所述衬底基板上的正投影与所述绑定区域不重叠；
    有机层，覆盖于所述多个第一凹槽上。
  2. 根据权利要求1所述的显示基板，所述至少一个无机膜层包括：沿远离所述衬底基板的方向依次层叠的栅绝缘层和层间介质层。
  3. 根据权利要求2所述的显示基板，所述多个无机膜层还包括：位于所述衬底基板和所述至少一个无机膜层之间的缓冲层，所述缓冲层包括一体形成的第一缓冲图案和第二缓冲图案；
    所述第一缓冲图案在所述衬底基板上的正投影覆盖所述封装区域和部分所述边缘区域，所述第二缓冲图案位于所述边缘区域内，且所述第一缓冲图案的厚度大于所述第二缓冲图案的厚度；
    其中，所述有机层在所述缓冲层上的正投影，与所述第二缓冲图案部分重叠，所述多个第一凹槽中最远离所述封装区域的第一凹槽靠近所述封装区域的一侧在所述缓冲层上的正投影，与所述第一缓冲图案和所述第二缓冲图案的交界线重叠。
  4. 根据权利要求2所述的显示基板，每相邻两个所述第一凹槽之间的无机膜层构成阻挡部；所多个述无机膜层还包括：位于所述衬底基板和所述至少一个无机膜层之间的缓冲层，所述缓冲层包括一体形成的第一缓冲图案和第二缓冲图案；
    所述第一缓冲图案在所述衬底基板上的正投影覆盖所述封装区域和 部分所述边缘区域，所述第二缓冲图案位于所述边缘区域内，且所述第一缓冲图案的厚度大于所述第二缓冲图案的厚度；
    其中，所述有机层在所述缓冲层上的正投影，与所述第二缓冲图案部分重叠，最远离所述封装区域的阻挡部远离所述封装区域的一侧在所述缓冲层上的正投影，与所述第一缓冲图案和所述第二缓冲图案的交界线重叠。
  5. 根据权利要求3或4所述的显示基板，所述第二缓冲图案的厚度为所述第一缓冲图案厚度的20％。
  6. 根据权利要求1所述的显示基板，所述多个无机膜层包括：沿远离所述衬底基板的方向依次层叠设置的阻隔层、缓冲层、栅绝缘层和层间介质层；
    所述至少一个无机膜层包括：所述层间介质层、所述栅绝缘层以及部分所述缓冲层。
  7. 根据权利要求1所述的显示基板，所述多个无机膜层包括：沿远离所述衬底基板的方向依次层叠设置的阻隔层、缓冲层、栅绝缘层和层间介质层；
    所述至少一个无机膜层包括：所述层间介质层、所述栅绝缘层、所述缓冲层以及部分所述阻隔层。
  8. 根据权利要求1至7任一所述的显示基板，每个所述第一凹槽在所述衬底基板上的正投影呈具有开口的环形；
    所述环形环绕所述封装区域，且所述开口在所述衬底基板上的正投影与所述绑定区域重叠。
  9. 根据权利要求8所述的显示基板，所述衬底基板还具有显示区域；
    所述环形远离所述绑定区域的一边的形状，与所述显示区域远离所述绑定区域一边的形状相匹配。
  10. 根据权利要求8所述的显示基板，所述封装区域包括显示区域 和包围所述显示区域的周边区域，所述环形包括：依次连接的第一侧边、第二侧边、第三侧边和第四侧边；
    所述第一侧边与所述周边区域远离所述显示区域的一侧的间距，等于所述第三侧边与所述周边区域远离所述显示区域的一侧的间距；
    所述第一侧边和所述第二侧边的交点与所述周边区域远离所述显示区域的一侧的间距，小于所述第一侧边和所述第四侧边的交点与所述周边区域远离所述显示区域的一侧的间距；
    所述第三侧边和所述第二侧边的交点与所述周边区域远离所述显示区域的一侧的间距，小于所述第三侧边和所述第四侧边的交点与所述周边区域远离所述显示区域的一侧的间距；
    其中，所述第一侧边和所述第三侧边相对设置，所述第二侧边和所述第四侧边相对设置，所述第四侧边位于所述绑定区域所在侧，且所述第四侧边设有所述开口。
  11. 根据权利要求10所述的显示基板，所述环形的各个侧边中每相邻两个侧边形成的角中，至少一个角为圆角。
  12. 根据权利要求11所述的显示基板，所述第四侧边包括由所述开口分隔的第一部分和第二部分；
    所述第一侧边与所述第一部分形成的角，以及所述第三侧边与所述第二部分形成的角均大于或等于90度。
  13. 根据权利要求8至12任一所述的显示基板，所述环形的各处与所述衬底基板的边缘的间距均相等。
  14. 根据权利要求8至13任一所述的显示基板，所述绑定区域包括走线扇出区和焊接区，所述焊接区与所述开口重叠；
    所述第一凹槽的两端均位于所述衬底基板靠近所述绑定区域的一侧的边的边缘处，且所述第一凹槽的两端中的每一端与所述焊接区之间的间距均为5至10微米。
  15. 根据权利要求8至14任一所述的显示基板，所述环形由条形和 弧形中的至少一种形状围成。
  16. 根据权利要求1至15任一所述的显示基板，所述多个第一凹槽等间距设置。
  17. 根据权利要求1至16任一所述的显示基板，所述衬底基板为柔性基板，所述绑定区域包括：依次远离所述封装区域的第一子区域、弯折区域和第二子区域，所述绑定区域中的焊接区位于所述第二子区域内；
    所述第一凹槽的两端在所述衬底基板上的正投影不与所述弯折区域重叠，且位于所述第一子区域靠近所述弯折区域的一侧。
  18. 根据权利要求17所述的显示基板，所述多个无机膜层还具有第二凹槽，所述第二凹槽在所述衬底基板上的正投影覆盖所述弯折区域；
    所述多个无机膜层包括：沿远离所述衬底基板的方向依次层叠设置的阻隔层、缓冲层、栅绝缘层和层间介质层，所述第二凹槽贯穿所述层间介质层、所述栅绝缘层、所述缓冲层以及部分所述阻隔层。
  19. 根据权利要求1至18任一所述的显示基板，
    所述多个第一凹槽中靠近所述封装区域的第一凹槽靠近所述封装区域的一侧，与所述多个第一凹槽中远离所述封装区域的第一凹槽靠近所述封装区域一侧的间距为60微米。
  20. 根据权利要求1至19任一所述的显示基板，所述封装区域包括显示区域和包围所述显示区域的周边区域，所述显示基板还包括：位于所述周边区域内的阻挡坝；
    所述有机层在所述衬底基板上的正投影，与所述阻挡坝在所述衬底基板上的正投影不重叠。
  21. 一种显示基板的制造方法，所述方法包括：
    提供衬底基板，所述衬底基板具有封装区域，以及位于所述封装区域周围的边缘区域，所述边缘区域包括在所述衬底基板至少一个边所在侧的绑定区域；
    采用无机材料在所述衬底基板的一侧形成多个层叠的无机膜层；
    在所述边缘区域且在远离所述封装区域的方向上形成依次间隔，且沿着所述衬底基板的周边延伸的多个第一凹槽，每个所述第一凹槽贯穿多个所述无机膜层中的至少一个无机膜层，所述多个第一凹槽在所述衬底基板上的正投影与所述绑定区域不重叠；
    采用有机材料形成覆盖于所述多个第一凹槽上的有机层。
  22. 一种显示装置，所述显示装置包括：如权利要求1至20任一所述的显示基板。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023065288A1 (zh) * 2021-10-22 2023-04-27 京东方科技集团股份有限公司 一种显示面板及其制备方法、显示装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3985725A4 (en) * 2019-06-14 2022-12-28 BOE Technology Group Co., Ltd. DISPLAY SUBSTRATE AND METHOD FOR MAKING IT AND DISPLAY APPARATUS
CN114822266B (zh) * 2022-05-17 2024-01-12 昆山国显光电有限公司 一种显示模组以及显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102255056A (zh) * 2011-07-12 2011-11-23 上海大学 一种增强玻璃料密封oled器件密封性能的方法
US20160260928A1 (en) * 2015-03-06 2016-09-08 Samsung Display Co., Ltd. Organic light-emitting display apparatus and method of manufacturing the same
CN107068715A (zh) * 2017-03-28 2017-08-18 上海天马微电子有限公司 一种有机发光显示面板、有机发光显示装置以及有机发光显示面板的制备方法
KR20170128683A (ko) * 2016-05-12 2017-11-23 엘지디스플레이 주식회사 플렉서블 디스플레이 패널, 이의 제조방법 및 이를 포함하는 플렉서블 디스플레이 장치
CN108010921A (zh) * 2017-11-30 2018-05-08 上海天马微电子有限公司 一种柔性显示面板及显示装置
CN109103234A (zh) * 2018-08-31 2018-12-28 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG142140A1 (en) * 2003-06-27 2008-05-28 Semiconductor Energy Lab Display device and method of manufacturing thereof
EP1798786B1 (en) * 2004-10-21 2012-01-11 LG Display Co., Ltd. Organic electroluminescent device and method of manufacturing the same
KR102153394B1 (ko) * 2013-07-29 2020-09-08 엘지디스플레이 주식회사 유기발광 표시장치
KR102118676B1 (ko) * 2014-02-05 2020-06-04 삼성디스플레이 주식회사 유기발광 디스플레이 장치
KR20160017273A (ko) * 2014-08-01 2016-02-16 삼성디스플레이 주식회사 디스플레이 장치와, 이의 제조 방법
JP6608201B2 (ja) * 2015-07-10 2019-11-20 株式会社ジャパンディスプレイ 自発光表示装置
JP6606432B2 (ja) * 2016-01-06 2019-11-13 株式会社ジャパンディスプレイ 表示装置及びその製造方法
KR101974086B1 (ko) * 2016-09-30 2019-05-02 삼성디스플레이 주식회사 표시모듈
CN106876328B (zh) * 2017-02-20 2020-07-03 京东方科技集团股份有限公司 Oled显示面板及其制备方法、显示装置
WO2018179168A1 (ja) * 2017-03-29 2018-10-04 シャープ株式会社 表示デバイス、表示デバイスの製造方法、表示デバイスの製造装置、成膜装置
WO2018179308A1 (ja) * 2017-03-31 2018-10-04 シャープ株式会社 表示装置およびその製造方法
KR102333671B1 (ko) * 2017-05-29 2021-12-01 삼성디스플레이 주식회사 유기 발광 표시 장치 및 유기 발광 표시 장치의 제조 방법
CN107195794B (zh) 2017-06-06 2019-07-30 京东方科技集团股份有限公司 一种柔性显示基板及其制作方法、显示面板、显示装置
WO2019030887A1 (ja) * 2017-08-10 2019-02-14 シャープ株式会社 電気光学装置およびその製造方法
KR102392707B1 (ko) * 2017-08-18 2022-04-29 엘지디스플레이 주식회사 유기 발광 표시 장치
JP6868904B2 (ja) * 2018-01-11 2021-05-12 株式会社Ｊｏｌｅｄ 有機ｅｌ表示パネルの製造方法
TWI673556B (zh) * 2018-03-08 2019-10-01 友達光電股份有限公司 顯示面板
CN108428804A (zh) * 2018-04-19 2018-08-21 武汉华星光电技术有限公司 Oled显示面板及其封装方法
CN108598287B (zh) * 2018-06-29 2020-08-11 上海天马微电子有限公司 柔性触控显示面板及其制作方法、柔性触控显示装置
US20210288286A1 (en) * 2018-08-02 2021-09-16 Sharp Kabushiki Kaisha Display device and method of manufacturing same
KR102684270B1 (ko) * 2018-10-05 2024-07-12 삼성디스플레이 주식회사 디스플레이 장치
KR20200046221A (ko) * 2018-10-23 2020-05-07 삼성디스플레이 주식회사 디스플레이 장치 및 디스플레이 장치를 제조하기 위한 마스크
CN111128010B (zh) * 2018-11-01 2021-10-29 京东方科技集团股份有限公司 显示面板及其制造方法及显示装置
CN109564986B (zh) * 2018-11-02 2021-08-27 京东方科技集团股份有限公司 显示基板、显示设备和制造显示基板的方法
CN109801953B (zh) * 2019-02-15 2021-02-26 京东方科技集团股份有限公司 有机发光二极管显示基板、其制备方法及装置
KR20200120804A (ko) * 2019-04-11 2020-10-22 삼성디스플레이 주식회사 디스플레이 장치
US11394009B2 (en) * 2019-06-14 2022-07-19 Chengdu Boe Optoelectronics Technology Co., Ltd. Display substrate and display device
EP3985725A4 (en) * 2019-06-14 2022-12-28 BOE Technology Group Co., Ltd. DISPLAY SUBSTRATE AND METHOD FOR MAKING IT AND DISPLAY APPARATUS
CN111261643B (zh) * 2020-02-10 2022-12-06 武汉华星光电半导体显示技术有限公司 柔性显示面板及制备方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102255056A (zh) * 2011-07-12 2011-11-23 上海大学 一种增强玻璃料密封oled器件密封性能的方法
US20160260928A1 (en) * 2015-03-06 2016-09-08 Samsung Display Co., Ltd. Organic light-emitting display apparatus and method of manufacturing the same
KR20170128683A (ko) * 2016-05-12 2017-11-23 엘지디스플레이 주식회사 플렉서블 디스플레이 패널, 이의 제조방법 및 이를 포함하는 플렉서블 디스플레이 장치
CN107068715A (zh) * 2017-03-28 2017-08-18 上海天马微电子有限公司 一种有机发光显示面板、有机发光显示装置以及有机发光显示面板的制备方法
CN108010921A (zh) * 2017-11-30 2018-05-08 上海天马微电子有限公司 一种柔性显示面板及显示装置
CN109103234A (zh) * 2018-08-31 2018-12-28 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3985725A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023065288A1 (zh) * 2021-10-22 2023-04-27 京东方科技集团股份有限公司 一种显示面板及其制备方法、显示装置
GB2621091A (en) * 2021-10-22 2024-01-31 Boe Technology Group Co Ltd Display panel and preparation method therefor, and display device

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