WO2020228318A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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Publication number
WO2020228318A1
WO2020228318A1 PCT/CN2019/125290 CN2019125290W WO2020228318A1 WO 2020228318 A1 WO2020228318 A1 WO 2020228318A1 CN 2019125290 W CN2019125290 W CN 2019125290W WO 2020228318 A1 WO2020228318 A1 WO 2020228318A1
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WIPO (PCT)
Prior art keywords
electrically connected
transistor
terminal
input terminal
output terminal
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Application number
PCT/CN2019/125290
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English (en)
French (fr)
Inventor
黄振
杨大可
任东
刘刚
赵祥
朱晖
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云谷（固安）科技有限公司
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Application filed by 云谷（固安）科技有限公司 filed Critical 云谷（固安）科技有限公司
Publication of WO2020228318A1 publication Critical patent/WO2020228318A1/zh
Priority to US17/338,930 priority Critical patent/US11423849B2/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0294—Details of sampling or holding circuits arranged for use in a driver for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects

Definitions

  • This application relates to display technology, for example, to a display panel and a display device.
  • OLED Organic Light-Emitting Diode
  • the present application provides a display panel and a display device to compensate for the afterimage phenomenon of the display panel and improve the display effect.
  • the embodiment of the present application provides a display panel, which includes a data line, a pixel driving circuit, a light emitting device, and a voltage compensation circuit;
  • the pixel driving circuit includes a data signal input terminal and an output terminal, the data signal input terminal of the pixel driving circuit is electrically connected to the data line, and the output terminal of the pixel driving circuit is electrically connected to the light emitting device;
  • the voltage compensation circuit includes:
  • a sampling and conditioning unit configured to obtain the driving current output by the pixel driving circuit, and output a control signal from the output terminal of the sampling and conditioning unit according to the driving current;
  • the first switch unit, the first switch unit includes a control terminal, an input terminal, and an output terminal.
  • the control terminal of the first switch unit is electrically connected to the output terminal of the sampling and conditioning unit.
  • the input terminal is electrically connected to the output terminal of the pixel driving circuit;
  • the first switch unit is configured to control the input terminal of the first switch unit and the first switch unit according to a signal from the control terminal of the first switch unit Turn on or off between the output terminals;
  • the compensation unit includes an input terminal and an output terminal, the input terminal of the compensation unit is electrically connected with the output terminal of the first switch unit, and the output terminal of the compensation unit is electrically connected with the data line.
  • the compensation unit is configured to output a compensation voltage to the data line under the action of a signal at the input terminal of the compensation unit.
  • the embodiment of the present application also provides a display device, including the display panel provided by any embodiment of the present application.
  • FIG. 1 is a schematic diagram of a circuit structure of a display panel provided by an embodiment of the application
  • FIG. 2 is a schematic diagram of a circuit structure of a display panel including a second switch unit based on the embodiment shown in FIG. 1;
  • FIG. 3 is a schematic diagram of a circuit structure of a display panel including a first transistor and a second transistor based on the embodiment shown in FIG. 2;
  • FIG. 4 is a schematic diagram of a circuit structure of a display panel including a comparison module based on the embodiment shown in FIG. 3;
  • FIG. 5 is a schematic diagram of a circuit structure of a display panel including a first analog switch based on the embodiment shown in FIG. 4;
  • FIG. 6 is a schematic diagram of a circuit structure of a display panel including a third transistor based on the embodiment shown in FIG. 5;
  • FIG. 7 is a schematic diagram of a circuit structure of a display panel including a comparator based on the embodiment shown in FIG. 6;
  • FIG. 8 is a schematic diagram of a circuit structure of a display panel including a current mirror module based on the embodiment shown in FIG. 7;
  • FIG. 9 is a schematic diagram of a circuit structure of a display panel including a fourth transistor based on the embodiment shown in FIG. 8;
  • FIG. 10 is a schematic diagram of a circuit structure of a display panel including a second analog switch based on the embodiment shown in FIG. 9;
  • FIG. 11 is a schematic diagram of a circuit structure of a display panel including a plurality of pixel driving circuits in the embodiment shown in FIG. 10;
  • FIG. 12 is a schematic structural diagram of a display device provided by an embodiment of the application.
  • the display panel includes a data line 15, a pixel driving circuit 11, a light emitting device 12 and a voltage compensation circuit 13.
  • the pixel driving circuit 11 includes a data signal input terminal A1 and an output terminal A2.
  • the data signal input terminal A1 of the pixel driving circuit 11 is electrically connected to the data line 15 and the output terminal A2 of the pixel driving circuit 11 is electrically connected to the light emitting device 12.
  • the voltage compensation circuit 13 includes: a sampling and conditioning unit 131, which can also be called a sampling and conditioning circuit 131, configured to obtain the driving current output by the pixel driving circuit 11, and output control from the output terminal C2 of the sampling and conditioning unit 131 according to the driving current Signal; the first switch unit 132, also referred to as the first switch circuit 132, the first switch unit 132 includes a control terminal B1, an input terminal B2 and an output terminal B3; the control terminal B1 of the first switch unit 132 and sampling and conditioning unit
  • the output terminal C2 of the 131 is electrically connected, the input terminal B2 of the first switch unit 132 is electrically connected to the output terminal A2 of the pixel drive circuit 11, and the first switch unit 132 is configured to control the input terminal B2 and the output terminal according to the control signal of the control terminal B1 B3 is turned on or off;
  • the compensation unit 133 can also be called a compensation circuit 133.
  • the compensation unit 133 includes an input terminal D1 and an output terminal D2.
  • the input terminal D1 of the compensation unit 133 and the output terminal B3 of the first switch unit 132 are electrically connected.
  • the output terminal D2 of the compensation unit 133 is electrically connected to the data line 15.
  • the compensation unit 133 is configured to output a compensation voltage to the data line 15 under the action of a signal at the input terminal D1.
  • the OLED In the display process of the display panel, whether it is Low Temperature Poly-silicon (LTPS) or Oxide Semiconductor (Oxide Semiconductor), there are problems of uniformity or stability in the manufacturing process, and the OLED itself will also vary with the lighting time.
  • the increase in brightness is gradually decreasing.
  • the light-emitting brightness of OLED is proportional to the driving current, and the driving current is provided by the driving transistor in the pixel driving circuit, which is related to the characteristic parameters of the driving transistor.
  • the parameters that affect the current are the mobility of the driving transistor. , Threshold voltage, OLED drive voltage and power supply voltage, etc., the parameters that affect the current size will cause the display brightness difference.
  • this difference is related to the image displayed before, it often appears as an afterimage phenomenon, which is usually Said afterimage.
  • the voltage compensation circuit 13 By setting the voltage compensation circuit 13 to detect the driving current of the output terminal A2 of the pixel driving circuit 11, when the brightness of the next frame display needs to be compensated, the voltage compensation circuit 13 performs the display process of the next frame of the pixel driving circuit 11 The compensation voltage is compensated to the data line 15 of the pixel driving circuit 11 to eliminate the influence of the mobility of the driving transistor, the threshold voltage, the driving voltage of the OLED, and the power supply voltage on the driving current of the pixel driving circuit 11, thereby eliminating the afterimage phenomenon .
  • the pixel driving circuit 11 can output a driving current corresponding to the data voltage according to the data voltage on the data line 15, and the output driving current drives the light emitting device 12 to emit light.
  • the input terminal C1 of the sampling and conditioning unit 131 is electrically connected to the output terminal A2 of the pixel driving circuit 11, thereby obtaining the driving current output by the pixel driving circuit 11, and generating a control signal according to the driving current, such as conditioning the driving current to a control voltage, when When the control voltage satisfies the condition for compensation, such as exceeding the set threshold, the first switch unit 132 is controlled to conduct conduction between the input terminal B2 and the output terminal B3, so that the driving current of the output terminal A2 of the pixel driving circuit 11 is output to the compensation unit 133.
  • the compensation unit 133 outputs a compensation voltage to the data line of the pixel drive circuit 11 according to the drive current of the output terminal A2 of the pixel drive circuit 11, and compensates the voltage on the data line to eliminate the afterimage phenomenon.
  • the technical solution of this embodiment uses a display panel including a pixel drive circuit, a light emitting device, a sampling and conditioning unit, a first switch unit, and a compensation unit to sample the drive current of the pixel drive circuit of the current frame, and the sampling and conditioning unit
  • the sampled drive current is adjusted to generate a control signal.
  • the first switch unit conducts the input end of the compensation unit with the output end of the pixel drive circuit according to the control signal.
  • the compensation unit generates a compensation voltage to the data line according to the drive current of the pixel drive circuit, thereby The afterimage phenomenon of the display screen is eliminated, and a better display effect is achieved; at the same time, the voltage compensation circuit of this embodiment can be used as external compensation.
  • external compensation refers to a method of sensing the electrical or optical characteristics of the pixel through an external driving circuit or device and then performing compensation.
  • the pixel structure and driving method of the internal compensation method are more complicated, and the compensation effect is limited to the threshold voltage compensation and the voltage drop compensation (IR Drop) of the driving transistor, and the compensation range is too small, which makes it difficult to solve the afterimage problem.
  • the embodiment of the present application provides a compensation method for a display panel without modifying the pixel circuit, and has the advantages of simple pixel structure, fast driving speed and large compensation range.
  • FIG. 2 is a schematic diagram of a circuit structure of a display panel including a second switch unit based on the embodiment shown in FIG. 1.
  • the display panel further includes a second switch unit 14, which may also be called a second switch Circuit 14, the first terminal E1 of the second switch unit 14 is electrically connected to the input terminal C1 of the sampling and conditioning unit 131, the second terminal E2 of the second switch unit 14 is electrically connected to the output terminal A2 of the pixel drive circuit 11, and the second The switch unit 14 is configured to turn on or off the input terminal C1 of the sampling and conditioning unit 131 and the output terminal A2 of the pixel driving circuit 11 according to the control signal of the control terminal E3.
  • the control terminal E3 of the second switch unit 14 can be controlled to turn off the second switch unit 14 and the compensation unit 13 no longer collects current from the output terminal A2 of the pixel drive circuit 11. Thereby reducing the burden on the processor in the display panel and reducing energy consumption.
  • the control terminal E3 of the second switch unit 14 is controlled to turn on the second switch unit 14 so that the driving current of the pixel driving circuit 11 meets the need to compensate for the next frame of picture
  • the compensation unit 133 generates a compensation signal to compensate the data signal on the data line 15 to eliminate the afterimage phenomenon.
  • FIG. 3 is a circuit structure diagram of a display panel including a first transistor and a second transistor based on the embodiment shown in FIG. 2.
  • the first switch unit 132 includes: a first transistor T1, a second transistor
  • the switch unit 14 includes a second transistor T2, the gate of the first transistor T1 is electrically connected to the control terminal B1 of the first switch unit 132, and the first pole of the first transistor T1 is electrically connected to the input terminal B2 of the first switch unit 132,
  • the second electrode of the first transistor T1 is electrically connected to the output terminal B3 of the first switch unit 132;
  • the gate of the second transistor T2 is electrically connected to the control terminal E3 of the second switch unit 14, and the first electrode of the second transistor T2 is electrically connected to
  • the first terminal E1 of the second switch unit 14 is electrically connected, and the second pole of the second transistor T2 is electrically connected with the second terminal E2 of the second switch unit 14.
  • both the first transistor T1 and the second transistor T2 are used as switches.
  • Both the first transistor T1 and the second transistor T2 can be P-channel metal oxide semiconductor (Positive channel Metal Oxide Semiconductor, PMOS) transistors. When the gate of the transistor is at a low level, the first pole and the second pole of the PMOS transistor are turned on.
  • the PMOS transistor has the advantages of low cost and easy integration on the display panel.
  • the first transistor T1 and the second transistor T2 use PMOS Transistors are beneficial to reduce the overall cost of the display panel.
  • the first transistor T1 or the second transistor T2 can also be N-channel Metal Oxide Semiconductor (NMOS) transistors.
  • NMOS N-channel Metal Oxide Semiconductor
  • FIG. 4 is a schematic diagram of the circuit structure of a display panel including a comparison module based on the embodiment shown in FIG. 3.
  • the sampling and conditioning module 131 includes: a sampling module 1311, the input terminal C3 of the sampling module 1311 and The input terminal C1 of the sampling and conditioning module 131 is electrically connected.
  • the sampling module 1311 is configured to obtain the driving current output by the pixel driving circuit 11 and output a voltage corresponding to the driving current to the comparison module 1312; the comparison module 1312, the first input of the comparison module 1312
  • the terminal C6 is electrically connected to the output terminal C5 of the sampling module 1311, the second input terminal C7 of the comparison module 1312 is configured to receive the reference signal VREF, and the output terminal C8 of the comparison module 1312 is electrically connected to the control terminal B1 of the first switch unit 132.
  • the sampling module 1311 collects the driving current from the output terminal A2 of the pixel driving circuit 11, converts it into a voltage and outputs it to the first input terminal C6 of the comparison module 1312, such as the input voltage of the first input terminal C6 of the comparison module 1312 Higher than the reference signal VREF, that is, if the compensation condition is met, the comparison module 1312 outputs a control signal to control the first transistor T1 to be turned on, so that the input terminal D1 of the compensation unit 133 and the output terminal A2 of the pixel driving circuit 11 are turned on
  • the compensation unit 133 generates a compensation voltage according to the driving current of the pixel driving circuit 11 to compensate the data voltage on the data line 15 to eliminate the afterimage phenomenon.
  • the reference signal VREF may be provided by a driving chip in the display panel, so that there is no need to separately provide a chip that generates the reference signal, which reduces the cost of the display panel.
  • FIG. 5 is a schematic diagram of a circuit structure of a display panel including a first analog switch based on the embodiment shown in FIG. 4.
  • the sampling module 1311 includes a first analog switch K1
  • the first analog switch K1 includes The first terminal and the second terminal, the first terminal of the first analog switch K1 is electrically connected to the input terminal C3 of the sampling module 1311; the first capacitor 1314, the first terminal of the first capacitor 1314 and the second terminal of the first analog switch K1 Terminal is electrically connected, the second terminal of the first capacitor 1314 is set to ground;
  • the operational amplifier 1315 the first input terminal of the operational amplifier 1315 is electrically connected to the second terminal of the first analog switch K1, the second input terminal of the operational amplifier 1315 is electrically connected to The output terminal of the operational amplifier 1315 is electrically connected, and the output terminal of the operational amplifier 1315 is electrically connected with the output terminal C5 of the sampling module 131.
  • the first analog switch K1 and the first capacitor 1314 form a sample-and-hold circuit.
  • the first analog switch K1 is first closed to charge the first capacitor 1314.
  • the first analog switch K1 is turned on, so that the first capacitor 1314 maintains a constant voltage for a certain period of time, and provides a stable voltage signal for the control signal generated by the comparison module 1312.
  • the operational amplifier 1315 forms a power follower circuit, and the operational amplifier 1315
  • the first input terminal of the operational amplifier 1315 can be a non-inverting input terminal
  • the second input terminal of the operational amplifier 1315 can be an inverting input terminal, which has the function of buffering the output voltage of the first capacitor 1314, and can also improve the driving ability, which is more conducive to sampling
  • the signal output by the module 1311 is input to the comparison module 1312 for matching.
  • FIG. 6 is a schematic diagram of a circuit structure of a display panel including a third transistor based on the embodiment shown in FIG. 5.
  • the sampling module 1311 further includes: a third transistor T3, the gate of the third transistor T3 and the first analog
  • the second end of the switch K1 is electrically connected, the first electrode of the third transistor T3 is electrically connected to the first input end of the operational amplifier 1315, and the second electrode of the third transistor T3 is set to ground.
  • the third transistor T3 is an NMOS transistor, and the voltage signal output by the output terminal of the first capacitor 1314 may be small.
  • the output voltage of the first capacitor 1314 can be amplified by the third transistor T3, so that the sampling module 1311 The output voltage signal satisfies the voltage comparison condition of the comparison module 1312, thereby ensuring the accuracy of the compensation circuit 13 for the data line 15.
  • FIG. 7 is a schematic diagram of a circuit structure of a display panel including a comparator based on the embodiment shown in FIG. 6.
  • the comparison module 1312 includes: a comparator 1316. The first input terminal of the comparator 1316 is compared with the comparator 1316.
  • the first input terminal C6 of the module 1312 is electrically connected, the second input terminal of the comparator 1316 is electrically connected to the second input terminal C7 of the comparison module 1312; the digital-to-analog converter 1317, the input terminal of the digital-to-analog converter 1317 and the comparator 1316
  • the output terminal of the digital-to-analog converter 1317 is electrically connected to the output terminal C8 of the comparison module 1312, and the output terminal of the digital-to-analog converter 1317 serves as the output terminal C8 of the comparison module 1312, and both are the same port.
  • the first input terminal C6 of the comparator 1316 may be an inverting input terminal
  • the second input terminal C7 of the comparator 1316 may be a non-inverting input terminal.
  • the output terminal of the comparator 1316 outputs a low-level signal, that is, when the driving current output by the pixel driving circuit 11 is higher than a certain value, if the current display screen displays a high gray scale
  • the comparator 1315 outputs a low level
  • the digital-to-analog converter 1317 sets the digital low
  • the level signal is converted into an analog voltage signal to control the first transistor T1 to turn on.
  • the compensation unit 133 can generate a compensation signal according to the driving current of the pixel driving circuit 11 and output it to the data line 15 to compensate for the next frame of picture. Eliminate the afterimage phenomenon.
  • FIG. 8 is a schematic diagram of a circuit structure of a display panel including a current mirror module based on the embodiment shown in FIG. 7.
  • the compensation unit 133 includes: a current mirror module 1331, a first resistor 1333, and a second capacitor 1334, the third capacitor 1335 and the differential amplifier module 1332; the first input terminal D3 of the current mirror module 1331 is set to receive the reference current, and the second input terminal of the current mirror module 1331 is electrically connected to the first output terminal D6 of the differential amplifier module 1332 ,
  • the output terminal D5 of the current mirror module 1332 is electrically connected to the first terminal of the first resistor 1333; the first terminal of the second capacitor 1334 is electrically connected to the output terminal D2 of the compensation unit 133, and the second terminal of the second capacitor 1334 is electrically connected to the differential
  • the second input terminal D9 of the amplifying module 1332 is electrically connected; the first input terminal D8 of the differential amplifying module 1332 is electrically connected to the input terminal D
  • the two ends are electrically connected; the first end of the third capacitor 1335 is electrically connected to the second end of the second capacitor 1334, and the second end of the third capacitor 1335 is set to ground; the second end of the first resistor 1333 is connected to the compensation unit 133
  • the output terminal D2 is electrically connected.
  • the driving current at the output terminal A2 of the pixel driving circuit 11 is converted into a voltage signal by the first capacitor 1314 and loaded on the differential amplifier module
  • the data voltage on the data line 15 is applied to the second input terminal D9 of the differential amplifying module 1332 by the voltage dividing effect of the second capacitor 1334 and the third capacitor 1335, which provides the differential amplifying module 1332
  • the differential amplifier module 1332 generates an output current at the first output terminal D6 of the differential amplifier module 1332 according to the input voltage signal of the first input terminal D8, and inputs it to the second input terminal D4 of the current mirror module 1331.
  • the input current of the first input terminal D3 of the module 1331 and the input current of the second input terminal D4 work together to generate a compensation current on the output terminal D5 of the current mirror module 1331.
  • the compensation current is converted into a compensation voltage by the first resistor 1333 and then output to The data line 15 completes the compensation for the display effect of the light-emitting device 12 and eliminates the phenomenon of residual image.
  • the display gray scale is different, that is, when the output current of the output terminal A2 of the pixel driving circuit 11 is different, the output voltage of the first capacitor 1314 is different, and the input voltage of the first input terminal D8 of the differential amplifying module 1332 is different.
  • the output current generated by the first output terminal D6 is also different. Under the action of the current mirror module D3, the current output by the current mirror module D3 is also different, which ultimately results in different voltage signals loaded on the data line 15, so as to target different displays.
  • the gray scale achieves a compensation effect that matches the display gray scale.
  • FIG. 9 is a schematic diagram of a circuit structure of a display panel including a fourth transistor based on the embodiment shown in FIG. 8.
  • the current mirror module 1331 includes: a fourth transistor T4, a first transistor T4 The electrode is electrically connected to the first input terminal D3 of the current mirror module 1331, and the first electrode of the fourth transistor T4 is arranged to be electrically connected to the first current source. As shown in FIG. 9,
  • the first terminal of the first current source can be connected to For the first power supply VCC, the second end of the first current source is electrically connected to the first electrode of the fourth transistor T4, and the second electrode of the fourth transistor T4 is set to ground; the gates of the fifth transistor T5 and the fifth transistor T5 are connected to the The gate of the fourth transistor is electrically connected, and the first electrode of the fifth transistor T5 is set to ground; the sixth transistor T6, the first electrode of the sixth transistor T6 is electrically connected to the second electrode of the fifth transistor T5, and the sixth transistor T6
  • the gate of the sixth transistor T6 is electrically connected to the first pole of the sixth transistor T6, the second pole of the sixth transistor T6 is set to be electrically connected to the power supply, such as connected to the power line 1336; the seventh transistor T7 and the first pole of the seventh transistor T7 are set In order to be electrically connected to the power line 1336, the gate of the seventh transistor T7 is electrically connected to the gate of the sixth transistor T6, the second electrode of the seventh transistor T7 is electrically
  • the differential amplifier module 1332 includes a tenth transistor T10, the first pole of the tenth transistor T10 is electrically connected to the first output terminal D6 of the differential amplifier module 1332, and the gate of the tenth transistor T10 is connected to the first input terminal of the differential amplifier module 1332.
  • D8 is electrically connected, the second pole of the tenth transistor T10 is set to be electrically connected to the second current source; the eleventh transistor T11, the first pole of the eleventh transistor T11 is electrically connected to the second output terminal D7 of the differential amplifier module 1332 ,
  • the second electrode of the eleventh transistor T11 is configured to be electrically connected to the second current source, and the gate of the eleventh transistor T11 is electrically connected to the second input terminal D9 of the differential amplifier module 1332.
  • the tenth transistor T10 and the eleventh transistor T11 form a differential pair. On the one hand, it can eliminate the offset voltage, and on the other hand, it can generate different output currents for different display gray levels, thereby generating different compensations under the action of the current mirror module 1331 Current, the fourth transistor T4 and the fifth transistor T5 form a current mirror, the sixth transistor T6 and the seventh transistor T7 form a current mirror, and the eighth transistor T8 and the ninth transistor T9 form a current mirror.
  • the working principle of the current mirror is a technology in the art As the personnel know, this article will not repeat it.
  • FIG. 10 is a schematic diagram of a circuit structure of a display panel including a second analog switch based on the embodiment shown in FIG. 9.
  • the display panel may further include a second analog switch K2.
  • the first terminal is electrically connected to the output terminal C5 of the sampling module 1311
  • the second terminal of the second analog switch K2 is electrically connected to the first input terminal C6 of the comparison module 1312
  • the second analog switch K2 can be set to control the comparison module 1312 for signal
  • the analog signal input to the first input terminal C6 of the comparison module 1312 remains basically unchanged during the comparison time.
  • the pixel drive circuit 11 selects the 2T1C circuit, that is, the pixel drive circuit is set to include 2 transistors and 1 capacitor, and the corresponding light-emitting unit 12 selects OLED.
  • the pixel drive circuit 11 may The drive circuit in any manner is not limited in the embodiment of the present application.
  • the display panel includes a display area 200, and the display area 200 includes a plurality of pixel driving circuits 11 arranged in an array and
  • the OLED 220 corresponding to multiple pixel drive circuits 11, for example, has a structure as shown in FIG. 11, the same column of pixel drive circuits 11 can share one compensation circuit 13, that is, the output terminals of the same column of pixel drive circuits 11 are connected The same compensation circuit 13 can reduce the circuit design complexity.
  • the compensation circuit 13, the scan driving circuit 210, and the data driving circuit 220 are located in the non-display area of the display panel, and the display panel can have a higher aperture ratio.
  • FIG. 12 is a schematic structural diagram of a display device provided by an embodiment of the application.
  • the display device may include any display panel provided by the embodiment of the application, and can execute any display panel provided by the embodiment of the application.
  • the function of the display panel, the structure and function of the display panel can refer to the introduction of the display panel in this embodiment.

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Abstract

本文公开了一种显示面板和显示装置。该显示面板包括数据线、像素驱动电路、发光器件和电压补偿电路；像素驱动电路包括数据信号输入端和输出端，像素驱动电路的数据信号输入端与数据线连接，像素驱动电路的输出端与发光器件连接；电压补偿电路包括：采样和调理单元，设置为获取像素驱动电路输出的驱动电流，根据驱动电流从采样和调理单元的输出端输出控制信号；第一开关单元，第一开关单元包括控制端、输入端和输出端；第一开关单元的控制端与采样和调理单元的输出端连接，第一开关单元的输入端与像素驱动电路的输出端连接；补偿单元，补偿单元包括输入端和输出端，补偿单元的输入端与第一开关单元的输出端电连接，补偿单元的输出端与数据线连接。

Description

显示面板和显示装置
本申请要求在2019年05月15日提交中国专利局、申请号为201910403530.3的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术，例如涉及一种显示面板和显示装置。
背景技术
显示面板在现代电子设备中有着广泛的应用，有机发光二极管(Organic Light-Emitting Diode，OLED)显示面板具有自发光、广视角等优点，被认为是下一代显示技术。
然而OLED显示面板在显示过程中，会出现残影现象，影响显示面板的显示质量。
发明内容
本申请提供一种显示面板和显示装置，以实现对显示面板残影现象的补偿，提高显示效果。
本申请实施例提供了一种显示面板，该显示面板包括数据线、像素驱动电路、发光器件和电压补偿电路；
所述像素驱动电路包括数据信号输入端和输出端，所述像素驱动电路的数据信号输入端与所述数据线电连接，所述像素驱动电路的输出端与所述发光器件电连接；
所述电压补偿电路包括：
采样和调理单元，设置为获取所述像素驱动电路输出的驱动电流，并根据所述驱动电流从所述采样和调理单元的输出端输出控制信号；
第一开关单元，所述第一开关单元包括控制端、输入端和输出端，所述第一开关单元的控制端与所述采样和调理单元的输出端电连接，所述第一开关单元的输入端与所述像素驱动电路的输出端电连接；所述第一开关单元设置为根据所述第一开关单元的控制端的信号控制所述第一开关单元的输入端和所述第一开关单元的输出端之间导通或者关断；
补偿单元，所述补偿单元包括输入端和输出端，所述补偿单元的输入端与 所述第一开关单元的输出端电连接，所述补偿单元的输出端与所述数据线电连接，所述补偿单元设置为根据在所述补偿单元的输入端的信号的作用下输出补偿电压至所述数据线。
本申请实施例还提供了一种显示装置，包括本申请任意实施例提供的显示面板。
附图说明
图1为本申请实施例提供的一种显示面板的电路结构示意图；
图2为图1所示实施例基础上包括第二开关单元的显示面板的电路结构示意图；
图3为图2所示实施例基础上包括第一晶体管和第二晶体管的显示面板的电路结构示意图；
图4为图3所示实施例基础上包括比较模块的显示面板的电路结构示意图；
图5为图4所示实施例基础上包括第一模拟开关的显示面板的电路结构示意图；
图6为图5所示实施例基础上包括第三晶体管的显示面板的电路结构示意图；
图7为图6所示实施例基础上包括比较器的显示面板的电路结构示意图；
图8为图7所示实施例基础上包括电流镜模块的显示面板的电路结构示意图；
图9为图8所示实施例基础上包括第四晶体管的显示面板的电路结构示意图；
图10为图9所示实施例基础上包括第二模拟开关的显示面板的电路结构示意图；
图11为图10所示实施例包括多个像素驱动电路的显示面板的电路结构示意图；
图12为本申请实施例提供的一种显示装置的结构示意图。
具体实施方式
下面结合附图和实施例对本申请进行说明。本文所描述的具体实施例仅仅用于解释本申请，而非对本申请的限定。为了便于描述，附图中仅示出了与本申请相关的部分而非全部结构。
图1为本申请实施例提供的一种显示面板的电路结构示意图，参考图1，显示面板包括数据线15、像素驱动电路11、发光器件12和电压补偿电路13。像素驱动电路11包括数据信号输入端A1和输出端A2，像素驱动电路11的数据信号输入端A1与数据线15电连接，像素驱动电路11的输出端A2与发光器件12电连接。
电压补偿电路13包括：采样和调理单元131，也可称为采样和调理电路131，设置为获取像素驱动电路11输出的驱动电流，并根据驱动电流从采样和调理单元131的输出端C2输出控制信号；第一开关单元132，也可称为第一开关电路132，第一开关单元132包括控制端B1、输入端B2和输出端B3；第一开关单元132的控制端B1与采样和调理单元131的输出端C2电连接，第一开关单元132的输入端B2与像素驱动电路11的输出端A2电连接，第一开关单元132设置为根据控制端B1的控制信号控制输入端B2与输出端B3之间导通或关断；补偿单元133，也可称为补偿电路133，补偿单元133包括输入端D1和输出端D2，补偿单元133的输入端D1与第一开关单元132输出端B3电连接，补偿单元133的输出端D2与数据线15电连接，补偿单元133设置为在输入端D1信号的作用下输出补偿电压至数据线15。
在显示面板显示过程中，工艺制作无论是低温多晶硅(Low Temperature Poly-silicon，LTPS)还是氧化物半导体(Oxide semiconductor)均存在均匀性或稳定性的问题，且OLED本身也会随着点亮时间的增加亮度在逐渐降低，通常OLED的发光亮度和驱动电流成正比，而驱动电流由像素驱动电路中的驱动晶体管提供，与驱动晶体管的特性参数相关，影响电流大小的参数有驱动晶体管的迁移率、阈值电压、OLED的驱动电压以及电源电压的大小等，该影响电流大小的参数会造成显示亮度差异，由于这种差异与之前显示的图像有关，因此常呈现为残影现象，也就是通常所说的残像。通过设置电压补偿电路13，对像素驱动电路11的输出端A2的驱动电流进行检测，当需要对下一帧显示的亮度进行补偿时，电压补偿电路13在像素驱动电路11的下一帧显示过程中将补偿电压补偿至像素驱动电路11的数据线15上，消除驱动晶体管的迁移率、阈值电压、OLED的驱动电压以及电源电压的大小对像素驱动电路11驱动电流的影响，从而消除残影现象。示例性的，像素驱动电路11能够根据数据线15上的数据电压输出对应数据电压大小的驱动电流，输出的驱动电流驱动发光器件12发光。采样和调理单元131的输入端C1与像素驱动电路11的输出端A2电连接，从而获取像素驱动电路11输出的驱动电流，并根据驱动电流生成控制信号，如将驱动电流调理为控制电压，当控制电压满足需要补偿的条件时，如超出设定阈值，控制第一开关单元132将输入端B2与输出端B3之间导通，从而像素驱动电路11的输出端A2的驱动电流输出至补偿单元133，补偿单元133根据像素驱动电 路11输出端A2的驱动电流输出补偿电压至像素驱动电路11的数据线，对数据线上的电压进行补偿，从而消除残影现象。
本实施例的技术方案，通过采用包括像素驱动电路、发光器件、采样和调理单元、第一开关单元和补偿单元的显示面板，对当前帧像素驱动电路的驱动电流进行采样，采样和调理单元对采样的驱动电流进行调理产生控制信号，第一开关单元根据控制信号将补偿单元的输入端与像素驱动电路的输出端导通，补偿单元根据像素驱动电路的驱动电流生成补偿电压至数据线，从而消除显示画面的残影现象，达到更优的显示效果；同时本实施例的电压补偿电路可作为外部补偿。本实施例中，外部补偿是指通过外部的驱动电路或设备感知像素的电学或光学特性然后进行补偿的方法。通常内部补偿方式的像素结构和驱动方式都较复杂，且补偿效果仅限于驱动晶体管的阈值电压补偿和电压降补偿(IR Drop)，补偿范围偏小，难以解决残像问题。而本申请实施例提供显示面板的补偿方式，无需对像素电路进行改动，具有像素结构简单、驱动速度快和补偿范围大的优点。
一实施例中，图2为图1所示实施例基础上包括第二开关单元的显示面板的电路结构示意图，参考图2，显示面板还包括第二开关单元14，也可称为第二开关电路14，第二开关单元14的第一端E1与采样和调理单元131的输入端C1电连接，第二开关单元14的第二端E2与像素驱动电路11的输出端A2电连接，第二开关单元14设置为根据控制端E3的控制信号将采样和调理单元131的输入端C1与像素驱动电路11的输出端A2之间导通或关闭。
在对显示效果要求较低的情况下，可通过控制第二开关单元14的控制端E3，使得第二开关单元14关断，补偿单元13不再从像素驱动电路11的输出端A2采集电流，从而降低显示面板中处理器的负担，降低能耗。而在对显示效果要求较高的情况下，控制第二开关单元14的控制端E3，使得第二开关单元14导通，从而在像素驱动电路11的驱动电流满足需要对下一帧画面进行补偿的条件时，补偿单元133产生补偿信号，对数据线15上的数据信号进行补偿，从而消除残影现象。通过设置第二开关单元14，提高了补偿的灵活性，在满足显示要求的同时，还可降低显示面板的能耗。
一实施例中，图3为图2所示实施例基础上包括第一晶体管和第二晶体管的显示面板的电路结构示意图，参考图3，第一开关单元132包括：第一晶体管T1，第二开关单元14包括第二晶体管T2，第一晶体管T1的栅极与第一开关单元132的控制端B1电连接，第一晶体管T1的第一极与第一开关单元132的输入端B2电连接，第一晶体管T1的第二极与第一开关单元132的输出端B3电连接；第二晶体管T2的栅极与第二开关单元14的控制端E3电连接，第二晶体 管T2的第一极与第二开关单元14的第一端E1电连接，第二晶体管T2的第二极与第二开关单元14的第二端E2电连接。
一实施例中，第一晶体管T1和第二晶体管T2均作为开关，第一晶体管T1和第二晶体管T2均可采用P沟道金属氧化物半导体(Positive channel Metal Oxide Semiconductor，PMOS)晶体管，当PMOS晶体管的栅极加低电平时，PMOS晶体管的第一极与第二极之间导通，PMOS晶体管具有成本低，易于在显示面板上集成等优点，第一晶体管T1和第二晶体管T2采用PMOS晶体管有利于降低显示面板的整体成本，当然第一晶体管T1或第二晶体管T2也可采用N沟道金属氧化物半导体(Negative channel Metal Oxide Semiconductor，NMOS)晶体管。
一实施例中，图4为图3所示实施例基础上包括比较模块的显示面板的电路结构示意图，参考图4，采样和调理模块131包括：采样模块1311，采样模块1311的输入端C3与采样和调理模块131的输入端C1电连接，采样模块1311设置为获取像素驱动电路11输出的驱动电流并输出与驱动电流对应的电压至比较模块1312；比较模块1312，比较模块1312的第一输入端C6与采样模块1311的输出端C5电连接，比较模块1312的第二输入端C7设置为接收参考信号VREF，比较模块1312的输出端C8与第一开关单元132的控制端B1电连接。
一实施例中，采样模块1311从像素驱动电路11的输出端A2采集驱动电流，并转换成电压输出至比较模块1312的第一输入端C6，如比较模块1312的第一输入端C6的输入电压高于参考信号VREF，即若满足需要补偿的条件，则比较模块1312输出控制信号，控制第一晶体管T1导通，从而使补偿单元133的输入端D1与像素驱动电路11的输出端A2导通，补偿单元133根据像素驱动电路11的驱动电流生成补偿电压，以对数据线15上的数据电压进行补偿，从而消除残影现象。示例性的，参考信号VREF可由显示面板中驱动芯片提供，从而不必单独设置产生参考信号的芯片，降低显示面板的成本。
一实施例中，图5为图4所示实施例基础上包括第一模拟开关的显示面板的电路结构示意图，参考图5，采样模块1311包括：第一模拟开关K1，第一模拟开关K1包括第一端和第二端，第一模拟开关K1的第一端与采样模块1311的输入端C3电连接；第一电容1314，第一电容1314的第一端与第一模拟开关K1的第二端电连接，第一电容1314的第二端设置为接地；运算放大器1315，运算放大器1315的第一输入端与第一模拟开关K1的第二端电连接，运算放大器1315的第二输入端与运算放大器1315的输出端电连接，运算放大器1315的输出端与采样模块131的输出端C5电连接。
一实施例中，第一模拟开关K1和第一电容1314组成采样保持电路，当需 要对像素驱动电路11的驱动电流进行采集时，第一模拟开关K1先关闭以对第一电容1314进行充电，在保持过程中第一模拟开关K1打开，从而使得第一电容1314在一定时间内保持恒定的电压，为比较模块1312产生控制信号提供稳定的电压信号，运算放大器1315组成电源跟随电路，运算放大器1315的第一输入端可为同相输入端，运算放大器1315的第二输入端可为反相输入端，具有对第一电容1314输出电压缓冲的作用，还可以提高驱动能力，从而更有利于将采样模块1311输出的信号输入至比较模块1312进行匹配。
一实施例中，图6为图5所示实施例基础上包括第三晶体管的显示面板的电路结构示意图，采样模块1311还包括：第三晶体管T3，第三晶体管T3的栅极与第一模拟开关K1的第二端电连接，第三晶体管T3的第一极与运算放大器1315的第一输入端电连接，第三晶体管T3的第二极设置为接地。
示例性地，第三晶体管T3采用NMOS晶体管，第一电容1314的输出端输出的电压信号可能较小，通过第三晶体管T3可对第一电容1314的输出电压进行放大，以使得采样模块1311的输出的电压信号满足比较模块1312进行电压比较的条件，从而保证补偿电路13对数据线15进行补偿的准确性。
一实施例中，图7为图6所示实施例基础上包括比较器的显示面板的电路结构示意图，参考图7，比较模块1312包括：比较器1316，比较器1316的第一输入端与比较模块1312的第一输入端C6电连接，比较器1316的第二输入端与比较模块1312的第二输入端C7电连接；数模转换器1317，数模转换器1317的输入端与比较器1316的输出端电连接，数模转换器1317的输出端与比较模块1312的输出端C8电连接，数模转换器1317的输出端作为比较模块1312的输出端C8，二者为同一端口。
一实施例中，比较器1316的第一输入端C6可为反相输入端，比较器1316的第二输入端C7可为同相输入端，当比较器1316的反相输入端输入的电压信号高于同相输入端输入的电压信号时，比较器1316的输出端输出低电平信号，也即当像素驱动电路11输出的驱动电流高于一定值时，如当前显示画面显示高灰阶，第一电容1314上的电压，经第三晶体管T3以及运算放大器1315的放大以及缓冲作用之后，高于参考信号VREF的电压值，此时比较器1315输出低电平，数模转换器1317将数字的低电平信号转换为模拟的电压信号，从而控制第一晶体管T1导通，补偿单元133可根据像素驱动电路11的驱动电流生成补偿信号输出至数据线15上，以对下一帧画面进行补偿，消除残影现象。
一实施例中，图8为图7所示实施例基础上包括电流镜模块的显示面板的电路结构示意图，参考图8，补偿单元133包括：电流镜模块1331、第一电阻1333、第二电容1334、第三电容1335和差分放大模块1332；电流镜模块1331 的第一输入端D3设置为接收参考电流，电流镜模块1331的第二输入端与差分放大模块1332的第一输出端D6电连接，电流镜模块1332的输出端D5与第一电阻1333的第一端电连接；第二电容1334的第一端与补偿单元133的输出端D2电连接，第二电容1334的第二端与差分放大模块1332的第二输入端D9电连接；差分放大模块1332的第一输入端D8与补偿单元133的输入端D1电连接，差分放大模块1332的第二输出端D7与第一电阻1333的第二端电连接；第三电容1335的第一端与第二电容1334的第二端电连接，第三电容1335的第二端设置为接地；第一电阻1333的第二端与补偿单元133的输出端D2电连接。
当第一晶体管T1与第二晶体管T2均导通，也即需要对像素驱动电路11进行补偿时，像素驱动电路11输出端A2的驱动电流经第一电容1314转化为电压信号加载在差分放大模块1332的第一输入端D8上，数据线15上的数据电压经第二电容1334和第三电容1335的分压作用加载在差分放大模块1332的第二输入端D9上，为差分放大模块1332提供初始电压信号，差分放大模块1332一方面根据第一输入端D8的输入电压信号在差分放大模块1332的第一输出端D6产生输出电流，并输入电流镜模块1331的第二输入端D4，电流镜模块1331第一输入端D3的输入电流与第二输入端D4的输入电流共同作用，在电流镜模块1331的输出端D5上生成补偿电流，补偿电流经第一电阻1333转化为补偿电压从而输出至数据线15，完成对发光器件12显示效果的补偿，消除残影的现象。当显示灰阶不同，即像素驱动电路11的输出端A2输出的电流不同时，第一电容1314的输出电压不同，进而差分放大模块1332的第一输入端D8的输入电压不同，差分放大模块1332的第一输出端D6产生的输出电流也不同，在电流镜模块D3的作用下，电流镜模块D3输出的电流也不同，最终导致加载在数据线15上的电压信号不同，从而针对不同的显示灰阶实现了与显示灰阶相匹配的补偿效果。
一实施例中，图9为图8所示实施例基础上包括第四晶体管的显示面板的电路结构示意图，参考图9，电流镜模块1331包括：第四晶体管T4，第四晶体管T4的第一极与电流镜模块1331的第一输入端D3电连接，第四晶体管T4的第一极设置为与第一电流源电连接，如图9中所示，第一电流源的第一端可接第一电源VCC，第一电流源的第二端与第四晶体管T4的第一极电连接，第四晶体管T4的第二极设置为接地；第五晶体管T5，第五晶体管T5的栅极与第四晶体管的栅极电连接，第五晶体管T5的第一极设置为接地；第六晶体管T6，第六晶体管T6的第一极与第五晶体管T5的第二极电连接，第六晶体管T6的栅极与第六晶体管T6的第一极电连接，第六晶体管T6的第二极设置为与电源电连接，如接电源线1336；第七晶体管T7，第七晶体管T7的第一极设置为与电源线1336电连接，第七晶体管T7的栅极与第六晶体管T6的栅极电连接，第七晶 体管T7的第二极与第八晶体管T8的第二极电连接；第八晶体管T8，第八晶体管T8的第一极设置为与电源线1336电连接，第八晶体管T8的栅极与第八晶体管T8的第二极电连接，第八晶体管T8的第二极与电流镜模块1331的第二输入端D4电连接；第九晶体管T9，第九晶体管T9的第一极设置为与电源线1336电连接，第九晶体管T9的栅极与第八晶体管T8的栅极电连接，第九晶体管T9的第二极与电流镜模块1331的输出端D5电连接。
差分放大模块1332包括：第十晶体管T10，第十晶体管T10的第一极与差分放大模块1332的第一输出端D6电连接，第十晶体管T10的栅极与差分放大模块1332的第一输入端D8电连接，第十晶体管T10的第二极设置为与第二电流源电连接；第十一晶体管T11，第十一晶体管T11的第一极与差分放大模块1332的第二输出端D7电连接，第十一晶体管T11的第二极设置为与第二电流源电连接，第十一晶体管T11的栅极与差分放大模块1332的第二输入端D9电连接。
第十晶体管T10和第十一晶体管T11组成差分对，一方面可消除失调电压，另一方面可针对不同的显示灰阶产生不同的输出电流，从而在电流镜模块1331的作用下产生不同的补偿电流，第四晶体管T4和第五晶体管T5组成电流镜，第六晶体管T6和第七晶体管T7组成电流镜，第八晶体管T8和第九晶体管T9组成电流镜，电流镜的工作原理为本领域技术人员所知，本文不再赘述。
一实施例中，图10为图9所示实施例基础上包括第二模拟开关的显示面板的电路结构示意图，参考图10，显示面板还可包括第二模拟开关K2，第二模拟开关K2的第一端与采样模块1311的输出端C5电连接，第二模拟开关K2的第二端与比较模块1312的第一输入端C6电连接，第二模拟开关K2可设置为控制比较模块1312进行信号比较的时间，在比较时间内使得输入至比较模块1312第一输入端C6的模拟信号基本保持不变。图10中的像素驱动电路11选择2T1C电路，即设置像素驱动电路包括2个晶体管和1个电容，相应的发光单元12选择OLED，在本申请实施例的其他实施方式中，像素驱动电路11可以采用任意方式的驱动电路，本申请实施例不作限制。
图11为图10所示实施例包括多个像素驱动电路的显示面板的电路结构示意图，参考图11，显示面板包括显示区200，显示区200内包括多个阵列排布的像素驱动电路11以及与多个像素驱动电路11相对应的OLED 220，示例性的，如图11中所示的结构，同一列像素驱动电路11可共用一个补偿电路13，即同一列像素驱动电路11的输出端连接至相同的补偿电路13，从而可降低电路设计复杂度，同时补偿电路13、扫描驱动电路210以及数据驱动电路220均位于显示面板的非显示区，显示面板可具有更高的开口率。
图12为本申请实施例提供的一种显示装置的结构示意图，参考图12，显示装置可包括本申请实施例提供的任一种显示面板，能够执行本申请实施例提供的任意一种显示面板的功能，显示面板的结构及功能可参照本实施例对显示面板部分的介绍。

Claims (10)

  1. 一种显示面板，包括：数据线、像素驱动电路、发光器件和电压补偿电路；
    所述像素驱动电路包括数据信号输入端和输出端，所述像素驱动电路的数据信号输入端与所述数据线电连接，所述像素驱动电路的输出端与所述发光器件电连接；
    所述电压补偿电路包括：
    采样和调理单元，设置为获取所述像素驱动电路输出的驱动电流，并根据所述驱动电流从所述采样和调理单元的输出端输出控制信号；
    第一开关单元，所述第一开关单元包括控制端、输入端和输出端，所述第一开关单元的控制端与所述采样和调理单元的输出端电连接，所述第一开关单元的输入端与所述像素驱动电路的输出端电连接；所述第一开关单元设置为根据所述第一开关单元的控制端的信号控制所述第一开关单元的输入端和所述第一开关单元的输出端之间导通或者关断；
    补偿单元，所述补偿单元包括输入端和输出端，所述补偿单元的输入端与所述第一开关单元的输出端电连接，所述补偿单元的输出端与所述数据线电连接，所述补偿单元设置为在所述补偿单元的输入端的信号的作用下输出补偿电压至所述数据线。
  2. 根据权利要求1所述的显示面板，还包括：
    第二开关单元，所述第二开关单元的第一端与所述采样和调理单元的输入端电连接，所述第二开关单元的第二端与所述像素驱动电路的输出端电连接，所述第二开关单元设置为根据所述第二开关单元的控制端的控制信号控制所述采样和调理单元的输入端与所述像素驱动电路的输出端之间导通或关闭。
  3. 根据权利要求2所述的显示面板，其中，所述第一开关单元包括：第一晶体管，所述第二开关单元包括第二晶体管，所述第一晶体管的栅极与所述第一开关单元的控制端电连接，所述第一晶体管的第一极与所述第一开关单元的输入端电连接，所述第一晶体管的第二极与所述第一开关单元的输出端电连接；
    所述第二晶体管的栅极与所述第二开关单元的控制端电连接，所述第二晶体管的第一极与所述第二开关单元的第一端电连接，所述第二晶体管的第二极与所述第二开关单元的第二端电连接。
  4. 根据权利要求1-3任一项所述的显示面板，其中，所述采样和调理单元包括：
    采样模块，所述采样模块设置为获取所述像素驱动电路输出的驱动电流并 输出与所述驱动电流对应的电压至比较模块；
    所述比较模块，所述比较模块的第一输入端与所述采样模块的输出端电连接，所述比较模块的第二输入端设置为接收参考信号，所述比较模块的输出端与所述第一开关单元的控制端电连接。
  5. 根据权利要求4所述的显示面板，其中，所述采样模块包括：
    第一模拟开关，所述第一模拟开关包括第一端和第二端，所述第一模拟开关的第一端与所述采样模块的输入端电连接；
    第一电容，所述第一电容的第一端与所述第一模拟开关的第二端电连接，所述第一电容的第二端设置为接地；
    运算放大器，所述运算放大器的第一输入端与所述第一模拟开关的第二端电连接，所述运算放大器的第二输入端与所述运算放大器的输出端电连接，所述运算放大器的输出端与所述采样模块的输出端电连接。
  6. 根据权利要求5所述的显示面板，其中，所述采样模块还包括：第三晶体管，所述第三晶体管的栅极与所述第一模拟开关的第二端电连接，所述第三晶体管的第一极与所述运算放大器的第一输入端电连接，所述第三晶体管的第二极设置为接地。
  7. 根据权利要求4所述的显示面板，其中，所述比较模块包括：
    比较器，所述比较器的第一输入端与所述比较模块的第一输入端电连接，所述比较器的第二输入端与所述比较模块的第二输入端电连接；
    数模转换器，所述数模转换器的输入端与所述比较器的输出端电连接，所述数模转换器的输出端与所述比较模块的输出端电连接。
  8. 根据权利要求1所述的显示面板，其中，所述补偿单元包括：电流镜模块、第一电阻、第二电容、第三电容和差分放大模块；
    所述电流镜模块的第一输入端设置为接收参考电流，所述电流镜模块的第二输入端与所述差分放大模块的第一输出端电连接，所述电流镜模块的输出端与所述第一电阻的第一端电连接；
    所述第二电容的第一端与所述补偿单元的输出端电连接，所述第二电容的第二端与所述差分放大模块的第二输入端电连接；
    所述差分放大模块的第一输入端与所述补偿单元的输入端电连接，所述差分放大模块的第二输出端与所述第一电阻的第二端电连接；
    所述第三电容的第一端与所述第二电容的第二端电连接，所述第三电容的第二端设置为接地；
    所述第一电阻的第二端与所述补偿单元的输出端电连接。
  9. 根据权利要求8所述的显示面板，其中，所述电流镜模块包括：
    第四晶体管，所述第四晶体管的第一极与所述电流镜模块的第一输入端电连接，所述第四晶体管的第一极设置为与第一电流源电连接，所述第四晶体管的第二极设置为接地；
    第五晶体管，所述第五晶体管的栅极与所述第四晶体管的栅极电连接，所述第五晶体管的第一极设置为接地；
    第六晶体管，所述第六晶体管的第一极与所述第五晶体管的第二极电连接，所述第六晶体管的栅极与所述第六晶体管的第一极电连接，所述第六晶体管的第二极设置为与电源电连接；
    第七晶体管，所述第七晶体管的第一极设置为与所述电源电连接，所述第七晶体管的栅极与所述第六晶体管的栅极电连接，所述第七晶体管的第二极与所述第八晶体管的第二极电连接；
    第八晶体管，所述第八晶体管的第一极设置为与所述电源电连接，所述第八晶体管的栅极与所述第八晶体管的第二极电连接，所述第八晶体管的第二极与所述电流镜模块的第二输入端电连接；
    第九晶体管，所述第九晶体管的第一极设置为与所述电源电连接，所述第九晶体管的栅极与所述第八晶体管的栅极电连接，所述第九晶体管的第二极与所述电流镜模块的输出端电连接；
    所述差分放大模块包括：
    第十晶体管，所述第十晶体管的第一极与所述差分放大模块的第一输出端电连接，所述第十晶体管的栅极与所述差分放大模块的第一输入端电连接，所述第十晶体管的第二极设置为与第二电流源电连接；
    第十一晶体管，所述第十一晶体管的第一极与所述差分放大模块的第二输出端电连接，所述第十一晶体管的第二极设置为与所述第二电流源电连接，所述第十一晶体管的栅极与所述差分放大模块的第二输入端电连接。
  10. 一种显示装置，包括权利要求1-9任一项所述的显示面板。
PCT/CN2019/125290 2019-05-15 2019-12-13 显示面板和显示装置 WO2020228318A1 (zh)

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