WO2020015161A1 - Oled显示面板、oled显示装置及其驱动方法 - Google Patents

Oled显示面板、oled显示装置及其驱动方法 Download PDF

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Publication number
WO2020015161A1
WO2020015161A1 PCT/CN2018/107479 CN2018107479W WO2020015161A1 WO 2020015161 A1 WO2020015161 A1 WO 2020015161A1 CN 2018107479 W CN2018107479 W CN 2018107479W WO 2020015161 A1 WO2020015161 A1 WO 2020015161A1
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Prior art keywords
switch
storage capacitor
voltage
coupled
power source
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PCT/CN2018/107479
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English (en)
French (fr)
Inventor
谢炎
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武汉华星光电半导体显示技术有限公司
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Priority to US16/207,226 priority Critical patent/US20200027399A1/en
Publication of WO2020015161A1 publication Critical patent/WO2020015161A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • the present invention relates to the field of display technology, and in particular, to an OLED display panel, an OLED display device, and a driving method thereof.
  • OLEDs Organic light emitting diodes
  • TFT Thin Film Transistor, thin film transistor switching circuits mostly use low temperature polysilicon thin film transistors (LTPS thin film transistors) or oxide thin film transistors (Oxide thin film transistors). Due to the limitation of crystallization process and production level, TFT switch circuits fabricated on large-area glass substrates often have non-uniformities in electrical parameters such as threshold voltage, which makes the threshold voltage deviation of each TFT inconsistent, which will cause The difference in current and brightness of organic light emitting diodes is perceived by the human eye. In addition, the threshold voltage of the TFT will shift under long-term pressure and high temperature, which will cause the threshold shift of the TFT in each part of the panel to be different, thereby causing a difference in display brightness.
  • LTPS thin film transistors low temperature polysilicon thin film transistors
  • Oxide thin film transistors Oxide thin film transistors
  • the technical problem mainly solved by the present invention is to provide an OLED display panel, an OLED display device and a driving method thereof, which reduce the influence of the threshold voltage of the switch and the voltage drop of the line trace impedance, improve the situation of uneven brightness, and improve uniformity.
  • the first technical solution adopted by the present invention is to provide an OLED display device, the OLED display device includes an OLED display panel, the OLED display panel includes a plurality of pixel regions, and each of the pixels
  • the area includes a first storage capacitor, a second storage capacitor, and a light-emitting circuit;
  • the light-emitting circuit includes a first switch and a light-emitting unit;
  • a control end of the first switch is coupled to a first end of the first storage capacitor, and An input terminal of the first switch is coupled to a first terminal of the second storage capacitor and a first power source, an output terminal of the first switch is coupled to the light emitting unit;
  • a second terminal of the second storage capacitor And a second terminal of the first storage capacitor are coupled to a second power source through a second switch, and a control terminal of the first switch is further coupled to a data line through a third switch;
  • the control end and the control end of the third switch are respectively coupled to the scanning line; wherein the second storage capacitor is used
  • the first storage capacitor and the second storage capacitor are further configured to provide a driving voltage to the first switch during a display phase; the first switch is a driving transistor.
  • a second technical solution adopted by the present invention is to provide an OLED display panel.
  • the OLED display panel includes a plurality of pixel regions, and each of the pixel regions includes a first storage capacitor and a second storage.
  • the first end of the second storage capacitor is coupled to a first power source, the output end of the first switch is coupled to the light-emitting unit; the second end of the second storage capacitor and the first end of the first storage capacitor are coupled.
  • the two terminals are coupled to the second power source through a second switch, and the control terminal of the first switch is also coupled to the data line through a third switch; the control terminal of the second switch and the control terminal of the third switch are respectively Coupled with the scan line.
  • a third technical solution adopted by the present invention is to provide a driving method of an OLED display device.
  • the OLED display device includes an OLED display panel, and the OLED display panel includes a plurality of pixel regions.
  • the pixel region includes a first storage capacitor, a second storage capacitor, and a light-emitting circuit;
  • the light-emitting circuit includes a first switch and a light-emitting unit;
  • a control terminal of the first switch is coupled to a first terminal of the first storage capacitor
  • the input terminal of the first switch is coupled to the first terminal of the second storage capacitor and a first power source, and the output terminal of the first switch is coupled to the light-emitting unit;
  • the second storage capacitor The second terminal of the first storage capacitor and the second terminal of the first storage capacitor are coupled to the second power source through a second switch, and the control terminal of the first switch is further coupled to the data line through a third switch;
  • the second switch The control terminal of the third switch and the control terminal of the third switch are respectively
  • the voltage difference of the line voltage, and the threshold voltage of the first switch is stored by the second storage capacitor; in the display phase, the second power source and the data line voltage stored by the first storage capacitor are The voltage difference and the threshold voltage of the first switch stored by the second storage capacitor drive the first switch to turn on.
  • the OLED display panel of the present invention includes a first storage capacitor and a second storage capacitor.
  • the first storage capacitor and the second storage capacitor store electric charges, so that the first storage capacitor stores a voltage difference between the voltage of the second power source and the data line, and the second storage capacitor stores a threshold voltage of the first switch.
  • the first storage capacitor and the second storage capacitor provide a driving voltage for the first switch to compensate the threshold voltage of the first switch and the power supply voltage applied to the first switch, thereby reducing the threshold voltage of the switch and the line travel.
  • the effect of the line impedance voltage drop improves the situation of uneven brightness and uniformity.
  • FIG. 1 is a schematic structural diagram of an embodiment of an OLED display panel according to the present invention.
  • FIG. 2 is a schematic structural diagram of an embodiment of a pixel region of the OLED display panel of FIG. 1;
  • FIG. 3 is a schematic structural diagram of a specific embodiment of the pixel region of FIG. 2; FIG.
  • FIG. 4 is a timing diagram of the scan lines Scan, the enable signal line EM, and the reset signal line Reset of the pixel region of FIG. 3;
  • FIG. 5 is a schematic diagram of an equivalent circuit of the pixel region of FIG. 3 at a second stage t2;
  • FIG. 6 is a schematic diagram of an equivalent circuit of the pixel region of FIG. 3 at a third stage t3;
  • FIG. 7 is a schematic diagram of an equivalent circuit of the pixel region of FIG. 3 at a fourth stage t4;
  • FIG. 8 is a schematic flowchart of an embodiment of a driving method of an OLED display device according to the present invention.
  • the present invention provides an OLED display panel, an OLED display device, and a driving method thereof.
  • OLED display panel an OLED display panel
  • OLED display device an OLED display device
  • driving method thereof a driving method thereof.
  • the OLED display panel includes a plurality of pixel regions, and each pixel region includes a first storage capacitor, a second storage capacitor, and a light-emitting circuit.
  • the light-emitting circuit includes a first switch and a light-emitting unit.
  • the control end of the switch is coupled to the first end of the first storage capacitor, the input end of the first switch is coupled to the first end of the second storage capacitor and the first power source, and the output end of the first switch is coupled to the light emitting unit;
  • the second end of the second storage capacitor and the second end of the first storage capacitor are coupled to the second power source through a second switch, and the control end of the first switch is also coupled to the data line through a third switch;
  • the terminal and the control terminal of the third switch are respectively coupled to the scanning line.
  • the first storage capacitor is used to store the voltage difference between the second power supply and the data line voltage
  • the second storage capacitor is used to store the threshold voltage of the first switch;
  • the first storage capacitor and the second storage capacitor are also used.
  • a driving voltage is provided to the first switch during the display phase.
  • FIG. 1 is a schematic structural diagram of an embodiment of the OLED display panel of the present invention. Schematic.
  • the OLED display panel 10 of this embodiment includes a timing control circuit 11, a data driving circuit 12, and a scan driving circuit 13.
  • the timing control circuit 11 is coupled to the data driving circuit 12 and the scan driving circuit 13, respectively.
  • the OLED display panel 10 further includes a plurality of scan lines parallel to each other, and a plurality of data lines perpendicular to the scan lines, forming a plurality of pixel regions 14.
  • the scanning line and the data line perpendicular to each other are only one of the wiring methods. It can be understood that in other embodiments, the scanning line and the data line may not be perpendicular to each other.
  • the timing control circuit 11 is configured to generate a timing control instruction and output the corresponding timing control instruction to the data driving circuit 12 and the scan driving circuit 13.
  • the scan driving circuit 13 controls the corresponding scanning line to output a timing level signal; the data driving circuit 12 controls the corresponding data line to output a voltage signal.
  • the scan lines include a scan line Scan, an enable signal line EM, and a reset signal line Reset.
  • the data line includes a first power source PL, a second power source Vref, a third power source VI, and a data line DL.
  • the scanning line and the data line are respectively coupled to the plurality of pixel regions 14 to provide corresponding power signals and control signals, and the light-emitting unit (not shown in the figure) of the pixel region 14 is driven to display, thereby achieving the display.
  • the pixel region 14 includes a first storage capacitor C1, a second storage capacitor C2, and a light emitting circuit 141.
  • the light-emitting circuit 141 includes a first switch 1411 and a light-emitting unit 1412.
  • the control terminal of the first switch 1411 is coupled to the first terminal of the first storage capacitor C1, and the input terminal of the first switch 1411 is coupled to the first terminal of the second storage capacitor C2 and the first power source 142.
  • the pixel region 14 further includes a fifth switch (not shown in the figure).
  • the control end of the fifth switch is coupled to the enable signal line of the OLED display panel (not shown in the figure).
  • An input terminal of the five switches is coupled to the first power source 142, and an output terminal of the fifth switch is coupled to the input terminal of the first switch 1411.
  • the fifth switch When the fifth switch is turned on, the first power source 142 provides power to the first switch 1411.
  • the output end of the first switch 1411 is coupled to the light emitting unit 1412, where the light emitting unit 1412 is an organic light emitting diode.
  • the second terminal of the second storage capacitor C2 and the second terminal of the first storage capacitor C1 are coupled to the second power source 144 through the second switch 143, and the control terminal of the first switch 1411 is also coupled to the data line 146 through the third switch 145 Pick up.
  • the control terminal of the second switch 143 and the control terminal of the third switch 145 are respectively coupled to the scanning line 147.
  • the scan line 147 outputs a corresponding voltage according to the timing control instruction to control the on and off of the second switch 143 and the third switch 145.
  • the data line 146 outputs the voltage according to the timing control instruction and the voltage value output by the data line 146 varies with According to the stage at which the display panel is located, when the third switch 145 is turned on, the voltage corresponding to the data line 146 can be applied to the control terminal of the first switch 1411. Please refer to the subsequent description for the working principle of the pixel region 14.
  • the first power source 142, the second power source 144, and the data line 146 are all coupled to the data driving circuit 12 of the display panel 10. It can be understood that the first power source 142 and the second power source 142 The voltage signal corresponding to the power source 144 is generated or provided by the data driving circuit 12, and the voltage output by the data line 146 is also generated or provided by the data driving circuit 12.
  • the first storage capacitor C1 is used to store the voltage difference between the voltage of the second power source 144 and the data line 146 during the storage phase
  • the second storage capacitor C2 is used to store the threshold voltage of the first switch 1411 during the storage phase
  • a storage capacitor C1 and a second storage capacitor C2 are also used to provide a driving voltage to the first switch 1411 during the display phase to compensate the threshold voltage of the first switch 1411 and the power supply voltage applied to the first switch 1411, thereby reducing
  • the effects of the threshold voltage of the switch and the impedance drop of the line traces improve the uneven brightness and uniformity.
  • the light-emitting circuit 141 further includes a fourth switch 1413, where the fourth switch 1413 and the first The output terminal of the switch 1411 is coupled to shunt the light-emitting circuit 141 during the reset phase and the storage phase to prevent the light-emitting unit 1412 from emitting light.
  • the input terminal of the fourth switch 1413 is coupled to the output terminal of the first switch 1411, the output terminal of the fourth switch 1413 is grounded or external negative voltage is applied, and the control terminal of the fourth switch 1413 is connected to the reset signal line of the OLED display panel ( (Not shown) coupled.
  • the first switch 1411, the second switch 143, the third switch 145, the fourth switch 1413, and the fifth switch are thin film transistors, which can be P-type thin film transistors or N-type thin film transistors.
  • the type of the transistor may correspond to the timing control signal, and is not specifically limited herein. It can be understood that the first switch 1411, the second switch 143, the third switch 145, the fourth switch 1413, and the fifth switch may also be other types of switches, such as a transistor.
  • the first switch 1411 is a driving transistor, which is used to preset the storage voltages of the first storage capacitor C1 and the second storage capacitor C2 on the one hand, and is used to drive the light-emitting unit 1412 to emit light.
  • the storage voltages of the first storage capacitor C1 and the second storage capacitor C2 are preset by controlling the on-off of the driving transistor.
  • the first storage capacitor C1 is used to store the second power source Vref and the data line voltage.
  • the voltage difference between Vdata and the second storage capacitor C2 is used to store the threshold voltage
  • the first storage capacitor C1 and the second storage capacitor C2 provide a gate-source voltage for the driving transistor to turn on the driving transistor, so as to ensure the light-emitting current of the light-emitting unit 1412 and the threshold voltage of the driving transistor and the output voltage of the first power source 142
  • the magnitude of the power supply voltage is irrelevant, thereby ensuring the uniformity of the display panel. Please refer to the subsequent analysis process for the detailed working process of the driving transistor.
  • the first switch 1411 to the fifth switch are P-type thin film transistors, and the light emitting unit 1412 is an organic light emitting diode.
  • FIG. 3 is a schematic structural diagram of a pixel region in a specific implementation manner of FIG. 2.
  • the pixel region of this embodiment includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a first storage capacitor C1, a second storage capacitor C2, and an organic light emitting diode OLED.
  • the gate of the second transistor T2 and the gate of the third transistor T3 are coupled to the scan line Scan, the first pole of the second transistor T2 is coupled to the second power source Vref, and the second pole of the second transistor T2 is coupled to the first A second terminal of a storage capacitor C1 and a second terminal of the second storage capacitor C2 are coupled.
  • the first pole of the third transistor T3 is coupled to the data line DL, and the second pole of the third transistor T3 is coupled to the first terminal of the first storage capacitor C1 and the gate of the first transistor T1.
  • the gate of the fifth transistor T5 is coupled to the enable signal line EM, the first pole of the fifth transistor T5 is coupled to the first power supply PL, the second pole of the fifth transistor T5 and the first terminal of the second storage capacitor C2 And the first pole of the first transistor T1 is coupled.
  • the second electrode of the first transistor T1 is coupled to the first terminal of the organic light emitting diode OLED; the second terminal of the organic light emitting diode OLED is grounded.
  • the second pole of the first transistor T1 is also coupled to the first pole of the fourth transistor T4, the second pole of the fourth transistor T4 is coupled to the third power source VI, and the gate of the fourth transistor T4 is coupled to the reset signal line Reset. Pick up.
  • the first pole corresponds to the source of the transistor
  • the second pole corresponds to the drain of the transistor
  • the scan line Scan, the enable signal line EM, and the reset signal line Reset are correspondingly coupled to the scan driving circuit 13, the first power source PL, the second power source Vref, the third power source VI, and
  • the data line DL is correspondingly coupled to the data driving circuit 13.
  • the size of the second power source Vref is designed according to the parameters of the second transistor T2
  • the third power source VI is a negative voltage, for example, -2V
  • the size of the first power source PL is designed according to the parameters of the first transistor T1.
  • the voltages of the second power source Vref, the first power source PL, and the third power source VI are fixed, and the voltage corresponding to the data line DL is variable, which is determined by the control instruction of the timing control circuit 11.
  • the on and off of the corresponding transistor are controlled by the timing levels of the scan line Scan, the enable signal line EM, and the reset signal line Reset, so as to realize the display of the organic light emitting diode OLED.
  • FIG. 4 is a timing diagram of the scan lines Scan, the enable signal line EM, and the reset signal line Reset of the pixel region of FIG. 3.
  • the timing diagram is divided into four phases.
  • the first phase t1 is a reset phase
  • the second phase t2 and the third phase t3 are storage phases
  • the fourth phase t4 is a display phase.
  • the scan line Scan, the reset signal line Reset, and the enable signal line EM output a low level
  • the scan line Scan and the reset signal line Reset output low level, and the enable signal line EM outputs a high level
  • the scan line Scan and the reset signal line Reset and the enable signal line EM output a high level
  • the level signal output from the scan line Scan, the enable signal line EM, and the reset signal line Reset controls the corresponding transistor to be turned on.
  • the potentials at points A, B, and C in the illustration will also change accordingly, so that the first storage capacitor C1 stores the second power source Vref and The voltage difference of the data line DL voltage, the second storage capacitor C2 stores the threshold voltage of the first transistor T1; the first storage capacitor C1 and the second storage capacitor C2 provide a driving voltage to the first transistor T1 during the display stage, so that the organic light emitting The diode OLED emits light.
  • the second transistor T2 In the first phase t1 (reset phase), the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on.
  • the voltage of the data line DL is equal to the voltage of the second power source Vref.
  • the potentials at points A and B are equal to the second power source Vref; the potential at point C is equal to the first power source PL.
  • FIG. 5 is a schematic diagram of an equivalent circuit of the pixel region of FIG. 3 at a second stage t2.
  • the magnitude of the voltage output by the data line DL is equal to the magnitude of the voltage of the second power source Vref.
  • the first pole of the first transistor T1 is in a floating state
  • the potential at point C is equal to the first power source PL
  • the potential at point B is equal to the second power source Vref.
  • the voltage difference of the power source Vref is greater than the threshold voltage V th of the first transistor T1.
  • the second storage capacitor C2 is discharged to turn on the first transistor T1, and the first transistor T1 leaks electricity through the source until points B and C When the potential difference between them is equal to the threshold voltage V th of the first transistor T 1, the first transistor T 1 is turned off.
  • the organic light emitting diode OLED may emit light.
  • the fourth transistor T4 is turned on, and the fourth transistor T4 is turned on.
  • the second electrode is coupled to the negative voltage VI to perform shunting to prevent the organic light emitting diode OLED from emitting light.
  • the second electrode of the fourth transistor T4 may be grounded.
  • the potential difference between point B and point C is equal to the threshold voltage V th of the first transistor T1 is a critical state. In the actual process, there will be a certain range of errors.
  • the first transistor T1 is turned off, the potential at point C is equal to Vref +
  • FIG. 6 is a schematic diagram of an equivalent circuit of the pixel region of FIG. 3 at a third stage t3.
  • the output voltage of the data line DL is changed to the data line voltage Vdata, where the data line voltage Vdata corresponds to the gray-scale voltage of the organic light emitting diode OLED, which is specifically determined according to the brightness of the organic light emitting diode OLED display.
  • the voltage corresponding to the second power source Vref is Vref
  • the potential at point A is equal to the second power source voltage Vref
  • the potential at point C is equal to Vref +
  • the potential at point B is equal to the data line voltage Vdata.
  • the first storage capacitor C1 stores the voltage difference between the potential of point A and the potential of point B, that is, the first storage capacitor C1 stores the voltage difference between the second power source Vref and the data line voltage Vdata.
  • the voltage stored in the first storage capacitor C1 is Vref-Vdata.
  • FIG. 7 is a schematic diagram of an equivalent circuit of the pixel region of FIG. 3 at a fourth stage t4.
  • the fifth transistor T5 is turned on, and the first power source PL outputs the voltage VDD.
  • the potential at point C will change accordingly, and the potentials at points A and B will also occur accordingly.
  • point B corresponds to the gate of the first transistor T1
  • point C corresponds to the source of the first transistor T1.
  • the gate-source voltage of the first transistor T1 is stored by the first storage capacitor C1 and the second storage capacitor C2.
  • V gs V ref -V data +
  • ⁇ is the carrier mobility and Cox is the gate oxide capacitance
  • I is the transistor width-to-length ratio
  • V th is the threshold voltage of the transistor.
  • the threshold voltage V th different between different pixel regions, and the threshold voltage V th of the same pixel region may also drift over time, which will result in differential display brightness, display luminance can lead to uneven .
  • the threshold voltage V th of the transistor is captured in advance and stored in a corresponding storage capacitor, which can effectively eliminate the influence of the threshold voltage V th .
  • V gs V ref -V data +
  • is substituted into Formula One, where V data is a data line voltage output by the data line DL, and V ref is a reference voltage output by the second power source Vref, to obtain
  • K represents the current amplification factor of the transistor.
  • the current for driving the organic light emitting diode OLED to emit light is independent of the threshold voltage V th of the first transistor T1 and the output voltage VDD of the first power supply PL, and is not related to the reference voltage output from the second power supply Vref and the data line DL output.
  • the voltage of the data line is related, so the influence of the non-uniformity of the threshold voltage of the transistor on the display is eliminated.
  • the switching and charging / discharging control of the circuit through multiple transistors and capacitors can make the storage capacitor keep the gate-source voltage between the gate and source of the first transistor T1 constant, so that the current through the first transistor T1 and the The threshold voltage of the transistor T1 is irrelevant, which compensates for the difference in current flowing through the organic light emitting diode caused by the inconsistency or offset of the threshold voltage of the first transistor T1, improves the uniformity of the light emission brightness of the display device, and significantly improves the display effect. .
  • the influence of the line impedance voltage drop of the output voltage VDD of the first power supply PL is also eliminated.
  • the OLED display panel of this embodiment includes a first storage capacitor and a second storage capacitor.
  • the corresponding switches are controlled to be turned on and off through a specific sequence, so that the first storage capacitor and the first storage capacitor Charges are stored in the two storage capacitors, so that the first storage capacitor stores a voltage difference between the voltage of the second power source and the data line, and the second storage capacitor stores a threshold voltage of the first switch.
  • the first storage capacitor and the second storage capacitor provide a driving voltage for the first switch to compensate the threshold voltage of the first switch and the power supply voltage applied to the first switch, thereby reducing the threshold voltage of the switch and the line travel.
  • the effect of the line impedance voltage drop improves the situation of uneven brightness and uniformity.
  • the present invention also provides an OLED display device.
  • the OLED display device includes an OLED display panel according to any one of the above embodiments.
  • the OLED display device is a television or a smart phone, and may also be an electronic newspaper and the like.
  • FIG. 8 is a schematic flowchart of an embodiment of a driving method of an OLED display device according to the present invention.
  • the OLED display device includes the OLED display panel according to any one of the above embodiments.
  • the OLED display panel includes a plurality of pixel regions, and each pixel region includes a first storage capacitor, a second storage capacitor, and a light-emitting circuit;
  • the light-emitting circuit includes a first switch and a light-emitting unit; a control end of the first switch and a first The first end of the storage capacitor is coupled, the input end of the first switch is coupled to the first end of the second storage capacitor and the first power source, and the output end of the first switch is coupled to the light-emitting unit;
  • Terminal and the second terminal of the first storage capacitor are coupled to the second power source through the second switch, and the control terminal of the first switch is also coupled to the data line through the third switch;
  • the control terminal of the second switch and the control of the third switch The terminals are respectively coupled to the scanning lines.
  • the OLED display panel further includes a fifth switch.
  • the control end of the fifth switch is coupled to the enable signal line of the OLED display panel.
  • the input end of the fifth switch is coupled to the first power source.
  • An output terminal of the five switches is coupled to an input terminal of the first switch.
  • the light-emitting circuit further includes a fourth switch, wherein the fourth switch is coupled to the output terminal of the first switch, and is configured to shunt the light-emitting circuit during the storage stage to prevent the light-emitting unit from emitting light.
  • the input end of the fourth switch is coupled to the output end of the first switch, the output end of the fourth switch is grounded or external negative voltage is applied, and the control end of the fourth switch is coupled to the reset signal line of the OLED display panel.
  • the voltage difference between the voltage of the second power source and the data line is stored by the first storage capacitor, and the threshold voltage of the first switch is stored by the second storage capacitor.
  • the OLED display device sets a timing control signal in advance to control the on / off of the corresponding switch, which is mainly divided into four stages to realize the display function of the OLED display device.
  • the OLED display device turns on the first switch, the second switch, and the third switch, couples the first pole of the first switch to the first power source, and adjusts the voltage output from the data line to the first After the two power sources have the same voltage, the voltage across the first storage capacitor and the second storage capacitor are preset.
  • the OLED display device first turns on the first switch, the second switch, and the third switch, and disconnects the first power source. After the voltage of the data line is adjusted to the same voltage as the second power source, it is collected and passed.
  • the second storage capacitor stores a threshold voltage of the first switch.
  • the OLED display device turns off the first switch and changes the output voltage of the data line to the data line voltage, then collects and stores the voltage difference between the second power source and the data line voltage through the first storage capacitor.
  • the first switch is turned on by the voltage difference between the voltage of the second power source and the data line stored by the first storage capacitor and the threshold voltage of the first switch stored by the second storage capacitor.
  • the fourth phase that is, the display phase
  • the OLED display device turns on the first switch, turns off the second switch and the third switch, and passes the first stored in the first storage capacitor.
  • the voltage difference between the two power supplies and the data line voltage and the threshold voltage of the first switch stored by the second storage capacitor drive the first switch to turn on.
  • the structure and driving method of the OLED display device of this embodiment correspond to the structure and working principle of the OLED display panel in the above embodiment.
  • the driving method please refer to FIGS. 1 to 7 and related text. The description is not repeated here.
  • the OLED display panel of this embodiment includes a first storage capacitor and a second storage capacitor.
  • the corresponding switches are controlled to be turned on and off through a specific sequence, so that the first storage capacitor and the first storage capacitor Charges are stored in the two storage capacitors, so that the first storage capacitor stores a voltage difference between the voltage of the second power source and the data line, and the second storage capacitor stores a threshold voltage of the first switch.
  • the first storage capacitor and the second storage capacitor provide a driving voltage for the first switch to compensate the threshold voltage of the first switch and the power supply voltage applied to the first switch, thereby reducing the threshold voltage of the switch and the line travel.
  • the effect of the line impedance voltage drop improves the situation of uneven brightness and uniformity.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, which may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objective of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each of the units may exist separately physically, or two or more units may be integrated into one unit.
  • the above integrated unit may be implemented in the form of hardware or in the form of software functional unit.
  • the integrated unit When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially a part that contributes to the existing technology or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium. It includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to perform all or part of the steps of the methods in the embodiments of the present application.
  • the foregoing storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disks or optical disks and other media that can store program codes .

Abstract

本发明公开了一种OLED显示面板、OLED显示装置及其驱动方法，该显示面板包括第一存储电容、第二存储电容以及发光电路；发光电路包括第一开关以及发光单元；第一开关的控制端与第一存储电容的第一端耦接，第一开关的输入端与第二存储电容的第一端以及第一电源耦接，第一开关的输出端与发光单元耦接；第二存储电容的第二端以及第一存储电容的第二端通过第二开关与第二电源耦接，第一开关的控制端还通过第三开关与数据线耦接；第二开关的控制端以及第三开关的控制端与扫描线耦接。该显示面板降低开关的阈值电压以及阻抗压降的影响，提高均一性。

Description

OLED显示面板、OLED显示装置及其驱动方法 【技术领域】
本发明涉及显示技术领域，特别是涉及一种OLED显示面板、OLED显示装置及其驱动方法。
【背景技术】
有机发光二极管(Organic Light Emitting Diode，OLED)因其所具有的自发光、快速响应、宽视角和可制作在柔性衬底上等特点而越来越多地被应用于高性能显示领域当中。
在现有的OLED面板中，TFT(Thin Film Transistor，薄膜晶体管)开关电路多采用低温多晶硅薄膜晶体管(LTPS TFT)或氧化物薄膜晶体管(Oxide TFT)。由于晶化工艺和制作水平的限制，导致在大面积玻璃基板上制作的TFT开关电路常常在诸如阈值电压等电学参数上出现非均匀性，从而使得各个TFT的阈值电压偏移不一致，这将导致有机发光二极管的电流差异和亮度差异，并被人眼所感知。另外，在长时间加压和高温下也会导致TFT的阈值电压出现漂移，导致面板各部分TFT的阈值漂移量不同，从而造成显示亮度差异。
另一方面，由于线路走线阻抗压降的影响，施加到每个晶体管的电源电压大小也会存在差异，也会造成亮度不均，影响画质。
【发明内容】
本发明主要解决的技术问题是提供一种OLED显示面板、OLED显示装置及其驱动方法，降低了开关的阈值电压以及线路走线阻抗压降的影响，改善亮度不均的情况，提高均一性。
为解决上述技术问题，本发明采用的第一个技术方案是：提供一种OLED显示装置，所述OLED显示装置包括OLED显示面板，所述OLED显示面板包括多个像素区域，每个所述像素区域包括第一存储电容、第二存储电容以及发光电路；所述发光电路包括第一开关以及发光单元； 所述第一开关的控制端与所述第一存储电容的第一端耦接，所述第一开关的输入端与所述第二存储电容的第一端以及第一电源耦接，所述第一开关的输出端与所述发光单元耦接；所述第二存储电容的第二端以及所述第一存储电容的第二端通过第二开关与第二电源耦接，所述第一开关的控制端还通过第三开关与数据线耦接；其中，所述第二开关的控制端以及所述第三开关的控制端分别与扫描线耦接；其中，所述第二存储电容用于在所述第一开关、所述第二开关以及所述第三开关导通、所述第一电源断开，且所述数据线输出的电压与所述第二电源的电压相等时，存储所述第一开关的阈值电压；所述第一存储电容用于在所述第二开关以及第三开关导通，所述第一电源断开、所述第一开关关闭，且数据线的输出电压变更为所述数据线电压时，存储所述第二电源与所述数据线电压的压差；所述第一存储电容与所述第二存储电容还用于在显示阶段时为所述第一开关提供驱动电压；所述第一开关是驱动晶体管。
为解决上述技术问题，本发明采用的第二个技术方案是：提供一种OLED显示面板，所述OLED显示面板包括多个像素区域，每个所述像素区域包括第一存储电容、第二存储电容以及发光电路；所述发光电路包括第一开关以及发光单元；所述第一开关的控制端与所述第一存储电容的第一端耦接，所述第一开关的输入端与所述第二存储电容的第一端以及第一电源耦接，所述第一开关的输出端与所述发光单元耦接；所述第二存储电容的第二端以及所述第一存储电容的第二端通过第二开关与第二电源耦接，所述第一开关的控制端还通过第三开关与数据线耦接；所述第二开关的控制端以及所述第三开关的控制端分别与扫描线耦接。
为解决上述技术问题，本发明采用的第三个技术方案是：提供一种OLED显示装置的驱动方法，所述OLED显示装置包括OLED显示面板，所述OLED显示面板包括多个像素区域，每个所述像素区域包括第一存储电容、第二存储电容以及发光电路；所述发光电路包括第一开关以及发光单元；所述第一开关的控制端与所述第一存储电容的第一端耦接，所述第一开关的输入端与所述第二存储电容的第一端以及第一电源耦 接，所述第一开关的输出端与所述发光单元耦接；所述第二存储电容的第二端以及所述第一存储电容的第二端通过第二开关与第二电源耦接，所述第一开关的控制端还通过第三开关与数据线耦接；所述第二开关的控制端以及所述第三开关的控制端分别与扫描线耦接；所述驱动方法包括：在存储阶段时，通过所述第一存储电容存储所述第二电源与所述数据线电压的压差，并通过所述第二存储电容存储所述第一开关的阈值电压；在显示阶段，通过所述第一存储电容所存储的所述第二电源与所述数据线电压的压差以及所述第二存储电容所存储的所述第一开关的阈值电压驱动所述第一开关导通。
本发明的有益效果是：区别于现有技术，本发明的OLED显示面板包括第一存储电容以及第二存储电容，在存储阶段，通过特定的时序控制对应开关的导通与断开，以在第一存储电容和第二存储电容中存储电荷，使得第一存储电容存储第二电源与数据线电压的压差，第二存储电容存储第一开关的阈值电压。在显示阶段，第一存储电容与第二存储电容为第一开关提供驱动电压，以对第一开关的阈值电压以及施加在第一开关的电源电压进行补偿，从而降低开关的阈值电压以及线路走线阻抗压降的影响，改善亮度不均的情况，提高均一性。
【附图说明】
图1是本发明OLED显示面板一实施方式的结构示意图；
图2是图1的OLED显示面板的像素区域一实施方式的结构示意图；
图3是图2的像素区域一具体实施方式的结构示意图；
图4是图3的像素区域的扫描线Scan、使能信号线EM及复位信号线Reset的时序示意图；
图5是图3的像素区域在第二阶段t2的等效电路示意图；
图6是图3的像素区域在第三阶段t3的等效电路示意图；
图7是图3的像素区域在第四阶段t4的等效电路示意图；
图8是本发明OLED显示装置的驱动方法一实施方式的流程示意图。
【具体实施方式】
本发明提供一种OLED显示面板、OLED显示装置及其驱动方法，为使本发明的目的、技术方案和技术效果更加明确、清楚，以下对本发明进一步详细说明，应当理解此处所描述的具体实施条例仅用于解释本发明，并不用于限定本发明。
本实施方式提供一种OLED显示面板，该OLED显示面板包括多个像素区域，每个像素区域包括第一存储电容、第二存储电容以及发光电路；发光电路包括第一开关以及发光单元；第一开关的控制端与第一存储电容的第一端耦接，第一开关的输入端与第二存储电容的第一端以及第一电源耦接，第一开关的输出端与发光单元耦接；第二存储电容的第二端以及第一存储电容的第二端通过第二开关与第二电源耦接，第一开关的控制端还通过第三开关与数据线耦接；第二开关的控制端以及第三开关的控制端分别与扫描线耦接。其中，在存储阶段时，第一存储电容用于存储第二电源与数据线电压的压差，第二存储电容用于存储第一开关的阈值电压；第一存储电容与第二存储电容还用于在显示阶段时为第一开关提供驱动电压。
为了清楚说明上述实施方式的OLED显示面板，请参阅图1和图2，图1是本发明OLED显示面板一实施方式的结构示意图，图2是图1的OLED显示面板的像素区域一实施方式的结构示意图。
请参阅图1，本实施方式的OLED显示面板10包括时序控制电路11、数据驱动电路12以及扫描驱动电路13，其中，时序控制电路11分别与数据驱动电路12和扫描驱动电路13耦接。
OLED显示面板10还包括多条相互平行的扫描线，以及多条与扫描线相互垂直的数据线，形成了多个像素区域14。其中，扫描线与数据线相互垂直只是其中一种布线方式，可以理解，在其他实施方式中，扫描线与数据线也可以不相互垂直。
其中，时序控制电路11用于生成时序控制指令，并将对应的时序控制指令输出给数据驱动电路12和扫描驱动电路13。扫描驱动电路13 控制对应扫描线输出时序电平信号；数据驱动电路12控制对应的数据线输出电压信号。其中，扫描线包括扫描线Scan、使能信号线EM及复位信号线Reset。数据线包括第一电源PL、第二电源Vref、第三电源VI及数据线DL。
在本实施方式中，扫描线与数据线分别与多个像素区域14耦接，以提供对应的电源信号以及控制信号，驱动像素区域14的发光单元(图中未示出)显示，从而实现显示面板10的显示功能。
下面结合图2说明本实施方式的像素区域14的结构。
像素区域14包括第一存储电容C1、第二存储电容C2以及发光电路141。其中，发光电路141包括第一开关1411以及发光单元1412。第一开关1411的控制端与第一存储电容C1的第一端耦接，第一开关1411的输入端与第二存储电容C2的第一端以及第一电源142耦接。在其中的一个实施方式中，像素区域14还包括第五开关(图中未示出)，第五开关的控制端与OLED显示面板的使能信号线耦接(图中未示出)，第五开关的的输入端与第一电源142耦接，第五开关的输出端与第一开关1411的输入端耦接。当第五开关导通时，第一电源142为第一开关1411提供电源。
具体地，第一开关1411的输出端与发光单元1412耦接，其中，发光单元1412为有机发光二极管。第二存储电容C2的第二端以及第一存储电容C1的第二端通过第二开关143与第二电源144耦接，第一开关1411的控制端还通过第三开关145与数据线146耦接。同时，第二开关143的控制端以及第三开关145的控制端分别与扫描线147耦接。其中，扫描线147依据时序控制指令输出相应的电压，以控制第二开关143以及及第三开关145的导通与关闭，数据线146依据时序控制指令输出电压且数据线146输出的电压值随着显示面板所处的阶段而改变，在第三开关145导通时，数据线146对应的电压可以施加到第一开关1411的控制端。关于像素区域14的工作原理请详见后续说明。
结合图1和图2，在本实施方式中，第一电源142、第二电源144以及数据线146均与显示面板10的数据驱动电路12耦接，可以理解为， 第一电源142和第二电源144对应的电压信号是数据驱动电路12所产生或提供的，数据线146所输出的电压也是由数据驱动电路12所产生或提供的。
在本实施方式中，第一存储电容C1用于在存储阶段存储第二电源144与数据线146电压的压差，第二存储电容C2用于在存储阶段存储第一开关1411的阈值电压；第一存储电容C1与第二存储电容C2还用于在显示阶段时为第一开关1411提供驱动电压，以对第一开关1411的阈值电压以及施加在第一开关1411的电源电压进行补偿，从而降低开关的阈值电压以及线路走线阻抗压降的影响，改善亮度不均的情况，提高均一性。
在另一个实施方式中，由于在复位阶段以及存储阶段，第一开关1411会被导通，为了防止发光单元1412发光，发光电路141还包括第四开关1413，其中，第四开关1413与第一开关1411的输出端耦接，用于在复位阶段以及存储阶段对发光电路141进行分流，以防止发光单元1412发光。具体地，第四开关1413的输入端与第一开关1411的输出端耦接，第四开关1413的输出端接地或外接负压，第四开关1413的控制端与OLED显示面板的复位信号线(图中未示出)耦接。
其中，第一开关1411、第二开关143、第三开关145、第四开关1413以及第五开关为薄膜晶体管，可以是P型薄膜晶体管也可以为N型薄膜晶体管，可根据实际情况设计，满足晶体管的类型与时序控制信号对应即可，在此不做具体限定。可以理解，第一开关1411、第二开关143、第三开关145、第四开关1413以及第五开关也可以为其他类型的开关，例如，三极管。
在本实施方式中，第一开关1411是驱动晶体管，该驱动晶体管一方面用于预设第一存储电容C1和第二存储电容C2的存储电压，另一方面用于驱动发光单元1412发光。具体而言，在存储阶段，通过控制驱动晶体管的通断预设第一存储电容C1和第二存储电容C2的存储电压，其中，第一存储电容C1用于存储第二电源Vref与数据线电压Vdata的压差，第二存储电容C2用于存储驱动晶体管的阈值电压|V th|。在显示阶 段，第一存储电容C1和第二存储电容C2为驱动晶体管提供栅源电压以使驱动晶体管导通，以保证发光单元1412的发光电流与驱动晶体管的阈值电压和第一电源142输出的电源电压的大小无关，进而保证显示面板的均一性。驱动晶体管的具体工作过程请详见后续分析过程。
为了清楚说明本实施方式的像素区域14的结构以及工作原理，在此，以第一开关1411～第五开关为P型薄膜晶体管、发光单元1412为有机发光二极管为例说明。
下面参阅图3，图3是图2的像素区域一具体实施方式的结构示意图。
本实施方式的像素区域包括：第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第一存储电容C1、第二存储电容C2及有机发光二极管OLED。
其中，第二晶体管T2的栅极和第三晶体管T3的栅极与扫描线Scan耦接，第二晶体管T2的第一极与第二电源Vref耦接，第二晶体管T2的第二极与第一存储电容C1的第二端及第二存储电容C2的第二端耦接。
第三晶体管T3的第一极与数据线DL耦接，第三晶体管T3的第二极与第一存储电容C1的第一端及第一晶体管T1的栅极耦接。
第五晶体管T5的栅极与使能信号线EM耦接，第五晶体管T5的第一极与第一电源PL耦接，第五晶体管T5的第二极与第二存储电容C2的第一端及第一晶体管T1的第一极耦接。第一晶体管T1的第二极与有机发光二极管OLED的第一端耦接；有机发光二极管OLED的的第二端接地。
第一晶体管T1的第二极还与第四晶体管T4的第一极耦接，第四晶体管T4的第二极与第三电源VI耦接，第四晶体管T4的栅极与复位信号线Reset耦接。
在其中的一个实施方式中，第一极为对应晶体管的源极，第二极为对应晶体管的漏极。
结合图1，在此，需要说明的是，扫描线Scan、使能信号线EM及 复位信号线Reset对应与扫描驱动电路13耦接，第一电源PL、第二电源Vref、第三电源VI及数据线DL对应与数据驱动电路13耦接。
其中，第二电源Vref的大小根据第二晶体管T2的参数设计，第三电源VI为负压，例如为-2V，第一电源PL的大小根据第一晶体管T1的参数设计。第二电源Vref、第一电源PL以及第三电源VI的电压大小为固定的，而数据线DL对应的电压是可变的，由时序控制电路11的控制指令而决定。
其中，通过扫描线Scan、使能信号线EM及复位信号线Reset的时序电平控制对应晶体管的导通与断开，以实现有机发光二极管OLED的显示。
下面结图3以及图4说明像素区域的工作原理，其中，图4是图3的像素区域的扫描线Scan、使能信号线EM及复位信号线Reset的时序示意图。
如图4所示，该时序图分为四个阶段。其中，第一阶段t1为复位阶段，第二阶段t2和第三阶段t3为存储阶段，第四阶段t4为显示阶段。
其中，在第一阶段t1，扫描线Scan、复位信号线Reset、使能信号线EM输出低电平；在第二阶段t2，扫描线Scan和复位信号线Reset输出低电平，使能信号线EM输出高电平；在第三阶段t3，扫描线Scan输出低电平，复位信号线Reset和使能信号线EM输出高电平；在第四阶段t4，扫描线Scan和复位信号线Reset输出高电平，使能信号线EM输出低电平。通过每个阶段扫描线Scan、使能信号线EM及复位信号线Reset输出的电平信号控制对应晶体管的导通。
进一步，参阅图3，当像素区域所处的阶段不同时，图示中的A点、B点以及C点的电位也会相应的发生改变，以使第一存储电容C1存储第二电源Vref与数据线DL电压的压差，第二存储电容C2存储第一晶体管T1的阈值电压；第一存储电容C1与第二存储电容C2在显示阶段时为第一晶体管T1提供驱动电压，以使有机发光二极管OLED发光。
下面分阶段说明像素区域的工作原理。
在第一阶段t1(复位阶段)，第二晶体管T2、第三晶体管T3、第四 晶体管T4以及第五晶体管T5导通。
在第一阶段t1，数据线DL输出的电压大小与第二电源Vref的电压大小相等。在第一阶段t1，A点以及B点的电位等于第二电源Vref；C点的电位等于第一电源PL。
在第二阶段t2(存储阶段)，第二晶体管T2、第三晶体管T3以及第四晶体管T4导通，第五晶体管T5断开。参阅图5，图5是图3的像素区域在第二阶段t2的等效电路示意图。
在第二阶段t2，数据线DL输出的电压大小与第二电源Vref的电压大小相等。在第二阶段t2的起始时刻，第一晶体管T1的第一极处于floating状态，C点的电位等于第一电源PL，B点的电位等于第二电源Vref，由于第一电源PL与第二电源Vref的压差大于第一晶体管T1的阈值电压V th，此时，第二存储电容C2放电，以使第一晶体管T1导通，第一晶体管T1通过源极漏电，直至B点与C点之间的电位差等于第一晶体管T1的阈值电压V th时，第一晶体管T1断开。在第一晶体管T1导通的阶段，有机发光二极管OLED可能会发光，为了防止有机发光二极管OLED发光偷亮，在第二阶段t2，第四晶体管T4是导通的，且第四晶体管T4的第二极与负压VI耦接，以进行分流，防止有机发光二极管OLED发光偷亮。在另一个实施方式中，第四晶体管T4的第二极也可以接地。
在此，需要说明的是，B点与C点之间的电位差等于第一晶体管T1的阈值电压V th是临界状态，在实际过程中，会存在一定范围的误差。当第一晶体管T1断开后，C点的电位等于Vref+|V th|，A点的电位等于第二电源电压Vref，则第二存储电容C2存储C点电位与A点电位之间的压差，即，第二存储电容C2存储第一晶体管T1的阈值电压|V th|。
在第三阶段t3(存储阶段)，第二晶体管T2、第三晶体管T3导通，第四晶体管T4以及第五晶体管T5断开。参阅图6，图6是图3的像素区域在第三阶段t3的等效电路示意图。
在第三阶段t3，数据线DL的输出电压变更为数据线电压Vdata，其中，数据线电压Vdata对应的是有机发光二极管OLED的灰阶电压， 具体根据有机发光二极管OLED显示的亮度所决定。
此时，第二电源Vref对应的电压为Vref，则A点的电位等于第二电源电压Vref，C点的电位等于Vref+|V th|，B点的电位等于数据线电压Vdata，此时，第一晶体管T1处于断开状态，则，第一存储电容C1存储A点电位与B点电位之间的压差，即，第一存储电容C1存储第二电源Vref与数据线电压Vdata的压差，第一存储电容C1存储的电压为Vref-Vdata。
在第一存储电容C1以及第二存储电容C2完成电压存储后，进入第四阶段t4，在第四阶段t4，第二晶体管T2、第三晶体管T3以及第四晶体管T4关闭，第五晶体管T5导通。参阅图7，图7是图3的像素区域在第四阶段t4的等效电路示意图。
在第四阶段t4(显示阶段)，第五晶体管T5导通，第一电源PL输出电压VDD，此时，C点的电位会随之发生变化，A点与B点的电位也会相应的发生改变，B点对应连接第一晶体管T1的栅极，C点对应连接第一晶体管T1的源极，则第一晶体管T1的栅源电压即为第一存储电容C1和第二存储电容C2所存储的电压，即V gs＝V ref-V data+|V th|。
根据如下公式一有机发光二极管OLED的电流计算公式，计算通过有机发光二极管OLED的电流I OLED：
Figure PCTCN2018107479-appb-000001
其中，μ为载流子迁移率，C ox为栅氧化层电容，
Figure PCTCN2018107479-appb-000002
为晶体管宽长比，V th为晶体管的阈值电压。现有技术中，不同像素区域之间的阈值电压V th不尽相同，且同一像素区域中的阈值电压V th还有可能随时间发生漂移，这将造成显示亮度差异，会导致显示亮度不均匀。
而本发明预先抓取晶体管的阈值电压V th，并将其存储置对应的存储电容中，可以有效消除阈值电压V th的影响。具体地，将V gs＝V ref-V data+|V th|代入公式一中，其中，V data为数据线DL输出的数据线电压，V ref为第二 电源Vref输出的参考电压，得到
Figure PCTCN2018107479-appb-000003
为了更直观地表示有机发光二极管OLED的电流I OLED，令
Figure PCTCN2018107479-appb-000004
则
Figure PCTCN2018107479-appb-000005
其中，K代表晶体管的电流放大倍数。
由上推导可知，用于驱动有机发光二极管OLED发光的电流与第一晶体管T1的阈值电压V th以及第一电源PL输出电压VDD无关，而与第二电源Vref输出的参考电压以及数据线DL输出的数据线电压有关，因此消除了晶体管阈值电压非均匀性对显示的影响。
通过多个晶体管和电容对电路进行开关和充放电控制，可以使得存储电容保持第一晶体管T1栅极和源极之间的栅源电压不变，从而使得通过第一晶体管T1的电流与该第一晶体管T1的阈值电压无关，补偿了由于第一晶体管T1的阈值电压的不一致或偏移所造成的流过有机发光二极管的电流差异，提高了显示装置发光亮度的均匀性，显著提升了显示效果。同时，也消除了第一电源PL输出电压VDD的线路阻抗压降的影响。
区别于现有技术，本实施方式的OLED显示面板包括第一存储电容以及第二存储电容，在存储阶段，通过特定的时序控制对应开关的导通与断开，以在第一存储电容和第二存储电容中存储电荷，使得第一存储电容存储第二电源与数据线电压的压差，第二存储电容存储第一开关的阈值电压。在显示阶段，第一存储电容与第二存储电容为第一开关提供驱动电压，以对第一开关的阈值电压以及施加在第一开关的电源电压进行补偿，从而降低开关的阈值电压以及线路走线阻抗压降的影响，改善亮度不均的情况，提高均一性。
本发明还提供了一种OLED显示装置，该OLED显示装置包括上述任一实施方式的OLED显示面板。
其中，OLED显示装置为电视机或智能手机，也可以为电子报纸等等。
关于OLED显示面板的结构以及工作原理请参阅图1～图7以及相关 的文字描述，在此不再赘述。
参阅图8，图8是本发明OLED显示装置的驱动方法一实施方式的流程示意图。
其中，该OLED显示装置包括上述任一实施方式的OLED显示面板。具体地，该OLED显示面板包括多个像素区域，每个像素区域包括第一存储电容、第二存储电容以及发光电路；发光电路包括第一开关以及发光单元；第一开关的控制端与第一存储电容的第一端耦接，第一开关的输入端与第二存储电容的第一端以及第一电源耦接，第一开关的输出端与发光单元耦接；第二存储电容的第二端以及第一存储电容的第二端通过第二开关与第二电源耦接，第一开关的控制端还通过第三开关与数据线耦接；第二开关的控制端以及第三开关的控制端分别与扫描线耦接。
在其中的一个实施方式中，OLED显示面板还包括第五开关，第五开关的控制端与OLED显示面板的使能信号线耦接，第五开关的的输入端与第一电源耦接，第五开关的输出端与第一开关的输入端耦接。当第五开关导通时，第一电源为第一开关提供电源。
在优选的实施方式中，发光电路还包括第四开关，其中，第四开关与第一开关的输出端耦接，用于在存储阶段对发光电路进行分流，以防止发光单元发光。具体地，第四开关的输入端与第一开关的输出端耦接，第四开关的输出端接地或外接负压，第四开关的控制端与OLED显示面板的复位信号线耦接。
关于OLED显示面板的具体结构请参阅图1～图7以及相关的文字描述，在此不再赘述。
本实施方式的驱动方法包括：
801：在存储阶段时，通过第一存储电容存储第二电源与数据线电压的压差，并通过第二存储电容存储第一开关的阈值电压。
在本实施方式中，OLED显示装置会预先设置时序控制信号，以控制对应的开关的通断，主要分为四个阶段实现OLED显示装置的显示功能。
首先，在第一阶段，OLED显示装置导通第一开关、第二开关以及 第三开关，将第一开关的第一极与第一电源耦接，并将数据线输出的电压调整为与第二电源相同电压后，预置第一存储电容以及第二存储电容两端的电压。
然后，进入第二阶段，OLED显示装置先导通第一开关、第二开关以及第三开关，并断开第一电源，将数据线输出的电压调整为与第二电源相同电压后，采集并通过第二存储电容存储第一开关的阈值电压。
进一步地，进入第三阶段，OLED显示装置断开第一开关，并将数据线的输出电压变更为数据线电压后，采集并通过第一存储电容存储第二电源与数据线电压的压差。
802：在显示阶段，通过第一存储电容所存储的第二电源与数据线电压的压差以及第二存储电容所存储的第一开关的阈值电压驱动第一开关导通。
在本实施方式中，在完成了电压的存储之后，进入第四阶段，即显示阶段，OLED显示装置导通第一开关，关闭第二开关以及第三开关，通过第一存储电容所存储的第二电源与数据线电压的压差以及第二存储电容所存储的第一开关的阈值电压驱动第一开关导通。
本实施方式的OLED显示装置的结构以及其驱动方法与上述实施方式中的OLED显示面板的结构以及工作原理是一一对应的，关于驱动方法的详细过程请参阅图1～图7以及相关的文字描述，在此不再赘述。
区别于现有技术，本实施方式的OLED显示面板包括第一存储电容以及第二存储电容，在存储阶段，通过特定的时序控制对应开关的导通与断开，以在第一存储电容和第二存储电容中存储电荷，使得第一存储电容存储第二电源与数据线电压的压差，第二存储电容存储第一开关的阈值电压。在显示阶段，第一存储电容与第二存储电容为第一开关提供驱动电压，以对第一开关的阈值电压以及施加在第一开关的电源电压进行补偿，从而降低开关的阈值电压以及线路走线阻抗压降的影响，改善亮度不均的情况，提高均一性。
在本申请所提供的几个实施例中，应该理解到，所揭露的方法和装置，可以通过其它的方式实现。以上所描述的装置实施方式仅仅是示意 性的，例如，模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施方式方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。
基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(processor)执行本申请各个实施方式方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利保护范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

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  1. 一种OLED显示装置，其中，所述OLED显示装置包括OLED显示面板，所述OLED显示面板包括多个像素区域，每个所述像素区域包括第一存储电容、第二存储电容以及发光电路；所述发光电路包括第一开关以及发光单元；所述第一开关的控制端与所述第一存储电容的第一端耦接，所述第一开关的输入端与所述第二存储电容的第一端以及第一电源耦接，所述第一开关的输出端与所述发光单元耦接；所述第二存储电容的第二端以及所述第一存储电容的第二端通过第二开关与第二电源耦接，所述第一开关的控制端还通过第三开关与数据线耦接；其中，所述第二开关的控制端以及所述第三开关的控制端分别与扫描线耦接；其中，所述第二存储电容用于在所述第一开关、所述第二开关以及所述第三开关导通、所述第一电源断开，且所述数据线输出的电压与所述第二电源的电压相等时，存储所述第一开关的阈值电压；所述第一存储电容用于在所述第二开关以及第三开关导通，所述第一电源断开、所述第一开关关闭，且数据线的输出电压变更为所述数据线电压时，存储所述第二电源与所述数据线电压的压差；所述第一存储电容与所述第二存储电容还用于在显示阶段时为所述第一开关提供驱动电压；所述第一开关是驱动晶体管。
  2. 根据权利要求1所述的OLED显示装置，其中，所述发光电路还包括第四开关，所述第四开关与所述第一开关的输出端耦接，用于在存储阶段对所述发光电路进行分流。
  3. 根据权利要求2所述的OLED显示装置，其中，所述第四开关的输入端与所述第一开关的输出端耦接，所述第四开关的输出端接地或外接负压；所述第四开关的控制端与所述OLED显示面板的复位信号线耦接。
  4. 根据权利要求3所述的OLED显示装置，其中，还包括设置第五开关，所述第五开关的控制端与所述OLED显示面板的使能信号线耦接，所述第五开关的输入端与所述第一电源耦接，所述第五开关的输出端与所述第一开关的输入端耦接。
  5. 根据权利要求3所述的OLED显示装置，其中，所述第一开关、所述第二开关、所述第三开关以及所述第四开关为P型薄膜晶体管。
  6. 一种OLED显示面板，其中，所述OLED显示面板包括多个像素区域，每个所述像素区域包括第一存储电容、第二存储电容以及发光电路；所述发光 电路包括第一开关以及发光单元；所述第一开关的控制端与所述第一存储电容的第一端耦接，所述第一开关的输入端与所述第二存储电容的第一端以及第一电源耦接，所述第一开关的输出端与所述发光单元耦接；所述第二存储电容的第二端以及所述第一存储电容的第二端通过第二开关与第二电源耦接，所述第一开关的控制端还通过第三开关与数据线耦接；所述第二开关的控制端以及所述第三开关的控制端分别与扫描线耦接。
  7. 根据权利要求6所述的OLED显示面板，其中，所述发光电路还包括第四开关，所述第四开关与所述第一开关的输出端耦接，用于在存储阶段对所述发光电路进行分流。
  8. 根据权利要求7所述的OLED显示面板，其中，所述第四开关的输入端与所述第一开关的输出端耦接，所述第四开关的输出端接地或外接负压；所述第四开关的控制端与所述OLED显示面板的复位信号线耦接。
  9. 根据权利要求6所述的OLED显示面板，其中，所述第二存储电容用于在所述第一开关、所述第二开关以及所述第三开关导通、所述第一电源断开，且所述数据线输出的电压与所述第二电源的电压相等时，存储所述第一开关的阈值电压；
    所述第一存储电容用于在所述第二开关以及第三开关导通，所述第一电源断开、所述第一开关关闭，且数据线的输出电压变更为所述数据线电压时，存储所述第二电源与所述数据线电压的压差；
    所述第一存储电容与所述第二存储电容还用于在显示阶段时为所述第一开关提供驱动电压。
  10. 根据权利要求7所述的OLED显示面板，其中，所述第二存储电容用于在所述第一开关、所述第二开关以及所述第三开关导通、所述第一电源断开，且所述数据线输出的电压与所述第二电源的电压相等时，存储所述第一开关的阈值电压；
    所述第一存储电容用于在所述第二开关以及第三开关导通，所述第一电源断开、所述第一开关关闭，且数据线的输出电压变更为所述数据线电压时，存储所述第二电源与所述数据线电压的压差；
    所述第一存储电容与所述第二存储电容还用于在显示阶段时为所述第一开关提供驱动电压。
  11. 根据权利要求8所述的OLED显示面板，其中，所述第二存储电容用于 在所述第一开关、所述第二开关以及所述第三开关导通、所述第一电源断开，且所述数据线输出的电压与所述第二电源的电压相等时，存储所述第一开关的阈值电压；
    所述第一存储电容用于在所述第二开关以及第三开关导通，所述第一电源断开、所述第一开关关闭，且数据线的输出电压变更为所述数据线电压时，存储所述第二电源与所述数据线电压的压差；
    所述第一存储电容与所述第二存储电容还用于在显示阶段时为所述第一开关提供驱动电压。
  12. 根据权利要求7所述的OLED显示面板，其中，还包括设置第五开关，所述第五开关的控制端与所述OLED显示面板的使能信号线耦接，所述第五开关的输入端与所述第一电源耦接，所述第五开关的输出端与所述第一开关的输入端耦接。
  13. 根据权利要求8所述的OLED显示面板，其中，还包括设置第五开关，所述第五开关的控制端与所述OLED显示面板的使能信号线耦接，所述第五开关的输入端与所述第一电源耦接，所述第五开关的输出端与所述第一开关的输入端耦接。
  14. 根据权利要求8所述的OLED显示面板，其中，所述第一开关、所述第二开关、所述第三开关以及所述第四开关为P型薄膜晶体管。
  15. 根据权利要求7所述的OLED显示面板，其中，所述第一开关是驱动晶体管。
  16. 根据权利要求8所述的OLED显示面板，其中，所述第一开关是驱动晶体管。
  17. 一种OLED显示装置的驱动方法，其中，所述OLED显示装置包括OLED显示面板，所述OLED显示面板包括多个像素区域，每个所述像素区域包括第一存储电容、第二存储电容以及发光电路；所述发光电路包括第一开关以及发光单元；所述第一开关的控制端与所述第一存储电容的第一端耦接，所述第一开关的输入端与所述第二存储电容的第一端以及第一电源耦接，所述第一开关的输出端与所述发光单元耦接；所述第二存储电容的第二端以及所述第一存储电容的第二端通过第二开关与第二电源耦接，所述第一开关的控制端还通过第三开关与数据线耦接；所述第二开关的控制端以及所述第三开关的控制端分别与扫描线耦接；所述驱动方法包括：
    在存储阶段时，通过所述第一存储电容存储所述第二电源与所述数据线电压的压差，并通过所述第二存储电容存储所述第一开关的阈值电压；
    在显示阶段，通过所述第一存储电容所存储的所述第二电源与所述数据线电压的压差以及所述第二存储电容所存储的所述第一开关的阈值电压驱动所述第一开关导通。
  18. 根据权利要求17所述的驱动方法，其中，所述在存储阶段时，通过所述第一存储电容存储所述第二电源与所述数据线电压的压差，并通过所述第二存储电容存储所述第一开关的阈值电压的步骤包括：
    导通所述第一开关、所述第二开关以及所述第三开关，并断开所述第一电源，将所述数据线输出的电压调整为与所述第二电源相同电压后，采集并通过所述第二存储电容存储所述第一开关的阈值电压；
    断开所述第一开关，并将所述数据线的输出电压变更为所述数据线电压后，采集并通过所述第一存储电容存储所述第二电源与所述数据线电压的压差。
  19. 根据权利要求17所述的驱动方法，其中，所述在显示阶段，通过所述第一存储电容所存储的所述第二电源与所述数据线电压的压差以及所述第二存储电容所存储的所述第一开关的阈值电压驱动所述第一开关导通的步骤包括：
    导通所述第一开关，关闭所述第二开关以及所述第三开关，通过所述第一存储电容所存储的所述第二电源与所述数据线电压的压差以及所述第二存储电容所存储的所述第一开关的阈值电压驱动所述第一开关导通。
  20. 根据权利要求18所述的驱动方法，其中，所述在显示阶段，通过所述第一存储电容所存储的所述第二电源与所述数据线电压的压差以及所述第二存储电容所存储的所述第一开关的阈值电压驱动所述第一开关导通的步骤包括：
    导通所述第一开关，关闭所述第二开关以及所述第三开关，通过所述第一存储电容所存储的所述第二电源与所述数据线电压的压差以及所述第二存储电容所存储的所述第一开关的阈值电压驱动所述第一开关导通。
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