WO2020224473A1 - 发光电路及其点亮方法、驱动子电路、驱动电路、显示面板和显示装置 - Google Patents

发光电路及其点亮方法、驱动子电路、驱动电路、显示面板和显示装置 Download PDF

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Publication number
WO2020224473A1
WO2020224473A1 PCT/CN2020/087251 CN2020087251W WO2020224473A1 WO 2020224473 A1 WO2020224473 A1 WO 2020224473A1 CN 2020087251 W CN2020087251 W CN 2020087251W WO 2020224473 A1 WO2020224473 A1 WO 2020224473A1
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light
emitting
electrode layer
circuit
layer
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PCT/CN2020/087251
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English (en)
French (fr)
Inventor
朱明毅
廖金龙
吴长晏
杨飞
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京东方科技集团股份有限公司
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Priority to US17/051,623 priority Critical patent/US20210241694A1/en
Publication of WO2020224473A1 publication Critical patent/WO2020224473A1/zh

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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • H—ELECTRICITY
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    • H—ELECTRICITY
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    • H—ELECTRICITY
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Definitions

  • the pixel circuit in the OLED display panel includes a light-emitting circuit, a thin film transistor, and a storage capacitor.
  • the storage capacitor is charged with a driving voltage corresponding to the display data, and the light-emitting circuit is controlled by adjusting the size of the driving voltage. brightness.
  • the present disclosure provides a light-emitting circuit, including N light-emitting layers and N+1 electrode layers; the N light-emitting layers and the N+1 electrode layers are arranged in a stack, and the n-th light-emitting layer is arranged on the n-th electrode Between the layer and the n+1th electrode layer;
  • N is an integer greater than 1, and n is a positive integer less than or equal to N.
  • the colors of the N light-emitting layers are different from each other.
  • N is equal to 3;
  • the first light-emitting layer is a red light-emitting layer
  • the second light-emitting layer is a green light-emitting layer
  • the third light-emitting layer is a blue light-emitting layer
  • the first light-emitting layer is a red light-emitting layer
  • the second light-emitting layer is a blue light-emitting layer
  • the third light-emitting layer is a green light-emitting layer
  • the first light-emitting layer is a green light-emitting layer
  • the second light-emitting layer is a red light-emitting layer
  • the third light-emitting layer is a blue light-emitting layer
  • the first light-emitting layer is a green light-emitting layer
  • the second light-emitting layer is a blue light-emitting layer
  • the third light-emitting layer is a red light-emitting layer
  • the first light-emitting layer is a blue light-emitting layer
  • the second light-emitting layer is a green light-emitting layer
  • the third light-emitting layer is a red light-emitting layer
  • the first light emitting layer is a blue light emitting layer
  • the second light emitting layer is a red light emitting layer
  • the third light emitting layer is a green light emitting layer.
  • the N light-emitting layers and the N+1 electrode layers are alternately arranged in a stacked arrangement.
  • the light-emitting circuit includes 3 light-emitting layers and 4 electrode layers;
  • the three light-emitting layers are the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer; the four electrode layers are the first electrode layer, the second electrode layer, the third electrode layer, and the fourth electrode layer. Electrode layer
  • the first electrode layer, the first light-emitting layer, and the second electrode layer form a first light-emitting sub-circuit for emitting light of a first color
  • the second electrode layer, the second light-emitting layer and the third electrode layer form a second light-emitting sub-circuit for emitting light of a second color
  • the third electrode layer, the third light-emitting layer, and the fourth electrode layer form a third light-emitting sub-circuit for emitting light of a third color.
  • the present disclosure also provides a lighting method of a light-emitting circuit, which is applied to the above-mentioned light-emitting circuit, and the lighting method of the light-emitting circuit includes:
  • corresponding driving voltages are provided for the N+1 electrode layers to light up the light-emitting circuit.
  • the first light emitting layer is a red light emitting layer
  • the second light emitting layer is a green light emitting layer
  • the third light emitting layer is a blue light emitting layer
  • the lighting method of the light-emitting circuit includes: in the light-emitting stage,
  • the driving voltage of is a low voltage, so that the light-emitting circuit emits yellow light
  • Controlling the driving voltage supplied to the first electrode layer to the second high voltage controlling the driving voltage supplied to the second electrode layer, the driving voltage supplied to the third electrode layer, and the driving voltage supplied to the fourth electrode layer to low voltage, So that the light-emitting circuit emits red light; or,
  • Controlling the driving voltage supplied to the second electrode layer to the second high voltage controlling the driving voltage supplied to the first electrode layer, the driving voltage supplied to the third electrode layer, and the driving voltage supplied to the fourth electrode layer to low voltage, So that the light-emitting circuit emits green light; or,
  • the first light emitting layer is a red light emitting layer
  • the second light emitting layer is a green light emitting layer
  • the third light emitting layer is a blue light emitting layer
  • the light-emitting stage includes a plurality of light-emitting sub-stages arranged in sequence; the light-emitting sub-stage includes a first light-emitting period and a second light-emitting period that are sequentially set; and the lighting method of the light-emitting circuit includes:
  • control the driving voltage provided to the first electrode layer and the driving voltage provided to the fourth electrode layer to be low voltage; in the first light-emitting period, control the driving voltage provided to the second electrode layer to The second high voltage, controlling the driving voltage of the third electrode layer to a low voltage; in the second light-emitting period, controlling the driving voltage provided to the second electrode layer to a low voltage, and controlling the driving voltage provided to the third electrode layer Is the second high voltage to control the light-emitting circuit to emit cyan light; or,
  • control the driving voltage provided to the fourth electrode layer In the light-emitting phase, control the driving voltage provided to the fourth electrode layer to a low voltage; in the first light-emitting period, control the driving voltage provided to the first electrode layer to a low voltage, and control the driving voltage provided to the second electrode layer
  • the driving voltage is the second high voltage, and the driving voltage of the third electrode layer is controlled to be a low voltage; during the second light-emitting period, the driving voltage provided to the first electrode layer is controlled to be a high voltage, and the driving voltage provided to the second electrode is controlled
  • the driving voltage of the layer is a low voltage, and the driving voltage provided to the third electrode layer is controlled to be a second high voltage to control the light emitting circuit to emit white light.
  • the present disclosure also provides a driving sub-circuit for providing a driving voltage for the n-th electrode layer in the above-mentioned light-emitting circuit;
  • the driving sub-circuit includes a voltage selector and M pixel driving sub-circuits, and M is a positive integer;
  • the m-th pixel driving sub-circuit is used to control the m-th driving voltage to be output to the voltage selector under the control of the gate driving signal input from the corresponding gate line and the m-th data voltage on the m-th data line;
  • m is A positive integer less than or equal to M;
  • the voltage selector is used to control a driving voltage provided by the pixel driving sub-circuit or a predetermined driving voltage input from a predetermined driving voltage terminal to be supplied to the nth electrode under the control of a selection control signal input from its selection control terminal Floor.
  • the m-th pixel driving sub-circuit includes an m-th driving module, an m-th data writing module, and an m-th energy storage module, where:
  • the control end of the m-th data writing module is connected to a corresponding gate line, the first end of the m-th data writing module is connected to the m-th data line, and the second end of the m-th data writing module is The terminal is connected to the control terminal of the m-th driving module, and the m-th data writing module is used to control the writing of the m-th data voltage into the m-th driving module under the control of the gate driving signal Control end
  • the m-th driving module is configured to control the output of the m-th driving voltage to the voltage selector under the control of the potential of its control terminal;
  • the m-th energy storage module is connected to the control terminal of the m-th drive module, and is used to maintain the potential of the control terminal of the m-th drive module.
  • the voltage selector includes M+1 selection switch circuits
  • the m-th selection switch circuit is configured to control the supply of the m-th driving voltage provided by the m-th pixel driving sub-circuit to the n-th electrode layer under the control of the selection control signal input from the selection control terminal;
  • the M+1th selection switch circuit is used for controlling the supply of the predetermined driving voltage input from the predetermined driving voltage terminal to the nth electrode layer under the control of the selection control signal input from the selection control terminal.
  • the present disclosure also provides a driving circuit, including N above-mentioned driving sub-circuits;
  • the n-th driving sub-circuit is connected to the n-th electrode layer included in the light-emitting circuit, and is used to provide a corresponding driving voltage for the n-th electrode layer;
  • n is a positive integer less than or equal to N, and N is an integer greater than 1.
  • the driving circuit described in the present disclosure further includes a voltage supply unit
  • the voltage supply unit is connected to the N+1th electrode layer included in the light-emitting circuit, and is used to provide a corresponding driving voltage for the N+1th electrode layer.
  • the present disclosure also provides a display panel including the above-mentioned light-emitting circuit.
  • the present disclosure also provides a display device including the above-mentioned driving circuit.
  • Fig. 1 is a structural diagram of a light-emitting circuit according to some embodiments of the present disclosure
  • Fig. 2 is a structural diagram of a driving sub-circuit according to some embodiments of the present disclosure
  • FIG. 3 is a structural diagram of a driving sub-circuit according to some embodiments of the present disclosure.
  • Fig. 4 is a circuit diagram of a driving sub-circuit according to some embodiments of the present disclosure.
  • FIG. 5 is a structural diagram of a driving sub-circuit according to some embodiments of the present disclosure.
  • FIG. 6 is a circuit diagram of some embodiments of a pixel circuit (some embodiments of the pixel circuit include some embodiments of the light-emitting circuit described in the present disclosure and some embodiments of the driving circuit described in the present disclosure);
  • FIG. 7A is a timing diagram of the driving voltage connected to E2 and the driving voltage connected to E3 when some embodiments of the pixel circuit display cyan;
  • 7B is a timing diagram of the driving voltage connected to E1, the driving voltage connected to E2, and the driving voltage connected to E3 when some embodiments of the pixel circuit display white.
  • the transistors used in all the embodiments of the present disclosure may be triodes, thin film transistors or field effect transistors or other devices with the same characteristics.
  • one of the poles is called the first pole, and the other pole is called the second pole.
  • the control electrode when the transistor is a triode, can be a base, the first electrode can be a collector, and the second electrode can be an emitter; or, the control electrode can be a base.
  • the first electrode may be an emitter electrode, and the second electrode may be a collector electrode.
  • the control electrode when the transistor is a thin film transistor or a field effect transistor, the control electrode may be a gate, the first electrode may be a drain, and the second electrode may be a source; or The control electrode may be a gate, the first electrode may be a source, and the second electrode may be a drain.
  • the light-emitting circuit includes N light-emitting layers and N+1 electrode layers; the N light-emitting layers and the N+1 electrode layers are arranged in a stack, and the n-th light-emitting layer is arranged on the n-th Between the electrode layer and the n+1th electrode layer;
  • N is an integer greater than 1, and n is a positive integer less than or equal to N.
  • the light-emitting circuit includes multiple light-emitting layers, and light-emitting layers of multiple colors can be integrated into one light-emitting circuit.
  • the voltage can control the light-emitting brightness of the n-th light-emitting layer, so that a single light-emitting circuit can realize full-color display.
  • the light-emitting layer may be made of organic light-emitting material, but it is not limited thereto.
  • the electrode layer may be made of ITO (Indium Tin Oxide), and the electrode layer may also be made of a metal or metal compound with good conductivity, but it is not limited to this.
  • ITO Indium Tin Oxide
  • the electrode layer may also be made of a metal or metal compound with good conductivity, but it is not limited to this.
  • a pixel When a pixel includes the light-emitting circuit described in some embodiments of the present disclosure, multiple colors can be integrated into a single pixel, so there is no concept of sub-pixels, so that each pixel has a full-color display function, and a single pixel can display multiple colors.
  • the purpose of this color is to effectively increase the pixel aperture ratio in a limited space, and to achieve high-resolution design.
  • the colors of the N light-emitting layers may be different from each other, but it is not limited thereto.
  • N can be equal to 3;
  • the first light-emitting layer is a red light-emitting layer
  • the second light-emitting layer is a green light-emitting layer
  • the third light-emitting layer is a blue light-emitting layer
  • the first light-emitting layer is a red light-emitting layer
  • the second light-emitting layer is a blue light-emitting layer
  • the third light-emitting layer is a green light-emitting layer
  • the first light-emitting layer is a green light-emitting layer
  • the second light-emitting layer is a red light-emitting layer
  • the third light-emitting layer is a blue light-emitting layer
  • the first light-emitting layer is a green light-emitting layer
  • the second light-emitting layer is a blue light-emitting layer
  • the third light-emitting layer is a red light-emitting layer
  • the first light-emitting layer is a blue light-emitting layer
  • the second light-emitting layer is a green light-emitting layer
  • the third light-emitting layer is a red light-emitting layer
  • the first light emitting layer is a blue light emitting layer
  • the second light emitting layer is a red light emitting layer
  • the third light emitting layer is a green light emitting layer.
  • N is not limited to be equal to 3.
  • N may be equal to 4
  • each light-emitting layer may be one of a red light-emitting layer, a green light-emitting layer, a blue light-emitting layer, and a white light-emitting layer, but is not limited to this.
  • the light-emitting circuit, driver sub-circuit, driving circuit, and display device include multiple light-emitting layers, and light-emitting layers of multiple colors can be integrated into one light-emitting circuit.
  • the voltage of the n+1th electrode layer can control the luminance of the nth light-emitting layer, so that a single light-emitting circuit can realize full-color display; in the light-emitting circuit according to the embodiment of the present invention, adjacent light-emitting circuits
  • the light-emitting area can be increased, and the life of the light-emitting circuit can be increased, so that more pixels can be arranged under the same size.
  • Improve the aperture ratio of the display panel in the display device .
  • the light-emitting circuit may include a first electrode layer E1, a first light-emitting layer EL1, a second electrode layer E2, a second light-emitting layer EL2, and a third electrode layer arranged in a stack. E3, the third light-emitting layer EL3 and the fourth electrode layer E4;
  • the first light-emitting layer EL1 is disposed between the first electrode layer E1 and the second electrode layer E2;
  • the second light-emitting layer EL2 is disposed between the second electrode layer E2 and the third electrode layer E3;
  • the third light-emitting layer EL3 is disposed between the third electrode layer E3 and the fourth electrode layer E4;
  • the first light emitting layer EL1 is a red light emitting layer
  • the second light emitting layer EL2 is a green light emitting layer
  • the third light emitting layer EL3 is a blue light emitting layer.
  • the light-emitting brightness of each color light-emitting layer is adjusted by changing the voltage of each electrode layer.
  • the embodiment of the light emitting circuit shown in FIG. 1 may be an OLED (Organic Light-Emitting Diode, organic light emitting diode) light emitting circuit.
  • OLED Organic Light-Emitting Diode, organic light emitting diode
  • E1, EL1, and E2 form a red light-emitting subunit
  • E2, EL2, and E3 form a green light-emitting subunit
  • E3, EL3, and E4 form a blue light-emitting subunit, and each color emits light.
  • the light-emitting driving voltage between the sub-units (the light-emitting driving voltage is the voltage difference between the anode layer and the cathode layer included in the light-emitting sub-units of each color) is correlated.
  • the second electrode layer E2 may be the red
  • the cathode layer of the light emitting subunit may also be the anode layer of the green light emitting subunit.
  • E1 may be the anode layer of the red light-emitting subunit
  • E3 may be the cathode layer of the green light-emitting subunit, or may be the blue light-emitting subunit
  • the anode layer; E4 can be the cathode layer of the blue light-emitting subunit.
  • the horizontal resolution can be increased by three times under the same manufacturing process limitation.
  • the light-emitting circuit, driver sub-circuit, driving circuit, and display device include multiple light-emitting layers, and light-emitting layers of multiple colors can be integrated into one light-emitting circuit.
  • the voltage of the n+1th electrode layer can control the luminance of the nth light-emitting layer, so that a single light-emitting circuit can realize full-color display; in the light-emitting circuit according to the embodiment of the present invention, adjacent light-emitting circuits
  • the light-emitting area can be increased, and the life of the light-emitting circuit can be increased, so that more pixels can be arranged under the same size.
  • Improve the aperture ratio of the display panel in the display device .
  • the lighting method of the light-emitting circuit according to some embodiments of the present disclosure is applied to the above-mentioned light-emitting circuit, and the lighting method of the light-emitting circuit includes:
  • corresponding driving voltages are provided for the N+1 electrode layers to light up the light-emitting circuit.
  • the lighting method of the light-emitting circuit can control the light-emitting brightness of the n-th light-emitting layer by controlling the voltage of the n-th electrode layer and the voltage of the n+1-th electrode layer, thereby So that a single light-emitting circuit can achieve full-color display.
  • the first light-emitting layer may be a red light-emitting layer
  • the second light-emitting layer may be a green light-emitting layer
  • the third light-emitting layer may be a blue light-emitting layer
  • the lighting method of the light-emitting circuit may include: in the light-emitting stage,
  • the driving voltage of is a low voltage, so that the light-emitting circuit emits yellow light
  • Controlling the driving voltage supplied to the first electrode layer to the second high voltage controlling the driving voltage supplied to the second electrode layer, the driving voltage supplied to the third electrode layer, and the driving voltage supplied to the fourth electrode layer to low voltage, So that the light-emitting circuit emits red light; or,
  • Controlling the driving voltage supplied to the second electrode layer to the second high voltage controlling the driving voltage supplied to the first electrode layer, the driving voltage supplied to the third electrode layer, and the driving voltage supplied to the fourth electrode layer to low voltage, So that the light-emitting circuit emits green light; or,
  • the second high voltage may be less than the first high voltage, but is not limited to this.
  • the driving voltage provided to the first electrode layer needs to be controlled to be the second high voltage
  • the driving voltage provided to the second electrode layer needs to be controlled to be the second high voltage.
  • Two high voltage when displaying blue light, it is necessary to control the driving voltage provided to the third electrode layer to the second high voltage; when displaying yellow light, it is necessary to control the driving voltage provided to the first electrode layer to the first high voltage, The driving voltage supplied to the second electrode layer is controlled to be the second high voltage.
  • the first light-emitting layer may be a red light-emitting layer
  • the second light-emitting layer may be a green light-emitting layer
  • the third light-emitting layer may be a blue light-emitting layer
  • the light-emitting stage includes a plurality of light-emitting sub-stages arranged in sequence; the light-emitting sub-stage includes a first light-emitting period and a second light-emitting period that are sequentially set; and the lighting method of the light-emitting circuit includes:
  • control the driving voltage provided to the first electrode layer and the driving voltage provided to the fourth electrode layer to be low voltage; in the first light-emitting period, control the driving voltage provided to the second electrode layer to The second high voltage, controlling the driving voltage of the third electrode layer to a low voltage; in the second light-emitting period, controlling the driving voltage provided to the second electrode layer to a low voltage, and controlling the driving voltage provided to the third electrode layer Is the second high voltage to control the light-emitting circuit to emit cyan light; or,
  • control the driving voltage provided to the fourth electrode layer In the light-emitting phase, control the driving voltage provided to the fourth electrode layer to a low voltage; in the first light-emitting period, control the driving voltage provided to the first electrode layer to a low voltage, and control the driving voltage provided to the second electrode layer
  • the driving voltage is the second high voltage, and the driving voltage of the third electrode layer is controlled to be a low voltage; during the second light-emitting period, the driving voltage provided to the first electrode layer is controlled to be a high voltage, and the driving voltage provided to the second electrode is controlled
  • the driving voltage of the layer is a low voltage, and the driving voltage provided to the third electrode layer is controlled to be a second high voltage to control the light emitting circuit to emit white light.
  • the light-emitting stage may include a plurality of light-emitting sub-stages arranged in sequence, and the light-emitting sub-stage may include a first light-emitting period and a second light-emitting period that are sequentially set,
  • green light is emitted during the first light-emitting period, and red light and blue light are emitted during the second time period to emit white light through light mixing in the light-emitting period.
  • the light-emitting layer can be integrated into one light-emitting circuit, and the n-th electrode is controlled.
  • the voltage of the layer and the voltage of the n+1th electrode layer can control the luminance of the nth light-emitting layer, so that a single light-emitting circuit can realize full-color display; in the light-emitting circuit according to the embodiment of the present invention, There is no need to have a minimum distance between adjacent light-emitting layers, which cancels the existing minimum distance limit between adjacent sub-pixels. Therefore, the light-emitting area can be increased, and the life of the light-emitting circuit can be improved, so that it can be set in the same size. More pixels increase the aperture ratio of the display panel in the display device.
  • the driving sub-circuit is used to provide a driving voltage for the n-th electrode layer in the above-mentioned light-emitting circuit;
  • the driving sub-circuit includes a voltage selector and M pixel driving sub-circuits, and M is a positive integer ;
  • the m-th pixel driving sub-circuit is used to control the m-th driving voltage to be output to the voltage selector under the control of the gate driving signal input from the corresponding gate line and the m-th data voltage on the m-th data line;
  • m is A positive integer less than or equal to M;
  • the voltage selector is used to control a driving voltage provided by the pixel driving sub-circuit or a predetermined driving voltage input from a predetermined driving voltage terminal to be supplied to the nth electrode under the control of a selection control signal input from its selection control terminal Floor.
  • the driving sub-circuits described in some embodiments of the present disclosure include a voltage selector and M pixel driving sub-circuits. Each pixel driving sub-circuit provides different driving voltages.
  • the voltage selector is controlled by a selection control signal to select A driving voltage or a predetermined driving voltage provided by the pixel driving sub-circuit is provided to the nth electrode layer.
  • the value of M can be selected according to actual conditions.
  • the driving sub-circuit is used to provide a driving voltage for the first electrode layer in the light-emitting circuit in FIG. 1; M may be equal to 2;
  • the driving sub-circuit may include a first pixel driving sub-circuit 211, a second pixel driving sub-circuit 212, and a first voltage selector SV1;
  • the first pixel driving sub-circuit 211 is connected to the first gate line G1_R, the first data line DatalineR1, and the first voltage selector SV1, respectively, and is used for the gate driving signal and the input of the first gate line G1_R. Under the control of the first red data voltage on the first data line DatalineR1, control to output the first driving voltage VD1 to the first voltage selector SV1;
  • the second pixel driving sub-circuit 212 is connected to the first gate line G1_R, the second data line DatalineR2, and the first voltage selector SV1, respectively, and is used for the gate driving signal and the input of the first gate line G1_R. Under the control of the second red data voltage on the second data line DatalineR2, controlling the output of the second driving voltage VD2 to the first voltage selector SV1;
  • the selection control terminal of the first voltage selector SV1 includes a first red selection control terminal SELECTR, a second red selection control terminal SELECTR', and a third red selection control terminal SER;
  • the first voltage selector SV1 is used for the first red selection control signal inputted at the first red selection control terminal SELECTR, the second red selection control signal inputted by the second red selection control terminal SELECTR', and the third red selection control terminal Under the control of the third red selection control signal input by the SER, the first driving voltage VD1, the second driving voltage VD2 or the predetermined driving voltage input from the predetermined driving voltage terminal VT is controlled to be written into the first electrode layer.
  • VD1 may be the first high voltage V_HIGH
  • VD2 may be the second high voltage V_Middle
  • V_HIGH and V_Middle may both be high voltages
  • V_HIGH may be greater than V_Middle, but is not limited to this.
  • V_HIGH can be greater than or equal to 32V and less than or equal to 48V
  • V_Middle can be greater than or equal to 16V and less than 32V, but not limited to this.
  • the predetermined driving voltage terminal VT may be a ground terminal, or the predetermined driving voltage may be a negative voltage, but it is not limited to this.
  • the m-th pixel driving sub-circuit may include an m-th driving module, an m-th data writing module, and an m-th energy storage module, where
  • the control end of the m-th data writing module is connected to a corresponding gate line, the first end of the m-th data writing module is connected to the m-th data line, and the second end of the m-th data writing module is The terminal is connected to the control terminal of the m-th driving module, and the m-th data writing module is used to control the writing of the m-th data voltage into the m-th driving module under the control of the gate driving signal Control end
  • the m-th driving module is configured to control the output of the m-th driving voltage to the voltage selector under the control of the potential of its control terminal;
  • the m-th energy storage module is connected to the control terminal of the m-th drive module, and is used to maintain the potential of the control terminal of the m-th drive module.
  • the m-th pixel driving sub-circuit may include an m-th driving module, an m-th data writing module, and an m-th energy storage module to provide a corresponding driving voltage for the voltage selector.
  • the m-th driving module may include an m-th driving transistor
  • the m-th data writing module may include an m-th data writing transistor
  • the m-th energy storage module may include an m-th storage capacitor
  • the control electrode of the m-th data writing transistor is connected to the corresponding gate line, the first electrode of the m-th data writing transistor is connected to the m-th data line, and the second electrode of the m-th data writing transistor is Connected to the control electrode of the m-th driving transistor;
  • the first electrode of the m-th driving transistor is connected to the m-th driving voltage terminal, and the second electrode of the m-th driving transistor is connected to the voltage selector; the m-th driving voltage terminal is used to input the m-th driving voltage ;
  • the first end of the m-th storage capacitor is connected to the control electrode of the m-th drive transistor, and the second end of the m-th storage capacitor is connected to the second electrode of the m-th drive transistor.
  • the first pixel driving sub-circuit may include a first driving module 31, a first data writing module 32, and a first energy storage module 33, wherein,
  • the control end of the first data writing module 32 is connected to the first gate line G1_R, the first end of the first data writing module 32 is connected to the first data line DatalineR1, and the first data writing The second end of the module 32 is connected to the control end of the first driving module 31, and the first data writing module 32 is used to control the control of the first gate line G1_R under the control of the gate driving signal input by the first gate line G1_R.
  • the first red data voltage VDATA_RH on the first data line DatalineR1 is written into the control terminal of the first driving module 31;
  • the first driving module 31 is configured to control the output of the first driving voltage VD1 to the first voltage selector SV1 under the control of the potential of its control terminal;
  • the first energy storage module 33 is connected to the control terminal of the first driving module 31 and used to maintain the potential of the control terminal of the first driving module 31.
  • the first data writing module 32 writes VDATA_RH into the first driving module 31 under the control of the gate driving signal input by G1_R.
  • the first driving module 31 controls the output of the VD1 to the first voltage selector SV1 under the control of the potential of the control terminal.
  • the first driving module 31 may include a first data writing transistor TR11, a first driving transistor TR12, and a first Storage capacitor C1;
  • the gate of TR11 is connected to the first gate line G1_R, the drain of TR11 is connected to the first data line DatalineR1, and the source of TR11 is connected to the gate of TR12;
  • the drain of TR12 is connected to the first driving voltage VD1, and the source of TR12 is connected to the first voltage selector SV1;
  • the first end of C1 is connected to the gate of TR12, and the second end of C1 is connected to the source of TR12.
  • both TR11 and TR12 are n-type thin film transistors, but not limited to this.
  • TR11 when G1_R inputs a high-level signal, TR11 is turned on to write the first red data voltage VDATA_RH on DatalineR1 into the gate of TR12, when When VDATA_RH is at a high level, TR12 is turned on to output VD1 to the first voltage selector SV1.
  • the voltage selector may include M+1 selection switch circuits
  • the m-th selection switch circuit is configured to control the supply of the m-th driving voltage provided by the m-th pixel driving sub-circuit to the n-th electrode layer under the control of the selection control signal input from the selection control terminal;
  • the M+1th selection switch circuit is used for controlling the supply of the predetermined driving voltage input from the predetermined driving voltage terminal to the nth electrode layer under the control of the selection control signal input from the selection control terminal.
  • the voltage selector may include M+1 selection switch circuits, and under the control of the selection control signal, the m-th selection switch circuit controls the supply of the m-th driving voltage to the n-th electrode layer. , Under the control of the selection control signal, the M+1 th selection switch circuit controls the supply of a predetermined driving voltage to the n th electrode layer.
  • the first voltage selector SV1 may include a first selection switch circuit 51 and a The second selection switch circuit 52 and the third selection switch circuit 53;
  • the selection control terminal of the first voltage selector SV1 includes a first red selection control terminal SELECTR, a second red selection control terminal SELECTR', and a third red selection control terminal SER;
  • the first selection switch circuit 51 may include a first red switch transistor TR1; the second selection switch circuit 52 may include a second red switch transistor TR2; the third selection switch circuit 53 may include a third red switch transistor TR3 ;
  • the gate of TR1 is connected to SELECTR, the drain of TR1 is connected to the first driving voltage output terminal of the first pixel driving sub-circuit 211, and the source of TR1 is connected to the first electrode layer; the first pixel driving The sub-circuit 211 outputs the first driving voltage VD1 through the first driving voltage output terminal;
  • the gate of TR2 is connected to SELECTR', the drain of TR2 is connected to the second driving voltage output terminal of the second pixel driving sub-circuit 212, and the source of TR2 is connected to the first electrode layer; the first pixel The driving sub-circuit 212 outputs the second driving voltage VD2 through the second driving voltage output terminal;
  • the gate of TR3 is connected to SER, the drain of TR3 is connected to the predetermined driving voltage terminal VT, and the source of TR3 is connected to the first electrode layer.
  • TR1, TR2, and TR3 are n-type thin film transistors, but not limited to this.
  • the driving sub-circuit 211 can output VD1 to the first electrode layer;
  • TR3 When SELECTR outputs low level, SELECTR' outputs low level, and SER outputs high level, TR3 is turned on, TR1 and TR2 are turned off, and the predetermined driving voltage terminal VT can output the predetermined driving voltage to the first electrode layer .
  • the driving circuit according to some embodiments of the present disclosure includes N above-mentioned driving sub-circuits;
  • the n-th driving sub-circuit is connected to the n-th electrode layer included in the light-emitting circuit, and is used to provide a corresponding driving voltage for the n-th electrode layer;
  • n is a positive integer less than or equal to N, and N is an integer greater than 1.
  • the driving circuit described in some embodiments of the present disclosure may further include a voltage supply unit;
  • the voltage supply unit is connected to the N+1th electrode layer included in the light-emitting circuit, and is used to provide a corresponding driving voltage for the N+1th electrode layer.
  • the driving voltage provided by the voltage supply unit for the N+1th electrode layer may be 0V, a negative voltage or a high voltage, but not limited to this; and, the voltage supply unit provides for the Nth electrode layer.
  • the driving voltage of the +1 electrode layer can be a fixed voltage or can be changed.
  • some embodiments of the driving circuit described in some embodiments of the present disclosure are used to provide corresponding driving voltages for each electrode layer in the embodiment of the light emitting circuit shown in FIG. 1;
  • the driving circuit includes a first driving sub-circuit, a second driving sub-circuit, a third driving sub-circuit and a voltage supply unit 60;
  • the first driving sub-circuit includes a first pixel driving sub-circuit 211, a second pixel driving sub-circuit 212 and a first voltage selector SV1;
  • the first pixel driving sub-circuit 211 includes a first data writing transistor TR11, a first driving transistor TR12 and a first storage capacitor C1;
  • the gate of TR11 is connected to the first gate line G1_R, the drain of TR11 is connected to the first red data voltage VDATA_RH on the first data line DataLineR1, and the source of TR11 is connected to the gate of TR12;
  • the drain of TR12 is connected to the first high voltage V_HIGH, and the source of TR12 is connected to the first voltage selector SV1;
  • the first end of C1 is connected to the gate of TR12, and the second end of C1 is connected to the source of TR12;
  • TR11 and TR12 are n-type thin film transistors
  • the second pixel driving sub-circuit 212 includes a second data writing transistor TR21, a second driving transistor TR22, and a second storage capacitor C2;
  • the gate of TR21 is connected to the first gate line G1_R, the drain of TR21 is connected to the second red data voltage VDATA_RL on the second data line DataLineR2, and the source of TR21 is connected to the gate of TR22;
  • the drain of TR22 is connected to the second high voltage V_Middle, and the source of TR22 is connected to the first voltage selector SV1;
  • the first end of C2 is connected to the gate of TR22, and the second end of C2 is connected to the source of TR22;
  • TR21 and TR22 are n-type thin film transistors
  • the first voltage selector SV1 includes a first selection switch circuit, a second selection switch circuit, and a third selection switch circuit;
  • the first selection switch circuit includes a first red switch transistor TR1; the second selection switch circuit includes a second red switch transistor TR2; the third selection switch circuit includes a third red switch transistor TR3;
  • TR1 The gate of TR1 is connected to the first red selection control terminal SELECTR, the drain of TR1 is connected to the source of TR22, and the source of TR1 is connected to the first electrode layer E1;
  • TR2 is connected to the second red selection control terminal SELECTR', the drain of TR2 is connected to the source of TR22, and the source of TR2 is connected to the first electrode layer E1;
  • TR3 is connected to the third red selection control terminal SER, the drain of TR3 is connected to the ground terminal GND, and the source of TR3 is connected to the first electrode layer E1;
  • TR1, TR2 and TR3 are all n-type thin film transistors
  • the second driving sub-circuit includes a third pixel driving sub-circuit 221 and a second voltage selector SV2;
  • the third pixel driving sub-circuit 221 includes a third data writing transistor TG11, a third driving transistor TG11, and a third storage capacitor C3;
  • the gate of TG11 is connected to the second gate line G1_G, the drain of TG11 is connected to the green data voltage VDATA_G on the third data line DataLineG, and the source of TG11 is connected to the gate of TG12;
  • the drain of TG12 is connected to the second high voltage V_Middle, and the source of TG12 is connected to the second voltage selector SV2;
  • the first end of C3 is connected to the gate of TG12, and the second end of C3 is connected to the source of TG12;
  • Both TG11 and TG12 are n-type thin film transistors
  • the second voltage selector SV2 includes a fourth selection switch circuit and a fifth selection switch circuit
  • the fourth selection switch circuit includes a first green switch transistor TG1 and a second green switch transistor TG2; the fifth selection switch circuit includes a third green switch transistor TG3 and a fourth green switch transistor TG4;
  • the gate of TG1 is connected to the first green selection control terminal SELECTG, the drain of TG1 is connected to the source of TG12, and the source of TG1 is connected to the second electrode layer E2;
  • the gate of TG2 is connected to the second green selection control terminal SELECTG', the drain of TG2 is connected to the source of TG12, and the source of TG2 is connected to the second electrode layer E2;
  • the gate of TG3 is connected to the first green selection control terminal SELECTG, the drain of TG3 is connected to the ground terminal GND, and the source of TG3 is connected to the second electrode layer E2;
  • the gate of TG4 is connected to the second green selection control terminal SELECTG', the drain of TG4 is connected to the ground terminal GND, and the source of TG4 is connected to the second electrode layer E2;
  • TG1 and TG3 are n-type thin film transistors, TG2 and TG4 are p-type thin film transistors;
  • the third driving sub-circuit includes a fourth pixel driving sub-circuit 231 and a third voltage selector SV3;
  • the third pixel driving sub-circuit 231 includes a fourth data writing transistor TB11, a fourth driving transistor TB11, and a fourth storage capacitor C4;
  • the gate of TB11 is connected to the third gate line G1_B, the drain of TB11 is connected to the blue data voltage VDATA_B on the fourth data line DataLineB, and the source of TB11 is connected to the gate of TB12;
  • the drain of TB12 is connected to the second high voltage V_Middle, and the source of TB12 is connected to the third voltage selector SV3;
  • the first end of C4 is connected to the gate of TB12, and the second end of C4 is connected to the source of TB12;
  • Both TB11 and TB12 are n-type thin film transistors
  • the third voltage selector SV3 includes a sixth selection switch circuit and a seventh selection switch circuit
  • the sixth selection switch circuit includes a first blue switch transistor TB1 and a second blue switch transistor TB2; the seventh selection switch circuit includes a third blue switch transistor TB3 and a fourth blue switch transistor TB4;
  • the gate of TB1 is connected to the first blue selection control terminal SELECTB, the drain of TB1 is connected to the source of TB12, and the source of TB1 is connected to the third electrode layer E3;
  • the gate of TB2 is connected to the second blue selection control terminal SELECTB', the drain of TB2 is connected to the source of TB12, and the source of TB2 is connected to the third electrode layer E3;
  • the gate of TB3 is connected to the first blue selection control terminal SELECTB, the drain of TB3 is connected to the ground terminal GND, and the source of TB3 is connected to the third electrode layer E3;
  • the gate of TB4 is connected to the second blue selection control terminal SELECTB', the drain of TB4 is connected to the ground terminal GND, and the source of TB4 is connected to the third electrode layer E3;
  • TB1 and TB3 are n-type thin film transistors, TB2 and TB4 are p-type thin film transistors;
  • the voltage supply unit 60 is used to provide a ground voltage for the fourth electrode layer E4.
  • Some embodiments of the driving circuit in FIG. 6 and the embodiments of the light-emitting circuit in FIG. 1 constitute some embodiments of the pixel circuit.
  • the light-emitting circuit emits cyan light
  • E4 When E4 is grounded, E1 is connected to the drive voltage, E2 is connected to the drive voltage, and E3 is connected to the drive voltage as shown in Figure 7B, the light-emitting circuit emits white light.
  • E2 is connected to the second high voltage and low voltage at intervals
  • E3 is connected to the low voltage and second high voltage at intervals
  • E1 is connected to low voltage and second high voltage at intervals
  • E2 is connected to second high voltage and low voltage at intervals
  • E3 is connected to low voltage and second high voltage at intervals
  • the low voltage may be ground voltage, but is not limited to this.
  • the light-emitting stage may be divided into a plurality of light-emitting sub-stages arranged in sequence, and the light-emitting sub-stage includes a first light-emitting time period and a second light-emitting time that are sequentially arranged In the first light-emitting time period, blue light is displayed, and green light is displayed in the second light-emitting time period.
  • the driving voltage is switched at a high speed to display cyan in mixed colors.
  • the light-emitting stage is divided into a plurality of light-emitting sub-stages arranged in sequence, and the light-emitting sub-stage includes the first light-emitting sub-stages arranged in sequence.
  • green is displayed in the first light-emitting period
  • red and blue are displayed in the second light-emitting period
  • the driving voltage is switched at a high speed, and the color is mixed into white.
  • the light-emitting stage includes a first light-emitting sub-stage S1, a second light-emitting sub-stage S2, and a third light-emitting sub-stage S3 arranged in sequence;
  • the first light-emitting period included in the first light-emitting sub-stage S1 is marked as S11
  • the second light-emitting period included in the first light-emitting sub-stage S1 is marked as S12
  • the second light-emitting sub-stage S2 includes the first light-emitting period.
  • the lighting time period is marked as S21
  • the second lighting time period included in the second lighting sub-stage S2 is marked as S22
  • the first lighting time period included in the third lighting sub-stage S3 is marked as S31
  • the third lighting The second light-emitting time period included in the sub-stage S3 is marked as S32;
  • E2 is connected to the second high voltage and E3 is connected to the low voltage; in S12, S22 and S32, E2 is connected to the low voltage, and E2 is connected to the second high voltage; in the light-emitting phase, E1 and E4 is connected to low voltage to emit cyan light.
  • the light-emitting stage includes a first light-emitting sub-stage S1, a second light-emitting sub-stage S2, and a third light-emitting sub-stage S3 arranged in sequence;
  • the first light-emitting period included in the first light-emitting sub-stage S1 is marked as S11
  • the second light-emitting period included in the first light-emitting sub-stage S1 is marked as S12
  • the second light-emitting sub-stage S2 includes the first light-emitting period.
  • the lighting time period is marked as S21
  • the second lighting time period included in the second lighting sub-stage S2 is marked as S22
  • the first lighting time period included in the third lighting sub-stage S3 is marked as S31
  • the third lighting The second light-emitting time period included in the sub-stage S3 is marked as S32;
  • E1 is connected to the low voltage
  • E2 is connected to the second high voltage
  • E3 is connected to the low voltage
  • E1 is connected to the second high voltage
  • E2 is connected to the low voltage
  • E2 is connected Enter the second high voltage
  • E4 is connected to a low voltage to emit white light.
  • FIGS. 7A and 7B are only for example. In actual operation, the number of light-emitting sub-stages included in the light-emitting stage may be any integer greater than one.
  • organic light-emitting devices of three primary colors are made in the same pixel, and the voltage of each electrode layer is changed through a voltage selector. The voltage is used to adjust the brightness of the light-emitting layer of each color.
  • the pixel circuit using the driving circuit described in some embodiments of the present disclosure and the light-emitting circuit described in some embodiments of the present disclosure can control the voltage of each electrode layer through the combination of the pixel driving sub-circuit and the voltage selector to achieve full-color display.
  • the colors can be exchanged, and the structure of the pixel driving sub-circuit and the structure of each voltage selector are not limited to the structures exemplified above.
  • the new type of pixel can be placed on the arrangement of the traditional sub-pixel. It can display full-color colors, so under the same manufacturing process limitation, the horizontal resolution is increased by 3 times, and the resolution is rapidly increased.
  • the pixel circuit using the driving circuit described in some embodiments of the present disclosure and the light-emitting circuit described in some embodiments of the present disclosure adopts a novel pixel arrangement design, which integrates all three colors into a single pixel, so there is no concept of sub-pixels , Each pixel has a full-color display function. Under the design of the same resolution, the new pixel arrangement reduces the minimum spacing between sub-pixels, so it can increase the light-emitting area and effectively improve the life of the OLED (organic light-emitting diode) device.
  • OLED organic light-emitting diode
  • the display panel of some embodiments of the present disclosure includes the above-mentioned light-emitting circuit.
  • the display device includes the above-mentioned driving circuit.
  • the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.

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Abstract

本公开提供一种发光电路及其点亮方法、驱动子电路、驱动电路、显示面板和显示装置。所述发光电路包括N个发光层和N+1个电极层，所述N个发光层和所述N+1个电极层层叠排布，第n发光层设置于第n电极层与第n+1电极层之间；N为大于1的整数，n为小于或等于N的正整数。

Description

发光电路及其点亮方法、驱动子电路、驱动电路、显示面板和显示装置
相关申请的交叉引用
本申请主张在2019年5月5日在中国提交的中国专利申请号No.201910368191.X的优先权，其全部内容通过引用包含于此。
背景技术
OLED(有机发光二极管)显示面板逐渐成为下一代主流显示面板。一般来说，OLED显示面面板中的像素电路包括发光电路、薄膜晶体管以及存储电容，通过将与显示数据相应的驱动电压充至所述存储电容，通过调节驱动电压的大小以控制发光电路的发光亮度。
随著显示分辨率的要求逐年上升，相同尺寸的显示面板上需要设计更多的像素，对于像素设计的开口率、寿命与驱动都是很大的挑战。此外，在相关技术中，由于制程工艺的限制，不同颜色的子像素之间存在最小间距的要求，避免产生混色或是其他的工艺问题，导致开口率的浪费，降低器件寿命。
发明内容
本公开提供了一种发光电路，包括N个发光层和N+1个电极层；所述N个发光层和所述N+1个电极层层叠排布，第n发光层设置于第n电极层与第n+1电极层之间；
N为大于1的整数，n为小于或等于N的正整数。
可选的，所述N个发光层的颜色互不相同。
可选的，N等于3；
所述第一发光层为红色发光层，所述第二发光层为绿色发光层，所述第三发光层为蓝色发光层；或者，
所述第一发光层为红色发光层，所述第二发光层为蓝色发光层，所述第三发光层为绿色发光层；或者，
所述第一发光层为绿色发光层，所述第二发光层为红色发光层，所述第三发光层为蓝色发光层；或者，
所述第一发光层为绿色发光层，所述第二发光层为蓝色发光层，所述第三发光层为红色发光层；或者，
所述第一发光层为蓝色发光层，所述第二发光层为绿色发光层，所述第三发光层为红色发光层；或者，
所述第一发光层为蓝色发光层，所述第二发光层为红色发光层，所述第三发光层为绿色发光层。
可选的，所述N个发光层和所述N+1个电极层层叠排布交替排布。
可选的，所述发光电路包括3个发光层和4个电极层；
其中，所述3个发光层分别为第一发光层、第二发光层和第三发光层；所述4个电极层分别为第一电极层、第二电极层、第三电极层和第四电极层；
其中，所述第一电极层、第一发光层和第二电极层形成用于发出第一种颜色的光的第一发光子电路；
所述第二电极层、第二发光层和第三电极层形成用于发出第二种颜色的光的第二发光子电路；
所述第三电极层、第三发光层和第四电极层形成用于发出第三种颜色的光的第三发光子电路。
本公开还提供了一种发光电路的点亮方法，应用于上述的发光电路，所述发光电路的点亮方法包括：
在发光阶段，分别为N+1个电极层提供相应的驱动电压，以点亮所述发光电路。
可选的，第一发光层为红色发光层，第二发光层为绿色发光层，第三发光层为蓝色发光层；
所述发光电路的点亮方法包括：在发光阶段，
控制提供至第一电极层的驱动电压为第一高电压，控制提供至第二电极层的驱动电压为第二高电压，并控制提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出黄色光；
控制提供至第一电极层的驱动电压为第二高电压，控制提供至第二电极层的驱动电压、提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出红色光；或者，
控制提供至第二电极层的驱动电压为第二高电压，控制提供至第一电极层的驱动电压、提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出绿色光；或者，
控制提供至第三电极层的驱动电压为第二高电压，控制提供至第一电极层的、提供至第二电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出蓝色光；或者，
控制提供至第一电极层的驱动电压和提供至第三电极层的驱动电压为第二高电压，控制提供至第二电极层的驱动电压和提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出紫红色光。
可选的，第一发光层为红色发光层，第二发光层为绿色发光层，第三发光层为蓝色发光层；
所述发光阶段包括依次设置的多个发光子阶段；所述发光子阶段包括依次设置的第一发光时间段和第二发光时间段；所述发光电路的点亮方法包括：
在所述发光阶段，控制提供至第一电极层的驱动电压和提供至第四电极层的驱动电压为低电压；在所述第一发光时间段，控制提供至第二电极层的驱动电压为第二高电压，控制第三电极层的驱动电压为低电压；在所述第二发光时间段，控制提供至第二电极层的驱动电压为低电压，控制提供至第三电极层的驱动电压为第二高电压，以控制所述发光电路发出青绿色光；或者，
在所述发光阶段，控制提供至第四电极层的驱动电压为低电压；在所述第一发光时间段，控制提供至第一电极层的驱动电压为低电压，控制提供至第二电极层的驱动电压为第二高电压，控制第三电极层的驱动电压为低电压；在所述第二发光时间段，控制提供至第一电极层的驱动电压为高电压，控制提供至第二电极层的驱动电压为低电压，控制提供至第三电极层的驱动电压为第二高电压，以控制所述发光电路发出白色光。
本公开还提供了一种驱动子电路，用于为上述的发光电路中的第n电极层提供驱动电压；所述驱动子电路包括电压选择器和M个像素驱动子电路，M为正整数；
第m像素驱动子电路用于在相应的栅线输入的栅极驱动信号和第m数据线上的第m数据电压的控制下，控制将第m驱动电压输出至所述电压选择器； m为小于或等于M的正整数；
所述电压选择器用于在其选择控制端输入的选择控制信号的控制下，控制将一所述像素驱动子电路提供的驱动电压或预定驱动电压端输入的预定驱动电压提供至所述第n电极层。
可选的，所述第m像素驱动子电路包括第m驱动模块、第m数据写入模块和第m储能模块，其中，
所述第m数据写入模块的控制端与相应的栅线连接，所述第m数据写入模块的第一端与所述第m数据线连接，所述第m数据写入模块的第二端与所述第m驱动模块的控制端连接，所述第m数据写入模块用于在所述栅极驱动信号的控制下，控制将所述第m数据电压写入所述第m驱动模块的控制端；
所述第m驱动模块用于在其控制端的电位的控制下，控制将所述第m驱动电压输出至所述电压选择器；
所述第m储能模块与所述第m驱动模块的控制端连接，用于维持所述第m驱动模块的控制端的电位。
可选的，所述电压选择器包括M+1个选择开关电路；
第m选择开关电路用于在所述选择控制端输入的选择控制信号的控制下，控制将所述第m像素驱动子电路提供的第m驱动电压提供至所述第n电极层；
第M+1选择开关电路用于在所述选择控制端输入的选择控制信号的控制下，控制将预定驱动电压端输入的预定驱动电压提供至所述第n电极层。
本公开还提供了一种驱动电路，包括N个上述的驱动子电路；
第n个所述驱动子电路与发光电路包括的第n电极层连接，用于为所述第n电极层提供相应的驱动电压；
n为小于或等于N的正整数，N为大于1的整数。
可选的，本公开所述的驱动电路还包括电压提供单元；
所述电压提供单元与所述发光电路包括的第N+1电极层连接，用于为所述第N+1电极层提供相应的驱动电压。
本公开还提供了一种显示面板，包括上述发光电路。
本公开还提供了一种显示装置，包括上述的驱动电路。
附图说明
图1是本公开一些实施例所述的发光电路的结构图；
图2是本公开一些实施例所述的驱动子电路的结构图；
图3是本公开一些实施例所述的驱动子电路的结构图；
图4是本公开一些实施例所述的驱动子电路的电路图；
图5是本公开一些实施例所述的驱动子电路的结构图；
图6是像素电路的一些实施例的电路图(该像素电路的一些实施例包括本公开所述的发光电路的一些实施例以及本公开所述的驱动电路的一些实施例)；
图7A是所述像素电路的一些实施例显示青绿色时，E2接入的驱动电压和E3接入的驱动电压的时序图；
图7B是所述像素电路的一些实施例显示白色时，E1接入的驱动电压，E2接入的驱动电压和E3接入的驱动电压的时序图。
具体实施方式
下面将结合本公开一些实施例中的附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为三极管、薄膜晶体管或场效应管或其他特性相同的器件。在本公开一些实施例中，为区分晶体管除控制极之外的两极，将其中一极称为第一极，另一极称为第二极。
在实际操作时，当所述晶体管为三极管时，所述控制极可以为基极，所述第一极可以为集电极，所述第二极可以发射极；或者，所述控制极可以为基极，所述第一极可以为发射极，所述第二极可以集电极。
在实际操作时，当所述晶体管为薄膜晶体管或场效应管时，所述控制极可以为栅极，所述第一极可以为漏极，所述第二极可以为源极；或者，所述控制极可以为栅极，所述第一极可以为源极，所述第二极可以为漏极。
本公开一些实施例所述的发光电路包括N个发光层和N+1个电极层；所 述N个发光层和所述N+1个电极层层叠排布，第n发光层设置于第n电极层与第n+1电极层之间；
N为大于1的整数，n为小于或等于N的正整数。
本公开一些实施例所述的发光电路包括多个发光层，可以将多种颜色的发光层整合到一个发光电路中，通过控制所述第n电极层的电压和所述第n+1电极层的电压，可以控制所述第n发光层的发光亮度，从而使得单个发光电路可以实现全彩显示。
在本公开一些实施例中，所述发光层可以由有机发光材料制成，但不以此为限。
在本公开一些实施例中，所述电极层可以由ITO(氧化铟锡)制成，所述电极层也可以由导电性较好的金属或是金属化合物制成，但不以此为限。
在本公开一些实施例所述的发光电路中，相邻的发光层之间不需要存在最小间距，取消了相关技术的相邻的子像素之间的最小间距限制，因此可以增加发光面积，提升发光电路的寿命。
当像素包括本公开一些实施例所述的发光电路时，能够将多种颜色整合到单一像素中，因此没有子像素的概念，使得每一像素都具有全彩的显示功能，实现单个像素显示多个颜色的目的，在有限的空间内有效提升像素开口率，并可以实现高分辨率的设计。
具体的，所述N个发光层的颜色可以互不相同，但不以此为限。
可选的，N可以等于3；
所述第一发光层为红色发光层，所述第二发光层为绿色发光层，所述第三发光层为蓝色发光层；或者，
所述第一发光层为红色发光层，所述第二发光层为蓝色发光层，所述第三发光层为绿色发光层；或者，
所述第一发光层为绿色发光层，所述第二发光层为红色发光层，所述第三发光层为蓝色发光层；或者，
所述第一发光层为绿色发光层，所述第二发光层为蓝色发光层，所述第三发光层为红色发光层；或者，
所述第一发光层为蓝色发光层，所述第二发光层为绿色发光层，所述第 三发光层为红色发光层；或者，
所述第一发光层为蓝色发光层，所述第二发光层为红色发光层，所述第三发光层为绿色发光层。
在实际操作时，N不限于等于3。例如，N可以等于4，各发光层可以为红色发光层、绿色发光层、蓝色发光层、白色发光层中的一种，但不以此为限。
根据本公开所述的发光电路、驱动子电路、驱动电路和显示装置包括多个发光层，可以将多种颜色的发光层整合到一个发光电路中，通过控制所述第n电极层的电压和所述第n+1电极层的电压，可以控制所述第n发光层的发光亮度，从而使得单个发光电路可以实现全彩显示；在本发明实施例所述的发光电路中，相邻的发光层之间不需要存在最小间距，取消了现有的相邻的子像素之间的最小间距限制，因此可以增加发光面积，提升发光电路的寿命，从而能够在相同尺寸下设置更多的像素，提升显示装置中的显示面板的开口率。
如图1所示，本公开一些实施例所述的发光电路可以包括层叠排布的第一电极层E1、第一发光层EL1、第二电极层E2、第二发光层EL2、第三电极层E3、第三发光层EL3和第四电极层E4；
所述第一发光层EL1设置于第一电极层E1与第二电极层E2之间；
所述第二发光层EL2设置于第二电极层E2与第三电极层E3之间；
所述第三发光层EL3设置于第三电极层E3与第四电极层E4之间；
所述第一发光层EL1为红色发光层，所述第二发光层EL2为绿色发光层，所述第三发光层EL3为蓝色发光层。
在图1所示的发光电路的实施例中，通过改变各电极层的电压以调整各颜色发光层的发光亮度。
图1所示的发光电路的实施例可以为OLED(Organic Light-Emitting Diode，有机发光二极管)发光电路。
在图1所示的发光电路的实施例中，E1、EL1和E2组成红色发光子单元，E2、EL2和E3组成绿色发光子单元，E3、EL3和E4组成蓝色发光子单元，各颜色发光子单元间的发光驱动电压(所述发光驱动电压为各颜色发光子单元 包括的阳极层与阴极层之间的电压差)具有相关性，举例来说，第二电极层E2可以为所述红色发光子单元的阴极层，也可以为所述绿色发光子单元的阳极层。
并在图1所示的发光电路的实施例中，E1可以为所述红色发光子单元的阳极层，E3可以为所述绿色发光子单元的阴极层，也可以为所述蓝色发光子单元的阳极层；E4可以为所述蓝色发光子单元的阴极层。
当显示面板中的像素采用如图1所示的本公开一些实施例所述的发光电路，可以在相同制程限制下，使得水平分辨率提升三倍。
根据本公开所述的发光电路、驱动子电路、驱动电路和显示装置包括多个发光层，可以将多种颜色的发光层整合到一个发光电路中，通过控制所述第n电极层的电压和所述第n+1电极层的电压，可以控制所述第n发光层的发光亮度，从而使得单个发光电路可以实现全彩显示；在本发明实施例所述的发光电路中，相邻的发光层之间不需要存在最小间距，取消了现有的相邻的子像素之间的最小间距限制，因此可以增加发光面积，提升发光电路的寿命，从而能够在相同尺寸下设置更多的像素，提升显示装置中的显示面板的开口率。
本公开一些实施例所述的发光电路的点亮方法，应用于上述的发光电路，所述发光电路的点亮方法包括：
在发光阶段，分别为N+1个电极层提供相应的驱动电压，以点亮所述发光电路。
本公开一些实施例所述的发光电路的点亮方法可以通过控制所述第n电极层的电压和所述第n+1电极层的电压，以控制所述第n发光层的发光亮度，从而使得单个发光电路可以实现全彩显示。
具体的，第一发光层可以为红色发光层，第二发光层可以为绿色发光层，第三发光层为可以蓝色发光层；
所述发光电路的点亮方法可以包括：在发光阶段，
控制提供至第一电极层的驱动电压为第一高电压，控制提供至第二电极层的驱动电压为第二高电压，并控制提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出黄色光；
控制提供至第一电极层的驱动电压为第二高电压，控制提供至第二电极层的驱动电压、提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出红色光；或者，
控制提供至第二电极层的驱动电压为第二高电压，控制提供至第一电极层的驱动电压、提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出绿色光；或者，
控制提供至第三电极层的驱动电压为第二高电压，控制提供至第一电极层的、提供至第二电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出蓝色光；或者，
控制提供至第一电极层的驱动电压和提供至第三电极层的驱动电压为第二高电压，控制提供至第二电极层的驱动电压和提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出紫红色光。
可选的，所述第二高电压可以小于第一高电压，但不以此为限。
可选的，在发光阶段，当显示红色光时，需要控制提供至第一电极层的驱动电压为第二高电压；当显示绿色光时，需要控制提供至第二电极层的驱动电压为第二高电压；当显示蓝色光时，需要控制提供至第三电极层的驱动电压为第二高电压；当显示黄色光时，需要控制提供至第一电极层的驱动电压为第一高电压，控制提供至第二电极层的驱动电压为第二高电压。
具体的，第一发光层可以为红色发光层，第二发光层可以为绿色发光层，第三发光层为可以蓝色发光层；
所述发光阶段包括依次设置的多个发光子阶段；所述发光子阶段包括依次设置的第一发光时间段和第二发光时间段；所述发光电路的点亮方法包括：
在所述发光阶段，控制提供至第一电极层的驱动电压和提供至第四电极层的驱动电压为低电压；在所述第一发光时间段，控制提供至第二电极层的驱动电压为第二高电压，控制第三电极层的驱动电压为低电压；在所述第二发光时间段，控制提供至第二电极层的驱动电压为低电压，控制提供至第三电极层的驱动电压为第二高电压，以控制所述发光电路发出青绿色光；或者，
在所述发光阶段，控制提供至第四电极层的驱动电压为低电压；在所述第一发光时间段，控制提供至第一电极层的驱动电压为低电压，控制提供至 第二电极层的驱动电压为第二高电压，控制第三电极层的驱动电压为低电压；在所述第二发光时间段，控制提供至第一电极层的驱动电压为高电压，控制提供至第二电极层的驱动电压为低电压，控制提供至第三电极层的驱动电压为第二高电压，以控制所述发光电路发出白色光。
可选的，所述发光阶段可以包括多个依次设置的发光子阶段，所述发光子阶段可以包括依次设置的第一发光时间段和第二发光时间段，
当显示青绿色光时，在第一发光时间段发出绿光，在第二发光时间段发出蓝光，以在发光阶段通过混光发出青绿光；
当显示白色时，在第一发光时间段发出绿光，在第二时间段发出红光和蓝光，以在发光阶段通过混光发出白色光。
根据本公开所述的发光电路的点亮方法、驱动子电路、驱动电路和显示装置包括多个发光层，可以将多种颜色的发光层整合到一个发光电路中，通过控制所述第n电极层的电压和所述第n+1电极层的电压，可以控制所述第n发光层的发光亮度，从而使得单个发光电路可以实现全彩显示；在本发明实施例所述的发光电路中，相邻的发光层之间不需要存在最小间距，取消了现有的相邻的子像素之间的最小间距限制，因此可以增加发光面积，提升发光电路的寿命，从而能够在相同尺寸下设置更多的像素，提升显示装置中的显示面板的开口率。
本公开一些实施例所述的驱动子电路，用于为上述的发光电路中的第n电极层提供驱动电压；所述驱动子电路包括电压选择器和M个像素驱动子电路，M为正整数；
第m像素驱动子电路用于在相应的栅线输入的栅极驱动信号和第m数据线上的第m数据电压的控制下，控制将第m驱动电压输出至所述电压选择器；m为小于或等于M的正整数；
所述电压选择器用于在其选择控制端输入的选择控制信号的控制下，控制将一所述像素驱动子电路提供的驱动电压或预定驱动电压端输入的预定驱动电压提供至所述第n电极层。
本公开一些实施例所述的驱动子电路包括电压选择器和M个像素驱动子电路，各个像素驱动子电路分别提供不同的驱动电压，所述电压选择器在选 择控制信号的控制下，选择将一所述像素驱动子电路提供的驱动电压或预定驱动电压提供至第n电极层。
可选的，M的取值可以根据实际情况选定。
如图2所示，本公开一些实施例所述的驱动子电路用于为图1中的发光电路中的第一电极层提供驱动电压；M可以等于2；
如图2所示，本公开一些实施例所述的驱动子电路可以包括第一像素驱动子电路211、第二像素驱动子电路212和第一电压选择器SV1；
所述第一像素驱动子电路211分别与第一栅线G1_R、第一数据线DatalineR1和所述第一电压选择器SV1连接，用于在所述第一栅线G1_R输入的栅极驱动信号和第一数据线DatalineR1上的第一红色数据电压的控制下，控制将第一驱动电压VD1输出至所述第一电压选择器SV1；
所述第二像素驱动子电路212分别与第一栅线G1_R、第二数据线DatalineR2和所述第一电压选择器SV1连接，用于在所述第一栅线G1_R输入的栅极驱动信号和第二数据线DatalineR2上的第二红色数据电压的控制下，控制将第二驱动电压VD2输出至所述第一电压选择器SV1；
所述第一电压选择器SV1的选择控制端包括第一红色选择控制端SELECTR、第二红色选择控制端SELECTR’和第三红色选择控制端SER；
所述第一电压选择器SV1用于在第一红色选择控制端SELECTR输入的第一红色选择控制信号、第二红色选择控制端SELECTR’输入的第二红色选择控制信号和第三红色选择控制端SER输入的第三红色选择控制信号的控制下，控制将所述第一驱动电压VD1、第二驱动电压VD2或预定驱动电压端VT输入的预定驱动电压写入第一电极层。
在图2所示的实施例中，VD1可以为第一高电压V_HIGH，VD2可以为第二高电压V_Middle，V_HIGH和V_Middle可以都为高电压，V_HIGH可以大于V_Middle，但不以此为限。例如，V_HIGH可以大于或等于32V而小于或等于48V，V_Middle可以大于或等于16V而小于32V，但不以此为限。
在图2所示的实施例中，所述预定驱动电压端VT可以为地端，或者，所述预定驱动电压可以为负电压，但不以此为限。
具体的，所述第m像素驱动子电路可以包括第m驱动模块、第m数据写 入模块和第m储能模块，其中，
所述第m数据写入模块的控制端与相应的栅线连接，所述第m数据写入模块的第一端与所述第m数据线连接，所述第m数据写入模块的第二端与所述第m驱动模块的控制端连接，所述第m数据写入模块用于在所述栅极驱动信号的控制下，控制将所述第m数据电压写入所述第m驱动模块的控制端；
所述第m驱动模块用于在其控制端的电位的控制下，控制将所述第m驱动电压输出至所述电压选择器；
所述第m储能模块与所述第m驱动模块的控制端连接，用于维持所述第m驱动模块的控制端的电位。
可选的，所述第m像素驱动子电路可以包括第m驱动模块、第m数据写入模块和第m储能模块，以为所述电压选择器提供相应的驱动电压。
具体的，所述第m驱动模块可以包括第m驱动晶体管，所述第m数据写入模块可以包括第m数据写入晶体管，所述第m储能模块可以包括第m存储电容；
所述第m数据写入晶体管的控制极与相应的栅线连接，所述第m数据写入晶体管的第一极与所述第m数据线连接，所述第m数据写入晶体管的第二极与所述第m驱动晶体管的控制极连接；
所述第m驱动晶体管的第一极与第m驱动电压端连接，所述第m驱动晶体管的第二极与所述电压选择器连接；所述第m驱动电压端用于输入第m驱动电压；
所述第m存储电容的第一端与所述第m驱动晶体管的控制极连接，所述第m存储电容的第二端与所述第m驱动晶体管的第二极连接。
当m等于1时，如图3所示，所述第一像素驱动子电路可以包括第一驱动模块31、第一数据写入模块32和第一储能模块33，其中，
所述第一数据写入模块32的控制端与第一栅线G1_R连接，所述第一数据写入模块32的第一端与所述第一数据线DatalineR1连接，所述第一数据写入模块32的第二端与所述第一驱动模块31的控制端连接，所述第一数据写入模块32用于在所述第一栅线G1_R输入的栅极驱动信号的控制下，控制将所述第一数据线DatalineR1上的第一红色数据电压VDATA_RH写入所述第 一驱动模块31的控制端；
所述第一驱动模块31用于在其控制端的电位的控制下，控制将所述第一驱动电压VD1输出至所述第一电压选择器SV1；
所述第一储能模块33与所述第一驱动模块31的控制端连接，用于维持所述第一驱动模块31的控制端的电位。
如图3所示的第一像素驱动子电路的实施例在工作时，第一数据写入模块32在G1_R输入的栅极驱动信号的控制下，将VDATA_RH写入所述第一驱动模块31的控制端，所述第一驱动模块31在其控制端的电位的控制下，控制将所述VD1输出至所述第一电压选择器SV1。
如图4所示，在图3所示的第一像素驱动子电路的实施例的基础上，所述第一驱动模块31可以包括第一数据写入晶体管TR11、第一驱动晶体管TR12和第一存储电容C1；
TR11的栅极与所述第一栅线G1_R连接，TR11的漏极与所述第一数据线DatalineR1连接，TR11的源极与TR12的栅极连接；
TR12的漏极接入第一驱动电压VD1，TR12的源极与所述第一电压选择器SV1连接；
C1的第一端与TR12的栅极连接，C1的第二端与TR12的源极连接。
在图4所示的第一像素驱动子电路的实施例中，TR11和TR12都为n型薄膜晶体管，但不以此为限。
如图4所示的第一像素驱动子电路的实施例在工作时，当G1_R输入高电平信号时，TR11打开，以将DatalineR1上的第一红色数据电压VDATA_RH写入TR12的栅极，当VDATA_RH为高电平时，TR12打开，以将VD1输出至所述第一电压选择器SV1。
具体的，所述电压选择器可以包括M+1个选择开关电路；
第m选择开关电路用于在所述选择控制端输入的选择控制信号的控制下，控制将所述第m像素驱动子电路提供的第m驱动电压提供至所述第n电极层；
第M+1选择开关电路用于在所述选择控制端输入的选择控制信号的控制下，控制将预定驱动电压端输入的预定驱动电压提供至所述第n电极层。
在本公开一些实施例中，所述电压选择器可以包括M+1个选择开关电路， 第m选择开关电路在所述选择控制信号的控制下，控制将第m驱动电压提供至第n电极层，第M+1选择开关电路在所述选择控制信号的控制下，控制将预定驱动电压提供至第n电极层。
当n等于1，M等于2时，如图5所示，在图2所示的驱动子电路的实施例的基础上，所述第一电压选择器SV1可以包括第一选择开关电路51、第二选择开关电路52和第三选择开关电路53；
所述第一电压选择器SV1的选择控制端包括第一红色选择控制端SELECTR、第二红色选择控制端SELECTR’和第三红色选择控制端SER；
所述第一选择开关电路51可以包括第一红色开关晶体管TR1；所述第二选择开关电路52可以包括第二红色开关晶体管TR2；所述第三选择开关电路53可以包括第三红色开关晶体管TR3；
TR1的栅极与SELECTR连接，TR1的漏极与所述第一像素驱动子电路211的第一驱动电压输出端连接，TR1的源极与所述第一电极层连接；所述第一像素驱动子电路211通过所述第一驱动电压输出端输出所述第一驱动电压VD1；
TR2的栅极与SELECTR’连接，TR2的漏极与所述第二像素驱动子电路212的第二驱动电压输出端连接，TR2的源极与所述第一电极层连接；所述第一像素驱动子电路212通过所述第二驱动电压输出端输出所述第二驱动电压VD2；
TR3的栅极与SER连接，TR3的漏极与所述预定驱动电压端VT连接，TR3的源极与所述第一电极层连接。
在图5所示的实施例中，TR1、TR2和TR3为n型薄膜晶体管，但不以此为限。
如图5所示的驱动子电路的实施例在工作时，当SELECTR输出高电平，SELECTR’输出低电平，SER输出低电平时，TR1打开，TR2和TR3关断，所述第一像素驱动子电路211能够输出VD1至所述第一电极层；
当SELECTR输出低电平，SELECTR’输出高电平，SER输出低电平时，TR2打开，TR1和TR3关断，所述第二像素驱动子电路212能够输出VD2至所述第一电极层；
当SELECTR输出低电平，SELECTR’输出低电平，SER输出高电平时，TR3打开，TR1和TR2关断，所述预定驱动电压端VT能够输出所述预定驱动电压至所述第一电极层。
本公开一些实施例所述的驱动电路包括N个上述的驱动子电路；
第n个所述驱动子电路与发光电路包括的第n电极层连接，用于为所述第n电极层提供相应的驱动电压；
n为小于或等于N的正整数，N为大于1的整数。
具体的，本公开一些实施例所述的驱动电路还可以包括电压提供单元；
所述电压提供单元与所述发光电路包括的第N+1电极层连接，用于为所述第N+1电极层提供相应的驱动电压。
可选的，所述电压提供单元为所述第N+1电极层提供的驱动电压可以为0V、负电压或高电压，但不以此为限；并且，所述电压提供单元提供给第N+1电极层的驱动电压可以为固定电压，也可以变化。
如图6所示，本公开一些实施例所述的驱动电路的一些实施例用于为如图1所示的发光电路的实施例中的各电极层提供相应的驱动电压；
所述驱动电路包括第一驱动子电路、第二驱动子电路、第三驱动子电路和电压提供单元60；
所述第一驱动子电路包括第一像素驱动子电路211、第二像素驱动子电路212和第一电压选择器SV1；
所述第一像素驱动子电路211包括第一数据写入晶体管TR11、第一驱动晶体管TR12和第一存储电容C1；
TR11的栅极与第一栅线G1_R连接，TR11的漏极接入第一数据线DataLineR1上的第一红色数据电压VDATA_RH，TR11的源极与TR12的栅极连接；
TR12的漏极接入第一高电压V_HIGH，TR12的源极与所述第一电压选择器SV1连接；
C1的第一端与TR12的栅极连接，C1的第二端与TR12的源极连接；
TR11和TR12都为n型薄膜晶体管；
所述第二像素驱动子电路212包括第二数据写入晶体管TR21、第二驱动 晶体管TR22和第二存储电容C2；
TR21的栅极与第一栅线G1_R连接，TR21的漏极接入第二数据线DataLineR2上的第二红色数据电压VDATA_RL，TR21的源极与TR22的栅极连接；
TR22的漏极接入第二高电压V_Middle，TR22的源极与所述第一电压选择器SV1连接；
C2的第一端与TR22的栅极连接，C2的第二端与TR22的源极连接；
TR21和TR22都为n型薄膜晶体管；
所述第一电压选择器SV1包括第一选择开关电路、第二选择开关电路和第三选择开关电路；
所述第一选择开关电路包括第一红色开关晶体管TR1；所述第二选择开关电路包括第二红色开关晶体管TR2；所述第三选择开关电路包括第三红色开关晶体管TR3；
TR1的栅极与第一红色选择控制端SELECTR连接，TR1的漏极与TR22的源极连接，TR1的源极与所述第一电极层E1连接；
TR2的栅极与第二红色选择控制端SELECTR’连接，TR2的漏极与TR22的源极连接，TR2的源极与所述第一电极层E1连接；
TR3的栅极与第三红色选择控制端SER连接，TR3的漏极与地端GND连接，TR3的源极与所述第一电极层E1连接；
TR1、TR2和TR3都为n型薄膜晶体管；
所述第二驱动子电路包括第三像素驱动子电路221和第二电压选择器SV2；
所述第三像素驱动子电路221包括第三数据写入晶体管TG11、第三驱动晶体管TG11和第三存储电容C3；
TG11的栅极与第二栅线G1_G连接，TG11的漏极接入第三数据线DataLineG上的绿色数据电压VDATA_G，TG11的源极与TG12的栅极连接；
TG12的漏极接入第二高电压V_Middle，TG12的源极与所述第二电压选择器SV2连接；
C3的第一端与TG12的栅极连接，C3的第二端与TG12的源极连接；
TG11和TG12都为n型薄膜晶体管；
所述第二电压选择器SV2包括第四选择开关电路和第五选择开关电路；
所述第四选择开关电路包括第一绿色开关晶体管TG1和第二绿色开关晶体管TG2；所述第五选择开关电路包括第三绿色开关晶体管TG3和第四绿色开关晶体管TG4；
TG1的栅极与第一绿色选择控制端SELECTG连接，TG1的漏极与TG12的源极连接，TG1的源极与所述第二电极层E2连接；
TG2的栅极与第二绿色选择控制端SELECTG’连接，TG2的漏极与TG12的源极连接，TG2的源极与所述第二电极层E2连接；
TG3的栅极与第一绿色选择控制端SELECTG连接，TG3的漏极与地端GND连接，TG3的源极与所述第二电极层E2连接；
TG4的栅极与第二绿色选择控制端SELECTG’连接，TG4的漏极与地端GND连接，TG4的源极与所述第二电极层E2连接；
TG1和TG3为n型薄膜晶体管，TG2和TG4为p型薄膜晶体管；
所述第三驱动子电路包括第四像素驱动子电路231和第三电压选择器SV3；
所述第三像素驱动子电路231包括第四数据写入晶体管TB11、第四驱动晶体管TB11和第四存储电容C4；
TB11的栅极与第三栅线G1_B连接，TB11的漏极接入第四数据线DataLineB上的蓝色数据电压VDATA_B，TB11的源极与TB12的栅极连接；
TB12的漏极接入第二高电压V_Middle，TB12的源极与所述第三电压选择器SV3连接；
C4的第一端与TB12的栅极连接，C4的第二端与TB12的源极连接；
TB11和TB12都为n型薄膜晶体管；
所述第三电压选择器SV3包括第六选择开关电路和第七选择开关电路；
所述第六选择开关电路包括第一蓝色开关晶体管TB1和第二蓝色开关晶体管TB2；所述第七选择开关电路包括第三蓝色开关晶体管TB3和第四蓝色开关晶体管TB4；
TB1的栅极与第一蓝色选择控制端SELECTB连接，TB1的漏极与TB12的 源极连接，TB1的源极与所述第三电极层E3连接；
TB2的栅极与第二蓝色选择控制端SELECTB’连接，TB2的漏极与TB12的源极连接，TB2的源极与所述第三电极层E3连接；
TB3的栅极与第一蓝色选择控制端SELECTB连接，TB3的漏极与地端GND连接，TB3的源极与所述第三电极层E3连接；
TB4的栅极与第二蓝色选择控制端SELECTB’连接，TB4的漏极与地端GND连接，TB4的源极与所述第三电极层E3连接；
TB1和TB3为n型薄膜晶体管，TB2和TB4为p型薄膜晶体管；
所述电压提供单元60用于为第四电极层E4提供接地电压。
图6中的驱动电路的一些实施例以及图1中的发光电路的实施例组成了像素电路的一些实施例。
如图6所示的像素电路的一些实施例在工作时，
当E1接入V_Middle，E2、E3和E4接地时，发光电路发出红色光；
当E2接入V_Middle，E1、E3和E4接地时，发光电路发出绿色光；
当E3接入V_Middle，E1、E2和E4接地时，发光电路发出蓝色光；
当E1接入V_HIGH，E2接入V_Middle，E3和E4接地时，发光电路发出黄色光；
当E1和E3接入V_Middle，E2和E4接地时，发光电路发出紫红色光；
当E1和E4接地，E2接入的驱动电压和E3接入的驱动电压如图7A所示时，发光电路发出青绿光；
当E4接地，E1接入的驱动电压，E2接入的驱动电压和E3接入的驱动电压如图7B所示时，发光电路发出白色光。
如图7A所示，E2间隔接入第二高电压、低电压，E3间隔接入低电压、第二高电压；
如图7B所示，E1间隔接入低电压、第二高电压，E2间隔接入第二高电压、低电压，E3间隔接入低电压、第二高电压；
所述低电压可以为接地电压，但不以此为限。
当所述的像素电路的一些实施例显示青绿色光时，可以将发光阶段分为依次设置的多个发光子阶段，所述发光子阶段包括依次设置的第一发光时间 段和第二发光时间段，在第一发光时间段显示蓝色，在第二发光时间段显示绿光，通过高速切换驱动电压，以混色呈青绿色。
当所述的像素电路的一些实施例显示白色光时，需要三种颜色的发光层都发光，因此将发光阶段分为依次设置的多个发光子阶段，所述发光子阶段包括依次设置的第一发光时间段和第二发光时间段，在所述第一发光时间段显示绿色，在所述第二发光时间段显示红色和蓝色，通过高速切换驱动电压，以混色为白色。
如图7A所示，所述发光阶段包括依次设置的第一发光子阶段S1、第二发光子阶段S2和第三发光子阶段S3；
所述第一发光子阶段S1包括的第一发光时间段标示为S11，所述第一发光子阶段S1包括的第二发光时间段标示为S12；所述第二发光子阶段S2包括的第一发光时间段标示为S21，所述第二发光子阶段S2包括的第二发光时间段标示为S22；所述第三发光子阶段S3包括的第一发光时间段标示为S31，所述第三发光子阶段S3包括的第二发光时间段标示为S32；
在S11、S21和S31，E2接入第二高电压，E3接入低电压；在S12、S22和S32，E2接入低电压，E2接入第二高电压；在所述发光阶段，E1和E4都接入低电压，以发出青绿色光。
如图7B所示，所述发光阶段包括依次设置的第一发光子阶段S1、第二发光子阶段S2和第三发光子阶段S3；
所述第一发光子阶段S1包括的第一发光时间段标示为S11，所述第一发光子阶段S1包括的第二发光时间段标示为S12；所述第二发光子阶段S2包括的第一发光时间段标示为S21，所述第二发光子阶段S2包括的第二发光时间段标示为S22；所述第三发光子阶段S3包括的第一发光时间段标示为S31，所述第三发光子阶段S3包括的第二发光时间段标示为S32；
在S11、S21和S31，E1接入低电压，E2接入第二高电压，E3接入低电压；在S12、S22和S32，E1接入第二高电压，E2接入低电压，E2接入第二高电压；在所述发光阶段，E4接入低电压，以发出白光。
图7A和图7B仅用于示例，在实际操作时，所述发光阶段包括的发光子阶段的个数可以为任一大于1的整数。
采用本公开一些实施例所述的驱动电路和本公开一些实施例所述的发光电路的像素电路将三原色的有机发光器件做在同一像素中，通过电压选择器改变各个电极层的电压，通过该电压来调整每个颜色的发光层的发光亮度。
采用本公开一些实施例所述的驱动电路和本公开一些实施例所述的发光电路的像素电路通过像素驱动子电路和电压选择器的搭配，可以控制各个电极层的电压，达到显示全彩的效果，其中的颜色可以进行调换，像素驱动子电路的结构和各电压选择器的结构也不限于以上例举出的结构。
采用本公开一些实施例所述的驱动电路和本公开一些实施例所述的发光电路的像素电路为了达到高分辨率的目的，可以将新型像素放入传统子像素的排布上，由于新型像素即可显示全彩的颜色，因此在相同制程限制下，水平分辨率提升3倍，分辨率快速跃升。
采用本公开一些实施例所述的驱动电路和本公开一些实施例所述的发光电路的像素电路采用新型的像素排布设计，将三种颜色都整合到单一像素中，因此没有子像素的概念，每个像素都有全彩的显示功能。在相同的分辨率的设计下，新型像素排布因为少了子像素间的最小间距限制，因此可以增加发光的面积，有效提升OLED(有机发光二极管)的器件寿命。
本公开一些实施例的所述显示面板包括上述发光电路。
本公开一些实施例所述的显示装置包括上述的驱动电路。
本公开一些实施例所提供的显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述是本公开的一些实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (15)

  1. 一种发光电路，包括N个发光层和N+1个电极层；所述N个发光层和所述N+1个电极层层叠排布，第n发光层设置于第n电极层与第n+1电极层之间；
    N为大于1的整数，n为小于或等于N的正整数。
  2. 如权利要求1所述的发光电路，其中，所述N个发光层的颜色互不相同。
  3. 如权利要求1或2所述的发光电路，其中，N等于3；
    第一发光层为红色发光层，第二发光层为绿色发光层，第三发光层为蓝色发光层；或者，
    所述第一发光层为红色发光层，所述第二发光层为蓝色发光层，所述第三发光层为绿色发光层；或者，
    所述第一发光层为绿色发光层，所述第二发光层为红色发光层，所述第三发光层为蓝色发光层；或者，
    所述第一发光层为绿色发光层，所述第二发光层为蓝色发光层，所述第三发光层为红色发光层；或者，
    所述第一发光层为蓝色发光层，所述第二发光层为绿色发光层，所述第三发光层为红色发光层；或者，
    所述第一发光层为蓝色发光层，所述第二发光层为红色发光层，所述第三发光层为绿色发光层。
  4. 如权利要求1所述的发光电路，其中，所述N个发光层和所述N+1个电极层交替排布。
  5. 如权利要求4所述的发光电路，包括3个发光层和4个电极层；
    其中，所述3个发光层分别为第一发光层、第二发光层和第三发光层；所述4个电极层分别为第一电极层、第二电极层、第三电极层和第四电极层；
    其中，所述第一电极层、第一发光层和第二电极层形成用于发出第一种颜色的光的第一发光子电路；
    所述第二电极层、第二发光层和第三电极层形成用于发出第二种颜色的 光的第二发光子电路；
    所述第三电极层、第三发光层和第四电极层形成用于发出第三种颜色的光的第三发光子电路。
  6. 一种发光电路的点亮方法，应用于如权利要求1至5中任一权利要求所述的发光电路，，其中，所述发光电路的点亮方法包括：
    在发光阶段，分别为N+1个电极层提供相应的驱动电压，以点亮所述发光电路。
  7. 如权利要求6所述的发光电路的点亮方法，其中，第一发光层为红色发光层，第二发光层为绿色发光层，第三发光层为蓝色发光层；
    所述发光电路的点亮方法包括：在发光阶段，
    控制提供至第一电极层的驱动电压为第一高电压，控制提供至第二电极层的驱动电压为第二高电压，并控制提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出黄色光；
    控制提供至第一电极层的驱动电压为第二高电压，控制提供至第二电极层的驱动电压、提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出红色光；或者，
    控制提供至第二电极层的驱动电压为第二高电压，控制提供至第一电极层的驱动电压、提供至第三电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出绿色光；或者，
    控制提供至第三电极层的驱动电压为第二高电压，控制提供至第一电极层的、提供至第二电极层的驱动电压以及提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出蓝色光；或者，
    控制提供至第一电极层的驱动电压和提供至第三电极层的驱动电压为第二高电压，控制提供至第二电极层的驱动电压和提供至第四电极层的驱动电压为低电压，以使得所述发光电路发出紫红色光。
  8. 如权利要求6所述的发光电路的点亮方法，其中，第一发光层为红色发光层，第二发光层为绿色发光层，第三发光层为蓝色发光层；
    所述发光阶段包括依次设置的多个发光子阶段；所述发光子阶段包括依次设置的第一发光时间段和第二发光时间段；所述发光电路的点亮方法包括：
    在所述发光阶段，控制提供至第一电极层的驱动电压和提供至第四电极层的驱动电压为低电压；在所述第一发光时间段，控制提供至第二电极层的驱动电压为第二高电压，控制第三电极层的驱动电压为低电压；在所述第二发光时间段，控制提供至第二电极层的驱动电压为低电压，控制提供至第三电极层的驱动电压为第二高电压，以控制所述发光电路发出青绿色光；或者，
    在所述发光阶段，控制提供至第四电极层的驱动电压为低电压；在所述第一发光时间段，控制提供至第一电极层的驱动电压为低电压，控制提供至第二电极层的驱动电压为第二高电压，控制第三电极层的驱动电压为低电压；在所述第二发光时间段，控制提供至第一电极层的驱动电压为高电压，控制提供至第二电极层的驱动电压为低电压，控制提供至第三电极层的驱动电压为第二高电压，以控制所述发光电路发出白色光。
  9. 一种驱动子电路，用于为如权利要求1至5中任一权利要求所述的发光电路中的第n电极层提供驱动电压的驱动子电路，包括电压选择器和M个像素驱动子电路，M为正整数；
    第m像素驱动子电路用于在相应的栅线输入的栅极驱动信号和第m数据线上的第m数据电压的控制下，控制将第m驱动电压输出至所述电压选择器；m为小于或等于M的正整数；
    所述电压选择器用于在其选择控制端输入的选择控制信号的控制下，控制将一所述像素驱动子电路提供的驱动电压或预定驱动电压端输入的预定驱动电压提供至所述第n电极层。
  10. 如权利要求9所述的驱动子电路，其中，所述第m像素驱动子电路包括第m驱动模块、第m数据写入模块和第m储能模块，其中，
    所述第m数据写入模块的控制端与相应的栅线连接，所述第m数据写入模块的第一端与所述第m数据线连接，所述第m数据写入模块的第二端与所述第m驱动模块的控制端连接，所述第m数据写入模块用于在所述栅极驱动信号的控制下，控制将所述第m数据电压写入所述第m驱动模块的控制端；
    所述第m驱动模块用于在其控制端的电位的控制下，控制将所述第m驱动电压输出至所述电压选择器；
    所述第m储能模块与所述第m驱动模块的控制端连接，用于维持所述第 m驱动模块的控制端的电位。
  11. 如权利要求9或10所述的驱动子电路，其中，所述电压选择器包括M+1个选择开关电路；
    第m选择开关电路用于在所述选择控制端输入的选择控制信号的控制下，控制将所述第m像素驱动子电路提供的第m驱动电压提供至所述第n电极层；
    第M+1选择开关电路用于在所述选择控制端输入的选择控制信号的控制下，控制将预定驱动电压端输入的预定驱动电压提供至所述第n电极层。
  12. 一种驱动电路，包括N个如权利要求9至11中任一权利要求所述的驱动子电路；
    第n个所述驱动子电路与发光电路包括的第n电极层连接，用于为所述第n电极层提供相应的驱动电压；
    n为小于或等于N的正整数，N为大于1的整数。
  13. 如权利要求12所述的驱动电路，还包括电压提供单元；
    所述电压提供单元与所述发光电路包括的第N+1电极层连接，用于为所述第N+1电极层提供相应的驱动电压。
  14. 一种显示面板，包括如权利要求1所述的发光电路。
  15. 一种显示装置，包括如权利要求12或13所述的驱动电路。
PCT/CN2020/087251 2019-05-05 2020-04-27 发光电路及其点亮方法、驱动子电路、驱动电路、显示面板和显示装置 WO2020224473A1 (zh)

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