WO2018082325A1 - 一种有机发光二极管驱动电路、阵列基板和显示装置 - Google Patents

一种有机发光二极管驱动电路、阵列基板和显示装置 Download PDF

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WO2018082325A1
WO2018082325A1 PCT/CN2017/090971 CN2017090971W WO2018082325A1 WO 2018082325 A1 WO2018082325 A1 WO 2018082325A1 CN 2017090971 W CN2017090971 W CN 2017090971W WO 2018082325 A1 WO2018082325 A1 WO 2018082325A1
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thin film
compensation
compensation thin
film transistors
film transistor
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PCT/CN2017/090971
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English (en)
French (fr)
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林奕呈
李全虎
盖翠丽
张保侠
王龙彦
王玲
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京东方科技集团股份有限公司
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Priority to US15/736,519 priority Critical patent/US10607545B2/en
Publication of WO2018082325A1 publication Critical patent/WO2018082325A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0204—Compensation of DC component across the pixels in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an organic light emitting diode driving circuit, an array substrate, and a display device.
  • AMOLED Active-Matrix Organic Light Emitting Diode
  • AMOLED display devices have gradually expanded in the market, with ultra-high contrast, ultra-thin thickness, ultra-wide color gamut, and good viewing angle.
  • the ultra-fast reaction speed and the characteristics of super-curvature deflection make the AMOLED display device have great potential and market future.
  • the AMOLED display device includes an organic light emitting diode array substrate, and the organic light emitting diode array substrate further includes an organic light emitting diode and a driving TFT (Thin Film Transistor) for driving the organic light emitting diode.
  • the threshold voltage (Vth) of the driving thin film transistor is prone to occur.
  • Drift, especially Oxide (oxide) TFTs, requires an external electrical compensation mechanism to complement this defect in the TFT, making the display of the AMOLED display device more perfect.
  • the external electrical compensation mechanism needs sufficient time and charging speed to have the best compensation effect.
  • Sense line RC Resistance-Capacitance
  • the present disclosure provides an organic light emitting diode driving circuit, an array substrate, and a display device for solving the problem that the charging rate of the Sense line in the driving circuit of the organic light emitting diode is slow or insufficient, resulting in poor compensation effect.
  • an organic light emitting diode driving circuit including:
  • each driving thin film transistor for driving the organic light emitting diodes to emit light, each driving thin film transistor corresponding to an organic light emitting diode, a source of the driving thin film transistor being connected to the power source, and a drain connected to the corresponding organic light emitting diode;
  • each of the compensation thin film transistors corresponds to a driving thin film transistor, and a source electrode of the compensation thin film transistor is connected to a compensation signal line
  • the drain electrode of the compensation thin film transistor is connected to the drain electrode of the corresponding driving thin film transistor
  • the plurality of compensation thin film transistors are divided into a plurality of groups, wherein each group includes at least two compensation thin film transistors, the corresponding sub-pixels of the at least two compensation thin film transistors are adjacent, and the at least two compensation thin film transistors share a gate electrode And the source electrode, the common source electrode is connected to the same compensation signal line.
  • each group includes two compensation thin film transistors, and the two compensation thin film transistors belonging to the same group are located between the drain electrodes of the two compensation thin film transistors, and are opposite to the two drain electrodes.
  • the two compensation thin film transistors share one active layer.
  • the active layers of the two compensation thin film transistors are separately disposed.
  • each set includes four compensation thin film transistors.
  • the four compensation thin film transistors comprise a first compensation thin film transistor, a second compensation thin film transistor, a third compensation thin film transistor and a fourth compensation thin film transistor, wherein the first compensation thin film transistor and the second compensation thin film transistor share One active layer, and the third compensation thin film transistor and the fourth compensation thin film transistor share another active layer.
  • the active layers of the four compensation thin film transistors are separately disposed.
  • the sub-pixels corresponding to the four compensation thin film transistors are arranged in two rows and two columns.
  • the source electrode is located between the drain electrodes of the four compensation thin film transistors, and is opposite to the four drain electrodes.
  • the four compensation thin film transistors belonging to the same group respectively correspond to a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • the drain electrode of the compensation thin film transistor is connected to the gate electrode of the corresponding driving thin film transistor through a capacitor.
  • the present disclosure also provides an organic light emitting diode array substrate comprising: an organic light emitting diode and a driving circuit for driving the organic light emitting diode, wherein the driving circuit is the above driving circuit.
  • the present disclosure also provides an organic light emitting diode display device including the above organic light emitting diode array substrate.
  • Two or more than two compensation thin film transistors share a gate electrode and a source electrode, and are connected to the same compensation signal line, and are disposed separately from the plurality of compensation thin film transistors in the related art (ie, the compensation gate transistors do not share a gate electrode, Compared with the driving circuit of the source electrode, since the number of the source electrode and the gate electrode is reduced, the overlapping area of the source electrode and the gate electrode is reduced, and the parasitic capacitance between the source electrode and the gate electrode of the compensation thin film transistor is reduced. At the same time, the overlap area of the compensation signal line is also reduced, thereby reducing the C (capacitance) in the RC Loading on the compensation signal line, and the charging speed of the compensation signal line can be improved to achieve the expected compensation effect.
  • FIG. 1 is a schematic diagram of a circuit structure of an organic light emitting diode array substrate in the related art
  • FIG. 2 is a schematic structural diagram of an organic light emitting diode driving circuit according to an embodiment of the present disclosure
  • FIG. 3 is a schematic structural diagram of an organic light emitting diode driving circuit according to another embodiment of the present disclosure.
  • FIG. 5 is a schematic structural diagram of an OLED array substrate according to an embodiment of the present disclosure.
  • FIG. 6 is a simulation result of the influence of the compensation line RC loading on the charging capability of the OLED array substrate of FIGS. 4 and 5 in the sense phase. schematic diagram;
  • FIG. 7 is a schematic structural diagram of an organic light emitting diode array substrate according to another embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram showing simulation results of the effect of the compensation signal line RC load on the charging capability of the organic light emitting diode array substrate in the design of FIG. 7 and the related art;
  • FIG. 9 is a schematic diagram of driving signals of an organic light emitting diode driving circuit according to an embodiment of the present disclosure.
  • an organic light emitting diode array substrate includes an OLED (Organic Light-Emitting Diode) and a driving circuit for driving the OLED.
  • the driving circuit includes: a driving thin film transistor T1, a switching thin film transistor T2 and a capacitor Cst.
  • the driving circuit further includes: a compensation thin film transistor T3, the gate electrode of the compensation thin film transistor T3 is connected to the Sense Scan (induction scan) signal, the source electrode is connected to the Sense (sensing) signal through a Sense line (the compensation signal line), and the drain electrode is connected to the anode of the OLED.
  • the switch scan signal can be represented as Switch Scan
  • the data signal can be represented as Data
  • OVDD is working.
  • OVSS is the ground voltage
  • D, G, and S are circuit nodes.
  • an organic light emitting diode driving circuit including:
  • each driving thin film transistor for driving the organic light emitting diodes to emit light, each driving thin film transistor corresponding to an organic light emitting diode, a source of the driving thin film transistor being connected to the power source, and a drain connected to the corresponding organic light emitting diode;
  • each of the compensation thin film transistors corresponds to a driving thin film transistor, and a source electrode of the compensation thin film transistor is connected to a compensation signal line (ie, Sense line), a drain electrode of the compensation thin film transistor is connected to a drain electrode of a corresponding driving thin film transistor;
  • a compensation signal line ie, Sense line
  • the plurality of compensation thin film transistors are divided into a plurality of groups, wherein each of the plurality of compensation thin film transistors includes at least two compensation thin film transistors, the sub-pixels corresponding to the at least two compensation thin film transistors are adjacent, and the at least two compensations are
  • the thin film transistor shares a gate electrode and a source electrode, and the common source electrode is connected to the same compensation signal line.
  • two or more than two compensation thin film transistors share a gate electrode and a source electrode, and are connected to the same compensation signal line, and are disposed separately from the plurality of compensation thin film transistors in the related art (ie, the compensation film Compared with the driving circuit in which the gate electrode is not shared between the transistors and the source electrode, since the number of the source electrode and the gate electrode is reduced, the overlapping area of the source electrode and the gate electrode is reduced, and the source electrode of the compensation thin film transistor is reduced.
  • the parasitic capacitance between the gate electrode and the gate electrode also reduces the overlap area of the compensation signal line, thereby reducing the C (capacitance) in the RC Loading on the compensation signal line, and improving the charging speed of the compensation signal line to the expected level.
  • the compensation effect is also reduced.
  • the gate electrode, the source electrode, and the compensation signal line are all made of metal.
  • the compensation signal line is parallel to the data line.
  • the sub-pixels mentioned in the above embodiments may be adjacent to each other in the row direction or adjacent to each other in the column direction.
  • the array substrate in the embodiment of the present disclosure includes a plurality of sub-pixels, each sub-pixel including an organic light emitting diode and the above driving circuit.
  • FIG. 2 is a schematic structural diagram of an organic light emitting diode driving circuit according to an embodiment of the present disclosure.
  • a plurality of compensation thin film transistors are divided into multiple groups, and each group of compensation thin film transistors includes two compensation thin film transistors. (compensating the thin film transistor 200A and the compensating thin film transistor 200B), wherein the sub-pixels corresponding to the compensating thin film transistor 200A and the compensating thin film transistor 200B are adjacent, and the compensating thin film transistor 200A and the compensating thin film transistor 200B share the gate electrode 201 and the source electrode 205, which are common.
  • the source electrode 205 is connected to the same compensation signal line 206.
  • drain electrode 204 of the compensation thin film transistor 200A is connected to the drain electrode of its corresponding driving thin film transistor (not shown) to compensate the drain electrode 203 of the thin film transistor 200B and its corresponding driving.
  • a drain electrode of a thin film transistor (not shown) is connected.
  • 202 is an active layer.
  • the compensation thin film transistor 200A and the compensation thin film transistor 200B share the active layer 202.
  • the compensation thin film transistor 200A and the compensation The thin film transistor 200B may also not share the active layer, that is, the active layers of the two thin film transistors may be separately provided.
  • the two compensation thin film transistors share a gate electrode and a source electrode, and are connected to the same compensation signal line, which are separately disposed from the plurality of compensation thin film transistors in the related art (that is, the compensation thin film transistors are not shared between the two.
  • the compensation thin film transistors are not shared between the two.
  • the overlapping area of the source electrode and the gate electrode is reduced, and the parasitic between the source electrode and the gate electrode of the thin film transistor is compensated.
  • the capacitance is reduced by half.
  • the overlap area of the compensation signal line is also reduced, thereby reducing the C (capacitance) in the RC Loading on the compensation signal line, and the charging speed of the compensation signal line can be improved to achieve the expected compensation effect.
  • the source electrodes are located between the drain electrodes of the two compensation thin film transistors, and are opposite to the two drain electrodes, thereby ensuring two compensations. Good operation of thin film transistors.
  • the source electrode is the same distance from the drain electrode of the two compensation thin film transistors.
  • FIG. 3 is a schematic structural diagram of an organic light emitting diode driving circuit according to another embodiment of the present disclosure.
  • a plurality of compensation thin film transistors are divided into multiple groups, and each group of compensation thin film transistors includes four compensation films.
  • a transistor (a compensation thin film transistor 200A, a compensation thin film transistor 200B, a compensation thin film transistor 200C, and a compensation thin film transistor 200D), wherein the compensation thin film transistor 200A, the compensation thin film transistor 200B, the compensation thin film transistor 200C, and the compensation thin film transistor
  • the sub-pixels corresponding to the 200D are adjacent to each other, and the compensation thin film transistor 200A, the compensation thin film transistor 200B, the compensation thin film transistor 200C, and the compensation thin film transistor 200D share the gate electrode 201 and the source electrode 205, and the common source electrode 205 is connected to the same compensation signal line 206.
  • the drain electrodes (the drain electrode 203, the drain electrode 204, the drain electrode 207, and the drain electrode 208) corresponding to the four compensation thin film transistors are all connected to the drain electrodes of their corresponding driving thin film transistors (not shown).
  • 202 is an active layer.
  • the compensation thin film transistor 200A and the compensation thin film transistor 200B share the active layer 202A
  • the compensation thin film transistor 200C and the compensation thin film transistor 200D share the active layer 202B.
  • the active layers of the four compensation thin film transistors may also be other types of arrangements. For example, none of the four compensation thin film transistors share the active layer, or the four compensation thin film transistors share one.
  • the four compensation thin film transistors share a gate electrode and a source electrode, and are connected to the same compensation signal line, which are separately disposed from the plurality of compensation thin film transistors in the related art (ie, the compensation thin film transistors are not shared between the transistors).
  • the compensation thin film transistors are not shared between the transistors.
  • the overlapping area of the source electrode and the gate electrode is reduced, and the parasitic between the source electrode and the gate electrode of the thin film transistor is compensated.
  • the capacitance is reduced by three-quarters.
  • the overlap area of the compensation signal line is reduced, thereby reducing the C (capacitance) in the RC Loading on the compensation signal line, which can increase the charging speed of the compensation signal line and achieve the desired speed. Compensation effect.
  • the source electrode is located between the drain electrodes of the four compensation thin film transistors, and is opposite to the four drain electrodes, thereby ensuring that the four compensation thin film transistors are good. Work.
  • the distance between the source electrode and the four drain electrodes is the same.
  • the sub-pixels corresponding to the four compensation thin film transistors belonging to the same group are arranged in two rows and two columns.
  • the four compensation thin film transistors belonging to the same group respectively correspond to a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • FIG. 1 The overall structure of the driving circuit of each sub-pixel in the embodiment of the present disclosure can be seen in FIG. 1 , which is different from the related art in compensating the thin film transistor T3 and the driving circuit of the adjacent sub-pixel.
  • the compensation thin film crystal T3 shares the gate electrode and the source electrode.
  • the embodiment of the present disclosure further provides an organic light emitting diode array substrate, comprising: an organic light emitting diode and a driving circuit for driving the organic light emitting diode, wherein the driving circuit is the driving circuit in any of the above embodiments.
  • the embodiment of the present disclosure further provides an organic light emitting diode display device including the above organic light emitting diode array substrate.
  • FIG. 4 is a schematic structural diagram of an organic light emitting diode array substrate according to the related art.
  • FIG. 5 is a schematic structural diagram of an organic light emitting diode array substrate according to an embodiment of the present disclosure.
  • the OLED array substrate of FIG. 4 and FIG. 5 each includes a plurality of OLEDs and a driving circuit for driving the OLED, and the driving circuit includes: a driving thin film transistor T1, a switching thin film transistor T2, a capacitor Cst, and a compensation thin film transistor T3, and compensation
  • the gate electrode of the thin film transistor T3 is connected to a Sense Scan signal
  • the source electrode is connected to the Sense signal through a Sense line
  • the drain electrode is connected to the anode of the corresponding OLED.
  • the switch scan signal can be expressed as Switch Scan
  • the data signal can be represented as Data
  • OVDD is the operating voltage
  • the specific connection relationship of the circuit is shown in Figure 1.
  • each of the organic light emitting diodes corresponds to a compensation thin film transistor T3, and each of the compensation thin film transistors T3 includes a gate electrode 401, an active layer 402, a source electrode 403, and a drain electrode 404.
  • the compensation thin film transistors T3 corresponding to the respective organic light emitting diodes are each independent.
  • each of the organic light emitting diodes corresponds to a compensation thin film transistor T3, and each of the compensation thin film transistors T3 includes a gate electrode 501, an active layer 502, a source electrode 503, and a drain electrode 504. .
  • the plurality of compensation thin film transistors T3 are divided into a plurality of groups, each of the compensation thin film transistors includes two compensation thin film transistors T3, and the two compensation thin film transistors T3 belonging to the same group share the source electrode 503 and the gate electrode 501, and the source electrode 503 is connected to the same strip. Compensation signal line.
  • the two compensation thin film transistors T3 located on the left side of the sense line belong to the same group, and the two compensation thin film transistors T3 located on the right side of the sense line belong to the same group.
  • the overlapping area of the source electrode and the gate electrode is reduced, and the source of the thin film transistor is compensated.
  • the parasitic capacitance between the electrode and the gate electrode is reduced by half, and the overlap area of the compensation signal line is also reduced, thereby reducing the C (capacitance) in the RC Loading on the compensation signal line, and improving the charging of the compensation signal line. Speed, to achieve the expected compensation effect.
  • FIG. 6 is a schematic diagram showing simulation results of the effect of the compensation signal line RC load on the charging capability of the organic light emitting diode array substrate in FIG. 4 and FIG. 5.
  • the abscissa is the compensation time.
  • the ordinate is the compensation voltage (Sense V)
  • C is the capacitance of the sense line.
  • the organic light emitting diode display device of the embodiment of the present disclosure can greatly increase the charging rate of the sense line, Better compensation.
  • FIG. 7 is a schematic structural diagram of an organic light emitting diode array substrate according to another embodiment of the present disclosure.
  • the OLED array substrate of FIG. 7 includes a plurality of OLEDs and a driving circuit for driving the OLED, the driving circuit comprising: a driving thin film transistor T1, a switching thin film transistor T2, a capacitor Cst, and a compensation thin film transistor T3, and a compensation thin film transistor T3.
  • the gate electrode is connected to the Sense Scan signal
  • the source electrode is connected to the Sense signal through the Sense line
  • the drain electrode is connected to the anode of the corresponding OLED.
  • the switch scan signal can be expressed as Switch Scan
  • the data signal can be represented as Data
  • OVDD is the working voltage
  • the specific connection relationship of the circuit is shown in Figure 1.
  • each of the organic light emitting diodes corresponds to a compensation thin film transistor T3
  • each of the compensation thin film transistors T3 includes a gate electrode 501 , an active layer 502 , a source electrode 503 , and a drain electrode 504 .
  • the plurality of compensation thin film transistors T3 are divided into a plurality of groups, each of the compensation thin film transistors includes four compensation thin film transistors T3, and the four compensation thin film transistors T3 belonging to the same group share the source electrode 803 and the gate electrode 801, and the source electrode 803 is connected to the same strip. Compensation signal line.
  • each of the organic light emitting diodes corresponds to one sub-pixel, and the four organic light emitting diodes shown in FIG. 7 respectively correspond to four sub-pixels of R, G, B, and W.
  • the overlapping area of the source electrode and the gate electrode is reduced, and the parasitic between the source electrode and the gate electrode of the thin film transistor is compensated.
  • the capacitance is reduced by three-quarters.
  • the overlap area of the compensation signal line is reduced, thereby reducing the C (capacitance) in the RC Loading on the compensation signal line, which can increase the charging speed of the compensation signal line and achieve the desired speed. Compensation effect.
  • FIG. 8 is a schematic diagram showing simulation results of the effect of the compensation signal line RC load on the charging capability of the organic light emitting diode array substrate in the design of FIG. 7 and the related art.
  • the abscissa For the Sense time the ordinate is the compensation voltage (Sense V)
  • C the capacitance of the sense line.
  • the organic light emitting diode display device of the embodiment of the present disclosure can greatly increase the sense line charging. Rate, get better compensation effect.
  • FIG. 9 The connection relationship of the organic light emitting diode driving circuit in the embodiment of the present disclosure can be seen in FIG. 1.
  • the working process of the driving circuit is generally divided into three stages: a Sense stage, a Compensation stage, and Emission stage, in the Sense stage: Open G1, G2 charges the sense TFT, Compensation stage: adjust the data value according to the sense result, complete the compensation, Emission stage: charge to the set Vgs, turn off G1, G2 and then emit.
  • V_BLANKING refers to a stage in which the display screen does not emit light for a short period of time in one cycle.
  • the active area refers to the normal illumination stage, G1(n) is a G1 wave type, and G2(n) is a G2 wave.
  • Type VGm is the maximum value of the Data voltage, VG0 is the minimum value of the Data voltage, TR is the Reset Time, Tc is the Charging Time, TH is the Holding Time, and VSENSE is the value charged by the sense floating, VREFL When the sense is not floating, the input reference voltage is usually grounded.

Abstract

一种有机发光二极管（OLED）驱动电路、阵列基板和显示装置，有机发光二极管（OLED）驱动电路包括：多个驱动薄膜晶体管（T1）和多个补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D），补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D）用于对驱动薄膜晶体管（T1）的阈值电压（Vth）进行补偿；每一补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D）对应一驱动薄膜晶体管（T1），补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D）的源电极（205, 503）连接一补偿信号线（206），漏电极（203, 204, 207, 208, 504）与对应的驱动薄膜晶体管（T1）的漏电极连接；多个补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D）分成多组，每一组包括至少两个补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D），该至少两个补偿薄膜晶体管（T3, 200A, 200B, 200C, 200D）共用栅电极（201, 501）和源电极（205, 503），并连接同一条补偿信号线（206）。

Description

一种有机发光二极管驱动电路、阵列基板和显示装置
相关申请的交叉引用
本申请主张在2016年11月2日在中国提交的中国专利申请No.201610945414.0的优先权，其全部内容通过引用包含于此。
技术领域
本公开文本涉及显示技术领域，尤其涉及一种有机发光二极管驱动电路、阵列基板和显示装置。
背景技术
近几年来，AMOLED(Active-Matrix Organic Light Emitting Diode，有源有机发光二极管)显示装置渐渐在市场上拓展开来，其超高对比度，超薄厚度，超广色域，良好的大视角观赏体验，超快反应速度，及可超大曲率挠曲等特性，使得AMOLED显示装置有很大的潜力及市场未来。
AMOLED显示装置包括有机发光二极管阵列基板，有机发光二极管阵列基板又包括有机发光二极管以及用于驱动有机发光二极管的驱动TFT(Thin Film Transistor，薄膜晶体管)，驱动薄膜晶体管的阈值电压(Vth)容易发生漂移，尤其是Oxide(氧化物)TFT，因而需要外部电学补偿机制补足TFT的此缺陷，使AMOLED显示装置的显示更完美。
外部电学补偿机制需要有足够的时间以及充电速度才有最佳的补偿效果，然而随著显示装置尺寸的增加，分辨率的提升，Sense line的RC(Resistance-Capacitance，电阻电容)Loading(负载)也大幅上升，造成Sense line充电速率缓慢或充电不足，达不到想要的补偿效果。
发明内容
有鉴于此，本公开文本提供一种有机发光二极管驱动电路、阵列基板和显示装置，用于解决有机发光二极管的驱动电路中的Sense line充电速率缓慢或充电不足，造成补偿效果差的问题。
为解决上述技术问题，本公开文本提供一种有机发光二极管驱动电路，包括：
多个驱动薄膜晶体管，用于驱动有机发光二极管发光，每一驱动薄膜晶体管对应一有机发光二极管，所述驱动薄膜晶体管的源极与电源连接，漏极与对应的有机发光二极管连接；
多个补偿薄膜晶体管，用于对所述驱动薄膜晶体管的阈值电压进行补偿；其中，每一所述补偿薄膜晶体管对应一驱动薄膜晶体管，所述补偿薄膜晶体管的源电极连接一补偿信号线，所述补偿薄膜晶体管的漏电极与对应的驱动薄膜晶体管的漏电极连接；
所述多个补偿薄膜晶体管分成多组，其中，每一组包括至少两个补偿薄膜晶体管，所述至少两个补偿薄膜晶体管对应的亚像素相邻，所述至少两个补偿薄膜晶体管共用栅电极和源电极，共用的所述源电极连接同一条所述补偿信号线。
可选地，每一组包括两个补偿薄膜晶体管，属于同一组的两个补偿薄膜晶体管中，源电极位于两个补偿薄膜晶体管的漏电极之间，与两个漏电极均相对。
可选地，所述两个补偿薄膜晶体管共用一个有源层。
可选地，所述两个补偿薄膜晶体管的有源层分开设置。
可选地，每一组包括四个补偿薄膜晶体管。
可选地，所述四个补偿薄膜晶体管包括第一补偿薄膜晶体管、第二补偿薄膜晶体管、第三补偿薄膜晶体管和第四补偿薄膜晶体管，所述第一补偿薄膜晶体管和第二补偿薄膜晶体管共用一个有源层，并且所述第三补偿薄膜晶体管和第四补偿薄膜晶体管共用另一个有源层。
可选地，所述四个补偿薄膜晶体管的有源层分开设置。
可选地，所述四个补偿薄膜晶体管对应的亚像素呈两行两列方式排列。
可选地，属于同一组的四个补偿薄膜晶体管中，源电极位于四个补偿薄膜晶体管的漏电极之间，与四个漏电极均相对。
可选地，属于同一组的四个补偿薄膜晶体管分别对应红色亚像素、绿色亚像素、蓝色亚像素和白色亚像素。
可选地，所述补偿薄膜晶体管的漏电极通过一电容与对应的驱动薄膜晶体管的栅电极连接。
本公开文本还提供一种有机发光二极管阵列基板，包括：有机发光二极管以及用于驱动所述有机发光二极管的驱动电路，所述驱动电路为上述驱动电路。
本公开文本还提供一种有机发光二极管显示装置，包括上述有机发光二极管阵列基板。
本公开文本的上述技术方案的有益效果如下：
两个或多于两个的补偿薄膜晶体管共用栅电极和源电极，且连接同一条补偿信号线，与相关技术中多个补偿薄膜晶体管均分开设置(即补偿薄膜晶体管之间不共用栅电极，也不共用源电极)的驱动电路相比，由于源电极和栅电极的个数减少，减少了源电极和栅电极的重叠面积，减少了补偿薄膜晶体管的源电极和栅电极之间的寄生电容，同时，也减少了补偿信号线的跨线重叠面积，从而降低了补偿信号线上RC Loading中的C(电容)，可提高补偿信号线的充电速度，达到预期的补偿效果。
附图说明
为了更清楚地说明本申请实施例的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请中记载的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。以下附图并未刻意按实际尺寸等比例缩放绘制，重点在于示出本申请的主旨。
图1为相关技术中的有机发光二极管阵列基板的电路结构示意图；
图2为本公开文本一实施例的有机发光二极管驱动电路的结构示意图；
图3为本公开文本另一实施例的有机发光二极管驱动电路的结构示意图；
图4为相关技术中的有机发光二极管阵列基板的结构示意图；
图5为本公开文本一实施例的有机发光二极管阵列基板的结构示意图；
图6为对图4和图5中的有机发光二极管阵列基板在sense阶段，进行补偿信号线RC负载(sense line RC Loading)对充电能力影响的模拟仿真结果 示意图；
图7为本公开文本另一实施例的有机发光二极管阵列基板的结构示意图；
图8为对图7和相关技术设计中的有机发光二极管阵列基板在sense阶段，进行补偿信号线RC负载对充电能力影响的模拟仿真结果示意图；
图9为本公开文本实施例的有机发光二极管驱动电路的驱动信号示意图。
具体实施方式
为使本公开文本实施例的目的、技术方案和优点更加清楚，下面将结合本公开文本实施例的附图，对本公开文本实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开文本的一部分实施例，而不是全部的实施例。基于所描述的本公开文本的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开文本保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开文本所属领域内具有一般技能的人士所理解的通常意义。本公开文本专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
图1示出了一种有机发光二极管阵列基板的电路结构，如图1所示，有机发光二极管阵列基板包括：OLED(Organic Light-Emitting Diode，有机发光二极管)以及用于驱动OLED的驱动电路，该驱动电路包括：驱动薄膜晶体管T1、开关薄膜晶体管T2和电容Cst，为了对薄膜晶体管T1的阈值电压进行补偿，该驱动电路还包括：补偿薄膜晶体管T3，该补偿薄膜晶体管T3的栅电极接Sense Scan(感应扫描)信号，源电极通过一条Sense line(补偿信号线)接Sense(感应)信号，漏电极与OLED的阳极连接。图1中，开关扫描信号可以表示为Switch Scan，数据信号可以表示为Data，OVDD为工 作电压，OVSS为接地端电压，D、G、S为电路节点。
为解决有机发光二极管的驱动电路中的Sense line充电速率缓慢或充电不足，造成补偿效果差的问题，本公开文本实施例提供一种有机发光二极管驱动电路，包括：
多个驱动薄膜晶体管，用于驱动有机发光二极管发光，每一驱动薄膜晶体管对应一有机发光二极管，所述驱动薄膜晶体管的源极与电源连接，漏极与对应的有机发光二极管连接；
多个补偿薄膜晶体管，用于对所述驱动薄膜晶体管的阈值电压进行补偿；其中，每一所述补偿薄膜晶体管对应一驱动薄膜晶体管，所述补偿薄膜晶体管的源电极连接一补偿信号线(即Sense line)，所述补偿薄膜晶体管的漏电极与对应的驱动薄膜晶体管的漏电极连接；
其中，所述多个补偿薄膜晶体管分成多组，其中，每一组补偿薄膜晶体管包括至少两个补偿薄膜晶体管，所述至少两个补偿薄膜晶体管对应的亚像素相邻，所述至少两个补偿薄膜晶体管共用栅电极和源电极，共用的所述源电极连接同一条所述补偿信号线。
在本公开文本实施例中，两个或多于两个的补偿薄膜晶体管共用栅电极和源电极，且连接同一条补偿信号线，与相关技术中多个补偿薄膜晶体管均分开设置(即补偿薄膜晶体管之间不共用栅电极，也不共用源电极)的驱动电路相比，由于源电极和栅电极的个数减少，减少了源电极和栅电极的重叠面积，减少了补偿薄膜晶体管的源电极和栅电极之间的寄生电容，同时，也减少了补偿信号线的跨线重叠面积，从而降低了补偿信号线上RC Loading中的C(电容)，可提高补偿信号线的充电速度，达到预期的补偿效果。
本公开文本实施例中，可选地，栅电极、源电极和补偿信号线均采用金属采用制成。
本公开文本实施例中，可选地，补偿信号线与数据线平行。
上述实施例中提到的亚像素相邻，可以是在行方向上相邻，也可以是在列方向上相邻。
本公开文本实施例中的阵列基板包括多个亚像素，每一亚像素包括一有机发光二极管和上述驱动电路。
请参考图2，图2为本公开文本一实施例的有机发光二极管驱动电路的结构示意图，该实施例中，多个补偿薄膜晶体管分成多组，每一组补偿薄膜晶体管包括两个补偿薄膜晶体管(补偿薄膜晶体管200A和补偿薄膜晶体管200B)，其中，补偿薄膜晶体管200A和补偿薄膜晶体管200B对应的亚像素相邻，补偿薄膜晶体管200A和补偿薄膜晶体管200B共用栅电极201和源电极205，共用的源电极205连接同一条补偿信号线206，此外，补偿薄膜晶体管200A的漏电极204与其对应的驱动薄膜晶体管(图未示出)的漏电极连接，补偿薄膜晶体管200B的漏电极203与其对应的驱动薄膜晶体管(图未示出)的漏电极连接。
图2中，202为有源层，本公开文本实施例中，补偿薄膜晶体管200A和补偿薄膜晶体管200B共用有源层202，当然在本公开文本的其他一些实施例中，补偿薄膜晶体管200A和补偿薄膜晶体管200B也可以不共用有源层，即两个薄膜晶体管的有源层可分开设置。
本公开文本实施例中，两个补偿薄膜晶体管共用一栅电极和一源电极，且连接同一条补偿信号线，与相关技术中多个补偿薄膜晶体管均分开设置(即补偿薄膜晶体管之间不共用栅电极，也不共用源电极)的驱动电路相比，由于源电极和栅电极的个数减少，减少了源电极和栅电极的重叠面积，补偿薄膜晶体管的源电极和栅电极之间的寄生电容减少了一半，同时，也减少了补偿信号线的跨线重叠面积，从而降低了补偿信号线上RC Loading中的C(电容)，可提高补偿信号线的充电速度，达到预期的补偿效果。
本公开文本实施例中，属于同一组的两个补偿薄膜晶体管和补偿薄膜晶体管中，源电极位于两个补偿薄膜晶体管的漏电极之间，与两个漏电极均相对，从而可保证两个补偿薄膜晶体管的良好工作。可选地，源电极距离两个补偿薄膜晶体管的漏电极的距离相同。
请参考图3，图3为本公开文本另一实施例的有机发光二极管驱动电路的结构示意图，该实施例中，多个补偿薄膜晶体管分成多组，每一组补偿薄膜晶体管包括四个补偿薄膜晶体管(补偿薄膜晶体管200A、补偿薄膜晶体管200B、补偿薄膜晶体管200C和补偿薄膜晶体管200D)，其中，补偿薄膜晶体管200A、补偿薄膜晶体管200B、补偿薄膜晶体管200C和补偿薄膜晶体管 200D对应的亚像素相邻，补偿薄膜晶体管200A、补偿薄膜晶体管200B、补偿薄膜晶体管200C和补偿薄膜晶体管200D共用栅电极201和源电极205，共用的源电极205连接同一条补偿信号线206，此外，四个补偿薄膜晶体管对应的漏电极(漏电极203、漏电极204、漏电极207和漏电极208)均与其对应的驱动薄膜晶体管(图未示出)的漏电极连接。
图3中，202为有源层，本公开文本实施例中，补偿薄膜晶体管200A和补偿薄膜晶体管200B共用有源层202A，补偿薄膜晶体管200C和补偿薄膜晶体管200D共用有源层202B，当然，在本公开文本的其他一些实施例中，四个补偿薄膜晶体管的有源层也可以为其他类型的设置，例如，四个补偿薄膜晶体管均不共用有源层，或者，四个补偿薄膜晶体管共用一有源层，又或者，补偿薄膜晶体管200A和补偿薄膜晶体管200D共用有源层，补偿薄膜晶体管200B和补偿薄膜晶体管200C共用有源层。
本公开文本实施例中，四个补偿薄膜晶体管共用一栅电极和一源电极，且连接同一条补偿信号线，与相关技术中多个补偿薄膜晶体管均分开设置(即补偿薄膜晶体管之间不共用栅电极，也不共用源电极)的驱动电路相比，由于源电极和栅电极的个数减少，减少了源电极和栅电极的重叠面积，补偿薄膜晶体管的源电极和栅电极之间的寄生电容减少了四分之三，同时，也减少了补偿信号线的跨线重叠面积，从而降低了补偿信号线上RC Loading中的C(电容)，可提高补偿信号线的充电速度，达到预期的补偿效果。
本公开文本实施例中，属于同一组的四个补偿薄膜晶体管中，源电极位于四个补偿薄膜晶体管的漏电极之间，与四个漏电极均相对，从而保证四个补偿薄膜晶体管均可良好地工作。可选地，源电极与四个漏电极之间的距离相同。
可选地，本公开文本实施例中，属于同一组的四个补偿薄膜晶体管对应的亚像素呈两行两列方式排列。
进一步可选地，本公开文本实施例中，属于同一组的四个补偿薄膜晶体管分别对应红色亚像素、绿色亚像素、蓝色亚像素和白色亚像素。
本公开文本实施例中的每一亚像素的驱动电路的整体结构可参见图1，与相关技术所不同的是，补偿薄膜晶体管T3与相邻的亚像素的驱动电路中的 补偿薄膜晶体T3共用栅电极和源电极。
本公开文本实施例还提供一种有机发光二极管阵列基板，包括：有机发光二极管以及用于驱动所述有机发光二极管的驱动电路，所述驱动电路为上述任一实施例中的驱动电路。
本公开文本实施例还提供一种有机发光二极管显示装置，包括上述有机发光二极管阵列基板。
请参考图4和图5，图4为相关技术的一有机发光二极管阵列基板的结构示意图，图5为本公开文本一实施例的有机发光二极管阵列基板的结构示意图。
图4和图5中的有机发光二极管阵列基板均包括多个OLED以及用于驱动OLED的驱动电路，该驱动电路包括：驱动薄膜晶体管T1、开关薄膜晶体管T2、电容Cst和补偿薄膜晶体管T3，补偿薄膜晶体管T3的栅电极接Sense Scan(感应扫描)信号，源电极通过Sense line(补偿信号线)接Sense(感应)信号，漏电极与对应的OLED的阳极连接。图4和图5中，开关扫描信号可以表示为Switch Scan，数据信号可以表示为Data，OVDD为工作电压，其电路具体连接关系请参见图1。
从图4中可以看出，相关技术的设计中，每一有机发光二极管对应一补偿薄膜晶体管T3，每一补偿薄膜晶体管T3包括栅电极401、有源层402、源电极403和漏电极404，各个有机发光二极管对应的补偿薄膜晶体管T3各自独立。
从图5中可以看出，本公开文本实施例中，每一有机发光二极管对应一补偿薄膜晶体管T3，每一补偿薄膜晶体管T3包括栅电极501、有源层502、源电极503和漏电极504。多个补偿薄膜晶体管T3分成多组，每一组补偿薄膜晶体管包括两个补偿薄膜晶体管T3，属于同一组的两个补偿薄膜晶体管T3共用源电极503和栅电极501，且源电极503连接同一条补偿信号线。图5中，位于sense line左侧的两个补偿薄膜晶体管T3属于同一组，位于sense line右侧的两个补偿薄膜晶体管T3属于同一组。
对比图4和图5可以看出，本公开文本实施例中，由于源电极和栅电极的个数减少，从而减少了源电极和栅电极的重叠面积，补偿薄膜晶体管的源 电极和栅电极之间的寄生电容减少了一半，同时，也减少了补偿信号线的跨线重叠面积，从而降低了补偿信号线上RC Loading中的C(电容)，可提高补偿信号线的充电速度，达到预期的补偿效果。
请参考图6，图6为对图4和图5中的有机发光二极管阵列基板在sense阶段，进行补偿信号线RC负载对充电能力影响的模拟仿真结果示意图，图6中，横坐标为补偿时间(Sense time)，纵坐标为补偿电压(Sense V)，C为sense line的电容，从图6中可以看出，本公开文本实施例的有机发光二极管显示装置能够大大增加sense line充电速率，得到更好的补偿效果。
请参考图7，图7为本公开文本另一实施例的有机发光二极管阵列基板的结构示意图。
图7中的有机发光二极管阵列基板包括多个OLED以及用于驱动OLED的驱动电路，该驱动电路包括：驱动薄膜晶体管T1、开关薄膜晶体管T2、电容Cst和补偿薄膜晶体管T3，补偿薄膜晶体管T3的栅电极接Sense Scan(感应扫描)信号，源电极通过Sense line(补偿信号线)接Sense(感应)信号，漏电极与对应的OLED的阳极连接。图7中开关扫描信号可以表示为Switch Scan，数据信号可以表示为Data，OVDD为工作电压，其电路具体连接关系请参见图1。
从图7中可以看出，本公开文本实施例中，每一有机发光二极管对应一补偿薄膜晶体管T3，每一补偿薄膜晶体管T3包括栅电极501、有源层502、源电极503和漏电极504。多个补偿薄膜晶体管T3分成多组，每一组补偿薄膜晶体管包括四个补偿薄膜晶体管T3，属于同一组的四个补偿薄膜晶体管T3共用源电极803和栅电极801，且源电极803连接同一条补偿信号线。
图7所示的有机发光二极管阵列基板中，每一有机发光二极管对应一亚像素，图7示出的四个有机发光二极管分别对应R、G、B、W四个亚像素。
对比图7可以看出，本公开文本实施例中，由于源电极和栅电极的个数减少，从而减少了源电极和栅电极的重叠面积，补偿薄膜晶体管的源电极和栅电极之间的寄生电容减少了四分之三，同时，也减少了补偿信号线的跨线重叠面积，从而降低了补偿信号线上RC Loading中的C(电容)，可提高补偿信号线的充电速度，达到预期的补偿效果。
请参考图8，图8为对图7和相关技术的设计中的有机发光二极管阵列基板的在sense阶段，进行补偿信号线RC负载对充电能力影响的模拟仿真结果示意图，图8中，横坐标为补偿时间(Sense time)，纵坐标为补偿电压(Sense V)，C为sense line的电容，从图8中可以看出，本公开文本实施例的有机发光二极管显示装置能够大大增加sense line充电速率，得到更好的补偿效果。
下面对本公开文本实施例中的有机发光二极管驱动电路的工作过程进行简单说明。本公开文本实施例中的有机发光二极管驱动电路的连接关系可参见图1，如图9所示，该种驱动电路的工作过程一般分为三个阶段：Sense阶段，Compensation(补偿)阶段，和Emission(发光)阶段，在Sense阶段：打开G1，G2对sense TFT充电，Compensation阶段：根据sense结果调整data值，完成补偿，Emission阶段：充电至设定的Vgs，关闭G1，G2然后发光。图9中，V_BLANKING是指显示屏在一个周期内有一小段时间是不发光的阶段，活动区域(ACTIVE AREA)是指正常发光阶段，G1(n)是G1波型，G2(n)是G2波型，VGm是Data电压的最大值，VG0是Data电压的最小值，TR是指Reset Time，Tc是指Charging Time，TH是指Holding Time，VSENSE是指sense Floating时被充电充到的值，VREFL是指sense非Floating时，输入的参考电压，通常接地。
以上所述是本公开文本的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开文本所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开文本的保护范围。

Claims (13)

  1. 一种有机发光二极管驱动电路，包括：
    多个驱动薄膜晶体管，用于驱动有机发光二极管发光，每一驱动薄膜晶体管对应一有机发光二极管，所述驱动薄膜晶体管的源极与工作电压连接，漏极与对应的有机发光二极管连接；
    多个补偿薄膜晶体管，用于对所述驱动薄膜晶体管的阈值电压进行补偿；其中，每一所述补偿薄膜晶体管对应一驱动薄膜晶体管，所述补偿薄膜晶体管的源电极连接一补偿信号线，所述补偿薄膜晶体管的漏电极与对应的驱动薄膜晶体管的漏电极连接；
    所述多个补偿薄膜晶体管分成多组，其中，每一组补偿薄膜晶体管包括至少两个补偿薄膜晶体管，所述至少两个补偿薄膜晶体管对应的亚像素相邻，所述至少两个补偿薄膜晶体管共用栅电极和源电极，共用的所述源电极连接同一条所述补偿信号线。
  2. 根据权利要求1所述的有机发光二极管驱动电路，其中，每一组补偿薄膜晶体管包括两个补偿薄膜晶体管，属于同一组的两个补偿薄膜晶体管中，源电极位于两个补偿薄膜晶体管的漏电极之间，与两个漏电极均相对。
  3. 根据权利要求2所述的有机发光二极管驱动电路，其中，所述两个补偿薄膜晶体管共用一个有源层。
  4. 根据权利要求2所述的有机发光二极管驱动电路，其中，所述两个补偿薄膜晶体管的有源层分开设置。
  5. 根据权利要求1所述的有机发光二极管驱动电路，其中，每一组补偿薄膜晶体管包括四个补偿薄膜晶体管。
  6. 根据权利要求5所述的有机发光二极管驱动电路，其中，所述四个补偿薄膜晶体管包括第一补偿薄膜晶体管、第二补偿薄膜晶体管、第三补偿薄膜晶体管和第四补偿薄膜晶体管，所述第一补偿薄膜晶体管和第二补偿薄膜晶体管共用一个有源层，并且所述第三补偿薄膜晶体管和第四补偿薄膜晶体管共用另一个有源层。
  7. 根据权利要求5所述的有机发光二极管驱动电路，其中，所述四个补 偿薄膜晶体管的有源层分开设置。
  8. 根据权利要求5所述的有机发光二极管驱动电路，其中，所述四个补偿薄膜晶体管对应的亚像素呈两行两列方式排列。
  9. 根据权利要求8所述的有机发光二极管驱动电路，其中，属于同一组的四个补偿薄膜晶体管中，源电极位于四个补偿薄膜晶体管的漏电极之间，与四个漏电极均相对。
  10. 根据权利要求8或9所述的有机发光二极管驱动电路，其中，属于同一组的四个补偿薄膜晶体管分别对应红色亚像素、绿色亚像素、蓝色亚像素和白色亚像素。
  11. 根据权利要求1所述的有机发光二极管驱动电路，其中，所述补偿薄膜晶体管的漏电极通过一电容与对应的驱动薄膜晶体管的栅电极连接。
  12. 一种有机发光二极管阵列基板，包括：有机发光二极管以及用于驱动所述有机发光二极管的驱动电路，所述驱动电路为如权利要求1-11任一项所述的驱动电路。
  13. 一种有机发光二极管显示装置，包括如权利要求12所述的有机发光二极管阵列基板。
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CN104809986A (zh) * 2015-05-15 2015-07-29 京东方科技集团股份有限公司 一种有机电致发光显示面板及显示装置
CN105629607A (zh) * 2016-01-14 2016-06-01 京东方科技集团股份有限公司 一种阵列基板、显示面板和显示装置
CN106297668A (zh) * 2016-11-02 2017-01-04 京东方科技集团股份有限公司 一种有机发光二极管驱动电路、阵列基板和显示装置

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