WO2020220465A1 - 印刷电路板及显示装置 - Google Patents

印刷电路板及显示装置 Download PDF

Info

Publication number
WO2020220465A1
WO2020220465A1 PCT/CN2019/094622 CN2019094622W WO2020220465A1 WO 2020220465 A1 WO2020220465 A1 WO 2020220465A1 CN 2019094622 W CN2019094622 W CN 2019094622W WO 2020220465 A1 WO2020220465 A1 WO 2020220465A1
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
straight portion
power
straight
system ground
Prior art date
Application number
PCT/CN2019/094622
Other languages
English (en)
French (fr)
Inventor
肖剑锋
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US16/616,454 priority Critical patent/US11310906B2/en
Publication of WO2020220465A1 publication Critical patent/WO2020220465A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224—Patterned shielding planes, ground planes or power planes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09345—Power and ground in the same plane; Power planes for two voltages in one plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10128—Display
    • H05K2201/10136—Liquid Crystal display [LCD]

Definitions

  • the present invention relates to the field of display technology, in particular to a printed circuit board and a display device.
  • LCD Liquid Crystal Display
  • liquid crystal display devices which include a liquid crystal panel and a backlight module.
  • the X board is mostly a printed circuit board (PCB), which includes multiple layers of mutually insulated wiring layers, and the connections between different wiring layers are realized through via holes.
  • PCB printed circuit board
  • FIG. 1 is a schematic cross-sectional view of an existing printed circuit board as an X-board.
  • the printed circuit board includes a first wiring layer 1000, a second wiring layer 2000, a reference ground layer 3000, and a third wiring layer sequentially arranged 4000, where the first wiring layer 1000 is used to set up electronic components and output pins, the second wiring layer 2000 is used to transmit the positive voltage of the power supply, the reference ground layer 3000 is used to access the reference ground potential, and the third wiring layer 4000 is used to For data signal transmission, please refer to FIG. 2.
  • the second wiring layer 2000 includes a power positive voltage signal line 2100.
  • the first wiring layer 1000 includes an output pin group 1100, a system ground 1200 separated from the output pin group 1100, and a wiring group 1300 arranged between the output pin group 1100 and the system ground 1200.
  • the output pin group 1100 includes two power pins 1110 arranged at intervals and a reference ground pin 1120 arranged between the two power pins 1110.
  • the wiring group 1300 includes two power wiring 1310, a reference ground wiring 1320, and a connecting wiring 1330.
  • the two power wiring 1310 are arranged at intervals, and one end of each power wiring 1310 corresponds to a power wiring 1310.
  • the pin 1110 is connected, and the other end extends toward the system ground 1200.
  • connection trace 1330 is connected to the other ends of the two power traces 1310 and is spaced from the system ground 1200.
  • the connection trace 1330 is connected to the power supply
  • the positive voltage signal lines 2100 are overlapped.
  • An insulating layer (not shown) is provided between the first wiring layer 1000 and the second wiring layer 2000. The insulating layer corresponds to the part where the connecting trace 1330 and the power supply positive voltage signal line 2100 overlap.
  • the reference ground trace 1320 is located in the area enclosed by the two power traces 1310 and the connecting trace 1330 and one end is connected to the reference ground pin 1120.
  • the system ground line 1200 is connected to the reference ground lead
  • the loop between the pin 1120 and the reference ground trace 1320 is blocked by the connection trace 1330, so that the reference ground pin 1120 and the system ground line 1200 are cut apart, causing the voltage on the reference ground pin 1120 to be unstable, so that the
  • the ripple of the power supply increases, and the power supply is unstable.
  • the chip-on-film cannot work normally, and the printed circuit board has poor electromagnetic interference (EMI) performance.
  • EMI electromagnetic interference
  • the purpose of the present invention is to provide a printed circuit board, which can improve the stability of the output power supply voltage, reduce the ripple of the power supply voltage, and has better anti-electromagnetic interference performance.
  • Another object of the present invention is to provide a display device whose printed circuit board output power supply voltage has higher stability, less power supply voltage ripple, and better anti-electromagnetic interference performance.
  • the present invention first provides a printed circuit board, including a first wiring layer, a second wiring layer provided above the first wiring layer, and an insulating layer provided between the first wiring layer and the second wiring layer ;
  • the first wiring layer includes a power supply positive voltage signal line;
  • the second wiring layer includes an output pin group, a system ground spaced apart from the output pin group, and set between the output pin group and the system ground
  • the output pin group includes two power supply pins arranged at intervals and a reference ground pin located between the two power supply pins;
  • the wiring group includes two power supply wirings arranged at intervals And a reference ground trace; one end of each power trace is connected to a power pin, and the other end extends in the direction close to the system ground.
  • Each power trace overlaps the power positive voltage signal line, and the insulation
  • the layer is provided with a via hole corresponding to the overlapping part of each power trace and the power positive voltage signal line, and each power trace is connected to the power positive voltage signal line through a corresponding via;
  • the reference ground trace is set in two Between power traces, one end of the reference ground trace is connected to the reference ground pin, and the other end is connected to the system ground.
  • the direction from the output pin group to the system ground is defined as the first direction, and the arrangement direction of the two power supply pins is perpendicular to the first direction.
  • the system ground wire and the power supply positive voltage signal line are both straight; the extension direction of the system ground wire and the power supply positive voltage signal line are both perpendicular to the first direction.
  • the wiring set further includes two capacitor wirings respectively arranged between the other ends of the two power wirings and the system ground, and each capacitive wiring is connected to the other end of a power wiring.
  • the two capacitor traces are both straight; the two capacitor traces overlap with each other; the two capacitor traces are both parallel to the system ground.
  • Each power supply pin includes a plurality of sub-power supply pins arranged at intervals along the arrangement direction of the two power supply pins, and one end of each power supply trace is connected to the plurality of sub-power supply pins of the corresponding power supply pin; the reference The ground pin includes a plurality of sub-reference ground pins sequentially spaced along the arrangement direction of the two power supply pins, and one end of the reference ground wire is connected to the multiple sub-reference ground pins of the reference ground pin.
  • Each power supply pin includes two sub-power supply pins; the reference ground pin includes two or four sub-reference ground pins.
  • the two power supply wires include a first power supply wire and a second power supply wire;
  • the first power trace includes a first straight portion and a second straight portion.
  • One end of the first straight portion is connected to a corresponding power pin, and the other end extends in a direction close to the system ground.
  • One end of the two straight parts is connected with the other end of the first straight part, and the other end extends in the direction close to the system ground;
  • the first straight part is parallel to the arrangement direction of the output pin group and the system ground, and the second straight part
  • the angle between the first straight portion and the first straight portion is an acute angle, the second straight portion overlaps the power supply positive voltage signal line, and the insulating layer corresponds to the portion where the second straight portion overlaps the power supply positive voltage signal line.
  • Via hole the second straight portion is connected to the power supply positive voltage signal line via the first via hole;
  • the second power trace includes a third straight portion, a fourth straight portion, and a fifth straight portion.
  • One end of the third straight portion is connected to the corresponding power pin, and the other end extends in a direction close to the system ground.
  • One end of the fourth straight portion is connected to the other end of the third straight portion, and the other end extends toward the system ground.
  • One end of the fifth straight portion is connected to the other end of the fourth straight portion, and the other end is closer to The direction of the system ground line extends.
  • the third straight line part and the fifth straight line part are parallel to the arrangement direction of the output pin group and the system ground line.
  • the angle between the fourth straight line part and the third straight line part is an acute angle.
  • the straight portion overlaps the power supply positive voltage signal line, and the insulating layer is provided with a second via hole corresponding to the overlapping portion of the fifth straight portion and the power supply positive voltage signal line, and the fifth straight portion is connected to the power supply via the second via hole.
  • Positive voltage signal line connection is provided.
  • the first power trace further includes a sixth straight portion, one end of the sixth straight portion is connected to the other end of the second straight portion, the other end extends in a direction close to the system ground, and the sixth straight portion is parallel to the output The arrangement direction of the pin group and system ground.
  • the present invention also provides a display device including the above-mentioned printed circuit board.
  • the second wiring layer in the printed circuit board of the present invention includes an output pin group, a system ground wire, and a wiring group.
  • the output pin group includes two power pins and a reference ground pin. One end of each power trace in the group is connected to a power pin, and the other end extends in the direction close to the system ground. Each power trace overlaps and passes through the power positive voltage signal line in the first wiring layer.
  • the corresponding via on the insulating layer is connected to the positive voltage signal line of the power supply.
  • the reference ground trace in the trace group is set between the two power traces and one end is connected to the reference ground pin, and the other end is connected to the system ground.
  • the reference ground pin, the reference ground trace and the system ground wire are connected together to ensure the stable voltage on the reference ground pin, thereby providing a stable power supply voltage, reducing the ripple of the power supply voltage, and having a strong ability to resist electromagnetic interference.
  • the stability of the power supply voltage output by the printed circuit board of the display device of the present invention is relatively high, the power supply voltage has less ripple, and the anti-electromagnetic interference performance is better.
  • Fig. 1 is a schematic sectional view of a conventional printed circuit board as an X board;
  • FIG. 2 is a schematic plan view of the wiring of the first wiring layer and the second wiring layer of the printed circuit board shown in FIG. 1;
  • FIG. 3 is a schematic top view of the wiring of the first embodiment of the printed circuit board of the present invention.
  • FIG. 4 is a schematic cross-sectional view of the printed circuit board of the present invention where the power trace and the power positive voltage signal line overlap;
  • FIG. 5 is a schematic top view of the wiring of the second embodiment of the printed circuit board of the present invention.
  • the printed circuit board of the first embodiment of the present invention includes a first wiring layer 10, a second wiring layer 20 provided above the first wiring layer 10, and a first wiring layer 10 and The insulating layer 30 between the two wiring layers 20.
  • the first wiring layer 10 includes a power supply positive voltage signal line 11.
  • the second wiring layer 20 includes an output pin group 21, a system ground 22 spaced from the output pin group 21, and a wiring group 23 provided between the output pin group 21 and the system ground 22.
  • the output pin group 21 includes two power pins 211 arranged at intervals and a reference ground pin 212 arranged between the two power pins 211.
  • the wiring group 23 includes two power wiring 231 and a reference ground wiring 232 spaced apart.
  • each power trace 231 is connected to a power pin 211, and the other end extends toward the system ground line 22.
  • Each power trace 231 overlaps the power positive voltage signal line 11, and the insulating layer 30 Corresponding to the portion where each power trace 231 overlaps with the power positive voltage signal line 11 is provided with a via 90, and each power trace 231 is connected to the power positive voltage signal line 11 through a corresponding via 90.
  • the reference ground wire 232 is provided between the two power wires 231, one end of the reference ground wire 232 is connected to the reference ground pin 212, and the other end is connected to the system ground wire 22.
  • the direction from the output pin group 21 to the system ground 22 is defined as the first direction, and the arrangement direction of the two power supply pins 211 is perpendicular to the first direction.
  • the system ground line 22 and the power supply positive voltage signal line 11 are both straight.
  • the extension direction of the system ground line 22 and the extension direction of the power positive voltage signal line 11 are both perpendicular to the first direction.
  • the wiring group 23 also includes two capacitor wirings 233 respectively arranged between the other ends of the two power wirings 231 and the system ground 22, and each capacitive wiring 233 corresponds to Connect with the other end of a power line 231.
  • the two capacitor traces 233 form a filter capacitor with the system ground 22 respectively.
  • the two capacitor wires 233 are both straight.
  • the straight lines of the two capacitor traces 233 coincide.
  • the two capacitor traces 233 are both parallel to the system ground 22.
  • each power supply pin 211 includes a plurality of sub-power supply pins A arranged at intervals along the arrangement direction of the two power supply pins 211, and one end of each power supply wire 231 is connected to the plurality of sub-power supply pins A corresponding to the power supply pin 211.
  • Pin A is connected.
  • the ground reference pin 212 includes a plurality of sub-reference ground pins B arranged at intervals along the arrangement direction of the two power pins 211, and one end of the reference ground wire 232 is connected to the multiple sub-reference ground pins of the reference ground pin 212.
  • Pin B is connected.
  • each power pin 211 includes two sub power pins A.
  • the reference ground pin 212 includes two sub-reference ground pins B.
  • the two power traces 231 include a first power trace C and a second power trace D.
  • the first power trace C includes a first straight portion C1 and a second straight portion C2.
  • One end of the first straight portion C1 is connected to the corresponding power pin 211, and the other end is directed toward the system ground 22.
  • One end of the second straight portion C2 is connected to the other end of the first straight portion C1, and the other end extends in a direction close to the system ground 22.
  • the first straight portion C1 is parallel to the arrangement direction of the output pin group 21 and the system ground 22, the angle between the second straight portion C2 and the first straight portion C1 is an acute angle, and the second straight portion C2 is positive to the power supply.
  • the voltage signal line 11 overlaps, the insulating layer 30 is provided with a first via 91 corresponding to the overlapping portion of the second straight portion C2 and the power positive voltage signal line 11, and the second straight portion C2 passes through the first via 91 Connected to the power supply positive voltage signal line 11.
  • the second power trace D includes a third straight portion D1, a fourth straight portion D2, and a fifth straight portion D3.
  • One end of the third straight portion D1 is connected to the corresponding power pin 211, and the other end is close to the system Extend in the direction of the ground 22, one end of the fourth straight portion D2 is connected to the other end of the third straight portion D1, and the other end extends in a direction closer to the system ground 22, and one end of the fifth straight portion D3 is connected to the second The other end of the four straight portion D2 extends toward the system ground 22.
  • the third straight portion D1 and the fifth straight portion D1 are both parallel to the arrangement direction of the output pin group 21 and the system ground 22, and the fourth The angle between the straight portion D2 and the third straight portion D1 is an acute angle, the fifth straight portion D3 overlaps the power positive voltage signal line 11, and the insulating layer 30 corresponds to the fifth straight portion D3 and the power positive voltage signal line 11
  • the overlapping portion is provided with a second via 92, and the fifth straight portion D3 is connected to the power supply positive voltage signal line 11 through the second via 92.
  • the reference ground pin 212 includes four sub-reference ground pins B.
  • the first power trace C further includes a sixth straight portion C3. One end of the sixth straight portion C3 is connected to the other end of the second straight portion C2, and the other end extends in a direction close to the system ground 22.
  • the straight line C3 is parallel to the arrangement direction of the output pin group 21 and the system ground 22. The rest are the same as the above-mentioned first embodiment, and will not be repeated here.
  • each power trace 231 is connected to a power pin 211, and the other end extends in a direction close to the system ground 22, and each power trace 231 is connected to the power supply pin 211.
  • the positive voltage signal lines 11 overlap, and the insulating layer 30 is provided with a via 90 corresponding to the overlapping portion of each power trace 231 and the power positive voltage signal line 11, and each power trace 231 is connected to the power positive via a corresponding via 90
  • the voltage signal line 11 is connected
  • the reference ground line 232 is arranged between the two power lines 231, one end of the reference ground line 232 is connected to the reference ground pin 212, and the other end is connected to the system ground line 22, Therefore, the reference ground pin 212, the reference ground trace 232, and the system ground wire 22 are connected together to ensure that the voltage on the reference ground pin 212 is stable.
  • Using the printed circuit board as an X board can provide a stable COF for the display device.
  • the power supply voltage reduces the ripple of the power supply voltage and has a strong ability to resist electromagnetic interference.
  • the present invention also provides a display device including the above-mentioned printed circuit board, and the structure of the printed circuit board will not be described repeatedly here.
  • the printed circuit board is used as the X board of the liquid crystal display device, and is electrically connected to the COF in the display device through the output pin group 21.
  • the printed circuit board of the display device of the present invention is provided with one end of each power trace 231 corresponding to a power pin 211, and the other end extends toward the system ground 22, and each power trace 231 Overlaps with the power positive voltage signal line 11, the insulating layer 30 is provided with a via 90 corresponding to the portion where each power trace 231 overlaps with the power positive voltage signal line 11, and each power trace 231 passes through a corresponding via 90 and The power positive voltage signal line 11 is connected, the reference ground line 232 is provided between the two power lines 231, one end of the reference ground line 232 is connected to the reference ground pin 212, and the other end is connected to the system ground line 22 Connection, so that the reference ground pin 212, the reference ground trace 232, and the system ground wire 22 are connected together to ensure that the voltage on the reference ground pin 212 is stable, can provide a stable supply voltage to the COF, reduce the ripple of the supply voltage, and resist Strong electromagnetic interference ability.
  • the second wiring layer in the printed circuit board of the present invention includes an output pin group, a system ground, and a wiring group.
  • the output pin group includes two power pins and a reference ground pin.
  • the wiring group One end of each power supply line in the power supply trace is connected to a power supply pin, and the other end extends in the direction close to the system ground.
  • Each power supply trace overlaps and is insulated from the power supply positive voltage signal line in the first wiring layer.
  • the corresponding via on the layer is connected to the positive voltage signal line of the power supply.
  • the reference ground trace in the trace group is set between the two power traces and one end is connected to the reference ground pin, and the other end is connected to the system ground.
  • the reference ground pin, the reference ground trace and the system ground wire are connected together to ensure that the voltage on the reference ground pin is stable, so as to provide a stable power supply voltage, reduce the ripple of the power supply voltage, and have a strong ability to resist electromagnetic interference.
  • the printed circuit board of the display device of the present invention can improve the stability of the output power supply voltage, reduce the ripple of the power supply voltage, and has better anti-electromagnetic interference performance.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

本发明提供一种印刷电路板及显示装置。所述印刷电路板中的第二布线层包括输出引脚组、系统地线以及走线组，输出引脚组包括两个电源引脚及参考地引脚，走线组中的每一电源走线的一端对应与一电源引脚连接，另一端向靠近系统地线的方向延伸，每一电源走线与第一布线层中的电源正电压信号线相交叠并经绝缘层上对应的过孔与电源正电压信号线连接，走线组中的参考地走线设于两个电源走线之间且一端与参考地引脚连接，另一端与系统地线连接，从而参考地引脚、参考地走线及系统地线连接到一起，保证参考地引脚上的电压稳定，从而能够提供稳定的供电电压，降低供电电压的波纹，抗电磁干扰的能力强。

Description

印刷电路板及显示装置 技术领域
本发明涉及显示技术领域，尤其涉及一种印刷电路板及显示装置。
 背景技术
随着显示技术的发展，液晶显示装置（Liquid Crystal Display，LCD）等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示装置，其包括液晶面板及背光模组（backlight module）。
目前的液晶显示装置中，会在液晶面板上绑定多个覆晶薄膜（COF）然后再将两个X板（X-Board）通过导电粒子与覆晶薄膜进行绑定连接，工作时，驱动信号通过X板传输至覆晶薄膜中从而对液晶面板进行驱动。目前，X板多为印刷电路板（PCB），其包括多层相互绝缘的布线层，不同的布线层之间的连接通过过孔来实现。
请参阅图1，为现有的作为X板的印刷电路板的剖视示意图，该印刷电路板包括依次设置的第一布线层1000、第二布线层2000、参考地层3000、及第三布线层4000，其中，第一布线层1000用于设置电子元器件以及输出引脚，第二布线层2000用于传输电源正电压，参考地层3000用于接入参考地电位，第三布线层4000用于传输数据信号，请参阅图2，所述第二布线层2000包括电源正电压信号线2100。所述第一布线层1000包括输出引脚组1100、与输出引脚组1100间隔的系统地线1200以及设于输出引脚组1100与系统地线1200之间的走线组1300。所述输出引脚组1100包括间隔设置的两个电源引脚1110及设于两个电源引脚1110之间的参考地引脚1120。所述走线组1300包括两个电源走线1310、一参考地走线1320、一连接走线1330，该两个电源走线1310间隔设置，每一电源走线1310的一端对应与一电源引脚1110连接，另一端向靠近系统地线1200的方向延伸，所述连接走线1330与两个电源走线1310的另一端连接并与系统地线1200相间隔，所述连接走线1330与电源正电压信号线2100相交叠，第一布线层1000及第二布线层2000之间设有绝缘层（未图示），绝缘层对应连接走线1330与电源正电压信号线2100相交叠的部分设有过孔9000，连接走线1330通过过孔9000与电源正电压信号线2100连接。所述参考地走线1320位于两个电源走线1310及连接走线1330所围区域内且一端与参考地引脚1120连接，此印刷电路板中，系统地线1200与相连接的参考地引脚1120及参考地走线1320之间的回路被连接走线1330阻断，使得参考地引脚1120与系统地线1200被切割开，导致参考地引脚1120上的电压不稳，以致通过该印刷电路板向覆晶薄膜供电时供电电源的波纹增大，电源不稳定，严重时会使得覆晶薄膜不能正常工作，印刷电路板的抗电磁干扰（EMI）表现较差。
 技术问题
本发明的目的在于提供一种印刷电路板，能够提升输出的供电电压的稳定性，降低供电电压的波纹，抗电磁干扰性能较好。
本发明的另一目的在于提供一种显示装置，其印刷电路板输出的供电电压的稳定性较高，供电电压的波纹较少，抗电磁干扰性能较好。
 技术解决方案
为实现上述目的，本发明首先提供一种印刷电路板，包括第一布线层、设于第一布线层上方的第二布线层及设于第一布线层与第二布线层之间的绝缘层；所述第一布线层包括电源正电压信号线；所述第二布线层包括输出引脚组、与输出引脚组相间隔的系统地线以及设于输出引脚组与系统地线之间的走线组；所述输出引脚组包括间隔设置的两个电源引脚及设于两个电源引脚之间的参考地引脚；所述走线组包括两个间隔设置的电源走线及一参考地走线；每一电源走线的一端对应与一电源引脚连接，另一端向靠近系统地线的方向延伸，每一电源走线与电源正电压信号线相交叠，所述绝缘层对应每一电源走线与电源正电压信号线相交叠的部分设有过孔，每一电源走线经对应的过孔与电源正电压信号线连接；所述参考地走线设于两个电源走线之间，所述参考地走线的一端与参考地引脚连接，另一端与系统地线连接。
定义由输出引脚组指向系统地线的方向为第一方向，所述两个电源引脚的排列方向与第一方向垂直。
所述系统地线及电源正电压信号线均为直线状；所述系统地线的延伸方向及电源正电压信号线的延伸方向均与第一方向垂直。
所述走线组还包括分别设于两个电源走线的另一端与系统地线之间的两个电容走线，每一电容走线对应与一电源走线的另一端连接。
该两个电容走线均为直线状；该两个电容走线所在直线重合；该两个电容走线均与系统地线平行。
每一电源引脚包括沿两个电源引脚的排列方向依次间隔设置的多个子电源引脚，每一电源走线的一端与对应的电源引脚的多个子电源引脚均连接；所述参考地引脚包括沿两个电源引脚的排列方向依次间隔设置的多个子参考地引脚，所述参考地走线的一端与参考地引脚的多个子参考地引脚均连接。每一电源引脚包括两个子电源引脚；所述参考地引脚包括两个或四个子参考地引脚。
所述两个电源走线包括第一电源走线及第二电源走线；
所述第一电源走线包括第一直线部及第二直线部，所述第一直线部的一端与对应的电源引脚连接，另一端向靠近系统地线的方向延伸，所述第二直线部的一端与第一直线部的另一端连接，另一端向靠近系统地线的方向延伸；第一直线部平行于输出引脚组及系统地线的排列方向，第二直线部与第一直线部之间的夹角为锐角，第二直线部与电源正电压信号线交叠，所述绝缘层对应第二直线部与电源正电压信号线相交叠的部分设有第一过孔，所述第二直线部经第一过孔与电源正电压信号线连接；
所述第二电源走线包括第三直线部、第四直线部及第五直线部，所述第三直线部的一端与对应的电源引脚连接，另一端向靠近系统地线的方向延伸，所述第四直线部的一端与第三直线部的另一端连接，另一端向靠近系统地线的方向延伸，所述第五直线部的一端连接第四直线部的另一端，另一端向靠近系统地线的方向延伸，第三直线部及第五直线部均平行于输出引脚组及系统地线的排列方向，第四直线部与第三直线部之间的夹角为锐角，第五直线部与电源正电压信号线交叠，所述绝缘层对应第五直线部与电源正电压信号线相交叠的部分设有第二过孔，所述第五直线部经第二过孔与电源正电压信号线连接。
所述第一电源走线还包括第六直线部，所述第六直线部的一端与第二直线部的另一端连接，另一端向靠近系统地线的方向延伸，第六直线部平行于输出引脚组及系统地线的排列方向。
本发明还提供一种显示装置，包括上述的印刷电路板。
 有益效果
本发明的有益效果：本发明的印刷电路板中的第二布线层包括输出引脚组、系统地线以及走线组，输出引脚组包括两个电源引脚及参考地引脚，走线组中的每一电源走线的一端对应与一电源引脚连接，另一端向靠近系统地线的方向延伸，每一电源走线与第一布线层中的电源正电压信号线相交叠并经绝缘层上对应的过孔与电源正电压信号线连接，走线组中的参考地走线设于两个电源走线之间且一端与参考地引脚连接，另一端与系统地线连接，从而参考地引脚、参考地走线及系统地线连接到一起，保证参考地引脚上的电压稳定，从而能够提供稳定的供电电压，降低供电电压的波纹，抗电磁干扰的能力强。本发明的显示装置的印刷电路板输出的供电电压的稳定性较高，供电电压的波纹较少，抗电磁干扰性能较好。
 附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有一种作为X板的印刷电路板的剖视结构示意图；
图2为图1所示的印刷电路板的第一布线层及第二布线层的俯视布线示意图；
图3为本发明的印刷电路板的第一实施例的俯视布线示意图；
图4为本发明的印刷电路板在电源走线与电源正电压信号线交叠处的剖视示意图；
图5为本发明的印刷电路板的第二实施例的俯视布线示意图。
 本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图3及图4，本发明的第一实施例的印刷电路板包括第一布线层10、设于第一布线层10上方的第二布线层20及设于第一布线层10与第二布线层20之间的绝缘层30。所述第一布线层10包括电源正电压信号线11。所述第二布线层20包括输出引脚组21、与输出引脚组21相间隔的系统地线22以及设于输出引脚组21与系统地线22之间的走线组23。所述输出引脚组21包括间隔设置的两个电源引脚211及设于两个电源引脚211之间的参考地引脚212。所述走线组23包括两个间隔设置的电源走线231及一参考地走线232。每一电源走线231的一端对应与一电源引脚211连接，另一端向靠近系统地线22的方向延伸，每一电源走线231与电源正电压信号线11相交叠，所述绝缘层30对应每一电源走线231与电源正电压信号线11相交叠的部分设有过孔90，每一电源走线231经对应的过孔90与电源正电压信号线11连接。所述参考地走线232设于两个电源走线231之间，所述参考地走线232的一端与参考地引脚212连接，另一端与系统地线22连接。
优选地，请参阅图3，定义由输出引脚组21指向系统地线22的方向为第一方向，所述两个电源引脚211的排列方向与第一方向垂直。
具体地，请参阅图3，所述系统地线22及电源正电压信号线11均为直线状。所述系统地线22的延伸方向及电源正电压信号线11的延伸方向均与第一方向垂直。
具体地，请参阅图3，所述走线组23还包括分别设于两个电源走线231的另一端与系统地线22之间的两个电容走线233，每一电容走线233对应与一电源走线231的另一端连接。该两个电容走线233分别与系统地线22之间形成滤波电容。
优选地，请参阅图3，该两个电容走线233均为直线状。该两个电容走线233所在直线重合。该两个电容走线233均与系统地线22平行。
具体地，每一电源引脚211包括沿两个电源引脚211的排列方向依次间隔设置的多个子电源引脚A，每一电源走线231的一端与对应的电源引脚211的多个子电源引脚A均连接。所述参考地引脚212包括沿两个电源引脚211的排列方向依次间隔设置的多个子参考地引脚B，所述参考地走线232的一端与参考地引脚212的多个子参考地引脚B均连接。
进一步地，请参阅图3，在本发明的第一实施例中，每一电源引脚211包括两个子电源引脚A。所述参考地引脚212包括两个子参考地引脚B。
具体地，在图3所示的实施例中，所述两个电源走线231包括第一电源走线C及第二电源走线D。 所述第一电源走线C包括第一直线部C1及第二直线部C2，所述第一直线部C1的一端与对应的电源引脚211连接，另一端向靠近系统地线22的方向延伸，所述第二直线部C2的一端与第一直线部C1的另一端连接，另一端向靠近系统地线22的方向延伸。第一直线部C1平行于输出引脚组21及系统地线22的排列方向，第二直线部C2与第一直线部C1之间的夹角为锐角，第二直线部C2与电源正电压信号线11交叠，所述绝缘层30对应第二直线部C2与电源正电压信号线11相交叠的部分设有第一过孔91，所述第二直线部C2经第一过孔91与电源正电压信号线11连接。所述第二电源走线D包括第三直线部D1、第四直线部D2及第五直线部D3，所述第三直线部D1的一端与对应的电源引脚211连接，另一端向靠近系统地线22的方向延伸，所述第四直线部D2的一端与第三直线部D1的另一端连接，另一端向靠近系统地线22的方向延伸，所述第五直线部D3的一端连接第四直线部D2的另一端，另一端向靠近系统地线22的方向延伸，第三直线部D1及第五直线部D1均平行于输出引脚组21及系统地线22的排列方向，第四直线部D2与第三直线部D1之间的夹角为锐角，第五直线部D3与电源正电压信号线11交叠，所述绝缘层30对应第五直线部D3与电源正电压信号线11相交叠的部分设有第二过孔92，所述第五直线部D3经第二过孔92与电源正电压信号线11连接。
请参阅图5，本发明的第二实施例的印刷电路板与上述第一实施例的区别在于，所述参考地引脚212包括四个子参考地引脚B。所述第一电源走线C还包括第六直线部C3，所述第六直线部C3的一端与第二直线部C2的另一端连接，另一端向靠近系统地线22的方向延伸，第六直线部C3平行于输出引脚组21及系统地线22的排列方向。其余均与上述第一实施例相同，在此不再进行赘述。
需要说明的是，本发明的印刷电路板设置每一电源走线231的一端对应与一电源引脚211连接，另一端向靠近系统地线22的方向延伸，且每一电源走线231与电源正电压信号线11相交叠，绝缘层30对应每一电源走线231与电源正电压信号线11相交叠的部分设有过孔90，每一电源走线231经对应的过孔90与电源正电压信号线11连接，所述参考地走线232设于两个电源走线231之间，所述参考地走线232的一端与参考地引脚212连接，另一端与系统地线22连接，从而参考地引脚212、参考地走线232及系统地线22连接到一起，保证参考地引脚212上的电压稳定，以该印刷电路板作为X板能够向显示装置中的COF提供稳定的供电电压，降低供电电压的波纹，抗电磁干扰的能力强。
基于同一发明构思，本发明还提供一种显示装置，包括上述的印刷电路板，在此不再对印刷电路板的结构进行重复性描述。该印刷电路板作为液晶显示装置的X板，通过其输出引脚组21与显示装置中的COF电性连接。
需要说明的是，本发明显示装置的印刷电路板设置每一电源走线231的一端对应与一电源引脚211连接，另一端向靠近系统地线22的方向延伸，且每一电源走线231与电源正电压信号线11相交叠，绝缘层30对应每一电源走线231与电源正电压信号线11相交叠的部分设有过孔90，每一电源走线231经对应的过孔90与电源正电压信号线11连接，所述参考地走线232设于两个电源走线231之间，所述参考地走线232的一端与参考地引脚212连接，另一端与系统地线22连接，从而参考地引脚212、参考地走线232及系统地线22连接到一起，保证参考地引脚212上的电压稳定，能够向COF提供稳定的供电电压，降低供电电压的波纹，抗电磁干扰的能力强。
综上所述，本发明的印刷电路板中的第二布线层包括输出引脚组、系统地线以及走线组，输出引脚组包括两个电源引脚及参考地引脚，走线组中的每一电源走线的一端对应与一电源引脚连接，另一端向靠近系统地线的方向延伸，每一电源走线与第一布线层中的电源正电压信号线相交叠并经绝缘层上对应的过孔与电源正电压信号线连接，走线组中的参考地走线设于两个电源走线之间且一端与参考地引脚连接，另一端与系统地线连接，从而参考地引脚、参考地走线及系统地线连接到一起，保证参考地引脚上的电压稳定，从而能够提供稳定的供电电压，降低供电电压的波纹，抗电磁干扰的能力强。本发明的显示装置的印刷电路板能够提升输出的供电电压的稳定性，降低供电电压的波纹，抗电磁干扰性能较好。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (18)

  1. 一种印刷电路板，包括第一布线层、设于第一布线层上方的第二布线层及设于第一布线层与第二布线层之间的绝缘层；所述第一布线层包括电源正电压信号线；所述第二布线层包括输出引脚组、与输出引脚组相间隔的系统地线以及设于输出引脚组与系统地线之间的走线组；所述输出引脚组包括间隔设置的两个电源引脚及设于两个电源引脚之间的参考地引脚；所述走线组包括两个间隔设置的电源走线及一参考地走线；每一电源走线的一端对应与一电源引脚连接，另一端向靠近系统地线的方向延伸，每一电源走线与电源正电压信号线相交叠，所述绝缘层对应每一电源走线与电源正电压信号线相交叠的部分设有过孔，每一电源走线经对应的过孔与电源正电压信号线连接；所述参考地走线设于两个电源走线之间，所述参考地走线的一端与参考地引脚连接，另一端与系统地线连接。
  2. 如权利要求1所述的印刷电路板，其中，定义由输出引脚组指向系统地线的方向为第一方向，所述两个电源引脚的排列方向与第一方向垂直。
  3. 如权利要求2所述的印刷电路板，其中，所述系统地线及电源正电压信号线均为直线状；所述系统地线的延伸方向及电源正电压信号线的延伸方向均与第一方向垂直。
  4. 如权利要求3所述的印刷电路板，其中，所述走线组还包括分别设于两个电源走线的另一端与系统地线之间的两个电容走线，每一电容走线对应与一电源走线的另一端连接。
  5. 如权利要求4所述的印刷电路板，其中，该两个电容走线均为直线状；该两个电容走线所在直线重合；该两个电容走线均与系统地线平行。
  6. 如权利要求1所述的印刷电路板，其中，每一电源引脚包括沿两个电源引脚的排列方向依次间隔设置的多个子电源引脚，每一电源走线的一端与对应的电源引脚的多个子电源引脚均连接；所述参考地引脚包括沿两个电源引脚的排列方向依次间隔设置的多个子参考地引脚，所述参考地走线的一端与参考地引脚的多个子参考地引脚均连接。
  7. 如权利要求6所述的印刷电路板，其中，每一电源引脚包括两个子电源引脚；所述参考地引脚包括两个或四个子参考地引脚。
  8. 如权利要求1所述的印刷电路板，其中，所述两个电源走线包括第一电源走线及第二电源走线；
    所述第一电源走线包括第一直线部及第二直线部，所述第一直线部的一端与对应的电源引脚连接，另一端向靠近系统地线的方向延伸，所述第二直线部的一端与第一直线部的另一端连接，另一端向靠近系统地线的方向延伸；第一直线部平行于输出引脚组及系统地线的排列方向，第二直线部与第一直线部之间的夹角为锐角，第二直线部与电源正电压信号线交叠，所述绝缘层对应第二直线部与电源正电压信号线相交叠的部分设有第一过孔，所述第二直线部经第一过孔与电源正电压信号线连接；
    所述第二电源走线包括第三直线部、第四直线部及第五直线部，所述第三直线部的一端与对应的电源引脚连接，另一端向靠近系统地线的方向延伸，所述第四直线部的一端与第三直线部的另一端连接，另一端向靠近系统地线的方向延伸，所述第五直线部的一端连接第四直线部的另一端，另一端向靠近系统地线的方向延伸，第三直线部及第五直线部均平行于输出引脚组及系统地线的排列方向，第四直线部与第三直线部之间的夹角为锐角，第五直线部与电源正电压信号线交叠，所述绝缘层对应第五直线部与电源正电压信号线相交叠的部分设有第二过孔，所述第五直线部经第二过孔与电源正电压信号线连接。
  9. 如权利要求8所述的印刷电路板，其中，所述第一电源走线还包括第六直线部，所述第六直线部的一端与第二直线部的另一端连接，另一端向靠近系统地线的方向延伸，第六直线部平行于输出引脚组及系统地线的排列方向。
  10. 一种显示装置，包括印刷电路板；
    所述印刷电路板包括第一布线层、设于第一布线层上方的第二布线层及设于第一布线层与第二布线层之间的绝缘层；所述第一布线层包括电源正电压信号线；所述第二布线层包括输出引脚组、与输出引脚组相间隔的系统地线以及设于输出引脚组与系统地线之间的走线组；所述输出引脚组包括间隔设置的两个电源引脚及设于两个电源引脚之间的参考地引脚；所述走线组包括两个间隔设置的电源走线及一参考地走线；每一电源走线的一端对应与一电源引脚连接，另一端向靠近系统地线的方向延伸，每一电源走线与电源正电压信号线相交叠，所述绝缘层对应每一电源走线与电源正电压信号线相交叠的部分设有过孔，每一电源走线经对应的过孔与电源正电压信号线连接；所述参考地走线设于两个电源走线之间，所述参考地走线的一端与参考地引脚连接，另一端与系统地线连接。
  11. 如权利要求10所述的显示装置，其中，定义由输出引脚组指向系统地线的方向为第一方向，所述两个电源引脚的排列方向与第一方向垂直。
  12. 如权利要求11所述的显示装置，其中，所述系统地线及电源正电压信号线均为直线状；所述系统地线的延伸方向及电源正电压信号线的延伸方向均与第一方向垂直。
  13. 如权利要求12所述的显示装置，其中，所述走线组还包括分别设于两个电源走线的另一端与系统地线之间的两个电容走线，每一电容走线对应与一电源走线的另一端连接。
  14. 如权利要求13所述的显示装置，其中，该两个电容走线均为直线状；该两个电容走线所在直线重合；该两个电容走线均与系统地线平行。
  15. 如权利要求10所述的显示装置，其中，每一电源引脚包括沿两个电源引脚的排列方向依次间隔设置的多个子电源引脚，每一电源走线的一端与对应的电源引脚的多个子电源引脚均连接；所述参考地引脚包括沿两个电源引脚的排列方向依次间隔设置的多个子参考地引脚，所述参考地走线的一端与参考地引脚的多个子参考地引脚均连接。
  16. 如权利要求15所述的显示装置，其中，每一电源引脚包括两个子电源引脚；所述参考地引脚包括两个或四个子参考地引脚。
  17. 如权利要求10所述的显示装置，其中，所述两个电源走线包括第一电源走线及第二电源走线；
    所述第一电源走线包括第一直线部及第二直线部，所述第一直线部的一端与对应的电源引脚连接，另一端向靠近系统地线的方向延伸，所述第二直线部的一端与第一直线部的另一端连接，另一端向靠近系统地线的方向延伸；第一直线部平行于输出引脚组及系统地线的排列方向，第二直线部与第一直线部之间的夹角为锐角，第二直线部与电源正电压信号线交叠，所述绝缘层对应第二直线部与电源正电压信号线相交叠的部分设有第一过孔，所述第二直线部经第一过孔与电源正电压信号线连接；
    所述第二电源走线包括第三直线部、第四直线部及第五直线部，所述第三直线部的一端与对应的电源引脚连接，另一端向靠近系统地线的方向延伸，所述第四直线部的一端与第三直线部的另一端连接，另一端向靠近系统地线的方向延伸，所述第五直线部的一端连接第四直线部的另一端，另一端向靠近系统地线的方向延伸，第三直线部及第五直线部均平行于输出引脚组及系统地线的排列方向，第四直线部与第三直线部之间的夹角为锐角，第五直线部与电源正电压信号线交叠，所述绝缘层对应第五直线部与电源正电压信号线相交叠的部分设有第二过孔，所述第五直线部经第二过孔与电源正电压信号线连接。
  18. 如权利要求17所述的显示装置，其中，所述第一电源走线还包括第六直线部，所述第六直线部的一端与第二直线部的另一端连接，另一端向靠近系统地线的方向延伸，第六直线部平行于输出引脚组及系统地线的排列方向。
PCT/CN2019/094622 2019-04-29 2019-07-03 印刷电路板及显示装置 WO2020220465A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/616,454 US11310906B2 (en) 2019-04-29 2019-07-03 Printed circuit board and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910357023.0A CN109951951B (zh) 2019-04-29 2019-04-29 印刷电路板及显示装置
CN201910357023.0 2019-04-29

Publications (1)

Publication Number Publication Date
WO2020220465A1 true WO2020220465A1 (zh) 2020-11-05

Family

ID=67016772

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/094622 WO2020220465A1 (zh) 2019-04-29 2019-07-03 印刷电路板及显示装置

Country Status (3)

Country Link
US (1) US11310906B2 (zh)
CN (1) CN109951951B (zh)
WO (1) WO2020220465A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109951951B (zh) * 2019-04-29 2020-06-16 深圳市华星光电技术有限公司 印刷电路板及显示装置
EP4339935A1 (en) * 2021-12-31 2024-03-20 BOE Technology Group Co., Ltd. Display panel and display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2831428Y (zh) * 2005-01-06 2006-10-25 威盛电子股份有限公司 引脚架封装体
CN109634003A (zh) * 2019-02-21 2019-04-16 厦门天马微电子有限公司 一种显示面板及显示装置
CN109951951A (zh) * 2019-04-29 2019-06-28 深圳市华星光电技术有限公司 印刷电路板及显示装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007225792A (ja) * 2006-02-22 2007-09-06 Funai Electric Co Ltd 液晶テレビジョンおよび液晶表示装置用基板構造
US7830591B2 (en) * 2006-11-20 2010-11-09 Seiko Epson Corporation Active-matrix circuit board and display
CN101498852A (zh) * 2009-03-17 2009-08-05 华映光电股份有限公司 配线结构及其应用的显示面板
CN102970814B (zh) * 2011-08-31 2015-06-17 英业达股份有限公司 一种印刷电路板
JP5819218B2 (ja) * 2012-02-23 2015-11-18 ルネサスエレクトロニクス株式会社 半導体装置
CN205430774U (zh) * 2016-03-16 2016-08-03 杭州宝临印刷电路有限公司 一种银浆孔化的印刷线路板
DE102018116531A1 (de) * 2017-10-23 2019-06-06 Samsung Electronics Co., Ltd. Anzeigevorrichtung, Halbleiterpackage und Film für ein Packagesubstrat
CN107831940B (zh) * 2017-11-16 2020-10-23 业成科技（成都）有限公司 具静电防护能力之触控装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2831428Y (zh) * 2005-01-06 2006-10-25 威盛电子股份有限公司 引脚架封装体
CN109634003A (zh) * 2019-02-21 2019-04-16 厦门天马微电子有限公司 一种显示面板及显示装置
CN109951951A (zh) * 2019-04-29 2019-06-28 深圳市华星光电技术有限公司 印刷电路板及显示装置

Also Published As

Publication number Publication date
CN109951951B (zh) 2020-06-16
CN109951951A (zh) 2019-06-28
US11310906B2 (en) 2022-04-19
US20220061149A1 (en) 2022-02-24

Similar Documents

Publication Publication Date Title
RU2486577C1 (ru) Схема управления дисплеем и одноплатный модуль, включающий в себя такую схему
WO2021249345A1 (zh) 柔性线路板及显示装置
US11589461B2 (en) Flexible printed circuit and manufacturing method thereof, electronic device module and electronic device
US11934606B2 (en) Flexible circuit board and manufacturing method, display device, circuit board structure and display panel thereof
WO2022205551A1 (zh) 覆晶薄膜组、显示面板及显示模组
WO2022000619A1 (zh) 显示面板及显示装置
US20100188826A1 (en) Connector device
WO2020220465A1 (zh) 印刷电路板及显示装置
US11586311B2 (en) Display panel and displaying device
US20220390785A1 (en) Display panel and display device
WO2020156595A9 (zh) 柔性电路板及制作方法、显示装置、电路板结构及其显示面板
KR102454150B1 (ko) 칩온필름 및 이를 구비한 표시장치
CN215453382U (zh) 显示装置
WO2020156475A1 (zh) 柔性电路板及制作方法、电子装置模组及电子装置
CN103118483B (zh) 电子组件
CN210007990U (zh) 一种电连接结构及电子设备
WO2021027076A1 (zh) 覆晶薄膜组件及显示面板组件
WO2020220466A1 (zh) 印刷电路板及显示装置
CN219919251U (zh) 印制电路板及电子设备
CN2881693Y (zh) 液晶显示器
US8681281B2 (en) Grounding structure for display device
WO2023246608A1 (zh) 电路板及终端
US20230143791A1 (en) Circuit board structure for mobile pci express module
TWI288267B (en) Liquid crystal display panel and method of fabricating the circuit substrate of the liquid crystal display panel
TWM651590U (zh) 電訊分離連接器總成

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19927537

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19927537

Country of ref document: EP

Kind code of ref document: A1