WO2020211808A1 - 显示基板、显示面板、显示装置及制作方法 - Google Patents

显示基板、显示面板、显示装置及制作方法 Download PDF

Info

Publication number
WO2020211808A1
WO2020211808A1 PCT/CN2020/085051 CN2020085051W WO2020211808A1 WO 2020211808 A1 WO2020211808 A1 WO 2020211808A1 CN 2020085051 W CN2020085051 W CN 2020085051W WO 2020211808 A1 WO2020211808 A1 WO 2020211808A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
pad
hole
display substrate
led device
Prior art date
Application number
PCT/CN2020/085051
Other languages
English (en)
French (fr)
Inventor
陈亮
王磊
玄明花
肖丽
刘冬妮
赵德涛
陈昊
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Publication of WO2020211808A1 publication Critical patent/WO2020211808A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a display panel, a display device and a manufacturing method.
  • Micro LED Micro Light Emitting Diode, Micro Light Emitting Diode or Micro Light Emitting Diode
  • display substrate due to its high brightness, good luminous efficiency, low power consumption, long life and other characteristics, is suitable for use in TVs, mobile phones, tablets and other devices, and it has been increasingly popular. The more attention.
  • the embodiment of the present disclosure provides a display substrate, a display panel, a display device, and a manufacturing method thereof.
  • An embodiment of the present disclosure provides a display substrate, including a base substrate and a plurality of pixel units located on the base substrate, the pixel unit includes a first insulating layer, and a first electrode and a second electrode insulated from each other;
  • An insulating layer has a through hole, the first electrode is located in the through hole, the first electrode is used to connect to the first pad of the LED device that extends into the through hole, the second electrode is located around the through hole, and the second electrode Used to connect with the second pad of the LED device.
  • the first electrode is a bulk electrode, and the first electrode is located at an end of the through hole close to the base substrate, or the first electrode is a ring-shaped cylindrical electrode, and the cylinder The shaped electrode is located on the side wall of the through hole.
  • the bulk electrode has a groove for receiving the first pad, and the groove is located in the through hole.
  • the depth of the groove is smaller than the thickness of the first electrode.
  • the distance between the first surface of the first electrode and the second surface of the base substrate is less than the distance between the third surface of the second electrode and the second surface of the base substrate. distance.
  • the second electrode is located on the first insulating layer, and the second electrode is a ring electrode surrounding the through hole, or the second electrode is a bulk electrode.
  • the display substrate further includes a first voltage trace and a second voltage trace on the base substrate, the first voltage trace is electrically connected to the first electrode, and the second voltage trace is electrically connected to the first electrode.
  • the voltage trace is electrically connected to the second electrode, and the first voltage trace and the second voltage trace are parallel.
  • the first voltage trace and the second voltage trace are in the same layer as the first electrode; or, the first voltage trace is in the same layer as the first electrode, and the second voltage trace The voltage trace is on the same layer as the second electrode.
  • the display substrate further includes a plurality of thin film transistors, each of the pixel units includes one thin film transistor, a first electrode of the thin film transistor is electrically connected to the first voltage wiring, and the thin film transistor The second electrode of the transistor is electrically connected to the first electrode.
  • the display substrate further includes a scan line, the scan line is connected with the control electrode of the thin film transistor, and the scan line intersects the first voltage wiring and the second voltage wiring.
  • the embodiments of the present disclosure also provide a display panel, which includes any one of the aforementioned display substrates and a plurality of LED devices on the display substrate.
  • the LED device includes a light-emitting body, a first pad, and a second pad.
  • the first pad and the second pad are located on the same side of the light-emitting body and are insulated from each other. In the direction of the side surface, the heights of the first pad and the second pad of at least one of the LED devices are not equal.
  • the second pad has a ring shape, the second pad has a cylindrical shape, and the second pad surrounds the first pad.
  • the height of the first pad is greater than the height of the second pad.
  • the embodiment of the present disclosure also provides a display device including any of the foregoing display panels.
  • the embodiments of the present disclosure also provide a manufacturing method of a display substrate, the manufacturing method including:
  • a plurality of pixel units are formed on a base substrate, the pixel units include a first insulating layer, and a first electrode and a second electrode insulated from each other.
  • the first insulating layer has a through hole, and the first electrode is located in the through hole, The first electrode is used to connect to the first pad of the LED device extending into the through hole, the second electrode is located around the through hole, and the second electrode is used to connect to the second pad of the LED device.
  • the embodiment of the present disclosure also provides a manufacturing method of a display panel, and the manufacturing method includes:
  • the first pad is electrically connected to the first electrode, and the second pad is electrically connected to the second electrode.
  • FIG. 1 is a schematic diagram of a partial structure of a display panel in the related art
  • FIG. 2 is a schematic diagram of a planar structure of a display substrate provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a hierarchical structure of a display substrate provided by an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of a hierarchical structure of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of projections of a first electrode and a second electrode on a base substrate provided by an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of projections of another first electrode and a second electrode on a base substrate provided by an embodiment of the present disclosure
  • FIG. 7 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram of another display panel provided by an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 10 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 11 is a schematic structural diagram of an LED device provided by an embodiment of the present disclosure.
  • FIG. 12 is a schematic structural diagram of another LED device provided by an embodiment of the present disclosure.
  • Fig. 13 is a schematic structural diagram of another LED device provided by an embodiment of the present disclosure.
  • FIG. 14 is a top view of another LED device provided by an embodiment of the present disclosure.
  • FIG. 15 is a schematic diagram of the A cross-sectional structure of the LED device in FIG. 14;
  • FIG. 16 is a top view of another LED device provided by an embodiment of the present disclosure.
  • FIG. 17 is a schematic diagram of the B cross-sectional structure of the LED device in FIG. 16;
  • FIG. 18 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 19 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 20 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 21 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 22 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 23 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure.
  • FIG. 24 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 25 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure.
  • FIG. 26 is a flowchart of a manufacturing method of an LED device provided by an embodiment of the present disclosure.
  • FIG. 27 is a flowchart of a manufacturing method of an LED device provided by an embodiment of the present disclosure.
  • FIGS 28 to 39 are schematic diagrams of the manufacturing process of the LED device in Figure 15;
  • FIG. 40 is a flowchart of another method for manufacturing an LED device provided by an embodiment of the present disclosure.
  • 41 to 56 are schematic diagrams of the manufacturing process of the LED device in FIG. 17;
  • FIG. 57 is a flowchart of a manufacturing method of a display panel provided by an embodiment of the present disclosure.
  • the Micro LED display substrate After the production of the LED device is completed, it needs to be transferred to the display substrate and electrically connected with the display substrate, so as to control the LED device to emit light through the display substrate.
  • multiple through holes are usually opened on multiple film layers of the display substrate, and the first pad and the second pad of the LED device are respectively electrically connected to corresponding electrodes on the display substrate through at least one through hole. Since the film opening process on the display substrate is complicated, the production is difficult, and the large number of openings easily leads to a low yield rate.
  • FIG. 1 is a schematic diagram of a partial structure of a display panel in the related art.
  • the display panel includes an LED device 200a and a display substrate 100a.
  • the LED device 200a includes a light-emitting body 210a and a first pad 220a and a second pad 230a located on the same side of the light-emitting body 210a.
  • the display substrate 100a includes a base substrate 110a and a first metal layer 120a, a first insulating layer 130a, a second metal layer 140a, and a second insulating layer 150a which are sequentially stacked on the base substrate 110a.
  • a first electrode 151a corresponding to the first pad 220a and a second electrode 153a corresponding to the second pad 230a are provided on the surface of the second insulating layer 150a.
  • the first electrode 151a is connected to the first metal layer through the via holes 152a and 141a.
  • 120a is electrically connected
  • the second electrode 153a is connected to the second metal layer 140a through the via 154a.
  • the display substrate 100a provides the LED device 200a with an operating voltage VDD and a common voltage VSS through the first electrode 151a and the second electrode 153a, respectively, to drive the LED device 200a to emit light.
  • the display substrate 100a Since the first electrode 151a is electrically connected to the first metal layer 120a through the via holes 152a and 141a, and the second electrode 153a is connected to the second metal layer 140a through the via hole 154a, the display substrate 100a has many via holes and the manufacturing process is difficult Larger, resulting in a lower yield rate.
  • the projections of the vias 152a, 141a, and 154a on the base substrate 110a and the projections of the LED devices on the base substrate 110a do not overlap each other, that is, the vias are arranged outside the projection of the LED device. Area, occupying the area of the display panel.
  • FIG. 2 is a schematic diagram of a plan structure of a display substrate 100 provided by an embodiment of the present disclosure.
  • the display substrate 100 includes a base substrate 110 and a plurality of pixel units 111 on the base substrate 110.
  • a plurality of pixel units 111 may be arranged on the base substrate 110 in an array.
  • Each pixel unit 111 is used to connect an LED device.
  • FIG. 3 is a schematic diagram of the hierarchical structure of a display substrate provided by an embodiment of the present disclosure, showing the hierarchical structure of one pixel unit 111 in FIG. 2.
  • the pixel unit 111 includes a first insulating layer 122, a first electrode 130 and a second electrode 140.
  • the first electrode 130 and the second electrode 140 are insulated from each other.
  • the first insulating layer 122 has a through hole 150, at least a part of the first electrode 130 is located in the through hole 150, and the first electrode 130 is used to connect with the first pad of the LED device extending into the through hole 150.
  • the second electrode 140 is located around the through hole 150, and the second electrode 140 is used to connect to the second pad of the LED device.
  • the first pad and the second pad of the LED device are connected to the first electrode 130 and the second electrode respectively.
  • 140 is electrically connected to provide driving voltage for the LED device. Only one through hole on the display substrate can be used to realize the electrical connection between the first pad and the second pad of the LED device and the corresponding electrode on the display substrate 100, because one LED device only needs to pass through one through hole.
  • the hole can realize the driving of the LED device, which reduces the number of openings on the film layer 120, thereby reducing the process difficulty and improving the yield rate.
  • a base substrate 110 has a plurality of film layers 120, and the plurality of film layers 120 include a first conductive layer 121, a first insulating layer 122, and a second conductive layer 121 sequentially located on the base substrate 110.
  • the first electrode 130 is located on the first conductive layer 121
  • the second electrode 140 is located on the second conductive layer 123, that is, the second electrode 140 is located on the first insulating layer 122.
  • the plurality of film layers 120 may further include a second insulating layer 124 disposed on the second conductive layer 123 so as to isolate the influence of the external environment on the second conductive layer 123.
  • the first conductive layer 121 and the second conductive layer 123 may be made of metal materials, for example, they may be made of at least one of metals such as gold, tin, iridium, etc., or they may be made of non-metallic conductive materials. , Such as ITO, etc.
  • the materials of the first conductive layer 121 and the second conductive layer 123 may be the same or different.
  • Both the first insulating layer 122 and the second insulating layer 124 may be made of organic insulating materials or inorganic insulating materials.
  • the organic insulating material includes resin materials such as polyimide, epoxy resin, acrylic, polyester, photoresist, polyacrylate, polyamide, and siloxane.
  • the inorganic insulating material includes SiO 2 , SiN x , SiON and the like. The above materials are only examples and are not used to limit the present disclosure.
  • the first insulating layer 122 may be a flat layer, and the second insulating layer 124 may be a passivation layer.
  • the film structure shown in FIG. 3 is only an example, and the display substrate 100 may also include more film layers.
  • the first insulating layer 122 may have a single-layer structure, or a stacked-layer structure formed by superimposing multiple sublayers, which is not limited in the present disclosure.
  • the first conductive layer 121 further includes a first voltage wiring 121a and a second voltage wiring 121b, that is, the first voltage wiring 121a, the second voltage wiring 121b, and the second voltage wiring 121a
  • One electrode 130 is the same layer.
  • the same layer refers to being formed by a patterning process or arranged on the same surface of the same film layer.
  • the first voltage wiring 121a, the second voltage wiring 121b and the first electrode 130 can simplify the process flow, shorten the production time, and improve the production efficiency.
  • the first voltage wiring 121 a is electrically connected to the first electrode 130, and the second voltage wiring 121 b is electrically connected to the second electrode 140.
  • the first voltage wiring 121a is used to provide a first voltage
  • the second voltage wiring 121b is used to provide a second voltage.
  • the first voltage may be one of the operating voltage VDD and the common voltage VSS required to drive the LED device 200 to emit light
  • the second voltage may be the other of the operating voltage VDD and the common voltage VSS required to drive the LED device 200 to emit light.
  • the first voltage is the working voltage VDD and the second voltage is the common voltage VSS; or the first voltage is the common voltage VSS and the second voltage is the working voltage VDD.
  • the first voltage trace and the second voltage trace may also be provided on different layers.
  • the first voltage trace is located on the first conductive layer
  • the second voltage trace is located on the second conductive layer.
  • the arrangement of the first voltage wiring and the second voltage wiring in different layers facilitates to increase the area of the voltage wiring in the plane parallel to the base substrate 110, thereby reducing the resistance of the voltage wiring, and thereby reducing the voltage drop due to IR. (IR Drop) The phenomenon of uneven display.
  • the first voltage trace 121a is the voltage trace VSS1 ⁇ n in FIG. 2
  • the second voltage trace 121b is the voltage trace VSS1 ⁇ n in FIG. 2
  • the first voltage trace The wiring and the second voltage wiring are parallel to each other and arranged alternately to simplify the wiring structure of the display substrate.
  • the base substrate 110 may be a base substrate 110 integrated with a TFT (Thin Film Transistor, thin film field effect transistor), and the voltage trace of the working voltage VDD passes through the TFT in the base substrate 110 and the first electrode 130 or The second electrode 140 is connected, so that the control of the light emission of the LED device 200 is realized through the TFT.
  • TFT Thin Film Transistor, thin film field effect transistor
  • the display substrate 110 may further include a control layer 160.
  • the control layer 160 includes a plurality of TFTs.
  • Each pixel unit 111 includes a TFT.
  • the first electrode of the TFT is electrically connected to the first voltage trace 121a.
  • the second electrode of the TFT is electrically connected to the first electrode 130.
  • the first electrode of the TFT may be one of the source electrode and the drain electrode
  • the second electrode of the TFT may be the other of the source electrode and the drain electrode
  • control layer 160 includes an active layer 161, a gate insulating layer 162, a gate layer 163, an interlayer dielectric layer 164, and a source/drain layer sequentially located on the base substrate 110.
  • the source and drain layers are located in the first conductive layer 121.
  • control layer 160 further includes scan lines (not shown in FIG. 3), and the scan lines are connected to the control electrode of the TFT.
  • the control electrode of the TFT is the gate electrode.
  • the scan line may be located in the gate layer 163.
  • the scan lines Gate1-m may intersect the first voltage trace and the second voltage trace, for example, perpendicularly.
  • m represents the number of scan lines and is a positive integer.
  • the first voltage traces (such as VDD1 ⁇ n), the second voltage traces (such as VSS1 ⁇ n) and the scan lines Gate1 ⁇ m intersect to define a plurality of pixel regions, and each pixel region corresponds to a pixel Unit 111.
  • the base substrate 110 may also be a base substrate without integrated TFT, such as a glass substrate, and the voltage trace of the working voltage VDD is directly connected to the first electrode 130 or the second electrode 140.
  • a plurality of film layers 120 are directly formed on the base substrate 110.
  • the following description takes the base substrate without integrated TFT as an example. It is easy to know that all the hierarchical structures above the base substrate without integrated TFT can be applied to the base substrate integrated with TFT.
  • the second electrode is a ring electrode, and the second electrode may be arranged around the through hole, or the second electrode is a bulk electrode.
  • the second voltage wiring 121b is electrically connected to the second electrode 140 through the via 122a in the first insulating layer 122.
  • the second electrodes 140 in the plurality of pixel units 111 may be integrated (as shown in FIG. 3), that is, a plurality of LED devices share a second electrode.
  • the second electrodes of a row of pixel units are connected into one body, or the second electrodes of all pixel units are connected into one body.
  • the second electrodes of all the pixel units are connected as a whole, the second electrodes can be connected to correspond to the surface electrodes with openings at the through holes 150.
  • the first electrode 130 is a bulk electrode, and the first electrode 130 is located at an end of the through hole 150 close to the base substrate.
  • the first electrode 130 in a pixel unit may be a single block electrode, and each LED device corresponds to one first electrode 130.
  • the first electrode 130 may also be a monolithic electrode (for example, a strip electrode extending along the arrangement direction of the LED devices), and multiple LED devices share one first electrode 130.
  • the first electrode 130 may also be a cylindrical electrode, and the cylindrical electrode is located on the side wall of the through hole 150.
  • At least part of the first electrode 130 is located in the through hole 150, and it may be that the first electrode 130 is entirely arranged in the through hole 150.
  • FIG. 5 is a schematic diagram of the projection of the first electrode 130 and the second electrode 140 on the base substrate 110 according to an embodiment of the present disclosure.
  • the second electrode 140 has a ring shape, and the second electrode 140 is arranged around the through hole 150. This can facilitate uniform contact between the second electrode 140 and the second pad 230 in the circumferential direction, thereby ensuring the stability of the connection.
  • the second electrode 140 is a circular ring electrode, that is, both the inner and outer contours are circular.
  • the second electrode 140 may also be a non-circular ring electrode.
  • at least one of the outer contour and the inner contour is another closed figure, such as a polygon, and the center of the annular outer contour and the inner contour overlap.
  • the outer contour of the ring is a circle, and the inner contour is a polygon; or the outer contour of the ring is a polygon, and the inner contour is a circle.
  • the present disclosure does not limit the shape of the outer contour and the inner contour.
  • All the first electrodes 130 are arranged in the through holes 150, that is, the projection of the first electrodes 130 on the base substrate 110 is within the projection range of the through holes 150 on the base substrate 110.
  • the first electrode 130 is arranged concentrically with the through hole 150, and the radius of the first electrode 130 is smaller than the radius of the through hole 150.
  • At least part of the first electrode 130 is located in the through hole 150, and may be a part of the first electrode 130 located in the through hole 150, for example, the middle of the first electrode 130 is located in the through hole 150, The edge portion is covered by the first insulating layer 122.
  • FIG. 6 is a schematic diagram of another projection of the first electrode 130 and the second electrode 140 on the base substrate 110 provided by an embodiment of the present disclosure.
  • the second electrode 140 is disposed around the through hole 150. Since the projection of the first electrode 130 on the base substrate 110 exceeds the projection of the through hole 150 on the base substrate 110, for example, the first electrode 130 and the through hole 150 are arranged concentrically, and the radius of the first electrode 130 is larger than that of the through hole 150. radius. Therefore, the projection of the first electrode 130 on the base substrate 110 and the projection of the second electrode 140 on the base substrate 110 partially overlap.
  • a groove for accommodating the first pad may be provided in the middle of the first electrode.
  • the middle portion of the first electrode 130 has a groove 131 for receiving the first pad.
  • the thickness of the groove 131 is smaller than the thickness of the first electrode 130.
  • the shape of the groove 131 is the same as the cross-sectional shape of the first pad.
  • the cross-sectional shape of the first pad is circular
  • the cross-sectional shape of the groove 131 may be circular; or, if the cross-sectional shape of the first pad is rectangular, the cross-sectional shape of the groove 131 may be rectangular.
  • FIG. 7 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the groove 131 of the first electrode 130 may also be a through groove, that is, the thickness of the groove 131 is equal to that of the first electrode 130. Thickness to expose part of the base substrate 110. Wherein, the thickness is the dimension in the direction perpendicular to the base substrate 110.
  • the groove may not be located in the middle of the first electrode, as long as it is located in the through hole 150 and can be in contact with the first pad.
  • FIG. 8 is a schematic structural diagram of another display panel provided by an embodiment of the present disclosure. As shown in FIG. 8, the first electrode 130 may not be provided with a groove 131 to simplify the manufacturing process.
  • the first electrode 130 and the second electrode 140 are sequentially located on the base substrate 110.
  • the distance h1 between the first surface 132 of the first electrode 130 and the second surface 111 of the base substrate 110 is smaller than the distance h2 between the third surface 141 of the second electrode 140 and the second surface 111 of the base substrate 110,
  • the first surface 132 is the surface where the first electrode 130 is in contact with the end surface of the first pad 220
  • the second surface 111 is the surface on which the multiple film layers 120 are provided on the base substrate 110
  • the third surface 141 is the second electrode 140
  • the first pad 220 needs to extend into the through hole 150 to be in contact with the first electrode 130.
  • the through hole 150 can protect the connection between the first pad 220 and the first electrode 130, so that The connection of the LED device is more stable.
  • FIG. 9 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the distance h1 from the first surface 132 of the first electrode 130 to the second surface 111 of the base substrate 110 is greater than that of the second electrode
  • the base substrate 110 is provided with a surface of a plurality of film layers 120, and the third surface 141 is the surface of the second electrode 140 opposite to the end surface of the second pad 230.
  • FIG. 10 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the distance h1 from the first surface 132 of the first electrode 130 to the second surface 111 of the base substrate 110 is equal to the second electrode
  • the distance h2 between the third surface 141 of 140 and the second surface 111 of the base substrate 110, the first surface 132 is the surface where the first electrode 130 contacts the first pad 220, and the second surface 111 is the base substrate 110 A surface on which a plurality of film layers 120 are provided, and the third surface 141 is a surface where the second electrode 140 contacts the second pad 230.
  • FIG. 11 is a schematic structural diagram of an LED device provided by an embodiment of the present disclosure.
  • the LED device 200 includes: a light-emitting body 210, a first pad 220, and The second pad 230, the first pad 220 and the second pad 230 are located on the same side surface of the light-emitting body 210 and insulated from each other, and the height of the first pad 220 and the second pad 230 are not equal.
  • the first pad 220 is used for electrical connection with the first electrode 130
  • the second pad 230 is used for electrical connection with the second electrode 140.
  • the display substrate 100 provides driving for the LED device 200 through the first electrode 130 and the second electrode 140, respectively.
  • the operating voltage VDD and the common voltage VSS required for the LED device 200 to emit light.
  • the first electrode 130 is provided in the through hole 150 and the second electrode 140 is provided around the through hole 150, the first pad 220 and the second pad 230 of the LED device are connected to the first electrode 130 and the second electrode 140, respectively.
  • the electrical connection can be realized to provide the driving voltage for the LED device 200. Therefore, only one through hole on the display substrate can be used to realize the electrical connection between the first pad 220 and the second pad 230 of the LED device 200 and the corresponding electrode of the display substrate 100, because one LED device 200 Only one through hole is needed to drive the LED device 200, which reduces the number of openings on the film layer 120, thereby reducing the process difficulty and improving the yield.
  • the light-emitting body 210 may be an LED chip, for example, a micro LED chip.
  • the light emitting body 210 may include a substrate, an epitaxial structure on the substrate, and a cathode and an anode on the epitaxial structure.
  • the epitaxial structure includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer stacked in sequence.
  • the cathode on the epitaxial structure is arranged on the N-type semiconductor layer, and the anode on the epitaxial structure is arranged on the P-type semiconductor layer.
  • the structure of the cathode and the anode away from the surface of the substrate are on the same plane.
  • the first pad 220 and the second pad 230 are respectively connected to the cathode and the anode on the epitaxial structure. That is, the first pad 220 is connected to one of the cathode and the anode, and the second pad 220 is connected to the other of the cathode and the anode.
  • the heights of the first pad 220 and the second pad 230 are not equal, and the distance from the fourth surface 221 of the first pad 220 to the fifth surface 211 of the light emitting body 210 may be greater than The distance from the sixth surface 231 of the second pad 230 to the fifth surface 211 of the light-emitting body 210.
  • the fourth surface 221 is the end surface of the first pad 220 away from the light-emitting body 210.
  • the fifth surface 211 is the cathode and The anode is away from the plane where the surface of the light-emitting body 210 is located, and the sixth surface 231 is an end surface of the second pad away from the light-emitting body 210.
  • the LED device 200 shown in FIG. 11 may be assembled with the display substrate 100 shown in FIG. 3, FIG. 4, FIG. 7 or FIG. 8.
  • FIG. 12 is a schematic structural diagram of another LED device provided by an embodiment of the present disclosure. As shown in FIG. 12, the heights of the first pad 220 and the second pad 230 are not equal, and may be a direction perpendicular to the light-emitting body 210.
  • the distance from the fourth surface 221 of the first pad 220 to the fifth surface 211 of the light-emitting body 210 is smaller than the distance from the sixth surface 231 of the second pad 230 to the fifth surface 211 of the light-emitting body 210, and the fourth surface 221 is the first A pad 220 is away from the end surface of the light-emitting body 210, the fifth surface 211 is a horizontal plane where the cathode and anode of the light-emitting body 210 are away from the light-emitting body 210, and the sixth surface 231 is an end surface of the second pad away from the light-emitting body 210.
  • the LED device 200 shown in FIG. 12 may be assembled with the display substrate 100 shown in FIG. 9.
  • FIG. 13 is a schematic structural diagram of another LED device provided by an embodiment of the present disclosure.
  • the heights of the first pad 220 and the second pad 230 may also be equal, that is, in a direction perpendicular to the light-emitting body 210 .
  • the distance from the fourth surface 221 of the first pad 220 to the fifth surface 211 of the light-emitting body 210 is equal to the distance from the sixth surface 231 of the second pad 230 to the fifth surface 211 of the light-emitting body 210, and the fourth surface 221 is
  • the first pad 220 is away from the end surface of the light-emitting body 210
  • the fifth surface 211 is the horizontal plane where the cathode and anode of the light-emitting body 210 are away from the light-emitting body 210
  • the sixth surface 231 is the end surface of the second pad away from the light-emitting body 210.
  • the LED device 200 shown in FIG. 11 may be assembled with the display substrate 100 shown in
  • the first pad 220 and the second pad 230 may both have a cylindrical shape, and the first pad 220 and the second pad 230 are spaced apart.
  • the first pad 220 The second pad 230 may have a cylindrical shape, the second pad 230 may have a ring shape, and the second pad 230 surrounds the first pad 220, for example, in the embodiments shown in FIGS. 14 to 17.
  • FIG. 14 is a top view of another LED device provided by an embodiment of the present disclosure.
  • the second pad 230 has a ring shape and is arranged around the first pad 220.
  • Both the outer contour and the inner contour of the ring can be circular or other closed figures, such as polygons, and the center of the outer contour and the inner contour of the ring overlap.
  • the outer contour of the ring is circular and the inner contour is polygonal, or the outer contour of the ring is polygonal and the inner contour is circular.
  • the present disclosure does not limit the shapes of the outer contour and the inner contour.
  • FIG. 15 is a schematic diagram of the A cross-sectional structure of the LED device in FIG. 14.
  • the second pad 230 is around the first pad 220, which facilitates the uniform contact between the second electrode 140 and the second pad 230 in the circumferential direction , So as to ensure the stability of the connection.
  • the heights of the first pad 220 and the second pad 230 may be equal or unequal.
  • the specific arrangement manners of the same height and different heights of the first pad 220 and the second pad 230 are the same as those in FIGS. 11 to 13, and will not be described again.
  • FIG. 16 is a top view of another LED device provided by an embodiment of the present disclosure. As shown in FIG. 16, an insulating layer 240 is provided between the first pad 220 and the second pad 230.
  • FIG. 17 is the LED device in FIG. As shown in FIG. 17, the insulating layer 240 is between the first pad 220 and the second pad 230 to facilitate better insulation between the first pad 220 and the second pad 230.
  • the height of the insulating layer 240 is greater than the height of the second pad 230, and the height of the insulating layer 240 may be less than or equal to the height of the first pad 230, so as to better insulate the first pad 220 and the second pad 230. ⁇ 230.
  • the height is a dimension perpendicular to the light-emitting body 210, and the material of the insulating layer 240 may be an insulating material, such as SiO x , SiN x , HfO x , SiON or AlO x to provide good insulation.
  • the first pad and the second pad of the LED device may also be insulated by an insulation gap, such as the LED device shown in FIGS. 9-13.
  • the insulation gap means that the distance between the first pad and the second pad is sufficiently large, so that the first pad and the second pad can be insulated from each other when energized.
  • the embodiment of the present disclosure also provides a display panel.
  • the display panel includes any display substrate 100 as described above and any LED device 200 as described above.
  • FIG. 18 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG. 18, in some embodiments, the display panel includes the LED device shown in FIG. 17 and the display substrate shown in FIG. 3.
  • FIG. 19 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG. 19, in some embodiments, the display panel includes the LED device shown in FIG. 11 and the display substrate shown in FIG. 4.
  • FIG. 20 is a structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG. 20, in some embodiments, the display panel includes the LED device shown in FIG. 12 and the display substrate shown in FIG. 9.
  • FIG. 21 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG. 21, in some embodiments, the display panel includes the LED device shown in FIG. 13 and the display substrate shown in FIG.
  • FIG. 22 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG. 22, in some embodiments, the display panel includes the LED device shown in FIG. 15 and one of the displays shown in FIG. 4 Substrate.
  • FIG. 23 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG. 23, in some embodiments, the display panel includes the LED device shown in FIG. 17 and the display substrate shown in FIG. 4.
  • FIG. 19, FIG. 22, and FIG. 23 can all be replaced with the display substrates shown in FIG. 2, FIG. 7, or FIG.
  • the first electrode 130 is provided in the through hole 150 and the second electrode 140 is provided on the periphery of the through hole 150, the first pad and the second pad of the LED device are electrically connected to the first electrode 130 and the second electrode 140, respectively. It can be realized to provide driving voltage for the LED device. Therefore, only one through hole on the display substrate can be used to realize the electrical connection between the first pad and the second pad of the LED device and the corresponding electrode of the display substrate 100, because one LED device only needs to pass through one The through hole can realize the driving of the LED device, which reduces the number of openings on the film layer, thereby reducing the process difficulty and improving the yield.
  • the via hole is arranged in an area outside the projection of the LED device in the related art, the surface area of the display panel is occupied.
  • the first electrode 130 is arranged in the through hole 150
  • the second electrode 140 is arranged around the through hole 150. Since the first electrode 130 and the second electrode 140 are both projected on the base substrate 110 of the LED device 200 Therefore, compared with the prior art, the area of the welding area is reduced, and the number of LED devices per unit area on the display substrate 100 is increased, that is, the PPI (Pixels Per Inch, pixel density) increases, thereby increasing the fineness of the display effect .
  • An embodiment of the present disclosure also provides a display device, which includes a display panel as shown in any one of FIGS. 16 to 20.
  • the display device may be any product or component with display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • FIG. 24 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure, and the method is used for manufacturing the display substrate as shown in FIGS. 1-10. As shown in Figure 24, the manufacturing method includes:
  • step S11 a base substrate is provided.
  • a plurality of pixel units are formed on the base substrate.
  • the pixel units include a first insulating layer, a first electrode, and a second electrode.
  • the first electrode and the second electrode are insulated from each other, and the first insulating layer has a through hole.
  • the first electrode is located in the through hole, the first electrode is used to connect with the first pad of the LED device extending into the through hole, the second electrode is located around the through hole, and the second electrode is used for the second welding of the LED device ⁇ Disk connection.
  • a plurality of film layers may be sequentially formed on the base substrate, and the plurality of film layers may include a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer sequentially stacked on the base substrate.
  • the first electrode is located on the first conductive layer
  • the second electrode is located on the second conductive layer.
  • the first conductive layer and the second conductive layer can be made of metallic materials, for example, they can be made of at least one of gold, tin, iridium and other metals, or they can be made of non-metallic conductive materials, for example, ITO etc.
  • the materials of the first conductive layer and the second conductive layer may be the same or different.
  • Both the first insulating layer and the second insulating layer can be made of organic insulating materials or inorganic insulating materials.
  • the organic insulating material includes resin materials such as polyimide, epoxy resin, acrylic, polyester, photoresist, polyacrylate, polyamide, and siloxane.
  • the inorganic insulating material includes SiO 2 , SiN x , SiON and the like. The above materials are only examples and are not used to limit the present disclosure.
  • the LED device can be realized by electrically connecting the first pad and the second pad of the LED device to the first electrode and the second electrode, respectively Provide drive voltage. Therefore, it is only necessary to open a through hole on the display substrate to realize the electrical connection between the first pad and the second pad of the LED device and the corresponding electrode of the display substrate, because one LED device only needs to pass through one through hole.
  • the hole can realize the driving of the LED device, which reduces the number of openings on the film layer, thereby reducing the process difficulty and improving the yield.
  • FIG. 25 is a flowchart of a manufacturing method of a display substrate provided by an embodiment of the present disclosure. The method is used for manufacturing the display substrate shown in FIG. 3, FIG. 4, FIG. 7 and FIG. As shown in FIG. 25, a plurality of pixel units are formed on a base substrate, including:
  • step S121 a first conductive material covering layer is formed on the base substrate.
  • a sputtering, evaporation or electroplating process may be used to form the first conductive material covering layer on the base substrate.
  • the material of the first conductive material covering layer may include at least one of metals such as gold, tin, and iridium.
  • step S122 the first conductive material covering layer is patterned to obtain the first conductive layer.
  • the first conductive layer includes a first electrode, and optionally, the first conductive material covering layer is patterned by using a photolithography process.
  • step S123 a first insulating layer is formed on the first conductive layer.
  • the first insulating layer can be formed by applying an insulating material by spin coating, blade coating, or printing.
  • the insulating material can be SiO x , SiN x , HfO x , SiON or AlO x to provide good insulation.
  • step S124 a through hole is formed on the first insulating layer.
  • a photolithography process may be used to form a through hole on the first insulating layer.
  • the first insulating layer is made of an organic insulating material
  • exposure and development processes can also be used to form through holes on the first insulating layer.
  • step S125 a second conductive material covering layer is formed on the first insulating layer
  • a sputtering, evaporation or electroplating process may be used to form a second conductive material covering layer on the first insulating layer.
  • the material of the second conductive material covering layer may include at least one of metals such as gold, tin, and iridium.
  • step S126 the second conductive material covering layer is patterned to form a second conductive layer.
  • the second conductive layer includes a second electrode.
  • the second conductive material covering layer is patterned by using a photolithography process.
  • step S127 a second insulating layer is formed on the second conductive layer.
  • the second insulating layer can be formed by applying an insulating material by spin coating, blade coating, or printing.
  • the insulating material can be SiO x , SiN x , HfO x , SiON or AlO x to provide good insulation.
  • step S1208 a through hole is formed on the second insulating layer at a position corresponding to the through hole in the first insulating layer to expose at least part of the first electrode and at least part of the second electrode.
  • a photolithography process may be used to form a through hole on the second insulating layer.
  • the first part of the through hole can also be formed on the second insulating layer by an exposure and development process.
  • each pattern in the first conductive layer is formed by a single patterning process
  • each pattern in the second conductive layer is formed by a single patterning process
  • the manufacturing process is simple.
  • the first electrode may also be manufactured by a single patterning process, for example, after S128.
  • FIG. 26 is a flowchart of a manufacturing method of an LED device provided by an embodiment of the present disclosure, and the method is used for manufacturing the LED device as shown in FIGS. 11-17. As shown in Figure 26, the manufacturing method includes:
  • step S21 a light-emitting body is provided.
  • a first pad and a second pad are fabricated on the same side surface of the light-emitting body, the first pad and the second pad are insulated from each other, and in a direction perpendicular to the side surface, the first pad and the second pad The heights of the two pads are not equal.
  • the first pad and the first electrode are electrically connected in the through hole, and the second pad and the second electrode are electrically connected around the through hole. Therefore, it is only necessary to open a through hole on the display substrate to realize the LED device.
  • the electrical connection between the first pad 220 and the second pad 230 and the corresponding electrode of the display substrate reduces the number of openings on the film layer, thereby reducing the process difficulty and improving the yield.
  • Fig. 27 is a flow chart of a manufacturing method of an LED device provided by an embodiment of the present disclosure, which is suitable for manufacturing the LED device shown in Figs. 14 and 15. As shown in Fig. 27, the manufacturing method includes:
  • step S31 a light-emitting body is provided.
  • the light emitting body 210 may include a substrate, an epitaxial structure on the substrate, and a cathode and an anode on the epitaxial structure.
  • the epitaxial structure includes an N-type semiconductor layer, an active layer and a P-type semiconductor layer stacked in sequence.
  • the cathode on the epitaxial structure is arranged on the N-type semiconductor layer, and the anode on the epitaxial structure is arranged on the P-type semiconductor layer.
  • the surface of the cathode and anode away from the substrate are on the same level.
  • step S32 a first metal material layer is formed on one side of the light-emitting body.
  • the first metal material layer 11 may be formed by depositing metal on one side of the light-emitting body 210 by sputtering, evaporation or electroplating.
  • the material of the first metal material layer 11 may include at least one of metals such as gold, tin, and iridium.
  • step S33 a photoresist is coated on the first metal material layer to form a first photoresist layer.
  • a photoresist is coated on the first metal material layer to form a first photoresist layer 11a.
  • step S34 a second pad and a first prefabricated pad are formed on the light-emitting body.
  • a photolithography process is used to form a second pad 230 and a first prefabricated pad 222 on the light-emitting body 210.
  • the second pad 230 and the first prefabricated pad 222 are respectively connected to the cathode of the light-emitting body 210. Connected to the anode.
  • step S35 the remaining first photoresist is stripped.
  • step S36 an insulating material is coated on one side of the light-emitting body to form an insulating material layer
  • the insulating material layer 22 can be formed by coating an insulating material by spin coating, blade coating, or printing.
  • the insulating material can be SiO x , SiN x , HfO x , SiON or AlO x to provide good insulation.
  • step S37 the insulating material layer on the first prefabricated pad is removed
  • the insulating material layer 22 on the first prefabricated pad 222 is removed, exposing the top surface of the first prefabricated pad 222.
  • a photolithography process may be used to remove the insulating material layer on the first prefabricated pad.
  • this step may use an exposure process to remove the insulating material layer on the first prefabricated pad.
  • step S38 metal is deposited on the insulating material layer and the first prefabricated pad to form a second metal material layer;
  • sputtering and metal deposition on the insulating material layer 22 and the first prefabricated pad 222 may be used to form the second metal material layer 33.
  • the material of the second metal material layer 33 may include at least one of metals such as gold, tin, and iridium.
  • step S39 a photoresist is coated on the second metal material layer to form a second photoresist layer
  • a photoresist is coated on the second metal material layer 33 to form a second photoresist layer 33a.
  • step S310 a first pad is formed on the light-emitting body by using a photolithography process
  • a photolithography process is used to form a first pad 220 on the light-emitting body 210 (see FIG. 14 or 15), and the first prefabricated pad 222 and the second prefabricated pad 223 are laminated to form the first pad 220.
  • step S311 the remaining second photoresist is stripped
  • step S312 the insulating material layer is removed.
  • the insulating material layer 22 is ashed and removed by the reactive ion beam to obtain the LED device shown in FIGS. 12 and 13.
  • the first pad 220 and the first electrode 130 are electrically connected in the through hole 150, and the second pad 230 and the second electrode 140 are electrically connected around the through hole 150. Therefore, only one through hole 150 needs to be opened on the display substrate 100. Therefore, the electrical connection between the first pad 220 and the second pad 230 of the LED device and the corresponding electrode of the display substrate 100 can be realized, which reduces the number of openings on the film layer 120, thereby reducing the process difficulty and improving the quality rate.
  • FIG. 40 is a flow chart of a method for manufacturing an LED device provided by an embodiment of the present disclosure, and the method is used for manufacturing the LED device as shown in FIGS. 16-17. As shown in Figure 40, the manufacturing method includes:
  • step S41 a light-emitting body is provided
  • step S42 a first metal material layer is formed on one side of the light-emitting body
  • a sputtering, evaporation, or electroplating process may be used to deposit metal on one side of the light-emitting body 210 to form the first metal material layer 11.
  • the material of the first metal material layer 11 may include at least one of metals such as gold, tin, and iridium.
  • step S43 a photoresist is coated on the first metal material layer to form a first photoresist layer
  • a photoresist is coated on the first metal material layer 11 to form a first photoresist layer 11a.
  • step S44 patterning is performed on the second metal material layer to form a first prefabricated pad
  • a photolithography process is used to form a first prefabricated pad 222 on the light emitting body 210, and the first prefabricated pad 222 is connected to the cathode or anode of the light emitting body 210.
  • step S45 the remaining first photoresist is stripped
  • step S46 an insulating material is coated on one side of the light-emitting body to form an insulating material layer
  • a side surface of the light-emitting body 210 having the first prefabricated pad 222 is coated with an insulating material to form an insulating material layer 22.
  • the insulating material layer 22 can be formed by coating an insulating material by spin coating, blade coating, or printing.
  • the insulating material can be SiO x , SiN x , HfO x , SiON or AlO x to provide good insulation.
  • step S47 the insulating material layer in the first region is removed.
  • the insulating material layer 22 in the first region is removed, and the first region is the region on one side of the light-emitting body 210 except for the upper portion and the periphery of the first prefabricated pad 222.
  • a photolithography process may be used to remove the insulating material layer in the first region.
  • this step may use an exposure process to remove the insulating material layer in the first region.
  • step S48 the insulating material layer on the first prefabricated pad is removed, so that the first prefabricated pad is exposed.
  • the insulating material layer on the first prefabricated pad 222 is removed, so that the first prefabricated pad 222 is exposed.
  • the insulating material layer on the first prefabricated pad 222 may be removed by grinding.
  • step S49 a second metal material layer is formed on one side of the light-emitting body
  • the second metal material layer 33 may be formed by depositing metal on one side of the light-emitting body 210 by sputtering, evaporation, or electroplating.
  • the material of the second metal material layer 33 may include at least one of metals such as gold, tin, and iridium.
  • step S410 a second photoresist layer is formed on the second metal material layer
  • a photoresist is coated on the second metal material layer 33 to form a second photoresist layer 33a.
  • step S411 patterning is performed on the second metal material layer to form a second pad and a first pad;
  • a photolithography process is used to form a second pad 230 and a first pad 220 on the light-emitting body 210.
  • the first pad 220 is laminated by a first prefabricated pad 222 and a second prefabricated pad 223 form.
  • step S412 the remaining second photoresist layer is stripped.
  • the remaining second photoresist layer 33a is stripped to obtain the LED device shown in FIGS. 14 and 15.
  • the first pad 220 and the first electrode 130 are electrically connected in the through hole 150, and the second pad 230 and the second electrode 140 are electrically connected around the through hole 150. Therefore, only one through hole 150 needs to be opened on the display substrate 100. Therefore, the electrical connection between the first pad 220 and the second pad 230 of the LED device and the corresponding electrode of the display substrate 100 can be realized, which reduces the number of openings on the film layer 120, thereby reducing the process difficulty and improving the quality rate.
  • FIG. 57 is a flowchart of a method for manufacturing a display panel provided by an embodiment of the present disclosure, and the method is used for manufacturing the above-mentioned display panel. As shown in Figure 57, the manufacturing method includes:
  • step S51 the above-mentioned LED device is placed on the above-mentioned display substrate, so that the first pad of the LED device is opposite to the first electrode of the corresponding pixel unit in the display substrate, and the second pad of the LED device corresponds to the first electrode in the display substrate.
  • the second electrode of the pixel unit is opposite;
  • step S52 the first pad is electrically connected to the first electrode, and the second pad is electrically connected to the second electrode.
  • the electrical connection between the pad and the electrode can be achieved by aligning the first pad with the first electrode, and the second pad with the second electrode and then pressure welding, or can be achieved by bonding with conductive glue.
  • the first pad and the first electrode are electrically connected in the through hole, and the second pad and the second electrode are electrically connected around the through hole. Therefore, it is only necessary to open a through hole on the display substrate to realize the LED device.
  • the electrical connection between the first pad 220 and the second pad 230 and the corresponding electrode of the display substrate reduces the number of openings on the film layer, thereby reducing the process difficulty and improving the yield.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示基板、LED器件、显示面板、显示装置及制作方法，属于显示设备领域。上述显示基板包括衬底基板（110）以及位于衬底基板（110）上的多个像素单元（111），像素单元（111）包括第一绝缘层（122）、以及相互绝缘的第一电极（130）和第二电极（140），第一绝缘层（122）中具有通孔（150），第一电极（130）位于通孔（150）中，用于与LED器件的延伸至所述通孔（150）的第一焊盘连接，第二电极（140）位于通孔（150）周边，用于与LED器件的第二焊盘连接。仅需利用显示基板上的一个通孔（150），即可实现LED器件的第一焊盘和第二焊盘分别与显示基板的对应电极之间的电连接，因此，减少了膜层上开孔的数量，进而降低工艺难度，提高良品率。

Description

显示基板、显示面板、显示装置及制作方法
本申请要求于2019年4月19日提交的申请号为201910319744.2、发明名称为“显示基板、LED器件、显示面板、显示装置及制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种显示基板、显示面板、显示装置及制作方法。
背景技术
Micro LED(Micro Light Emitting Diode，微型发光二极管或微发光二极管)显示基板由于亮度高，发光效率好，功耗低、寿命长等特点，适合运用在电视、手机、平板等设备上，受到越来越多的关注。
发明内容
本公开实施例提供了一种本公开实施例提供了一种显示基板、显示面板、显示装置及制作方法。
本公开实施例提供了一种显示基板，包括衬底基板以及位于衬底基板上的多个像素单元，所述像素单元包括第一绝缘层、以及相互绝缘的第一电极和第二电极；第一绝缘层中具有通孔，第一电极位于通孔中，第一电极用于与LED器件的延伸至所述通孔中的第一焊盘连接，第二电极位于通孔周边，第二电极用于与LED器件的第二焊盘连接。
可选地，所述第一电极为块状电极，所述第一电极位于所述通孔靠近所述衬底基板的一端，或者，所述第一电极为环形的筒状电极，所述筒状电极位于所述通孔的侧壁上。
可选地，所述块状电极具有用于容置第一焊盘的凹槽，所述凹槽位于所述通孔中。
可选地，所述凹槽的深度小于所述第一电极的厚度。
可选地，所述第一电极的第一表面到所述衬底基板的第二表面的距离小于 所述第二电极的第三表面到所述衬底基板的所述第二表面之间的距离。
可选地，所述第二电极位于所述第一绝缘层上，所述第二电极为围绕所述通孔的环形电极，或者，所述第二电极为块状电极。
可选地，所述显示基板还包括位于所述衬底基板上的第一电压走线和第二电压走线，所述第一电压走线与所述第一电极电连接，所述第二电压走线与所述第二电极电连接，所述第一电压走线和所述第二电压走线平行。
可选地，所述第一电压走线和所述第二电压走线与所述第一电极同层；或者，所述第一电压走线与所述第一电极同层，所述第二电压走线与所述第二电极同层。
可选地，所述显示基板还包括多个薄膜晶体管，每个所述像素单元包括一个所述薄膜晶体管，所述薄膜晶体管的第一极与所述第一电压走线电连接，所述薄膜晶体管的第二极与所述第一电极电连接。
可选地，所述显示基板还包括扫描线，所述扫描线与所述薄膜晶体管的控制极连接，所述扫描线与所述第一电压走线和所述第二电压走线相交。
本公开实施例还提供了一种显示面板，包括前述任一显示基板和位于所述显示基板上的多个LED器件。
可选地，所述LED器件包括发光主体、第一焊盘和第二焊盘所述第一焊盘和所述第二焊盘位于所述发光主体的同一侧面且相互绝缘，在垂直于所述侧面的方向上，至少一个所述LED器件的所述第一焊盘和所述第二焊盘的高度不相等。
可选地，所述第二焊盘呈环形，所述第二焊盘呈柱形，所述第二焊盘围绕所述第一焊盘。
可选地，所述第一焊盘和所述第二焊盘之间具有绝缘层或者绝缘间隙。
可选地，所述第一焊盘的高度大于所述第二焊盘的高度。
本公开实施例还提供了一种显示装置，包括前述任一显示面板。
本公开实施例还提供了一种显示基板的制作方法，所述制作方法包括：
提供衬底基板；
在衬底基板上形成多个像素单元，所述像素单元包括第一绝缘层、以及相互绝缘的第一电极和第二电极，第一绝缘层中具有通孔，第一电极位于通孔中，第一电极用于与LED器件的延伸至所述通孔中的第一焊盘连接，第二电极位于 通孔周边，第二电极用于与LED器件的第二焊盘连接。
本公开实施例还提供了一种显示面板的制作方法，所述制作方法包括：
将多个LED器件放置在前述任一显示基板上，使得LED器件的第一焊盘与显示基板的第一电极相对，LED器件的第二焊盘与显示基板的第二电极相对；
将第一焊盘与第一电极电连接，并且将第二焊盘与第二电极电连接。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是相关技术中的一种显示面板的局部结构示意图；
图2是本公开实施例提供的一种显示基板的平面结构示意图；
图3是本公开实施例提供的一种显示基板的层级结构示意图；
图4是本公开实施例提供的另一种显示基板的层级结构示意图；
图5是本公开实施例提供的一种第一电极和第二电极在衬底基板上的投影示意图；
图6是本公开实施例提供的另一种第一电极和第二电极在衬底基板上的投影示意图；
图7是本公开实施例提供的另一种显示基板的结构示意图；
图8是本公开实施例提供的另一种显示面板的结构示意图；
图9是本公开实施例提供的另一种显示基板的结构示意图；
图10是本公开实施例提供的另一种显示基板的结构示意图；
图11是本公开实施例提供的一种LED器件的结构示意图；
图12是本公开实施例提供的另一种LED器件的结构示意图；
图13是本公开实施例提供的另一种LED器件的结构示意图；
图14是本公开实施例提供的另一种LED器件的俯视图；
图15是图14中LED器件的A截面结构示意图；
图16是本公开实施例提供的另一种LED器件的俯视图；
图17是图16中LED器件的B截面结构示意图；
图18是本公开实施例提供的一种显示面板的结构示意图；
图19是本公开实施例提供的一种显示面板的结构示意图；
图20是本公开实施例提供的一种显示面板的结构示意图；
图21是本公开实施例提供的一种显示面板的结构示意图；
图22是本公开实施例提供的一种显示面板的结构示意图；
图23是本公开实施例提供的一种显示面板的结构示意图；
图24是本公开实施例提供的一种显示基板的制作方法流程图；
图25是本公开实施例提供的一种显示基板的制作方法流程图；
图26是本公开实施例提供的一种LED器件的制作方法流程图；
图27是本公开实施例提供的一种LED器件的制作方法流程图；
图28～图39是图15中LED器件的制作过程示意图；
图40是本公开实施例提供的另一种LED器件的制作方法流程图；
图41～图56是图17中LED器件的制作过程示意图；
图57是本公开实施例提供的一种显示面板的制作方法流程图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。
在Micro LED显示基板中，LED器件制作完成后，需要转移到显示基板上，并与显示基板电连接，从而通过显示基板控制LED器件发光显示。相关技术中，通常都是在显示基板的多个膜层上开多个通孔，LED器件的第一焊盘、第二焊盘分别通过至少一个通孔与显示基板上对应电极电连接。由于在显示基板上的膜层开孔工艺复杂，制作难度较大，开孔数量多容易导致良品率较低。
图1是相关技术中的一种显示面板的局部结构示意图。如图1所示，显示面板包括LED器件200a和显示基板100a。LED器件200a包括发光主体210a及位于发光主体210a同一侧面的第一焊盘220a和第二焊盘230a。显示基板100a包括衬底基板110a及依次层叠在衬底基板110a上的第一金属层120a、第一绝缘层130a、第二金属层140a和第二绝缘层150a。第二绝缘层150a表面上设置有与第一焊盘220a对应的第一电极151a以及与第二焊盘230a对应的第二电极153a，第一电极151a通过过孔152a和141a与第一金属层120a电连接，第二电极153a通过过孔154a与第二金属层140a连接。显示基板100a通过第一电极151a和第二电极153a分别为LED器件200a提供工作电压VDD和公共电压 VSS，以驱动LED器件200a发光。
由于第一电极151a通过过孔152a和141a与第一金属层120a电连接，第二电极153a通过过孔154a与第二金属层140a连接，因此，显示基板100a上过孔较多，制作工艺难度较大，导致良品率较低。
此外，从图1可以看出，过孔152a、141a和154a在衬底基板110a上的投影和LED器件在衬底基板110a上的投影互不重叠，即过孔设置在LED器件的投影以外的区域，占用了显示面板的面积。
图2是本公开实施例提供的一种显示基板100的平面结构示意图，如图2所示，显示基板100包括衬底基板110以及位于衬底基板110上的多个像素单元111。多个像素单元111可以阵列布置在衬底基板110上。每个像素单元111用于连接一个LED器件。
图3是本公开实施例提供的一种显示基板的层级结构示意图，展示了图2中一个像素单元111处的层级结构。如图3所示，该像素单元111包括第一绝缘层122、第一电极130和第二电极140。第一电极130和第二电极140相互绝缘。第一绝缘层122中具有通孔150，第一电极130的至少部分位于通孔150中，第一电极130用于与LED器件的延伸至通孔150中的第一焊盘连接。第二电极140位于通孔150周边，第二电极140用于与该LED器件的第二焊盘连接。
由于第一电极130的至少部分设置在通孔150中，第二电极140设置在通孔150周边，通过将LED器件的第一焊盘和第二焊盘分别与第一电极130和第二电极140电连接即可实现为LED器件提供驱动电压。仅需利用显示基板上的一个通孔，即可实现LED器件的第一焊盘和第二焊盘分别与显示基板100上的对应电极之间的电连接，由于一个LED器件只需要通过一个通孔即可实现LED器件的驱动，减少了膜层120上开孔的数量，进而降低了工艺难度，有利于提高良品率。
在图3所示显示基板100中，衬底基板110上具有多个膜层120，多个膜层120包括依次位于衬底基板110上的第一导电层121、第一绝缘层122、第二导电层123。第一电极130位于第一导电层121，第二电极140位于第二导电层123，也即是，第二电极140位于第一绝缘层122上。
可选地，多个膜层120还可以包括第二绝缘层124，第二绝缘层124设置在第二导电层123上，以便于隔离外部环境对第二导电层123的影响。
示例性地，第一导电层121和第二导电层123可以采用金属材料制成，例 如可以包括金、锡、铱等金属中的至少一种制成，也可以采用非金属的导电材料制成，例如ITO等。第一导电层121和第二导电层123的材料可以相同，也可以不同。第一绝缘层122和第二绝缘层124均可以采用有机绝缘材料或无机绝缘材料制成。示例性地，该有机绝缘材料包括例如聚酰亚胺、环氧树脂、压克力、聚酯、光致抗蚀剂、聚丙烯酸酯、聚酰胺、硅氧烷等树脂材料等。该无机绝缘材料包括SiO 2、SiN x、SiON等。以上材料仅为举例，并不用以限制本公开。
示例性地，第一绝缘层122可以是平坦层，第二绝缘层124可以是钝化层。图3中所示的膜层结构仅为示例，显示基板100也可以包括更多的膜层。
需要说明的是，第一绝缘层122可以是单层结构，也可以是由多个子层叠加而成的叠层结构，本公开对此不做限制。
示例性地，如图3所示，第一导电层121还包括第一电压走线121a和第二电压走线121b，也即是，第一电压走线121a、第二电压走线121b和第一电极130同层。在本公开实施例中，同层是指采用一次构图工艺形成或者设在同一膜层的同一表面上。第一电压走线121a、第二电压走线121b和第一电极130可以简化工艺流程，缩短生产时间，提高生产效率。
第一电压走线121a与第一电极130电连接，第二电压走线121b与第二电极140电连接。第一电压走线121a用于提供第一电压，第二电压走线121b用于提供第二电压。第一电压可以是驱动LED器件200发光所需的工作电压VDD和公共电压VSS中的一个，第二电压可以是驱动LED器件200发光所需的工作电压VDD和公共电压VSS中的另一个。例如，第一电压为工作电压VDD，第二电压为公共电压VSS；或者第一电压为公共电压VSS，第二电压为工作电压VDD。
可替代地，在其他实施例中，第一电压走线与第二电压走线也可以设置在不同层，例如，第一电压走线位于第一导电层，第二电压走线位于第二导电层。第一电压走线与第二电压走线不同层设置便于增大电压走线的在平行于衬底基板110的平面内的面积，从而减小电压走线的电阻，进而可以减少由于IR压降(IR Drop)导致的显示不均匀的现象。
可选地，结合图2，假设第一电压走线121a为图2中的电压走线VSS1～n，第二电压走线121b为图2中的电压走线VSS1～n，第一电压走线和第二电压走线相互平行且交替间隔布置，以简化显示基板的布线结构。
可选地，衬底基板110可以为集成了TFT(Thin Film Transistor，薄膜场效应晶体管)的衬底基板110，工作电压VDD的电压走线通过衬底基板110中的TFT与第一电极130或第二电极140相连，从而通过TFT实现LED器件200发光的控制。
如图3所示，该显示基板110还可以包括控制层160，控制层160包括多个TFT，每个所述像素单元111包括一个TFT，TFT的第一极与第一电压走线121a电连接，TFT的第二极与第一电极130电连接。
在本公开实施例中，TFT的第一极可以为源极和漏极中的一个，TFT的第二极为源极和漏极中的另一个。
示例性地，控制层160包括依次位于衬底基板110上的有源层161、栅极绝缘层162、栅极层163、层间介质层164和源漏极层。为了简化工艺流程，在图3所示实施例中，源漏极层位于第一导电层121。
可选地，控制层160还包括扫描线(图3未示出)，扫描线与TFT的控制极相连。这里，TFT的控制极为栅极。扫描线可以位于栅极层163。
示例性地，结合图2，扫描线Gate1～m可以与第一电压走线和第二电压走线相交，例如垂直。这里，m表示扫描线的数量，为正整数。
如图2所示，第一电压走线(例如VDD1～n)、第二电压走线(例如VSS1～n)和扫描线Gate1～m交叉限定出多个像素区域，每个像素区域对应一个像素单元111。
可替代地，衬底基板110也可以为未集成TFT的衬底基板，例如为玻璃基板，工作电压VDD的电压走线直接与第一电极130或第二电极140相连。例如图4，多个膜层120直接形成在衬底基板110上。
为了简便，下文中均以未集成TFT的衬底基板为例进行说明，容易知道，未集成TFT的衬底基板以上的层级结构均可以应用到集成了TFT的衬底基板上。
可选地，在一些实施例中，第二电极为环形电极，第二电极可以围绕通孔设置，或者，第二电极为块状电极。当第一电压走线121a、第二电压走线121b和第一电极130同层时，第二电压走线121b通过第一绝缘层122中的过孔122a与第二电极140电连接。可选地，多个像素单元111中的第二电极140可以连成一体(如图3所示)，也即是，多个LED器件共用一个第二电极。例如，一行像素单元的第二电极连成一体，或者，所有像素单元的第二电极连成一体。 当所有像素单元的第二电极连成一体时，第二电极可以连接成对应通孔150处设有开口的面电极。
可选地，第一电极130为块状电极，第一电极130位于所述通孔150靠近所述衬底基板的一端。在一些实施例中，如图3和图4所示，一个像素单元中的第一电极130可以是单独的块状电极，每个LED器件对应一个第一电极130。在另一些实施例中，第一电极130也可以是整块的电极(例如沿LED器件的排列方向延伸的条状电极)，多个LED器件共用一个第一电极130。在另一些实施例中，第一电极130还可以为筒状电极，该筒状电极位于所述通孔150的侧壁上。
下面以第一电极和第二电极均为独立的电极为例，说明本公开实施例中第一电极与通孔的位置关系。
在一种可能的实施方式中，第一电极130的至少部分位于通孔150中，可以是第一电极130全部设置在通孔150中。
图5是本公开实施例提供的一种第一电极130和第二电极140在衬底基板110上的投影示意图。如图5所示，第二电极140呈环形，第二电极140围绕通孔150设置。这样可以便于第二电极140与第二焊盘230在周向上均匀接触，从而保证连接的稳定性。
需要说明的是，在图5中，第二电极140为圆环形电极，即内轮廓和外轮廓均为圆形。在其他实施例中，第二电极140也可以为非圆环形电极，例如，外轮廓和内轮廓中的至少一个是其他封闭图形，比如多边形，且环形的外轮廓和内轮廓的中心重叠。例如，该环形的外轮廓为圆形，内轮廓为多边形；或该环形的外轮廓为多边形，内轮廓为圆形，本公开不对外轮廓和内轮廓的形状进行限制。
第一电极130全部设置在通孔150中，也即是第一电极130在衬底基板110上的投影在通孔150在衬底基板110上的投影范围内。例如，第一电极130与通孔150同心布置，第一电极130的半径小于通孔150的半径。
在另一种可能的实施方式中，第一电极130的至少部分位于通孔150中，可以是第一电极130的部分位于通孔150中，例如第一电极130的中部位于通孔150中，边缘部分被第一绝缘层122覆盖。
图6是本公开实施例提供的另一种第一电极130和第二电极140在衬底基板110上的投影示意图。如图6所示，第二电极140围绕通孔150设置。由于 第一电极130在衬底基板110上的投影超出通孔150在衬底基板110上的投影，例如，第一电极130与通孔150同心布置，第一电极130的半径大于通孔150的半径。所以第一电极130在衬底基板110上的投影与第二电极140在衬底基板110上的投影部分重叠。
可选地，在一些实施例中，第一电极的中部可以设置用于容置第一焊盘的凹槽。例如，参见图4，第一电极130的中部具有用于容置第一焊盘的凹槽131。该凹槽131的厚度小于第一电极130的厚度。当第一焊盘位于凹槽中时，该凹槽一方面可以起到定位的作用，另一方面，由于第一焊盘的侧壁和端面均能够与第一电极接触，相对于第一电极为整块电极时第一焊盘仅端面与第一电极接触的情况，该凹槽可以进一步增大第一电极130和第一焊盘的接触面积，从而保证两者连接的稳定性。
可选地，凹槽131的形状与第一焊盘的截面形状相同。例如，第一焊盘的截面形状为圆形，则凹槽131的截面形状可以为圆形；或者，第一焊盘的截面形状为矩形，则凹槽131的截面形状可以为矩形。
图7是本公开实施例提供的另一种显示基板的结构示意图，如图7所示，第一电极130的凹槽131也可以是通槽，即凹槽131的厚度等于第一电极130的厚度，以暴露出部分衬底基板110。其中，厚度为在垂直于衬底基板110方向上的尺寸。
需要说明的是，在其他实施例中，该凹槽也可以不位于第一电极的中部，只要位于通孔150中，能够与第一焊盘接触即可。
图8是本公开实施例提供的另一种显示面板的结构示意图，如图8所示，第一电极130也可以不设置凹槽131，以简化制作工艺。
在一种可能的实施方式中，参见图4，在垂直于衬底基板110的方向上，第一电极130和第二电极140依次位于衬底基板110上。第一电极130的第一表面132到衬底基板110的第二表面111之间的距离h1小于第二电极140的第三表面141到衬底基板110的第二表面111之间的距离h2，第一表面132为第一电极130与第一焊盘220的端面接触的表面，第二表面111为衬底基板110上设有多个膜层120的表面，第三表面141为第二电极140与第二焊盘230的端面接触的表面。在这种情况下，第一焊盘220需要延伸至通孔150中，才能与第一电极130接触，通孔150能够对第一焊盘220和第一电极130的连接起到保护作用，使得LED器件的连接更为稳固。
图9是本公开实施例提供的另一种显示基板的结构示意图，如图9所示，第一电极130的第一表面132到衬底基板110的第二表面111的距离h1大于第二电极140的第三表面141到衬底基板110的第二表面111之间的距离h2，第一表面132为第一电极130用于与第一焊盘220的端面相对的表面，第二表面111为衬底基板110上设有多个膜层120的表面，第三表面141为第二电极140与第二焊盘230的端面相对的表面。
图10是本公开实施例提供的另一种显示基板的结构示意图，如图10所示，第一电极130的第一表面132到衬底基板110的第二表面111的距离h1等于第二电极140的第三表面141到衬底基板110的第二表面111之间的距离h2，第一表面132为第一电极130与第一焊盘220接触的表面，第二表面111为衬底基板110上设有多个膜层120的表面，第三表面141为第二电极140与第二焊盘230接触的表面。
本公开实施例还提供了一种LED器件，图11是本公开实施例提供的一种LED器件的结构示意图，如图11所示，LED器件200包括：发光主体210、第一焊盘220和第二焊盘230，第一焊盘220和第二焊盘230位于发光主体210的同一侧面且相互绝缘，第一焊盘220和第二焊盘230的高度不相等。
第一焊盘220用于与第一电极130电连接，第二焊盘230用于与第二电极140电连接，显示基板100通过第一电极130和第二电极140分别为LED器件200提供驱动LED器件200发光所需的工作电压VDD和公共电压VSS。
由于第一电极130设置在通孔150中，第二电极140设置在通孔150周边，通过将LED器件的第一焊盘220和第二焊盘230分别与第一电极130和第二电极140电连接即可实现为LED器件200提供驱动电压。因此，仅需利用显示基板上的一个通孔，即可实现LED器件200的第一焊盘220和第二焊盘230分别与显示基板100的对应电极之间的电连接，由于一个LED器件200只需要通过一个通孔即可实现LED器件200的驱动，减少了膜层120上开孔的数量，进而降低工艺难度，提高良品率。
发光主体210可以是LED芯片，例如，micro LED芯片。示例性地，发光主体210可以包括基板、位于基板上的外延结构以及位于外延结构上的阴极和阳极。示例性地，外延结构包括依次层叠的N型半导体层、有源层及P型半导体层，外延结构上的阴极设置在N型半导体层上，外延结构上的阳极设置在P 型半导体层，外延结构上的阴极和阳极远离基板的表面在同一平面上。第一焊盘220和第二焊盘230分别与外延结构上的阴极和阳极连接。也即是，第一焊盘220与阴极和阳极中的一个连接，第二焊盘220与阴极和阳极中的另一个连接。
第一焊盘220和第二焊盘230的高度不相等，可以是在垂直于发光主体210的方向上，第一焊盘220的第四表面221到发光主体210的第五表面211的距离大于第二焊盘230的第六表面231到发光主体210的第五表面211的距离，第四表面221为第一焊盘220远离发光主体210的端面，第五表面211为发光主体210的阴极和阳极远离发光主体210的表面所在的平面，第六表面231为第二焊盘远离发光主体210的端面。图11中所示的LED器件200可以与图3、图4、图7或图8所示的显示基板100装配。
图12是本公开实施例提供的另一种LED器件的结构示意图，如图12所示，第一焊盘220和第二焊盘230的高度不相等，可以是垂直于发光主体210的方向，第一焊盘220的第四表面221到发光主体210的第五表面211的距离小于第二焊盘230的第六表面231到发光主体210的第五表面211的距离，第四表面221为第一焊盘220远离发光主体210的端面，第五表面211为发光主体210的阴极和阳极远离发光主体210的表面所在的水平面，第六表面231为第二焊盘远离发光主体210的端面。图12中所示的LED器件200可以与图9所示的显示基板100装配。
图13是本公开实施例提供的另一种LED器件的结构示意图，如图13所示，第一焊盘220和第二焊盘230的高度也可以相等，即在垂直于发光主体210的方向，第一焊盘220的第四表面221到发光主体210的第五表面211的距离等于第二焊盘230的第六表面231到发光主体210的第五表面211的距离，第四表面221为第一焊盘220远离发光主体210的端面，第五表面211为发光主体210的阴极和阳极远离发光主体210的表面所在的水平面，第六表面231为第二焊盘远离发光主体210的端面。图11中所示的LED器件200可以与图10所示的显示基板100装配。
图11至图13中，第一焊盘220和第二焊盘230可以均呈柱形，且第一焊盘220与第二焊盘230间隔设置，在其他实施例中，第一焊盘220可以呈柱形，第二焊盘230可以呈环形，第二焊盘230围绕第一焊盘220，例如图14至图17所示实施例。
图14是本公开实施例提供的另一种LED器件的俯视图，如图14所示，第二焊盘230呈环形，围绕第一焊盘220设置。该环形的外轮廓和内轮廓均可以是圆形，也可以是其他封闭图形，比如多边形，且环形的外轮廓和内轮廓的中心重叠。例如，该环形的外轮廓为圆形，内轮廓为多边形，或该环形的外轮廓为多边形，内轮廓为圆形，本公开不对外轮廓和内轮廓的形状进行限制。
图15是图14中LED器件的A截面结构示意图，如图15所示，第二焊盘230在第一焊盘220周围，这样便于第二电极140与第二焊盘230在周向均匀接触，从而保证连接的稳定性。第一焊盘220和第二焊盘230的高度可以相等，也可以不相等。第一焊盘220和第二焊盘230相同高度和不同高度的具体设置方式与图11～图13的方式相同，不再赘述。
图16是本公开实施例提供的另一种LED器件的俯视图，如图16所示，第一焊盘220和第二焊盘230之间设有绝缘层240，图17是图16中LED器件的B截面结构示意图，如图17所示，绝缘层240在第一焊盘220和第二焊盘230之间，以便于第一焊盘220和第二焊盘230之间更好的绝缘。
可选地，绝缘层240的高度大于第二焊盘230的高度，绝缘层240的高度可以小于或者等于第一焊盘230的高度，以便于更好的绝缘第一焊盘220和第二焊盘230。其中，高度为在垂直于发光主体210方向上的尺寸，绝缘层240材料可以是绝缘材料，例如SiO x、SiN x、HfO x、SiON或AlO x制成，以提供良好的绝缘性。
需要说明的是，在其他实施例中，LED器件的第一焊盘和第二焊盘之间也可以通过绝缘间隙进行绝缘，例如图9-13所示LED器件。这里，绝缘间隙是指第一焊盘和第二焊盘之间的间距足够大，使得第一焊盘和第二焊盘在通电的情况下能够相互绝缘。
本公开实施例还提供了一种显示面板。显示面板包括如上所述的任一种显示基板100和如上所述的任一种LED器件200。
图18是本公开实施例提供的一种显示面板的结构示意图，如图18所示，在一些实施例中，该显示面板包括图17所示的LED器件及图3所示的显示基板。
图19是本公开实施例提供的一种显示面板的结构示意图，如图19所示，在一些实施例中，该显示面板包括图11所示的LED器件及图4所示的显示基板。
图20是本公开实施例提供的一种显示面板的结构示意图，如图20所示，在一些实施例中，该显示面板包括图12所示的LED器件及图9所示的显示基板。
图21是本公开实施例提供的一种显示面板的结构示意图，如图21所示，在一些实施例中，该显示面板包括图13所示的LED器件及图10所示的显示基板。
图22是本公开实施例提供的一种显示面板的结构示意图，如图22所示，在一些实施例中，该显示面板包括图15所示的LED器件及图4所示的其中一种显示基板。
图23是本公开实施例提供的一种显示面板的结构示意图，如图23所示，在一些实施例中，该显示面板包括图17所示的LED器件及图4所示的显示基板。
需要说明的是，图19、图22和图23中的显示基板，均可以替换为图2、图7、或图8所示的显示基板。
由于第一电极130设置在通孔150中，第二电极140设置在通孔150周边，通过将LED器件的第一焊盘和第二焊盘分别与第一电极130和第二电极140电连接即可实现为LED器件提供驱动电压。因此，仅需利用显示基板上的一个通孔，即可实现LED器件的第一焊盘和第二焊盘分别与显示基板100的对应电极之间的电连接，由于一个LED器件只需要通过一个通孔即可实现LED器件的驱动，减少了膜层上开孔的数量，进而降低工艺难度，提高良品率。
同时，由于相关技术中过孔设置在LED器件的投影以外的区域，占用了显示面板的表面面积。本公开实施例中第一电极130设置在通孔150中，第二电极140设置在通孔150周边，由于第一电极130和第二电极140均在LED器件200在衬底基板110上的投影范围内，因此，与现有技术相比，减小焊接区域面积，增加显示基板100上单位面积的LED器件数量，即PPI(Pixels Per Inch，像素密度)增大，从而增加显示效果的精细程度。
本公开实施例还提供了一种显示装置，该显示装置包括如图16～图20中任一幅所示的显示面板。
示例性地，本公开实施例提供的显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
图24是本公开实施例提供的一种显示基板的制作方法流程图，该方法用于制作如图1～10所示的显示基板。如图24所示，该制作方法包括：
在步骤S11中，提供衬底基板；
在步骤S12中，在衬底基板上形成多个像素单元，像素单元包括第一绝缘层、第一电极和第二电极，第一电极和第二电极相互绝缘，第一绝缘层中具有通孔，第一电极位于通孔中，第一电极用于与LED器件的延伸至通孔中的第一焊盘连接，第二电极位于通孔周边，第二电极用于与LED器件的第二焊盘连接。
可选地，衬底基板上可以依次形成有多个膜层，这多个膜层可以包括依次层叠在衬底基板上的第一导电层、第一绝缘层、第二导电层和第二绝缘层。第一电极位于第一导电层，第二电极位于第二导电层。
可选地，第一导电层和第二导电层可以采用金属材料制成，例如可以包括金、锡、铱等金属中的至少一种制成，也可以采用非金属的导电材料制成，例如ITO等。第一导电层和第二导电层的材料可以相同，也可以不同。第一绝缘层和第二绝缘层均可以采用有机绝缘材料或无机绝缘材料制成。示例性地，该有机绝缘材料包括例如聚酰亚胺、环氧树脂、压克力、聚酯、光致抗蚀剂、聚丙烯酸酯、聚酰胺、硅氧烷等树脂材料等。该无机绝缘材料包括SiO 2、SiN x、SiON等。以上材料仅为举例，并不用以限制本公开。
由于第一电极设置在通孔中，第二电极设置在通孔周边，通过将LED器件的第一焊盘和第二焊盘分别与第一电极和第二电极电连接即可实现为LED器件提供驱动电压。因此，仅需在显示基板上开一个通孔，即可实现LED器件的第一焊盘和第二焊盘分别与显示基板的对应电极之间的电连接，由于一个LED器件只需要通过一个通孔即可实现LED器件的驱动，减少了膜层上开孔的数量，进而降低工艺难度，提高良品率。
图25是本公开实施例提供的一种显示基板的制作方法流程图，该方法用于制作如图3、图4、图7和图8所示的显示基板。如图25所示，在衬底基板上形成多个像素单元，包括：
在步骤S121中，在衬底基板上形成第一导电材料覆盖层。
可选地，可以采用溅射、蒸镀或电镀工艺在衬底基板上形成第一导电材料覆盖层。第一导电材料覆盖层的材料可以包括金、锡、铱等金属中的至少一种。
在步骤S122中，对第一导电材料覆盖层进行图形化处理，得到第一导电层。
该第一导电层包括第一电极，可选地，采用光刻工艺对第一导电材料覆盖层进行图形化处理。
在步骤S123中，在第一导电层上形成第一绝缘层。
可选地，可以采用旋涂、刮涂或打印等方式涂覆绝缘材料形成第一绝缘层。绝缘材料可以是SiO x、SiN x、HfO x、SiON或AlO x，以提供良好的绝缘性。
在步骤S124中，在第一绝缘层上制作通孔。
可选地，可以采用光刻工艺形成在第一绝缘层上形成通孔。
当第一绝缘层采用有机绝缘材料制成时，也可以利用曝光显影工艺在第一绝缘层上形成通孔。
在步骤S125中，在第一绝缘层上形成第二导电材料覆盖层；
可选地，可以采用溅射、蒸镀或电镀工艺在第一绝缘层上形成第二导电材料覆盖层。第二导电材料覆盖层的材料可以包括金、锡、铱等金属中的至少一种。
在步骤S126中，对第二导电材料覆盖层进行图形化处理，形成第二导电层。
该第二导电层包括第二电极。可选地，采用光刻工艺对第二导电材料覆盖层进行图形化处理。
在步骤S127中，在第二导电层上形成第二绝缘层。
可选地，可以采用旋涂、刮涂或打印等方式涂覆绝缘材料形成第二绝缘层。绝缘材料可以是SiO x、SiN x、HfO x、SiON或AlO x，以提供良好的绝缘性。
在步骤S128中，在第二绝缘层上对应第一绝缘层中通孔的位置制作通孔，以露出至少部分第一电极和至少部分第二电极。
可选地，可以采用光刻工艺形成在第二绝缘层上形成通孔。
当第二绝缘层采用有机绝缘材料制成时，也可以利用曝光显影工艺在第二绝缘层上形成通孔的第一部分。
需要说明的是，在上述过程中，第一导电层中的各个图形采用一次构图工艺形成，第二导电层中的各个图形采用一次构图工艺形成，制作过程简单。在一些实施例中，例如图9和图10的显示基板中，第一电极也可以单独采用一次构图工艺制作，例如在S128之后单独制作。
图26是本公开实施例提供的一种LED器件的制作方法流程图，该方法用于制作如图11～17所示的LED器件。如图26所示，该制作方法包括：
在步骤S21中，提供发光主体。
在步骤S22中，在发光主体的同一侧面制作第一焊盘和第二焊盘，第一焊盘和第二焊盘相互绝缘，且在垂直于该侧面的方向上，第一焊盘和第二焊盘的高度不相等。
第一焊盘与第一电极在通孔中电连接，第二焊盘与第二电极在通孔周边电连接，因此，仅需在显示基板上开一个通孔，即可实现LED器件的第一焊盘220和第二焊盘230分别与显示基板的对应电极之间的电连接，减少了膜层上开孔的数量，进而降低工艺难度，提高良品率。
图27是本公开实施例提供的一种LED器件的制作方法流程图，适用于制作图14、15所示的LED器件，如图27所示，该制作方法包括：
在步骤S31中，提供发光主体。
发光主体210可以包括基板、位于基板上的外延结构以及位于外延结构上的阴极和阳极。其中，外延结构包括依次层叠的N型半导体层、有源层及P型半导体层，外延结构上的阴极设置在N型半导体层上，外延结构上的阳极设置在P型半导体层，外延结构上的阴极和阳极远离基板的表面在同一水平面上。
在步骤S32中，在发光主体的一侧面形成第一金属材料层。
如图28、29所示，可以采用溅射、蒸镀或电镀工艺在发光主体210的一侧面沉积金属形成第一金属材料层11。第一金属材料层11的材料可以包括金、锡、铱等金属中的至少一种。
在步骤S33中，在第一金属材料层上涂覆光刻胶形成第一光刻胶层。
如图28、29所示，在第一金属材料层上涂覆光刻胶形成第一光刻胶层11a。
在步骤S34中，在发光主体上形成第二焊盘和第一预制焊盘。
如图30、31所示，采用光刻工艺在发光主体210上形成第二焊盘230和第一预制焊盘222，第二焊盘230和第一预制焊盘222分别与发光主体210的阴极和阳极相连。
在步骤S35中，剥离剩余的第一光刻胶。
在步骤S36中，在发光主体的一侧面涂覆绝缘材料形成绝缘材料层；
如图32、33所示，具体可以采用旋涂、刮涂或打印等方式涂覆绝缘材料形成绝缘材料层22。绝缘材料可以是SiO x、SiN x、HfO x、SiON或AlO x，以提供良好的绝缘性。
在步骤S37中，去除第一预制焊盘上的绝缘材料层；
如图34、35所示，第一预制焊盘222上的绝缘材料层22被去除，露出第一预制焊盘222的顶面。可选地，可以采用光刻工艺去除第一预制焊盘上的绝缘材料层。可替代地，当绝缘材料采用有机材料制成时，该步骤可以采用曝光工艺去除第一预制焊盘上的绝缘材料层。
在步骤S38中，在绝缘材料层及第一预制焊盘上沉积金属形成第二金属材料层；
如图36、37所示，具体可以采用溅射、在绝缘材料层22及第一预制焊盘222上沉积金属形成第二金属材料层33。第二金属材料层33的材料可以包括金、锡、铱等金属中的至少一种。
在步骤S39中，在第二金属材料层上涂覆光刻胶形成第二光刻胶层；
如图36、37所示，在第二金属材料层33上涂覆光刻胶形成第二光刻胶层33a。
在步骤S310中，采用光刻工艺在发光主体上形成第一焊盘；
如图38、39所示，采用光刻工艺在发光主体210上形成第一焊盘220(参见图14或15)，第一预制焊盘222和第二预制焊盘223层叠形成第一焊盘220。
在步骤S311中，剥离剩余的第二光刻胶；
在步骤S312中，将绝缘材料层去除。
通过反应离子束将绝缘材料层22灰化去除，获得图12和图13所示的LED器件。
第一焊盘220与第一电极130在通孔150中电连接，第二焊盘230与第二电极140在通孔150周边电连接，因此，仅需在显示基板100上开一个通孔150，即可实现LED器件的第一焊盘220和第二焊盘230分别与显示基板100的对应电极之间的电连接，减少了膜层120上开孔的数量，进而降低工艺难度，提高良品率。
图40是本公开实施例提供的一种LED器件的制作方法流程图，该方法用于制作如图16～17所示的LED器件。如图40所示，该制作方法包括：
在步骤S41中，提供发光主体；
发光主体的描述可以参见S31。
在步骤S42中，在发光主体的一侧面形成第一金属材料层；
如图41、42所示，具体可以采用溅射、蒸镀或电镀工艺在发光主体210一侧面沉积金属形成第一金属材料层11。第一金属材料层11的材料可以包括金、锡、铱等金属中的至少一种。
在步骤S43中，在第一金属材料层上涂覆光刻胶形成第一光刻胶层；
如图41、42所示，在第一金属材料层11上涂覆光刻胶形成第一光刻胶层11a。
在步骤S44中，对第二金属材料层进行图形化处理，形成第一预制焊盘；
如图43、44所示，采用光刻工艺在发光主体210上形成第一预制焊盘222，第一预制焊盘222与发光主体210的阴极或阳极相连。
在步骤S45中，剥离剩余的第一光刻胶；
如图45、46所示，图43和如44中剩余的第一光刻胶层11a已经被剥离。
在步骤S46中，在发光主体的一侧面涂覆绝缘材料形成绝缘材料层；
如图47、48所示，在发光主体210的具有第一预制焊盘222的一侧面涂覆绝缘材料形成绝缘材料层22。具体可以采用旋涂、刮涂或打印等方式涂覆绝缘材料形成绝缘材料层22。绝缘材料可以是SiO x、SiN x、HfO x、SiON或AlO x，以提供良好的绝缘性。
在步骤S47中，去除第一区域的绝缘材料层。
如图49、50所示，去除第一区域的绝缘材料层22，第一区域为发光主体210一侧面除第一预制焊盘222上部及周围以外的区域。
可选地，可以采用光刻工艺去除第一区域的绝缘材料层。可替代地，当绝缘材料采用有机材料制成时，该步骤可以采用曝光工艺去除第一区域的绝缘材料层。
在步骤S48中，去除第一预制焊盘上的绝缘材料层，使得第一预制焊盘暴露出。
如图51、52所示，去除第一预制焊盘222上的绝缘材料层，使得第一预制焊盘222暴露出。示例性地，可以采用打磨的方式去除第一预制焊盘222上的绝缘材料层。
在步骤S49中，在发光主体的一侧面形成第二金属材料层；
如图53、54所示，具体可以采用溅射、蒸镀或电镀工艺在发光主体210的一侧面沉积金属形成第二金属材料层33。第二金属材料层33的材料可以包括金、锡、铱等金属中的至少一种。
在步骤S410中，在第二金属材料层上形成第二光刻胶层；
如图53、54所示，在第二金属材料层33上涂覆光刻胶形成第二光刻胶层33a。
在步骤S411中，对第二金属材料层进行图形化处理，形成第二焊盘和第一焊盘；
如图55、56所示，采用光刻工艺在发光主体210上形成第二焊盘230和第一焊盘220，第一焊盘220由第一预制焊盘222和第二预制焊盘223层叠形成。
在步骤S412中，剥离剩余的第二光刻胶层。
剥离剩余的第二光刻胶层33a，获得图14和图15所示的LED器件。
第一焊盘220与第一电极130在通孔150中电连接，第二焊盘230与第二电极140在通孔150周边电连接，因此，仅需在显示基板100上开一个通孔150，即可实现LED器件的第一焊盘220和第二焊盘230分别与显示基板100的对应电极之间的电连接，减少了膜层120上开孔的数量，进而降低工艺难度，提高良品率。
图57是本公开实施例提供的一种显示面板的制作方法流程图，该方法用于制作上述的显示面板。如图57所示，该制作方法包括：
在步骤S51中，将上述的LED器件放置在上述显示基板上，使得LED器件的第一焊盘与显示基板中对应像素单元的第一电极相对，LED器件的第二焊盘与显示基板中对应像素单元的第二电极相对；
在步骤S52中，将第一焊盘与第一电极电连接，并且将第二焊盘与第二电极电连接。
焊盘和电极的电连接可以通过第一焊盘与第一电极、第二焊盘与第二电极对位后加压焊接实现，也可以通过导电胶粘合实现。第一焊盘与第一电极在通孔中电连接，第二焊盘与第二电极在通孔周边电连接，因此，仅需在显示基板上开一个通孔，即可实现LED器件的第一焊盘220和第二焊盘230分别与显示基板的对应电极之间的电连接，减少了膜层上开孔的数量，进而降低工艺难度，提高良品率。
在可能的范围内，上述各示例所说明的不同方面的技术要素可以相互组合。而且，以上所述仅为本公开的可选实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开 所附权利要求的范围之内。

Claims (18)

  1. 一种显示基板，包括：衬底基板(110)以及位于所述衬底基板(110)上的多个像素单元，所述像素单元包括第一绝缘层(122)、以及相互绝缘的第一电极(130)和第二电极(140)；
    所述第一绝缘层(122)中具有通孔(150)，所述第一电极(130)的至少部分位于通孔(150)中，所述第一电极(130)用于与LED器件(200)的延伸至所述通孔(150)中的第一焊盘(220)连接，所述第二电极(140)位于所述通孔(150)周边，所述第二电极(140)用于与LED器件(200)的第二焊盘(230)连接。
  2. 根据权利要求1所述的显示基板，其中，所述第一电极(130)为块状电极，所述第一电极(130)位于所述通孔(150)靠近所述衬底基板(110)的一端，或者，所述第一电极(130)为筒状电极，所述筒状电极位于所述通孔的侧壁上。
  3. 根据权利要求2所述的显示基板，其中，所述块状电极具有用于容置所述第一焊盘(220)的凹槽(131)，所述凹槽(131)位于所述通孔(150)中。
  4. 根据权利要求3所述的显示基板，其中，所述凹槽(131)的深度小于所述第一电极(130)的厚度。
  5. 根据权利要求1至4任一项所述的显示基板，其中，所述第一电极(130)的第一表面(132)到所述衬底基板(110)的第二表面的距离小于所述第二电极(140)的第三表面(141)到所述衬底基板(110)的所述第二表面之间的距离，所述第一表面(132)为所述第一电极(130)用于所述第一焊盘(220)的端面相对的表面，所述第三表面(141)为所述第二电极(140)与所述第二焊盘(230)的端面相对的表面。
  6. 根据权利要求1至5任一项所述的显示基板，其中，所述第二电极(140)位于所述第一绝缘层(122)上，所述第二电极(140)为围绕所述通孔(150)的环形电极，或者，所述第二电极(140)为块状电极。
  7. 根据权利要求1至6任一项所述的显示基板，还包括位于所述衬底基板(110)上的第一电压走线(121a)和第二电压走线(121b)，所述第一电压走线(121a)与所述第一电极(130)电连接，所述第二电压走线(121b)与所述第二电极(140)电连接，所述第一电压走线(121a)和所述第二电压走线(121b) 平行。
  8. 根据权利要求7所述的显示基板，其中，所述第一电压走线(121a)和所述第二电压走线(121b)与所述第一电极(130)同层；或者，
    所述第一电压走线(121a)与所述第一电极(130)同层，所述第二电压走线(121b)与所述第二电极(140)同层。
  9. 根据权利要求7或8所述的显示基板，还包括多个薄膜晶体管，每个所述像素单元包括一个所述薄膜晶体管，所述薄膜晶体管的第一极与所述第一电压走线(121a)电连接，所述薄膜晶体管的第二极与所述第一电极(130)电连接。
  10. 根据权利要求9所述的显示基板，还包括扫描线，所述扫描线与所述薄膜晶体管的控制极连接，所述扫描线与所述第一电压走线和所述第二电压走线相交。
  11. 一种显示面板，所述显示面板包括如权利要求1至10任一项所述的显示基板(100)和位于所述显示基板(100)上的多个LED器件(200)。
  12. 根据权利要求11所述的显示面板，其中，所述LED器件包括发光主体(210)、第一焊盘(220)和第二焊盘(230)，所述第一焊盘(220)和所述第二焊盘(230)位于所述发光主体(210)的同一侧面且相互绝缘，在垂直于所述侧面的方向上，至少一个所述LED器件的所述第一焊盘(220)和所述第二焊盘(230)的高度不相等。
  13. 根据权利要求12所述的显示面板，其中，所述第二焊盘(230)呈环形，所述第二焊盘呈柱形，所述第二焊盘(230)围绕所述第一焊盘(220)。
  14. 根据权利要求13所述的显示面板，其中，所述第一焊盘(220)和所述第二焊盘(230)之间具有绝缘层(240)或者绝缘间隙。
  15. 根据权利要求13或14所述的显示面板，其中，所述第一焊盘(220)的高度大于所述第二焊盘(230)的高度。
  16. 一种显示装置，包括权利要求11至15任一项所述的显示面板。
  17. 一种显示基板的制作方法，其特征在于，包括：
    提供衬底基板；
    在衬底基板上形成多个像素单元，所述像素单元包括第一绝缘层、以及相互绝缘的第一电极和第二电极，所述第一绝缘层中具有通孔，所述第一电极位 于通孔中，所述第一电极用于与LED器件的延伸至所述通孔的第一焊盘连接，所述第二电极位于所述通孔周边，所述第二电极用于与LED器件的第二焊盘连接。
  18. 一种显示面板的制作方法，包括：
    将多个LED器件放置在如权利要求1至10任一项所述的显示基板上，使得所述LED器件的第一焊盘与所述显示基板中对应像素单元的第一电极相对，所述LED器件的第二焊盘与所述显示基板中对应像素单元的第二电极相对；
    将所述第一焊盘与所述第一电极电连接，并且，将所述第二焊盘与所述第二电极电连接。
PCT/CN2020/085051 2019-04-19 2020-04-16 显示基板、显示面板、显示装置及制作方法 WO2020211808A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910319744.2 2019-04-19
CN201910319744.2A CN109887950A (zh) 2019-04-19 2019-04-19 显示基板、led器件、显示面板、显示装置及制作方法

Publications (1)

Publication Number Publication Date
WO2020211808A1 true WO2020211808A1 (zh) 2020-10-22

Family

ID=66937932

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/085051 WO2020211808A1 (zh) 2019-04-19 2020-04-16 显示基板、显示面板、显示装置及制作方法

Country Status (2)

Country Link
CN (1) CN109887950A (zh)
WO (1) WO2020211808A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109887950A (zh) * 2019-04-19 2019-06-14 京东方科技集团股份有限公司 显示基板、led器件、显示面板、显示装置及制作方法
EP3979343A4 (en) 2019-05-31 2023-05-24 Boe Technology Group Co., Ltd. DISPLAY BACKPLATE AND METHOD OF MAKING, DISPLAY PANEL AND METHOD OF MAKING, AND DISPLAY DEVICE
CN113169149A (zh) 2019-05-31 2021-07-23 京东方科技集团股份有限公司 显示背板及其制备方法和显示装置
US11600747B2 (en) 2019-08-16 2023-03-07 Boe Technology Group Co., Ltd. Display backplane and method of manufacturing the same, display device
CN110676360B (zh) * 2019-10-09 2021-10-15 创维液晶器件(深圳)有限公司 一种led灯条、背光模组及显示装置
CN110752209B (zh) * 2019-10-28 2021-04-30 京东方科技集团股份有限公司 一种显示用驱动背板及其制备方法、显示面板
CN110969935B (zh) * 2019-12-20 2022-02-22 京东方科技集团股份有限公司 一种阵列基板和显示装置
CN113707648A (zh) * 2020-05-06 2021-11-26 北京芯海视界三维科技有限公司 显示模组及显示面板
CN113707040A (zh) * 2020-05-22 2021-11-26 北京芯海视界三维科技有限公司 发光模组、显示模组、显示屏及显示器
TWI729846B (zh) 2020-06-10 2021-06-01 友達光電股份有限公司 發光裝置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170179092A1 (en) * 2014-10-31 2017-06-22 eLux Inc. Hybrid Display using Inorganic Micro Light Emitting Diodes (uLEDs) and Organic LEDs (OLEDs)
CN107302011A (zh) * 2016-04-14 2017-10-27 群创光电股份有限公司 显示装置
CN108336077A (zh) * 2017-12-13 2018-07-27 友达光电股份有限公司 像素阵列基板及其制造方法
CN108962914A (zh) * 2017-05-19 2018-12-07 启耀光电股份有限公司 电子装置与其制造方法
CN109887950A (zh) * 2019-04-19 2019-06-14 京东方科技集团股份有限公司 显示基板、led器件、显示面板、显示装置及制作方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101621101A (zh) * 2008-06-30 2010-01-06 展晶科技(深圳)有限公司 发光二极管及其制造方法
JP5286206B2 (ja) * 2009-09-11 2013-09-11 日立コンシューマエレクトロニクス株式会社 液晶表示装置
CN202712178U (zh) * 2012-07-16 2013-01-30 江苏微浪电子科技有限公司 由倒装发光单元阵列组成的立体发光器件
CN103346218B (zh) * 2013-07-09 2016-03-23 佛山市国星半导体技术有限公司 一种led芯片及其制作方法
KR102568252B1 (ko) * 2016-07-21 2023-08-22 삼성디스플레이 주식회사 발광 장치 및 그의 제조방법
TWI664711B (zh) * 2016-09-15 2019-07-01 美商伊樂視有限公司 具有表面貼裝發光元件的顯示器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170179092A1 (en) * 2014-10-31 2017-06-22 eLux Inc. Hybrid Display using Inorganic Micro Light Emitting Diodes (uLEDs) and Organic LEDs (OLEDs)
CN107302011A (zh) * 2016-04-14 2017-10-27 群创光电股份有限公司 显示装置
CN108962914A (zh) * 2017-05-19 2018-12-07 启耀光电股份有限公司 电子装置与其制造方法
CN108336077A (zh) * 2017-12-13 2018-07-27 友达光电股份有限公司 像素阵列基板及其制造方法
CN109887950A (zh) * 2019-04-19 2019-06-14 京东方科技集团股份有限公司 显示基板、led器件、显示面板、显示装置及制作方法

Also Published As

Publication number Publication date
CN109887950A (zh) 2019-06-14

Similar Documents

Publication Publication Date Title
WO2020211808A1 (zh) 显示基板、显示面板、显示装置及制作方法
US20230119947A1 (en) A substrate for manufacturing display device and a manufacturing method using the same
KR20200026845A (ko) 반도체 발광소자를 이용한 디스플레이 장치
CN113228288B (zh) 使用半导体发光器件的显示装置及其制造方法
JP2015015241A (ja) 有機発光表示装置及び有機発光表示装置製造方法
US20220351993A1 (en) Substrate for producing display device, and method for producing display device
US11211366B2 (en) Method for manufacturing display device and substrate for manufacturing display device
KR20200026669A (ko) 반도체 발광소자의 자가조립 장치 및 방법
US20230107331A1 (en) Display device using semiconductor light-emitting devices
TW202127403A (zh) 顯示面板
US20220302347A1 (en) Display device using semiconductor light emitting device surrounded by conductive electrode and method for manufacturing the same
US20220351992A1 (en) Substrate for manufacturing display device and method for manufacturing display device
WO2021102988A1 (zh) 显示基板及其制备方法、显示装置
KR20190122117A (ko) 반도체 발광 소자를 이용한 디스플레이 장치 및 이의 제조방법
CN114038897A (zh) 显示基板和显示装置
CN111162162A (zh) 转移基板及其制备方法、微发光二极管的转移方法
US20220302351A1 (en) Display device using semiconductor light emitting diode
US20220278082A1 (en) Display device using semiconductor light-emitting elements and manufacturing method therefor
US20230064316A1 (en) Display device using semiconductor light-emitting element
US20230023582A1 (en) Display device using semiconductor light emitting device
US11600747B2 (en) Display backplane and method of manufacturing the same, display device
EP3872857A1 (en) Display device using semiconductor light emitting device and method for manufacturing the same
CN112771674B (zh) 电子装置基板及其制作方法、电子装置
US20240038930A1 (en) Display device using semiconductor light-emitting devices, and method for manufacturing same
CN112531001B (zh) 显示面板及制作方法、显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20790776

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20790776

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 20790776

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 04.05.2022)

122 Ep: pct application non-entry in european phase

Ref document number: 20790776

Country of ref document: EP

Kind code of ref document: A1